WO2016045217A1 - 加密方法和加密装置 - Google Patents

加密方法和加密装置 Download PDF

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Publication number
WO2016045217A1
WO2016045217A1 PCT/CN2014/094727 CN2014094727W WO2016045217A1 WO 2016045217 A1 WO2016045217 A1 WO 2016045217A1 CN 2014094727 W CN2014094727 W CN 2014094727W WO 2016045217 A1 WO2016045217 A1 WO 2016045217A1
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Prior art keywords
encryption
saes
key
aes
encrypted
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PCT/CN2014/094727
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English (en)
French (fr)
Inventor
张明
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深圳市汇顶科技股份有限公司
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Priority to EP14902550.4A priority Critical patent/EP3200385B1/en
Priority to KR1020167021768A priority patent/KR101860461B1/ko
Publication of WO2016045217A1 publication Critical patent/WO2016045217A1/zh
Priority to US15/249,913 priority patent/US10164771B2/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/06—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols the encryption apparatus using shift registers or memories for block-wise or stream coding, e.g. DES systems or RC4; Hash functions; Pseudorandom sequence generators
    • H04L9/0618—Block ciphers, i.e. encrypting groups of characters of a plain text message using fixed encryption transformation
    • H04L9/0631—Substitution permutation network [SPN], i.e. cipher composed of a number of stages or rounds each involving linear and nonlinear transformations, e.g. AES algorithms
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/08—Key distribution or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
    • H04L9/0861—Generation of secret information including derivation or calculation of cryptographic keys or passwords
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/08—Key distribution or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
    • H04L9/0861—Generation of secret information including derivation or calculation of cryptographic keys or passwords
    • H04L9/0866—Generation of secret information including derivation or calculation of cryptographic keys or passwords involving user or device identifiers, e.g. serial number, physical or biometrical information, DNA, hand-signature or measurable physical characteristics
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L9/00—Cryptographic mechanisms or cryptographic arrangements for secret or secure communications; Network security protocols
    • H04L9/12—Transmitting and receiving encryption devices synchronised or initially set up in a particular manner
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L2209/00—Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
    • H04L2209/24—Key scheduling, i.e. generating round keys or sub-keys for block encryption

Definitions

  • the present invention relates to the field of communications technologies, and in particular, to an encryption method and an encryption device.
  • the encryption method used in modern cryptography usually uses a certain mathematical operation to change the original information. Somehow masquerading information and hiding its contents, called encryption.
  • the information to be encrypted is called plain text.
  • the message after being encrypted is called ciphertext.
  • the process of transforming ciphertext into plaintext is called decryption.
  • the encryption and decryption operation is composed of an algorithm class, and different operations of these algorithms can be represented by different parameters, which are called keys. According to the characteristics of the key, the password can be divided into a symmetric key password and a public key password.
  • the symmetric key cipher is also called a private key cipher or a single key cipher, and the encryption key and the decryption key are the same or one is easy to push out another.
  • Public key cryptography is also known as asymmetric key or dual key cipher. In public key cryptography, the encryption key is different from the decryption key or it is difficult to push another from one.
  • Symmetric key ciphers can be divided into block ciphers and stream ciphers according to different ways of encryption. The block cipher groups the plaintext according to a certain bit length, and the output is also a ciphertext of a fixed length. The advantage of the block cipher is that the key can be fixed for a certain period of time without having to change each time, thus facilitating the key distribution.
  • the DES (Data Encryption Standard) password is the first block cipher issued by NIST (National Institute of Standards and Technology) in 1977, but with the development of symmetric ciphers, DES Because of the small key length, the data encryption standard algorithm is not suitable for the data encryption security requirements of today's distributed open networks. Therefore, in 1997, NIST released a new encryption algorithm AES (Advanced Encryption Standard). As a new generation of data encryption standards, AES brings together the advantages of strong security, high performance, high efficiency, ease of use and flexibility.
  • the main object of the present invention is to provide an encryption method and an encryption device, which aim to improve the difficulty of AES cracking and improve data security.
  • the AES initial key is generated by the SAES encryption algorithm, and the AES initial key is subjected to key expansion to obtain an AES encryption key.
  • the information to be encrypted is encrypted by the AES encryption algorithm using the AES encryption key to generate encrypted data.
  • the SAES plaintext is encrypted by the SAES encryption algorithm by using the SAES encryption key to generate an AES initial key.
  • the performing SAES key processing on the SAES initial key comprises:
  • the key selection process is performed on the data after the cyclic shift processing.
  • the information to be encrypted is biometric information.
  • the invention also proposes an encryption device, which comprises a SAES encryption module and an AES encryption module, wherein:
  • the SAES encryption module is configured to generate an AES initial key by using an SAES encryption algorithm.
  • the AES encryption module is configured to perform key expansion on the AES initial key to obtain an AES encryption key, and use the AES encryption key to encrypt the information to be encrypted by the AES encryption algorithm to generate encrypted data.
  • the SAES encryption module comprises a processing unit and an encryption unit, wherein:
  • a processing unit configured to configure a SAES initial key and a SAES plaintext, perform SAES key processing on the SAES initial key, and perform key expansion on the processing result to obtain a SAES encryption key;
  • an encryption unit configured to encrypt the SAES plaintext by using a SAES encryption key by using the SAES encryption key to generate an AES initial key.
  • the processing unit is configured to perform cyclic shift processing on data in the SAES initial key and perform key selection processing on data after cyclic shift processing when performing SAES key processing.
  • the information to be encrypted is biometric information.
  • the SAES encryption module or/and the AES encryption module is an ASIC integrated in the encryption chip.
  • An encryption method provided by the present invention encrypts and generates an AES initial key by using a SAES encryption algorithm, expands the AES initial key into an AES encryption key, and encrypts the encrypted information by using the encrypted AES encryption key to generate encrypted data. Therefore, the AES encryption key is encrypted by introducing the SAES algorithm, which improves the difficulty of cracking the AES encryption key. The attacker needs to first crack the AES encryption key before cracking the AES, thereby improving the difficulty of cracking the AES encrypted data. .
  • the SAES encryption algorithm and the AES encryption algorithm are implemented by an ASIC integrated in the encryption chip. Since the ASIC is a customized circuit, there is no code or program that can be intercepted, and the program or code is prevented from being intercepted, resulting in SAES and AES being The risk of cracking. Ultimately, the security of the data is improved.
  • 1 is a flow chart of an embodiment of an encryption method of the present invention
  • FIG. 2 is a flowchart of encrypting and generating an AES initial key in an embodiment of the present invention
  • FIG. 3 is a schematic diagram of an AES initial key generated by encryption in an embodiment of the present invention.
  • FIG. 4 is a schematic diagram of performing SAES KEY processing in an embodiment of the present invention.
  • FIG. 5 is a schematic diagram of a SAES algorithm in an embodiment of the present invention.
  • FIG. 6 is a schematic diagram of performing AES encryption on fingerprint information in an embodiment of the present invention.
  • FIG. 7 is a schematic diagram of an AES algorithm in an embodiment of the present invention.
  • FIG. 8 is a block diagram showing an embodiment of an encryption apparatus of the present invention.
  • FIG. 9 is a block diagram of the SAES encryption module of FIG. 8.
  • the encryption method includes the following steps:
  • Step S101 Encrypting and generating an AES initial key by using a SAES encryption algorithm
  • the SAES (Simpilfy-AES, Advanced Encryption Standard Simplified Edition) encryption algorithm can be implemented by software or by hardware of the encryption chip. It can be realized by an FPGA (Field-Programmable Gate Array) integrated in the encryption chip, preferably by an ASIC (Application Specific Integrated Circuits) integrated in the encryption chip, since the ASIC is customized. Circuits, there are no code or programs that can be intercepted, thus avoiding the risk of SAES being cracked if the program or code is intercepted.
  • FPGA Field-Programmable Gate Array
  • ASIC Application Specific Integrated Circuits
  • the process of encrypting and generating the AES INTIAL KEY is as shown in FIG. 2 and FIG. 3, and includes the following steps:
  • Step S110 Configure the SAES initial key and SAES plaintext.
  • the SAES INTIAL KEY and SAES DATA are usually configured random numbers, where the SAES initial key is M sets of N bits of data, and N is usually less than or equal to 256 bits.
  • Step S120 Perform SAES key processing on the SAES initial key
  • the SAES key processing (SAES KEY processing) mainly includes performing cyclic shift processing on the data in the SAES initial key and key selection (KEY selection) processing on the data after the cyclic shift processing.
  • the processing flow is specifically as shown in FIG. 4 . Show:
  • serial stream SAES_OLD_BITSTREAM is cyclically processed, which may be a left loop or a right loop, and a new M*N-bit serial stream SAES_NEW_BITSTREAM is generated. For example, if N is cyclically shifted to the left, then the high N bit of SAES_OLD_BITSTREAM is shifted to the lower N bits of SAES_NEW_BITSTREAM, and the other (M-1)*N bits of SAES_OLD_BITSTREAM are shifted to the left by N bits.
  • the new serial stream SAES_NEW_BITSTREAM is subjected to key selection (KEY selection) processing, and the adjacent L data is selected from the configuration parameters, that is, the adjacent L SAES_NEW_KEYs are selected as outputs from the M SAES_NEW_KEY.
  • KEY selection key selection
  • L takes a minimum value of 1, indicating that any one of M is selected; L takes the maximum value M When it is, it means that all bits are selected).
  • SAES_NEW_KEY_i 1, 2, 3) can be selected as the output, that is, 3*N bits of data are output as input for subsequent SAES encryption key expansion.
  • Step S130 Perform key expansion on the processing result to obtain a SAES encryption key.
  • SAES KEY SAES encryption key
  • SAES DATA SAES plaintext to be encrypted
  • Step S140 Encrypt the SAES plaintext by using the SAES encryption key by using the SAES encryption key to generate an AES initial key.
  • the SAES plaintext may be a 128-bit, 192-bit or 256-bit random number, and after being encrypted by SAES, a 128-bit, 192-bit or 256-bit ciphertext, that is, an AES initial key, is output.
  • the SAES encryption algorithm is as specific as an error! The reference source was not found. Shown.
  • the number of iterations of SAES is K; in the first round, the SAES plaintext is XORed with the first round key; the middle K-2 round (ie, the second round to the K-1 round) is successively subjected to S-box transformation. Transform, column transformation, XOR operation with each round key; the last round (ie, the Kth round), less column transformation operation than the middle K-2 round; the last generated SAES ciphertext is AES initial secret
  • the key (AES INTIAL KEY), that is, the AES initial key is the key that has been encrypted by SAES.
  • Step S102 Perform AID encryption on the AES initial key to obtain an AES encryption key.
  • the AES initial key is usually 128 bits, 192 bits or 256 bits of data
  • the AES encryption key (AES KEY) generated after the key is extended is the product of the number of AES iterations and the length of the information to be encrypted.
  • the key expansion mode is a standard key expansion mode in the prior art, and details are not described herein again.
  • Step S103 Encrypt the information to be encrypted by the AES encryption algorithm by using the AES encryption key to generate encrypted data.
  • the information to be encrypted may be data information stored by the user, or biometric information of the user, and the biometric information may be fingerprint information, iris information, facial information, vein information, ear pattern information, and the like.
  • the AES encryption algorithm can be implemented by software or by hardware of the encryption chip. For example, it can be implemented by an FPGA integrated in the encryption chip, preferably by an ASIC integrated in the encryption chip. Since the ASIC is a customized circuit, there is no possibility that it can be intercepted. The code or program obtained, thereby avoiding the risk that the program or code will be intercepted and the AES will be cracked.
  • the terminal collects fingerprint information through a fingerprint acquisition sensor, and passes an ADC (Analog-to-digital converter).
  • the converter converts the fingerprint information from an analog signal to a digital signal.
  • the fingerprint data as the digital signal is AES DATA.
  • the fingerprint digital signal is encrypted by the AES encryption algorithm using the AES encryption key to generate fingerprint encrypted data.
  • the AES encryption algorithm is specifically shown in Figure 7.
  • the AES plaintext is the information to be encrypted, and the number of iterations of AES is K; in the first round, the AES plaintext is XORed with the first round key; the middle K-2 round (ie, the second round to the K-th) 1 round), successively through S box transformation, row transformation, column transformation, XOR operation with each round key; the last round (ie K round), less column transformation operation than the middle K-2 wheel
  • the resulting AES ciphertext is encrypted data.
  • the algorithm of AES encryption algorithm and SAES encryption algorithm have the same principle. The only difference is the number of iterations K. Usually, the number of iterations of AES is more than the number of iterations of SAES.
  • the AES initial key is encrypted by the SAES encryption algorithm
  • the AES initial key is expanded into an AES encryption key
  • the encrypted information is encrypted by the encrypted AES encryption key to generate encrypted data. Therefore, the AES encryption key is encrypted by introducing the SAES algorithm, which improves the difficulty of cracking the AES encryption key.
  • the attacker needs to first crack the AES encryption key before cracking the AES, thereby improving the difficulty of cracking the AES encrypted data. .
  • the SAES encryption algorithm and the AES encryption algorithm are implemented by an ASIC integrated in the encryption chip. Since the ASIC is a customized circuit, there is no code or program that can be intercepted, and the program or code is intercepted to cause SAES and AES. The risk of being cracked. Ultimately, the security of the data is improved.
  • the encryption apparatus includes an SAES encryption module and an AES encryption module.
  • SAES encryption module used to generate an AES initial key by SAES encryption algorithm and send it to the AES encryption module.
  • the SAES encryption algorithm can be implemented by software or by hardware of the encryption chip.
  • it can be implemented by an FPGA or ASIC integrated in the encryption chip, that is, the SAES encryption module is an FPGA or ASIC integrated in a encryption chip, preferably an ASIC, due to the ASIC. It is a customized circuit, and there is no code or program that can be intercepted, so as to avoid the risk that the program or code is intercepted and the SAES is cracked.
  • the SAES encryption module includes a processing unit and an encryption unit, where:
  • Processing unit configured to configure the SAES initial key and the SAES plaintext, perform SAES key processing on the SAES initial key, and perform key expansion on the processing result to obtain a SAES encryption key.
  • the processing unit usually configures a random number as the SAES initial key and the SAES plaintext, wherein the SAES initial key is M sets of N bits of data, and N is usually less than or equal to 256 bits.
  • the processing unit performs SAES key processing (SAES KEY processing), which mainly includes performing cyclic shift processing on the data in the SAES initial key and key selection (KEY selection) processing on the data after the cyclic shift processing, and the processing flow is specific.
  • SAES KEY processing SAES key processing
  • KEY selection cyclic shift processing on the data in the SAES initial key and key selection (KEY selection) processing on the data after the cyclic shift processing
  • the processing unit combines the M sets of N bits of the SAES initial key (SAES INTIAL KEY) into an M*N bit serial stream SAES_OLD_BITSTREAM; then, the processing unit cyclically shifts the serial stream SAES_OLD_BITSTREAM, Whether it is a left loop or a right loop, a new M*N bit serial stream SAES_NEW_BITSTREAM is generated. For example, if N is cyclically shifted to the left, then the high N bit of SAES_OLD_BITSTREAM is shifted to the lower N bits of SAES_NEW_BITSTREAM, and the other (M-1)*N bits of SAES_OLD_BITSTREAM are shifted to the left by N bits.
  • SAES initial key SAES INTIAL KEY
  • the processing unit performs key selection (KEY selection) processing on the new serial stream SAES_NEW_BITSTREAM, and selects adjacent L data from the configuration parameters, that is, selects adjacent SA SAES_NEW_KEY from M SAES_NEW_KEY as Output, where 0 ⁇ L ⁇ M + 1 (L takes a minimum value of 1, indicating that any one of M bits is selected; when L takes the maximum value M, it means that all bits are selected).
  • SAES_NEW_KEY_i 1, 2, 3) can be selected as the output, that is, 3*N bits of data are output as input for subsequent SAES encryption key expansion.
  • the processing unit After performing the key expansion on the foregoing processing result, the processing unit generates a SAES encryption key (SAES KEY) whose length is the product of the number of SAES iterations and the length of the SAES plaintext (SAES DATA) to be encrypted.
  • SAES KEY SAES encryption key
  • SAES DATA SAES plaintext
  • Encryption unit used to encrypt the SAES plaintext by the SAES encryption algorithm using the SAES encryption key to generate an AES initial key.
  • the SAES plaintext may be a 128-bit, 192-bit or 256-bit random number, and after being encrypted by SAES, a 128-bit, 192-bit or 256-bit ciphertext, that is, an AES initial key, is output.
  • the SAES encryption algorithm is as specific as an error! The reference source was not found. Shown.
  • the number of iterations of SAES is K; in the first round, the SAES plaintext is XORed with the first round key; the middle K-2 round (ie, the second round to the K-1 round) is successively subjected to S-box transformation. Transform, column transformation, XOR operation with each round key; the last round (ie, the Kth round), less column transformation operation than the middle K-2 round; the last generated SAES ciphertext is AES initial secret
  • the key, the AES initial key is the key that has been encrypted by SAES.
  • AES encryption module used to obtain the AES encryption key after key expansion of the AES initial key, and encrypts the information to be encrypted by the AES encryption algorithm by using the AES encryption key to generate encrypted data.
  • the information to be encrypted may be data information stored by the user, or biometric information of the user, and the biometric information may be fingerprint information, iris information, facial information, vein information, ear pattern information, and the like.
  • the AES encryption algorithm can be implemented by software or by hardware of the encryption chip. For example, it can be implemented by an FPGA or ASIC integrated in the encryption chip, that is, the AES encryption module is an FPGA or ASIC integrated in a encryption chip, preferably an ASIC. Since the ASIC is a customized circuit, there is no code or program that can be intercepted. In order to avoid the risk that the program or code is intercepted and the SAES is cracked.
  • the AES encryption algorithm is specifically shown in Figure 7.
  • the number of iterations of AES is K; in the first round, the AES plaintext is XORed with the first round key; the middle K-2 round (ie, the second round to the K-1 round) has undergone S-box transformation. Row transformation, column transformation, XOR operation with each round key; the last round (ie, the Kth round), less column transformation operation than the middle K-2 round; the last generated AES ciphertext is encryption data.
  • the algorithm of AES encryption algorithm and SAES encryption algorithm have the same principle. The only difference is the number of iterations K. Usually, the number of iterations of AES is more than the number of iterations of SAES.
  • the AES initial key is encrypted by the SAES encryption module, and the AES encryption module expands the AES initial key into an AES encryption key, and encrypts the encrypted information with the encrypted AES encryption key to generate encrypted data. Therefore, the AES encryption key is encrypted by introducing the SAES algorithm, which improves the difficulty of cracking the AES encryption key. The attacker needs to first crack the AES encryption key before cracking the AES, thereby improving the difficulty of cracking the AES encrypted data. .
  • the ASIC integrated in the encryption chip is used as the SAES encryption module and the AES encryption module. Since the ASIC is a customized circuit, there is no code or program that can be intercepted, and the program or code is intercepted to cause SAES and AES. The risk of being cracked. Eventually improved data Security.
  • the encryption device provided by the foregoing embodiment performs encryption
  • only the division of each functional module described above is used for illustration. In actual applications, the function allocation may be completed by different functional modules as needed.
  • the encryption device and the encryption method provided by the foregoing embodiments are in the same concept, and the specific implementation process is described in detail in the method embodiment, and the technical features in the device embodiment are applicable in the device embodiment, and details are not described herein again.
  • the encryption method and device provided by the present invention encrypts and generates an AES initial key by using a SAES encryption algorithm, expands the AES initial key into an AES encryption key, and encrypts the encrypted information by using the encrypted AES encryption key to generate encrypted data. Therefore, the AES encryption key is encrypted by introducing the SAES algorithm, which improves the difficulty of cracking the AES encryption key. The attacker needs to first crack the AES encryption key before cracking the AES, thereby improving the difficulty of cracking the AES encrypted data. .
  • the SAES encryption algorithm and the AES encryption algorithm are implemented by an ASIC integrated in the encryption chip. Since the ASIC is a customized circuit, there is no code or program that can be intercepted, and the program or code is prevented from being intercepted, resulting in SAES and AES being The risk of cracking. Ultimately, the security of the data is improved.

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Abstract

本发明公开了一种加密方法和加密装置，所述加密方法包括以下步骤：通过高级加密标准简化版（SAES）加密算法生成高级加密标准（AES）初始密钥（S101），对AES初始密钥进行密钥扩展后获得AES加密密钥（S102）；利用AES加密密钥通过AES加密算法对待加密的信息进行加密，生成加密数据（S103）。本发明引入SAES算法对AES加密密钥进行加密，提高了AES加密密钥的破解难度，攻击者需要先破解AES加密密钥，才能再去破解AES，整体上提高了AES加密数据的破解难度。此外，SAES加密算法和AES加密算法通过集成于加密芯片的ASIC实现，由于ASIC是定制化的电路，不存在任何可以被截获的代码或程序，避免了程序或代码被截获而导致SAES和AES被破解的风险，最终提高了数据的安全性。

Description

加密方法和加密装置 技术领域
本发明涉及通信技术领域，尤其是涉及一种加密方法和加密装置。
背景技术
现代密码学所采用的加密方法通常是用一定的数学计算操作来改变原始信息。用某种方法伪装信息并隐藏它的内容，称作加密。待加密的信息称作明文。被加密以后的消息称为密文。而把密文转变成明文的过程，称为解密。其中，加解密运算是由一个算法类组成的，这些算法的不同运算可用不同的参数表示，这些参数称作密钥。根据密钥的特点，密码可分为对称密钥密码和公钥密码。其中，对称密钥密码也称为私钥密码或单密钥密码，其加密密钥与解密密钥是相同的或从一个容易推出另一个。公钥密码也称为非对称密钥或双密钥密码。在公钥密码中，加密密钥与解密密钥是不同的或从一个很难推出另一个。根据加密的不同方式，对称密钥密码可分为分组密码和流密码。其中，分组密码将明文按一定的位长分组，输出也是固定长度的密文。分组密码的优点是密钥可以在一定时间内固定，不必每次变换，因此给密钥配发带来了方便。
DES(Data Encryption Standard，数据加密标准)密码是1977年由NIST(National Institute of Standards and Technology，美国国家标准与技术研究院)发布的第一个分组密码，但是，随着对称密码的发展，DES数据加密标准算法由于密钥长度较小，已经不适应当今分布式开放网络对数据加密安全性的要求，因此1997年NIST发布了新的加密算法AES(Advanced Encryption Standard，高级加密标准)。AES作为新一代的数据加密标准汇聚了强安全性、高性能、高效率，易用和灵活等优点。
然而，由于AES加密密钥容易被破解，一旦破解AES加密密钥后，也可能导致AES被破解，因此现有的AES加密方式，也不能保证数据的安全。
发明内容
本发明的主要目的在于提供一种加密方法和加密装置，旨在提高AES的破解难度，提高数据的安全性。
为达以上目的，本发明提出一种加密方法，包括步骤：
通过SAES加密算法加密生成AES初始密钥，并对所述AES初始密钥进行密钥扩展后获得AES加密密钥；
利用所述AES加密密钥通过AES加密算法对待加密的信息进行加密，生成加密数据。
优选地，所述通过SAES加密算法加密生成AES初始密钥包括：
配置SAES初始密钥和SAES明文；
对所述SAES初始密钥进行SAES密钥处理，并对处理结果进行密钥扩展，获得SAES加密密钥；
利用所述SAES加密密钥通过SAES加密算法对所述SAES明文进行加密，生成AES初始密钥。
优选地，所述对SAES初始密钥进行SAES密钥处理包括：
对所述SAES初始密钥中的数据进行循环移位处理；
对循环移位处理后的数据进行密钥选择处理。
优选地，所述待加密的信息为生物特征信息。
优选地，所述SAES加密算法或/和AES加密算法通过ASIC实现。
本发明同时提出一种加密装置，包括SAES加密模块和AES加密模块，其中：
SAES加密模块，用于通过SAES加密算法加密生成AES初始密钥；
AES加密模块，用于对所述AES初始密钥进行密钥扩展后获得AES加密密钥，利用所述AES加密密钥通过AES加密算法对待加密的信息进行加密，生成加密数据。
优选地，所述SAES加密模块包括处理单元和加密单元，其中：
处理单元，用于配置SAES初始密钥和SAES明文，对所述SAES初始密钥进行SAES密钥处理，并对处理结果进行密钥扩展，获得SAES加密密钥；
加密单元，用于利用所述SAES加密密钥通过SAES加密算法对所述SAES明文进行加密，生成AES初始密钥。
优选地，所述处理单元用于：在进行SAES密钥处理时，对所述SAES初始密钥中的数据进行循环移位处理，对循环移位处理后的数据进行密钥选择处理。
优选地，所述待加密的信息为生物特征信息。
优选地，所述SAES加密模块或/和AES加密模块为集成于加密芯片的ASIC。
本发明所提供的一种加密方法，通过SAES加密算法加密生成AES初始密钥，将AES初始密钥扩展为AES加密密钥，利用加密的AES加密密钥对待加密的信息进行加密生成加密数据。从而，通过引入SAES算法对AES加密密钥进行加密，提高了AES加密密钥的破解难度，攻击者需要先破解AES加密密钥，才能再去破解AES，整体上提高了AES加密数据的破解难度。此外，SAES加密算法和AES加密算法通过集成于加密芯片的ASIC实现，由于ASIC是定制化的电路，不存在任何可以被截获的代码或程序，避免了程序或代码被截获而导致SAES和AES被破解的风险。最终提高了数据的安全性。
附图说明
图1是本发明的加密方法一实施例的流程图；
图2是本发明实施例中加密生成AES初始密钥的流程图；
图3是本发明实施例中加密生成AES初始密钥的示意图；
图4是本发明实施例中进行SAES KEY处理的示意图；
图5是本发明实施例中SAES算法的示意图；
图6是本发明实施例中对指纹信息进行AES加密的示意图；
图7是本发明实施例中AES算法的示意图；
图8是本发明的加密装置一实施例的模块示意图；
图9是图8中SAES加密模块的模块示意图。
本发明目的的实现、功能特点及优点将结合实施例，参照附图做进一步说明。
具体实施方式
应当理解，此处所描述的具体实施例仅仅用以解释本发明，并不用于限 定本发明。
参见图1，提出本发明的加密方法一实施例，所述加密方法包括以下步骤：
步骤S101：通过SAES加密算法加密生成AES初始密钥
其中，SAES(Simpilfy-AES，高级加密标准简化版)加密算法，可以通过软件方式实现，也可以通过加密芯片的硬件方式实现。如可以通过集成于加密芯片的FPGA(Field－Programmable Gate Array，现场可编程门阵列)实现，优选通过集成于加密芯片的ASIC(Application Specific Integrated Circuits，专用集成电路)实现，由于ASIC是定制化的电路，不存在任何可以被截获的代码或程序，从而避免了程序或代码被截获而导致SAES被破解的风险。
加密生成AES初始密钥(AES INTIAL KEY)的过程具体如图2和图3所示，包括以下步骤：
步骤S110：配置SAES初始密钥和SAES明文
SAES初始密钥(SAES INTIAL KEY)和SAES明文(SAES DATA)通常为配置的随机数，其中SAES初始密钥为M组N比特的数据，N通常小于等于256比特。
步骤S120：对SAES初始密钥进行SAES密钥处理
SAES密钥处理(SAES KEY处理)主要包括对SAES初始密钥中的数据进行循环移位处理和对循环移位处理后的数据进行密钥选择(KEY选择)处理，处理流程具体如图4所示：
首先，将SAES初始密钥(SAES INTIAL KEY)的M组N比特的数据合并为一个M*N比特的串行流SAES_OLD_BITSTREAM；
然后，将串行流SAES_OLD_BITSTREAM做循环移位处理，可以是左循环也可以是右循环，生成新的M*N比特的串行流SAES_NEW_BITSTREAM。比如向左循环移位N，那么SAES_OLD_BITSTREAM的高N比特移位后就是SAES_NEW_BITSTREAM的低N比特，而SAES_OLD_BITSTREAM的其它(M-1)*N比特都向左移了N位。
最后，对新的串行流SAES_NEW_BITSTREAM进行密钥选择(KEY选择)处理，通过配置参数，从中选出相邻的L个数据，即从M个SAES_NEW_KEY中选出相邻的L个SAES_NEW_KEY作为输出，其中0<L<M+1(L取最小值1时，表示选取M个里的任一个N比特；L取最大值M 时，表示选取所有比特)。举例而言，可以选取SAES_NEW_KEY_i(i＝1,2,3)作为输出，即输出3*N比特的数据作为后续SAES加密密钥扩展的输入。
步骤S130：对处理结果进行密钥扩展，获得SAES加密密钥
所述处理结果即密钥选择处理后选出的相邻L个数据，经过密钥扩展后，生成SAES加密密钥(SAES KEY)，其长度为SAES迭代次数与待加密的SAES明文(SAES DATA)的长度的乘积。密钥扩展方式是现有技术中标准的密钥扩展方式，在此不再赘述。
步骤S140：利用SAES加密密钥通过SAES加密算法对SAES明文进行加密，生成AES初始密钥。这里，SAES明文可以是128比特、192比特或256比特随机数，通过SAES加密后，输出128比特、192比特或256比特的密文，即AES初始密钥。
SAES加密算法具体如错误！未找到引用源。所示。SAES的迭代次数为K；其中第1轮，SAES明文与第一轮密钥进行异或运算；中间K-2轮(即第2轮至第K-1轮)，先后经过S盒变换，行变换，列变换，与每轮密钥进行异或运算；最后一轮(即第K轮)，相比中间的K-2轮，少了列变换操作；最后生成的SAES密文即AES初始密钥(AES INTIAL KEY)，即AES初始密钥为经过SAES加密处理后的密钥。
生成AES初始密钥后，则进入下一步骤S102。
步骤S102：对AES初始密钥进行密钥扩展后获得AES加密密钥
AES初始密钥通常为128比特、192比特或者256比特长度的数据，密钥扩展后生成的AES加密密钥(AES KEY)，其长度为AES迭代次数与待加密的信息的长度的乘积。密钥扩展方式是现有技术中标准的密钥扩展方式，在此不再赘述。
步骤S103：利用AES加密密钥通过AES加密算法对待加密的信息进行加密，生成加密数据
待加密的信息，可以是用户存储的数据信息，也可以是用户的生物特征信息，所述生物特征信息可以是指纹信息、虹膜信息、面部信息、静脉信息、耳纹信息等。AES加密算法，可以通过软件方式实现，也可以通过加密芯片的硬件方式实现。如可以通过集成于加密芯片的FPGA实现，优选通过集成于加密芯片的ASIC实现，由于ASIC是定制化的电路，不存在任何可以被截 获的代码或程序，从而避免了程序或代码被截获而导致AES被破解的风险。
如图6所示，以对指纹信息进行加密为例，在进行密钥扩展获得AES加密密钥的同时，终端通过指纹采集传感器采集指纹信息，并通过ADC(Analog-to-digital converter，模数转换器)，将指纹信息由模拟信号转换为数字信号，此时作为数字信号的指纹数据即为AES明文(AES DATA)。最后利用AES加密密钥通过AES加密算法对指纹数字信号进行加密，生成指纹加密数据。
AES加密算法具体如图7所示。图中AES明文即为待加密的信息，AES的迭代次数为K；其中第1轮，AES明文与第一轮密钥进行异或运算；中间K-2轮(即第2轮至第K-1轮)，先后经过S盒变换，行变换，列变换，与每轮密钥进行异或运算；最后一轮(即第K轮)，相比中间的K-2轮，少了列变换操作；最后生成的AES密文即加密数据。AES加密算法和SAES加密算法的算法原理相同，唯一不同的是迭代次数K，通常AES的迭代次数比SAES的迭代次数多。
本发明的加密方法，通过SAES加密算法加密生成AES初始密钥，将AES初始密钥扩展为AES加密密钥，利用加密的AES加密密钥对待加密的信息进行加密生成加密数据。从而，通过引入SAES算法对AES加密密钥进行加密，提高了AES加密密钥的破解难度，攻击者需要先破解AES加密密钥，才能再去破解AES，整体上提高了AES加密数据的破解难度。
进一步地，SAES加密算法和AES加密算法通过集成于加密芯片的ASIC实现，由于ASIC是定制化的电路，不存在任何可以被截获的代码或程序，避免了程序或代码被截获而导致SAES和AES被破解的风险。最终提高了数据的安全性。
参见图8、图9，提出本发明的加密装置一实施例，所述加密装置包括SAES加密模块和AES加密模块。
SAES加密模块：用于通过SAES加密算法加密生成AES初始密钥，并发送给AES加密模块。
其中，SAES加密算法，可以通过软件方式实现，也可以通过加密芯片的硬件方式实现。如可以通过集成于加密芯片的FPGA或ASIC实现，即SAES加密模块为集成于一加密芯片的FPGA或ASIC，优选为ASIC，由于ASIC 是定制化的电路，不存在任何可以被截获的代码或程序，从而可避免程序或代码被截获而导致SAES被破解的风险。
如图9所示，SAES加密模块包括处理单元和加密单元，其中：
处理单元：用于配置SAES初始密钥和SAES明文，对SAES初始密钥进行SAES密钥处理，并对处理结果进行密钥扩展，获得SAES加密密钥。
处理单元通常配置一随机数作为SAES初始密钥和SAES明文，其中SAES初始密钥为M组N比特的数据，N通常小于等于256比特。
处理单元进行SAES密钥处理(SAES KEY处理)，主要包括对SAES初始密钥中的数据进行循环移位处理和对循环移位处理后的数据进行密钥选择(KEY选择)处理，处理流程具体如图4所示：
首先，处理单元将SAES初始密钥(SAES INTIAL KEY)的M组N比特的数据合并为一个M*N比特的串行流SAES_OLD_BITSTREAM；然后，处理单元将串行流SAES_OLD_BITSTREAM做循环移位处理，可以是左循环也可以是右循环，生成新的M*N比特的串行流SAES_NEW_BITSTREAM。比如向左循环移位N，那么SAES_OLD_BITSTREAM的高N比特移位后就是SAES_NEW_BITSTREAM的低N比特，而SAES_OLD_BITSTREAM的其它(M-1)*N比特都向左移了N位。
最后，处理单元对新的串行流SAES_NEW_BITSTREAM进行密钥选择(KEY选择)处理，通过配置参数，从中选出相邻的L个数据，即从M个SAES_NEW_KEY中选出相邻的L个SAES_NEW_KEY作为输出，其中0<L<M+1(L取最小值1时，表示选取M个里的任一个N比特；L取最大值M时，表示选取所有比特)。举例而言，可以选取SAES_NEW_KEY_i(i＝1,2,3)作为输出，即输出3*N比特的数据作为后续SAES加密密钥扩展的输入。
处理单元对前述处理结果进行密钥扩展后，生成SAES加密密钥(SAES KEY)，其长度为SAES迭代次数与待加密的SAES明文(SAES DATA)的长度的乘积。密钥扩展方式是现有技术中标准的密钥扩展方式，在此不再赘述。
加密单元：用于利用SAES加密密钥通过SAES加密算法对SAES明文进行加密，生成AES初始密钥。这里，SAES明文可以是128比特、192比特或256比特随机数，通过SAES加密后，输出128比特、192比特或256比特的密文，即AES初始密钥。
SAES加密算法具体如错误！未找到引用源。所示。SAES的迭代次数为K；其中第1轮，SAES明文与第一轮密钥进行异或运算；中间K-2轮(即第2轮至第K-1轮)，先后经过S盒变换，行变换，列变换，与每轮密钥进行异或运算；最后一轮(即第K轮)，相比中间的K-2轮，少了列变换操作；最后生成的SAES密文即AES初始密钥，即AES初始密钥为经过SAES加密处理后的密钥。
AES加密模块：用于对AES初始密钥进行密钥扩展后获得AES加密密钥，利用AES加密密钥通过AES加密算法对待加密的信息进行加密，生成加密数据。
待加密的信息，可以是用户存储的数据信息，也可以是用户的生物特征信息，所述生物特征信息可以是指纹信息、虹膜信息、面部信息、静脉信息、耳纹信息等。AES加密算法，可以通过软件方式实现，也可以通过加密芯片的硬件方式实现。如可以通过集成于加密芯片的FPGA或ASIC实现，即AES加密模块为集成于一加密芯片的FPGA或ASIC，优选为ASIC，由于ASIC是定制化的电路，不存在任何可以被截获的代码或程序，从而可避免程序或代码被截获而导致SAES被破解的风险。
AES加密算法具体如图7所示。AES的迭代次数为K；其中，第1轮，AES明文与第一轮密钥进行异或运算；中间K-2轮(即第2轮至第K-1轮)，先后经过S盒变换，行变换，列变换，与每轮密钥进行异或运算；最后一轮(即第K轮)，相比中间的K-2轮，少了列变换操作；最后生成的AES密文即为加密数据。AES加密算法和SAES加密算法的算法原理相同，唯一不同的是迭代次数K，通常AES的迭代次数比SAES的迭代次数多。
本发明的加密装置，通过SAES加密模块加密生成AES初始密钥，AES加密模块将AES初始密钥扩展为AES加密密钥，利用加密的AES加密密钥对待加密的信息进行加密生成加密数据。从而，通过引入SAES算法对AES加密密钥进行加密，提高了AES加密密钥的破解难度，攻击者需要先破解AES加密密钥，才能再去破解AES，整体上提高了AES加密数据的破解难度。
进一步地，将集成于加密芯片的ASIC作为SAES加密模块和AES加密模块，由于ASIC是定制化的电路，不存在任何可以被截获的代码或程序，避免了程序或代码被截获而导致SAES和AES被破解的风险。最终提高了数据 的安全性。
需要说明的是：上述实施例提供的加密装置在进行加密时，仅以上述各功能模块的划分进行举例说明，实际应用中，可以根据需要而将上述功能分配由不同的功能模块完成。另外，上述实施例提供的加密装置与加密方法实施例属于同一构思，其具体实现过程详见方法实施例，且方法实施例中的技术特征在装置实施例中均对应适用，这里不再赘述。
本领域普通技术人员可以理解,实现上述实施例方法中的全部或部分步骤可以通过程序来控制相关的硬件完成，所述的程序可以存储于一计算机可读取存储介质中，所述的存储介质可以是ROM/RAM、磁盘、光盘等。
应当理解的是，以上仅为本发明的优选实施例，不能因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。
工业实用性
本发明所提供的加密方法和装置，通过SAES加密算法加密生成AES初始密钥，将AES初始密钥扩展为AES加密密钥，利用加密的AES加密密钥对待加密的信息进行加密生成加密数据。从而，通过引入SAES算法对AES加密密钥进行加密，提高了AES加密密钥的破解难度，攻击者需要先破解AES加密密钥，才能再去破解AES，整体上提高了AES加密数据的破解难度。此外，SAES加密算法和AES加密算法通过集成于加密芯片的ASIC实现，由于ASIC是定制化的电路，不存在任何可以被截获的代码或程序，避免了程序或代码被截获而导致SAES和AES被破解的风险。最终提高了数据的安全性。

Claims (10)

  1. 一种加密方法，包括步骤：
    通过SAES高级加密标准简化版加密算法加密生成AES高级加密标准初始密钥，并对所述AES初始密钥进行密钥扩展后获得AES加密密钥；
    利用所述AES加密密钥通过AES加密算法对待加密的信息进行加密，生成加密数据。
  2. 根据权利要求1所述的加密方法，其中，所述通过SAES加密算法加密生成AES初始密钥包括：
    配置SAES初始密钥和SAES明文；
    对所述SAES初始密钥进行SAES密钥处理，并对处理结果进行密钥扩展，获得SAES加密密钥；
    利用所述SAES加密密钥通过SAES加密算法对所述SAES明文进行加密，生成AES初始密钥。
  3. 根据权利要求2所述的加密方法，其中，所述对SAES初始密钥进行SAES密钥处理包括：
    对所述SAES初始密钥中的数据进行循环移位处理；
    对循环移位处理后的数据进行密钥选择处理。
  4. 根据权利要求1-3任一项所述的加密方法，其中，所述待加密的信息为生物特征信息。
  5. 根据权利要求1-3任一项所述的加密方法，其中，所述SAES加密算法或/和AES加密算法通过ASIC专用集成电路实现。
  6. 一种加密装置，包括SAES加密模块和AES加密模块，其中：
    SAES加密模块，用于通过SAES加密算法加密生成AES初始密钥；
    AES加密模块，用于对所述AES初始密钥进行密钥扩展后获得AES加密密钥，利用所述AES加密密钥通过AES加密算法对待加密的信息进行加密，生成加密数据。
  7. 根据权利要求6所述的加密装置，其中，所述SAES加密模块包括处理单元和加密单元，其中：
    处理单元，用于配置SAES初始密钥和SAES明文，对所述SAES初始密 钥进行SAES密钥处理，并对处理结果进行密钥扩展，获得SAES加密密钥；
    加密单元，用于利用所述SAES加密密钥通过SAES加密算法对所述SAES明文进行加密，生成AES初始密钥。
  8. 根据权利要求7所述的加密装置，其中，所述处理单元用于：在进行SAES密钥处理时，对所述SAES初始密钥中的数据进行循环移位处理，对循环移位处理后的数据进行密钥选择处理。
  9. 根据权利要求6-8任一项所述的加密装置，其中，所述待加密的信息为生物特征信息。
  10. 根据权利要求6-8任一项所述的加密装置，其中，所述SAES加密模块或/和AES加密模块为集成于加密芯片的ASIC。
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