WO2016041274A1 - 用于cmos-tdi图像传感器的电流累加型像素结构 - Google Patents

用于cmos-tdi图像传感器的电流累加型像素结构 Download PDF

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WO2016041274A1
WO2016041274A1 PCT/CN2014/093756 CN2014093756W WO2016041274A1 WO 2016041274 A1 WO2016041274 A1 WO 2016041274A1 CN 2014093756 W CN2014093756 W CN 2014093756W WO 2016041274 A1 WO2016041274 A1 WO 2016041274A1
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pixel
transistor
current
tdi
image sensor
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PCT/CN2014/093756
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French (fr)
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聂凯明
姚素英
徐江涛
史再峰
高志远
高静
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天津大学
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/768—Addressed sensors, e.g. MOS or CMOS sensors for time delay and integration [TDI]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/71—Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
    • H04N25/75—Circuitry for providing, modifying or processing image signals from the pixel array
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/77—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/77—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
    • H04N25/771—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components comprising storage means other than floating diffusion
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/78—Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N3/00—Scanning details of television systems; Combination thereof with generation of supply voltages
    • H04N3/10—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical
    • H04N3/14—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by means of electrically scanned solid-state devices
    • H04N3/15—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by means of electrically scanned solid-state devices for picture signal generation
    • H04N3/1525—Scanning details of television systems; Combination thereof with generation of supply voltages by means not exclusively optical-mechanical by means of electrically scanned solid-state devices for picture signal generation with charge transfer within the image-sensor, e.g. time delay and integration
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/60—Noise processing, e.g. detecting, correcting, reducing or removing noise
    • H04N25/63—Noise processing, e.g. detecting, correcting, reducing or removing noise applied to dark current

Definitions

  • the present invention relates to the field of analog integrated circuit design, and more particularly to a current accumulation type pixel structure for a CMOS-TDI image sensor.
  • the TDI image sensor achieves high SNR and sensitivity with its special scanning method, and is especially suitable for high-speed motion and low illumination environments.
  • the basic principle of TDI is to use the array of pixels arranged in the array to work in line scan mode, so that pixels of different rows can be exposed multiple times to the same object in motion, and the results of each exposure are accumulated, which is equivalent.
  • the exposure integration time of the pixel to the object is extended, so the SNR and sensitivity can be greatly improved.
  • Traditional TDI image sensors are implemented by CCD devices, but compared with CCD image sensors, CMOS image sensors have lower power consumption, cost and higher integration.
  • CMOS image sensors ie CMOS-
  • the TDI image sensor can significantly reduce the cost of the TDI camera and become more widely used.
  • the prior art proposes to realize the CMOS-TDI image sensor by integrating an analog signal accumulator inside the CMOS image sensor, that is, the analog signal of the pixel output first enters the analog signal accumulator to complete the same The accumulation of the exposure signal, and then the accumulated analog signal is sent to the ADC for quantized output.
  • the prior art has also proposed to first quantize the pixel output in the CMOS image sensor through an ADC, and then perform the accumulation of the same exposure signal through the on-chip integrated digital domain accumulator.
  • ADC analog to digital converter
  • the read speed is bound to limit the shortest exposure.
  • the cycle limits the maximum line rate.
  • the prior art proposes a method for integrating a buffer unit in a pixel to realize signal transmission between adjacent pixels, and a CCD-type TDI image sensor can perform a pipeline operation of accumulating signals, and only the last line in each exposure period.
  • the output of the pixel needs to be quantized and read out, thus solving the limitation of the read speed to the horizontal frequency, thereby achieving a faster line frequency.
  • this technique introduces a large amount of thermal noise and an offset voltage of the operational amplifier during the pipelined accumulation of the pixel output signal, and the sensitivity of the sensor is limited because the buffer unit is integrated in the pixel to reduce the pixel fill factor.
  • the present invention aims to enable the CMOS image sensor to better implement the TDI function, improve the line frequency of the CMOS-TDI image sensor, and expand the application range of the TDI technology.
  • the technical solution adopted by the present invention Yes the current accumulating pixel structure for the CMOS-TDI image sensor is composed of one photodiode, four MOS transistors M1 to M4, four switches S1 to S4, and two capacitors C1 to C2.
  • the specific connection relationship is as follows: The anode of the photodiode is connected to the ground, the cathode of which is connected to the input terminal; the drain and the gate of the transistor M1 are simultaneously connected to the input terminal, the source stage thereof is connected to the power supply VDD; the source of the transistor M2 is connected to the power supply VDD, Its gate is connected to the gate of transistor M1, its drain is simultaneously connected to the drain and gate of transistor M3; the source of transistor M3 is connected to the ground; the lower plates of capacitors C1 and C2 are connected to the ground Upper, their upper plates are connected to the gate of transistor M3 through switches S1 and S3, respectively, and connected to the gate of transistor M4 through switches S2 and S4, respectively; the source of transistor M4 is connected to the ground, and its drain even Connected to the output.
  • the column pixel realizes the pipelined TDI signal accumulation function.
  • the specific working process is described as follows: in the Mth line transfer time, an object X passes through the Nth pixel, and the sum of the photocurrent formed by the photodiode and the front stage output current passes through the mirror transistor M1.
  • the sum of the photocurrent formed by current IM and the photodiode will flow, denoted as IM+1, and similar pixel N+1 will The current is converted into a voltage signal stored in the capacitor C2 for the next line transfer time and then restored to the current signal and passed to the next pixel.
  • the current signal IM stored in the Nth pixel is the first N pixels of the same object. Photocurrent formed in Sum realized TDI signal accumulation function.
  • the layout structure is such that the parallel input and output of the same column of pixels form a pipelined current accumulating TDI pixel array, and after the last row of pixels, the voltage and current conversion unit is cascaded, and the current accumulated by the completed current signal of the last row of pixels is converted into a voltage signal.
  • the ADC of the latter stage converts to a digital signal for output.
  • the current accumulating type pixel structure used in the CMOS-TDI image sensor can complete the transfer of the pre-stage pixel output signal to the subsequent stage pixel while exposing, and the same column pixel realizes the pipelined accumulation of the same object exposure result, each Only the output of the last row of pixels is read out during the exposure period, which reduces the limit of the readout speed to the shortest exposure time and increases the maximum line frequency of the sensor.
  • the proposed pixel structure is simple without using an op amp structure, and is accumulated every time. Only one switching capacitor is used in the operation, so no excessive thermal noise is introduced.
  • the invention can better realize the TDI function, improve the line frequency of the CMOS-TDI image sensor, and expand the application range of the TDI technology.
  • FIG. 1 is a schematic diagram of a pixel structure proposed by the present invention.
  • FIG. 2 is a timing diagram of pixel control provided by the present invention.
  • FIG. 3 is a schematic diagram of a CMOS-TDI image sensor architecture using the proposed pixel structure provided by the present invention.
  • FIG. 1 The current accumulating type pixel structure which can be used in the CMOS-TDI image sensor of the present invention is as shown in FIG. 1 , which mainly consists of one photodiode (D1), four MOS transistors (M1 to M4), and four switches (S1).
  • the source of the transistor M3 is connected to the ground line; the lower plates of the capacitors C1 and C2 are connected to the ground line, and their upper plates are connected to the gate of the transistor M3 through the switches S1 and S3, respectively, and then passed through the switches respectively.
  • S2 and S4 are connected to the gate of transistor M4; the source of transistor M4 is connected to the ground and its drain is connected to the output.
  • a single column in a CMOS-TDI image sensor is formed by a connection between a plurality of different pixel inputs and outputs. Pixels, under the timing control shown in Figure 2, the column of pixels can realize the pipelined TDI signal accumulation function.
  • the sum of the photocurrent formed by the current IM and the photodiode will be flown, denoted as IM+1, and the similar pixel N+1 converts the current into a voltage signal and stores it in the capacitor.
  • the next line of transfer time on C2 is restored to the current signal and passed to the next pixel.
  • the current signal IM stored in the Nth pixel is the sum of the photocurrents formed by the same object in the first N pixels, and the TDI signal accumulation function is realized.
  • FIG. 1024 x 100 CMOS-TDI image sensor using the pixel structure proposed by the present invention An architecture of a 1024 x 100 CMOS-TDI image sensor using the pixel structure proposed by the present invention is shown in FIG.
  • the parallel input and output of the pixels in the same column form a pipelined current accumulating TDI pixel array.
  • the voltage and current conversion unit is cascaded, and the current conversion of the last 100 rows of the completed 100 current signals is performed.
  • the voltage signal is then converted to a digital signal by the ADC of the latter stage for output. If the line transfer time is 5 microseconds, the line frequency is 200KHz, and the conversion rate of the ADC is only 200KHz.

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Abstract

本发明涉及模拟集成电路设计领域，为使COMS图像传感器能够较好的实现TDI功能，提高CMOS-TDI图像传感器的行频，扩大TDI技术的应用范围，为此，本发明采用的技术方案是，用于CMOS-TDI图像传感器的电流累加型像素结构，由一个光电二极管、四个MOS晶体管M1～M4、4个开关S1～S4和两个电容C1～C2组成，具体连接关系描述如下：光电二极管的阳极连接到地线，其阴极连接到输入端；晶体管M1的漏极和栅极同时连接到输入端，其源级连接到电源VDD上。本发明主要应用于模拟集成电路设计。

Description

用于CMOS-TDI图像传感器的电流累加型像素结构 技术领域
本发明涉及模拟集成电路设计领域，特别涉及一种用于CMOS-TDI图像传感器的电流累加型像素结构。
背景技术
TDI型图像传感器以其特殊的扫描方式，实现很高的SNR和灵敏度，特別适用于高速运动低照度的环境下。TDI的基本原理是使用面阵排布的像素阵列以线阵扫描的方式工作，进而可实现不同行的像素对移动中的同一物体进行多次曝光，并将每次曝光结果进行累加，等效延长了像素对物体的曝光积分时间，因此可以大幅提升SNR和灵敏度。传统TDI型图像传感器均是通过CCD器件实现，但与CCD图像传感器相比目前CMOS图像传感器具有更低的功耗、成本以及更高的集成度，因此通过CMOS图像传感器实现TDI功能(即CMOS-TDI图像传感器)，可使TDI相机的成本大幅下降并得到更广泛的应用。为使CMOS图像传感器实现TDI功能，现有技术提出通过在CMOS图像传感器内部集成模拟信号累加器的方法来实现CMOS-TDI图像传感器，即像素输出的模拟信号先进入模拟信号累加器中完成对相同曝光信号的累加，然后将完成累加的模拟信号送入ADC进行量化输出。此外，现有技术还曾提出首先通过ADC将CMOS图像传感器中像素输出进行量化，然后再通过片内集成的数字域累加器完成对相同曝光信号的累加。但是无论是先累加再量化输出还是先量化再累加输出，都需要在一个曝光周期(行转移时间)内将CMOS图像传感器中所有像素的曝光结果进行读出，因此读出速度势必会限制最短曝光周期即限制最大行频。为解决这一问题，现有技术提出了像素内集成缓冲单元以实现临近像素间的信号传递的方法，类似CCD型TDI图像传感器可流水线式完成信号的累加操作，每个曝光周期内只有最后一行像素的输出需要被量化读出，因此解决了读出速度对行频的限制，进而可以实现更快的行频。但是该技术在对像素输出信号进行流水式累加过程中会引入大量的热噪声和运放的失调电压，且因为像素内集成了缓冲单元降低了像素的填充因子，限制了传感器的灵敏度。
发明内容
为克服现有技术的不足，本发明旨在使CMOS图像传感器能够较好的实现TDI功能，提高CMOS-TDI图像传感器的行频，扩大TDI技术的应用范围，为此，本发明采用的技术方案是，用于CMOS-TDI图像传感器的电流累加型像素结构，由一个光电二极管、四个MOS晶体管M1～M4、4个开关S1～S4和两个电容C1～C2组成，具体连接关系描述如下：光电二极管的阳极连接到地线，其阴极连接到输入端；晶体管M1的漏极和栅极同时连接到输入端，其源级连接到电源VDD上；晶体管M2的源极连接到电源VDD上，其栅极与晶体管M1的栅极相连，其漏极同时连接到晶体管M3的漏极和栅极；晶体管M3的源极连接到地线上；电容C1与C2的下极板均连接到地线上，它们的上极板分别通过开关S1和S3连接到晶体管M3的栅极，再分别通过开关S2和S4连接到晶体管M4的栅极；晶体管M4的源极连接到地线上，其漏极连接到输出端。
列像素实现流水式TDI信号累加功能，具体工作过程描述如下：在第M个行转移时间内，某物体X经过第N个像素，光电二极管形成的光电流与前级输出电流总和通过镜像晶体管M1和M2流入晶体管M3中，假设此时开关S1和S4闭合，则晶体管M3将流过其的电流IM转换为电压信号存在在电容C1上；在第M+1个行转移时间内，物体X经过第N+1个像素，因为第N+1个像素的输入与第N个像素的输出相连，且此时开关S2和S3闭合，因此在第N个像素中存储在电容C1上的电压信号通过晶体管M4还原成电流IM流经晶体管M4，在第N+1个像素的M1中将会流过电流IM与光电二极管形成的光电流的总和，记为IM+1，类似的像素N+1将该电流转换为电压信号存储在电容C2上待下个行转移时间再将其还原为电流信号并传递至下一个像素，第N个像素中存储的电流信号IM即为同一物体在前N个像素中形成的光电流的总和，实现了TDI信号累加功能。
版图结构为，同列像素输入输出串联后形成流水线式电流累加型TDI像素阵列，在最后一行像素后级联电压电流转换单元，将最后一行像素输出的已完成电流信号累加的电流转换为电压信号再由后级的ADC转换为数字信号进行输出。
本发明的技术特点及效果：
所述的用于CMOS-TDI图像传感器中的电流累加型像素结构可在曝光同时完成前级像素输出信号向后级像素的传递，同列像素实现了对相同物体曝光结果的流水线式累加，每个曝光周期内只需读出最后一行像素的输出，降低了读出速度对最短曝光时间的限制，提升了传感器的最大行频；所提出的像素结构简单未使用运放结构，且在每次累加操作中仅使用一次开关电容采用过程，因此不会引入过多的热噪声。本发明可较好的实现TDI功能，提高CMOS-TDI图像传感器的行频，扩大TDI技术的应用范围。
附图说明
图1是本发明提出的像素结构示意图。
图2是本发明提供的像素控制时序示意图。
图3是本发明提供的使用所提出像素结构的CMOS-TDI图像传感器架构示意图。
具体实施方式
本发明所提出的可用于CMOS-TDI图像传感器中的电流累加型像素结构如图1所示，其主要由一个光电二极管(D1)、四个MOS晶体管(M1～M4)、4个开关(S1～S4)和两个电容(C1～C2)组成，它们之间的具体连接关系描述如下：光电二极管D1的阳极连接到地线，其阴极连接到输入端；晶体管M1的漏极和栅极同时连接到输入端，其源级连接到电源VDD上；晶体管M2的源极连接到电源VDD上，其栅极与晶体管M1的栅极相连，其漏极同时连接到晶体管M3的漏极和栅极；晶体管M3的源极连接到地线上；电容C1与C2的下极板均连接到地线上，它们的上极板分别通过开关S1和S3连接到晶体管M3的栅极，再分别通过开关S2和S4连接到晶体管M4的栅极；晶体管M4的源极连接到地线上，其漏极连接到输出端。如图1所示，通过多个不同像素输入与输出之间的连接形成CMOS-TDI图像传感器中的单列 像素，在如图2所示的时序控制下，该列像素即可实现流水式TDI信号累加功能。具体工作过程描述如下：在第M个行转移时间内，某物体X经过第N个像素，光电二极管D1形成的光电流与前级输出电流总和通过镜像晶体管M1和M2流入晶体管M3中，假设此时开关S1和S4闭合，则晶体管M3将流过其的电流IM转换为电压信号存在在电容C1上；在第M+1个行转移时间内，物体X经过第N+1个像素，因为第N+1个像素的输入与第N个像素的输出相连，且此时开关S2和S3闭合，因此在第N个像素中存储在电容C1上的电压信号通过晶体管M4还原成电流IM流经晶体管M4，在第N+1个像素的M1中将会流过电流IM与光电二极管形成的光电流的总和，记为IM+1，类似的像素N+1将该电流转换为电压信号存储在电容C2上待下个行转移时间再将其还原为电流信号并传递至下一个像素。通过上面描述的操作，第N个像素中存储的电流信号IM即为同一物体在前N个像素中形成的光电流的总和，实现了TDI信号累加功能。
为使本发明的目的、技术方案和优点更加清晰，下面将结合实例给出本发明实施方式的具体描述。一种使用本发明提出的像素结构的1024×100CMOS-TDI图像传感器的架构如图3所示。同列像素输入输出串联后形成流水线式电流累加型TDI像素阵列，在最后一行像素(第100行像素)后级联电压电流转换单元，将最后一行像素输出的已完成100次电流信号累加的电流转换为电压信号再由后级的ADC转换为数字信号进行输出。如果行转移时间为5微秒，则行频为200KHz，而ADC的转换速率也仅为200KHz即可。

Claims (3)

  1. 一种用于CMOS-TDI图像传感器的电流累加型像素结构，其特征是，由一个光电二极管、四个MOS晶体管M1～M4、4个开关S1～S4和两个电容C1～C2组成，具体连接关系描述如下：光电二极管的阳极连接到地线，其阴极连接到输入端；晶体管M1的漏极和栅极同时连接到输入端，其源级连接到电源VDD上；晶体管M2的源极连接到电源VDD上，其栅极与晶体管M1的栅极相连，其漏极同时连接到晶体管M3的漏极和栅极；晶体管M3的源极连接到地线上；电容C1与C2的下极板均连接到地线上，它们的上极板分别通过开关S1和S3连接到晶体管M3的栅极，再分别通过开关S2和S4连接到晶体管M4的栅极；晶体管M4的源极连接到地线上，其漏极连接到输出端。
  2. 如权利要求1所述的用于CMOS-TDI图像传感器的电流累加型像素结构，其特征是，列像素实现流水式TDI信号累加功能，具体工作过程描述如下：在第M个行转移时间内，某物体X经过第N个像素，光电二极管形成的光电流与前级输出电流总和通过镜像晶体管M1和M2流入晶体管M3中，假设此时开关S1和S4闭合，则晶体管M3将流过其的电流IM转换为电压信号存在在电容C1上；在第M+1个行转移时间内，物体X经过第N+1个像素，因为第N+1个像素的输入与第N个像素的输出相连，且此时开关S2和S3闭合，因此在第N个像素中存储在电容C1上的电压信号通过晶体管M4还原成电流IM流经晶体管M4，在第N+1个像素的M1中将会流过电流IM与光电二极管形成的光电流的总和，记为IM+1，类似的像素N+1将该电流转换为电压信号存储在电容C2上待下个行转移时间再将其还原为电流信号并传递至下一个像素，第N个像素中存储的电流信号IM即为同一物体在前N个像素中形成的光电流的总和，实现了TDI信号累加功能。
  3. 如权利要求1所述的用于CMOS-TDI图像传感器的电流累加型像素结构，其特征是，版图结构为，同列像素输入输出串联后形成流水线式电流累加型TDI像素阵列，在最后一行像素后级联电压电流转换单元，将最后一行像素输出的已完成电流信号累加的电流转换为电压信号再由后级的ADC转换为数字信号进行输出。
PCT/CN2014/093756 2014-09-15 2014-12-12 用于cmos-tdi图像传感器的电流累加型像素结构 WO2016041274A1 (zh)

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Publication number Priority date Publication date Assignee Title
CN104219468B (zh) * 2014-09-15 2017-06-20 天津大学 高行频cmos‑tdi图像传感器
WO2016106478A1 (zh) * 2014-12-29 2016-07-07 中国科学院半导体研究所 用于cmos图像传感器的模拟读出预处理电路及其控制方法
CN109314366A (zh) * 2016-07-22 2019-02-05 极光先进雷射株式会社 窄带化KrF准分子激光装置
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101437119A (zh) * 2007-11-15 2009-05-20 索尼株式会社 固态成像装置和相机系统
CN102611853A (zh) * 2010-11-30 2012-07-25 X-Scan映像股份有限公司 一种互补金属氧化物半导体时间延迟积分式感测器
CN103402061A (zh) * 2013-08-12 2013-11-20 长春长光辰芯光电技术有限公司 Cmos tdi图像传感器及其电荷转移控制方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6459077B1 (en) * 1998-09-15 2002-10-01 Dalsa, Inc. Bucket brigade TDI photodiode sensor
US7459667B1 (en) * 2004-09-07 2008-12-02 Sensata Technologies, Inc. Active pixel image sensor with common gate amplifier mode
US7675561B2 (en) * 2006-09-28 2010-03-09 Cypress Semiconductor Corporation Time delayed integration CMOS image sensor with zero desynchronization
DE102007030985B4 (de) * 2007-07-04 2009-04-09 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Bildsensor, Verfahren zum Betreiben eines Bildsensors und Computerprogramm
US8039811B1 (en) * 2009-12-04 2011-10-18 X-Scan Imaging Corporation CMOS time delay integration sensor for X-ray imaging applications
FR2961019B1 (fr) * 2010-06-03 2013-04-12 Commissariat Energie Atomique Capteur d'image lineaire en technologie cmos
US8451354B2 (en) * 2010-05-17 2013-05-28 Commissariat A L'energie Atomique Et Aux Energies Alternatives TDI image sensor in CMOS technology with high video capture rate
FR2996957A1 (fr) * 2012-10-12 2014-04-18 St Microelectronics Grenoble 2 Procede de lecture d'un pixel
CN103491320B (zh) * 2013-09-05 2017-02-08 北京立博信荣科技有限公司 一种图像传感电路及方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101437119A (zh) * 2007-11-15 2009-05-20 索尼株式会社 固态成像装置和相机系统
CN102611853A (zh) * 2010-11-30 2012-07-25 X-Scan映像股份有限公司 一种互补金属氧化物半导体时间延迟积分式感测器
CN103402061A (zh) * 2013-08-12 2013-11-20 长春长光辰芯光电技术有限公司 Cmos tdi图像传感器及其电荷转移控制方法

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