WO2016038684A1

WO2016038684A1 - Multiplex communication apparatus

Info

Publication number: WO2016038684A1
Application number: PCT/JP2014/073797
Authority: WO
Inventors: 伸夫長坂; 重元廣田; 英和金井
Original assignee: 富士機械製造株式会社
Priority date: 2014-09-09
Filing date: 2014-09-09
Publication date: 2016-03-17
Also published as: JP6438964B2; JPWO2016038684A1

Abstract

Provided is a multiplex communication apparatus for enabling a plurality of industrial Ethernets (Registered Trademark) to be routed by use of a single path. A multiplex communication system 1 is divided into an A-area 2 and a B-area 3. In the A-area 2, a multiplex communication apparatus 100A is disposed. In the B-area 3, a multiplex communication apparatus 100B is disposed. The multiplex communication apparatuses 100A and 100B are connected to each other by use of a multiplex communication-use cable 101, such as LAN line category 5e or optical fiber.

Description

Multiplex communication equipment

The present invention relates to a multiplex communication apparatus that transmits and receives communication data of an apparatus using an industrial Ethernet (such as EtherCAT (registered trademark) and MECHATRLINK (registered trademark) -III) in a minimum unit of a logical layer and a physical layer. .

Hereinafter, a conventional multiplex communication apparatus will be described.

FIG. 6 is a system configuration diagram of a conventional communication system. The multiplex communication system 1001 shown in FIG. 6 is divided into an A area 1002 and a B area 1003.

In the A area 1002, a system control device 1011, a servo controller 1012, an image processing device 1013, and a sequencer 1014 are installed.

The system controller 1011 and the servo controller 1012 are connected by a LAN cable 1020 for Ethernet (registered trademark) such as MECHATRLINK (registered trademark) -III.

Also, the system control device 1011 and the image processing device 1013 are connected by a LAN cable 1021 for Ethernet (registered trademark) such as TCP / IP, UDP.

Furthermore, the system controller 1011 and the sequencer 1014 are connected by a LAN cable 1022 for Ethernet (registered trademark) such as EtherCAT (registered trademark).

The system control device 1011 controls the entire device. As shown in FIG. 6, the entire apparatus includes an A area 1002 as a fixed portion and a B area 1003 as a movable portion. Instead of the entire apparatus, an A area 1002 as a C factory and a B area 1003 as a D factory may be used. The image processing apparatus 1013 is used for monitoring or the like. Note that the image processing apparatus 1013 may be replaced with an image display apparatus.

Servo amplifier /

motors

1015, 1016, a camera 1017, and

slaves

1018, 1019 are installed in the B area 1003. The

slaves

1018 and 1019 are here relays or sensors.

Servo amplifiers /

motors

1015 and 1016 are connected by a LAN cable 1020 for Ethernet (registered trademark) such as MECHATRLINK (registered trademark) -III. Further, the servo amplifiers /

motors

1015 and 1016 are connected to the servo controller 1012 in the A area 1002 by a LAN cable 1020 for Ethernet (registered trademark) such as MECHATRLINK (registered trademark) -III.

The camera 1017 is connected to the image processing apparatus 1013 in the A area 1002 by a LAN cable 1021 for Ethernet (registered trademark) such as TCP / IP and UDP.

The

slaves

1018 and 1019 are connected by a LAN cable 1022 for Ethernet (registered trademark) such as EtherCAT (registered trademark). Furthermore, the

slaves

1018 and 1019 are connected to the sequencer 1014 in the A area 1002 by an Ethernet (registered trademark) LAN cable 1022 such as EtherCAT (registered trademark).

In addition, as inventions related to the conventional multiplex communication apparatus, there are inventions described in the following patent documents.

Japanese Patent Laid-Open No. 2001-308921 JP 2010-193327 A

However, in the multiplex communication system 1001 shown in FIG. 6,

LAN cables

1020, 1021, and 1022 are prepared and installed for each of a plurality of routes.

That is, when the number of wire harnesses (

LAN cables

1020, 1021, 1022) is large and the wire harness (

LAN cables

1020, 1021, 1022) is used in the B area 1003 as a movable part in the apparatus, the entire wire harness (

LAN cables

1020, 1021, 1022) is thick. Thus, a cable duct having a sufficiently large bending radius R is required, which affects downsizing.

In the case of A area 1002 as C factory and B area 1003 as D factory, in addition to the number of wire harnesses (

LAN cables

1020, 1021, 1022), wire harnesses (

LAN cables

1020, 1021, 1022) Therefore, the

LAN cable

1020, 1021, 1022 is heavy, the cost is high, and the electric wires to be installed are thick.

Further, in the multiplex communication system 1001 shown in FIG. 6, when the A area 1002 as the fixed part and the B area 1003 as the movable part are connected by a single LAN line, first, the specific information to be used is used. Standard 1 and Standard 2 gateway devices are purchased and unified to one of the lines, and then connected by one LAN line.

If there is no standard Gateway device to be used or if Industrial Ethernet (registered trademark) is a new standard, the progress of the construction will be delayed by the development lead time of the Gateway device.

There are some combinations of standards to be used that are not mass-produced. In such a case, construction costs are high.

When using the Gateway device, since the frame after conversion is created after analyzing the frame before conversion, the delay becomes large, and it cannot be used for a portion that requires real-time characteristics, and has a relatively slow cycle. Become a thing.

When the

slaves

1018 and 1019 have different standards, after Gateway, it becomes a standard that is not supported by a commercial manufacturer (for example, a slave marketed for Profinet (registered trademark) is used in EtherCAT (registered trademark)). Slave configuration file is not prepared. Therefore, since a setting file (in the previous example, a setting file for EtherCAT (registered trademark)) is newly created, it takes time and effort (such as understanding the standard, then writing the setting file, and checking the operation). It takes.

In addition, each standard has its pros and cons, there are only products with limited I / F (interface) of the desired component, there are no choices, and there are standards for devices delivered in the past. Even within the same factory, there are cases where they are not unified into one standard.

In particular, some industrial Ethernet (registered trademark) standards cannot use hubs that are often used in PCs, and there are cases in which other standards cannot be used with dedicated repeaters. is there.

Therefore, the present invention has been made in view of the above-described points, and an object of the present invention is to provide a multiplex communication apparatus capable of wiring a plurality of industrial Ethernet (registered trademark) through a single route.

In order to solve this problem, the invention according to claim 1 is a multiplex communication apparatus for placing industrial Ethernet (registered trademark) signals of a plurality of ports on a single transmission line, comprising: a data logical layer; The media independent interface, which is the internal interface of the physical layer, adds flag information on the presence / absence of data to the minimum unit data, performs transmission / reception of the minimum unit of data, and multiplexes while ensuring data continuity And

The “multiple-port industrial Ethernet (registered trademark) signal” is, for example, 100base-tx.

“The internal interface between the logical layer and the physical layer of data” includes, for example, MII: Media Independent Interference, GMII: Gigabit Media Independent Interference, etc.

The “minimum unit” is, for example, 1 Nibble 25 MHz and 4 BIT in MII, and 125 MHz and 8 BIT in GMII.

“Perform transmission / reception in the minimum unit of data” means, for example, switching between transmission and reception at a fixed interval (15 clocks) in 100 base-tx half-duplex communication according to Ethernet (registered trademark) standard GbE. In full-duplex communication using etc., transmission and reception are performed at a fixed interval (10 clocks).

In the present invention, the bit positions are fixed on the multiplexed data before and after multiplexing a plurality of ports, and a plurality of industrial Ethernet (registered trademark) can be wired by a single route. Therefore, wiring saving can be achieved.

1 is a system configuration diagram of a multiplex communication system in which a multiplex communication apparatus according to an embodiment of the present invention is used. It is an internal block diagram of the same multiplex communication apparatus. FIG. 3 is a diagram illustrating a multiplex communication protocol based on Ethernet (registered trademark) standard GbE when the multiplex communication apparatus performs transmission and reception in a half-duplex communication scheme. FIG. 3 is a diagram illustrating a multiplex communication protocol according to Ethernet (registered trademark) standard GbE when the multiplex communication apparatus performs transmission and reception in a half-duplex communication scheme. In the same multiplex communication apparatus, in addition to 100 base-tx, a multiplex communication protocol when 3 lines of 1000 base-t are multiplexed by SFP (5 Gbps) is shown. It is a system configuration | structure figure of the communication system of a prior art.

[1. System configuration of multiplex communication system]
Hereinafter, a multiplex communication apparatus embodying the present invention will be described with reference to the drawings. FIG. 1 is a system configuration diagram of a multiplex communication system in which a multiplex communication apparatus according to an embodiment of the present invention is used.

1 is divided into A area 2 and B area 3. In the A area 2, the multiplex communication apparatus 100A according to the present embodiment is installed. In the B area 3, the multiplex communication apparatus 100B according to the present embodiment is installed.

In the A area 2, in addition to the multiplex communication apparatus 100A according to the present embodiment, a system control apparatus 11, a servo controller 12, an image processing apparatus 13, and a sequencer 14 are installed.

The system control apparatus 11 and the multiplex communication apparatus 100A according to the present embodiment are connected via a servo controller 12 with a LAN cable 20 for Ethernet (registered trademark) such as MECHATRLINK (registered trademark) -III.

Further, the system control apparatus 11 and the multiplex communication apparatus 100A according to the present embodiment are connected via the image processing apparatus 13 with a LAN cable 21 for Ethernet (registered trademark) such as TCP / IP and UDP.

Furthermore, the system control apparatus 11 and the multiplex communication apparatus 100A according to the present embodiment are connected via a sequencer 14 by an Ethernet (registered trademark) LAN cable 22 such as EtherCAT (registered trademark).

The system control device 11 controls the entire device. As shown in FIG. 1, the entire apparatus is an A area 2 as a fixed portion and a B area 3 as a movable portion. Instead of the entire apparatus, an A area 2 as a C factory and a B area 3 as a D factory may be used. The image processing device 13 is used for monitoring and the like. The image processing device 13 may be replaced with an image display device.

In the B area 3, in addition to the multiplex communication apparatus 100B according to the present embodiment, servo amplifiers /

motors

15, 16, a camera 17, and

slaves

18, 19 are installed. In this embodiment, the

slaves

18 and 19 are relays or sensors.

Servo amplifiers /

motors

15 and 16 perform data communication with the servo controller 12 in area A2. The camera 17 performs data communication with the image processing device 13 (or image display device) in area A2. The

slaves

18 and 19 perform data communication with the sequencer 14 in the A area 2.

The multiplex communication apparatus 100B according to this embodiment and the servo amplifiers /

motors

15 and 16 are connected by a LAN cable 20 for Ethernet (registered trademark) such as MECHATRLINK (registered trademark) -III.

The multiplex communication device 100B according to the present embodiment and the camera 17 are connected by a LAN cable 21 for Ethernet (registered trademark) such as TCP / IP and UDP.

The multiplex communication apparatus 100B according to the present embodiment and the

slaves

18 and 19 are connected by a LAN cable 22 for Ethernet (registered trademark) such as EtherCAT (registered trademark).

The

multiplex communication apparatuses

100A and 100B according to the present embodiment are connected by a multiplex communication cable 101 such as a LAN line category 5e or an optical fiber.

[2. Internal configuration of system control unit]
FIG. 2 is an internal configuration diagram of the

multiplex communication apparatuses

100A and 100B according to the present embodiment. As shown in FIG. 2, the

multiplex communication apparatuses

100A and 100B according to the present embodiment are connected by the multiplex communication cable 101 such as the LAN line category 5e or an optical fiber as described above.

The multiplex communication apparatus 100A according to the present embodiment includes a PHY-IC 110A for the multiplex side physical layer, a multiplex communication protocol processing unit 120A, input /

output processing units

130A, 140A, 150A, a multiplex processing unit 160A, and a PHY- for the local side physical layer.

IC

170A, 180A, 190A.

The multiplex-side physical layer PHY-IC 110A is a 1000-base-t PHY-IC, and is an SFP optical transceiver when an optical fiber is used as the multiplex communication cable 101.

The multiplex communication protocol processing unit 120A performs a synthesis / separation process on the multiplex communication protocols shown in FIGS. The multiplex communication protocol processing unit 120A includes a GMII-I / F data input unit 121A, a demultiplexing unit 122A, a multiplex mixing unit 123A, and a GMII-I / F data output unit 124A.

The input /

output processing units

130A, 140A, and 150A are Ethernet (registered trademark) signal input / output units to be multiplexed, and require a plurality of paths. Specifically, in the multiplex communication system 1 shown in FIG. 1, the multiplex communication apparatus 100 A according to the present embodiment is installed in the A area 2. Therefore, the multiplex communication apparatus 100A according to the present embodiment includes three input /

output processing units

130A, 130A, as shown in FIG. 2 as paths for the servo controller 12, the image processing apparatus 13, and the sequencer 14. 140A and 150A.

Each input /

output processing unit

130A, 140A, 150A includes MII-I / F data input units 131A, 141A, 151A, reception buffers 132A, 142A, 152A, MII-I / F

data output units

133A, 143A, 153A, and transmission. There are

buffers

134A, 144A, 154A.

The MII-I / F data input units 131A, 141A, and 151A are physical layer and link layer I / Fs, and are MII-I / F data (25 MHz, 4 BIT) receiving units.

The reception buffers 132A, 142A, and 152A are buffers that absorb a difference between 125 MHz, which is a clock for multiplex communication, and 25 MHz, which is an MII clock.

The MII-I / F

data output units

133A, 143A, and 153A are physical layer and link layer I / Fs, and are MII-I / F data (25 MHz, 4 BIT) transmission units.

The transmission buffers 134A, 144A, 154A are data storage units for outputting data to the local side. Specifically, in the multiplex communication system 1 shown in FIG. 1, the multiplex communication apparatus 100 A according to the present embodiment is installed in the A area 2. Therefore, in the multiplex communication apparatus 100A according to the present embodiment, the local side is the servo controller 12, the image processing apparatus 13, and the sequencer 14.

Returning to FIG. 2, the transmission buffers 134A, 144A, and 154A have a jitter (one block transmission / reception time, for example, 30 in the standard GbE of Ethernet (registered trademark) shown in FIGS. When the number of created 4 BIT data is accumulated, continuous transmission is started. The transmission buffers 134A, 144A, and 154A determine that the frame delimiter is IPG (Inter-Packet Gap, MIN 12 bytes) when there is no data for a certain period of time, and cancel the continuous transmission state.

If transmission is started with one or more buffers, there is no data to be transmitted in the jitter of multiplex communication in the transmission buffers 134A, 144A, 154A, and the continuity of the output data is lost, so that the frame can be received correctly on the local side. It becomes abnormal.

The multiplex processing unit 160A is a multiplex internal processing unit in an integrated circuit (specifically, FPGA or ASIC) having a multiplex communication protocol processing unit 120A and input /

output processing units

130A, 140A, 150A.

PHY-

ICs

170A, 180A, and 190A for the local physical layer are PHY-ICs for 100base-tx, and are necessary for input / output of signals for a plurality of paths of Ethernet (registered trademark). Specifically, in the multiplex communication system 1 shown in FIG. 1, the multiplex communication apparatus 100 A according to the present embodiment is installed in the A area 2. Accordingly, the multiplex communication apparatus 100A according to the present embodiment includes three local physical layer PHY-as shown in FIG. 2 as paths of the servo controller 12, the image processing apparatus 13, and the sequencer 14. There are

ICs

170A, 180A, and 190A.

The local physical layer PHY-IC 170A is connected to a LAN cable 20 for Ethernet (registered trademark) such as MECHATRLINK (registered trademark) -III. A LAN cable 21 for Ethernet (registered trademark) such as TCP / IP or UDP is connected to the local physical layer PHY-IC 180A. A LAN cable 22 for Ethernet (registered trademark) such as EtherCAT (registered trademark) is connected to the local physical layer PHY-IC 190A.

Similarly, the multiplex communication apparatus 100B according to the present embodiment includes the PHY-IC 110B for the multiplex side physical layer, the multiplex communication protocol processing unit 120B, the input /

output processing units

130B, 140B, and 150B, the multiplex processing unit 160B, and the local side physical layer. Layer PHY-

ICs

170B, 180B, and 190B are provided.

The PHY-IC 110B for the multiplex side physical layer is a PHY-IC for 1000base-t, and is an SFP optical transceiver when an optical fiber is used as the multiplex communication cable 101.

The multiplex communication protocol processing unit 120B performs a synthesis / separation process on the multiplex communication protocols shown in FIGS. The multiplex communication protocol processing unit 120B includes a GMII-I / F data input unit 121B, a demultiplexing unit 122B, a multiplex mixing unit 123B, and a GMII-I / F data output unit 124B.

The input /

output processing units

130B, 140B, and 150B are input / output units for Ethernet (registered trademark) signals to be multiplexed, and require a plurality of paths. Specifically, in the multiplex communication system 1 shown in FIG. 1, the multiplex communication apparatus 100 B according to the present embodiment is installed in the B area 3. Therefore, the multiplex communication apparatus 100B according to the present embodiment includes three input / output signals as shown in FIG. 2 for the servo amplifier /

motors

15 and 16, the camera 17, and the

slaves

18 and 19, respectively. There are processing

units

130B, 140B, and 150B.

Each input /

output processing unit

130B, 140B, 150B includes MII-I / F

data input units

131B, 141B, 151B, reception buffers 132B, 142B, 152B, MII-I / F data output units 133B, 143B, 153B, and transmission. It has buffers 134B, 144B, 154B.

The MII-I / F

data input units

131B, 141B, and 151B are physical layer and link layer I / Fs, and are MII-I / F data (25 MHz, 4 BIT) receiving units.

The reception buffers 132B, 142B, and 152B are buffers that absorb a difference between 125 MHz, which is a clock for multiplex communication, and 25 MHz, which is an MII clock.

The MII-I / F data output units 133B, 143B, and 153B are physical layer and link layer I / Fs, and are MII-I / F data (25 MHz, 4 BIT) transmission units.

The transmission buffers 134B, 144B, and 154B are data storage units for outputting data to the local side. Specifically, in the multiplex communication system 1 shown in FIG. 1, the multiplex communication apparatus 100 B according to the present embodiment is installed in the B area 3. Therefore, in the multiplex communication apparatus 100B according to the present embodiment, the local side is the servo amplifiers /

motors

15 and 16, the camera 17, and the

slaves

18 and 19.

Returning to FIG. 2, the transmission buffers 134B, 144B, and 154B have a jitter (one block transmission / reception time, for example, 30 in the standard GbE of Ethernet (registered trademark) represented in FIGS. When the number of created 4 BIT data is accumulated, continuous transmission is started. The transmission buffers 134B, 144B, and 154B determine that the frame delimiter is IPG (Inter-Packet Gap, MIN 12 bytes) when there is no data for a certain period of time, and cancel the continuous transmission state.

When transmission starts with one or more buffers, the data to be transmitted with the jitter of multiplex communication is not in the transmission buffers 134B, 144B, and 154B, and the continuity of the output data is lost, so the frame can be received correctly on the local side. It becomes abnormal.

The multiplex processing unit 160B is a multiplex internal processing unit in an integrated circuit (specifically, FPGA or ASIC) having a multiplex communication protocol processing unit 120B and input /

output processing units

130B, 140B, and 150B.

PHY-

ICs

170B, 180B, and 190B for the local physical layer are PHY-ICs for 100base-tx, and are necessary for input / output of signals for Ethernet (registered trademark) in multiple paths. Specifically, in the multiplex communication system 1 shown in FIG. 1, the multiplex communication apparatus 100 B according to the present embodiment is installed in the B area 3. Accordingly, the multiplex communication apparatus 100B according to the present embodiment includes three local physical units as shown in FIG. 2 as the paths of the servo amplifiers /

motors

15, 16, the camera 17, and the

slaves

18, 19. There are layer PHY-

ICs

170B, 180B, 190B.

A LAN cable 20 for Ethernet (registered trademark) such as MECHATRLINK (registered trademark) -III is connected to the local physical layer PHY-IC 170B. A LAN cable 21 for Ethernet (registered trademark) such as TCP / IP and UDP is connected to the local physical layer PHY-IC 180B. A LAN cable 22 for Ethernet (registered trademark) such as EtherCAT (registered trademark) is connected to the local physical layer PHY-IC 190B.

With the above configuration, the

multiplex communication apparatuses

100A and 100B according to the present embodiment multiplex, for example, three lines of 100base-tx according to the Ethernet (registered trademark) standard GbE.

Conventionally, three lines of different standards that cannot be combined into one system (for LAN cable 20 for Ethernet (registered trademark) such as MECHATROJSLINK (registered trademark) -III, Ethernet (registered trademark) such as TCP / IP, UDP, etc.) LAN cable 21 and Ethernet (registered trademark) LAN cable 22 such as EtherCAT (registered trademark) are a single multiplexed communication cable 101, which is a single multiplexed communication line, and independent lines without analyzing the communication protocol. It is possible to multiplex without changing.

That is, the LAN cable 20 connected to the local-side physical layer PHY-

ICs

170A and 170B, the LAN cable 21 connected to the local-side physical layer PHY-ICs 180A and 180B, and the local-side physical layer PHY-

ICs

190A and 190B The connected LAN cables 22 are multiplexed independently.

[3. Multiplex communication protocol based on Ethernet (registered trademark) standard GbE]
When the PHY-

ICs

110A and 110B for the multi-side physical layer are 1000base-t PHY-ICs, the

multiplex communication apparatuses

100A and 100B according to the present embodiment perform transmission and reception using the half-duplex communication method. 3 and 4 show a multiplex communication protocol based on the Ethernet (registered trademark) standard GbE when the

multiplex communication apparatuses

100A and 100B (see FIG. 2) according to the present embodiment perform transmission and reception in the half duplex communication system. FIG.

3 and 4, the vertical axis represents the communication direction. FIG. 3 is a diagram showing a multiplex communication protocol of a half-duplex communication method for transmitting data from A area 2 to B area 3, but half-duplex for transmitting data from B area 3 to A area 2. The multiplex communication protocol of the communication method is not described. On the other hand, FIG. 4 shows a half-duplex communication protocol for transmitting data from B area 3 to A area 2, but transmits data from A area 2 to B area 3. The multiplex communication protocol of the half duplex communication system is not described.

When the PHY-

ICs

110A and 110B for the multi-side physical layer (see FIG. 2) are PHY-ICs for 1000 base-t, transmission / reception is performed with GMII (125 MHz * 8 BIT) which is the minimum unit of 1000 base-t. The 8 bits are represented by “B0”, “B1”, “B2”, “B3”, “B4”, “B5”, “B6”, “B7” arranged in the vertical axis in FIGS. The

In FIG. 3, the numerical values “0” to “14” arranged on the horizontal axis are the counter numbers of the clock (125 MHz, which is the same as that for the standard GbE) for performing multiplexed communication. Similarly, in FIG. 4, the numerical values “15” to “29” arranged on the horizontal axis are the counter numbers of the clock (125 MHz, which is the same as that for the standard GbE) for performing multiplexed communication.

3 and 4, the

multiplex communication apparatuses

100A and 100B (see FIG. 2) according to the present embodiment are the minimum unit of 100base-tx of 100base-tx according to the standard GbE of each local side Ethernet (registered trademark). Data transmission / reception is performed by adding a data presence / absence flag in units of 1 Nibble, 25 MHz, 4 BIT of an MII.

3 and 4, the data is represented by “MIIX-Y” where “X” is the line number and “Y” is the order in which the buffer is accumulated. The line number of “X” is any one of “1”, “2”, “3”, and the order of accumulation in the buffer of “Y” is “1”, “2”, “3”, “4”, It is either “5” or “6”. “MIIX-Y present / not present” is a flag indicating the presence / absence of data. “MIIX-Y present” indicates that “MIIX-Y” data is present. “No MIIX-Y” indicates that there is no data of “MIIX-Y”.

Note that “free” means that the data itself does not exist.

As shown in FIG. 3, at the start of communication with the counter numbers “0” and “1”, two preambles determined by the PHY-

ICs

110A and 110B for the multiplex side physical layer (see FIG. 2) are transmitted and received. When the number of counters is “14”, transmission and reception are switched, so that transmission is mutually turned off.

As shown in FIG. 4, for the last 15 times of the counter number “15” to “29”, communication is performed by switching the transmission / reception direction.

Generally, in each local side Ethernet (registered trademark) communication, transmission and reception are performed in units of packets, and when there is no necessary data, there is no communication state. However, there is at least no communication between IPG (Inter-PacketPackGap, MIN 12 bytes) between packets.

On the other hand, the PHY-

ICs

110A and 110B for the multiplex side physical layer (see FIG. 2) perform data transmission and reception at a fixed interval in order to multiplex with the minimum delay and jitter. For this reason, if there is no data to be transmitted to the local side and data that does not exist is transmitted to the local side, a communication error occurs. Therefore, as shown in FIG. 3 and FIG. 4, the data presence / absence flag information is added to each minimum unit of data, and MII 4-bit data is not output when there is no data.

[4. Multiplex communication protocol by SFP (5 Gbps)]
FIG. 5 shows multiplex communication when 1000 base-t 3 lines (CC-LinkIE (registered trademark), GigE_Vision (registered trademark), LAN line for PC)) are multiplexed with SFP (5 Gbps) in addition to 100 base-tx. It is a figure showing a protocol. In this case, as described above, an SFP (5 Gbps) optical transceiver is used instead of the PHY-IC 110B for the multi-side physical layer (see FIG. 2), which is the PHY-IC for 1000base-t. Further, an optical fiber is used as the multiplex communication cable 101 (see FIG. 2).

In FIG. 5, the vertical axis represents the communication direction. FIG. 5 is a diagram showing a multiplex communication protocol for transmitting data from the C factory to the D factory, and a diagram showing a multiplex communication protocol for transmitting data from the D factory to the C factory.

In contrast to MII-I / F data (25 MHz, 4 BIT) at 100 base-tx, GMII-I / F data (125 MHz, 8 BIT) is multiplexed as one unit at 1000 base-t. In FIG. 5, the 8 bits are represented by “B0” to “B7”, “B8” to “B15”, “B16” to “B23”, and “B24” to “B31” arranged on the vertical axis.

Furthermore, in FIG. 5, the numerical values “0” to “9” arranged on the horizontal axis are the counter numbers of clocks for performing multiplexed communication.

In FIG. 5, when “X” is the number of three lines (CC-LinkIE (registered trademark), GigE_Vision (registered trademark), LAN line for PC), the data is represented by “GMIIX”. The line number of “X” is any one of “1” of CC-Link IE (registered trademark), “2” of GigE_Vision (registered trademark), and “3” of the LAN line for PC. “With / without GMIIX” is a flag indicating whether data exists. “With GMIIX” indicates that there is data of “GMIIX”. “No GMIIX” indicates that there is no data of “GMIIX”.

In FIG. 5, “X” is the line number, and “Y” is the order of accumulation in the buffer, and the data is represented by “MIIX-Y”. The line number “X” includes “4” in addition to “1”, “2”, and “3” indicating the local sides. The order of accumulation in the “Y” buffer is either “1” or “2”. “MIIX-Y present / not present” is a flag indicating the presence / absence of data. “MIIX-Y present” indicates that “MIIX-Y” data is present. “No MIIX-Y” indicates that there is no data of “MIIX-Y”.

In particular, in FIG. 5, for MII4-1 and MII4-2, a Hamming code FEC (15, 11) shortening system, which is one of the forward error correction methods, is used to improve reliability. To do. This PORT is used for communication standards / uses that are difficult to retransmit.

In the case of SFP (5 Gbps) shown in FIG. 5, unlike the case of GbE shown in FIGS. 3 and 4, it is a full-duplex communication method, has no preamble, and has a high transfer rate. . Further, since an optical fiber is used as the multiplex communication cable 101 (see FIG. 2), a long distance (several kilometers) can be multiplexed.

[5. Summary]
In other words, in this embodiment, the bit positions are fixed on the multiplexed data before and after multiplexing for a plurality of ports (see FIGS. 3, 4 and 5), and a plurality of industrial Ethernet (registered) The trademark path (

reference numerals

1020, 1021, and 1022 in FIG. 6) can be wired by a single path (reference numeral 101 in FIG. 1).

Therefore, wiring can be saved. In this embodiment, the Ethernet (registered trademark) line is reduced between the A area 2 as the fixed part and the B area 3 as the movable part in the entire apparatus, or between different floors in the same factory. Is possible.

In the case of a long distance between the C factory and the D factory, in addition to the cable cost, the parts cost and construction cost necessary for laying can be reduced.

In the present embodiment, as shown in FIG. 2, the

multiplex communication devices

100A and 100B according to the present embodiment are inserted into the configuration of FIG. 6 described in the “Background Art” column, and two multiplex communication devices 100A are inserted. , 100B, standard LAN lines corresponding to the same numbered ports are connected.

When the

multiplex communication devices

100A and 100B according to the present embodiment are GbE (1000base-t) multiplex communication devices, 100base-tx is multiplexed up to 3 lines using the multiplex communication protocol shown in FIGS. Is possible.

In this embodiment, as shown in FIG. 3, FIG. 4 and FIG. 5, since the internal data is independent, there is an abnormality (for example, a LAN cable loop, virus infection, etc.) in one of a plurality of lines. ) Does not affect other lines at all.

Therefore, for example, even if an externally connected PC LAN line is infected with a virus, there is no influence on another line for controlling the apparatus and stable production can be achieved.

In this embodiment, as shown in FIG. 3, FIG. 4 and FIG. 5, since the multiplexing communication protocol is based on the minimum unit data, the delay time and the problem that are problematic in Industrial Ethernet (registered trademark) Jitter is small and has almost no effect.

Specifically, in a GbE multiplex communication apparatus, a one-way transfer is a delay of about 1.5 μs, and a jitter is about 240 ns (30 clocks for one transmission) (FIG. 3). (See FIG. 4). On the other hand, in the multiplex communication apparatus using the SFP, the delay is about 1.2 μs in one transfer in one direction, and the jitter is about 80 ns (at the time of one transmission with 10 clocks) (see FIG. 5). ).

Since multiplexing is performed without packet analysis as in the present embodiment, the physical layer of data in time for the communication speed (multi-side physical layer PHY-

ICs

110A, 110B, local-side physical layer PHY-

ICs

170A, 180A, 190A and local physical layer PHY-

ICs

170B, 180B, 190B) can be used to multiplex any standard industrial Ethernet (registered trademark), making difficult settings for multiplexing, creating configuration files, and releasing There are no timing delays and it can be used immediately.

When data communication is performed after performing a CRC check or the like on a packet basis as in the prior art, a delay corresponding to the amount of data in the frame is added, and in an industrial Ethernet (registered trademark) in which feedback control is performed, the delay is In some cases, it is large and does not operate normally. Also, if there is an identifier in the data, if the identifier is garbled, there is an effect on at least two lines. However, in this embodiment, as shown in FIG. 3, FIG. 4 and FIG. 5, since it is assigned to a fixed bit, even if garbled data occurs in the

multiplex processing units

160A and 160B, it is possible to cope with a plurality of ports. Is not mistaken.

[6. Others]
In addition, this invention is not limited to the said embodiment, A various change is possible in the range which does not deviate from the meaning.
For example, the standards for industrial Ethernet (registered trademark) based on 100base include MECHATRLINK (registered trademark) -III, EtherCAT (registered trademark), EtherNet / IP (registered trademark), Profinet (registered trademark), and Modbus (registered trademark). Trademark), TCP / IP, or FL-net.

As a standard of industrial Ethernet (registered trademark) based on 1000base, there is CC-LinkIE (registered trademark).

In addition, there is TCP / IP or UDP communication to which a PC that performs normal data transmission / reception is connected.

In this embodiment, when an optical fiber is used as the multiplex communication cable 101, an SFP optical transceiver is used. However, an SFF optical transceiver may be used.

1 Multiplex communication system 100A Multiplex communication device 100B Multiplex communication device 101 Multiplex communication cable 110A Multiplex side physical layer PHY-IC
110B PHY-IC for multiple physical layer
133A MII-I / F data output unit 134A Transmission buffer 133B MII-I / F data output unit 134B Transmission buffer 143A MII-I / F data output unit 144A Transmission buffer 143B MII-I / F data output unit 144B Transmission buffer 153A MII -I / F data output unit 154A Transmission buffer 153B MII-I / F data output unit

154B Transmission buffer

160A Multiplexing unit 160B Multiplexing unit

Claims

A multiplex communication apparatus for placing industrial Ethernet (registered trademark) signals of a plurality of ports on one transmission line,
Media independent interface, which is an internal interface between the logical layer and physical layer of data. The flag data presence / absence flag is attached to the minimum unit data, and the data is transmitted / received in the minimum unit, and multiplexing is performed while ensuring data continuity. A multiplex communication apparatus characterized by:
An optical transceiver used as the physical layer;
The multiplex communication apparatus according to claim 1, further comprising an optical fiber used as a multiplex communication wire harness.
A physical layer circuit for Ethernet (registered trademark) used as the physical layer;
The multiplex communication apparatus according to claim 1, further comprising a LAN line used as a multiplex communication wire harness.
A local output section;
A buffer, and
The multiplex communication apparatus according to claim 1, wherein the local output unit starts outputting data for the buffer after storing the number of data for continuous output in the buffer. .
The multiplex communication apparatus according to claim 1, wherein the plurality of ports are assigned to fixed bits on a multiplex communication protocol.
The multiplex communication apparatus according to claim 1, further comprising an FPGA as a device for performing the multiplexing process.