WO2016032479A1

WO2016032479A1 - Methods, systems, and devices for digital modulation

Info

Publication number: WO2016032479A1
Application number: PCT/US2014/053105
Authority: WO
Inventors: Bruce Henderson; Alan Carroll LOVELL
Original assignee: Ge Intelligent Platforms, Inc.
Priority date: 2014-08-28
Filing date: 2014-08-28
Publication date: 2016-03-03

Abstract

A system, according to various embodiments, can include an oscillator and a sine synthesizer. The oscillator creates an oscillating clock signal based on binary data representing information to be transmitted. The sine synthesizer creates a sequence of digital sine wave samples at a rate determined by the oscillating clock signal. The sine synthesizer digitally produces approximate solutions to difference equations representing a sine function and cosine function to create the sequence of digital sine wave samples.

Description

METHODS, SYSTEMS, AND DEVICES FOR DIGITAL HART MODULATION TECHNICAL FIELD

[0001] The present disclosure relates generally to communication. More particularly, the present disclosure relates to communication by modulation.

BACKGROUND

[0002] A Highway Addressable Remote Transducer (HART) protocol is a communication protocol designed for industrial process measurement and control applications. Field devices, such as pressure meters, flow meters, and other transducers often use a 4 to 20 mA current signal to represent a measured quantity also referred to as a process signal. The process signal normally has a low bandwidth from DC to several Hz (29 Hz according to the HART Communication Foundation standard). A host device measures the current in a field loop to which the field device and the host device are coupled.

[0003] Intelligent devices may also use modulation to communicate additional information. A HART modulator may be used for this purpose. The HART modulator produces a sine wave at one of two frequencies (1200 Hz and 2200 Hz) with continuous phase. This is a basic feature of the type of modulation, continuous-phase Frequency Shift Keying (FSK), which is used in all HART devices.

[0004] The FSK signal is added to the process signal by the transmitting modem and may be demodulated in the receiving modem. Generally, high impedance devices transmit using current modulation, and low impedance devices transmit using voltage modulation.

[0005] A sinusoidal oscillator theoretically which produces a sine wave can be implemented by an analog circuit which solves a pair of simultaneous differential equations, such as: cos(c t) = Ι/ω * d/dt(sin(c t)), and sin(c t) = -Ι/ω * d/dt(cos(c t)) where ω is the angular frequency, which is the rate of change of the sinusoidal waveform.

[0006] An example of an analog circuit which solves these equations is shown in FIG. 1. The circuit 100 includes integrators 125 A and 125B which integrate a cosine signal cos(c t) and a sine signal sin(c t), beginning from an initial condition (IC) of 0 and

-Ι/ω, respectively. Outputs of the integrators 125A and 125B are multiplied by ω and

-ω in multipliers 150A and 150B, respectively. The outputs of the multipliers 150A and 150B are input into the integrators 125B and 125A, respectively. In this manner, a sinusoidal signal may be produced. A severe problem with actually implementing such an oscillator is that its poles are exactly located on the imaginary axis. Hence, such a device would be very difficult to make stable.

[0007] A digital implementation of the oscillator shown in FIG. 1 would have a highly predictable behavior but would result in a round-off error. Thus, over time, the output of the digital oscillator would either decay to zero or grow without bound.

[0008] Other existing FSK modulators avoid the complexities of producing a real sine wave by generating a simple triangle wave and truncating the top of the triangle to produce a trapezoid shaped signal. Though this is permitted by the HART specification, a signal created in this manner creates high-frequency content in the spectrum of the modulation signal that may cause reduced performance of the downstream demodulator that receives the HART signal.

[0009] Other existing digital FSK modulators use a Direct Digital Synthesis (DDS) technique for synthesizing a sine wave. This technique requires a trigonometric lookup table to turn a phase angle value into a sine wave value.

[0010] Still other existing digital FSK modulators require a digital-to-analog converter (DAC) to turn a digital sequence of values into an analog HART signal. This adds to the cost and the complexity of the HART modulator. SUMMARY

[0011] In at least one embodiment, the present disclosure provides a system comprising an oscillator within a receiver configured to create an oscillating clock signal based on binary data representing information to be transmitted. A sine synthesizer within a transmitter creates a sequence of digital sine wave samples at a rate determined by the oscillating clock signal. The sine synthesizer digitally produces approximate solutions to difference equations representing a sine function and cosine function to create the sequence of digital sine wave samples. A modulator modulates the sequence of digital sine wave samples with a carrier frequency to create a high frequency bit stream. An analog filter is configured to low-pass filter the high frequency bit stream to create a continuously varying analog version of the sequence of digital sine wave samples.

[0012] In at least another embodiment, the present disclosure provides a method comprising: creating an oscillating clock signal based on binary data representing information to be transmitted; creating, by a digital sine synthesizer in a transmitter, a sequence of digital sine wave samples at a rate determined by the oscillating clock signal; creating the sequence of digital sine wave samples comprises digitally produced approximate solutions to difference equations representing a sine function and a cosine function; modulating the sequence of digital sine wave samples with a carrier frequency to create a high frequency bit stream; and low-pass filtering the high frequency bit stream with an analog filter to create a continuously varying analog version of the sequence of digital sine wave samples.

[0013] Further features and advantages, as well as the structure and operation of various embodiments, are described in detail below with reference to the accompanying drawings. It is noted that the disclosure is not limited to the specific embodiments described herein. Such embodiments are presented herein for illustrative purposes only. Additional embodiments will be apparent to persons skilled in the relevant art(s) based on the teachings contained herein. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Illustrative embodiments may take form in various components and arrangements of components. Illustrative embodiments are shown in the accompanying drawings, throughout which like reference numerals may indicate corresponding or similar parts in the various figures. The drawings are only for purposes of illustrating preferred embodiments and are not to be construed as limiting the disclosure. Given the following enabling description of the drawings, the novel aspects of the present disclosure should become evident to a person of ordinary skill in the art.

[0015] FIG. 1 illustrates an example of a conventional analog circuit used to produce a sine wave.

[0016] FIG. 2 illustrates an environment in which a digital HART modulator may be implemented, according to an illustrative embodiment.

[0017] FIG. 3 illustrates a digital modulator according to an illustrative embodiment.

[0018] FIG. 4 illustrates a method for producing a digitally modulated signal according to an illustrative embodiment.

DETAILED DESCRIPTION

[0019] While illustrative embodiments are described herein for particular applications, it should be understood that the invention is not limited thereto. Those skilled in the art with access to the teachings provided herein will recognize additional modifications, applications, and embodiments within the scope thereof and additional fields in which the modulator design described herein would be of significant utility.

[0020] Alternative embodiments, examples, and modifications which would still be encompassed by the disclosure may be made by those skilled in the art, particularly in light of the foregoing teachings. Further, it should be understood that the terminology used to describe the disclosure is intended to be in the nature of words of description rather than of limitation. [0021] FIG. 2 illustrates an environment in which a digital HART modulator may be implemented, according to an illustrative embodiment. Referring to FIG. 2, a field device 200A communicates with a host device 200B via a field wiring 250. The field device 200A converts a measurement taken, e.g., by a sensor, to a 4 to 20 mA process current signal via an amplifier 215A and a low pass filter 220A. The process current signal is modulated with a sinusoidal signal produced by a HART modulator 21 OA via a summer 225 A.

[0022] The modulated current signal is conducted over the field wiring 250. The coupling of the modulated current signal to the field wiring is modeled as current source 230A in FIG. 2. The current signal conducted over the field wiring 250 is detected by an amplifier 260B in the host device 200B as a voltage across a resistor RL included in the field wiring 250. The detected voltage signal is converted into a digital signal by a digital ADC (not shown in this figure for simplicity of illustration). The process signal representing the sensor measurement is then extracted by a digital filter 265B, and the modulated signal is extracted and demodulated by a digital HART demodulator 270B to produce the encoded binary data.

[0023] Similarly, binary data on the host side 200B is converted to a sinusoidal signal by a modulator 210B and filtered by a filter 215B. The modulated signal is then coupled to the field wiring 250 by a voltage modulator (VM) 230B. The modulated signal is detected as a voltage signal by the amplifier 260B on field side. Although not shown in the interest of simplicity, the detected signal is converted to a digital signal by an ADC. The converted signal is filtered by a filter 265A and demodulated by a digital HART demodulator 270A to produce the encoded binary data.

[0024] The digital HART modulators 21 OA and 210B are illustrated in FIG. 2 in the context of 4 to 20 mA input or output hardware (interfaces). The left half of FIG. 2 shows a field device 200A with a 4 to 20 mA current output, and the right half shows a host device 200B with a 4 to 20 mA input. It should be appreciated that these are just two examples of an application of the digital HART modulator. [0025] The digital HART modulator described herein performs digital sine wave synthesis with simple circuitry and logic that produces a well-formed sine wave and is able to

instantaneously switch between two frequencies with no phase discontinuity. This is achieved by exploiting a simple digital approximation to solving the difference equations representing a sine function and a cosine function components with a very small logic footprint. It should be appreciated that the digital HART modulator described herein may be implemented with discrete components in, e.g., a field programmable gate array (FPGA) ,or may be part of an integrated circuit, such as an application specific integrated circuit (ASIC).

[0026] An overview of a digital modulator according to an illustrative embodiment is shown in FIG. 3. According to an illustrative embodiment, the digital modulator 300 includes a Numerically Controlled Oscillator (NCO) 320 which produces an NCO clock signal based on a master clock and binary data to be encoded and transmitted as a modulated signal. The NCO 320 produces an oscillating clock signal which has a frequency equal to either 50 * 1200 Hz = 60 KHz or 50 * 2200 Hz = 1 10 KHz depending on whether a Ί ' or a '0' is to be transmitted, respectively.

[0027] The NCO clock input is delivered to a sine synthesizer 340 to aid in the generation of a digital sine wave samples. Details of the sine synthesizer 340 are shown and described below with reference to FIG. 4.

[0028] The sine synthesizer 340 digitally produces approximate solutions to difference equations representing a sine function and a cosine function to produce digital sine wave samples. The sine function and the cosine function solved by the sine synthesizer 340 may be given as: sin^* (cot) = sin (cot) + 1/8 cos(cot) , and cos^*(cot) = cos(cot) - 1/8 sin(cot) where sin^*(c t) and cos^*(c t) represent "new" sine and cosine values for a current clock cycle, and sin(c t) and cos(c t) represent "old" sine and cosine values for the most recent clock cycle.

[0029] According to an illustrative embodiment, a Delta-Sigma digital-to-analog converter (DAC) 360 is used to convert the sequence of digital sine wave samples to a high-frequency bit stream. The Delta-Sigma DAC 360, using a master clock input, encodes the change (or delta) in the sequence of digital sine wave samples, rather than the absolute value of each of the digital sine wave samples. This results in a bit stream. This bit stream, when passed through a simple low-pass filter 380, e.g., a passive RC filter, is smoothed to produce an analog HART signal which can then be used to modulate a voltage applied to a standard 4-20 mA current loop.

[0030] According to an illustrative embodiment, the synthesized half-cycle sine wave is converted to a complete bipolar sine wave. This feature makes use of the fact that performing a 1-bit logic inversion on the bit stream output of the Delta Sigma DAC 360, using, e.g., a logic inverter 370, effectively negates the average value of the signal. This inversion takes place on every other half cycle of the sine wave so that the synthesized HART signal is truly bipolar.

[0031] According to an illustrative embodiment, every other half cycle is inverted as to obtain a full bipolar sinusoid. Each of the 50 samples comprising the sine wave cycle represents a constant 7.2 degrees of phase angle. This phase increment is constant regardless of the frequency needed. By controlling the clock input, the rate at which the difference equations are solved determines the frequency of the output sine wave produced. Instantaneous changes made to the clock input cause an instantaneous change to the frequency while avoiding a phase discontinuity as required by the FSK modulation used in HART communication devices.

[0032] According to the illustrative embodiment, the difference equations solved by the digital implementation, disclosed herein, produce a sequence of digital values that are an approximation of the half cycle of a sine wave. When a sign change (i.e. polarity reversal) in the digital values occurs, this is an indicator to reset the integrators back to initial conditions. This sign change is used to mitigate the problems of round-off and drift errors that typically occur in the digital domain.

[0033] According to illustrative embodiments, the digital modulator described herein provides increased accuracy and stability of the frequencies generated when compared to conventional analog implementations. Also, no separate digital to analog converter is required. In addition, according to illustrative embodiments, a purer sine wave is produced compared to previous implementations which produced a truncated triangle approximation to a sine wave. The design may be implemented with simplified circuitry needing only a small programmable logic device and a passive low pass filter.

[0034] FIG. 4 illustrates a method for producing a digitally modulated signal according to an illustrative embodiment. The method 400 begins with receiving binary data and clock signals, e.g., by the NCO 320, at step 410. At step 420, the NCO 320 creates and outputs a NCO clock signal. At step 430, a sequence of digital sine wave samples is created based on the NCO clock signal, e.g., by the sine synthesizer 340. At step 440, the sequence of digital sine wave samples is converted to a high frequency bit stream, e.g., by the Delta-Sigma DAC 360. At step 450, the high frequency bit stream is converted to an analog high frequency sinusoidal signal, e.g., an FSK signal, by the inverter 370 and the low pass analog filter 380. At step 460, a signal on a field wiring between a receiver, e.g., the host device 200B, and a transmitter, e.g., the field device 200A, is modulated with the high frequency analog signal, e.g., by the VM 230B.

[0035] According to illustrative embodiments, a digital modulator is provided that produces HART tones with a very stable frequency and a purer spectral content compared to conventional digital demodulators. This leads to improved performance. In addition, the digital modulator described herein may be realized with only a modest logic footprint in a programmable logic device. No analog components, other than a low pass filter, e.g., an RC filter, are required. This leads to very low cost and a very simple design which may be implemented with digital components that may be programmed using hardware description language (HDL), e.g., Verilog HDL. This design is robust and substantially free from concerns about component obsolescence.

[0036] The all-digital implementation described here relies only on a very stable 25 MHz clock oscillator which is already typically used elsewhere in a host device or field device. The digital HART modulator described herein produces a clean sine wave which has a low spectral content outside the HART frequency band. No lookup table is required to produce a sine wave. Rather, difference equations are solved to generate trigonometric cosine and sine values and determine the length of a half cycle. Only a simple analog low pass filter is needed to strip out the high frequency master clock from the output of the Delta-Sigma DAC, leaving only the pure sine wave.

[0037] Those skilled in the art will also appreciate that various adaptations and modifications of the preferred and alternative embodiments described above can be configured without departing from the scope and spirit of the disclosure. Therefore, it is to be understood that, within the scope of the appended claims, the disclosure may be practiced other than as specifically described herein.

Claims

CLAIMS: What Is Claimed Is:

1. A method comprising: creating an oscillating clock signal based on binary data representing information to be transmitted; creating, by a digital sine synthesizer in a transmitter, a sequence of digital sine wave samples at a rate determined by the oscillating clock signal; creating the sequence of digital sine wave samples comprises digitally produced approximate solutions to difference equations representing a sine function and a cosine function; modulating the sequence of digital sine wave samples with a carrier frequency to create a high frequency bit stream; and low-pass filtering the high frequency bit stream with an analog filter to create a continuously varying analog version of the sequence of digital sine wave samples.

2. The method of claim 1, further comprising modulating a signal with an analog high frequency sinusoidal signal and the signal is a voltage signal across terminals of a field loop to which the receiver and the transmitter are coupled.

3. The method of claim 2, wherein the sequence of digital sine wave samples that correspond to the binary data correspond to a half-cycle of the analog high frequency sinusoidal signal.

4. The method of claim 3, further comprising forming a complete period with the high frequency bit stream comprises inverting the high frequency bit stream such that every other half-cycle of the sequence of digital sine wave samples is inverted to produce a full cycle of sinusoidal signal.

5. The method of claim 4, wherein low-pass filtering the high frequency bit stream produces the analog high frequency sinusoidal signal.

6. The method of claim 2, wherein the analog high frequency sinusoidal signal is a frequency shift keyed (FSK) signal, and the signal on the field loop is modulated with the FSK signal according to a Highway Addressable Remote Transducer (HART) standard.

7. A system comprising: an oscillator within a receiver configured to create an oscillating clock signal based on binary data representing information to be transmitted; a sine synthesizer within a transmitter configured to create a sequence of digital sine wave samples at a rate determined by the oscillating clock signal; the sine synthesizer configured to digitally produce approximate solutions to difference equations representing a sine function and cosine function to create the sequence of digital sine wave samples; a modulator configured to modulate the sequence of digital sine wave samples with a carrier frequency to create a high frequency bit stream; an analog filter configured to low-pass filter the high frequency bit stream to create a continuously varying analog version of the sequence of digital sine wave samples.

8. The system of claim 7, wherein the modulator modulates a signal with an analog high frequency sinusoidal signal and the signal is a voltage signal across terminals of a field loop to which the receiver and the transmitter are connected.

9. The system of claim 8, wherein the sequence of digital sine wave samples that correspond to the binary data correspond to a half-cycle of the analog high frequency sinusoidal signal.

10. The system of claim 7, further comprising an inverter configured to form a complete period with the high frequency bit stream by inverting the high frequency bit stream, such that every other half-cycle of the sequence of digital sine wave samples is inverted to produce a full cycle of sinusoidal signal.

11. The system of claim 10, further comprising a low-pass filter configured to filter the high frequency bit stream to produce the analog high frequency sinusoidal signal.

12. The system of claim 8, wherein the analog high frequency sinusoidal signal is a frequency shift keyed (FSK) signal, and the signal on the field loop is modulated with the FSK signal according to a Highway Addressable Remote Transducer (HART) standard.

13. A device comprising: a digital oscillator within a receiver configured to create an oscillating clock signal based on binary data representing information to be transmitted; a digital sine synthesizer within the transmitter configured to create a sequence of digital sine wave samples at a rate determined by the oscillating clock signal; the digital sine synthesizer configured to digitally produce approximate solutions to difference equations representing a sine function and cosine function to create the sequence of digital sine wave samples; a digital modulator configured to modulate the sequence of digital sine wave samples with a carrier frequency to create a high frequency bit stream; and an analog filter configured to low-pass filter the high frequency bit stream to create a continuously varying analog version of the sequence of digital sine wave samples.

14. The device of claim 13, wherein the modulator modulates a signal with an analog high frequency sinusoidal signal and the signal is a voltage signal across terminals of a field loop to which the receiver and the transmitter are connected.

15. The device of claim 14, wherein the sequence of digital sine wave samples that correspond to the binary data correspond to a half-cycle of the analog high frequency sinusoidal signal.

16. The device of claim 14, further comprising an inverter configured to form a complete period with the high frequency bit stream by inverting the high frequency bit stream, such that every other half-cycle of the sequence of digital sine wave samples is inverted to produce a full cycle of sinusoidal signal.

17. The device of claim 14, wherein the analog high frequency sinusoidal signal is a frequency shift keyed (FSK) signal, and the signal on the field loop is modulated with the FSK signal according to a Highway Addressable Remote Transducer (HART) standard.