WO2016011968A1

WO2016011968A1 - Two-way-interlaced pfc current balancing circuit and air conditioner

Info

Publication number: WO2016011968A1
Application number: PCT/CN2015/084942
Authority: WO
Inventors: 胡作平; 卓森庆; 游剑波; 周伟; 李超
Original assignee: 珠海格力电器股份有限公司
Priority date: 2014-07-23
Filing date: 2015-07-23
Publication date: 2016-01-28
Also published as: CN104113202A

Abstract

A two-way-interlaced power factor correction (PFC) current balancing circuit and an air conditioner. The circuit comprises: a first sampling resistor (RS1), wherein a first end of the first sampling resistor is connected to a first end of a rectifying circuit; a first branch, composed of a first switch tube (Q1) and a first inductor (L1); and a second branch, comprising a second switch tube (Q2), a second sampling resistor (RS2) and a second inductor(L2). A first end of the second inductor is connected to a first end of the first inductor, a second end of the second inductor is connected to the first end of the second switch tube, the second end of the second switch tube is connected to a first end of the second sampling resistor, and a second end of the second sampling resistor is connected to a second end of the first sampling resistor. The circuit reduces the number of sampling circuits, so that the circuit is simple, and sampling loss is reduced.

Description

Two-way interleaved PFC current balancing circuit and air conditioner

Technical field

The present invention relates to the field of electronic circuits, and in particular to a two-way interleaved PFC current balancing circuit and an air conditioner.

Background technique

1 is a schematic structural diagram of a two-way interleaved PFC current balancing circuit according to the prior art. As shown in FIG. 1, the existing two-way interleaved PFC current balancing circuit mostly adopts a three-way sampling circuit, that is, respectively RS1', RS2' and RS3' to sample the total current and two single currents to achieve the purpose of controlling the PWM drive and the two PFC current balance, but the existing circuit has many sampling devices, large loss, low efficiency and The disadvantage of high cost.

Aiming at the problem that the two-way interleaved PFC current balancing circuit has many sampling devices and large loss in the prior art, an effective solution has not been proposed yet.

Summary of the invention

Aiming at the problem that the two-way interleaved PFC current balancing circuit has many sampling devices and large loss in the related art, an effective solution has not been proposed yet. For this reason, the main object of the present invention is to provide a two-way interleaved PFC current balancing circuit and Air conditioner to solve the above problems.

In order to achieve the above object, according to an aspect of the present invention, a two-way interleaved PFC current balancing circuit is provided, the circuit comprising: a first sampling resistor, the first end of the first sampling resistor being connected to the first end of the rectifying circuit The first branch is composed of a first switch tube and a first inductor, wherein the first end of the first inductor is connected to the second end of the rectifier circuit, the first end of the first switch tube and the second end of the first inductor The second end of the first switch is connected to the second end of the first sampling resistor; the second branch includes a second switch, a second sampling resistor and a second inductor, wherein the first of the second inductor The end is connected to the first end of the first inductor, the second end of the second inductor is connected to the first end of the second switch tube, and the second end of the second switch tube is connected to the first end of the second sampling resistor, the second A second end of the sampling resistor is coupled to the second end of the first sampling resistor.

Optionally, the two-way interleaved PFC current balancing circuit further includes: a first operational amplifier circuit connected to the first sampling resistor for amplifying the voltage signal generated on the first sampling resistor to obtain a first amplified signal; the first signal The processor is coupled to the first operational amplifier circuit for determining a total current flowing through the first sampling resistor by the first amplified signal.

Optionally, the first signal processor includes: a first sampling circuit connected to the first operational amplifier circuit, configured to acquire a first amplified signal through the I/O port; and a first current calculator connected to the first sampling circuit, A method is used to calculate a total current flowing through the first sampling resistor using the first amplified signal.

Optionally, the two-way interleaved PFC current balancing circuit further includes: a second operational amplifier circuit connected to the second sampling resistor, configured to amplify the voltage signal generated on the second sampling resistor to obtain a second amplified signal; and the second signal The processor is coupled to the second operational amplifier circuit for determining a first phase current flowing through the second sampling resistor by the second amplified signal.

Optionally, the second signal processor includes: a second sampling circuit connected to the second operational amplification circuit for acquiring the second amplified signal through the I/O port; and a second current calculator connected to the second sampling circuit, And for calculating a first phase current flowing through the second sampling resistor using the second amplified signal.

Optionally, the third end of the first switch tube is connected to the first driving circuit for receiving the first PWM signal of the first driving circuit; the third end of the second switching tube is connected to the second driving circuit for receiving a second PWM signal of the second driver circuit.

Optionally, the two-way interleaved PFC current balancing circuit further includes: a controller, respectively connected to the first current calculator and the second current calculator, configured to determine the first branch according to the total current and the first phase current Two-phase current.

Optionally, the two-way interleaved PFC current balancing circuit further includes: a filter capacitor, the first end of the filter capacitor is connected to the second end of the first inductor, and the first end of the filter capacitor is further connected to the second end of the second inductor The second end of the filter capacitor is connected to the second end of the first sampling resistor; the load resistor, the first end of the load resistor is connected to the first end of the filter capacitor, and the second end of the load resistor is connected to the second end of the filter capacitor .

Optionally, the two-way interleaved PFC current balancing circuit further includes: a first diode, the first diode is connected between the first inductor and the filter capacitor; and the second diode is connected to the second diode Between the second inductor and the filter capacitor.

In order to achieve the above object, according to another aspect of the present invention, an air conditioner including the above-described two-way interleaved PFC current balancing circuit is also provided.

With the embodiment of the present invention, only two sampling resistors (eg, a first sampling resistor and a second sampling resistor) are used in the circuit, and no sampling resistor is provided in the first branch, and the above circuit is compared with the existing three-way. The sampling circuit not only eliminates the RS3 one-way current sampling circuit (as shown in Figure 2 below), reduces the sampling device, makes the circuit implementation simpler, and also reduces the conversion efficiency of one sampling resistor, which can make the conversion efficiency of PFC Higher The two-way interleaved PFC current balancing circuit in the prior art solves the problem of large sampling device and large loss, realizes reducing the number of sampling circuits, makes the circuit simple, and reduces the effect of sampling loss.

DRAWINGS

The drawings described herein are intended to provide a further understanding of the invention, and are intended to be a part of the invention. In the drawing:

1 is a schematic structural view of a two-way interleaved PFC current balancing circuit according to the prior art;

2 is a schematic structural diagram of a two-way interleaved PFC current balancing circuit according to an embodiment of the present invention;

3 is a schematic diagram of an operation mode when a current is small according to an embodiment of the present invention;

Fig. 4 is a schematic view showing the operation mode when the current is large in the embodiment of the present invention.

detailed description

It should be noted that the embodiments in the present application and the features in the embodiments may be combined with each other without conflict. The invention will be described in detail below with reference to the drawings in conjunction with the embodiments.

2 is a block diagram showing the structure of a two-way interleaved PFC current balancing circuit in accordance with an embodiment of the present invention. As shown in FIG. 2, the circuit may include: a first sampling resistor RS1, a first end of the first sampling resistor is connected to the first end of the rectifier circuit; and the first branch is formed by the first switching transistor Q1 and the first inductor L1 The first end of the first switch is connected to the second end of the rectifier circuit, the first end of the first switch is connected to the second end of the first inductor, and the second end of the first switch is connected to the first sample The second end of the first inductor is connected to the first end of the first inductor, and the second end of the second inductor is connected to the first end of the first inductor. The second end of the second inductor is connected to the first end of the second switch tube, the second end of the second switch tube is connected to the first end of the second sampling resistor, and the second end of the second sampling resistor is connected to the first sampling resistor The second end is connected.

With the embodiment of the present invention, only two sampling resistors (first sampling resistor and second sampling resistor) are used in the circuit, and no sampling resistor is provided in the first branch, and the above circuit is compared with the existing three-way sampling circuit. It not only eliminates the RS3' current sampling circuit, but also reduces the sampling device, which makes the circuit more simple to implement. At the same time, it also reduces the loss on the sampling resistor and makes the conversion efficiency of the PFC higher. In the technology, the two-way interleaved PFC current balancing circuit has many sampling devices and large loss, and the circuit number of the sampling circuit is reduced, the circuit is simple, and the sampling loss effect is reduced.

Through the above embodiments of the present invention, since the control circuit used in the circuit is simpler and lower in cost, and because the loss on the sampling resistor is reduced, the purpose of making the conversion efficiency of the PFC higher can be achieved.

In the embodiment shown in FIG. 2, RS1 and RS2 in FIG. 2 are the sampling resistance of the total current and the sampling resistance of the PFC current of the secondary phase (ie, the second branch). By the relationship shown by the formula I _total = I _{main phase} + I _subphase , only need to know the two parameters in the formula, the third parameter can be calculated based on this relationship. Wherein, I is _always the current on RS1 in the above embodiment, that is, the total current; the I _subphase is the current on the second sampling resistor, which is the first phase current; the I _{main phase} is the current of the first branch, This is the second phase current.

In the above embodiment of the present invention, the two-way interleaved PFC current balancing circuit may further include: a first operational amplifier circuit connected to the first sampling resistor for amplifying the voltage signal generated on the first sampling resistor to obtain the first Amplifying the signal; the first signal processor is coupled to the first operational amplifier circuit for determining a total current flowing through the first sampling resistor by the first amplified signal.

Specifically, the first signal processor may include: a first sampling circuit connected to the first operational amplification circuit for acquiring the first amplified signal through the I/O port; and a first current calculator connected to the first sampling circuit, A method is used to calculate a total current flowing through the first sampling resistor using the first amplified signal.

In an optional embodiment of the present invention, the two-way interleaved PFC current balancing circuit may further include: a second operational amplifier circuit connected to the second sampling resistor for amplifying the voltage generated on the second sampling resistor The signal obtains a second amplified signal; the second signal processor is coupled to the second operational amplifier circuit for determining a first phase current flowing through the second sampling resistor by the second amplified signal.

Further, the second signal processor may include: a second sampling circuit connected to the second operational amplification circuit for acquiring the second amplified signal through the I/O port; and a second current calculator connected to the second sampling circuit, And for calculating a first phase current flowing through the second sampling resistor using the second amplified signal.

In the above embodiment of the present invention, the first operational amplification circuit and the second operational amplification circuit may be the same operational amplification circuit, and the first signal processor and the second signal processor may be the same signal processor, and the first operation The amplifying circuit (and/or the second operational amplifying circuit) and the first signal processor (and/or the second signal processor) may be integrated on the circuit board.

It should be further noted that the two-way interleaved PFC current balancing circuit may further include: a controller respectively connected to the first current calculator and the second current calculator for using the above principle (ie, by formula I _total =I The relationship shown by the _{main phase} + I _subphase ) determines the second phase current of the first branch based on the total current and the first phase current.

In the above embodiment of the present invention, the third end of the first switch tube is connected to the first driving circuit for receiving the first PWM signal of the first driving circuit; the third end of the second switching tube and the second driving circuit Connected to receive a second PWM signal of the second driver circuit.

As shown in FIG. 2, the two-way interleaved PFC current balancing circuit may further include: a filter capacitor C, the first end of the filter capacitor is connected to the second end of the first inductor, and the first end of the filter capacitor is further connected to the second inductor The second end is connected, the second end of the filter capacitor is connected to the second end of the first sampling resistor; the load resistor RL, the first end of the load resistor is connected to the first end of the filter capacitor, and the second end of the load resistor and the filter capacitor The second end of the connection.

The above filter capacitor not only functions as a filter but also functions to store electrical energy.

Further, as shown in FIG. 2, the two-way interleaved PFC current balancing circuit may further include: a first diode D1, the first diode is connected between the first inductor and the filter capacitor; and the second diode D2 The second diode is connected between the second inductor and the filter capacitor.

The first diode and the second diode described above can block the discharge DC of the capacitor C and prevent the switch tube from being short-circuited.

The present invention will be described in detail below with reference to FIGS. 3 and 4.

Fig. 3 is a schematic view showing the operation mode when the current is small in the embodiment of the present invention. Fig. 4 is a schematic view showing the operation mode when the current is large in the embodiment of the present invention.

As shown in Fig. 3, in the case where the PFC current is small, only the main phase PFC (ie, the first branch) operates, and the subphase PFC (ie, the second branch) does not work, thereby ensuring the lowest comprehensive loss of the PFC. At this time, the secondary phase PFC current is zero, the current of the main phase PFC is equal to the total current of the PFC, that is, I _total = I _{main phase} , and the _{main phase} can be obtained by detecting the total current of the PFC (ie, detecting the current of the first sampling resistor). PFC current.

Specifically, the PFC total current passes through the sampling resistor RS1 to form a small voltage signal on the RS1, and is amplified by the first operational amplifier circuit, and then sent to the chip I/O port for AD sampling (ie, the first signal in the above embodiment). Processor), get the rms value (effective value) of the PFC current: I _{main phase} .

As shown in Fig. 4, when the PFC current is large, the main phase PFC and the subphase PFC work simultaneously, thereby ensuring the lowest comprehensive loss in the circuit. At this time, the current relationship is: I _total = I _{main phase} + I _subphase .

Specifically, the secondary phase PFC current is calculated by detecting the conduction current of the switch tube, and the switch tube current first passes through the second sampling resistor RS2 to form a discontinuous small voltage signal on the second sampling resistor, and is further amplified by the second operation. The circuit is subjected to voltage amplification, and then sent to the chip I/O port for AD sampling (sampled by the second sampling circuit of the second signal processor), and the sampled switch current is subjected to root mean square calculation to obtain the secondary phase. Root mean square value (effective value) of PFC current: I _{secondary phase} .

Through the detected PFC total current and subphase current, the main phase current of PFC can be accurately calculated: I _{main phase} = I _{total -} I _subphase .

After the first phase current and the second phase current are obtained, the magnitudes of the two phase currents are compared by a comparator, and when the comparator determines that one of the phase PFC currents is larger than the other phase current, the first driving circuit is controlled. And a second driving circuit to adjust the first PWM signal and/or the second PWM signal. Specifically, the PWM duty ratio of the PFC of the phase can be reduced by trimming, and the current is gradually reduced until it is equal to the current of the other phase, and vice versa, the PWM duty cycle is increased to achieve the purpose of two-phase current balancing.

The present invention also provides an air conditioner, which may include a two-way interleaved PFC current balancing circuit of any of the above embodiments.

With the embodiment of the present invention, only two sampling resistors (a first sampling resistor and a second sampling resistor) are used in the circuit, and no sampling resistor is provided in the first branch, and the above circuit is compared with the existing three-way sampling circuit. It not only eliminates the RS3 one-way current sampling circuit (as shown in Figure 2 below), reduces the sampling device, and the circuit is simpler to implement. At the same time, it also reduces the loss on the sampling resistor and makes the conversion efficiency of the PFC higher. The two-way interleaved PFC current balancing circuit in the prior art has many sampling devices and large loss, and realizes reducing the number of sampling circuits, making the circuit simple, and reducing the effect of sampling loss.

From the above description, it can be seen that the present invention achieves the following technical effects:

With the embodiment of the present invention, only two sampling resistors (first sampling resistor and second sampling resistor) are used in the circuit, and no sampling resistor is provided in the first branch, and the above circuit is compared with the existing three-way sampling circuit. The RS3 one-way current sampling circuit is omitted (as shown in Figure 2 below), the sampling device is reduced, the circuit is simpler to implement, and the conversion efficiency of the PFC is higher because the loss on one sampling resistor is reduced. The two-way interleaved PFC current balancing circuit in the prior art solves the problem of large sampling device and large loss, realizes reducing the number of sampling circuits, makes the circuit simple, and reduces the effect of sampling loss.

The calculator, the processor and the various components constituting the processor or calculation to be protected by the present invention are all physical products having a certain shape, configuration and occupying a certain space. For example, a microprocessor, a signal processor, a sub-processor, etc. are all computer devices, terminals or servers that can operate independently and have a specific hardware structure.

The above description is only the preferred embodiment of the present invention, and is not intended to limit the present invention, and various modifications and changes can be made to the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and scope of the present invention are intended to be included within the scope of the present invention.

Claims

A two-way interleaved PFC current balancing circuit, comprising:

a first sampling resistor, the first end of the first sampling resistor is connected to the first end of the rectifier circuit;

The first branch is composed of a first switch tube and a first inductor, wherein the first end of the first inductor is connected to the second end of the rectifier circuit, and the first end of the first switch tube is The second end of the first inductor is connected, and the second end of the first switch is connected to the second end of the first sampling resistor;

The second branch includes a second switch, a second sampling resistor, and a second inductor, wherein the first end of the second inductor is coupled to the first end of the first inductor, and the second inductor is The second end is connected to the first end of the second switch tube, the second end of the second switch tube is connected to the first end of the second sampling resistor, and the second end of the second sampling resistor is The second end of the first sampling resistor is connected.
The two-way interleaved PFC current balancing circuit according to claim 1, wherein the two-way interleaved PFC current balancing circuit further comprises:

a first operational amplifier circuit connected to the first sampling resistor for amplifying a voltage signal generated on the first sampling resistor to obtain a first amplified signal;

a first signal processor coupled to the first operational amplifier circuit for determining a total current flowing through the first sampling resistor by the first amplified signal.
The two-way interleaved PFC current balancing circuit according to claim 2, wherein the first signal processor comprises:

a first sampling circuit, connected to the first operational amplifier circuit, for collecting the first amplified signal through an I/O port;

a first current calculator coupled to the first sampling circuit for calculating a total current flowing through the first sampling resistor using the first amplified signal.
The two-way interleaved PFC current balancing circuit according to claim 1, wherein the two-way interleaved PFC current balancing circuit further comprises:

a second operational amplifier circuit, coupled to the second sampling resistor, for amplifying a voltage signal generated on the second sampling resistor to obtain a second amplified signal;

a second signal processor coupled to the second operational amplifier circuit for determining a first phase current flowing through the second sampling resistor by the second amplified signal.
The two-way interleaved PFC current balancing circuit according to claim 4, wherein the second signal processor comprises:

a second sampling circuit is connected to the second operational amplifier circuit for collecting the second amplified signal through an I/O port;

a second current calculator coupled to the second sampling circuit for calculating a first phase current flowing through the second sampling resistor using the second amplified signal.
The two-way interleaved PFC current balancing circuit according to any one of claims 1 to 5, characterized in that

The third end of the first switch tube is connected to the first driving circuit for receiving the first PWM signal of the first driving circuit;

The third end of the second switch tube is connected to the second driving circuit for receiving the second PWM signal of the second driving circuit.
The two-way interleaved PFC current balancing circuit according to claim 6, wherein the two-way interleaved PFC current balancing circuit further comprises:

The controller is respectively connected to the first current calculator and the second current calculator for determining the second phase current of the first branch according to the total current and the first phase current.
The two-way interleaved PFC current balancing circuit according to any one of claims 1 to 5, wherein the two-way interleaved PFC current balancing circuit further comprises:

a filter capacitor, the first end of the filter capacitor is connected to the second end of the first inductor, and the first end of the filter capacitor is further connected to the second end of the second inductor, and the filter capacitor is The two ends are connected to the second end of the first sampling resistor;

And a load resistor, the first end of the load resistor is connected to the first end of the filter capacitor, and the second end of the load resistor is connected to the second end of the filter capacitor.
The two-way interleaved PFC current balancing circuit according to claim 8, wherein the two-way interleaved PFC current balancing circuit further comprises:

a first diode, the first diode being connected between the first inductor and the filter capacitor;

a second diode connected between the second inductor and the filter capacitor.
An air conditioner comprising the two-way interleaved PFC current balancing circuit according to any one of claims 1 to 9.