WO2016006464A1 - Calibration circuit and receiver - Google Patents

Calibration circuit and receiver Download PDF

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Publication number
WO2016006464A1
WO2016006464A1 PCT/JP2015/068337 JP2015068337W WO2016006464A1 WO 2016006464 A1 WO2016006464 A1 WO 2016006464A1 JP 2015068337 W JP2015068337 W JP 2015068337W WO 2016006464 A1 WO2016006464 A1 WO 2016006464A1
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WIPO (PCT)
Prior art keywords
signal
circuit
control code
output terminal
detector
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PCT/JP2015/068337
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French (fr)
Japanese (ja)
Inventor
トァン タン タ
明秀 崔
英徳 大國
雅則 古田
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株式会社 東芝
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Publication of WO2016006464A1 publication Critical patent/WO2016006464A1/en

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/56Modifications of input or output impedances, not otherwise provided for
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189High frequency amplifiers, e.g. radio frequency amplifiers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45Differential amplifiers

Definitions

  • Embodiment relates to calibration of input impedance of a differential amplifier.
  • the first calibration technique is to measure, for example, the reflected power while changing the control code of the variable impedance element, and search for a control code that minimizes the reflected power.
  • the second calibration technique is to measure the amplitude of the output signal of the amplifier while changing the control code of the variable impedance element, and search for the control code that maximizes the amplitude.
  • the first calibration technique requires an expensive network analyzer to measure the reflected power with high accuracy. Therefore, the first calibration technique is unsuitable for simultaneously calibrating a large number of amplifiers, so that the productivity is low. Furthermore, since the first calibration technique cannot be applied after the product is shipped, it cannot compensate for deterioration of the amplifier due to a change in usage environment and aging.
  • the accuracy of the second calibration technique depends on the voltage stability of the amplifier input signal. Therefore, in order to achieve high accuracy in the second calibration technique, an expensive measurement system is required. Furthermore, since the amplitude change of the output signal of the amplifier is small with respect to the change of the control code, a highly sensitive amplitude detection circuit is required according to the second calibration technique. A high-sensitivity amplitude detection circuit has a larger design load and is more susceptible to external influences (for example, influence of manufacturing process, temperature, voltage, etc.) than a low-sensitivity detection circuit. In addition, the amplitude of the output signal of the amplifier does not change monotonously with changes in the control code. Therefore, since the second calibration technique cannot use a high-speed search algorithm such as a binary search method, the time required for calibration is long.
  • Embodiment is aimed at efficiently calibrating the input impedance of a differential amplifier.
  • the calibration circuit includes a single-phase differential conversion circuit, a first detector, a second detector, a comparison unit, and a control circuit.
  • the single-phase differential conversion circuit has an input terminal, a first output terminal, and a second output terminal, includes an impedance variable element whose impedance changes depending on the control code, and converts the single-phase input signal to a differential output signal And convert.
  • the first detector is connected to the first output terminal of the single-phase differential conversion circuit, and generates a first detection signal by detecting the first detector input signal.
  • the second detector is connected to the second output terminal of the single-phase differential conversion circuit, and generates a second detection signal by detecting the second detector input signal.
  • the comparison unit compares the voltage of the first detection signal and the voltage of the second detection signal, and generates a comparison result signal indicating the comparison result.
  • the control circuit searches for a desired control code by setting the control code to a plurality of different values and analyzing the correspondence relationship between the set control code and the corresponding comparison result signal.
  • FIG. 1 is a block diagram illustrating a calibration circuit according to a first embodiment.
  • FIG. 2 is a circuit diagram illustrating the single-phase differential conversion circuit of FIG. 1.
  • the graph which illustrates the change of
  • the graph which illustrates the change of (V2-V3) with respect to the change of a control code.
  • the block diagram which illustrates the calibration circuit concerning a 2nd embodiment.
  • the graph which illustrates the change of V32 / V33 with respect to the change of a control code.
  • the block diagram which illustrates the receiver concerning a 5th embodiment.
  • the block diagram which illustrates the calibration circuit concerning a 4th embodiment.
  • the graph which illustrates the change of (V2-V3 + VDO ) and (V3-V2 + VDO ) with respect to the change of a control code.
  • the graph which illustrates the change of the comparison result signal with respect to the change of a control code.
  • the calibration circuit 100 in FIG. 1 functions as a part of the wireless receiver.
  • the calibration circuit 100 has an input terminal, a first output terminal, and a second output terminal.
  • the input terminal of the calibration circuit 100 is connected to the antenna 20.
  • the first output terminal and the second output terminal of the calibration circuit 100 are respectively connected to the non-inverting input terminal and the inverting input terminal of the differential amplifier 30 as a low noise amplifier (LNA).
  • LNA low noise amplifier
  • the calibration circuit 100 converts the single-phase input signal into a differential output signal and outputs the differential output signal to the differential amplifier 30.
  • the input terminal of the calibration circuit 100 is directly or indirectly connected to the external signal source 10.
  • the input terminal of the calibration circuit 100 may be disconnected from the antenna 20 and connected to the signal source 10, or the antenna 20 receives a radio signal radiated from the signal source 10 and calibrates the received radio signal. You may supply to the input terminal of the circuit 100.
  • FIG. The calibration circuit 100 calibrates the input impedance of the differential amplifier 30 using the single-phase input signal supplied from the signal source 10.
  • the calibration circuit 100 includes a single-phase differential conversion circuit 110, a detector 120, a detector 130, a comparison unit 140, and a matching control circuit 150.
  • the single-phase differential conversion circuit 110 has an input terminal, a first output terminal, a second output terminal, and a control terminal.
  • the input terminal of the single phase differential conversion circuit 110 is connected to the input terminal of the calibration circuit 100.
  • the first output terminal of the single-phase differential conversion circuit 110 is commonly connected to the input terminal of the detector 120 and the first output terminal of the calibration circuit 100.
  • the second output terminal of the single-phase differential conversion circuit 110 is commonly connected to the input terminal of the detector 130 and the second output terminal of the calibration circuit 100.
  • the control terminal of the single phase differential conversion circuit 110 is connected to the output terminal of the matching control circuit 150.
  • the single-phase differential conversion circuit 110 includes an impedance variable element.
  • the impedance of the variable impedance element changes depending on a control code input via the control terminal of the single-phase differential conversion circuit 110.
  • the single-phase differential conversion circuit 110 converts a single-phase input signal into a differential output signal.
  • the differential output signal includes a first output signal output via the first output terminal and a second output signal output via the second output terminal.
  • the single-phase differential conversion circuit 110 may include an inductor 111, an inductor 112, an inductor 113, and a variable capacitor 114, for example, as shown in FIG.
  • the inductor 111 has a first terminal and a second terminal.
  • the first terminal of the inductor 111 is connected in common to the input terminal of the single-phase differential conversion circuit 110 and the first terminal of the inductor 113.
  • the second terminal of the inductor 111 is connected in common to the first output terminal of the single-phase differential conversion circuit 110 and the first terminal of the variable capacitor 114.
  • the inductor 112 has a first terminal and a second terminal.
  • the first terminal of the inductor 112 is connected to the second terminal of the inductor 113.
  • the second terminal of the inductor 112 is connected to the second output terminal of the single-phase differential conversion circuit 110 and the second terminal of the capacitor 114.
  • the inductance of the inductor 112 is equal to the inductance of the inductor 111.
  • the inductor 113 has a first terminal and a second terminal.
  • the first terminal of the inductor 113 is connected in common to the input terminal of the single-phase differential conversion circuit 110 and the first terminal of the inductor 111.
  • the second terminal of the inductor 113 is connected to the first terminal of the inductor 112.
  • the variable capacitor 114 has a first terminal and a second terminal.
  • the first terminal of the variable capacitor 114 is connected in common to the first output terminal of the single-phase differential conversion circuit 110 and the second terminal of the inductor 111.
  • the second terminal of the variable capacitor 114 is connected in common to the second output terminal of the single-phase differential conversion circuit 110 and the second terminal of the inductor 112.
  • the inductor 113 and the variable capacitor 114 act so that the first output signal and the second output signal of the single-phase differential conversion circuit 110 become differential signals.
  • variable capacitor 114 corresponds to the aforementioned variable impedance element. That is, the capacitance of the variable capacitor 114 changes depending on the control code input via the control terminal of the single-phase differential conversion circuit 110.
  • variable capacitor 114 may be replaced with various variable impedance elements including a variable inductor.
  • the variable impedance element may be a plurality of inductors whose connections can be switched using a switch.
  • the variable impedance element may include an inductor, a ferrite, and a mechanism that can change a relative positional relationship between the inductor and the ferrite.
  • the detector 120 has an input terminal and an output terminal.
  • the input terminal of the detector 120 is commonly connected to the first output terminal of the single-phase differential conversion circuit 110 and the first output terminal of the calibration circuit 100.
  • the output terminal of the detector 120 is connected to the first input terminal of the comparison unit 140.
  • the detector 120 obtains the first detection signal by detecting the first output signal (first detector input signal) of the single-phase differential conversion circuit 110.
  • the first detection signal indicates the amplitude of the first output signal.
  • the detector 130 has an input terminal and an output terminal.
  • the input terminal of the detector 130 is connected in common to the second output terminal of the single-phase differential conversion circuit 110 and the second output terminal of the calibration circuit 100.
  • the output terminal of the detector 130 is connected to the second input terminal of the comparison unit 140.
  • the detector 130 detects the second output signal (second detector input signal) of the single-phase differential conversion circuit 110 to obtain a second detection signal.
  • the second detection signal indicates the amplitude of the second output signal.
  • the comparison unit 140 has a first input terminal, a second input terminal, and an output terminal.
  • the first input terminal of the comparison unit 140 is connected to the output terminal of the detector 120.
  • the second input terminal of the comparison unit 140 is connected to the output terminal of the detector 130.
  • the output terminal of the comparison unit 140 is connected to the input terminal of the matching control circuit 150.
  • the comparison unit 140 receives the first detection signal and the second detection signal from the detector 120 and the detector 130, and compares these voltages.
  • the comparison unit 140 outputs a comparison result signal indicating the comparison result to the matching control circuit 150.
  • the comparison result signal may indicate (V2-V3) itself or its sign, or V2 / V3 may be It may be indicated, (V3-V2) itself or its sign may be indicated, or V3 / V2 may be indicated.
  • the matching control circuit 150 has an input terminal and an output terminal. The input terminal of the matching control circuit 150 is connected to the output terminal of the comparison unit 140. The output terminal of the matching control circuit 150 is connected to the control terminal of the single-phase differential conversion circuit 110.
  • the matching control circuit 150 outputs a control code for controlling the impedance of the variable impedance element included in the single-phase differential conversion circuit 110 to the single-phase differential conversion circuit 110. More specifically, the matching control circuit 150 sets the control code to a plurality of different values when the input impedance of the differential amplifier 30 is calibrated. Then, the matching control circuit 150 receives a comparison result signal corresponding to the set control code from the comparison unit 140 and stores it in association with the control code. The matching control circuit 150 searches for an optimal (ie, desired) control code by analyzing a correspondence relationship between the stored control code and the comparison result signal. The optimum control code can be defined as a value that minimizes the reflected power at the input terminal of the single-phase differential conversion circuit 110, for example.
  • FIG. 3 exemplifies changes in
  • FIG. 4 illustrates the change in
  • represents the absolute value of the ratio of the reflected power to the incident power at the input terminal of the single-phase differential conversion circuit 110.
  • is the optimal control code. According to the examples of FIGS. 3 and 4,
  • V2 / V3 (and V3 / V2) change monotonously with respect to the control code.
  • V2-V3) (and (V3-V2)) also changes monotonously with respect to the control code. Therefore, the matching control circuit 150 can search for an optimal control code in a short time by using a high-speed search algorithm such as a binary search method.
  • step S3 the matching control circuit 150 determines whether A and B are adjacent integers (that is,
  • 1). If A and B are adjacent integers, the process proceeds to step S8. Otherwise, the process proceeds to step S4.
  • step S4 the matching control circuit 150 sets an integer C obtained by applying a floor function to the average value of the variables A and B as shown in the following formula (1) in the control code (V2 ⁇ The value or sign of V3) is stored.
  • step S8 the matching control circuit 150 determines an optimal control code. Specifically, at the start of step S8, optimal control code candidate values are assigned to variable A and variable B, respectively. That is, one is the optimal control code and the other is the second most suitable control code. If the matching control circuit 150 cannot acquire the absolute value of (V2-V3), it is impossible to determine the superiority or inferiority of the two candidate values. Therefore, the matching control circuit 150 determines one of the two candidate values as an optimal control code. On the other hand, if the matching control circuit 150 can acquire the absolute value of (V2-V3), it is possible to determine the superiority or inferiority of the two candidate values. For example, the matching control circuit 150 may determine a candidate value that minimizes the absolute value of (V2-V3) as an optimal control code.
  • the matching control circuit 150 can search for an optimal control code in a short time. Specifically, assuming that the total number of values that can be set in the control code is N, the matching control circuit 150 sets the control code over the number of times I shown in the following formula (2). The optimal control code can be searched.
  • the search process has a greater effect of reducing the search time as N increases.
  • the larger N is, the finer the input impedance of the differential amplifier 30 can be adjusted, so that the performance of the differential amplifier 30 can be further extracted.
  • the impedance matching frequency is a narrow band and the input impedance of the differential amplifier 30 needs to be calibrated over a wide band, an optimum control code is searched in a short time. be able to.
  • the calibration circuit calibrates the input impedance of the differential amplifier based on the differential output signal from the single-phase differential conversion circuit connected to the previous stage of the differential amplifier. If the input impedance is calibrated based on the differential amplification signal from the differential amplifier, a high power input signal cannot be used to avoid saturation of the differential amplification signal. On the other hand, since the calibration process of the input impedance is not affected by the saturation of the differential amplification signal, this calibration circuit can use a high-power input signal. That is, since the difference voltage between the two input signals of the comparison unit can be sufficiently increased, the input impedance can be accurately calibrated.
  • the calibration accuracy of the input impedance hardly depends on the absolute value of the output power in the external signal source, it is possible to meet the demand for the stability of the output power even if an inexpensive signal source is used. Furthermore, by dividing the signal generated by this signal source into a large number of signals with an inexpensive power distributor, the input impedances of a large number of differential amplifier circuits can be calibrated simultaneously.
  • the calibration circuit 200 in FIG. 6 functions as a part of the wireless receiver.
  • the calibration circuit 200 has an input terminal, a first output terminal, and a second output terminal.
  • the input terminal of the calibration circuit 200 is connected to the antenna 20.
  • the first output terminal and the second output terminal of the calibration circuit 200 are respectively connected to the non-inverting input terminal and the inverting input terminal of the differential amplifier 30 as the LNA.
  • the calibration circuit 200 converts the single-phase input signal into a differential output signal and outputs the differential output signal to the differential amplifier 30.
  • the input terminal of the calibration circuit 200 is directly or indirectly connected to the external signal source 10.
  • the input terminal of the calibration circuit 200 may be disconnected from the antenna 20 and connected to the signal source 10, or the antenna 20 receives a radio signal radiated from the signal source 10 and calibrates the received radio signal. You may supply to the input terminal of the circuit 200.
  • FIG. The calibration circuit 200 calibrates the input impedance of the differential amplifier 30 using the single-phase input signal supplied from the signal source 10.
  • the calibration circuit 200 includes a single-phase differential conversion circuit 110, a detector 120, a detector 130, a comparison unit 140, a matching control circuit 150, a single-phase amplifier 260, and a single-phase amplifier 270.
  • the comparison unit 140 and the matching control circuit 150 may be the same as or similar to the comparison unit 140 and the matching control circuit 150 of FIG.
  • the single-phase differential conversion circuit 110 has a first output terminal connected to the input terminal of the single-phase amplifier 260 instead of the input terminal of the detector 120 and the first output terminal of the calibration circuit 100, and the second 1 is different from the single-phase differential conversion circuit 110 in FIG. 1 in that the output terminal is connected to the input terminal of the single-phase amplifier 270 instead of the input terminal of the detector 130 and the second output terminal of the calibration circuit 100.
  • the detector 120 has the input terminal connected to the output terminal of the single-phase amplifier 260 instead of the first output terminal of the single-phase differential conversion circuit 110 and the first output terminal of the calibration circuit 100, as shown in FIG. Different from the vessel 120.
  • the detector 130 has the input terminal connected to the output terminal of the single-phase amplifier 270 instead of the second output terminal of the single-phase differential conversion circuit 110 and the second output terminal of the calibration circuit 100, as shown in FIG. Different from the vessel 130.
  • the single phase amplifier 260 has an input terminal and an output terminal.
  • the input terminal of the single phase amplifier 260 is connected to the first output terminal of the single phase differential conversion circuit 110.
  • the output terminal of the single phase amplifier 260 is commonly connected to the input terminal of the detector 120 and the first output terminal of the calibration circuit 200.
  • the single-phase amplifier 260 receives the first output signal from the single-phase differential conversion circuit 110 and amplifies it to obtain a first amplified signal.
  • Single phase amplifier 260 outputs the first amplified signal to detector 120.
  • Single phase amplifier 270 has an input terminal and an output terminal.
  • the input terminal of the single phase amplifier 270 is connected to the second output terminal of the single phase differential conversion circuit 110.
  • the output terminal of the single phase amplifier 270 is connected in common to the input terminal of the detector 130 and the second output terminal of the calibration circuit 200.
  • the single-phase amplifier 270 receives the second output signal from the single-phase differential conversion circuit 110 and amplifies it to obtain a second amplified signal.
  • Single phase amplifier 270 outputs the second amplified signal to detector 130.
  • the calibration circuit according to the second embodiment inserts a single-phase amplifier between each output terminal of the single-phase differential conversion circuit and each detector. Therefore, according to this calibration circuit, the parasitic component of each detector can be separated from each output terminal of the single-phase differential conversion circuit, and the input impedance of the differential amplifier connected to the subsequent stage of the calibration circuit can be accurately calibrated. it can.
  • the calibration circuit 300 in FIG. 7 functions as a part of the wireless receiver.
  • the calibration circuit 300 has an input terminal, a first output terminal, and a second output terminal.
  • the input terminal of the calibration circuit 300 is connected to the antenna 20.
  • the first output terminal and the second output terminal of the calibration circuit 300 are respectively connected to the non-inverting input terminal and the inverting input terminal of the differential amplifier 30 as the LNA.
  • the calibration circuit 300 converts the single-phase input signal into a differential output signal and outputs the differential output signal to the differential amplifier 30.
  • the calibration circuit 300 drives an internal current signal source as will be described later.
  • the calibration circuit 300 calibrates the input impedance of the differential amplifier 30 using the current signal supplied from the current signal source.
  • the antenna 20 may be connected to the input terminal of the calibration circuit 300 or disconnected at the time of calibration.
  • the calibration circuit 300 includes a single-phase differential conversion circuit 110, a detector 120, a detector 130, a comparison unit 140, a matching control circuit 150, and a current signal source 380.
  • the detector 130, the comparison unit 140, and the matching control circuit 150 may be the same as or similar to the detector 130, the comparison unit 140, and the matching control circuit 150 of FIG.
  • the single-phase differential conversion circuit 110 is different from the single-phase differential conversion circuit 110 of FIG. 1 in that the first output terminal is further connected to the output terminal of the current signal source 380.
  • the detector 120 is different from the detector 120 of FIG. 1 in that the input terminal is further connected to the output terminal of the current signal source 380.
  • the current signal source 380 has an output terminal.
  • the output terminal of the current signal source 380 is commonly connected to the first output terminal of the single-phase differential conversion circuit 110, the input terminal of the detector 120, and the first output terminal of the calibration circuit 300.
  • the current signal source 380 is driven when the input impedance of the differential amplifier 30 is calibrated to generate a current signal.
  • the current signal source 380 injects a current signal into the first output terminal of the single-phase differential conversion circuit 110.
  • the current signal source 380 includes an oscillator 381 and a voltage / current converter 382.
  • the oscillator 381 is driven when the input impedance of the differential amplifier 30 is calibrated and generates an oscillation signal.
  • the oscillator 381 outputs an oscillation signal to the voltage / current converter 382.
  • the voltage / current converter 382 obtains the current signal by performing voltage / current conversion on the oscillation signal.
  • the single-phase differential conversion circuit 110 When the current signal is injected into the first output terminal of the single-phase differential conversion circuit 110, the single-phase differential conversion circuit 110 outputs the first output signal described above via the first output terminal. The second output signal described above is output through the two output terminals. Then, the detector 120 and the detector 130 obtain a first detection signal and a second detection signal, respectively.
  • the calibration circuit according to the third embodiment includes the current signal source therein. Therefore, according to the calibration circuit, the input impedance of the differential amplifier connected to the subsequent stage of the calibration circuit can be calibrated using the current signal source. That is, since the deterioration of the differential amplifier due to changes in the usage environment and aging can be compensated for, it can be expected that the usage environment of the differential amplifier will be expanded and the life thereof extended.
  • the calibration circuit according to the present embodiment may correspond to a configuration in which the current signal source 380 is added to the calibration circuit 200 of FIG.
  • the output terminal of the current signal source 380 may be connected to the preceding stage rather than the subsequent stage of the single-phase amplifier 260.
  • the calibration circuit 500 in FIG. 10 functions as a part of the wireless receiver.
  • the calibration circuit 500 has an input terminal, a first output terminal, and a second output terminal.
  • the input terminal of the calibration circuit 500 is connected to the antenna 20.
  • the first output terminal and the second output terminal of the calibration circuit 500 are respectively connected to the non-inverting input terminal and the inverting input terminal of the differential amplifier 30 as the LNA.
  • the calibration circuit 500 converts the single-phase input signal into a differential output signal and outputs the differential output signal to the differential amplifier 30.
  • the input terminal of the calibration circuit 500 is directly or indirectly connected to the external signal source 10.
  • the input terminal of the calibration circuit 400 may be disconnected from the antenna 20 and connected to the signal source 10, or the antenna 20 receives a radio signal radiated from the signal source 10 and calibrates the received radio signal. You may supply to the input terminal of the circuit 400.
  • FIG. The calibration circuit 500 calibrates the input impedance of the differential amplifier 30 using the single-phase input signal supplied from the signal source 10.
  • Calibration circuit 500 includes a single-phase differential conversion circuit 110, a detector 120, a detector 130, a comparison unit 540, a matching control circuit 550, and a switching circuit 590.
  • the detector 120 is different from the detector 120 of FIG. 1 in that the output terminal is connected to the first input terminal of the switching circuit 590 instead of the first input terminal of the comparison unit 140.
  • the detector 130 is different from the detector 130 of FIG. 1 in that the output terminal is connected to the second input terminal of the switching circuit 590 instead of the second input terminal of the comparison unit 140.
  • the switching circuit 590 has a first input terminal, a second input terminal, a first output terminal, and a second output terminal.
  • the first input terminal of the switching circuit 590 is connected to the output terminal of the detector 120.
  • the second input terminal of the switching circuit 590 is connected to the output terminal of the detector 130.
  • the first output terminal of the switching circuit 590 is connected to the first input terminal of the comparison unit 540.
  • the second output terminal of the switching circuit 590 is connected to the second input terminal of the comparison unit 540.
  • the switching circuit 590 has a first operation state and a second operation state.
  • the switching circuit 590 short-circuits between the first input terminal and the first output terminal during the first period in the first operation state, and between the second input terminal and the second output terminal. Short circuit.
  • the switching circuit 590 short-circuits between the first input terminal and the second output terminal in the second period in the second operation state, and the second input terminal and the first output terminal Short-circuit between the two.
  • the comparison unit 540 has a first input terminal, a second input terminal, and an output terminal.
  • the first input terminal of the comparison unit 540 is connected to the first output terminal of the switching circuit 590.
  • the second input terminal of the comparison unit 540 is connected to the second output terminal of the switching circuit 590.
  • the output terminal of the comparison unit 540 is connected to the input terminal of the matching control circuit 550.
  • the comparison unit 540 compares the first voltage (V inp ) applied to the first input terminal and the second voltage (V inm ) applied to the second input terminal. Comparison unit 540 outputs a comparison result signal indicating the comparison result to matching control circuit 550. However, the comparison unit 540 has a DC offset (V DO ). As this DC offset (V DO ), a basic DC offset depending on the basic circuit configuration of the comparison unit 540 may be used as it is. If the basic DC offset is not an appropriate magnitude, this is intentionally used. You may adjust.
  • the comparison unit 540 generates a comparison result signal (V out ) represented by the following mathematical formula (3).
  • Equation (3) Sgn (•) is a sign function and returns the sign of •. That is, in the first period in which the switching circuit 590 is in the first operation state, the comparison result signal indicates the sign of (V2 ⁇ V3 + V DO ). On the other hand, in the second period in which the switching circuit 590 is in the second operation state, the comparison result signal indicates the sign of (V3 ⁇ V2 + V DO ).
  • Matching control circuit 550 has an input terminal and an output terminal.
  • the input terminal of the matching control circuit 550 is connected to the output terminal of the comparison unit 140.
  • the output terminal of the matching control circuit 550 is connected to the control terminal of the single-phase differential conversion circuit 110.
  • Matching control circuit 550 outputs a control code for controlling the impedance of the variable impedance element included in single-phase differential conversion circuit 110 to single-phase differential conversion circuit 110. More specifically, when the input impedance of the differential amplifier 30 is calibrated, the matching control circuit 550 includes a first period in which the switching circuit 590 is in the first operation state and a second period in which the switching circuit 590 is in the second operation state. Each of the control codes is set to a plurality of different values. Then, the matching control circuit 550 receives a comparison result signal corresponding to the set control code from the comparison unit 540 and stores it in association with the control code. The matching control circuit 550 searches for an optimal control code by analyzing the correspondence between the stored control code and the comparison result signal. The optimum control code is, for example, a value that minimizes the absolute value of the difference between the voltage of the first detection signal and the voltage of the second detection signal.
  • FIG. 11 illustrates changes in (V2 ⁇ V3 + V DO ) and (V3 ⁇ V2 + V DO ) with respect to changes in the control code.
  • V DO 50 mV is set.
  • the optimal control code 19.
  • the matching control circuit 550 includes one or more matching result signals obtained in the first period in which the switching circuit 590 is in the first operation state and the second period in which the switching circuit 590 is in the second operation state.
  • a control code (“18”, “19”, “20” in the example of FIG. 12) is extracted.
  • the matching control circuit 550 determines the median value (“19” in the example of FIG. 12) in the extracted control code as the optimal control code.
  • the total number of extracted control codes is usually an odd number.
  • an even number of control codes may be extracted due to the influence of noise or the like.
  • matching control circuit 550 may determine a value obtained by applying a floor function or a ceiling function to the median value of the extracted control codes as a control code. .
  • the calibration circuit according to the fourth embodiment includes a first period in which two detection signals are input as they are to a comparison unit having a DC offset and a second period in which these detection signals are interchanged. The change of the comparison result signal is analyzed over each. Then, the calibration circuit determines an optimal control code from the control codes in which the signs indicated by the comparison result signals match in the first period and the second period. Therefore, according to this calibration circuit, an optimum control code can be searched with high accuracy regardless of the basic DC offset depending on the basic circuit configuration of the comparison unit. Furthermore, according to this calibration circuit, the comparison unit is not required to have the ability to detect the absolute value of the difference voltage between the two input signals.
  • the receiver according to the fifth embodiment includes the calibration circuit according to any of the first to fourth embodiments described above, and can configure the input impedance of the differential amplifier as the LNA.
  • the receiver according to the present embodiment includes an antenna 20, a calibration circuit 400, a differential amplifier 30, and a demodulator 40, as illustrated in FIG.
  • the antenna 20 receives an RF signal transmitted by a transmission device (not shown).
  • the antenna 20 outputs an RF signal to the calibration circuit 400.
  • the calibration circuit 400 obtains a differential output signal from the RF signal as a single-phase input signal.
  • the calibration circuit 400 supplies the differential output signal to the differential amplifier 30.
  • the calibration circuit 400 corresponds to the calibration circuit according to any of the first to fourth embodiments described above. That is, when the input impedance of the differential amplifier 30 is calibrated, the calibration circuit 400 searches for an optimal control code for the variable impedance element not shown in FIG.
  • the differential amplifier 30 inputs a differential output signal from the calibration circuit 400.
  • the differential amplifier 30 obtains a differential amplified signal by amplifying the differential output signal.
  • the differential amplifier 30 outputs the differential amplified signal to the demodulator 40.
  • the demodulator 40 obtains received data by down-converting and demodulating the differential amplified signal.
  • the receiver according to the fifth embodiment includes the calibration circuit according to any of the first to fourth embodiments described above. Therefore, according to this receiver, the input impedance of the differential amplifier as the LNA can be calibrated efficiently.

Abstract

According to an embodiment of the present invention, a calibration circuit comprises a first detector, a second detector, a comparison unit, and a control circuit. The first detector is connected to a first output terminal of a single-phase differential conversion circuit, and generates a first detection signal by detecting a first detector input signal. The second detector is connected to a second output terminal of the single-phase differential conversion circuit, and generates a second detection signal by detecting a second detector input signal. The comparison unit compares a voltage of the first detection signal and a voltage of the second detection signal, and generates a comparison result signal indicating the comparison result. The control circuit sets a control code to a plurality of different values, and searches for a desired control code by analyzing the correspondence between the set control code and the comparison result signal corresponding to the set control code.

Description

校正回路および受信機Calibration circuit and receiver
 実施形態は、差動増幅器の入力インピーダンスの校正に関する。 Embodiment relates to calibration of input impedance of a differential amplifier.
 増幅器の入力インピーダンスの従来の校正技法は2種類に大別できる。第1の校正技法は、インピーダンス可変素子の制御コードを変化させながら例えば反射電力を測定し、当該反射電力を最小化させる制御コードを探索することである。第2の校正技法は、インピーダンス可変素子の制御コードを変化させながら増幅器の出力信号の振幅を測定し、当該振幅を最大化させる制御コードを探索することである。 Conventional calibration techniques for amplifier input impedance can be broadly classified into two types. The first calibration technique is to measure, for example, the reflected power while changing the control code of the variable impedance element, and search for a control code that minimizes the reflected power. The second calibration technique is to measure the amplitude of the output signal of the amplifier while changing the control code of the variable impedance element, and search for the control code that maximizes the amplitude.
 第1の校正技法は、反射電力を高精度に測定するために高コストなネットワークアナライザが必要となる。故に、第1の校正技法は、多数の増幅器の校正を一斉に行うのに不向きであるから生産性が低い。さらに、第1の校正技法は、製品出荷後に適用することが不可能であるから、使用環境の変化および経年などによる増幅器の劣化を補償することはできない。 The first calibration technique requires an expensive network analyzer to measure the reflected power with high accuracy. Therefore, the first calibration technique is unsuitable for simultaneously calibrating a large number of amplifiers, so that the productivity is low. Furthermore, since the first calibration technique cannot be applied after the product is shipped, it cannot compensate for deterioration of the amplifier due to a change in usage environment and aging.
 第2の校正技法は、その精度が増幅器の入力信号の電圧の安定性に依存する。故に、第2の校正技法において高い精度を達成するためには、高コストな測定系が必要となる。さらに、制御コードの変化に対して増幅器の出力信号の振幅変化は小さいので、第2の校正技法によれば高感度な振幅検出回路が必要である。高感度な振幅検出回路は、低感度なものに比べて設計負荷が大きいうえ外的な影響(例えば、製造プロセス、温度、電圧などの影響)を受けやすい。加えて、制御コードの変化に対して増幅器の出力信号の振幅は単調には変化しない。故に、第2の校正技法は、例えばバイナリ探索法などの高速な探索アルゴリズムを利用することができないから、校正に要する時間が長い。 The accuracy of the second calibration technique depends on the voltage stability of the amplifier input signal. Therefore, in order to achieve high accuracy in the second calibration technique, an expensive measurement system is required. Furthermore, since the amplitude change of the output signal of the amplifier is small with respect to the change of the control code, a highly sensitive amplitude detection circuit is required according to the second calibration technique. A high-sensitivity amplitude detection circuit has a larger design load and is more susceptible to external influences (for example, influence of manufacturing process, temperature, voltage, etc.) than a low-sensitivity detection circuit. In addition, the amplitude of the output signal of the amplifier does not change monotonously with changes in the control code. Therefore, since the second calibration technique cannot use a high-speed search algorithm such as a binary search method, the time required for calibration is long.
 実施形態は、差動増幅器の入力インピーダンスを効率的に校正することを目的とする。 Embodiment is aimed at efficiently calibrating the input impedance of a differential amplifier.
 実施形態によれば、校正回路は、単相差動変換回路と、第1の検波器と、第2の検波器と、比較部と、制御回路とを含む。単相差動変換回路は、入力端子、第1の出力端子および第2の出力端子を持ち、インピーダンスが制御コードに依存して変化するインピーダンス可変素子を含み、単相入力信号を差動出力信号へと変換する。第1の検波器は、単相差動変換回路の第1の出力端子に接続され、第1の検波器入力信号を検波することによって第1の検波信号を生成する。第2の検波器は、単相差動変換回路の第2の出力端子に接続され、第2の検波器入力信号を検波することによって第2の検波信号を生成する。比較部は、第1の検波信号の電圧および第2の検波信号の電圧を比較し、比較結果を示す比較結果信号を生成する。制御回路は、制御コードを複数の異なる値に設定し、設定された制御コードとこれに対応する比較結果信号との対応関係を分析することによって所望の制御コードを探索する。 According to the embodiment, the calibration circuit includes a single-phase differential conversion circuit, a first detector, a second detector, a comparison unit, and a control circuit. The single-phase differential conversion circuit has an input terminal, a first output terminal, and a second output terminal, includes an impedance variable element whose impedance changes depending on the control code, and converts the single-phase input signal to a differential output signal And convert. The first detector is connected to the first output terminal of the single-phase differential conversion circuit, and generates a first detection signal by detecting the first detector input signal. The second detector is connected to the second output terminal of the single-phase differential conversion circuit, and generates a second detection signal by detecting the second detector input signal. The comparison unit compares the voltage of the first detection signal and the voltage of the second detection signal, and generates a comparison result signal indicating the comparison result. The control circuit searches for a desired control code by setting the control code to a plurality of different values and analyzing the correspondence relationship between the set control code and the corresponding comparison result signal.
第1の実施形態に係る校正回路を例示するブロック図。1 is a block diagram illustrating a calibration circuit according to a first embodiment. 図1の単相差動変換回路を例示する回路図。FIG. 2 is a circuit diagram illustrating the single-phase differential conversion circuit of FIG. 1. 制御コードの変化に対する|S11|およびV2/V3の変化を例示するグラフ。The graph which illustrates the change of | S11 | and V2 / V3 with respect to the change of the control code. V2/V3の変化に対する|S11|の変化を例示するグラフ。The graph which illustrates the change of | S11 | with respect to the change of V2 / V3. 制御コードの変化に対する(V2-V3)の変化を例示するグラフ。The graph which illustrates the change of (V2-V3) with respect to the change of a control code. 第2の実施形態に係る校正回路を例示するブロック図。The block diagram which illustrates the calibration circuit concerning a 2nd embodiment. 第3の実施形態に係る校正回路を例示するブロック図。The block diagram which illustrates the calibration circuit concerning a 3rd embodiment. 制御コードの変化に対するV32/V33の変化を例示するグラフ。The graph which illustrates the change of V32 / V33 with respect to the change of a control code. 第5の実施形態に係る受信機を例示するブロック図。The block diagram which illustrates the receiver concerning a 5th embodiment. 第4の実施形態に係る校正回路を例示するブロック図。The block diagram which illustrates the calibration circuit concerning a 4th embodiment. 制御コードの変化に対する(V2-V3+VDO)および(V3-V2+VDO)の変化を例示するグラフ。The graph which illustrates the change of (V2-V3 + VDO ) and (V3-V2 + VDO ) with respect to the change of a control code. 制御コードの変化に対する比較結果信号の変化を例示するグラフ。The graph which illustrates the change of the comparison result signal with respect to the change of a control code.
 以下、図面を参照しながら実施形態の説明が述べられる。尚、以降、説明済みの要素と同一または類似の要素には同一または類似の符号が付され、重複する説明は基本的に省略される。 Hereinafter, embodiments will be described with reference to the drawings. Hereinafter, the same or similar elements as those already described are denoted by the same or similar reference numerals, and redundant description is basically omitted.
 (第1の実施形態) 
 第1の実施形態に係る校正回路の具体例が図1に示される。図1の校正回路100は、無線受信機の一部として機能する。校正回路100は、入力端子、第1の出力端子および第2の出力端子を持つ。校正回路100の入力端子は、アンテナ20に接続される。校正回路100の第1の出力端子および第2の出力端子は、低雑音増幅器(LNA)としての差動増幅器30の非反転入力端子および反転入力端子にそれぞれ接続される。校正回路100は、単相入力信号を差動出力信号へと変換し、当該差動出力信号を差動増幅器30へと出力する。差動増幅器30の入力インピーダンスの校正時に、校正回路100の入力端子は外部の信号源10に直接的または間接的に接続される。具体的には、校正回路100の入力端子がアンテナ20から切り離されて信号源10に接続されてもよいし、アンテナ20が信号源10から放射される無線信号を受信し、受信無線信号を校正回路100の入力端子へと供給してもよい。そして、校正回路100は、信号源10から供給される単相入力信号を用いて差動増幅器30の入力インピーダンスを校正する。
(First embodiment)
A specific example of the calibration circuit according to the first embodiment is shown in FIG. The calibration circuit 100 in FIG. 1 functions as a part of the wireless receiver. The calibration circuit 100 has an input terminal, a first output terminal, and a second output terminal. The input terminal of the calibration circuit 100 is connected to the antenna 20. The first output terminal and the second output terminal of the calibration circuit 100 are respectively connected to the non-inverting input terminal and the inverting input terminal of the differential amplifier 30 as a low noise amplifier (LNA). The calibration circuit 100 converts the single-phase input signal into a differential output signal and outputs the differential output signal to the differential amplifier 30. When the input impedance of the differential amplifier 30 is calibrated, the input terminal of the calibration circuit 100 is directly or indirectly connected to the external signal source 10. Specifically, the input terminal of the calibration circuit 100 may be disconnected from the antenna 20 and connected to the signal source 10, or the antenna 20 receives a radio signal radiated from the signal source 10 and calibrates the received radio signal. You may supply to the input terminal of the circuit 100. FIG. The calibration circuit 100 calibrates the input impedance of the differential amplifier 30 using the single-phase input signal supplied from the signal source 10.
 校正回路100は、単相差動変換回路110と、検波器120と、検波器130と、比較部140と、マッチング制御回路150とを備える。 The calibration circuit 100 includes a single-phase differential conversion circuit 110, a detector 120, a detector 130, a comparison unit 140, and a matching control circuit 150.
 単相差動変換回路110は、入力端子、第1の出力端子、第2の出力端子および制御端子を持つ。単相差動変換回路110の入力端子は、校正回路100の入力端子に接続される。単相差動変換回路110の第1の出力端子は、検波器120の入力端子および校正回路100の第1の出力端子に共通に接続される。単相差動変換回路110の第2の出力端子は、検波器130の入力端子および校正回路100の第2の出力端子に共通に接続される。単相差動変換回路110の制御端子は、マッチング制御回路150の出力端子に接続される。 The single-phase differential conversion circuit 110 has an input terminal, a first output terminal, a second output terminal, and a control terminal. The input terminal of the single phase differential conversion circuit 110 is connected to the input terminal of the calibration circuit 100. The first output terminal of the single-phase differential conversion circuit 110 is commonly connected to the input terminal of the detector 120 and the first output terminal of the calibration circuit 100. The second output terminal of the single-phase differential conversion circuit 110 is commonly connected to the input terminal of the detector 130 and the second output terminal of the calibration circuit 100. The control terminal of the single phase differential conversion circuit 110 is connected to the output terminal of the matching control circuit 150.
 単相差動変換回路110は、インピーダンス可変素子を含む。このインピーダンス可変素子のインピーダンスは、単相差動変換回路110の制御端子を介して入力される制御コードに依存して変化する。 The single-phase differential conversion circuit 110 includes an impedance variable element. The impedance of the variable impedance element changes depending on a control code input via the control terminal of the single-phase differential conversion circuit 110.
 単相差動変換回路110は、単相入力信号を差動出力信号へと変換する。この差動出力信号は、第1の出力端子を介して出力される第1の出力信号と、第2の出力端子を介して出力される第2の出力信号とを含む。 The single-phase differential conversion circuit 110 converts a single-phase input signal into a differential output signal. The differential output signal includes a first output signal output via the first output terminal and a second output signal output via the second output terminal.
 単相差動変換回路110は、例えば図2に示されるように、インダクタ111、インダクタ112、インダクタ113および可変キャパシタ114を含んでいてもよい。 The single-phase differential conversion circuit 110 may include an inductor 111, an inductor 112, an inductor 113, and a variable capacitor 114, for example, as shown in FIG.
 インダクタ111は、第1の端子および第2の端子を持つ。インダクタ111の第1の端子は、単相差動変換回路110の入力端子およびインダクタ113の第1の端子に共通に接続される。インダクタ111の第2の端子は、単相差動変換回路110の第1の出力端子および可変キャパシタ114の第1の端子に共通に接続される。 The inductor 111 has a first terminal and a second terminal. The first terminal of the inductor 111 is connected in common to the input terminal of the single-phase differential conversion circuit 110 and the first terminal of the inductor 113. The second terminal of the inductor 111 is connected in common to the first output terminal of the single-phase differential conversion circuit 110 and the first terminal of the variable capacitor 114.
 インダクタ112は、第1の端子および第2の端子を持つ。インダクタ112の第1の端子は、インダクタ113の第2の端子に接続される。インダクタ112の第2の端子は、単相差動変換回路110の第2の出力端子およびキャパシタ114の第2の端子に接続される。インダクタ112のインダクタンスは、インダクタ111のインダクタンスと等しい。 The inductor 112 has a first terminal and a second terminal. The first terminal of the inductor 112 is connected to the second terminal of the inductor 113. The second terminal of the inductor 112 is connected to the second output terminal of the single-phase differential conversion circuit 110 and the second terminal of the capacitor 114. The inductance of the inductor 112 is equal to the inductance of the inductor 111.
 インダクタ113は、第1の端子および第2の端子を持つ。インダクタ113の第1の端子は、単相差動変換回路110の入力端子およびインダクタ111の第1の端子に共通に接続される。インダクタ113の第2の端子は、インダクタ112の第1の端子に接続される。 The inductor 113 has a first terminal and a second terminal. The first terminal of the inductor 113 is connected in common to the input terminal of the single-phase differential conversion circuit 110 and the first terminal of the inductor 111. The second terminal of the inductor 113 is connected to the first terminal of the inductor 112.
 可変キャパシタ114は、第1の端子および第2の端子を持つ。可変キャパシタ114の第1の端子は、単相差動変換回路110の第1の出力端子およびインダクタ111の第2の端子に共通に接続される。可変キャパシタ114の第2の端子は、単相差動変換回路110の第2の出力端子およびインダクタ112の第2の端子に共通に接続される。インダクタ113および可変キャパシタ114は、単相差動変換回路110の第1の出力信号および第2の出力信号が差動信号となるように作用する。 The variable capacitor 114 has a first terminal and a second terminal. The first terminal of the variable capacitor 114 is connected in common to the first output terminal of the single-phase differential conversion circuit 110 and the second terminal of the inductor 111. The second terminal of the variable capacitor 114 is connected in common to the second output terminal of the single-phase differential conversion circuit 110 and the second terminal of the inductor 112. The inductor 113 and the variable capacitor 114 act so that the first output signal and the second output signal of the single-phase differential conversion circuit 110 become differential signals.
 可変キャパシタ114は、前述の可変インピーダンス素子に相当する。すなわち、可変キャパシタ114のキャパシタンスは、単相差動変換回路110の制御端子を介して入力される制御コードに依存して変化する。 The variable capacitor 114 corresponds to the aforementioned variable impedance element. That is, the capacitance of the variable capacitor 114 changes depending on the control code input via the control terminal of the single-phase differential conversion circuit 110.
 なお、可変キャパシタ114は、可変インダクタを含む種々の可変インピーダンス素子に置き換えられてもよい。例えば、可変インピーダンス素子は、スイッチを用いて接続を切り換え可能な複数のインダクタであってもよい。或いは、可変インピーダンス素子は、インダクタと、フェライトと、当該インダクタおよびフェライトの間の相対的な位置関係を変更できる機構とを含んでもよい。 Note that the variable capacitor 114 may be replaced with various variable impedance elements including a variable inductor. For example, the variable impedance element may be a plurality of inductors whose connections can be switched using a switch. Alternatively, the variable impedance element may include an inductor, a ferrite, and a mechanism that can change a relative positional relationship between the inductor and the ferrite.
 検波器120は、入力端子および出力端子を持つ。検波器120の入力端子は、単相差動変換回路110の第1の出力端子および校正回路100の第1の出力端子に共通に接続される。検波器120の出力端子は、比較部140の第1の入力端子に接続される。検波器120は、単相差動変換回路110の第1の出力信号(第1の検波器入力信号)を検波することによって第1の検波信号を得る。この第1の検波信号は、第1の出力信号の振幅を示す。 The detector 120 has an input terminal and an output terminal. The input terminal of the detector 120 is commonly connected to the first output terminal of the single-phase differential conversion circuit 110 and the first output terminal of the calibration circuit 100. The output terminal of the detector 120 is connected to the first input terminal of the comparison unit 140. The detector 120 obtains the first detection signal by detecting the first output signal (first detector input signal) of the single-phase differential conversion circuit 110. The first detection signal indicates the amplitude of the first output signal.
 検波器130は、入力端子および出力端子を持つ。検波器130の入力端子は、単相差動変換回路110の第2の出力端子および校正回路100の第2の出力端子に共通に接続される。検波器130の出力端子は、比較部140の第2の入力端子に接続される。検波器130は、単相差動変換回路110の第2の出力信号(第2の検波器入力信号)を検波することによって第2の検波信号を得る。この第2の検波信号は、第2の出力信号の振幅を示す。 The detector 130 has an input terminal and an output terminal. The input terminal of the detector 130 is connected in common to the second output terminal of the single-phase differential conversion circuit 110 and the second output terminal of the calibration circuit 100. The output terminal of the detector 130 is connected to the second input terminal of the comparison unit 140. The detector 130 detects the second output signal (second detector input signal) of the single-phase differential conversion circuit 110 to obtain a second detection signal. The second detection signal indicates the amplitude of the second output signal.
 比較部140は、第1の入力端子、第2の入力端子および出力端子を持つ。比較部140の第1の入力端子は、検波器120の出力端子に接続される。比較部140の第2の入力端子は、検波器130の出力端子に接続される。比較部140の出力端子は、マッチング制御回路150の入力端子に接続される。比較部140は、検波器120および検波器130から第1の検波信号および第2の検波信号をそれぞれ入力し、これらの電圧を比較する。比較部140は、比較結果を示す比較結果信号をマッチング制御回路150へと出力する。例えば、第1の検波信号の電圧をV2とし、第2の検波信号の電圧をV3とすると、比較結果信号は、(V2-V3)そのものまたはその符号を示してもよいし、V2/V3を示してもよいし、(V3-V2)そのものまたはその符号を示してもよいし、V3/V2を示してもよい。 The comparison unit 140 has a first input terminal, a second input terminal, and an output terminal. The first input terminal of the comparison unit 140 is connected to the output terminal of the detector 120. The second input terminal of the comparison unit 140 is connected to the output terminal of the detector 130. The output terminal of the comparison unit 140 is connected to the input terminal of the matching control circuit 150. The comparison unit 140 receives the first detection signal and the second detection signal from the detector 120 and the detector 130, and compares these voltages. The comparison unit 140 outputs a comparison result signal indicating the comparison result to the matching control circuit 150. For example, if the voltage of the first detection signal is V2 and the voltage of the second detection signal is V3, the comparison result signal may indicate (V2-V3) itself or its sign, or V2 / V3 may be It may be indicated, (V3-V2) itself or its sign may be indicated, or V3 / V2 may be indicated.
 マッチング制御回路150は、入力端子および出力端子を持つ。マッチング制御回路150の入力端子は比較部140の出力端子に接続される。マッチング制御回路150の出力端子は、単相差動変換回路110の制御端子に接続される。 The matching control circuit 150 has an input terminal and an output terminal. The input terminal of the matching control circuit 150 is connected to the output terminal of the comparison unit 140. The output terminal of the matching control circuit 150 is connected to the control terminal of the single-phase differential conversion circuit 110.
 マッチング制御回路150は、単相差動変換回路110に含まれる可変インピーダンス素子のインピーダンスを制御する制御コードを当該単相差動変換回路110へと出力する。より具体的には、マッチング制御回路150は、差動増幅器30の入力インピーダンスの校正時には、制御コードを複数の異なる値に設定する。そして、マッチング制御回路150は、設定された制御コードに対応する比較結果信号を比較部140から入力し、当該制御コードと対応付けて蓄積する。マッチング制御回路150は、蓄積された制御コードと比較結果信号との対応関係を分析することにより最適な(すなわち、所望の)制御コードを探索する。最適な制御コードは、例えば単相差動変換回路110の入力端子における反射電力を最小化する値と定義することができる。 The matching control circuit 150 outputs a control code for controlling the impedance of the variable impedance element included in the single-phase differential conversion circuit 110 to the single-phase differential conversion circuit 110. More specifically, the matching control circuit 150 sets the control code to a plurality of different values when the input impedance of the differential amplifier 30 is calibrated. Then, the matching control circuit 150 receives a comparison result signal corresponding to the set control code from the comparison unit 140 and stores it in association with the control code. The matching control circuit 150 searches for an optimal (ie, desired) control code by analyzing a correspondence relationship between the stored control code and the comparison result signal. The optimum control code can be defined as a value that minimizes the reflected power at the input terminal of the single-phase differential conversion circuit 110, for example.
 図3は、制御コードの変化に対する|S11|およびV2/V3の変化を例示する。さらに、図4は、V2/V3の変化に対する|S11|の変化を例示する。ここで、|S11|は、単相差動変換回路110の入力端子における入射電力に対する反射電力の比率の絶対値を表している。そして、|S11|を最小化させる制御コードが最適な制御コードである。図3および図4の例によれば、制御コード=19の時に、|S11|は最小化される。さらに、制御コード=19の時に、V2/V3は略0dBである。そこで、マッチング制御回路150は、V2≒V3となる制御コードを探索することによって、最適な制御コードを得る。 FIG. 3 exemplifies changes in | S11 | and V2 / V3 with respect to changes in the control code. Further, FIG. 4 illustrates the change in | S11 | with respect to the change in V2 / V3. Here, | S11 | represents the absolute value of the ratio of the reflected power to the incident power at the input terminal of the single-phase differential conversion circuit 110. The control code that minimizes | S11 | is the optimal control code. According to the examples of FIGS. 3 and 4, | S11 | is minimized when the control code = 19. Further, when the control code = 19, V2 / V3 is approximately 0 dB. Therefore, the matching control circuit 150 obtains an optimal control code by searching for a control code that satisfies V2≈V3.
 図3に示されるように、V2/V3(およびV3/V2)は制御コードに対して単調に変化する。さらに、図5に示されるように、(V2-V3)(および(V3-V2))も制御コードに対して単調に変化する。故に、マッチング制御回路150は、バイナリ探索法などの高速な探索アルゴリズムを利用することにより最適な制御コードを短時間で探索できる。 As shown in FIG. 3, V2 / V3 (and V3 / V2) change monotonously with respect to the control code. Furthermore, as shown in FIG. 5, (V2-V3) (and (V3-V2)) also changes monotonously with respect to the control code. Therefore, the matching control circuit 150 can search for an optimal control code in a short time by using a high-speed search algorithm such as a binary search method.
 具体的には、マッチング制御回路150は、最適な制御コードを以下のように探索できる。最初に、マッチング制御回路150は、最小の制御コード(=Cmin)および最大の制御コード(=Cmax)をそれぞれ設定し、(V2-V3)の値または符号をそれぞれ蓄積する(ステップS1)。 Specifically, the matching control circuit 150 can search for an optimal control code as follows. First, the matching control circuit 150 sets the minimum control code (= C min ) and the maximum control code (= C max ), respectively, and accumulates the value or sign of (V2−V3) (step S1). .
 次に、マッチング制御回路150は、最小の制御コード(=Cmin)に対応する(V2-V3)の符号と最大の制御コード(=Cmax)に対応する(V2-V3)の符号とを比較する(ステップS2)。両符号が同一であるならば、V2>V3またはV2<V3が常に成立するので差動増幅器30の入力インピーダンスの校正は不可能である。すなわち、差動増幅器30を含むIC(Integrated Circuit)は不良品と判定されることになり、校正処理は終了する。他方、両符号が同一でないならば、マッチング制御回路150は、変数AにCminを代入し、変数BにCmaxを代入し、処理はステップS3に進む。 Next, the matching control circuit 150 generates a code of (V2-V3) corresponding to the minimum control code (= C min ) and a code of (V2-V3) corresponding to the maximum control code (= C max ). Compare (step S2). If both signs are the same, V2> V3 or V2 <V3 is always established, so that the input impedance of the differential amplifier 30 cannot be calibrated. That is, an IC (Integrated Circuit) including the differential amplifier 30 is determined as a defective product, and the calibration process ends. On the other hand, if the two codes are not the same, the matching control circuit 150 substitutes C min for the variable A and C max for the variable B, and the process proceeds to step S3.
 ステップS3において、マッチング制御回路150は、AおよびBが隣接する整数(すなわち、|A-B|=1)であるか否かを判定する。AおよびBが隣接する整数であれば、処理はステップS8に進む。そうでなければ、処理はステップS4に進む。 In step S3, the matching control circuit 150 determines whether A and B are adjacent integers (that is, | A−B | = 1). If A and B are adjacent integers, the process proceeds to step S8. Otherwise, the process proceeds to step S4.
 ステップS4において、マッチング制御回路150は、下記数式(1)に示されるように変数Aおよび変数Bの平均値に床関数を適用することによって得られる整数Cを制御コードに設定し、(V2-V3)の値または符号を蓄積する。 In step S4, the matching control circuit 150 sets an integer C obtained by applying a floor function to the average value of the variables A and B as shown in the following formula (1) in the control code (V2− The value or sign of V3) is stored.
Figure JPOXMLDOC01-appb-M000001
Figure JPOXMLDOC01-appb-M000001
 次に、マッチング制御回路150は、ステップS4において制御コード(=C)を設定したときの(V2-V3)の符号を判定する(ステップS5)。符号が制御コード(=A)を設定したときの符号と同一であるならば、マッチング制御回路150は変数AにCを代入し(ステップS6)、処理はステップS3に戻る。他方、符号が制御コード(=B)を設定したときの符号と同一であるならば、マッチング制御回路150は変数BにCを代入し(ステップS7)、処理はステップS3に戻る。 Next, the matching control circuit 150 determines the sign of (V2-V3) when the control code (= C) is set in step S4 (step S5). If the sign is the same as the sign when the control code (= A) is set, the matching control circuit 150 substitutes C for the variable A (step S6), and the process returns to step S3. On the other hand, if the sign is the same as the sign when the control code (= B) is set, the matching control circuit 150 substitutes C for the variable B (step S7), and the process returns to step S3.
 ステップS8において、マッチング制御回路150は最適な制御コードを決定する。具体的には、ステップS8の開始時には変数Aおよび変数Bにはそれぞれ最適な制御コードの候補値が代入されている。すなわち、一方が最適な制御コードであり、他方が2番目に適した制御コードである。マッチング制御回路150が(V2-V3)の絶対値を取得できないならば、2つの候補値の優劣を判定することは不可能である。故に、マッチング制御回路150は、2つの候補値のどちらかを最適な制御コードとして決定する。他方、マッチング制御回路150が(V2-V3)の絶対値を取得できるならば、2つの候補値の優劣を判定することは可能である。例えば、マッチング制御回路150は、(V2-V3)の絶対値が最小となるような候補値を最適な制御コードとして決定すればよい。 In step S8, the matching control circuit 150 determines an optimal control code. Specifically, at the start of step S8, optimal control code candidate values are assigned to variable A and variable B, respectively. That is, one is the optimal control code and the other is the second most suitable control code. If the matching control circuit 150 cannot acquire the absolute value of (V2-V3), it is impossible to determine the superiority or inferiority of the two candidate values. Therefore, the matching control circuit 150 determines one of the two candidate values as an optimal control code. On the other hand, if the matching control circuit 150 can acquire the absolute value of (V2-V3), it is possible to determine the superiority or inferiority of the two candidate values. For example, the matching control circuit 150 may determine a candidate value that minimizes the absolute value of (V2-V3) as an optimal control code.
 上記探索処理によれば、マッチング制御回路150は最適な制御コードを短時間で探索できる。具体的には、制御コードに設定可能な値の総数がN個であるとすれば、マッチング制御回路150は、高々下記数式(2)に示される回数Iに亘って制御コードを設定すれば、最適な制御コードを探索できる。 According to the above search processing, the matching control circuit 150 can search for an optimal control code in a short time. Specifically, assuming that the total number of values that can be set in the control code is N, the matching control circuit 150 sets the control code over the number of times I shown in the following formula (2). The optimal control code can be searched.
Figure JPOXMLDOC01-appb-M000002
Figure JPOXMLDOC01-appb-M000002
 すなわち、Nを2倍にしても、最適な制御コードを探索するためにマッチング制御回路150が制御コードを設定しなければならない回数は1回増えるに過ぎない。従って、上記探索処理は、Nが大きいほど探索時間の短縮効果が大きい。一般に、Nが大きいほど、差動増幅器30の入力インピーダンスをより細かく調整できるので、当該差動増幅器30の性能をより引き出すことができる。具体的には、インピーダンスマッチング周波数が狭帯域であって、かつ、差動増幅器30の入力インピーダンスを広帯域に亘って校正する必要がある場合であっても、最適な制御コードを短時間で探索することができる。 That is, even if N is doubled, the number of times that the matching control circuit 150 has to set a control code in order to search for an optimal control code is only increased by one. Therefore, the search process has a greater effect of reducing the search time as N increases. In general, the larger N is, the finer the input impedance of the differential amplifier 30 can be adjusted, so that the performance of the differential amplifier 30 can be further extracted. Specifically, even when the impedance matching frequency is a narrow band and the input impedance of the differential amplifier 30 needs to be calibrated over a wide band, an optimum control code is searched in a short time. be able to.
 以上説明したように第1の実施形態に係る校正回路は、差動増幅器の前段に接続された単相差動変換回路からの差動出力信号に基づいて当該差動増幅器の入力インピーダンスを校正する。仮に、差動増幅器からの差動増幅信号に基づいて上記入力インピーダンスを校正するとすれば当該差動増幅信号の飽和を回避するために大電力の入力信号を利用することができない。他方、上記入力インピーダンスの校正処理は差動増幅信号の飽和に影響されないので、この校正回路は大電力の入力信号を利用することができる。すなわち、比較部の2入力信号の差電圧を十分に大きくすることができるので、上記入力インピーダンスを精度良く校正できる。 As described above, the calibration circuit according to the first embodiment calibrates the input impedance of the differential amplifier based on the differential output signal from the single-phase differential conversion circuit connected to the previous stage of the differential amplifier. If the input impedance is calibrated based on the differential amplification signal from the differential amplifier, a high power input signal cannot be used to avoid saturation of the differential amplification signal. On the other hand, since the calibration process of the input impedance is not affected by the saturation of the differential amplification signal, this calibration circuit can use a high-power input signal. That is, since the difference voltage between the two input signals of the comparison unit can be sufficiently increased, the input impedance can be accurately calibrated.
 また、上記入力インピーダンスの校正精度は、外部の信号源における出力電力の絶対値に殆ど依存しないので、安価な信号源を用いたとしても出力電力の安定性の要求に応えることができる。さらに、この信号源が発生する信号を安価な電力分配器で多数の信号に分配することにより、多数の差動増幅回路の入力インピーダンスを一斉に校正することができる。 Also, since the calibration accuracy of the input impedance hardly depends on the absolute value of the output power in the external signal source, it is possible to meet the demand for the stability of the output power even if an inexpensive signal source is used. Furthermore, by dividing the signal generated by this signal source into a large number of signals with an inexpensive power distributor, the input impedances of a large number of differential amplifier circuits can be calibrated simultaneously.
 さらに、単相差動変換回路の第1の出力信号の電圧および第2の出力信号の電圧は制御コードに対する感度が高いので、検波器および比較器の要求精度が低い。故に、この校正回路は、簡易に設計および製造可能であるから製造歩留まりが高い。具体的には、図5に示されるように、外部の信号源から供給される単相入力信号のレベルが-10dBmである場合に、最適な制御コード(=19)に対応する(V2-V3)は-0.6mVであり、2番目に適した制御コード(=20)に対応する(V2-V3)は29.7mVである。故に、検波器および比較部の誤差は30.3mVまで許容可能である。 Furthermore, since the voltage of the first output signal and the voltage of the second output signal of the single-phase differential conversion circuit are highly sensitive to the control code, the required accuracy of the detector and the comparator is low. Therefore, since this calibration circuit can be easily designed and manufactured, the manufacturing yield is high. Specifically, as shown in FIG. 5, when the level of a single-phase input signal supplied from an external signal source is −10 dBm, it corresponds to the optimal control code (= 19) (V2−V3). ) Is −0.6 mV, and (V2−V3) corresponding to the second most suitable control code (= 20) is 29.7 mV. Therefore, the error of the detector and the comparison unit is acceptable up to 30.3 mV.
 (第2の実施形態) 
 第2の実施形態に係る校正回路の具体例が図6に示される。図6の校正回路200は、無線受信機の一部として機能する。校正回路200は、入力端子、第1の出力端子および第2の出力端子を持つ。校正回路200の入力端子は、アンテナ20に接続される。校正回路200の第1の出力端子および第2の出力端子は、LNAとしての差動増幅器30の非反転入力端子および反転入力端子にそれぞれ接続される。校正回路200は、単相入力信号を差動出力信号へと変換し、当該差動出力信号を差動増幅器30へと出力する。差動増幅器30の入力インピーダンスの校正時に、校正回路200の入力端子は外部の信号源10に直接的または間接的に接続される。具体的には、校正回路200の入力端子がアンテナ20から切り離されて信号源10に接続されてもよいし、アンテナ20が信号源10から放射される無線信号を受信し、受信無線信号を校正回路200の入力端子へと供給してもよい。そして、校正回路200は、信号源10から供給される単相入力信号を用いて差動増幅器30の入力インピーダンスを校正する。
(Second Embodiment)
A specific example of the calibration circuit according to the second embodiment is shown in FIG. The calibration circuit 200 in FIG. 6 functions as a part of the wireless receiver. The calibration circuit 200 has an input terminal, a first output terminal, and a second output terminal. The input terminal of the calibration circuit 200 is connected to the antenna 20. The first output terminal and the second output terminal of the calibration circuit 200 are respectively connected to the non-inverting input terminal and the inverting input terminal of the differential amplifier 30 as the LNA. The calibration circuit 200 converts the single-phase input signal into a differential output signal and outputs the differential output signal to the differential amplifier 30. When the input impedance of the differential amplifier 30 is calibrated, the input terminal of the calibration circuit 200 is directly or indirectly connected to the external signal source 10. Specifically, the input terminal of the calibration circuit 200 may be disconnected from the antenna 20 and connected to the signal source 10, or the antenna 20 receives a radio signal radiated from the signal source 10 and calibrates the received radio signal. You may supply to the input terminal of the circuit 200. FIG. The calibration circuit 200 calibrates the input impedance of the differential amplifier 30 using the single-phase input signal supplied from the signal source 10.
 校正回路200は、単相差動変換回路110と、検波器120と、検波器130と、比較部140と、マッチング制御回路150と、単相増幅器260と、単相増幅器270とを備える。比較部140およびマッチング制御回路150は、図1の比較部140およびマッチング制御回路150と同一または類似であってよい。 The calibration circuit 200 includes a single-phase differential conversion circuit 110, a detector 120, a detector 130, a comparison unit 140, a matching control circuit 150, a single-phase amplifier 260, and a single-phase amplifier 270. The comparison unit 140 and the matching control circuit 150 may be the same as or similar to the comparison unit 140 and the matching control circuit 150 of FIG.
 単相差動変換回路110は、第1の出力端子が検波器120の入力端子および校正回路100の第1の出力端子の代わりに単相増幅器260の入力端子に接続される点と、第2の出力端子が検波器130の入力端子および校正回路100の第2の出力端子の代わりに単相増幅器270の入力端子に接続される点とで図1の単相差動変換回路110とは異なる。 The single-phase differential conversion circuit 110 has a first output terminal connected to the input terminal of the single-phase amplifier 260 instead of the input terminal of the detector 120 and the first output terminal of the calibration circuit 100, and the second 1 is different from the single-phase differential conversion circuit 110 in FIG. 1 in that the output terminal is connected to the input terminal of the single-phase amplifier 270 instead of the input terminal of the detector 130 and the second output terminal of the calibration circuit 100.
 検波器120は、入力端子が単相差動変換回路110の第1の出力端子および校正回路100の第1の出力端子の代わりに単相増幅器260の出力端子に接続される点で図1の検波器120とは異なる。 The detector 120 has the input terminal connected to the output terminal of the single-phase amplifier 260 instead of the first output terminal of the single-phase differential conversion circuit 110 and the first output terminal of the calibration circuit 100, as shown in FIG. Different from the vessel 120.
 検波器130は、入力端子が単相差動変換回路110の第2の出力端子および校正回路100の第2の出力端子の代わりに単相増幅器270の出力端子に接続される点で図1の検波器130とは異なる。 The detector 130 has the input terminal connected to the output terminal of the single-phase amplifier 270 instead of the second output terminal of the single-phase differential conversion circuit 110 and the second output terminal of the calibration circuit 100, as shown in FIG. Different from the vessel 130.
 単相増幅器260は、入力端子および出力端子を持つ。単相増幅器260の入力端子は単相差動変換回路110の第1の出力端子に接続される。単相増幅器260の出力端子は、検波器120の入力端子および校正回路200の第1の出力端子に共通に接続される。単相増幅器260を単相差動変換回路110と検波器120との間に挿入することにより、検波器120の寄生成分を単相差動変換回路110の第1の出力端子から切り離すことができる。 The single phase amplifier 260 has an input terminal and an output terminal. The input terminal of the single phase amplifier 260 is connected to the first output terminal of the single phase differential conversion circuit 110. The output terminal of the single phase amplifier 260 is commonly connected to the input terminal of the detector 120 and the first output terminal of the calibration circuit 200. By inserting the single-phase amplifier 260 between the single-phase differential conversion circuit 110 and the detector 120, the parasitic component of the detector 120 can be disconnected from the first output terminal of the single-phase differential conversion circuit 110.
 単相増幅器260は、単相差動変換回路110から第1の出力信号を入力し、これを増幅することによって第1の増幅信号を得る。単相増幅器260は、第1の増幅信号を検波器120へと出力する。 The single-phase amplifier 260 receives the first output signal from the single-phase differential conversion circuit 110 and amplifies it to obtain a first amplified signal. Single phase amplifier 260 outputs the first amplified signal to detector 120.
 単相増幅器270は、入力端子および出力端子を持つ。単相増幅器270の入力端子は単相差動変換回路110の第2の出力端子に接続される。単相増幅器270の出力端子は、検波器130の入力端子および校正回路200の第2の出力端子に共通に接続される。単相増幅器270を単相差動変換回路110と検波器130との間に挿入することにより、検波器130の寄生成分を単相差動変換回路110の第2の出力端子から切り離すことができる。単相増幅器270は、単相増幅器260と同一の特性を持つ。 Single phase amplifier 270 has an input terminal and an output terminal. The input terminal of the single phase amplifier 270 is connected to the second output terminal of the single phase differential conversion circuit 110. The output terminal of the single phase amplifier 270 is connected in common to the input terminal of the detector 130 and the second output terminal of the calibration circuit 200. By inserting the single-phase amplifier 270 between the single-phase differential conversion circuit 110 and the detector 130, the parasitic component of the detector 130 can be disconnected from the second output terminal of the single-phase differential conversion circuit 110. Single-phase amplifier 270 has the same characteristics as single-phase amplifier 260.
 単相増幅器270は、単相差動変換回路110から第2の出力信号を入力し、これを増幅することによって第2の増幅信号を得る。単相増幅器270は、第2の増幅信号を検波器130へと出力する。 The single-phase amplifier 270 receives the second output signal from the single-phase differential conversion circuit 110 and amplifies it to obtain a second amplified signal. Single phase amplifier 270 outputs the second amplified signal to detector 130.
 以上説明したように、第2の実施形態に係る校正回路は、単相差動変換回路の各出力端子と各検波器との間に単相増幅器を挿入する。従って、この校正回路によれば、各検波器の寄生成分を単相差動変換回路の各出力端子から切り離し、当該校正回路の後段に接続された差動増幅器の入力インピーダンスを精度良く校正することができる。 As described above, the calibration circuit according to the second embodiment inserts a single-phase amplifier between each output terminal of the single-phase differential conversion circuit and each detector. Therefore, according to this calibration circuit, the parasitic component of each detector can be separated from each output terminal of the single-phase differential conversion circuit, and the input impedance of the differential amplifier connected to the subsequent stage of the calibration circuit can be accurately calibrated. it can.
 (第3の実施形態) 
 第3の実施形態に係る校正回路の具体例が図7に示される。図7の校正回路300は、無線受信機の一部として機能する。校正回路300は、入力端子、第1の出力端子および第2の出力端子を持つ。校正回路300の入力端子は、アンテナ20に接続される。校正回路300の第1の出力端子および第2の出力端子は、LNAとしての差動増幅器30の非反転入力端子および反転入力端子にそれぞれ接続される。校正回路300は、単相入力信号を差動出力信号へと変換し、当該差動出力信号を差動増幅器30へと出力する。差動増幅器30の入力インピーダンスの校正時に、校正回路300は後述されるように内部の電流信号源を駆動させる。そして、校正回路300は、この電流信号源から供給される電流信号を用いて差動増幅器30の入力インピーダンスを校正する。なお、校正時にアンテナ20は、校正回路300の入力端子に接続されていてもよいし、切り離されていてもよい。
(Third embodiment)
A specific example of the calibration circuit according to the third embodiment is shown in FIG. The calibration circuit 300 in FIG. 7 functions as a part of the wireless receiver. The calibration circuit 300 has an input terminal, a first output terminal, and a second output terminal. The input terminal of the calibration circuit 300 is connected to the antenna 20. The first output terminal and the second output terminal of the calibration circuit 300 are respectively connected to the non-inverting input terminal and the inverting input terminal of the differential amplifier 30 as the LNA. The calibration circuit 300 converts the single-phase input signal into a differential output signal and outputs the differential output signal to the differential amplifier 30. When the input impedance of the differential amplifier 30 is calibrated, the calibration circuit 300 drives an internal current signal source as will be described later. The calibration circuit 300 calibrates the input impedance of the differential amplifier 30 using the current signal supplied from the current signal source. Note that the antenna 20 may be connected to the input terminal of the calibration circuit 300 or disconnected at the time of calibration.
 校正回路300は、単相差動変換回路110と、検波器120と、検波器130と、比較部140と、マッチング制御回路150と、電流信号源380とを備える。検波器130、比較部140およびマッチング制御回路150は、図1の検波器130、比較部140およびマッチング制御回路150と同一または類似であってよい。 The calibration circuit 300 includes a single-phase differential conversion circuit 110, a detector 120, a detector 130, a comparison unit 140, a matching control circuit 150, and a current signal source 380. The detector 130, the comparison unit 140, and the matching control circuit 150 may be the same as or similar to the detector 130, the comparison unit 140, and the matching control circuit 150 of FIG.
 単相差動変換回路110は、第1の出力端子が電流信号源380の出力端子にさらに接続される点で図1の単相差動変換回路110とは異なる。検波器120は、入力端子が電流信号源380の出力端子にさらに接続される点で図1の検波器120とは異なる。 The single-phase differential conversion circuit 110 is different from the single-phase differential conversion circuit 110 of FIG. 1 in that the first output terminal is further connected to the output terminal of the current signal source 380. The detector 120 is different from the detector 120 of FIG. 1 in that the input terminal is further connected to the output terminal of the current signal source 380.
 電流信号源380は出力端子を持つ。電流信号源380の出力端子は、単相差動変換回路110の第1の出力端子、検波器120の入力端子および校正回路300の第1の出力端子に共通に接続される。電流信号源380は、差動増幅器30の入力インピーダンスの校正時に駆動され、電流信号を発生する。電流信号源380は、電流信号を単相差動変換回路110の第1の出力端子に注入する。 The current signal source 380 has an output terminal. The output terminal of the current signal source 380 is commonly connected to the first output terminal of the single-phase differential conversion circuit 110, the input terminal of the detector 120, and the first output terminal of the calibration circuit 300. The current signal source 380 is driven when the input impedance of the differential amplifier 30 is calibrated to generate a current signal. The current signal source 380 injects a current signal into the first output terminal of the single-phase differential conversion circuit 110.
 電流信号源380は、発振器381および電圧/電流変換器382を含む。発振器381は、差動増幅器30の入力インピーダンスの校正時に駆動され、発振信号を発生する。発振器381は、発振信号を電圧/電流変換器382へと出力する。電圧/電流変換器382は、発振信号を電圧/電流変換することによって上記電流信号を得る。 The current signal source 380 includes an oscillator 381 and a voltage / current converter 382. The oscillator 381 is driven when the input impedance of the differential amplifier 30 is calibrated and generates an oscillation signal. The oscillator 381 outputs an oscillation signal to the voltage / current converter 382. The voltage / current converter 382 obtains the current signal by performing voltage / current conversion on the oscillation signal.
 電流信号が単相差動変換回路110の第1の出力端子に注入されると、当該単相差動変換回路110は、第1の出力端子を介して前述の第1の出力信号を出力し、第2の出力端子を介して前述の第2の出力信号を出力することになる。そして、検波器120および検波器130は、それぞれ第1の検波信号および第2の検波信号を得る。電流信号注入時の第1の検波信号の電圧および第2の検波信号の電圧をそれぞれV32およびV33とすると、V32/V33は図8に例示されるように前述の第1の実施形態におけるV2/V3と同様に挙動する。従って、前述の第1の実施形態において説明されたように、マッチング制御回路150は、第1の検波信号および第2の検波信号に基づいて最適な制御コード(=19)を探索できる。 When the current signal is injected into the first output terminal of the single-phase differential conversion circuit 110, the single-phase differential conversion circuit 110 outputs the first output signal described above via the first output terminal. The second output signal described above is output through the two output terminals. Then, the detector 120 and the detector 130 obtain a first detection signal and a second detection signal, respectively. When the voltage of the first detection signal and the voltage of the second detection signal at the time of current signal injection are V32 and V33, respectively, V32 / V33 is V2 // in the first embodiment as illustrated in FIG. Behaves similarly to V3. Therefore, as described in the first embodiment, the matching control circuit 150 can search for an optimal control code (= 19) based on the first detection signal and the second detection signal.
 なお、図8のグラフは単相差動変換回路110の入力端子を開放した状態(すなわち、アンテナ20が校正回路100の入力端子から切り離されている状態)でV32およびV33を測定することによって描画されている。この状態では、V32=V33となる条件はV2=V3となる条件と概ね一致する。 The graph of FIG. 8 is drawn by measuring V32 and V33 with the input terminal of the single-phase differential conversion circuit 110 opened (that is, the antenna 20 is disconnected from the input terminal of the calibration circuit 100). ing. In this state, the condition of V32 = V33 is almost the same as the condition of V2 = V3.
 他方、アンテナ20が接続されている状態では、上記電流信号の注入によって当該アンテナ20からある程度の電力が放射されるので、V32=V33となる条件はV2=V3となる条件と比べてオフセットする。このオフセット量は、アンテナ20の特性に依存するが、例えば前述の外部の信号源10を用いた校正結果と電流信号源380を用いた校正結果とを1度比較すれば見積もることができる。以後、見積もられたオフセット量を補償することで、電流信号源380を用いて精度良く校正することが可能となる。 On the other hand, in the state where the antenna 20 is connected, a certain amount of power is radiated from the antenna 20 by the injection of the current signal, so the condition of V32 = V33 is offset compared to the condition of V2 = V3. This offset amount depends on the characteristics of the antenna 20, but can be estimated by comparing the calibration result using the external signal source 10 and the calibration result using the current signal source 380 once, for example. Thereafter, it is possible to calibrate with high accuracy using the current signal source 380 by compensating for the estimated offset amount.
 以上説明したように、第3の実施形態に係る校正回路は、内部に電流信号源を備えている。従って、この校正回路によれば、当該校正回路の後段に接続された差動増幅器の入力インピーダンスを上記電流信号源を用いて校正可能である。すなわち、使用環境の変化および経年などによる上記差動増幅器の劣化を補償できるので、当該差動増幅器の使用環境の拡大および寿命の延長が期待できる。 As described above, the calibration circuit according to the third embodiment includes the current signal source therein. Therefore, according to the calibration circuit, the input impedance of the differential amplifier connected to the subsequent stage of the calibration circuit can be calibrated using the current signal source. That is, since the deterioration of the differential amplifier due to changes in the usage environment and aging can be compensated for, it can be expected that the usage environment of the differential amplifier will be expanded and the life thereof extended.
 なお、図7の校正回路300は、図1の校正回路100に電流信号源380を追加した構成に相当する。しかしながら、本実施形態に係る校正回路は、図6の校正回路200に電流信号源380を追加した構成に相当してもよい。この場合には、電流信号源380の出力端子は、単相増幅器260の後段ではなく前段に接続すればよい。 7 corresponds to a configuration in which a current signal source 380 is added to the calibration circuit 100 in FIG. However, the calibration circuit according to the present embodiment may correspond to a configuration in which the current signal source 380 is added to the calibration circuit 200 of FIG. In this case, the output terminal of the current signal source 380 may be connected to the preceding stage rather than the subsequent stage of the single-phase amplifier 260.
 (第4の実施形態) 
 第4の実施形態に係る校正回路の具体例が図10に示される。図10の校正回路500は、無線受信機の一部として機能する。校正回路500は、入力端子、第1の出力端子および第2の出力端子を持つ。校正回路500の入力端子は、アンテナ20に接続される。校正回路500の第1の出力端子および第2の出力端子は、LNAとしての差動増幅器30の非反転入力端子および反転入力端子にそれぞれ接続される。校正回路500は、単相入力信号を差動出力信号へと変換し、当該差動出力信号を差動増幅器30へと出力する。差動増幅器30の入力インピーダンスの校正時に、校正回路500の入力端子は外部の信号源10に直接的または間接的に接続される。具体的には、校正回路400の入力端子がアンテナ20から切り離されて信号源10に接続されてもよいし、アンテナ20が信号源10から放射される無線信号を受信し、受信無線信号を校正回路400の入力端子へと供給してもよい。そして、校正回路500は、信号源10から供給される単相入力信号を用いて差動増幅器30の入力インピーダンスを校正する。
(Fourth embodiment)
A specific example of the calibration circuit according to the fourth embodiment is shown in FIG. The calibration circuit 500 in FIG. 10 functions as a part of the wireless receiver. The calibration circuit 500 has an input terminal, a first output terminal, and a second output terminal. The input terminal of the calibration circuit 500 is connected to the antenna 20. The first output terminal and the second output terminal of the calibration circuit 500 are respectively connected to the non-inverting input terminal and the inverting input terminal of the differential amplifier 30 as the LNA. The calibration circuit 500 converts the single-phase input signal into a differential output signal and outputs the differential output signal to the differential amplifier 30. When the input impedance of the differential amplifier 30 is calibrated, the input terminal of the calibration circuit 500 is directly or indirectly connected to the external signal source 10. Specifically, the input terminal of the calibration circuit 400 may be disconnected from the antenna 20 and connected to the signal source 10, or the antenna 20 receives a radio signal radiated from the signal source 10 and calibrates the received radio signal. You may supply to the input terminal of the circuit 400. FIG. The calibration circuit 500 calibrates the input impedance of the differential amplifier 30 using the single-phase input signal supplied from the signal source 10.
 校正回路500は、単相差動変換回路110と、検波器120と、検波器130と、比較部540と、マッチング制御回路550と、スイッチング回路590とを含む。 Calibration circuit 500 includes a single-phase differential conversion circuit 110, a detector 120, a detector 130, a comparison unit 540, a matching control circuit 550, and a switching circuit 590.
 検波器120は、出力端子が比較部140の第1の入力端子の代わりにスイッチング回路590の第1の入力端子に接続される点で図1の検波器120とは異なる。検波器130は、出力端子が比較部140の第2の入力端子の代わりにスイッチング回路590の第2の入力端子に接続される点で図1の検波器130とは異なる。 The detector 120 is different from the detector 120 of FIG. 1 in that the output terminal is connected to the first input terminal of the switching circuit 590 instead of the first input terminal of the comparison unit 140. The detector 130 is different from the detector 130 of FIG. 1 in that the output terminal is connected to the second input terminal of the switching circuit 590 instead of the second input terminal of the comparison unit 140.
 スイッチング回路590は、第1の入力端子、第2の入力端子、第1の出力端子および第2の出力端子を持つ。スイッチング回路590の第1の入力端子は検波器120の出力端子に接続される。スイッチング回路590の第2の入力端子は検波器130の出力端子に接続される。スイッチング回路590の第1の出力端子は比較部540の第1の入力端子に接続される。スイッチング回路590の第2の出力端子は比較部540の第2の入力端子に接続される。 The switching circuit 590 has a first input terminal, a second input terminal, a first output terminal, and a second output terminal. The first input terminal of the switching circuit 590 is connected to the output terminal of the detector 120. The second input terminal of the switching circuit 590 is connected to the output terminal of the detector 130. The first output terminal of the switching circuit 590 is connected to the first input terminal of the comparison unit 540. The second output terminal of the switching circuit 590 is connected to the second input terminal of the comparison unit 540.
 スイッチング回路590は、第1の動作状態および第2の動作状態を持つ。スイッチング回路590は、第1の動作状態にある第1の期間に、第1の入力端子と第1の出力端子との間を短絡し、第2の入力端子と第2の出力端子との間を短絡する。他方、スイッチング回路590は、第2の動作状態にある第2の期間に、第1の入力端子と第2の出力端子との間を短絡し、第2の入力端子と第1の出力端子との間を短絡する。 The switching circuit 590 has a first operation state and a second operation state. The switching circuit 590 short-circuits between the first input terminal and the first output terminal during the first period in the first operation state, and between the second input terminal and the second output terminal. Short circuit. On the other hand, the switching circuit 590 short-circuits between the first input terminal and the second output terminal in the second period in the second operation state, and the second input terminal and the first output terminal Short-circuit between the two.
 比較部540は、第1の入力端子、第2の入力端子および出力端子を持つ。比較部540の第1の入力端子は、スイッチング回路590の第1の出力端子に接続される。比較部540の第2の入力端子は、スイッチング回路590の第2の出力端子に接続される。比較部540の出力端子は、マッチング制御回路550の入力端子に接続される。 The comparison unit 540 has a first input terminal, a second input terminal, and an output terminal. The first input terminal of the comparison unit 540 is connected to the first output terminal of the switching circuit 590. The second input terminal of the comparison unit 540 is connected to the second output terminal of the switching circuit 590. The output terminal of the comparison unit 540 is connected to the input terminal of the matching control circuit 550.
 比較部540は、第1の入力端子に印加される第1の電圧(Vinp)と第2の入力端子に印加される第2の電圧(Vinm)とを比較する。比較部540は、比較結果を示す比較結果信号をマッチング制御回路550へと出力する。但し、比較部540は、直流オフセット(VDO)を持つ。この直流オフセット(VDO)として、比較部540の基本的な回路構成に依存する基本直流オフセットがそのまま用いられてもよいし、当該基本直流オフセットが適切な大きさでなければこれを意図的に調整してもよい。 The comparison unit 540 compares the first voltage (V inp ) applied to the first input terminal and the second voltage (V inm ) applied to the second input terminal. Comparison unit 540 outputs a comparison result signal indicating the comparison result to matching control circuit 550. However, the comparison unit 540 has a DC offset (V DO ). As this DC offset (V DO ), a basic DC offset depending on the basic circuit configuration of the comparison unit 540 may be used as it is. If the basic DC offset is not an appropriate magnitude, this is intentionally used. You may adjust.
 具体的には、比較部540は、下記数式(3)に示される比較結果信号(Vout)を生成する。  Specifically, the comparison unit 540 generates a comparison result signal (V out ) represented by the following mathematical formula (3).
Figure JPOXMLDOC01-appb-M000003
Figure JPOXMLDOC01-appb-M000003
 数式(3)において、Sgn(・)は符号関数であって、・の符号を返す。すなわち、スイッチング回路590が第1の動作状態にある第1の期間には、比較結果信号は(V2-V3+VDO)の符号を示す。他方、スイッチング回路590が第2の動作状態にある第2の期間には、比較結果信号は(V3-V2+VDO)の符号を示す。 In Equation (3), Sgn (•) is a sign function and returns the sign of •. That is, in the first period in which the switching circuit 590 is in the first operation state, the comparison result signal indicates the sign of (V2−V3 + V DO ). On the other hand, in the second period in which the switching circuit 590 is in the second operation state, the comparison result signal indicates the sign of (V3−V2 + V DO ).
 マッチング制御回路550は、入力端子および出力端子を持つ。マッチング制御回路550の入力端子は比較部140の出力端子に接続される。マッチング制御回路550の出力端子は、単相差動変換回路110の制御端子に接続される。 Matching control circuit 550 has an input terminal and an output terminal. The input terminal of the matching control circuit 550 is connected to the output terminal of the comparison unit 140. The output terminal of the matching control circuit 550 is connected to the control terminal of the single-phase differential conversion circuit 110.
 マッチング制御回路550は、単相差動変換回路110に含まれる可変インピーダンス素子のインピーダンスを制御する制御コードを当該単相差動変換回路110へと出力する。より具体的には、マッチング制御回路550は、差動増幅器30の入力インピーダンスの校正時には、スイッチング回路590が第1の動作状態にある第1の期間および第2の動作状態にある第2の期間のそれぞれに亘って、制御コードを複数の異なる値に設定する。そして、マッチング制御回路550は、設定された制御コードに対応する比較結果信号を比較部540から入力し、当該制御コードと対応付けて蓄積する。マッチング制御回路550は、蓄積された制御コードと比較結果信号との対応関係を分析することにより最適な制御コードを探索する。最適な制御コードは、例えば第1の検波信号の電圧と第2の検波信号の電圧との間の差の絶対値を最小化させる値である。 Matching control circuit 550 outputs a control code for controlling the impedance of the variable impedance element included in single-phase differential conversion circuit 110 to single-phase differential conversion circuit 110. More specifically, when the input impedance of the differential amplifier 30 is calibrated, the matching control circuit 550 includes a first period in which the switching circuit 590 is in the first operation state and a second period in which the switching circuit 590 is in the second operation state. Each of the control codes is set to a plurality of different values. Then, the matching control circuit 550 receives a comparison result signal corresponding to the set control code from the comparison unit 540 and stores it in association with the control code. The matching control circuit 550 searches for an optimal control code by analyzing the correspondence between the stored control code and the comparison result signal. The optimum control code is, for example, a value that minimizes the absolute value of the difference between the voltage of the first detection signal and the voltage of the second detection signal.
 図11は、制御コードの変化に対する(V2-V3+VDO)および(V3-V2+VDO)の変化を例示する。図11の例では、VDO=50mVに設定されている。図11によれば、制御コード=19のときに(V2-V3+VDO)≒VDOかつ(V3-V2+VDO)≒VDO、すなわち、V2≒V3である。故に、最適な制御コード=19である。 FIG. 11 illustrates changes in (V2−V3 + V DO ) and (V3−V2 + V DO ) with respect to changes in the control code. In the example of FIG. 11, V DO = 50 mV is set. According to FIG. 11, when the control code = 19, (V2−V3 + V DO ) ≈V DO and (V3−V2 + V DO ) ≈V DO , that is, V2≈V3. Therefore, the optimal control code = 19.
 但し、比較結果信号は、(V2-V3+VDO)または(V3-V2+VDO)そのものではなくこれらの符号を示す。すなわち、図11に示されるように(V2-V3+VDO)および(V3-V2+VDO)が変化する場合に、比較結果信号は図12に例示されるように変化する。図12に示されるように、大部分の制御コードに対して(V2-V3+VDO)の符号および(V3-V2+VDO)の符号は相違するが、最適な制御コード(=19)周辺の制御コードに対して(V2-V3+VDO)の符号および(V3-V2+VDO)の符号は一致する。 However, the comparison result signal indicates these codes, not (V2−V3 + V DO ) or (V3−V2 + V DO ) itself. That is, when (V2−V3 + V DO ) and (V3−V2 + V DO ) change as shown in FIG. 11, the comparison result signal changes as illustrated in FIG. As shown in FIG. 12, the sign of (V2−V3 + V DO ) and the sign of (V3−V2 + V DO ) are different for most control codes, but the control codes around the optimum control code (= 19). In contrast, the sign of (V2−V3 + V DO ) and the sign of (V3−V2 + V DO ) match.
 故に、マッチング制御回路550は、スイッチング回路590が第1の動作状態にある第1の期間および第2の動作状態にある第2の期間にそれぞれ得られた比較結果信号が一致した1つ以上の制御コード(図12の例では、「18」,「19」,「20」)を抽出する。そして、マッチング制御回路550は、抽出した制御コードにおける中央値(図12の例では、「19」)を最適な制御コードとして決定する。なお、最適な制御コード付近では、(V2-V3)および(V3-V2)は制御コードの変化に対して概ね線形に変化するので抽出される制御コードの総数は通常奇数個である。しかしながら、ノイズ等の影響により偶数個の制御コードが抽出されるおそれもある。マッチング制御回路550は、偶数個の制御コードが抽出された場合には抽出された制御コードの中央値に対して床関数または天井関数を適用することによって得られる値を制御コードとして決定すればよい。 Therefore, the matching control circuit 550 includes one or more matching result signals obtained in the first period in which the switching circuit 590 is in the first operation state and the second period in which the switching circuit 590 is in the second operation state. A control code (“18”, “19”, “20” in the example of FIG. 12) is extracted. Then, the matching control circuit 550 determines the median value (“19” in the example of FIG. 12) in the extracted control code as the optimal control code. In the vicinity of the optimum control code, since (V2-V3) and (V3-V2) change substantially linearly with respect to the change of the control code, the total number of extracted control codes is usually an odd number. However, an even number of control codes may be extracted due to the influence of noise or the like. When an even number of control codes are extracted, matching control circuit 550 may determine a value obtained by applying a floor function or a ceiling function to the median value of the extracted control codes as a control code. .
 以上説明したように、第4の実施形態に係る校正回路は、直流オフセットを持つ比較部に2つの検波信号をそのまま入力した第1の期間とこれらを互いに入れ替えて入力した第2の期間とのそれぞれに亘って比較結果信号の変化を分析する。そして、この校正回路は、第1の期間と第2の期間とで比較結果信号が示す符号が一致する制御コードから最適な制御コードを決定する。従って、この校正回路によれば、上記比較部の基本的な回路構成に依存する基本直流オフセットに関わらず精度良く最適な制御コードを探索できる。さらに、この校正回路によれば、比較部は、2入力信号の差電圧の絶対値を検出する能力を必要とされない。 As described above, the calibration circuit according to the fourth embodiment includes a first period in which two detection signals are input as they are to a comparison unit having a DC offset and a second period in which these detection signals are interchanged. The change of the comparison result signal is analyzed over each. Then, the calibration circuit determines an optimal control code from the control codes in which the signs indicated by the comparison result signals match in the first period and the second period. Therefore, according to this calibration circuit, an optimum control code can be searched with high accuracy regardless of the basic DC offset depending on the basic circuit configuration of the comparison unit. Furthermore, according to this calibration circuit, the comparison unit is not required to have the ability to detect the absolute value of the difference voltage between the two input signals.
 (第5の実施形態) 
 第5の実施形態に係る受信機は、前述の第1の実施形態乃至第4の実施形態のいずれかに係る校正回路を含み、LNAとしての差動増幅器の入力インピーダンスを構成することができる。具体的には、本実施形態に係る受信機は、図9に例示されるように、アンテナ20と、校正回路400と、差動増幅器30と、復調器40とを備える。
(Fifth embodiment)
The receiver according to the fifth embodiment includes the calibration circuit according to any of the first to fourth embodiments described above, and can configure the input impedance of the differential amplifier as the LNA. Specifically, the receiver according to the present embodiment includes an antenna 20, a calibration circuit 400, a differential amplifier 30, and a demodulator 40, as illustrated in FIG.
 アンテナ20は、図示されない送信装置によって送信されたRF信号を受信する。アンテナ20は、RF信号を校正回路400へと出力する。 The antenna 20 receives an RF signal transmitted by a transmission device (not shown). The antenna 20 outputs an RF signal to the calibration circuit 400.
 校正回路400は、単相入力信号としてのRF信号を差動出力信号を得る。校正回路400は、差動出力信号を差動増幅器30へと供給する。なお、校正回路400は、前述の第1の実施形態乃至第4の実施形態のいずれかに係る校正回路に相当する。すなわち、差動増幅器30の入力インピーダンスの校正時に、校正回路400は図9には示されないインピーダンス可変素子の最適な制御コードを探索する。 The calibration circuit 400 obtains a differential output signal from the RF signal as a single-phase input signal. The calibration circuit 400 supplies the differential output signal to the differential amplifier 30. The calibration circuit 400 corresponds to the calibration circuit according to any of the first to fourth embodiments described above. That is, when the input impedance of the differential amplifier 30 is calibrated, the calibration circuit 400 searches for an optimal control code for the variable impedance element not shown in FIG.
 差動増幅器30は、校正回路400から差動出力信号を入力する。差動増幅器30は、差動出力信号を増幅することによって差動増幅信号を得る。差動増幅器30は、差動増幅信号を復調器40へと出力する。 The differential amplifier 30 inputs a differential output signal from the calibration circuit 400. The differential amplifier 30 obtains a differential amplified signal by amplifying the differential output signal. The differential amplifier 30 outputs the differential amplified signal to the demodulator 40.
 復調器40は、差動増幅信号をダウンコンバートおよび復調することによって受信データを得る。 The demodulator 40 obtains received data by down-converting and demodulating the differential amplified signal.
 以上説明したように、第5の実施形態に係る受信機は、前述の第1の実施形態乃至第4の実施形態のいずれかに係る校正回路を含む。従って、この受信機によれば、LNAとしての差動増幅器の入力インピーダンスを効率的に校正することができる。 As described above, the receiver according to the fifth embodiment includes the calibration circuit according to any of the first to fourth embodiments described above. Therefore, according to this receiver, the input impedance of the differential amplifier as the LNA can be calibrated efficiently.
 本発明のいくつかの実施形態を説明したが、これらの実施形態は、例として提示したものであり、発明の範囲を限定することは意図していない。これら新規な実施形態は、その他の様々な形態で実施されることが可能であり、発明の要旨を逸脱しない範囲で、種々の省略、置き換え、変更を行うことができる。これら実施形態やその変形は、発明の範囲や要旨に含まれるとともに、特許請求の範囲に記載された発明とその均等の範囲に含まれる。 Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

Claims (8)

  1.  入力端子、第1の出力端子および第2の出力端子を持ち、インピーダンスが制御コードに依存して変化するインピーダンス可変素子を含み、単相入力信号を差動出力信号へと変換する単相差動変換回路と、
     前記単相差動変換回路の第1の出力端子に接続され、第1の検波器入力信号を検波することによって第1の検波信号を生成する第1の検波器と、
     前記単相差動変換回路の第2の出力端子に接続され、第2の検波器入力信号を検波することによって第2の検波信号を生成する第2の検波器と、
     前記第1の検波信号の電圧および前記第2の検波信号の電圧を比較し、比較結果を示す比較結果信号を生成する比較部と、
     前記制御コードを複数の異なる値に設定し、設定された制御コードとこれに対応する比較結果信号の対応関係を分析することによって所望の制御コードを探索する制御回路と
     を具備する校正回路。
    Single-phase differential conversion that has an input terminal, a first output terminal, and a second output terminal, includes an impedance variable element whose impedance changes depending on the control code, and converts a single-phase input signal into a differential output signal Circuit,
    A first detector connected to a first output terminal of the single-phase differential conversion circuit and generating a first detection signal by detecting a first detector input signal;
    A second detector connected to a second output terminal of the single-phase differential conversion circuit and generating a second detection signal by detecting a second detector input signal;
    A comparison unit that compares the voltage of the first detection signal and the voltage of the second detection signal and generates a comparison result signal indicating a comparison result;
    A calibration circuit comprising: a control circuit for searching for a desired control code by setting the control code to a plurality of different values and analyzing a correspondence relationship between the set control code and a comparison result signal corresponding thereto.
  2.  前記制御回路は、前記第1の検波信号の電圧および前記第2の検波信号の電圧の差電圧の絶対値が最小であった時に設定された制御コードを前記所望の制御コードとして決定する、請求項1の校正回路。 The control circuit determines, as the desired control code, a control code that is set when an absolute value of a voltage difference between the voltage of the first detection signal and the voltage of the second detection signal is minimum. Item 1. Calibration circuit.
  3.  前記制御回路は、バイナリ探索を行うことによって前記所望の制御コードを探索する、請求項1の校正回路。 The calibration circuit according to claim 1, wherein the control circuit searches for the desired control code by performing a binary search.
  4.  前記単相差動変換回路の第1の出力端子と前記第1の検波器との間に挿入される第1の単相増幅器と、
     前記単相差動変換回路の第2の出力端子と前記第2の検波器との間に挿入される第2の単相増幅器と
     をさらに具備する請求項1の校正回路。
    A first single-phase amplifier inserted between a first output terminal of the single-phase differential conversion circuit and the first detector;
    The calibration circuit according to claim 1, further comprising: a second single-phase amplifier inserted between the second output terminal of the single-phase differential conversion circuit and the second detector.
  5.  電流信号を発生し、当該電流信号を前記単相差動変換回路の第1の出力端子に注入する電流信号源をさらに具備する、請求項1の校正回路。 2. The calibration circuit according to claim 1, further comprising a current signal source that generates a current signal and injects the current signal into the first output terminal of the single-phase differential conversion circuit.
  6.  前記比較結果信号は、第1の期間には前記第1の検波信号の電圧から前記第2の検波信号の電圧を減算して直流オフセットを加算することによって得られる電圧の符号を示し、前記第1の期間とは異なる第2の期間には前記第2の検波信号の電圧から前記第1の検波信号の電圧を減算して前記直流オフセットを加算することによって得られる電圧の符号を示す、請求項1の校正回路。 The comparison result signal indicates a sign of a voltage obtained by subtracting the voltage of the second detection signal from the voltage of the first detection signal and adding a DC offset in the first period, The second period different from the period of 1 indicates a sign of a voltage obtained by subtracting the voltage of the first detection signal from the voltage of the second detection signal and adding the DC offset. Item 1. Calibration circuit.
  7.  前記制御回路は、前記第1の期間における前記比較結果信号と前記第2の期間における前記比較結果信号とが一致する少なくとも1つの制御コードを抽出し、抽出された少なくとも1つの制御コードの中央値に基づいて前記所望の制御コードを決定する、請求項6の校正回路。 The control circuit extracts at least one control code in which the comparison result signal in the first period matches the comparison result signal in the second period, and a median value of the extracted at least one control code 7. The calibration circuit of claim 6, wherein the desired control code is determined based on:
  8.  請求項1の校正回路と、
     前記差動出力信号を増幅することによって差動増幅信号を得る差動増幅器と、
     前記差動増幅信号をダウンコンバートおよび復調することによって受信データを得る復調器と
     を具備する、受信機。
    A calibration circuit according to claim 1;
    A differential amplifier that obtains a differential amplified signal by amplifying the differential output signal;
    A demodulator that obtains received data by down-converting and demodulating the differential amplified signal.
PCT/JP2015/068337 2014-07-09 2015-06-25 Calibration circuit and receiver WO2016006464A1 (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0951242A (en) * 1995-08-04 1997-02-18 Toshiba Corp Single phase differential conversion circuit device
JPH1155044A (en) * 1997-08-04 1999-02-26 Miyoshi Denshi Kk High frequency power amplifier
US20090051441A1 (en) * 2007-08-24 2009-02-26 Branch Jason H Low-noise amplifier
JP2011205229A (en) * 2010-03-24 2011-10-13 Toshiba Corp Radio receiving circuit

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0951242A (en) * 1995-08-04 1997-02-18 Toshiba Corp Single phase differential conversion circuit device
JPH1155044A (en) * 1997-08-04 1999-02-26 Miyoshi Denshi Kk High frequency power amplifier
US20090051441A1 (en) * 2007-08-24 2009-02-26 Branch Jason H Low-noise amplifier
JP2011205229A (en) * 2010-03-24 2011-10-13 Toshiba Corp Radio receiving circuit

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