WO2016000754A1 - Unit and method for synchronous rectification control - Google Patents

Unit and method for synchronous rectification control Download PDF

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Publication number
WO2016000754A1
WO2016000754A1 PCT/EP2014/063900 EP2014063900W WO2016000754A1 WO 2016000754 A1 WO2016000754 A1 WO 2016000754A1 EP 2014063900 W EP2014063900 W EP 2014063900W WO 2016000754 A1 WO2016000754 A1 WO 2016000754A1
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WO
WIPO (PCT)
Prior art keywords
turn
time
synchronous
new
power switch
Prior art date
Application number
PCT/EP2014/063900
Other languages
French (fr)
Inventor
Jun Ma
Georgios TSENGENES
Grover TORRICO
Original Assignee
Huawei Technologies Co.,Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huawei Technologies Co.,Ltd filed Critical Huawei Technologies Co.,Ltd
Priority to EP14736346.9A priority Critical patent/EP3149851A1/en
Priority to PCT/EP2014/063900 priority patent/WO2016000754A1/en
Priority to CN201480079765.7A priority patent/CN106664080B/en
Publication of WO2016000754A1 publication Critical patent/WO2016000754A1/en

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Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/06Modifications for ensuring a fully conducting state
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/08Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/13Modifications for switching at zero crossing
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/0003Details of control, feedback or regulation circuits
    • H02M1/0009Devices or circuits for detecting current in a converter
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/0003Details of control, feedback or regulation circuits
    • H02M1/0012Control circuits using digital or numerical techniques
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/38Means for preventing simultaneous conduction of switches
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/22Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • H02M3/33576Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer
    • H02M3/33592Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer having a synchronous rectifier circuit or a synchronous freewheeling circuit at the secondary side of an isolation transformer
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/30Modifications for providing a predetermined threshold before switching
    • H03K2017/307Modifications for providing a predetermined threshold before switching circuits simulating a diode, e.g. threshold zero
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

  • Implementations described herein relate generally to a
  • synchronous rectification control unit and a method for controlling synchronous rectification.
  • a mechanism for generating synchronous or non- synchronous pulse width modulation, PWM, control signals usable for controlling switching a power switch is herein described.
  • Power switches for example switches being realised by use of MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) of other suitable types of transistors, are used in a number of circuits today.
  • power switches are used power converters, which may be implemented as half bridge power converters or full bridge power converters.
  • full bridge power converter circuits may include a synchronous side and a non-synchronous side.
  • the non- synchronous side is the side to which the original/non- converted signal/power is inputted
  • the synchronous side is the side where the manipulated/converted signal/power is outputted.
  • the synchronous rectification side is defined as a side of the circuit, at which side the synchronous rectification power switches are located.
  • the non synchronous rectification side is defined as side of the circuit, at which side the main power switches are located.
  • the non-synchronous side of the circuit can correspond to different physical sides of the circuit, depending on in which direction the signal/power should be manipulated/converted, since the original
  • the synchronous side of the circuit can correspond to different physical sides of the circuit, depending on in which direction the signal/power should be manipulated/converted, since the manipulated/converted
  • Circuits including such power switches, e.g. power
  • transforming circuits or the like can be utilised in a large variety of units, e.g. in A User Equipment (UE) , also known as a mobile station, wireless terminal and/ or mobile terminal enabled to communicate wirelessly in a wireless communication network, sometimes also referred to as a cellular radio system.
  • UE User Equipment
  • Such circuits can also be utilised in a radio network node, or base station, e.g., a Radio Base Station (RBS) , which in some networks may be referred to as "eNB”, "eNodeB”,
  • NodeB or “B node”, depending on the technology and/ or terminology used. Switching of the power converters in such circuits aims at being as power efficient as possible.
  • MOSFETs, and other transistors being used for realising the power switches generally have a lower electrical resistance when the switch is closed/conducting than when the switch is open/non- conducting.
  • a MOSFET switch has a voltage drop over the switch corresponding to the body diode voltage of the MOSFET, which can be e.g. 0.7 Volt, when the switch is open.
  • the voltage drop over the switch is much lower, e.g. 0.01 Volt according to a non-limiting example. Therefore, to achieve as high power efficiency as possible, as much power as possible should flow through the closed switch, which has the lower voltage drop.
  • rectification control solutions have been proposed.
  • One such solution tunes a synchronous rectification duty cycle based on detection of a synchronous rectification body diode conduction for a power switch. If a body diode conduction is present, the duty cycle for the synchronous rectification is increased until the body diode conduction stops. On the contrary, if a body diode conduction is not present, the synchronous rectification duty cycle based on detection of a synchronous rectification body diode conduction for a power switch. If a body diode conduction is present, the duty cycle for the synchronous rectification is increased until the body diode conduction stops. On the contrary, if a body diode conduction is not present, the synchronous
  • a synchronous rectification control unit including:
  • control algorithm circuit configured to determine a turn- on time on and a turn-off time T 0 ff to be used for a
  • a PWM signal generator configured to generate, by use of said determined turn — on T ori time and turn-off T 0ff time, said synchronous PWM control signal SQ1 for controlling switching of the power switch when the power switch is in a synchronous side of a circuit; or said non-synchronous PWM control signal Ql for controlling switching of the power switch when the power switch is in a non-synchronous side of the circuit.
  • the voltage sensing circuit is further configured to detect an on- edge body diode conduction for the power switch of said non- synchronous side and to output an on-edge voltage pulse signal Von c corresponding to said on-edge body diode conduction.
  • the time that the diode start to conduct can be exactly determined.
  • the control algorithm circuit is further
  • T c , T d _ new T d -T dm 0 ⁇ ⁇ .
  • the dead time is minimized in order to achieve a minimum diode conduction time, which results in high power efficiency .
  • said control algorithm circuit is further configured to set a new dead time value T d new to a
  • T c 0.
  • - said voltage sensing circuit is further configured to detect an on-edge body diode conduction and an off-edge body diode conduction for the power switch and to output an on-edge voltage pulse signal ⁇ ⁇ and an off-edge voltage pulse signal V 0 ff corresponding to said on-edge body diode conduction and said off-edge body diode conduction, respectively;
  • said capture unit is further configured to determine a turn- on time duration T on c as a time duration of the on-edge voltage pulse signal V on c , and to determine a turn-off time duration T of f c for said synchronous PWM control signal SQ1 as a time duration of the off-edge voltage pulse signal V off c .
  • the information of the diode conduction is detected.
  • the adaption of the turn-on time T on to a new value T on new based on the detected turn-on time duration T on c is usable for minimizing the time that the diode conducts, thus for increasing the efficiency.
  • Ton c o
  • the turn-off time T 0 ff cr information of the diode conduction is also detected.
  • the turn-off time T 0 ff is then adapted to a new value T 0 ff new based on the detected turn-off time duration T 0 ff c i n order to minimize the time that diode conducts, i.e. to increase the power efficiency.
  • said control algorithm circuit is further configured to set said turn-off time T 0 ff to a predetermined value T 0 ff pr eci if a turn-off time duration T 0 ff c has a value equal to zero;
  • T 0 ff c 0 there is a risk for current shoot-through. This risk is here identified, and a predefined value for the turn-off time T 0ff preci time is set, which guarantees that no shoot- through will happen.
  • said voltage sensing circuit is further configured to output a logic high value for said voltage pulse signal V DC when said body diode is conducting a current;
  • said capture unit is configured to determine the time duration T c as equal to a time duration during which said voltage pulse signal V DC has the logic high value.
  • an accurate time reference for the voltage pulse signal V DC can be captured, which is usable for increasing the power efficiency.
  • the object is achieved by an integrated circuit comprising at least one of the synchronous rectification control units according to the first aspect as such or according any of the preceding implementation forms of the first aspect.
  • the integrated circuit according to the second aspect has advantages corresponding to the advantages stated above for the first aspect.
  • the object is achieved by an electronic device having a power converter comprising the synchronous rectification control units according to the first aspect as such or according any of the preceding
  • the electronic device according to the third aspect has advantages corresponding to the advantages stated above for the first aspect.
  • the object is achieved by a method for controlling synchronous rectification, including:
  • an on-edge body diode conduction for the power switch of said non-synchronous side is detected, and an on- edge voltage pulse signal V on c corresponding to said on-edge body diode conduction is output.
  • the time that the diode start to conduct can be exactly determined. Based on this time, it is then possible to manipulate the dead-time between the switching pulses in order to minimize the diode conduction time and to improve the power efficiency.
  • the dead time is minimized in order to achieve a minimum diode conduction time, which results in high power efficiency .
  • a turn-on time duration T on c is determined as a time duration of the on-edge voltage pulse signal ⁇ ⁇ cr and a turn-off time duration T 0 ff c for said synchronous PWM control signal SQ1 is determined as a time duration of the off-edge voltage pulse signal V 0 ff c ⁇
  • the information of the diode conduction is detected.
  • the adaption of the turn-on time T on to a new value T on new based on the detected turn-on time duration T on c is usable for minimizing the time that diode conducts, thus for increasing the efficiency.
  • a new turn-on time T on new is set to a predetermined value T on pred if said turn-on time duration T on c has a value equal to zero;
  • Ton c o there is a risk for current shoot-through. This situation is here identified, and predefined value for the turn-on time T on preci time is set in order to guarantee that no shoot-through will happen.
  • said turn-off time T 0 ff is updated to a new turn-off time T 0 ff new if said turn-off time duration T 0 ff c has a value greater than zero; T 0 ff c >0; said new turn-off time
  • T 0 ff new being equal to an already used turn-off time T 0 ff plus a portion T 0 ff m of said turn-off time duration T 0 ff c Toff new
  • the turn-off time T 0 ff is then adapted to a new value T 0 ff new based on the detected turn-off time duration T 0ff c i n order to minimize the time that the diode conducts, i.e. to increase the power efficiency.
  • said turn-off time T off is set to a
  • T off c 0 there is a risk for current shoot-through. This risk is here identified, and a predefined value for the turn-off time T off pred time is set, which guarantees that no shoot- through will happen.
  • a logic high value is output for said voltage pulse signal V DC when said body diode is conducting a current
  • the time duration T c is determined as equal to a time duration during which said voltage pulse signal V DC has the logic high value.
  • an accurate time reference for the voltage pulse signal V DC can be captured, which is usable for increasing the power efficiency.
  • the object is achieved by a computer program with a program code for performing a method according to the second aspect when the computer program runs on a computer.
  • the computer program according to the fifth aspect has
  • program code is easily modified and updated.
  • a Micro Controller Unit provides PWM signals to both non-SR side and SR side power switches.
  • a delay time i.e. the dead time
  • the turn-on time of the PWM signals while the turn-off time remains unchanged.
  • both the turn-on and the turn-off times of PWM signals are supposed to be tuned.
  • rectification control unit being implemented in the MCU features event capture functionality, which facilitates saving of information corresponding to captured events in
  • a voltage sensing circuit is used for detecting body diode conduction and to produce corresponding voltage pulse signals to be captured by the capture unit of the MCU.
  • At least one voltage sensing circuit is required to detect the body diode conduction related to the on-time PWM signal, and at least one dedicated capture unit is assigned to capture corresponding pulse signals and to save information corresponding to the pulse signals in a
  • At least one voltage sensing circuit is required to detect the body diode conduction related to both the SR on-time and off-time PWM signals, and at least another one dedicated capture unit is assigned to capture
  • a voltage pulse signal is generated by the voltage sensing circuit and is instantaneously captured by the capture unit of the MCU.
  • the captured pulse width includes body diode conduction time information that is saved in a capture register/memory.
  • the control algorithm circuit determines a desired turn-on and/or turn-off time
  • Fig. 1 is a schematic block diagram illustrating a
  • Fig. 2 is a schematic block diagram illustrating a
  • FIG. 3 is a schematic block diagram illustrating a
  • Fig. 4 is a flow chart diagram illustrating some
  • Fig. 5 is a block diagram illustrating some embodiments.
  • Fig. 6 illustrates examples of input and output signals
  • Fig. 7 illustrates examples of input and output signals
  • Fig. 8 illustrates examples of input and output signals
  • Fig. 9 illustrates examples of input and output signals
  • Fig. 10 illustrates examples of input and output signals
  • Fig. 11 illustrates examples of input and output signals values according to some embodiments.
  • Fig. 12 is a flow chart diagram illustrating the synchronous rectification control method according some embodiments .
  • Fig. 13 is a schematic block diagram illustrating a
  • Embodiments of the invention described herein are defined as a synchronous rectification control unit and a method for controlling synchronous rectification, which may be put into practice in the embodiments described below. These embodiments may, however, be exemplified and realised in many different forms and are not to be considered as limited to the embodi ⁇ ments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete.
  • the synchronous rectification control unit 40 includes a voltage sensing circuit 25 a capture unit 24, a memory (not shown in figure l), a control algorithm circuit 26, and a pulse width modulation, PWM, signal generator 32.
  • a voltage difference over a power switch 14 is an input signal 30 to the synchronous rectification control unit 40, as will be described more in detail in connection with figures 2 and 3 below .
  • the voltage sensing circuit 25 is configured to detect body diode conduction for the power switch 14.
  • the voltage sensing circuit 25 is also configured to output a voltage pulse signal V DC corresponding to the detected body diode conduction.
  • the voltage sensing circuit 25 is further configured to output a logic high value for the voltage pulse signal V DC when the body diode is conducting a current.
  • the voltage sensing circuit 25 is further configured to output a logic low value for the voltage pulse signal V DC when the body diode is not conducting a current .
  • the voltage sensing circuit 25 is configured to consider the voltage difference over the power switch 14, e.g. between the potential points 22 and 23 in the non- limiting example in figure 2, as input 30 to the synchronous rectification control method.
  • the voltage sensing circuit 25 outputs a voltage pulse signal which indicates the conduction time of the body diode 141 of the power switch 14 e.g in figure 2.
  • the voltage sensing circuit 25 is connected to a Micro Controller Unit, MCU, 27.
  • the MCU includes the capture unit 24, the memory, the control algorithm 26, and the PWM signal generator 32.
  • the capture unit 24 is configured to determine a time duration T c for the voltage pulse signal V DC being output by the voltage sensing unit 25.
  • the capture unit 24 is also configured to store the time duration T c in the memory (not shown) .
  • the capture unit 24 may be included in the MCU as stated above.
  • the capture unit 24 is further configured to determine the time duration T c as being equal to a time duration during which the voltage pulse signal V DC has a logic high value.
  • the control algorithm circuit 26 is configured to determine a turn-on time T on and a turn-off time T 0 ff to be used for a synchronous PWM control signal SQ1 or a non-synchronous PWM control signal Ql during an upcoming switching cycle. This determination of the turn—on T ori and turn—off T 0 ff times is based on the stored time duration T c .
  • the control algorithm circuit 26 may be included in the MCU.
  • the capture unit 24 is configured to capture the
  • the control algorithm circuit 26 is configured to manipulate the turn-on Ton and turn-off T 0 ff times, or the dead-time between the first 14 and second 13 power switches (shown in figure 3) based on the captured duration time, as is described below.
  • dead time is a delay time inserted by one power switch at one or more edges of its switching cycles in order to provide a blank switching time in one complementary switch pair, e.g. a blank switching time between conduction for a first switch 13 and second switch 14 in figure 3.
  • the dead time corresponds to the time period where no switching pulse is given to any of the first 14 and second 13 power switches.
  • the dead time is utilized for preventing current shot-through, i.e. short circuit coupling in the circuits including the power switches.
  • the PWM signal generator 32 is configured to generate PWM control signals based on the determined turn-on T on time and on the turn-off T off time.
  • the PWM signal generator 32 is
  • the PWM signal generator 32 is configured to generate the non- synchronous PWM control signal Ql for controlling switching of the power switch 14 when the power switch is in a non- synchronous side of the circuit 100.
  • the output signal 31 represents the desired switching pulses being based on, and corresponding to, the modified turn-on T on and/or turn-off T 0ff times of the PWM signals.
  • the synchronous rectification control unit 40 has a number of advantages.
  • the synchronous rectification control unit can provide a high power efficiency.
  • the synchronous rectification control unit according to embodiments of the invention presents a simple, very low complex, and still robust solution to the above stated problems.
  • the synchronous rectification control unit 40 can provide a robust synchronous rectification control for essentially all possible working conditions, without causing current shoot-through conditions.
  • the synchronous rectification control unit 40 provides dead- time optimisation on the non-synchronous side power switches.
  • the synchronous rectification control unit 40 also improves operation of the synchronous side power switches.
  • Figure 2 illustrates a circuit diagram of a non-limiting example of a circuit 100 including a power switch and the synchronous rectification control unit 40.
  • the synchronous rectification control unit 40 is connected across the power switch 14, which can be e.g. a MOSFET, at the points 22 and 23.
  • the input signal 30 corresponds to the voltage difference between the potential points 22 and 23.
  • the output signal 31 of the synchronous rectification control unit 40 is a synchronous PWM control signal SQ1 for controlling switching of the power switch 14 when the power switch is in a
  • FIG. 3 illustrates a non-limiting example of a circuit diagram for a half-bridge power converter equipped with the synchronous rectification control method in the form of a first 40 and second 41 synchronous rectification control unit.
  • the half-bridge power converter includes two power switches 13 and 14, e.g. being MOSFETs, and a capacitor 12 being connected between terminals 10 and 11 and being fed by a rectified DC voltage.
  • Each one of the first 40 and second 41 power switches is connected to an individual first 40 and second 41
  • the first synchronous rectification control unit 40 is
  • the input signal 30 to the first synchronous rectification control unit 40 is the differential voltage between the first potential voltage points 22 and 23 over the first power switch 14.
  • the second synchronous rectification control unit 41 is connected across the second power switch 13 at the second potential voltage points 28 and 29.
  • the input signal 30 to the second synchronous rectification control unit 41 is the differential voltage between the second potential voltage points 28 and 29 over the second power switch 13.
  • the output signal 31 of the first synchronous rectification control unit 40 represents the desired switching pulses for the first power switch 14 being based on, and corresponding to, the modified turn-on T on and/or turn-off T off time of the PWM signals.
  • the switching pulses are thus synchronous PWM control signals SQ1 for controlling switching of the first power switch 14 when the power switch is in a synchronous side of a circuit 100, and non-synchronous PWM control signals Ql for controlling switching of the first power switch 14 when the power switch is in a non-synchronous side of the circuit 100.
  • the output signal 31 of the second synchronous rectification control unit 41 represents the desired switching pulses for the second power switch 13 being based on, and corresponding to, the modified turn—on T ori and/or turn—off T 0ff time of the PWM signals.
  • the switching pulses are thus synchronous PWM control signals SQ1 for controlling switching of the second power switch 13 when the power switch is in a synchronous side of a circuit 100, and non-synchronous PWM control signals Ql for controlling switching of the second power switch 13 when the power switch is in a non-synchronous side of the circuit 100.
  • the synchronous rectification control units can also be utilised e.g. for full-bridge power converters, wherein four synchronous rectification control units would be utilised, one for each power switch.
  • FIG. 4 is a flowchart illustrating a couple of embodiments for the method/algorithm/logic of the control algorithm circuit 26 for a power switch 13, 14 being located in the non- synchronous side of the circuit 100.
  • the logic is described for the case of controlled switching of the first power switch 14.
  • corresponding logic may be utilized for controlled switching of one or more of the first 14 and second 13 switches in e.g. a half-bridge circuit as the one illustrated in figure 3.
  • the voltage sensing circuit 25 is further configured to detect an on-edge body diode 141 conduction for the power switch 14 of the non-synchronous side and to output an on-edge voltage pulse signal ⁇ ⁇ c
  • control algorithm circuit 26 is further configured to
  • non-synchronous rectification side body diode conduction voltage pulse V DC is input to the synchronous rectification control unit 40, 41.
  • a second step 402 the time duration T c for the voltage pulse signal V DC is determined/measured.
  • a third step 403 the time duration T c is compared to the value zero, and the method proceeds to either of a fourth 404 step if the time duration T c has a value higher than zero;
  • the control algorithm circuit 26 is further configured to update a dead time T d to a new dead time value T d ne w
  • figure 4 illustrates the logic for how the dead time T d is optimized for non-synchronous rectification side power switches of the circuit 100.
  • the input of the flow chart is the non-synchronous rectification side body diode conduction voltage pulse.
  • the time duration T c of this voltage pulse is captured. If the time duration T c is greater than zero, the control algorithm decides to decrease the new dead time T d new- Otherwise, if the duration time T c is zero, the control algorithm decides to restore the dead time to a predefined value T d _ pred .
  • the synchronous rectification control unit 40, 41 manipulates the dead time between the first 14 and second 13 power switches.
  • the capture unit 24 here obtains the voltage pulse signal time duration T c of the voltage pulse V DC from the voltage sensing circuit. Then, the control algorithm circuit 26 analyses if this time duration T c is greater than zero. If the time duration T c is greater than zero, then a percentage of this time duration T c is subtracted from the dead-time T d . On the other hand, if the obtained voltage pulse signal time duration T c is equal to zero then the new dead-time value T d new is reset to a predefined value T d pred .
  • Figure 5 is a flowchart illustrating a couple of embodiments for the method/algorithm/logic of the control algorithm circuit 26 for a power switch 13, 14 being located in the synchronous side of the circuit 100.
  • the logic is described for the case of controlled switching of the first power switch 14.
  • corresponding logic may be utilized for controlled switching of one or more of the first 14 and second 13 switches in e.g. a half-bridge circuit as the one illustrated in figure 3 above.
  • the synchronous side voltage pulse signal V DC corresponding to the body diode conduction and the non- synchronous side PWM control signals Ql are input to the voltage sensing circuit 25.
  • the voltage sensing circuit 25 is further configured to detect on-edge body diode 141 conduction for the power switch 14.
  • the voltage sensing circuit 25 is also configured to output an on-edge voltage pulse signal ⁇ ⁇ corresponding to the on-edge body diode conduction.
  • the on-edge voltage pulse signal V on is denoted as a
  • the control algorithm circuit 26 is then further configured to determine the turn-on time duration T on c as the time duration of the on-edge voltage pulse signal V on c .
  • the turn-on time duration T on c is denoted as a synchronous
  • a third step 503 the turn-on time duration T on c is compared to the value zero, and the logic proceeds to either of a fourth 504 step if the turn-on time duration T on c has a value higher than zero; T on c >0; and to a fifth step 505 if the turn- on time duration T on c is not longer than zero.
  • Ton c>0 the control algorithm circuit 26 is further configured to update the turn-on time T on to a new turn-on time T on new, in figure 5 denoted T sron new
  • the new turn-on time T on new is here equal to an already used turn-on time T on minus a portion T on m of the turn-on time duration T 0 n_ c ;
  • the control algorithm circuit 26 is further configured to set the new turn-on time T on new to a predetermined value T on pred, in figure 5 denoted T sron pred .
  • the voltage sensing circuit 25 is further configured to detect off-edge body diode 141
  • the voltage sensing circuit 25 is also configured to output an off-edge voltage pulse signal V off corresponding to the off-edge body diode conduction.
  • the off-edge voltage pulse signal V off is denoted as a synchronous rectification off-edge voltage pulse signal V sroff .
  • the control algorithm circuit 26 is also configured to
  • the turn-off time duration T 0 ff c is denoted as a synchronous rectification turn-off time T sr0 ff C -
  • the turn-off time duration T 0 ff c is compared to the value zero, and the logic proceeds to either of an eighth 508 step if the turn-off time duration T 0 ff c has a value higher than zero; T 0 ff c >0; and to a ninth step 509 if the turn-off time duration T 0 ff c is not longer than zero.
  • the control algorithm circuit 26 is further configured to set the turn-off time T 0 ff to a predetermined value T 0 ff pre c in figure 5 denoted as T sr off_p re d ⁇
  • T sr off_p re d a predetermined value
  • the flow chart of figure 5 describes how the turn-on T on and turn-off T 0 ff instance is optimized for the synchronous rectification side power switch (es) 14, 13.
  • the inputs of the flow chart are the synchronous rectification side body diode conduction voltage pulse V DC and the non- synchronous rectification side PWM signals Ql .
  • the control algorithm decides to decrease the on-time of the synchronous rectification side power switch Ton new c /T S ronc new / otherwise if the turn-on time duration
  • Ton c/Tsronc is zero
  • the control algorithm decides to restore the on-time of the synchronous rectification side power switch 14, 13 to a predefined value Ton_preci_c/T S ronc_preci ⁇
  • the control algorithm decides to increase the off-time of the synchronous rectification side power switch (es) 14, 13 T 0 ff c new /T sr0 ffc new, otherwise if the second turn-off voltage pulse T 0 ff C /T sr0 ffc is zero, the control algorithm decides to restore the off-time of the synchronous rectification side power switch 14, 13 to a predefined value
  • the synchronous rectification control unit 40, 41, and its embodiments is included in an integrated circuit .
  • the synchronous rectification control unit 40, 41 may be utilised for a power converter.
  • a power converter is included in a power
  • Figure 6 is a graph having plots that illustrate example values and waveforms of the first Qi non-synchronous PWM control signal for the first 14 power switch, and of the second Q 2 non-synchronous PWM control signal for the second 13 power switch.
  • Figure 6 further shows plots of the first voltage V Q1 over the first power switch 14, i.e. the voltage across the points 22 and 23 in figure 3, and of the second voltage V Q2 over the second power switch 13, i.e. the voltage across the points 29 and 30 in figure 3.
  • Figure 6 further shows a plot for the voltage pulse signal V DC , i.e. the output of the voltage sensing circuit 25.
  • a voltage pulse signal is thus created and output by the voltage sensing circuit 25, i.e. T c >0, due to the dead-time T d being introduced in the PWM control signal scheme.
  • figure 6 corresponds to the left branch of the flow chart of figure 4.
  • the delayed turn-on time of power switch 14, i.e. the dead- time T d before the first Qi PWM control signal reaches its high value, allows for a current flow through the body diode 141 of the first power switch before the first power switch is turned on by the high value for the first Qi PWM control signal.
  • the low to high transition of the voltage pulse signal V DC indicates the time instant/moment when the body diode 141 starts to conduct a current.
  • the high to low transition of the voltage pulse signal V DC indicates the time instant/moment when the body diode 141 stops to conduct a current and thus when the body of the power switch 14 starts to conduct a current .
  • the voltage pulse signal V DC is captured by the capture unit 24, and information of the body diode 141 conduction time T c is determined and stored in a memory.
  • the body diode 141 conduction time duration T c is closely related to the applied PWM dead time T d .
  • PWM dead time is T d therefore needed to be optimized in a way that the captured pulse width T c is as narrow as possible.
  • FIG. 7 is a graph having plots that illustrate example values and waveforms of the first Qi non-synchronous PWM control signal for the first 14 power switch, and of the second Q2 non-synchronous PWM control signal for the second 13 power switch.
  • Figure 7 further shows plots of the first voltage V Q i over the first power switch 14, i.e. the voltage across the points 22 and 23 in figure 3, and of the second voltage V Q 2 over the second power switch 13, i.e. the voltage across the points 29 and 30 in figure 3.
  • Figure 7 further shows a plot for the voltage pulse signal V DC , i.e. the output of the voltage sensing circuit 25.
  • figure 7 corresponds to the right branch of the flow chart of figure 4.
  • Figures 8, 9, 10 and 11 illustrate the synchronous
  • rectification control method according to different embodiments applied on the synchronous rectification side of the circuit 100.
  • the corresponding notation as in figure 5 is used.
  • four different representative operation conditions can be analysed.
  • a first operation condition is illustrated, wherein only a first on- edge voltage pulse signal V on appears.
  • a second operation condition is illustrated, wherein only a second off- edge voltage pulse signal V off appears.
  • a third operation condition is illustrated, wherein no voltage pulse signal appears.
  • a fourth operation condition is illustrated, wherein both a first on-edge voltage pulse signal V on and a second off-edge voltage pulse signal V 0ff appear.
  • the power converter presented in figure 3 is placed/positioned on the synchronous rectification side of the circuit 100.
  • Figure 8 is a graph having plots that illustrate example values and waveforms of the first Qi non-synchronous PWM control signal for the first 14 power switch on the non- synchronous rectification side of the circuit, and of the second 2 non-synchronous PWM control signal for the second 13 power switch on the non-synchronous rectification side of the circuit.
  • Figure 8 further shows example values and waveforms of the first SQi synchronous PWM control signal for the first 14 power switch on the synchronous rectification side of the circuit, and of the second SQ 2 synchronous PWM control signal for the second 13 power switch on the synchronous rectification side of the circuit.
  • Figure 8 also shows a first synchronous current iSRi, which is the current being conducted by the first power switch 14 on the synchronous side, and a second synchronous current iSR 2 , which is the current being conducted by the second power switch 13 on the synchronous side.
  • Figure 8 further shows a plot for the voltage pulse signal V DC , i.e. the output of the voltage sensing circuit 25, here being a turn-on voltage pulse V on and a turn-off voltage pulse V off .
  • a voltage pulse signal is created by the voltage sensing circuit 25 due to the delayed turn-on time T 0 n/T S ron of the first synchronous PWM control signal SQ1 for the first synchronous power switch 14, which initiates/allows current flow through its body diode 141.
  • the low to high transition of the voltage pulse signal V DC indicates the instant/moment when body diode 141 starts to conduct current and the high to low transition of the voltage pulse signal V DC indicates the instant/moment when the body of the power switch 14 starts to conduct
  • Such a pulse is captured by the capture unit 24, as described above, and information about the body diode 141 conduction time duration T c /T s r0 nc is determined and stored in a memory.
  • the body diode 141 conduction time duration T c /T s r0 nc is closely related to the turn-on time T 0 n/T S ron of the first power switch 14. In order to reduce the body diode 141
  • the turn-on time T 0 n/T S ron is therefore needed to be optimized in a way that the captured pulse width, i.e. the time duration T on c /T sronc , is as narrow as possible. Based on the time duration T on c /Tsronc information being
  • the new turn-on time duration value T on new /T srori new will be applied to the first 14 and second 13 power switches during the next switching cycle.
  • no voltage pulse signal V off /V sroff appears after the zeroing of the synchronous PWM signal SQi.
  • Figure 9 is a graph having plots that illustrate example values and waveforms of the first Qi non-synchronous PWM control signal for the first 14 power switch on the non- synchronous rectification side of the circuit, and of the second Q2 non-synchronous PWM control signal for the second 13 power switch on the non-synchronous rectification side of the circuit.
  • Figure 9 further shows example values and waveforms of the first SQi synchronous PWM control signal for the first 14 power switch on the synchronous rectification side of the circuit, and of the second SQ2 synchronous PWM control signal for the second 13 power switch on the synchronous
  • Figure 9 also shows a first synchronous current iSRi, which is the current being conducted by the first power switch 14 on the synchronous side, and a second synchronous current iSR 2 , which is the current being conducted by the second power switch 13 on the synchronous side.
  • Figure 9 further shows a plot for the voltage pulse signal V DC , i.e. the output of the voltage sensing circuit 25, here being a turn-off voltage pulse V 0 ff and a turn-on voltage pulse V 0 n.
  • a voltage pulse signal V DC is created by the voltage sensing circuit 25 due to an early turn-off time T off /T sroff of the first power switch 14, which allows current flow through its body diode 141.
  • the low to high transition of the voltage pulse signal V DC indicates the instant/moment when body of the power switch 14 stops to conduct current and the body diode 141 starts to conduct current and the high to low transition of the voltage pulse signal V DC indicates the instant/moment when the body diode 141 stops to conduct current due to the zeroing of the first synchronous current iSRi.
  • Such a pulse i.e. a turn-off voltage pulse V 0 ff is captured by the capture unit 24, and information about the body diode 141 conduction time duration T c /T sr0 ff C is determined and stored in the memory.
  • the body diode 141 conduction time duration T c /T sr0 ff C is closely related to the turn-off time off/ groff of the power switch 14.
  • the turn-off time T sr0 ff is therefore needed to be optimized in a way that the captured pulse width, i.e. the time duration T c /T sr0 ff C is as narrow as possible.
  • the control algorithm circuit 26 is configured to modify the turn-off time instant/moment
  • the new turn-off time value T 0 ff new/T s r off new will be applied to the power switches 1 3 and 1 4 during the next switching cycle.
  • the turn-on time of the PWM signal S Qi will be set to a predefined
  • Figure 1 0 is a graph having plots that illustrate example values and waveforms of the first Qi non-synchronous PWM control signal for the first 1 4 power switch on the non- synchronous rectification side of the circuit, and of the second Q 2 non-synchronous PWM control signal for the second 1 3 power switch on the non-synchronous rectification side of the circuit.
  • Figure 1 0 further shows example values and waveforms of the first S Qi synchronous PWM control signal for the first 1 4 power switch on the synchronous rectification side of the circuit, and of the second SQ 2 synchronous PWM control signal for the second 1 3 power switch on the synchronous
  • Figure 1 0 also shows a first synchronous current iSRi, which is the current being conducted by the first power switch 1 4 on the synchronous side, and a second synchronous current 1SR 2 , which is the current being conducted by the second power switch 1 3 on the synchronous side.
  • Figure 1 0 further shows a plot for the voltage pulse signal V DC , i.e. the output of the voltage sensing circuit 2 5 , here being a turn-off voltage pulse V 0 ff and a turn-on voltage pulse V on .
  • the body diode 1 4 1 does not conduct any current. Therefore, the voltage sensing circuit 2 5 will not create any voltage pulse signals.
  • control algorithm circuit 2 6 is configured to set the turn-on time instant/moment T 0 n/T S ron to a predefined value T on P reci T sron preci and the turn-off time instant/moment T off /T sroff to a predefined value T off _ pred /T sroff _ pred .
  • Figure 1 1 is a graph having plots that illustrate example values and waveforms of the first Qi non-synchronous PWM control signal for the first 1 4 power switch on the non- synchronous rectification side of the circuit, and of the second Q 2 non-synchronous PWM control signal for the second 1 3 power switch on the non-synchronous rectification side of the circuit.
  • Figure 1 1 further shows example values and waveforms of the first S Qi synchronous PWM control signal for the first 1 4 power switch on the synchronous rectification side of the circuit, and of the second SQ 2 synchronous PWM control signal for the second 1 3 power switch on the synchronous
  • Figure 1 1 also shows a first synchronous current iSRi, which is the current being conducted by the first power switch 1 4 on the synchronous side, and a second synchronous current 1SR 2 , which is the current being conducted by the second power switch 1 3 on the synchronous side.
  • Figure 1 1 further shows a plot for the voltage pulse signal V DC , i.e. the output of the voltage sensing circuit 2 5 , here being a turn-off voltage pulse V 0 ff and a turn-on voltage pulse ⁇ ⁇ .
  • two voltage pulse signals a turn-on pulse V on and a turn-off pulse V 0 ff
  • V 0 n and turn-off V 0 ff pulses are output due to the delayed turn-on time on and the early turn-off time T 0 ff of the power switch 14, that allows current flow through its body diode 141.
  • the first turn-on pulse V on signal appears before the synchronous PWM signal SQ1 of the first power switch 14 and the second turn-off voltage pulse V off signal appears after the
  • the low to high transition of the first turn-on voltage pulse signal V on indicates the time instant/moment when the body diode 141 starts to conduct current and the high to low transition of the first turn-on voltage pulse signal V 0 n indicates the moment when the body of the power switch 14 starts to conduct current and the body diode 141 stops to conduct current.
  • the low to high transition of the second turn-off voltage pulse V 0 ff signal indicates the time
  • the low to high and high to low transition of the first turn- on voltage pulse signal ⁇ ⁇ is captured by the capture unit 24, and information about body diode 141 conduction time duration Ton c/Tsronc is determined and stored in the memory.
  • the turn-on time instant/moment T 0 n/T sr on should be optimized in a way that the captured pulse width, i.e. the time duration T on c/Tsronc is as narrow as possible.
  • the low to high and high to low transition of the second turn-off voltage pulse V off signal is captured by the capture unit 24, and information about body diode 141 conduction time duration T off c /T sroffc is determined and stored in the memory.
  • T off c /T sroffc body diode 141 conduction time duration
  • the turn-off time instant/moment T 0 ff/T sr0 ff must be optimized in a way that the captured pulse width, i.e. the time duration T 0 ff c /T sr0 ff C is as narrow as possible.
  • the new and optimized turn-on time instants/moments T on new/T sr on new and the new and optimized turn-off time instants/moments T 0 ff new/T sr off new will then be applied to the power switches 13 and 14 during next switching cycle.
  • Figure 12 is a flow chart illustrating actions of a method 300 method for controlling synchronous rectification.
  • any, some or all of the descr ⁇ ibed actions 301-303 may be performed in a somewhat different chronological order than the enumeration indicates, be per ⁇ formed simultaneously or even be performed in reversed order. Further, it is to be noted that some actions may be performed in a plurality of alternative manners according to different embodiments.
  • the method 300 may comprise the following acti ⁇ ons :
  • a body diode conduction for a power switch 14 is detected.
  • a time duration T c for the voltage pulse signal V DC is determined.
  • a turn-on time T on and a turn-off time T 0ff to be used for a synchronous pulse width modulation, PWM, control signal SQ1 or a non-synchronous PWM control signal Ql during an upcoming switching cycle are determined.
  • the synchronous PWM control signal SQ1 for controlling switching of the power switch 14 is generated when the power switch is in a synchronous side of a circuit
  • the non-synchronous PWM control signal Ql for controlling switching of the power switch 14 is generated when the power switch is in a non-synchronous side of the circuit 100.
  • the method for controlling synchronous rectification may be implemented in a circuit 600 schematically illustrated in figure 13.
  • the processing circuit 600 is configured for:
  • determining 305 a turn-on time T on and a turn-off time T 0ff to be used for a synchronous pulse width modulation, PWM, control signal SQ1 or a non-synchronous PWM control signal Ql during an upcoming switching cycle, wherein the determination of the turn-on T on and turn-off T 0ff times is based on the stored time duration T c ;
  • the synchronous PWM control signal SQ1 for controlling switching of the power switch 14 when the power switch is in a synchronous side of a circuit 100
  • the non- synchronous PWM control signal Ql for controlling switching of the power switch 14 when the power switch is in a non- synchronous side of the circuit.
  • the processing circuit 600 may comprise, e.g., one or more instances of a Central Processing Unit (CPU) , a processing unit, a processing circuit, a processor, an Application Specific Integrated Circuit (ASIC) , a microprocessor, or other pro- cessing logic that may interpret and execute instructions.
  • CPU Central Processing Unit
  • ASIC Application Specific Integrated Circuit
  • processing circuit may thus repr- esent a processing circuitry comprising a plurality of processing circuits, such as, e.g., any, some or all of the ones enumerated above.
  • the processing circuit 600 may further perform data processing functions for inputting, outputting, and processing of data comprising data buffering and device control functions.
  • the processing circuit 600 may be connected to at least one memory 601, according to some embodiments.
  • the memory 601 may comprise a physical device utilised to store data or programs, i.e., sequences of instructions, on a temporary or permanent basis.
  • the memory 601 may comprise integrated circuits comprising silicon-based trans ⁇ istors. Further, the memory 601 may be volatile or non-vola ⁇ tile .
  • the previously described actions 301-303 may be implemented through one or more processing circuits 600, together with computer program code for performing the functions of the actions 301-306.
  • a computer program product, comprising instructions for performing the actions 301-306 may perform the method 300 controlling synchronous rectification, when the computer program product is loaded in a processing circuit 600.
  • the computer program product mentioned above may be provided for instance in the form of a data carrier carrying computer program code for performing any, at least some, or all of the actions 301-306 according to some embodiments when being loaded into the processing circuit 600.
  • the data carrier may be, e.g., a hard disk, a CD ROM disc, a memory stick, an opti ⁇ cal storage device, a magnetic storage device or any other appropriate medium such as a disk or tape that may hold mach ⁇ ine readable data in a non transitory manner.
  • the computer program product may furthermore be provided as computer pro ⁇ gram code on a server and may be downloaded remotely, e.g., over an Internet or an intranet connection.
  • the term “and/ or” comprises any and all comb- inations of one or more of the associated listed items.
  • the singular forms “a”, “an” and “the” are to be interpreted as “at least one”, thus also possibly comprising a plurality of entities of the same kind, unless expressly stated otherwise.
  • the terms “includes”, “comprises”, “including” and/ or “comprising”, specifies the presence of stated features, actions, integers, steps, operations, elements, and/ or components, but do not preclude the presence or addition of one or more other

Abstract

A unit ant a method for synchronous rectification control unit is disclosed. The synchronous rectification control unit includes a voltage sensing circuit 25 configured to detect body diode conduction for a power switch 14, and to output a voltage pulse signal VDC corresponding to the body diode conduction. The synchronous rectification control unit further includes a capture unit 24 configured to determine a time duration Tc for the voltage pulse signal VDC, and to store the time duration Tc in a memory. The synchronous rectification control unit further includes a control algorithm circuit 26 configured to determine a turn-on time Ton and a turn-off time Toff to be used for a synchronous pulse width modulation, PWM, control signal SQ1 or a non-synchronous PWM control signal Q1 during an upcoming switching cycle, wherein the determination of the turn—on Ton and turn—off Toff times is based on the stored time duration Tc. The synchronous rectification control unit further includes a PWM signal generator 32 configured to generate, by use of the determined turn-on Ton time and turn-off Toff time, the synchronous PWM control signal SQ1 for controlling switching of the power switch 14 when the power switch is in a synchronous side of a circuit; or the non-synchronous PWM control signal Q1 for controlling switching of the power switch 14 when the power switch is in a non-synchronous side of the circuit 100.

Description

UNIT AND METHOD FOR SYNCHRONOUS RECTIFICATION CONTROL
FIELD OF INVENTION
Implementations described herein relate generally to a
synchronous rectification control unit and a method for controlling synchronous rectification. In particular is herein described a mechanism for generating synchronous or non- synchronous pulse width modulation, PWM, control signals usable for controlling switching a power switch. BACKGROUND OF INVENTION
Power switches, for example switches being realised by use of MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) of other suitable types of transistors, are used in a number of circuits today. For example, such power switches are used power converters, which may be implemented as half bridge power converters or full bridge power converters. E.g. full bridge power converter circuits may include a synchronous side and a non-synchronous side. In such a circuit, the non- synchronous side is the side to which the original/non- converted signal/power is inputted, and the synchronous side is the side where the manipulated/converted signal/power is outputted. This can also be expressed as the synchronous rectification side is defined as a side of the circuit, at which side the synchronous rectification power switches are located. Correspondingly, the non synchronous rectification side is defined as side of the circuit, at which side the main power switches are located.
Thus, for a bidirectional circuit, the non-synchronous side of the circuit can correspond to different physical sides of the circuit, depending on in which direction the signal/power should be manipulated/converted, since the original
signal/power is input to the non-synchronous side.
Correspondingly, the synchronous side of the circuit can correspond to different physical sides of the circuit, depending on in which direction the signal/power should be manipulated/converted, since the manipulated/converted
signal/power is output from the synchronous side.
Circuits including such power switches, e.g. power
transforming circuits or the like, can be utilised in a large variety of units, e.g. in A User Equipment (UE) , also known as a mobile station, wireless terminal and/ or mobile terminal enabled to communicate wirelessly in a wireless communication network, sometimes also referred to as a cellular radio system. Such circuits can also be utilised in a radio network node, or base station, e.g., a Radio Base Station (RBS) , which in some networks may be referred to as "eNB", "eNodeB",
"NodeB" or "B node", depending on the technology and/ or terminology used. Switching of the power converters in such circuits aims at being as power efficient as possible. MOSFETs, and other transistors being used for realising the power switches, generally have a lower electrical resistance when the switch is closed/conducting than when the switch is open/non- conducting. As a non-limiting example can be mentioned that a MOSFET switch has a voltage drop over the switch corresponding to the body diode voltage of the MOSFET, which can be e.g. 0.7 Volt, when the switch is open. When the MOSFET switch is closed, the voltage drop over the switch is much lower, e.g. 0.01 Volt according to a non-limiting example. Therefore, to achieve as high power efficiency as possible, as much power as possible should flow through the closed switch, which has the lower voltage drop.
Conventional synchronous rectification has been suggested for improving the power efficiency of circuits by controlling switching of the power switches being included in the
circuits. Today, a number of conventional synchronous
rectification control solutions have been proposed. One such solution tunes a synchronous rectification duty cycle based on detection of a synchronous rectification body diode conduction for a power switch. If a body diode conduction is present, the duty cycle for the synchronous rectification is increased until the body diode conduction stops. On the contrary, if a body diode conduction is not present, the synchronous
rectification duty cycle is decreased until the body diode conduction starts. As a result, the body diode conduction state often alternates between on and off.
One significant drawback of this conventional method is that each update/tuning of the synchronous rectification duty cycle has to use a fixed small step. However, a small step
update/tuning of the synchronous rectification duty cycle results in serious problems when the circuit is utilized in a close loop operation, since the current shoot-through in the circuit occurrence becomes evident when SR duty cycle changes too slowly. Generally, the duty cycle decreases very slowly, which means that the power switch is still turned-on while the current reaches zero and changes to the opposite current direction. This opposite direction of the current through the same power switch is the cause for the current shoot-through phenomenon . Also, since the turn-on time of synchronous side (pulse Width Modulated) PWM signals in conventional solutions is
synchronized with non-synchronous side PWM signals, current shoot-through could occur in case of light load operation. This is because of current lags/delays for the on-edge PWM pulse, which results in a reversed direction current flow in the power switch once it is turned-on, when the synchronous side PWM signals in conventional solutions is synchronized with non- synchronous side PWM signals.
SUMMARY OF INVENTION
It is therefore an object to solve at least some of the above mentioned disadvantages and to improve the power efficiency and to lower the implementation complexity of circuits
including a synchronous side and a non-synchronous side.
According to a first aspect, the object is achieved by a synchronous rectification control unit including:
- a voltage sensing circuit configured to
- detect body diode conduction for a power switch, and - output a voltage pulse signal VDC corresponding to said body diode conduction;
- a capture unit configured to
- determine a time duration Tc for said voltage pulse signal VDC, and
- store said time duration Tc in a memory;
- a control algorithm circuit configured to determine a turn- on time on and a turn-off time T0ff to be used for a
synchronous pulse width modulation, PWM, control signal SQ1 or a non-synchronous PWM control signal Ql during an upcoming switching cycle, said determination of said turn-on Ton and turn-off T0ff times being based on said stored time duration Tc; and
- a PWM signal generator configured to generate, by use of said determined turnon Tori time and turn-off T0ff time, said synchronous PWM control signal SQ1 for controlling switching of the power switch when the power switch is in a synchronous side of a circuit; or said non-synchronous PWM control signal Ql for controlling switching of the power switch when the power switch is in a non-synchronous side of the circuit. By utilisation of this synchronous rectification control unit, an exact and fast update update/tuning of the non- synchronous rectification and/or synchronous rectification duty cycle can be achieved, since larger steps can be taken during the tuning as for the conventional solutions. Thus, a power efficient switching can be achieved by the synchronous rectification control unit. Also, current shoot-through is efficiently mitigated by the fast update/tuning of the non- synchronous rectification and/or synchronous rectification duty cycle, both for changing conditions and for light load operation.
In a first possible implementation form of the synchronous rectification control unit according to the first aspect, the voltage sensing circuit is further configured to detect an on- edge body diode conduction for the power switch of said non- synchronous side and to output an on-edge voltage pulse signal Von c corresponding to said on-edge body diode conduction.
By detecting the on-edge body diode conduction time, the time that the diode start to conduct can be exactly determined.
Based on this time, it is then possible to manipulate the dead-time between the switching pulses in order to minimize the diode conduction time and improve the efficiency. In a second possible implementation form of the synchronous rectification control unit according to the first aspect as such or according to the first possible implementation form of the synchronous rectification control unit according to the first aspect, the control algorithm circuit is further
configured to update a dead time Td to a new dead time value Td new if the time duration Tc has a value greater than zero, Tc >0; said new dead time value Td new being equal to an already used dead time value Td minus a portion of the time
duration Tc, Td_new =Td-Tdm 0<Τ^<Το.
Hereby, the dead time is minimized in order to achieve a minimum diode conduction time, which results in high power efficiency .
In a third possible implementation form of the synchronous rectification control unit according to the first aspect as such or according to the synchronous rectification control unit according to the first or second possible implementation forms of the synchronous rectification control unit according to the first aspect, said control algorithm circuit is further configured to set a new dead time value Td new to a
predetermined value Td ρΓβ(ι Td new =Td preci if the time duration Tc has a value equal to zero, Tc =0.
If Tc=0, this means that there is a risk for current shoot- through. By this possible implementation, this situation is identified, and a predefined value for the dead time is set in order to guarantee that no shoot-through will happen.
In a fourth possible implementation form of the synchronous rectification control unit according to the first aspect, - said voltage sensing circuit is further configured to detect an on-edge body diode conduction and an off-edge body diode conduction for the power switch and to output an on-edge voltage pulse signal νοη and an off-edge voltage pulse signal V0ff corresponding to said on-edge body diode conduction and said off-edge body diode conduction, respectively;
- said capture unit is further configured to determine a turn- on time duration Ton c as a time duration of the on-edge voltage pulse signal Von c, and to determine a turn-off time duration Toff c for said synchronous PWM control signal SQ1 as a time duration of the off-edge voltage pulse signal Voff c.
Hereby, an exact and fast update/tuning of the synchronous rectification duty cycle can be achieved. A power efficient switching which also efficiently mitigates current shoot- through is provided by the fast update/tuning of the
synchronous rectification duty cycle.
In a fifth possible implementation form of the fourth possible implementation form of the synchronous rectification control unit according to the first aspect, the control algorithm circuit is further configured to update said turn-on time Ton to a new turn-on time Ton new if said turn-on time duration Ton c has a value greater than zero, Ton c >0; said new turn-on time Ton new being equal to an already used turn-on time Ton minus a portion Ton m of said turn-on time duration Ton c Ton new =Ton _
Ton_m/ 0<CTon_m—Ton_c ·
By detecting the turn-on time duration Ton c, the information of the diode conduction is detected. The adaption of the turn-on time Ton to a new value Ton new based on the detected turn-on time duration Ton c is usable for minimizing the time that the diode conducts, thus for increasing the efficiency.
In a sixth possible implementation form of the fourth or fifth possible implementation forms of the synchronous rectification control unit according to the first aspect, the control algorithm circuit is further configured to set a new turn-on time on new to a predetermined value Ton preci if said turn-on time duration Ton c has a value equal to zero; Ton c=0.
If Ton c=o, there is a risk for current shoot-through. This situation is here identified, and a predefined value for the turn-on time Ton preci time is set in order to guarantee that no shoot-through will happen.
In a seventh possible implementation form of the fourth, fifth or sixth possible implementation forms of the synchronous rectification control unit according to the first aspect, the control algorithm circuit is further configured to update said turn-off time Toff to a new turn-off time Toff new if said turn- off time duration T0ff c has a value greater than zero; T0ff c >0; said new turn-off time T0ff new being equal to an already used turn-off time T0ff plus a portion T0ff m of said turn-off time duration T0ff_c; T0ff_new =T0ff+T0ff_m; 0<TOff_m-TOff_c ·
By detecting the turn-off time duration T0ff cr information of the diode conduction is also detected. Here, the turn-off time T0ff is then adapted to a new value T0ff new based on the detected turn-off time duration T0ff c in order to minimize the time that diode conducts, i.e. to increase the power efficiency.
In a eighth possible implementation form of the fourth, fifth, sixth or seventh possible implementation forms of the
synchronous rectification control unit according to the first aspect, said control algorithm circuit is further configured to set said turn-off time T0ff to a predetermined value T0ff preci if a turn-off time duration T0ff c has a value equal to zero;
If T0ff c=0 there is a risk for current shoot-through. This risk is here identified, and a predefined value for the turn-off time T0ff preci time is set, which guarantees that no shoot- through will happen.
In a ninth possible implementation form of the synchronous rectification control unit according to the first aspect as such or according any of the preceding implementation forms of the first aspect,
- said voltage sensing circuit is further configured to output a logic high value for said voltage pulse signal VDC when said body diode is conducting a current; and
- said capture unit is configured to determine the time duration Tc as equal to a time duration during which said voltage pulse signal VDC has the logic high value.
By using a capture unit, an accurate time reference for the voltage pulse signal VDC can be captured, which is usable for increasing the power efficiency.
According to a second aspect, the object is achieved by an integrated circuit comprising at least one of the synchronous rectification control units according to the first aspect as such or according any of the preceding implementation forms of the first aspect.
The integrated circuit according to the second aspect has advantages corresponding to the advantages stated above for the first aspect.
According to a third aspect, the object is achieved by an electronic device having a power converter comprising the synchronous rectification control units according to the first aspect as such or according any of the preceding
implementation forms of the first aspect. The electronic device according to the third aspect has advantages corresponding to the advantages stated above for the first aspect.
According to a fourth aspect, the object is achieved by a method for controlling synchronous rectification, including:
- detecting body diode conduction for a power switch;
- outputting a voltage pulse signal VDC corresponding to said body diode conduction;
- determining a time duration Tc for said voltage pulse signal VDC;
- storing said time duration Tc in a memory;
- determining a turn-on time Ton and a turn-off time T0ff to be used for a synchronous pulse width modulation, PWM, control signal SQ1 or a non-synchronous PWM control signal Ql during an upcoming switching cycle, said determination of said turn- on Ton and turn-off T0ff times being based on said stored time duration Tc; and
- generating, by use of said determined turn-on Ton time and turn-off T0ff time, said synchronous PWM control signal SQ1 for controlling switching of the power switch when the power switch is in a synchronous side of a circuit; or said non- synchronous PWM control signal Ql for controlling switching of the power switch when the power switch is in a non-synchronous side of the circuit. By utilisation of this synchronous rectification control method, an exact and fast update update/tuning of the
synchronous rectification duty cycle can be achieved, since larger steps can be taken during the tuning as for the
conventional solutions. Thus, a power efficient switching can be achieved by the synchronous rectification control method. Also, current shoot-through is efficiently mitigated by the fast update/tuning of the synchronous rectification duty cycle, both for changing conditions and for light load
operation .
In a first possible implementation form of the method for controlling the synchronous rectification according to the fourth aspect, an on-edge body diode conduction for the power switch of said non-synchronous side is detected, and an on- edge voltage pulse signal Von c corresponding to said on-edge body diode conduction is output.
By detecting the on-edge body diode conduction time, the time that the diode start to conduct can be exactly determined. Based on this time, it is then possible to manipulate the dead-time between the switching pulses in order to minimize the diode conduction time and to improve the power efficiency.
In a second possible implementation form of the method for controlling the synchronous rectification according fourth aspect as such or according to the first possible
implementation form of the method for controlling the
synchronous rectification according to the fourth aspect, a dead time Td is updated to a new dead time value Td new if the time duration Tc has a value greater than zero, Tc >0; said new dead time value Td new being equal to an already used dead time value Td minus a portion of the time duration Tc, Td new =Td-
-L dm 0<Tdm≤Tc .
Hereby, the dead time is minimized in order to achieve a minimum diode conduction time, which results in high power efficiency .
In a third possible implementation form of the method for controlling the synchronous rectification according to the fourth aspect as such, or according to the first or second possible implementation forms of the synchronous rectification control unit according to the fourth aspect, a new dead time value Td_new is set to a predetermined value Td_pred; Td_new =Td_pred; if the time duration Tc has a value equal to zero, Tc =0.
If Tc=0, there is a risk for current shoot-through. By this possible implementation, this situation is identified, and a predefined value for the dead time is set in order to
guarantee that no shoot-through will happen.
In a fourth possible implementation form of the method for controlling the synchronous rectification according to the fourth aspect,
- an on-edge body diode conduction and an off-edge body diode conduction for the power switch are detected, and an on-edge voltage pulse signal νοη and an off-edge voltage pulse signal V0ff corresponding to said on-edge body diode conduction and said off-edge body diode conduction, respectively, are output;
- a turn-on time duration Ton c is determined as a time duration of the on-edge voltage pulse signal νοη cr and a turn-off time duration T0ff c for said synchronous PWM control signal SQ1 is determined as a time duration of the off-edge voltage pulse signal V0ff c ·
Hereby, an exact and fast update/tuning of the synchronous rectification duty cycle can be achieved. A power efficient switching which also efficiently mitigates current shoot- through is provided by the fast update/tuning of the
synchronous rectification duty cycle.
In a fifth possible implementation form of the fourth possible implementation form of the method for controlling the
synchronous rectification according to the fourth aspect, said turn-on time Ton is updated to a new turn-on time Ton new if said turn-on time duration Ton c has a value greater than zero, Ton c >0; said new turn-on time Ton new being equal to an already used turn-on time Ton minus a portion Ton m of said turn-on time duration T0n_c_ T0n_new = orion^m; O^Ton^—T0n_c ·
By detecting the turn-on time duration Ton c, the information of the diode conduction is detected. The adaption of the turn-on time Ton to a new value Ton new based on the detected turn-on time duration Ton c is usable for minimizing the time that diode conducts, thus for increasing the efficiency.
In a sixth possible implementation form of the fourth or fifth possible implementation forms of the method for controlling the synchronous rectification according to the fourth aspect, a new turn-on time Ton new is set to a predetermined value Ton pred if said turn-on time duration Ton c has a value equal to zero;
Ton_c0 ·
If Ton c=o there is a risk for current shoot-through. This situation is here identified, and predefined value for the turn-on time Ton preci time is set in order to guarantee that no shoot-through will happen.
In a seventh possible implementation form of the fourth, fifth or sixth possible implementation forms of the method for controlling the synchronous rectification according to the fourth aspect, said turn-off time T0ff is updated to a new turn-off time T0ff new if said turn-off time duration T0ff c has a value greater than zero; T0ff c >0; said new turn-off time
T0ff new being equal to an already used turn-off time T0ff plus a portion T0ff m of said turn-off time duration T0ff c Toff new
Figure imgf000015_0001
By detecting the turn-off time duration T0ff r information of the diode conduction is also detected. Here, the turn-off time T0ff is then adapted to a new value T0ff new based on the detected turn-off time duration T0ff c in order to minimize the time that the diode conducts, i.e. to increase the power efficiency.
In a eighth possible implementation form of the fourth, fifth, sixth or seventh possible implementation forms of the method for controlling the synchronous rectification according to the fourth aspect, said turn-off time Toff is set to a
predetermined value Toff pred if a turn-off time duration Toff c has a value equal to zero; Toff c=0.
If Toff c=0 there is a risk for current shoot-through. This risk is here identified, and a predefined value for the turn-off time Toff pred time is set, which guarantees that no shoot- through will happen.
In a ninth possible implementation form of the method for controlling synchronous rectification according to the fourth aspect as such, or according to any of the above possible implementation forms of the method for controlling the
synchronous rectification according to the fourth aspect, - a logic high value is output for said voltage pulse signal VDC when said body diode is conducting a current; and
- the time duration Tc is determined as equal to a time duration during which said voltage pulse signal VDC has the logic high value.
By using a capture unit, an accurate time reference for the voltage pulse signal VDC can be captured, which is usable for increasing the power efficiency.
According to a fifth aspect, the object is achieved by a computer program with a program code for performing a method according to the second aspect when the computer program runs on a computer. The computer program according to the fifth aspect has
advantages corresponding to the advantages stated above for the fourth aspect. Further, a computer program with a program code gives flexibility, accuracy, and robustness to
environmental conditions. Also, the program code is easily modified and updated.
In other words, a Micro Controller Unit (MCU) provides PWM signals to both non-SR side and SR side power switches. For the non-SR side switching, a delay time, i.e. the dead time, is often inserted in order to tune the turn-on time of the PWM signals, while the turn-off time remains unchanged. For the SR side switching, both the turn-on and the turn-off times of PWM signals are supposed to be tuned. These tunings aim to
minimize the body diode conduction time so that power losses are reduced.
To achieve the reduced power losses, the synchronous
rectification control unit being implemented in the MCU features event capture functionality, which facilitates saving of information corresponding to captured events in
registers/memories. In addition to the MCU, a voltage sensing circuit is used for detecting body diode conduction and to produce corresponding voltage pulse signals to be captured by the capture unit of the MCU.
For the non SR side, at least one voltage sensing circuit is required to detect the body diode conduction related to the on-time PWM signal, and at least one dedicated capture unit is assigned to capture corresponding pulse signals and to save information corresponding to the pulse signals in a
register/memory . For the SR side, at least one voltage sensing circuit is required to detect the body diode conduction related to both the SR on-time and off-time PWM signals, and at least another one dedicated capture unit is assigned to capture
corresponding the PWM signals and to save information
corresponding to the pulse signals in two registers/memories, one for the on-time PWM signals and the other for the off-time PWM signals, respectively.
When power switch body diode conduction is detected in a present switching cycle, a voltage pulse signal is generated by the voltage sensing circuit and is instantaneously captured by the capture unit of the MCU. The captured pulse width includes body diode conduction time information that is saved in a capture register/memory. The control algorithm circuit then determines a desired turn-on and/or turn-off time
instance for the next switching cycle to achieve a minimal body diode conduction time.
When power switch body diode conduction is not detected in a present switching cycle, no voltage pulse signal is generated and thus nothing is captured by the capture unit. The missing pulse width, i.e. the zero width information, here indicates that the body diode has no conduction time. The control algorithm circuit then sets a predefined turn-on and/or turn- off time instance for the next switching cycle to achieve a predefined body diode conduction time. The tuning of turn-on and turn-off time is on the basis of each switching cycle. Other objects, advantages and novel features of the embodi¬ ments of the invention will become apparent from the following detailed description.
BRIEF DESCRIPTION OF THE DRAWINGS Embodiments of the invention are described in more detail with reference to attached drawings illustrating examples of embod¬ iments of the invention in which:
Fig. 1 is a schematic block diagram illustrating a
synchronous rectification control unit according to some embodiments.
Fig. 2 is a schematic block diagram illustrating a
synchronous rectification control and one power switch according to some embodiments. Fig. 3 is a schematic block diagram illustrating a
synchronous rectification control and two power switches according to some embodiments.
Fig. 4 is a flow chart diagram illustrating some
embodiments . Fig. 5 is a block diagram illustrating some embodiments.
Fig. 6 illustrates examples of input and output signals
values according to some embodiments.
Fig. 7 illustrates examples of input and output signals
values according to some embodiments. Fig. 8 illustrates examples of input and output signals
values according to some embodiments.
Fig. 9 illustrates examples of input and output signals
values according to some embodiments.
Fig. 10 illustrates examples of input and output signals
values according to some embodiments. Fig. 11 illustrates examples of input and output signals values according to some embodiments.
Fig. 12 is a flow chart diagram illustrating the synchronous rectification control method according some embodiments .
Fig. 13 is a schematic block diagram illustrating a
processing circuit implementing the synchronous rectification control method according to some embodiments .
DETAILED DESCRIPTION OF INVENTION
Embodiments of the invention described herein are defined as a synchronous rectification control unit and a method for controlling synchronous rectification, which may be put into practice in the embodiments described below. These embodiments may, however, be exemplified and realised in many different forms and are not to be considered as limited to the embodi¬ ments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete.
Still other objects and features may become apparent from the following detailed description considered in conjunction with the accompanying drawings. It is to be understood, however, that the drawings are designed solely for purposes of illustr¬ ation and not as a definition of the limits of the herein dis¬ closed embodiments, for which reference is to be made to the appended claims. Further, the drawings are not necessarily drawn to scale and, unless otherwise indicated, they are mere¬ ly intended to conceptually illustrate the structures and pro¬ cedures described herein. Figure 1 schematically illustrates the inner structure of the synchronous rectification control unit 40 implementing the embodiments of the invention.
The synchronous rectification control unit 40 includes a voltage sensing circuit 25 a capture unit 24, a memory (not shown in figure l),a control algorithm circuit 26, and a pulse width modulation, PWM, signal generator 32.
A voltage difference over a power switch 14 is an input signal 30 to the synchronous rectification control unit 40, as will be described more in detail in connection with figures 2 and 3 below .
The voltage sensing circuit 25 is configured to detect body diode conduction for the power switch 14. The voltage sensing circuit 25 is also configured to output a voltage pulse signal VDC corresponding to the detected body diode conduction.
According to an embodiment, the voltage sensing circuit 25 is further configured to output a logic high value for the voltage pulse signal VDC when the body diode is conducting a current. Correspondingly, the voltage sensing circuit 25 is further configured to output a logic low value for the voltage pulse signal VDC when the body diode is not conducting a current .
In other words, the voltage sensing circuit 25 is configured to consider the voltage difference over the power switch 14, e.g. between the potential points 22 and 23 in the non- limiting example in figure 2, as input 30 to the synchronous rectification control method. The voltage sensing circuit 25 outputs a voltage pulse signal which indicates the conduction time of the body diode 141 of the power switch 14 e.g in figure 2. The voltage sensing circuit 25 is connected to a Micro Controller Unit, MCU, 27. The MCU includes the capture unit 24, the memory, the control algorithm 26, and the PWM signal generator 32.
The capture unit 24 is configured to determine a time duration Tc for the voltage pulse signal VDC being output by the voltage sensing unit 25. The capture unit 24 is also configured to store the time duration Tc in the memory (not shown) . The capture unit 24 may be included in the MCU as stated above.
According to an embodiment, the capture unit 24 is further configured to determine the time duration Tc as being equal to a time duration during which the voltage pulse signal VDC has a logic high value.
The control algorithm circuit 26 is configured to determine a turn-on time Ton and a turn-off time T0ff to be used for a synchronous PWM control signal SQ1 or a non-synchronous PWM control signal Ql during an upcoming switching cycle. This determination of the turn—on Tori and turn—off T0ff times is based on the stored time duration Tc. The control algorithm circuit 26 may be included in the MCU. Thus, the capture unit 24 is configured to capture the
duration of the voltage pulse signal VDC, then the control algorithm circuit 26 is configured to manipulate the turn-on Ton and turn-off T0ff times, or the dead-time between the first 14 and second 13 power switches (shown in figure 3) based on the captured duration time, as is described below. In this document, dead time is a delay time inserted by one power switch at one or more edges of its switching cycles in order to provide a blank switching time in one complementary switch pair, e.g. a blank switching time between conduction for a first switch 13 and second switch 14 in figure 3. The dead time corresponds to the time period where no switching pulse is given to any of the first 14 and second 13 power switches. The dead time is utilized for preventing current shot-through, i.e. short circuit coupling in the circuits including the power switches. The PWM signal generator 32 is configured to generate PWM control signals based on the determined turn-on Ton time and on the turn-off Toff time. The PWM signal generator 32 is
configured to generate the synchronous PWM control signal SQ1 for controlling switching of the power switch 14 when the power switch is in a synchronous side of a circuit 100. The PWM signal generator 32 is configured to generate the non- synchronous PWM control signal Ql for controlling switching of the power switch 14 when the power switch is in a non- synchronous side of the circuit 100. The output signal 31 represents the desired switching pulses being based on, and corresponding to, the modified turn-on Ton and/or turn-off T0ff times of the PWM signals.
The synchronous rectification control unit 40 according to embodiments of the invention has a number of advantages. The synchronous rectification control unit can provide a high power efficiency. Also, the synchronous rectification control unit according to embodiments of the invention presents a simple, very low complex, and still robust solution to the above stated problems. The synchronous rectification control unit 40 can provide a robust synchronous rectification control for essentially all possible working conditions, without causing current shoot-through conditions.
The synchronous rectification control unit 40 provides dead- time optimisation on the non-synchronous side power switches. The synchronous rectification control unit 40 also improves operation of the synchronous side power switches. Figure 2 illustrates a circuit diagram of a non-limiting example of a circuit 100 including a power switch and the synchronous rectification control unit 40. The synchronous rectification control unit 40 is connected across the power switch 14, which can be e.g. a MOSFET, at the points 22 and 23. Thus, the input signal 30 corresponds to the voltage difference between the potential points 22 and 23. The output signal 31 of the synchronous rectification control unit 40 is a synchronous PWM control signal SQ1 for controlling switching of the power switch 14 when the power switch is in a
synchronous side of the circuit 100, or a non-synchronous PWM control signal Ql for controlling switching of the power switch 14 when the power switch is in a non-synchronous side of the circuit 100. Figure 3 illustrates a non-limiting example of a circuit diagram for a half-bridge power converter equipped with the synchronous rectification control method in the form of a first 40 and second 41 synchronous rectification control unit. The half-bridge power converter includes two power switches 13 and 14, e.g. being MOSFETs, and a capacitor 12 being connected between terminals 10 and 11 and being fed by a rectified DC voltage. Each one of the first 40 and second 41 power switches is connected to an individual first 40 and second 41
synchronous rectification control unit, respectively. The first synchronous rectification control unit 40 is
connected across the first power switch 14 at the first potential voltage points 22 and 23. Thus, the input signal 30 to the first synchronous rectification control unit 40 is the differential voltage between the first potential voltage points 22 and 23 over the first power switch 14. The second synchronous rectification control unit 41 is connected across the second power switch 13 at the second potential voltage points 28 and 29. Thus, the input signal 30 to the second synchronous rectification control unit 41 is the differential voltage between the second potential voltage points 28 and 29 over the second power switch 13.
The output signal 31 of the first synchronous rectification control unit 40 represents the desired switching pulses for the first power switch 14 being based on, and corresponding to, the modified turn-on Ton and/or turn-off Toff time of the PWM signals. The switching pulses are thus synchronous PWM control signals SQ1 for controlling switching of the first power switch 14 when the power switch is in a synchronous side of a circuit 100, and non-synchronous PWM control signals Ql for controlling switching of the first power switch 14 when the power switch is in a non-synchronous side of the circuit 100.
The output signal 31 of the second synchronous rectification control unit 41 represents the desired switching pulses for the second power switch 13 being based on, and corresponding to, the modified turn—on Tori and/or turn—off T0ff time of the PWM signals. The switching pulses are thus synchronous PWM control signals SQ1 for controlling switching of the second power switch 13 when the power switch is in a synchronous side of a circuit 100, and non-synchronous PWM control signals Ql for controlling switching of the second power switch 13 when the power switch is in a non-synchronous side of the circuit 100.
Generally, when one of the first 14 and second 13 power switches is turned/switched on, the other one of the first 14 and second 13 power switches should be turned/switched off. As is illustrated in figure 3, for a half-bridge power
converter, there are two synchronous rectification control units, i.e. one for each power switch.
The synchronous rectification control units can also be utilised e.g. for full-bridge power converters, wherein four synchronous rectification control units would be utilised, one for each power switch.
When there are more than one synchronous rectification control units utilised in a circuit to control power switches, these more than one synchronous rectification control units are logically independent and separated. However, the more than one synchronous rectification control units can be either physically separated, or can be physically integrated into one common synchronous rectification control unit. Figure 4 is a flowchart illustrating a couple of embodiments for the method/algorithm/logic of the control algorithm circuit 26 for a power switch 13, 14 being located in the non- synchronous side of the circuit 100. In the following, the logic is described for the case of controlled switching of the first power switch 14. However, corresponding logic may be utilized for controlled switching of one or more of the first 14 and second 13 switches in e.g. a half-bridge circuit as the one illustrated in figure 3.
According to an embodiment, the voltage sensing circuit 25 is further configured to detect an on-edge body diode 141 conduction for the power switch 14 of the non-synchronous side and to output an on-edge voltage pulse signal νοη c
corresponding to the on-edge body diode 141 conduction. The control algorithm circuit 26 is further configured to
determine the new turn-on time Ton and/or a new dead time Td new to be used for the synchronous pulse width modulation, PWM, control signal SQ1 or the non-synchronous PWM control signal Ql during an upcoming switching cycle.
In a first step 401, non-synchronous rectification side body diode conduction voltage pulse VDC is input to the synchronous rectification control unit 40, 41.
In a second step 402, the time duration Tc for the voltage pulse signal VDC is determined/measured.
In a third step 403, the time duration Tc is compared to the value zero, and the method proceeds to either of a fourth 404 step if the time duration Tc has a value higher than zero;
Tc>0; and a fifth step 405 if the time duration Tc is not longer than zero.
If the logic proceeds to the fourth step 404, i.e. if the time duration Tc has a value higher than zero, Tc >0, the control algorithm circuit 26 is further configured to update a dead time Td to a new dead time value Td new This new dead time value Td new is here equal to an already used dead time value Td minus a portion of the time duration Tc, Td new =Td-Tdm,
0<Tdm<Tc. If the logic proceeds to the fifth step 405, i.e. if the time duration Tc has a value equal to zero, Tc =0, the control algorithm circuit 26 is further configured to set a new dead time Td_ne„ to a predetermined value Td_pred; Td_rie„=Td_pred .
Thus, figure 4 illustrates the logic for how the dead time Td is optimized for non-synchronous rectification side power switches of the circuit 100. The input of the flow chart is the non-synchronous rectification side body diode conduction voltage pulse. Then, the time duration Tc of this voltage pulse is captured. If the time duration Tc is greater than zero, the control algorithm decides to decrease the new dead time Td new- Otherwise, if the duration time Tc is zero, the control algorithm decides to restore the dead time to a predefined value Td_pred. In other words, if the power switch 13, 14 to be controlled is located in the non-synchronous side of the circuit 100, the synchronous rectification control unit 40, 41 manipulates the dead time between the first 14 and second 13 power switches. The capture unit 24 here obtains the voltage pulse signal time duration Tc of the voltage pulse VDC from the voltage sensing circuit. Then, the control algorithm circuit 26 analyses if this time duration Tc is greater than zero. If the time duration Tc is greater than zero, then a percentage of this time duration Tc is subtracted from the dead-time Td. On the other hand, if the obtained voltage pulse signal time duration Tc is equal to zero then the new dead-time value Td new is reset to a predefined value Td pred.
Figure 5 is a flowchart illustrating a couple of embodiments for the method/algorithm/logic of the control algorithm circuit 26 for a power switch 13, 14 being located in the synchronous side of the circuit 100. In the following, the logic is described for the case of controlled switching of the first power switch 14. However, corresponding logic may be utilized for controlled switching of one or more of the first 14 and second 13 switches in e.g. a half-bridge circuit as the one illustrated in figure 3 above.
In a first step 501, the synchronous side voltage pulse signal VDC corresponding to the body diode conduction and the non- synchronous side PWM control signals Ql are input to the voltage sensing circuit 25. In a second step 502, the voltage sensing circuit 25 is further configured to detect on-edge body diode 141 conduction for the power switch 14. The voltage sensing circuit 25 is also configured to output an on-edge voltage pulse signal νοη corresponding to the on-edge body diode conduction. In figure 5, the on-edge voltage pulse signal Von is denoted as a
synchronous rectification on-edge voltage pulse signal Vsron .
The control algorithm circuit 26 is then further configured to determine the turn-on time duration Ton c as the time duration of the on-edge voltage pulse signal Von c. In figure 5, the turn-on time duration Ton c is denoted as a synchronous
rectification turn-on time duration Tsronc-
In a third step 503, the turn-on time duration Ton c is compared to the value zero, and the logic proceeds to either of a fourth 504 step if the turn-on time duration Ton c has a value higher than zero; Ton c>0; and to a fifth step 505 if the turn- on time duration Ton c is not longer than zero.
If the logic proceeds to the fourth step 504, i.e. if the turn-on time duration Ton c has a value higher than zero,
Ton c>0, the control algorithm circuit 26 is further configured to update the turn-on time Ton to a new turn-on time Ton new, in figure 5 denoted Tsron new The new turn-on time Ton new is here equal to an already used turn-on time Ton minus a portion Ton m of the turn-on time duration T0n_c; Ton_new =T0n-T0n_m; 0<TOn_m≤TOn_c; in figure 5 denoted as Tsron_new =Tsr0nTsr0nm/ 0<Tsronm— Tsronc for synchronous rectification.
If the logic proceeds to the fifth step 505, i.e. if the turn- on time duration Ton c has a value equal to zero, Ton c=0, the control algorithm circuit 26 is further configured to set the new turn-on time Ton new to a predetermined value Ton pred, in figure 5 denoted Tsron pred. In a second step 506, the voltage sensing circuit 25 is further configured to detect off-edge body diode 141
conduction for the power switch 14. The voltage sensing circuit 25 is also configured to output an off-edge voltage pulse signal Voff corresponding to the off-edge body diode conduction. In figure 5, the off-edge voltage pulse signal Voff is denoted as a synchronous rectification off-edge voltage pulse signal Vsroff .
The control algorithm circuit 26 is also configured to
determine the turn-off time duration Toff c for the synchronous PWM control signal SQl by setting the turn-off time duration T0ff c as the time duration of the off-edge voltage pulse signal V0ff c- In figure 5, the turn-off time duration T0ff c is denoted as a synchronous rectification turn-off time Tsr0ffC- In a seventh step 507, the turn-off time duration T0ff c is compared to the value zero, and the logic proceeds to either of an eighth 508 step if the turn-off time duration T0ff c has a value higher than zero; T0ff c>0; and to a ninth step 509 if the turn-off time duration T0ff c is not longer than zero. If the turn-off time duration T0ff c has a value greater than zero; T0ff c >0; the logic proceeds to the eighth step 508 and the control algorithm circuit 26 is further configured to update said turn-off time T0ff to a new turn-off time T0ff new being an already used turn-off time T0ff plus a portion T0ff m of the time duration T0ff_c; Toff_new =Toff+T0ff_m; 0<TOff_m≤TOff_c; in figure 5 denoted as Tsr0ff_new =Tsroff+Tsroffm; 0<TsrOffm-Tsroffc ·
If the turn-off time duration T0ff c has a value equal to zero; T0ff c=0; the logic proceeds to the ninth step 509 and the control algorithm circuit 26 is further configured to set the turn-off time T0ff to a predetermined value T0ff prec in figure 5 denoted as Tsroff_pred · In other words, the flow chart of figure 5 describes how the turn-on Ton and turn-off T0ff instance is optimized for the synchronous rectification side power switch (es) 14, 13. The inputs of the flow chart are the synchronous rectification side body diode conduction voltage pulse VDC and the non- synchronous rectification side PWM signals Ql . Then the time duration of the first turn-on voltage pulse Ton c/Tsronc and the time duration of the second turn-off voltage pulse Toff c/Tsroffc are captured. If the turn-on time duration Ton c/Tsronc is greater than zero the control algorithm decides to decrease the on-time of the synchronous rectification side power switch Ton new c /TSronc new/ otherwise if the turn-on time duration
Ton c/Tsronc is zero, the control algorithm decides to restore the on-time of the synchronous rectification side power switch 14, 13 to a predefined value Ton_preci_c/TSronc_preci ·
If the time duration of the second turn-off voltage pulse T0ff c/Tsroffc is greater than zero, the control algorithm decides to increase the off-time of the synchronous rectification side power switch (es) 14, 13 T0ff c new /Tsr0ffc new, otherwise if the second turn-off voltage pulse T0ff C/Tsr0ffc is zero, the control algorithm decides to restore the off-time of the synchronous rectification side power switch 14, 13 to a predefined value
J- off_c_pred /Tsroffc_pred ·
According to an aspect, the synchronous rectification control unit 40, 41, and its embodiments, is included in an integrated circuit .
As described above, the synchronous rectification control unit 40, 41 may be utilised for a power converter. According to an aspect, such a power converter is included in a power
electronic device. Figure 6 is a graph having plots that illustrate example values and waveforms of the first Qi non-synchronous PWM control signal for the first 14 power switch, and of the second Q2 non-synchronous PWM control signal for the second 13 power switch. Figure 6 further shows plots of the first voltage VQ1 over the first power switch 14, i.e. the voltage across the points 22 and 23 in figure 3, and of the second voltage VQ2 over the second power switch 13, i.e. the voltage across the points 29 and 30 in figure 3. Figure 6 further shows a plot for the voltage pulse signal VDC, i.e. the output of the voltage sensing circuit 25.
According to the operation condition presented in figure 6, a voltage pulse signal is thus created and output by the voltage sensing circuit 25, i.e. Tc >0, due to the dead-time Td being introduced in the PWM control signal scheme. Thus, figure 6 corresponds to the left branch of the flow chart of figure 4. The delayed turn-on time of power switch 14, i.e. the dead- time Td before the first Qi PWM control signal reaches its high value, allows for a current flow through the body diode 141 of the first power switch before the first power switch is turned on by the high value for the first Qi PWM control signal.
The low to high transition of the voltage pulse signal VDC indicates the time instant/moment when the body diode 141 starts to conduct a current. Correspondingly, the high to low transition of the voltage pulse signal VDC indicates the time instant/moment when the body diode 141 stops to conduct a current and thus when the body of the power switch 14 starts to conduct a current .
As described above, the voltage pulse signal VDC is captured by the capture unit 24, and information of the body diode 141 conduction time Tc is determined and stored in a memory. Obviously, the body diode 141 conduction time duration Tc is closely related to the applied PWM dead time Td. In order to reduce the body diode 141 conduction power losses, PWM dead time is Td therefore needed to be optimized in a way that the captured pulse width Tc is as narrow as possible. The control algorithm circuit 26 is therefore configured to modify the PWM dead-time Td to a new value Td new; Td new =Td-Tdm, 0<Tdm≤Tc. The new dead time value Td new will be applied to the power switches 13 and 14 during the next switching cycle. Figure 7 is a graph having plots that illustrate example values and waveforms of the first Qi non-synchronous PWM control signal for the first 14 power switch, and of the second Q2 non-synchronous PWM control signal for the second 13 power switch. Figure 7 further shows plots of the first voltage VQi over the first power switch 14, i.e. the voltage across the points 22 and 23 in figure 3, and of the second voltage VQ2 over the second power switch 13, i.e. the voltage across the points 29 and 30 in figure 3. Figure 7 further shows a plot for the voltage pulse signal VDC, i.e. the output of the voltage sensing circuit 25.
According to the operation condition presented in figure 7, if the body diode 141 of the first power switch 14 does not conduct a current, i.e. Tc =0, then the voltage sensing circuit 25 will not create any voltage pulse signal VDC . Thus, figure 7 corresponds to the right branch of the flow chart of figure 4.
In this case the control algorithm 26 will adjust the PWM dead time Td to a predefined value Td pred; Td new =Td preci and this new value Td new will then be applied to the power switches 13 and 14 during the next switching cycle. Figures 8, 9, 10 and 11 illustrate the synchronous
rectification control method according to different embodiments applied on the synchronous rectification side of the circuit 100. In these figures, the corresponding notation as in figure 5 is used. Here, four different representative operation conditions can be analysed. In figure 8 a first operation condition is illustrated, wherein only a first on- edge voltage pulse signal Von appears. In figure 9 a second operation condition is illustrated, wherein only a second off- edge voltage pulse signal Voff appears. In figure 10 a third operation condition is illustrated, wherein no voltage pulse signal appears. In figure 11 a fourth operation condition is illustrated, wherein both a first on-edge voltage pulse signal Von and a second off-edge voltage pulse signal V0ff appear.
In figures 8,9,10 and 11, the operation conditions for the synchronous rectification control method implemented in the synchronous rectification control unit 40 of figure 3 are illustrated for the case when the synchronous rectification control unit 40 is applied on the synchronous rectification side of the circuit 100 for turn-on and turn-off time
instant/moment manipulation. Thus, for the operation
conditions illustrated in figures 8,9,10 and 11, the power converter presented in figure 3 is placed/positioned on the synchronous rectification side of the circuit 100.
Figure 8 is a graph having plots that illustrate example values and waveforms of the first Qi non-synchronous PWM control signal for the first 14 power switch on the non- synchronous rectification side of the circuit, and of the second 2 non-synchronous PWM control signal for the second 13 power switch on the non-synchronous rectification side of the circuit. Figure 8 further shows example values and waveforms of the first SQi synchronous PWM control signal for the first 14 power switch on the synchronous rectification side of the circuit, and of the second SQ2 synchronous PWM control signal for the second 13 power switch on the synchronous rectification side of the circuit. Figure 8 also shows a first synchronous current iSRi, which is the current being conducted by the first power switch 14 on the synchronous side, and a second synchronous current iSR2, which is the current being conducted by the second power switch 13 on the synchronous side. Figure 8 further shows a plot for the voltage pulse signal VDC, i.e. the output of the voltage sensing circuit 25, here being a turn-on voltage pulse Von and a turn-off voltage pulse Voff .
According to the operation condition presented in figure 8, which also corresponds to the left branch of figure 5 above, a voltage pulse signal is created by the voltage sensing circuit 25 due to the delayed turn-on time T0n/TSron of the first synchronous PWM control signal SQ1 for the first synchronous power switch 14, which initiates/allows current flow through its body diode 141. The low to high transition of the voltage pulse signal VDC indicates the instant/moment when body diode 141 starts to conduct current and the high to low transition of the voltage pulse signal VDC indicates the instant/moment when the body of the power switch 14 starts to conduct
current, and thus indicates the instant/moment when the body diode 141 stops to conduct current. Such a pulse is captured by the capture unit 24, as described above, and information about the body diode 141 conduction time duration Tc/Ts r0nc is determined and stored in a memory.
Obviously, the body diode 141 conduction time duration Tc/Ts r0nc is closely related to the turn-on time T0n/TSron of the first power switch 14. In order to reduce the body diode 141
conduction power losses, the turn-on time T0n/TSron is therefore needed to be optimized in a way that the captured pulse width, i.e. the time duration Ton c/Tsronc, is as narrow as possible. Based on the time duration Ton c/Tsronc information being
determined and stored by the capture unit 24, the control algorithm circuit 26 is configured to modify the turn-on time to a new value Ton new/Tsron new such that the new turn-on time Ton new is equal to an already used turn-on time Ton minus a portion Ton m of the turn-on time duration Ton c ; Ton new =Ton-Tori m;
The new turn-on time duration value Ton new/Tsrori new will be applied to the first 14 and second 13 power switches during the next switching cycle. According to the operation described in figure 8, no voltage pulse signal Voff/Vsroff appears after the zeroing of the synchronous PWM signal SQi. Thus, the turn- off time duration of the PWM signal SQi Tsr0ff c/Toff c has a value equal to zero; Tsr0ff C/T0ff c=0, and the turn-off time Tsr0ff/T0ff will be set on a predefined value T0ff preci/Tsroff prec as
described above for the right branch of figure 5 .
Figure 9 is a graph having plots that illustrate example values and waveforms of the first Qi non-synchronous PWM control signal for the first 14 power switch on the non- synchronous rectification side of the circuit, and of the second Q2 non-synchronous PWM control signal for the second 13 power switch on the non-synchronous rectification side of the circuit. Figure 9 further shows example values and waveforms of the first SQi synchronous PWM control signal for the first 14 power switch on the synchronous rectification side of the circuit, and of the second SQ2 synchronous PWM control signal for the second 13 power switch on the synchronous
rectification side of the circuit. Figure 9 also shows a first synchronous current iSRi, which is the current being conducted by the first power switch 14 on the synchronous side, and a second synchronous current iSR2, which is the current being conducted by the second power switch 13 on the synchronous side. Figure 9 further shows a plot for the voltage pulse signal VDC, i.e. the output of the voltage sensing circuit 25, here being a turn-off voltage pulse V0ff and a turn-on voltage pulse V0n. According to the operation condition presented in figure 9, a voltage pulse signal VDC is created by the voltage sensing circuit 25 due to an early turn-off time Toff/Tsroff of the first power switch 14, which allows current flow through its body diode 141. The low to high transition of the voltage pulse signal VDC indicates the instant/moment when body of the power switch 14 stops to conduct current and the body diode 141 starts to conduct current and the high to low transition of the voltage pulse signal VDC indicates the instant/moment when the body diode 141 stops to conduct current due to the zeroing of the first synchronous current iSRi.
Such a pulse, i.e. a turn-off voltage pulse V0ff is captured by the capture unit 24, and information about the body diode 141 conduction time duration Tc/Tsr0ffC is determined and stored in the memory. Obviously, the body diode 141 conduction time duration Tc/Tsr0ffC is closely related to the turn-off time off/ groff of the power switch 14. In order to reduce the body diode 141 conduction power losses, the turn-off time Tsr0ff is therefore needed to be optimized in a way that the captured pulse width, i.e. the time duration Tc/Tsr0ffC is as narrow as possible. Based on the time information determined and stored by of the capture unit 24, the control algorithm circuit 26 is configured to modify the turn-off time instant/moment
T0ff new/Tsroff new such that the new turn-off time T0ff new is equal to an already used turn-off time T0ff plus a portion T0ff m of the turn-off time duration T0ff c Toff new =T0ff+T0ff m;
Figure imgf000037_0001
The new turn-off time value T0ff new/Ts roff new will be applied to the power switches 1 3 and 1 4 during the next switching cycle. According to operation described in figure 9 the first turn-on V0n voltage pulse signal does not appear, i.e. the turn-on time duration Ton c has a value equal to zero; Ton c= 0. Thus, the turn-on time of the PWM signal S Qi will be set to a predefined
Value T on_precl / ^ sron_pred ·
Figure 1 0 is a graph having plots that illustrate example values and waveforms of the first Qi non-synchronous PWM control signal for the first 1 4 power switch on the non- synchronous rectification side of the circuit, and of the second Q2 non-synchronous PWM control signal for the second 1 3 power switch on the non-synchronous rectification side of the circuit. Figure 1 0 further shows example values and waveforms of the first S Qi synchronous PWM control signal for the first 1 4 power switch on the synchronous rectification side of the circuit, and of the second SQ2 synchronous PWM control signal for the second 1 3 power switch on the synchronous
rectification side of the circuit. Figure 1 0 also shows a first synchronous current iSRi, which is the current being conducted by the first power switch 1 4 on the synchronous side, and a second synchronous current 1SR2, which is the current being conducted by the second power switch 1 3 on the synchronous side. Figure 1 0 further shows a plot for the voltage pulse signal VDC, i.e. the output of the voltage sensing circuit 2 5 , here being a turn-off voltage pulse V0ff and a turn-on voltage pulse Von.
According to the operation condition presented in figure 1 0 , the body diode 1 4 1 does not conduct any current. Therefore, the voltage sensing circuit 2 5 will not create any voltage pulse signals. On other words has the turn-on time duration on c has a value equal to zero; Ton c= 0 ; and the turn-off time duration T0ff c has a value equal to zero; T0ff c= 0 .
In this case the control algorithm circuit 2 6 is configured to set the turn-on time instant/moment T0n/TSron to a predefined value Ton Preci T sron preci and the turn-off time instant/moment Toff/Tsroff to a predefined value Toff_pred/Tsroff_pred . These
predefined values Ton_pred/Tsron_pred and Toff_pred/Tsroff_pred will then be applied to the power switches 1 3 and 1 4 during the next switching cycle. Figure 1 1 is a graph having plots that illustrate example values and waveforms of the first Qi non-synchronous PWM control signal for the first 1 4 power switch on the non- synchronous rectification side of the circuit, and of the second Q2 non-synchronous PWM control signal for the second 1 3 power switch on the non-synchronous rectification side of the circuit. Figure 1 1 further shows example values and waveforms of the first S Qi synchronous PWM control signal for the first 1 4 power switch on the synchronous rectification side of the circuit, and of the second SQ2 synchronous PWM control signal for the second 1 3 power switch on the synchronous
rectification side of the circuit. Figure 1 1 also shows a first synchronous current iSRi, which is the current being conducted by the first power switch 1 4 on the synchronous side, and a second synchronous current 1SR2, which is the current being conducted by the second power switch 1 3 on the synchronous side. Figure 1 1 further shows a plot for the voltage pulse signal VDC, i.e. the output of the voltage sensing circuit 2 5 , here being a turn-off voltage pulse V0ff and a turn-on voltage pulse νοη. According to the operation condition presented in figure 1 1 , two voltage pulse signals, a turn-on pulse Von and a turn-off pulse V0ff, are created and output by the voltage sensing circuit 25 during the same switching cycle. These turn-on V0n and turn-off V0ff pulses are output due to the delayed turn-on time on and the early turn-off time T0ff of the power switch 14, that allows current flow through its body diode 141. The first turn-on pulse Von signal appears before the synchronous PWM signal SQ1 of the first power switch 14 and the second turn-off voltage pulse Voff signal appears after the
synchronous PWM signal SQ1 of the first power switch 14. The low to high transition of the first turn-on voltage pulse signal Von indicates the time instant/moment when the body diode 141 starts to conduct current and the high to low transition of the first turn-on voltage pulse signal V0n indicates the moment when the body of the power switch 14 starts to conduct current and the body diode 141 stops to conduct current. The low to high transition of the second turn-off voltage pulse V0ff signal indicates the time
instant/moment when body of the power switch 14 stops to conduct current and the body diode 141 starts to conduct current and the high to low transition of the second turn-off voltage pulse V0ff signal indicates the time instant/moment when the body diode 141 stops to conduct current due to the zeroing of the first synchronous current iSRi.
The low to high and high to low transition of the first turn- on voltage pulse signal νοη is captured by the capture unit 24, and information about body diode 141 conduction time duration Ton c/Tsronc is determined and stored in the memory. In order to reduce body diode 141 conduction power losses, the turn-on time instant/moment T0n/Tsron should be optimized in a way that the captured pulse width, i.e. the time duration Ton c/Tsronc is as narrow as possible. Based on the time duration information Ton c Tsronc determined and stored by the capture unit 24, the control algorithm circuit 26 is configured to modify the turn- on time on new/Tsron new such that the new turn-on time Ton new is equal to an already used turn-on time Ton minus a portion Ton m of said turn-on time duration Ton c Ton new =T0n_T0n m;
Figure imgf000041_0001
During the same switching cycle, the low to high and high to low transition of the second turn-off voltage pulse Voff signal is captured by the capture unit 24, and information about body diode 141 conduction time duration Toff c/Tsroffc is determined and stored in the memory. In order to reduce the body diode
141 conduction power losses, the turn-off time instant/moment T0ff/Tsr0ff must be optimized in a way that the captured pulse width, i.e. the time duration T0ff c/Tsr0ffC is as narrow as possible. Based on the time information determined and stored by the capture unit 24, the control algorithm circuit 26 is configured to modify the turn-off time T0ff new/Tsroff new such that the new turn-off time T0ff new is equal to an already used turn- off time T0ff plus a portion T0ff m of the turn-off time duration T0ff_c; T0ff_new =Toff+T0ff_m; 0<TOff_m≤TOff_c- The new and optimized turn-on time instants/moments Ton new/Tsron new and the new and optimized turn-off time instants/moments T0ff new/Tsroff new will then be applied to the power switches 13 and 14 during next switching cycle.
Figure 12 is a flow chart illustrating actions of a method 300 method for controlling synchronous rectification.
It is however to be noted that any, some or all of the descr¬ ibed actions 301-303, may be performed in a somewhat different chronological order than the enumeration indicates, be per¬ formed simultaneously or even be performed in reversed order. Further, it is to be noted that some actions may be performed in a plurality of alternative manners according to different embodiments. The method 300 may comprise the following acti¬ ons :
Action 301
In a first action 301, a body diode conduction for a power switch 14 is detected.
Action 302
In a second action 302, a voltage pulse signal VDC
corresponding to the body diode conduction is output.
Action 303 In a third action 303, a time duration Tc for the voltage pulse signal VDC is determined.
Action 304
In a fourth action 304, the determined time duration Tc is stored in a memory. Action 305
In a fifth action 305, a turn-on time Ton and a turn-off time T0ff to be used for a synchronous pulse width modulation, PWM, control signal SQ1 or a non-synchronous PWM control signal Ql during an upcoming switching cycle are determined. The
determination of the turn—on Tori and turn—off T0ff times is here based on the time duration Tc being stored in the memory.
Action 306
In a sixth action 306, the synchronous PWM control signal SQ1 for controlling switching of the power switch 14 is generated when the power switch is in a synchronous side of a circuit
100. Alternatively, the non-synchronous PWM control signal Ql for controlling switching of the power switch 14 is generated when the power switch is in a non-synchronous side of the circuit 100.
Also, the method for controlling synchronous rectification may be implemented in a circuit 600 schematically illustrated in figure 13. The processing circuit 600 is configured for:
- detecting 301 body diode conduction for a power switch 14;
- outputting 302 a voltage pulse signal VDC corresponding to the body diode conduction;
- determining 303 a time duration Tc for the voltage pulse signal VDC;
- storing 304 the time duration Tc in a memory;
- determining 305 a turn-on time Ton and a turn-off time T0ff to be used for a synchronous pulse width modulation, PWM, control signal SQ1 or a non-synchronous PWM control signal Ql during an upcoming switching cycle, wherein the determination of the turn-on Ton and turn-off T0ff times is based on the stored time duration Tc; and
- generating 306, by use of the determined turn-on Ton time and turn-off T0ff time, the synchronous PWM control signal SQ1 for controlling switching of the power switch 14 when the power switch is in a synchronous side of a circuit 100; or the non- synchronous PWM control signal Ql for controlling switching of the power switch 14 when the power switch is in a non- synchronous side of the circuit.
The processing circuit 600 may comprise, e.g., one or more instances of a Central Processing Unit (CPU) , a processing unit, a processing circuit, a processor, an Application Specific Integrated Circuit (ASIC) , a microprocessor, or other pro- cessing logic that may interpret and execute instructions. The herein utilised expression "processing circuit" may thus repr- esent a processing circuitry comprising a plurality of processing circuits, such as, e.g., any, some or all of the ones enumerated above.
The processing circuit 600 may further perform data processing functions for inputting, outputting, and processing of data comprising data buffering and device control functions.
The processing circuit 600 may be connected to at least one memory 601, according to some embodiments. The memory 601 may comprise a physical device utilised to store data or programs, i.e., sequences of instructions, on a temporary or permanent basis. According to some embodiments, the memory 601 may comprise integrated circuits comprising silicon-based trans¬ istors. Further, the memory 601 may be volatile or non-vola¬ tile . The previously described actions 301-303 may be implemented through one or more processing circuits 600, together with computer program code for performing the functions of the actions 301-306. Thus a computer program product, comprising instructions for performing the actions 301-306 may perform the method 300 controlling synchronous rectification, when the computer program product is loaded in a processing circuit 600.
The computer program product mentioned above may be provided for instance in the form of a data carrier carrying computer program code for performing any, at least some, or all of the actions 301-306 according to some embodiments when being loaded into the processing circuit 600. The data carrier may be, e.g., a hard disk, a CD ROM disc, a memory stick, an opti¬ cal storage device, a magnetic storage device or any other appropriate medium such as a disk or tape that may hold mach¬ ine readable data in a non transitory manner. The computer program product may furthermore be provided as computer pro¬ gram code on a server and may be downloaded remotely, e.g., over an Internet or an intranet connection.
The terminology used in the detailed description of the embodiments as illustrated in the accompanying drawings is not intended to be limiting of the described method 300 and/ or synchronous rectification control unit 40, which instead are limited by the enclosed claims.
As used herein, the term "and/ or" comprises any and all comb- inations of one or more of the associated listed items. In addition, the singular forms "a", "an" and "the" are to be interpreted as "at least one", thus also possibly comprising a plurality of entities of the same kind, unless expressly stated otherwise. It will be further understood that the terms "includes", "comprises", "including" and/ or "comprising", specifies the presence of stated features, actions, integers, steps, operations, elements, and/ or components, but do not preclude the presence or addition of one or more other
features, actions, integers, steps, operations, elements, components, and/ or groups thereof.

Claims

1. A synchronous rectification control unit (40, 41), including :
- a voltage sensing circuit (25) configured to
- detect body diode conduction for a power switch (14), and
- output a voltage pulse signal VDC corresponding to said body diode conduction;
- a capture unit (24) configured to
- determine a time duration Tc for said voltage pulse signal VDC, and
- store said time duration Tc in a memory;
- a control algorithm circuit (26) configured to determine a turn-on time Ton and a turn-off time T0ff to be used for a synchronous pulse width modulation, PWM, control signal SQ1 or a non-synchronous PWM control signal Ql during an upcoming switching cycle, said determination of said turn-on Ton and turn-off T0ff times being based on said stored time duration Tc; and
- a PWM signal generator (32) configured to generate, by use of said determined turn—on Tori time and turn—off T0ff time, said synchronous PWM control signal SQ1 for controlling switching of the power switch (14) when the power switch is in a
synchronous side of a circuit; or said non-synchronous PWM control signal Ql for controlling switching of the power switch (14) when the power switch is in a non-synchronous side of the circuit (100) .
2. The synchronous rectification control unit (40, 41) as claimed in claim 1, wherein the voltage sensing circuit (25) is further configured to detect an on-edge body diode
conduction for the power switch (14) of said non-synchronous side and to output an on-edge voltage pulse signal νοη c
corresponding to said on-edge body diode conduction.
3. The synchronous rectification control unit (40, 41) as claimed in anyone of claims 1-2, wherein the control algorithm circuit (26) is further configured to update a dead time Td to a new dead time value Td new if the time duration Tc has a value greater than zero, Tc >0; said new dead time value Td new being equal to an already used dead time value Td minus a portion of the time duration Tc, Td_new =Td-Tdm 0<Τ^≤Το.
4. The synchronous rectification control unit (40, 41) as claimed in anyone of claims 1-3, wherein said control
algorithm circuit (26) is further configured to set a new dead time value Td_ne„ to a predetermined value Td_pred; Td_ne„ =Td_pred; if the time duration Tc has a value equal to zero, Tc =0.
5. The synchronous rectification control unit (40, 41) as claimed in claim 1, wherein
- said voltage sensing circuit (25) is further configured to detect an on-edge body diode conduction and an off-edge body diode conduction for the power switch (14) and to output an on-edge voltage pulse signal νοη and an off-edge voltage pulse signal V0ff corresponding to said on-edge body diode conduction and said off-edge body diode conduction, respectively;
- said capture unit (24) is further configured to determine a turn-on time duration Ton c as a time duration of the on-edge voltage pulse signal νοη cr and to determine a turn-off time duration T0ff c for said synchronous PWM control signal SQ1 as a time duration of the off-edge voltage pulse signal V0ff c -
6. The synchronous rectification control unit (40, 41) as claimed in claim 5, wherein the control algorithm circuit (26) is further configured to update said turn-on time Ton to a new turn-on time Ton new if said turn-on time duration Ton c has a value greater than zero, Ton c >0; said new turn-on time Ton new being equal to an already used turn-on time Ton minus a portion T0n_m of said turn-on time duration Ton_c_; Ton_new = 0n-T0n_m;
Figure imgf000048_0001
7. The synchronous rectification control unit (40, 41) as claimed in anyone of claims 5-6, wherein the control algorithm circuit (26) is further configured to set a new turn-on time Ton new to a predetermined value Ton pred if said turn-on time duration Ton c has a value equal to zero; Ton c=0.
8. The synchronous rectification control unit (40, 41) as claimed in anyone of claims 5-7, wherein the control algorithm circuit (26) is further configured to update said turn-off time T0ff to a new turn—off time T0ff new if said turn-off time duration T0ff c has a value greater than zero; T0ff c >0; said new turn-off time T0ff new being equal to an already used turn-off time T0ff plus a portion T0ff m of said turn-off time duration
Toff_c/ T0ff_new =T0ff+T0ff_m; 0<T0ff_m-T0ff_c ·
9. The synchronous rectification control unit (40, 41) as claimed in anyone of claims 5-8, wherein said control
algorithm circuit (26) is further configured to set said turn- off time T0ff to a predetermined value T0ff preci if a turn-off time duration T0ff c has a value equal to zero; T0ff c=0.
10. The synchronous rectification control unit (40, 41) as claimed in anyone of claims 1-9, wherein:
- said voltage sensing circuit (25) is further configured to output a logic high value for said voltage pulse signal VDC when said body diode is conducting a current; and
- said capture unit (24) is configured to determine the time duration Tc as equal to a time duration during which said voltage pulse signal VDC has the logic high value.
11. An integrated circuit comprising at least one of the synchronous rectification control unit according to any of claims 1-10.
12. A power electronic device having a power converter comprising the synchronous rectification control unit
according to any of claims 1-10.
13. A method for controlling synchronous rectification, including :
- detecting (301) body diode conduction for a power switch (14);
- outputting (302) a voltage pulse signal VDC corresponding to said body diode conduction;
- determining (303) a time duration Tc for said voltage pulse signal VDC;
- storing (304) said time duration Tc in a memory;
- determining (305) a turn-on time Ton and a turn-off time T0ff to be used for a synchronous pulse width modulation, PWM, control signal SQ1 or a non-synchronous PWM control signal Ql during an upcoming switching cycle, said determination of said turn—on Tori and turn—off T0ff times being based on said stored time duration Tc; and
- generating (306), by use of said determined turn-on Ton time and turn-off T0ff time, said synchronous PWM control signal SQ1 for controlling switching of the power switch (14) when the power switch is in a synchronous side of a circuit (100); or said non-synchronous PWM control signal Ql for controlling switching of the power switch (14) when the power switch is in a non-synchronous side of the circuit (100) .
14. A computer program with a program code for performing a method according to claim 13, when the computer program runs on a computer.
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