WO2015176490A1 - 一种基于通道绑定的高性能高容错存储设计方法和装置 - Google Patents

一种基于通道绑定的高性能高容错存储设计方法和装置 Download PDF

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WO2015176490A1
WO2015176490A1 PCT/CN2014/089555 CN2014089555W WO2015176490A1 WO 2015176490 A1 WO2015176490 A1 WO 2015176490A1 CN 2014089555 W CN2014089555 W CN 2014089555W WO 2015176490 A1 WO2015176490 A1 WO 2015176490A1
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data
storage
channel
channel binding
transmission
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PCT/CN2014/089555
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French (fr)
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王恩东
胡雷钧
邹定国
林楷智
贡维
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浪潮电子信息产业股份有限公司
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus

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  • the present invention relates to the field of data storage technologies, and in particular, to a high performance and high fault tolerant storage design method and apparatus based on channel bonding.
  • the present invention provides a high-performance and high-fault-tolerant memory design method and apparatus based on channel bonding, which is configured by tying a storage bus in which multiple storage controllers are located into a high-bandwidth parallel bus.
  • the drive splits the original data into several data blocks and transmits them at the same time, which can significantly improve the data transmission performance.
  • a high performance and high fault tolerant storage design method based on channel bonding including the following steps:
  • step E Perform data transmission. If the port does not fail or no new port is added, the data is chunked for verification storage; if the port fails or a new port is added, restart from step C.
  • the data directory system described in step A is the location of any set of storage controllers.
  • the driver binds several nodes into a high-speed parallel transmission channel, and these nodes are simultaneously performed when reading or writing data, and the driver is calculated through calculation.
  • the original data to be transmitted is split into several data blocks, which are batched and transferred to the binding channel for transmission.
  • step C each data block to be transmitted is calculated by an exclusive OR algorithm, and the data block and the check information are stored in different channels.
  • a high-performance and high-fault-tolerant storage device based on channel binding which is composed of a processor part, a plurality of storage controllers and a hard disk, a data directory system and a channel binding transmission system, wherein the processor part is responsible for processing and storing all things.
  • the controller is connected to the processor part and the hard disk, and is responsible for converting the storage bus protocol into a protocol suitable for the hard disk connection, wherein the data directory system is composed of a set of storage controllers and a hard disk connected thereto, the channel binding transmission system It consists of channels of several memory controllers. among them:
  • the storage controller completes the transfer of CPU data to hard disk data; for convenience of explanation, the following storage controllers and their corresponding storage media, we call them nodes;
  • Data directory system contains a set of storage controllers and hard disks, that is, a node. Directory information used to store all data, including the size, number, structure, storage location, etc. of the data block. When the driver decomposes the original data into several data blocks and transmits them in parallel through the “channel binding transmission system”, the directory information of the data is stored in the data directory system to facilitate quick searching;
  • Channel-bound transmission system It contains several nodes. The function of the system is to bind the channels of several storage controllers into a parallel bus, and then drive the original data to be split and process multiple storage controllers. Channel binding is performed to transmit data, and data information and verification information are distributed in stripes on each storage hard disk through a "data blocking verification storage" algorithm.
  • the channel binding transmission has the characteristics of load balancing, path failure retransmission, etc.
  • several storage controllers can be grouped into one group or several groups.
  • the driver attempts to locate the fault path.
  • the data is transferred to other transmission paths for retransmission, and there is no need to locate a specific fault point, and the data transmission can be quickly resumed.
  • the channel binding-based transmission method proposed by the invention can significantly improve the data transmission rate by binding the storage bus between the processor and the storage controller into a high-bandwidth parallel transmission bus, and then the calculation is performed by the driver.
  • the data is split into several databases and transmitted at the same time to achieve the goal of doubling the data throughput.
  • a “data block check storage” algorithm is proposed to ensure the integrity of the data, if a channel in the group (including the storage controller or hard disk) The data does not crash when it fails.
  • FIG. 1 is a system topology diagram of a high performance and high fault tolerant storage design method and apparatus based on channel bonding according to the present invention
  • FIG. 2 is a schematic diagram of data block verification storage of a high performance and high fault tolerant storage design method and apparatus based on channel bonding according to the present invention
  • FIG. 3 is a flow chart of data transmission of a high performance and high fault tolerant storage design method and apparatus based on channel bonding according to the present invention.
  • a method and device for designing a high-performance and high-fault-tolerant computer storage system based on channel bonding increases the bandwidth of the system by aggregating data "storage bus".
  • the system components include: (1) The processor portion; (2) a number of memory controllers and hard disks; (3) a data directory system; and (4) a channel-bound transmission system.
  • the processor is responsible for all things, the storage controller is connected to the processor and the hard disk, and is responsible for converting the "storage bus" protocol into a protocol suitable for hard disk connections, such as SAS, SATA, and so on.
  • the data directory system is only used to store the directory, structure, and storage information of the data. For example, when the system performs a data transfer, the data is first split into several copies, and then the data is stored under different storage controllers. In order to facilitate the management of these data, the original data and the split data block information are stored in the "data directory system".
  • a channel-bound transmission system consists of channels (or nodes) of several memory controllers that are bound to have a high-speed parallel transmission channel that reads or writes data. Simultaneously, it is like a component of a computer; at the same time, the driver splits the original data to be transmitted into several data blocks by calculation, and these data blocks will be distributed to the binding channel for transmission, so the data transmission performance is obviously improved.
  • the present invention takes “storage controller 1" to "storage controller N" to form a "channel-bound transmission system” as an example. As shown in FIG. 2, the transmission system is composed of N channels.
  • this embodiment proposes a "data block verification storage" algorithm, that is, each data block to be transmitted uses an exclusive OR algorithm to calculate the verification information.
  • the data block and the check information are distributed in different bands. The calculation The biggest advantage of the method is that the verification information exists in the hard disk under different channels, and the data is not incomplete due to a problem in one channel.
  • the “data block check storage” algorithm uses data and check information to be stored in different channels.
  • the check bit information is generated according to the XOR of the data block, and the original data will be divided into several parts ((N-1). After several multiple transmissions, each batch (pen) data includes (N-1) data bits and 1 check digit.
  • N 5.
  • the driver divides the original data into several data.
  • the block (several multiples of 4) is transmitted in batches, and each batch (pen) data includes 4 data bits and 1 check digit.
  • the first data is A0, B0, C0, D0, which is stored in the first 4 channels, P0 exists as the check digit on the 5th channel;
  • the second data A1, B1, C1, E1 is stored in the first
  • the P1 check digit is stored on the fourth channel, and so on.
  • the channel-bound transmission system has a load-balanced transmission function.
  • the data blocks are equally transmitted to each channel in the bundled system, that is, the traffic of each channel is guaranteed to be at a level, and there is no need for a channel to be transmitted after completion. Wait a long time for other channels to complete.
  • the driver attempts to transfer the data on the faulty path to another transmission path for retransmission. It is not necessary to locate a specific fault point, and the data can be quickly recovered. transmission.

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Abstract

本发明涉及数据存储技术领域，特别涉及一种基于通道绑定的高性能高容错存储设计方法和装置。本发明通过将多个存储总线绑定形成一个高速并行传输系统，驱动通过算法将原始数据拆分成若干个数据块同时传输，这样传输速率可以比传统方式提高将近N倍（N取决于通道绑定的数量）。

Description

一种基于通道绑定的高性能高容错存储设计方法和装置 技术领域
本发明涉及数据存储技术领域，特别涉及一种基于通道绑定的高性能高容错存储设计方法和装置。
背景技术
随着云计算、大数据等新型技术的发展，对数据存储的带宽和容量要求越来越高，由于处理器的发展速度远远超过存储介质的步伐，如何有效提高系统的存储速率和保证数据的完整性成为急需解决的技术问题。传统计算机设备一般通过PCIE芯片来连接SAS、RAID硬盘，这种方式处理器只能通过单个PCIE通道来传输数据，带宽速率成为瓶颈。
发明内容
为了解决现有技术的问题，本发明提供了一种基于通道绑定的高性能高容错存储设计方法和装置，其通过将多个存储控制器所在的存储总线绑成一个高带宽的并行总线，驱动通过算法将原始数据拆分成若干个数据块同时传输，可以将数据传输性能明显提升。
为达到上述目的，本发明所采用的技术方案如下：
一种基于通道绑定的高性能高容错存储设计方法，包括以下步骤：
A、生成数据目录系统，所述的数据目录系统由一组存储控制器和其下挂的硬盘组成；
B、生成通道绑定传输系统，所述的通道绑定传输系统由若干个存储控制器的节点构成；
C、根据端口数量计算数据块大小；
D、储存数据文件信息；
E、进行数据传输，如果端口没有失效或者没有新的端口加入，则数据分块进行校验存储；如果端口失效或者有新的端口加入，则从步骤C重新开始。
步骤A中所述的数据目录系统是任意一组存储控制器所在的位置。
步骤B中所述的通道绑定传输系统中，驱动将若干个节点绑定成有一个高速并行的传输通道，这些节点在读取或写入数据时都是同时进行的，同时驱动通过计算将原始待传输数据拆分成若干个数据块，这些数据块被分批放到绑定通道进行传输。
步骤C中，每一笔要传输的数据块都采用异或算法计算出校验信息，数据块和校验信息带状分布存储在不同的通道下。
一种基于通道绑定的高性能高容错存储装置，由处理器部分、若干个存储控制器和硬盘、数据目录系统和通道绑定传输系统构成，其中，处理器部分负责所有事物的处理，存储控制器连接处理器部分和硬盘，负责将存储总线协议转换成适合硬盘连接的协议，所述的数据目录系统由一组存储控制器和其下挂的硬盘组成，所述的通道绑定传输系统由若干个存储控制器的通道构成。其中：
(1)处理器：连接存储控制器，进行所有数据和算法的计算处理；
(2)若干个存储控制器和存储介质：存储控制器完成CPU数据到硬盘数据的传输；为了便于说明，以下存储控制器和其对应的存储介质，我们称之为节点；
(3)数据目录系统：包含一套存储控制器和硬盘，即一个节点。用于存放所有数据的目录信息，包括数据块的大小、数量、结构、存放位置等。驱动在将原始数据分解成若干个数据块，通过“通道绑定传输系统”并行传输时，将数据的目录信息存在该数据目录系统中，以方便进行快速的查找；
(4)通道绑定传输系统：包含若干个个节点，该系统的作用是将若干个存储控制器的通道绑定成并行总线，然后驱动对原始数据进行拆分处理，将多个存储控制器之间进行通道绑定来传输数据，并通过“数据分块校验存储”算法将数据信息和校验信息带状分布在各个存储硬盘中。
通道绑定传输具有负载均衡、路径故障重传等特点，通过驱动设置，可以将若干存储控制器组成一个组或几个组，当组内某个存储控制器故障时，驱动尝试将故障路径上的数据转由其他的传输路径来重传，无需定位具体的故障点，可快速恢复数据的传输。
本发明提供的技术方案带来的有益效果是：
本发明提出的基于通道绑定的传输方式可以将数据传输速率明显提高，通过将处理器和存储控制器之间的存储总线绑定为一个高带宽的并行传输总线，然后由驱动进行计算将原始数据拆分成若干数据库同时传输，达到数据吞吐量翻番的目的，同时提出一种“数据分块校验存储”算法来保证数据的完整性，如果组内某个通道(包括存储控制器或硬盘)故障时数据不会崩溃。
附图说明
图1为本发明的一种基于通道绑定的高性能高容错存储设计方法和装置的系统拓扑图；
图2为本发明的一种基于通道绑定的高性能高容错存储设计方法和装置的数据分块校验存储示意图；
图3为本发明的一种基于通道绑定的高性能高容错存储设计方法和装置的数据传输流程图。
具体实施方式
为使本发明的目的、技术方案和优点更加清楚，下面将结合附图对本 发明实施方式作进一步地详细描述。
如附图1所示，一种基于通道绑定的高性能高容错的计算机存储系统的设计方法和装置，通过将数据“存储总线”聚合的方式提高系统的带宽，其系统组成包括：(1)处理器部分；(2)若干个存储控制器和硬盘；(3)数据目录系统；(4)通道绑定传输系统。
处理器负责所有事物的处理，存储控制器连接处理器和硬盘，负责将“存储总线”协议转换成适合硬盘连接的协议，如SAS、SATA等。
本发明首先构建一个数据目录系统，该数据目录系统由一组存储控制器和其下挂的硬盘组成，称之为一个节点。数据目录系统可以是任意一组存储控制器所在的位置，本实施例以存储控制器0所在的位置为例进行说明。
数据目录系统只用于存放数据的目录、结构和存储信息。举例来说，当系统进行一笔数据传输时，会先将这个数据拆分成若干份，然后这些数据会被存进不同的存储控制器下面。为了便于对这些数据进行管理，原始数据和被拆分的数据块信息被存放在“数据目录系统”中。
通道绑定传输系统由若干个存储控制器的通道(或称为节点)构成，驱动将这若干个通道绑定成有一个高速并行的传输通道，这些通道在读取或写入数据时都是同时进行的，如同计算机的一个部件；同时驱动通过计算将原始待传输数据拆分成若干个数据块，这些数据块将被分批放到绑定通道进行传输，所以数据传输性能明显提升。为了便于说明，本发明以“存储控制器1”到“存储控制器N”组成一个“通道绑定传输系统”为例，如图2所示，此传输系统由N个通道组成。
为了保证数据在高速并行条件下传输时的可靠性，本实施例提出了一种“数据分块校验存储”算法，即每一笔要传输的数据块都采用异或算法计算出校验信息，数据块和校验信息带状分布存储在不同的通道下。该算 法的最大优点在于校验信息分别存在不同通道下的硬盘里，不会因为某一条通道出现问题而出现数据不完整。
“数据分块校验存储”算法采用数据和校验信息带状分布存储在不同的通道下，校验位信息根据数据块经过异或计算产生，原始数据将被分成若干份((N-1)的若干倍数)后分批传输，每一批(笔)数据包括(N-1)个数据位和1个校验位。
为了便于阐述，本实施例以N＝5举例说明，如图2所示，当“通道绑定传输系统”由5个通道(或叫链路)组成时，驱动会把原始数据分成若干个数据块(4的若干倍数)后分批传输，每一批(笔)数据包括4个数据位和1个校验位。假设第一笔数据为A0，B0，C0，D0，其存放在前4个通道上，P0作为校验位存在第5个通道上；第二笔数据A1，B1，C1，E1存放在第一、二、三、五通道上，P1校验位存放在第4个通道上，其他以此类推。
通道绑定传输系统具有负载均衡传输功能，首先数据块会被均等的放到捆绑系统内每个通道上传输，即保证各个通道的流量在一个水平，不会出现某个通道传完后还需要很长时间等其他通道完成。当捆绑系统里面某个通道由于某些原因出现传输带宽骤降或故障时，驱动尝试将故障路径上的数据转由其他的传输路径来重传，无需定位具体的故障点，可快速恢复数据的传输。
当捆绑系统里面又有新的通道加入时，驱动将尝试对新加入的通道初始化，然后重新组成新的捆绑系统，然后重新计算数据的传输规则，最后由新的捆绑系统通道继续传输。
通过驱动设置，可以将若干存储控制器组成一个捆绑系统或组成几个捆绑系统，从而提高系统的灵活性。
以上所述仅为本发明的较佳实施例，并不用以限制本发明，凡在本发 明的精神和原则之内，所作的任何修改、等同替换、改进等，均应包含在本发明的保护范围之内。

Claims (5)

  1. 一种基于通道绑定的高性能高容错存储设计方法，包括以下步骤：
    A、生成数据目录系统，所述的数据目录系统由一组存储控制器和其下挂的硬盘组成；
    B、生成通道绑定传输系统，所述的通道绑定传输系统由若干个存储控制器的通道构成；
    C、根据端口数量计算数据块大小；
    D、储存数据文件信息；
    E、进行数据传输，如果端口没有失效或者没有新的端口加入，则数据分块进行校验存储；如果端口失效或者有新的端口加入，则从步骤C重新开始。
  2. 根据权利要求1所述的一种基于通道绑定的高性能高容错存储设计方法，其特征在于，步骤A中所述的数据目录系统是任意一组存储控制器所在的位置。
  3. 根据权利要求1所述的一种基于通道绑定的高性能高容错存储设计方法，其特征在于，步骤B中所述的通道绑定传输系统中，驱动将若干个节点绑定成有一个高速并行的传输通道，这些节点在读取或写入数据时都是同时进行的，同时驱动通过计算将原始待传输数据拆分成若干个数据块，这些数据块被分批放到绑定通道进行传输。
  4. 根据权利要求1所述的一种基于通道绑定的高性能高容错存储设计方法，其特征在于，步骤C中，每一笔要传输的数据块都采用异或算法计算出校验信息，数据块和校验信息带状分布存储在不同的通道下。
  5. 一种基于通道绑定的高性能高容错存储装置，由处理器部分、若干个存储控制器和硬盘、数据目录系统和通道绑定传输系统构成，其中，处理器部分负责所有事物的处理，存储控制器连接处理器部分和硬盘，负责 将存储总线协议转换成适合硬盘连接的协议，所述的数据目录系统由一组存储控制器和其下挂的硬盘组成，所述的通道绑定传输系统由若干个存储控制器的节点构成。
PCT/CN2014/089555 2014-05-19 2014-10-27 一种基于通道绑定的高性能高容错存储设计方法和装置 WO2015176490A1 (zh)

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