WO2015172561A1 - 具有相位锁定功能的平面纳米振荡器阵列 - Google Patents

具有相位锁定功能的平面纳米振荡器阵列 Download PDF

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WO2015172561A1
WO2015172561A1 PCT/CN2014/094584 CN2014094584W WO2015172561A1 WO 2015172561 A1 WO2015172561 A1 WO 2015172561A1 CN 2014094584 W CN2014094584 W CN 2014094584W WO 2015172561 A1 WO2015172561 A1 WO 2015172561A1
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oscillator
planar
nano
array
oscillators
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French (fr)
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许坤远
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华南师范大学
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/13—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body combined with thin-film or thick-film passive components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157—Partial encapsulation or coating
    • H01L23/3171—Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/2003—Nitride compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/201—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys
    • H01L29/205—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds including two or more compounds, e.g. alloys in different semiconductor regions, e.g. heterojunctions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861—Diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01Q—ANTENNAS, i.e. RADIO AERIALS
    • H01Q21/00—Antenna arrays or systems
    • H01Q21/06—Arrays of individually energised antenna units similarly polarised and spaced apart
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01Q—ANTENNAS, i.e. RADIO AERIALS
    • H01Q21/00—Antenna arrays or systems
    • H01Q21/06—Arrays of individually energised antenna units similarly polarised and spaced apart
    • H01Q21/061—Two dimensional planar arrays
    • H01Q21/064—Two dimensional planar arrays using horn or slot aerials
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/26—Automatic control of frequency or phase; Synchronisation using energy levels of molecules, atoms, or subatomic particles as a frequency reference
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N89/00—Integrated devices, or assemblies of multiple devices, comprising at least one bulk negative resistance effect element covered by group H10N80/00
    • H10N89/02—Gunn-effect integrated devices
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y20/00—Nanooptics, e.g. quantum optics or photonic crystals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/20—Resistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors

Definitions

  • the present invention relates to planar nano-oscillator arrays, and more particularly to nano-oscillator arrays having phase-locking characteristics and capable of operating in the terahertz band at ambient temperatures.
  • THz Gap Thz Gap
  • the THz wave as a void has a unique set of properties, which makes it not only important academic value in basic science, but also has many attractive applications in science and technology and industry.
  • the THz wave is in the transitional zone from the macroscopic classical theory to the microscopic quantum theory. It is in the transition from electronics to photonics: it covers the rotation and oscillation frequencies of various macromolecules including proteins in the frequency domain; the quantum energy is very low, no It has a destructive effect on matter, and it has great advantages compared with X-rays. It will become a powerful tool for studying various substances, especially living matter.
  • the THz wavelength is 1000 times smaller than the microwave, so its spatial resolution is very high: it can be used for spatial and temporal resolution imaging, signal processing, large-capacity data transmission, and broadband communication, such as information science.
  • planar nanostructure-based devices have attracted more and more attention due to their simple process, easy integration and low parasitic capacitance.
  • the national invention patent 02808508.6 announced a planar nano-diode device.
  • the device is obtained by fabricating an insulated wire on a conductive substrate using a nano-etching technique to define a charge flow path. It can be used as a component to form all logic gates: such as OR, AND, and NOT; it can also be used as a rectifier to detect electromagnetic waves.
  • the device can be used to detect electromagnetic waves with a frequency of up to 1.5THz at normal temperature; if the operating temperature drops to 150K, the detection frequency can be increased to 2.5THz. Since the device has a negative differential resistance under reverse bias conditions, it can be used as a key component of the oscillating circuit. Subsequently, the national invention patent 200810219701.9 announced a spontaneously oscillating planar nano-electromagnetic wave radiation device, and a key method for making spontaneously oscillating planar nano-electromagnetic wave radiation devices.
  • the oscillation phase will change due to the coupling action when they are close to each other, and a rich phenomenon such as in-phase (synchronous) oscillation, phase-locked oscillation, and reverse-phase oscillation may occur.
  • in-phase (synchronous) oscillation phase-locked oscillation
  • reverse-phase oscillation may occur.
  • Related research has always been highly valued in the fields of science and technology. The earliest research can be traced back to the observation of the two pendulums by the famous physicist Huygens in February 1665. Later, it was found that the phase locking phenomenon exists in nature and in daily life. For example: gathered fireflies It will emit light at the same time, the consistency of the heart pacemaker cells, the mother and baby heart rate are consistent. In the field of electronics, the work of the monument is the introduction of the Adler equation.
  • phase-locked technology to fabricate phased arrays not only increases the output power of the device, but also enables the development of directional radiation sources for wireless communications.
  • patent 200810219701.9 does not disclose a key technique involving phase locking, nor does it disclose an oscillator array with phase locking.
  • subsequent related research is focused on how to improve the performance of a single planar nano-oscillator (A. -de-la-Torre, I. -de-la-Torre, J.Mateos, T.González, P.Sangaré, M.Faucher, B.Grimbert, V.Brandli,G.Ducournau and C.Gaquière,”Searching for THz Gunn oscillations in GaN planar nanodiodes” , J. Appl. Phys.
  • the object of the present invention is to provide a planar nano-oscillator array structure with a phase self-locking function, which has the advantages of simple process, easy integration on a single chip, normal temperature operation and a working frequency up to the terahertz frequency band.
  • the technical solution of the present invention is: a planar nano-oscillator array having a phase self-locking function, having two or more planar oscillators arranged in parallel, and coupling between oscillators The active planar resistance is connected to the capacitor to form a multi-path planar coupling.
  • the oscillation channels of the respective oscillators each have a width of less than 1 micrometer, and the adjacent two oscillator channel spacings are also less than 1 micrometer.
  • the nano oscillators and the planar coupling resistors and capacitors connecting them are uniformly obtained by introducing nano-insulating grooves on the same two-dimensional conductive material having negative differential mobility.
  • the input ends of the respective oscillators are connected to the electrodes through a low-resistance plane resistor A to form an input end of the array; the two lateral sides and the output ends of the respective oscillators pass another low-resistance plane resistance B and The electrodes are connected to form an output end of the array; the coupling capacitance between the oscillators is connected to the resistor B; and the planar resistors A and B are insulated from each other.
  • the cross-sectional structure of the array device is, in order from bottom to top, an insulating substrate layer, a two-dimensional semiconductor conductive layer having a negative differential mobility, and an insulating protective layer.
  • the device is fabricated on a plane of an AlGaN/GaN heterojunction structure, and the cross-sectional structure of the AlGaN/GaN heterojunction structure includes an insulating substrate, a GaN layer 11, and an AlGaN/GaN heterointerface in this order from bottom to top.
  • the oscillator comprises two electrodes, an oscillator channel, and a capacitor groove, the oscillating channel being a lateral two-insulated groove introduced through the two-dimensional electron gas layer. Formed; a longitudinally disposed separate insulating groove divides the area of the device plane except the oscillator channel into the left and right sides of the insulation, thereby forming a low resistance planar resistance A connected to the left electrode on the left side, On the right side, a low-resistance planar resistance B connected to the right electrode is formed, so that carrier transport between the two planar resistance regions can only be achieved by means of the oscillation channel of the nano oscillator; the depth of all the grooves described above is at least To penetrate the two-dimensional electron gas layer.
  • the longitudinally spaced insulating notches are disposed adjacent the input port of the oscillator.
  • the array is composed of an oscillator of the same structure, and the capacitor groove is between adjacent two oscillation channels, the width is smaller than the distance between the oscillators, and the length is smaller than the length of the oscillation channel.
  • the dielectric constant is greater than or equal to the dielectric constant of the two-dimensional conductive material.
  • the array is composed of oscillators having the same structure, the capacitor grooves are between the output ends of the oscillator, the width is smaller than the distance between the nano oscillators, and the dielectric constant is greater than or equal to two-dimensional conductivity.
  • the dielectric constant of the material is composed of oscillators having the same structure, the capacitor grooves are between the output ends of the oscillator, the width is smaller than the distance between the nano oscillators, and the dielectric constant is greater than or equal to two-dimensional conductivity. The dielectric constant of the material.
  • the device has the following advantages: it can work at room temperature; the operating frequency is high (up to the terahertz band); the process complexity is comparable to that of a single device; it can be seamlessly connected with monolithic microwave integrated circuits (MMICs); When each oscillator operates in phase, the synthesis of the output signal will achieve the best coherent enhancement; when the adjacent oscillators are in reverse phase operation, the fundamental components of the output signal cancel each other out, achieving high order while generating the signal. Harmonic extraction without the need for additional filtering.
  • MMICs monolithic microwave integrated circuits
  • FIG. 1 is a schematic view of a preferred embodiment 1 of the present invention capable of achieving in-phase oscillation
  • FIG. 1a is a planar structure of the device
  • FIG. 1b is a cross-sectional structure of a material system used for fabricating the device;
  • FIG. 2 is a schematic structural view of a second preferred embodiment of the present invention capable of implementing reverse phase oscillation
  • Figure 3 shows the output characteristics of a preferred embodiment obtained by Monte Carlo simulation, while giving the output characteristics of the non-preferred example as a comparison: (a) corresponds to a non-preferred example, and (b) corresponds to a preferred implementation. Example 1, (c) corresponds to the preferred embodiment 2;
  • Fig. 4 shows the spatiotemporal coupling characteristics of the respective implementation examples obtained by Monte Carlo simulation for explaining the working mechanism: (a) corresponds to the non-preferred embodiment, (b) corresponds to the preferred embodiment 1, and (c) corresponds Example 2 is preferred.
  • a planar nano-oscillator array with phase self-locking function comprising two or more planar nano-oscillators arranged in parallel, and connected by a pre-designed planar resistor and capacitor.
  • the above-mentioned pre-designed capacitors and resistors have the following functions: one is to adjust the impedance between the oscillators to improve the coupling efficiency; the other is to provide a specific impedance matching path so that the coupling between the oscillators is determined along the specificity determined by the impedance matching. The path occurs from causing the oscillator to operate spontaneously in a predetermined phase relationship.
  • Each oscillator is formed into an array by inputting a planar resistance A of a low resistance (compared to an oscillator) to an electrode to form an input of the array; the two lateral sides of the oscillator and the output are passed through another
  • the low-resistance planar resistor B is connected to the electrode to form an output end of the array; a coupling capacitor is introduced between the oscillators and connected to the resistor B; and the planar resistors A and B are insulated from each other.
  • the above nano-oscillators and the planar coupling resistors and capacitors connecting them can be uniformly obtained by introducing nano-insulating grooves on a two-dimensional conductive material having a negative differential mobility.
  • Insulated grooves can be divided into three types according to their applications, which are recorded as isolation grooves, oscillator grooves and capacitor grooves.
  • the oscillator slot is used to define the oscillating channel to construct the nano-oscillator;
  • the isolation groove is used to isolate the two electrode regions so that carrier transport between them can only be achieved by means of the oscillating channel of the nano-oscillator;
  • the above insulating grooves must penetrate the two-dimensional conductive layer.
  • the isolation groove is used for insulation isolation. In order to reduce its influence on the characteristics of the oscillator, the width is minimized and placed away from the signal output end of the nano oscillator.
  • the interaction between the nano-oscillators depends on the planar resistance and capacitance defined by the above-mentioned insulating trenches.
  • the coupling resistance between the oscillators can be achieved by changing the spacing between the oscillators. Changing the length, width, dielectric constant, and position of the capacitor groove enables adjustment of the coupling capacitance.
  • the planar coupling capacitor can also be adjusted by applying a layer of insulating dielectric material to the surface of the device. By designing suitable coupling capacitors and resistors, the phase difference between adjacent oscillators can be taken between 0 and ⁇ .
  • the oscillator is composed of the same structure and adopts the following design: the capacitor groove is between the nano-oscillation channels; the width is smaller than the distance between the oscillators; the length is smaller than the length of the oscillation channel; the dielectric constant filled in the groove is larger than An insulating material equal to the dielectric constant of a two-dimensional conductive material. At this point, the coupling path on the lateral side of the oscillator dominates and the oscillators will spontaneously oscillate in phase.
  • the capacitor groove is between the output ends of the oscillator; the width is smaller than the distance between the nano oscillators, and the dielectric constant filled in the groove is greater than or equal to the dielectric of the two-dimensional conductive material. Constant insulation material. At this point, the coupling path between the oscillator outputs is dominant, and each adjacent oscillator will spontaneously oscillate in reverse. Therefore, the output of the array is a high-order (secondary) harmonic that filters out the fundamental frequency.
  • the oscillation channel of each oscillator has a length and a width of less than 1 micron, and the adjacent two oscillator channel spacings are less than 1 micron.
  • FIG. 1 there is shown a schematic view of a preferred embodiment 1 for achieving in-phase oscillation in the present invention.
  • the device is fabricated on the plane of the AlGaN/GaN heterojunction structure as shown in FIG. 1b, and the cross-sectional structure of the AlGaN/GaN heterojunction structure includes an insulating substrate 14, a GaN layer 11, and an AlGaN/GaN from bottom to top. Two-dimensional electron gas layer 12 and AlGaN layer 13 on the hetero interface.
  • the device consists of two oscillators of the same size.
  • the specific structure is shown in Figure 1a: 1 and 3 are electrodes; the dotted line 6 is the central axis of the device, and the upper and lower sides are respectively connected oscillators;
  • the oscillating channel 5 is formed by introducing a lateral insulating groove 2 in the rectangular two-dimensional electron gas layer 4; the oscillating channel 8 of the oscillator below the broken line 6 is introduced by introducing a lateral arrangement in the rectangular two-dimensional electron gas layer 7.
  • Two parallel insulating grooves 9 are formed; and a longitudinally disposed separating insulating groove divides the area of the device plane except the oscillator channel into the left and right sides of the insulation, thereby forming a low connection with the electrode 1 on the left side.
  • the plane resistance A of the resistance forms a low resistance plane resistance B connected to the electrode 3 on the right side, so that carrier transport between the two planar resistance regions can only be achieved by the oscillation channel of the nano oscillator.
  • the longitudinally separating insulating groove is preferably disposed near the input port of the oscillator.
  • three longitudinally spaced insulating slots are disposed on the oscillator channel inlet, and the first separated insulating trench Extending from the upper insulating groove of the insulating groove 2 to the edge of the device, the second spaced insulating groove extends from the lower insulating groove of the insulating groove 2 to the upper insulating groove of the insulating groove 9, the third separation The insulating notch extends downward from the lower insulating notch of the insulating notch 9 to the lower edge of the device.
  • the groove 10 is parallel to the oscillator channels 5, 8 and between the two channels, the left and the second separated
  • the insulating trenches are connected, the length is slightly shorter than the oscillator channel length, and filled with a high dielectric constant insulating material.
  • All of the above-mentioned insulating grooves can be obtained by dry etching, and the depth of the groove is required to penetrate the two-dimensional electron gas layer 12 to the shallowest depth requirement; in order to avoid the influence of depth fluctuation on the device performance during processing, the depth of the groove Must be greater than 300 nanometers.
  • FIG. 2 there is shown a schematic view of a preferred embodiment 2 of the present invention which enables reverse phase oscillation.
  • the device was also fabricated on an AlGaN/GaN heterojunction structure as shown in Figure 1(b).
  • the device structure is the same as that of the first embodiment except that the coupling portion is different.
  • the specific structure is shown in FIG. 2: 15 and 17 are electrodes; the dotted line 20 is the central axis of the device, and the upper and lower sides are an oscillator;
  • the oscillating channel 19 of the upper oscillator is passed through two of the rectangular two-dimensional electron gas layers 18.
  • the insulating groove 20 is disposed laterally; the oscillating channel 22 of the oscillator below the broken line 20 is formed by two insulating grooves 23 introduced in the rectangular two-dimensional electron gas layer 21;
  • the groove divides the area of the device plane except the oscillator channel into the left and right sides of the insulation, thereby forming a low-resistance plane resistance A connected to the electrode 15 on the left side and forming a low resistance connected to the electrode 17 on the right side.
  • the plane resistance B of the value is such that carrier transport between the two planar resistive regions can only be achieved by means of the oscillating channel of the nano oscillator.
  • the longitudinally separating insulating groove is preferably disposed near the input port of the oscillator.
  • three longitudinally spaced insulating slots are disposed on the oscillator channel inlet, and the first separated insulating trench Extending from the upper insulating notch of the insulating notch 19 to the edge of the device, the second spaced insulating groove extends from the lower insulating notch of the insulating notch 19 to the upper insulating notch of the insulating notch 22, the third separation The insulating notch extends downward from the lower insulating notch of the insulating notch 23 to the lower edge of the device.
  • insulating groove 24 for adjusting the coupling path and strength between the two oscillators, the groove being parallel to the oscillator channel, and the distance 25 between the left side and the second spaced insulating groove is slightly smaller than the channel.
  • the length is such that a small portion of the groove is between the channels, but most of it is between the output of the oscillator (the areas 26 and 27 where the dotted circles exit), and the grooves are also filled with a high dielectric constant insulating material.
  • the insulating groove can be obtained by dry etching.
  • the depth of the groove is required to penetrate the two-dimensional electron gas layer 12 to the shallowest depth requirement; in order to avoid the influence of depth fluctuation on the device performance during processing, the depth of the groove must be greater than 300 Nano.
  • the operation characteristics of the structures of the above-described Embodiments 1 and 2 at room temperature can be obtained by the Monte Carlo simulation (see Figs. 3 and 4).
  • the simulation uses a structure with the following characteristic parameters: the oscillation channel length is 450 nm and the width is 50 nm; the lateral and longitudinal groove width is 30 nm, the depth is 500 nm, and the dielectric constant is 1 (no longer filled in) High dielectric constant insulating material); the two-channel spacing is 200 nm; the coupling capacitance of the insulating capacitor is also 500 nm deep and filled with an insulating material having a dielectric constant of 8.9.
  • Figure 3(a) shows the output characteristics of a non-preferred structure obtained by simulation (combining oscillators directly into an array in the manner described in patent 200810219701.9). It is easy to see that the amplitude of the oscillating current outputted by the device changes irregularly with time. It can be further seen from the inset in Fig. 3(a) that not only the amplitude of the oscillating current changes but also the oscillating waveform changes significantly.
  • Fig. 3(b) shows the output characteristics of the preferred embodiment 1. The length of the insulating capacitor groove 10 during the simulation was selected to be 320 nm and the width was 130 nm. It can be seen from the simulation results that the oscillation of the output of the device does not change with time except for a slight fluctuation.
  • Fig. 3(c) shows the output characteristics of the preferred embodiment 2.
  • the length of the insulating coupling groove 24 during the simulation is selected to be 350 nm, the width is 130 nm, and the distance 25 from the second separate insulating groove is 320 nm.
  • Fig. 4 shows the spatiotemporal variation of the potential at the connection of the oscillator: (a) corresponds to a non-preferred embodiment, (b) corresponds to the preferred embodiment 1, and (c) corresponds to the preferred embodiment 2.
  • Two of the white horizontal lines give the start and end positions of the channel.
  • the coupling between the oscillators is weak and random in the spatiotemporal distribution, which results in the randomness of the output oscillation of the device; as can be seen from Fig.
  • the coupling between the oscillators mainly occurs along the path between the channels, and has a significant time period characteristic (the frequency of which matches the fundamental frequency of the oscillating current); as can be seen from Fig. 4(c), In the preferred embodiment 2, the coupling between the oscillators mainly occurs along the path between the output terminals of the oscillator, and has a significant time period characteristic (the frequency also coincides with the fundamental frequency of the oscillating current). It can be seen from the above analysis that the introduction of the coupling structure plays the role of enhancing the coupling strength between the oscillators; the second is to cause the coupling to occur at a specific spatial position, thereby causing the oscillator to oscillate in a specific phase relationship.

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Abstract

提供一种具有相位自锁定功能的平面纳米振荡器阵列，其包含两个及以上并联设置的平面纳米振荡器。两个振荡器之间由平面电阻和电容相连，其结构包括：电极（1，3）；分别在二维电子气层（4，7）中引入横向设置的两对平行绝缘刻槽（2，9）来形成振荡沟道（5，8）；纵向设置分隔绝缘刻槽，从而在左侧形成与电极（1）连接的低阻值的平面电阻A，在右侧形成与电极（3）连接的低阻值的平面电阻B；在两个振荡器之间设置与振荡沟道（5、8）平行的绝缘电容刻槽（10），其中填入了高介电常数的绝缘材料。振荡器制作于AlGaN/GaN结构平面上，其依次包括绝缘衬底（14）、GaN层（11）、AlGaN/GaN异质界面上的二维电子气层（12）、AlGaN层（13）。

Description

具有相位锁定功能的平面纳米振荡器阵列 技术领域
本发明涉及平面纳米振荡器阵列，尤其涉及具有相位锁定特性且能在常温条件下工作于太赫兹频段的纳米振荡器阵列。
背景技术
太赫兹(THz)波是指频率范围大致为0.1-10THz(THz＝1012Hz)的电磁波。它在电磁波谱中处于一个很特殊的位置：长波方向与毫米波有重叠；短波方向与红外线有重叠。但受技术上的限制，对THz波的相关研究却大大落后于毫米波和红外线，这使得它成为目前电磁波谱中有待全面研究的最后一个频率窗口，被称为“THz空隙”(Thz Gap)。然而作为空隙的THz波却具有一系列独特的性质，使得它不仅在基础科学上有很重要的学术价值，而且在科学技术上及工业上也有很多诱人的应用。THz波处于宏观经典理论向微观量子理论的过渡区，处于电子学向光子学的过渡：在频域上覆盖了包括蛋白质在内的各种大分子的转动和振荡频率；量子能量很低，不会对物质产生破坏作用，与X射线相比，有很大的优势，必将成为研究各种物质——特别是生命物质——强有力的工具。THz波长比微波小1000倍以上，所以其空间分辨率很高：可用于如信息科学方面高的空间和时间分辨率成像、信号处理、大容量数据传输、宽带通信。此外在材料评价、分层成像、生物成像、等离子体聚变诊断、天文学及环境科学，甚至是毒品检测、武器搜查和军事情报收集等方面也都有着广阔的应用前景。
在THz科学技术中，探测器和辐射源既是基础也是关键，目前已经成为国内外研究热点。其中基于平面纳米结构的器件由于工艺简单、易于集成且寄生电容小，越来越受到人们的重视。2008年3月份，国家发明专利02808508.6公布了一种平面纳米二极管器件。该器件是通过采用纳米刻蚀技术在一个导电衬底上制作绝缘线以限定电荷流动路径而获得的。用它作为元件可以构成全部的逻辑门：如OR、AND以及NOT；也可以构成整流器，用于探测电磁波。最新的实验表明该器件在常温下能用于探测频率高达1.5THz的电磁波；如果工作温度降为150K，探测频率可以提高至2.5THz。由于该器件在反向偏压的条件下具有负微分电阻，因此可以作为振荡电路的关键元件。随后，国家发明专利200810219701.9公布了一个自发振荡的平面纳米电磁波辐射器件，以及制作自发振荡的平面纳米电磁波辐射器件的关键方法。
作为非线性周期系统的振荡器，相互靠近时其振荡相位将由于耦合作用而发生变化，可出现同相(同步)振荡、锁相振荡、反相振荡等丰富的现象。相关研究在科学和技术领域里一直以来均受到高度重视。最早的研究可以追溯到1665年二月份著名物理学家惠更斯对两个钟摆的观察。随后人们发现锁相现象大量存在于自然界与日常生活中。例如：集聚的萤火虫 会同时发光，心脏起搏细胞的一致性跳动，母亲和婴儿心跳频率一致等。在电子学领域，历程碑的工作是Adler方程的提出。它告诉人们弱耦合的LC振荡器组成阵列后将如何工作。对于纳米振荡器而言，利用锁相技术制作相控阵列，不仅能够提高器件的输出功率，而且能够开发出用于无线通信的定向辐射源。
虽然相位问题对于振荡器组成阵列是关键的，但是专利200810219701.9没有公开涉及相位锁定的关键技术，也没有公开具有相位锁定功能的振荡器阵列。而且，后续的相关研究均停留在讨论如何提升单个平面纳米振荡器的性能(A.
Figure PCTCN2014094584-appb-000001
-de-la-Torre,I.
Figure PCTCN2014094584-appb-000002
-de-la-Torre,J.Mateos,T.González,P.Sangaré,M.Faucher,B.Grimbert,V.Brandli,G.Ducournau and C.Gaquière,“Searching for THz Gunn oscillations in GaN planar nanodiodes”,J.Appl.Phys.111,113705(2012)；J.-F.Millithaler,I.
Figure PCTCN2014094584-appb-000003
-de-la-Torre,A.
Figure PCTCN2014094584-appb-000004
-de-la-Torre,T.
Figure PCTCN2014094584-appb-000005
P.Sangaré,G.Ducournau,C.Gaquière,and J.Mateos,“Optimized V-shape design of GaN nanodiodes for the generation of Gunn oscillations”,Appl.Phys.Lett.104,073509(2014).)。
发明内容
本发明的目的在于提出一种具有相位自锁定功能的平面纳米振荡器阵列结构，该阵列具有工艺简单、易于集成于单芯片上、能常温工作且工作频率高达太赫兹频段等优点。
为实现上述目的，本发明的技术方案为：所述的一种具有相位自锁定功能的平面纳米振荡器阵列，具有两个及以上的并联设置的平面振荡器，振荡器之间由起到耦合作用的平面电阻和电容相连接，从而形成多路径的平面耦合。
所述的各个振荡器的振荡沟道的宽度均小于1微米，且相邻的两振荡器沟道间距也均小于1微米。
所述的纳米振荡器及连接它们的平面耦合电阻和电容均通过在同一具有负微分迁移率的二维导电材料上引入纳米绝缘刻槽统一获得。
所述的各个振荡器的输入端通过一低阻值的平面电阻A与电极相连接形成阵列的输入端；各个振荡器的两个横向侧面及输出端通过另一低阻值的平面电阻B与电极相连接形成阵列的输出端；振荡器之间的耦合电容与电阻B相连接；上述平面电阻A、B之间相互绝缘。
所述的阵列器件的横截面结构由下往上依次为绝缘衬底层、具有负微分迁移率的二维半导体导电层以及绝缘保护层。
进一步的，器件制作于AlGaN/GaN异质结结构平面上,所述的AlGaN/GaN异质结结构横截面结构由下往上依次包括绝缘衬底、GaN层11、AlGaN/GaN异质界面上的二维电子气层、AlGaN 层。
根据本发明的一实施例，所述的振荡器包括两电极，振荡器沟道，和电容刻槽，所述的振荡沟道是通过在二维电子气层中引入的横向的两绝缘刻槽形成；另有纵向设置的分隔绝缘刻槽把器件平面除了振荡器沟道外的区域分隔成绝缘的左右两边的区域,从而在左侧形成与左侧电极连接的低阻值的平面电阻A,在右侧形成与右侧电极连接的低阻值的平面电阻B,使得两平面电阻区域之间的载流子传输只能借助纳米振荡器的振荡沟道；以上所述的所有刻槽的深度至少要穿透二维电子气层。
优选的，所述的纵向分隔绝缘刻槽设置在振荡器的输入端口附近。
根据本发明的一优选的实施例，阵列由结构相同的振荡器组成，电容刻槽处于相邻的两振荡沟道之间，宽度小于振荡器之间的距离，长度小于振荡沟道的长度，介电常数大于等于二维导电材料的介电常数。
根据本发明一优选的实施例，阵列由结构相同的振荡器组成，所述的电容刻槽处于振荡器输出端之间，宽度小于纳米振荡器之间的距离，介电常数大于等于二维导电材料的介电常数。
该器件具有如下优点：能常温工作；工作频率高(可达太赫兹频段)；工艺复杂程度与单器件相当；能与单片微波集成电路(MMICs)实现无缝连接；工作性能可设计。当各个振荡器同相工作时，输出信号的合成将达到最佳的相干增强；当相邻振荡器之间为反相工作时，输出信号的基频分量相互抵消，在产生信号的同时实现高次谐波的提取，而无需额外添加滤波装置。
附图说明
图1为本发明中能实现同相振荡的优选实施例一的示意图,图1a为器件平面结构，图1b为制作器件所用材料体系的横截面结构；
图2为本发明中能实现反相振荡的优选实施例二的结构示意图；
图3给出了由蒙特卡罗模拟获得的优选实施例子的输出特性，同时给出了非优选实施例子的输出特性作为比较：(a)对应于非优选实施例子，(b)对应于优选实施例子一，(c)对应于优选实施例二；
图4给出了由蒙特卡罗模拟获得的各实施例子的时空耦合特性，用于说明工作机制：(a)对应于非优选实施例子，(b)对应于优选实施例一，(c)对应于优选实施例子二。
具体实施方式
现将参考附图详细说明本发明的实施例及数值模拟所获得的器件工作特性。应该指出，本发明不限于这些实施例。
一种具有相位自锁定功能的平面纳米振荡器阵列：包含两个及以上并联设置的平面纳米振荡器，且它们之间由预先设计的平面电阻和电容相连。上述预先设计的电容、电阻起到如下作用：一是调整振荡器之间的阻抗以提高耦合效率；二是提供特定的阻抗匹配路径，使得振荡器之间的耦合沿着由阻抗匹配决定的特定路径发生，从使得振荡器自发地以预先设定的相位关系工作。
各个振荡器通过如下方式组成阵列：输入端通过一低阻值(与振荡器相比)的平面电阻A与电极相连接形成阵列的输入端；振荡器的两个横向侧面及输出端通过另一低阻值的平面电阻B与电极相连接形成阵列的输出端；振荡器之间引入耦合电容并与电阻B相连接；上述平面电阻A、B之间相互绝缘。
上述纳米振荡器及连接它们的平面耦合电阻和电容均可通过在具有负微分迁移率的二维导电材料上引入纳米绝缘刻槽统一获得。
绝缘刻槽根据用途的不同可分为三种，分别记为隔离刻槽、振荡器刻槽和电容刻槽。振荡器刻槽用于定义振荡沟道以构建纳米振荡器；隔离刻槽用于隔离两电极区域，使得它们之间的载流子传输只能借助纳米振荡器的振荡沟道；电容刻槽用于改变纳米振荡器之间的阻抗特性。上述绝缘刻槽均必须穿透二维导电层。其中隔离刻槽由于起到的是绝缘隔离的作用，为了减小其对振荡器特性的影响，尽量减小其宽度，并使其位于远离纳米振荡器的信号输出端。
纳米振荡器之间的相互作用取决上述绝缘沟槽所定义的平面电阻、电容。振荡器间的耦合电阻可通过改变振荡器之间的间距来实现。而改变电容刻槽的长、宽、介电常数以及位置则能够实现对耦合电容的调整。此外，平面耦合电容也可以通过在器件表面加载绝缘电介质材料层的方式加以调整。通过设计合适的耦合电容、电阻，可以使得相邻振荡器之间的相位差在0到π之间取值。
采用结构相同的振荡器组成整列并采取如下设计：电容刻槽处于纳米振荡沟道之间；宽度小于振荡器之间的距离；长度小于振荡沟道的长度；刻槽中填入介电常数大于等于二维导电材料介电常数的绝缘材料。此时，振荡器横向侧面的耦合路径占优势，各个振荡器将自发地同相振荡。
采用结构相同的振荡器组成阵列并采取如下设计：电容刻槽处于振荡器输出端之间；宽度小于纳米振荡器之间的距离，刻槽中填入介电常数大于等于二维导电材料介电常数的绝缘 材料。此时，振荡器输出端之间的耦合路径占优势，各个相邻振荡器将自发地反相振荡。因此，阵列的输出为滤去了基频的高次(二次)谐波。
优选的，各个振荡器的振荡沟道的长度和宽度均小于1微米，且相邻的两振荡器沟道间距均小于1微米。
实施例1：
参看图1，为本发明中能实现同相振荡的优选实施例子1的示意图。器件制作于如图1b所示的AlGaN/GaN异质结结构平面上,所述的AlGaN/GaN异质结结构横截面结构由下往上依次包括绝缘衬底14、GaN层11、AlGaN/GaN异质界面上的二维电子气层12、AlGaN层13。
器件包含两个相同尺寸的振荡器，具体结构如图1a所示：1和3为电极；虚线6为器件的中轴线，其上下各为一并联设置的振荡器；虚线6之上振荡器的振荡沟道5是通过在长方形二维电子气层4中引入横向的绝缘刻槽2来形成；虚线6之下振荡器的振荡沟道8是通过在长方形二维电子气层7中引入横向设置的两条平行绝缘刻槽9来形成；另有纵向设置的分隔绝缘刻槽把器件平面除了振荡器沟道外的区域分隔成绝缘的左右两边的区域,从而在左侧形成与电极1连接的低阻值的平面电阻A,在右侧形成与电极3连接的低阻值的平面电阻B,使得两平面电阻区域之间的载流子传输只能借助纳米振荡器的振荡沟道。所述的纵向分隔绝缘刻槽优选设置在振荡器的输入端口附近，在本实施例中，纵向设置的分隔绝缘刻槽有三条，设置于振荡器沟道入口上，第一条分隔绝缘沟槽从绝缘刻槽2的上绝缘刻槽向上延伸至器件的边缘，第二条分隔绝缘刻槽从绝缘刻槽2的下绝缘刻槽延伸至绝缘刻槽9的上绝缘刻槽，第三条分隔绝缘刻槽从绝缘刻槽9的下绝缘刻槽向下延伸至器件的下边缘。
在两个振荡器之间还有用于调节耦合路径及强度的长方形绝缘电容刻槽10，该刻槽10与振荡器沟道5、8平行并处于两沟道之间，左边与第二条分隔绝缘沟槽相连，长度略短于振荡器沟道长度，并且填入了高介电常数的绝缘材料。
上述的所有绝缘刻槽可以通过干法刻蚀获得，刻槽的深度以能够穿透二维电子气层12为最浅深度要求；为了避免加工时深度波动对器件性能的影响，刻槽的深度必须大于300纳米。
实施例2：
参看图2，为本发明中能实现反相振荡的优选实施例子2的示意图。器件同样制作于如图1(b)所示的AlGaN/GaN异质结结构之上。除了起耦合作用部分有所不同外，器件结构与实施例子1相同，具体结构如图2所示：15和17为电极；虚线20为器件的中轴线，其上下各为一振荡器；虚线20之上振荡器的振荡沟道19是通过在长方形二维电子气层18中的两条 横向设置的绝缘刻槽16而形成；虚线20之下振荡器的振荡沟道22是通过在长方形二维电子气层21中引入的两条绝缘刻槽23而形成；另有纵向设置的分隔绝缘刻槽把器件平面除了振荡器沟道外的区域分隔成绝缘的左右两边的区域,从而在左侧形成与电极15连接的低阻值的平面电阻A,在右侧形成与电极17连接的低阻值的平面电阻B,使得两平面电阻区域之间的载流子传输只能借助纳米振荡器的振荡沟道。所述的纵向分隔绝缘刻槽优选设置在振荡器的输入端口附近，在本实施例中，纵向设置的分隔绝缘刻槽有三条，设置于振荡器沟道入口上，第一条分隔绝缘沟槽从绝缘刻槽19的上绝缘刻槽向上延伸至器件的边缘，第二条分隔绝缘刻槽从绝缘刻槽19的下绝缘刻槽延伸至绝缘刻槽22的上绝缘刻槽，第三条分隔绝缘刻槽从绝缘刻槽23的下绝缘刻槽向下延伸置器件的下边缘。
在两个振荡器之间还有用于调节耦合路径及强度的长方形绝缘刻槽24，该刻槽与振荡器沟道平行，左边与第二条分隔绝缘刻槽之间的距离25略小于沟道长度，因此刻槽小部分处于沟道之间，但是大部分处于振荡器输出端(虚线圈出的区域26和27)之间，刻槽同时也填入了高介电常数的绝缘材料。绝缘刻槽可以通过干法刻蚀获得，刻槽的深度以能够穿透二维电子气层12为最浅深度要求；为了避免加工时深度波动对器件性能的影响，刻槽的深度必须大于300纳米。
利用系宗蒙特卡罗模拟可获得上述实施例一及实施例二的结构在常温下的工作特性(参见图3和4)。模拟时采用了具如下特征参数的结构：振荡沟道长度为450纳米，宽度为50纳米；横向和纵向的刻槽宽度为30纳米，深度为500纳米，介电常数为1(不再填入高介电常数的绝缘材料)；两沟道间距为200纳米；起耦合作用的绝缘电容刻槽深度也为500纳米并填入介电常数为8.9的绝缘材料。为了作对比，图3(a)给出了由模拟获得的非优选结构(根据专利200810219701.9中所述的方式直接把振荡器组合成阵列)的输出特性。易见，器件输出的振荡电流幅度随时间无规律变化。从图3(a)中的插图进一步可以发现：不仅振荡电流的幅度变化而且振荡波形也发生了明显的变化。图3(b)给出了优选实施例子1的输出特性。模拟时绝缘电容刻槽10的长度选取为320纳米，宽度为130纳米。由模拟结果可见，器件输出的振荡除了少许涨落外不随时间变化。而且从图3(b)的插图可见振荡的基频约为0.3太赫兹，与文献中单器件的基频相符，因此可以判断器件中的振荡器同相振荡。图3(c)给出了优选实施例子2的输出特性。模拟时绝缘耦合刻槽24的长度选取为350纳米，宽度为130纳米，与第二条分隔绝缘刻槽的距离25为320纳米。由模拟结果可见，器件输出的振荡除了少许涨落外也不随时间变化，但是其幅度仅为优选实施例子1输出振荡幅度的40％。而且从 图3(c)的插图可见振荡频率约为0.6太赫兹，是优选实施例子1输出振荡基频频率的两倍。由于器件中所包含的两个振荡器的结构相同，因此可以判断器件中的振荡器是反相振荡，因此基频成分相互抵消，输出结果主要为二次谐波。
为了进一步揭示优选实施例子的工作机制，我们进一步计算了上述三个实施例子工作时的耦合情况。图4给出了振荡器连接处电势的时空变化情况：(a)对应于非优选实施例子，(b)对应于优选实施例子1，(c)对应于优选实施例子2。其中两白色横线给出了沟道的起始和终结位置。由图4(a)可见，在非优选实施例子中振荡器间的耦合较弱而且在时空分布上具有随机性，这就导致了器件的输出振荡的随机性；由图4(b)可见，在优选实施例子1中振荡器间的耦合主要发生在沿着沟道间的路径上，而且具有明显的时间周期特性(其频率与振荡电流的基频相符)；由图4(c)可见，在优选实施例子2中振荡器间的耦合主要发生在沿着振荡器输出端之间的路径上，而且具有明显的时间周期特性(其频率也与振荡电流的基频相符)。由上述分析可见，耦合结构的引入起到了如下作用，一是增强了振荡器之间的耦合强度；二是使得耦合发生于特定的空间位置，从而使振荡器以特定的相位关系振荡。
以上仅是本发明的优选实施方式，应当指出的是，上述优选实施方式不应视为对本发明的限制，本发明的保护范围应当以权利要求所限定的范围为准。对于本技术领域的普通技术人员来说，在不脱离本发明的精神和范围内，还可以做出若干改进和润饰，这些改进和润饰也应视为本发明的保护范围。

Claims (10)

  1. 一种具有相位自锁定功能的平面纳米振荡器阵列，其特征在于：具有两个及以上的并联设置的平面振荡器，振荡器之间由起到耦合作用的平面电阻和电容相连接，从而形成多路径的平面耦合。
  2. 根据权要求1所述的一种具有相位自锁定功能的平面纳米振荡器阵列，其特征在于：所述的各个振荡器的振荡沟道的宽度均小于1微米，且相邻的两振荡器沟道间距也均小于1微米。
  3. 根据权利要求1所述的具有相位自锁定功能的平面纳米振荡器阵列，其特征在于：振荡器及连接它们的平面耦合电阻和电容均通过在同一具有负微分迁移率的二维导电材料上引入纳米绝缘刻槽统一获得。
  4. 根据权利要求1所述的具有相位自锁定功能的平面纳米振荡器阵列，其特征在于：各个振荡器的输入端通过一低阻值的平面电阻A与电极相连接形成阵列的输入端；各个振荡器的两个横向侧面及输出端通过另一低阻值的平面电阻B与电极相连接形成阵列的输出端；振荡器之间的耦合电容与电阻B相连接；上述平面电阻A、B之间相互绝缘。
  5. 根据权利要求1-4任一权利要求所述的具有相位自锁定功能的平面纳米振荡器阵列，其特征在于：器件的横截面结构由下往上依次为绝缘衬底层、具有负微分迁移率的二维半导体导电层以及绝缘保护层。
  6. 根据权利要求5所述的具有相位自锁定功能的平面纳米振荡器阵列，其特征在于：器件制作于AlGaN/GaN异质结结构平面上,所述的AlGaN/GaN异质结结构横截面结构由下往上依次包括绝缘衬底、GaN层11、AlGaN/GaN异质界面上的二维电子气层、AlGaN层。
  7. 根据权利要求6所述的具有相位自锁定功能的平面纳米振荡器阵列，其特征在于：所述的振荡器包括两电极，振荡器沟道，和电容刻槽，所述的振荡沟道是通过在二维电子气层中引入的横向的两绝缘刻槽形成；另有纵向设置的分隔绝缘刻槽把器件平面除了振荡器沟道外的区域分隔成相互绝缘的左右两边的区域,从而在左侧形成与左侧电极连接的低阻值的平面电阻A,在右侧形成与右侧电极连接的低阻值的平面电阻B,使得两平面电阻区域之间的载流子传输只能借助纳米振荡器的振荡沟道；以上所述的所有刻槽的深度至少要穿透二维电子气层。
  8. 根据权利要求7所述的具有相位自锁定功能的平面纳米振荡器阵列，其特征在于：所述的纵向分隔绝缘刻槽设置在振荡器的输入端口附近。
  9. 根据权利要求8所述的具有相位自锁定功能的平面纳米振荡器阵列，其特征在于：阵列由结构相同的振荡器组成，电容刻槽处于相邻的两振荡沟道之间，宽度小于振荡器之间的距离，长度小于振荡沟道的长度，介电常数大于等于二维导电材料的介电常数。
  10. 根据权利要求8所述的具有相位自锁定功能的平面纳米振荡器阵列，其特征在于：阵列由结构相同的振荡器组成，电容刻槽处于相邻的两振荡沟道之间，宽度小于振荡器之间的距离，长度小于振荡沟道的长度，介电常数大于等于二维导电材料的介电常数。
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