WO2015154395A1 - Système réparti et son procédé de synchronisation de phase en boucle fermée faisant appel à une rétroaction négative continue - Google Patents

Système réparti et son procédé de synchronisation de phase en boucle fermée faisant appel à une rétroaction négative continue Download PDF

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Publication number
WO2015154395A1
WO2015154395A1 PCT/CN2014/088103 CN2014088103W WO2015154395A1 WO 2015154395 A1 WO2015154395 A1 WO 2015154395A1 CN 2014088103 W CN2014088103 W CN 2014088103W WO 2015154395 A1 WO2015154395 A1 WO 2015154395A1
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Prior art keywords
time slot
phase
transmitter
threshold
next time
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PCT/CN2014/088103
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English (en)
Chinese (zh)
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谢宁
陈永城
王晖
林晓辉
曾捷
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深圳大学
谢宁
陈永城
王晖
林晓辉
曾捷
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Application filed by 深圳大学, 谢宁, 陈永城, 王晖, 林晓辉, 曾捷 filed Critical 深圳大学
Publication of WO2015154395A1 publication Critical patent/WO2015154395A1/fr

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter

Definitions

  • the invention belongs to the field of wireless communication technologies, and in particular relates to a distributed system and a closed-loop phase synchronization method based on continuous negative feedback.
  • the single-bit feedback algorithm is a common technique for achieving transmitter phase synchronization at the receiving end.
  • the latest result of the algorithm is a hybrid single-bit feedback algorithm based on distributed beamforming technology, which uses the “-1” bit information fed back from the receiver to perform a perturbation step size ⁇ for each transmitter at the transmitting end.
  • the advantage of this technique is that the received signal strength can be rapidly increased by phase compensation, and the phase attenuation can cause the received signal strength to converge in a certain time slot.
  • the transmitter has different convergence speeds under different step sizes, and the convergence gain of the algorithm will be different under different feedback adjustment mechanisms. Therefore, the convergence speed and convergence ability of the existing algorithms have room for improvement. .
  • the first technical problem to be solved by the present invention is to provide a closed-loop phase synchronization method based on continuous negative feedback in a distributed system, which aims to accelerate the convergence speed and convergence capability of the received signal strength of the receiver.
  • the present invention is achieved by a closed-loop phase synchronization method based on continuous negative feedback in a distributed system, comprising the following steps performed in each time slot:
  • Step A The receiver determines whether the strength of the received signal in the current time slot is greater than or equal to the threshold of the next stage, and feeds back corresponding single-bit information to the transmitter according to the determination result;
  • Step B the transmitter receives the single-bit information and parses, if the analysis result is that the received signal strength of the receiver is greater than or equal to the next-stage threshold, step C is performed, otherwise step D is performed;
  • Step C the best phase of the transmitter in the next time slot still takes its best phase in the current time slot, and does not generate a disturbance step in the next time slot; the best phase of the transmitter in the next time slot plus the initial phase plus the initial phase Transmitting the signal as the phase of the transmission, and incrementing the number of stages by one, the counter is set to zero; the initial phase is obtained by estimating the signal received by the transmitter in the first time slot according to the transmitter;
  • Step D The transmitter determines whether the counter value of the counter exceeds a preset threshold threshold. If exceeded, the transmitter's disturbance step size in the next time slot is equal to the product of the disturbance step direction and the current phase threshold step, and the transmitter is next. The gap is subtracted from the optimal phase of the current time slot by the sum of the disturbance steps of its threshold threshold and the disturbance step of the next time slot, and the obtained value is used as the optimal phase of the next time slot, and the transmitter is next.
  • the upper initial phase acts as a transmit phase to transmit a signal and increments the counter; wherein the disturbance step direction is randomly generated by the transmitter;
  • a second technical problem to be solved by the present invention is to provide a distributed system including a plurality of transmitters and receivers for determining whether the strength of a received signal in a current time slot is greater than or equal to each time slot. a first-stage threshold, and feedback corresponding single-bit information to the transmitter according to the judgment result; the transmitter is configured to perform parsing after receiving the single-bit information;
  • the best phase of the transmitter in the next time slot still takes its best phase in the current time slot, and no disturbance step is generated in the next time slot, and the best time slot of the transmitter in the next time slot is below.
  • the phase plus the initial phase is used as the transmit phase to transmit the signal, and the number of stages is incremented by one, and the counter is set to zero; the initial phase is obtained by estimating the signal received by the transmitter in the first time slot according to the transmitter;
  • the transmitter determines whether the counter value of the counter exceeds a preset threshold threshold. If exceeded, the transmitter's disturbance step size in the next time slot is equal to the product of the disturbance step direction and the current phase threshold step, and transmits.
  • the machine subtracts the sum of the disturbance step sizes of its threshold threshold and the consecutive time slots in the next time slot with the optimal phase of the current time slot and adds the disturbance step size of the next time slot, and the obtained value is used as the optimal phase of the next time slot, and the transmission is performed.
  • the counter is used to count the number of consecutive time slots in which the strength of the continuously received signal is less than the threshold of the next stage.
  • stage threshold step size decreases as the number of stages increases.
  • the correspondence between the number of stages, the stage threshold step, and the stage threshold is as follows:
  • the invention has the following advantages:
  • the present invention proposes a disturbance step selection mechanism: a phase threshold step selection mechanism.
  • a disturbance step selection mechanism In the initial few time slots, large step disturbances can be used to enable the receiver The received signal strength increases rapidly. In the late time slots, small step disturbances can be used to obtain better stability even if the receiver signal strength converges to the ideal condition.
  • the "-1" bit information is incremented when the counter C n is the same at each transmitter and is updated synchronously.
  • the optimal phase ⁇ i (n) of each transmitter is different.
  • the purpose of the adjustment is to use the mechanism to suppress the continuous feedback of the "-1" bit information by the receiver when the receiver continuously feeds back "-1” bit information, so that the algorithm returns to the normal algorithm convergence process. .
  • FIG. 1 is an architectural diagram of a distributed system provided by the present invention
  • FIG. 3 is a flow chart of feedback adjustment of a phase synchronization method provided by the present invention.
  • FIG. 5 is a flowchart of the RSS synchronization method in the phase synchronization method provided by the present invention being smaller than the current threshold.
  • a plurality of transmitters simultaneously transmit signals to a receiver, and adjust the phase of the transmitted signal of the next time slot according to the single bit information fed back by the receiver, and finally pass the phase.
  • the manner of compensation synchronizes the phase of the respective received signals arriving at the receiver.
  • the transmitter receives the fed back single-bit information to determine whether to adjust the transmit signal phase. Transmitting phase of each transmitter
  • the bit formula is as follows:
  • ⁇ i ⁇ i + ⁇ i (n)+ ⁇ i ⁇ i , ⁇ i ⁇ [0,2 ⁇ ) (1)
  • ⁇ i represents the unknown phase offset of the ith transmitter
  • ⁇ i represents the phase response between the ith transmitter and the receiver, assuming that ⁇ i and ⁇ i are always static during the convergence of the algorithm, in accordance with The variable of [0, 2 ⁇ ) is evenly distributed and is unknown to both the transmitter and the receiver, both of which are collectively referred to as the initial phase C.
  • the best phase ⁇ i (n) is recorded in memory for beamforming, and at each time slot, a perturbation step size ⁇ i is compensated according to the single bit information fed back by the receiver ( n), ie the optimal phase ⁇ i (n) is a function of ⁇ i (n), enabling the algorithm to achieve phase synchronization at the receiver end in a certain time slot.
  • the present invention introduces a new disturbance step generation method to achieve phase compensation for each transmitter, that is, the disturbance step size ⁇ i (n) is staged and large to small.
  • the disturbance step size ⁇ i (n) is generated by the phase threshold step g(k) in FIG. 2, and the direction is random.
  • the training process proceeds to the next phase k+1.
  • the current adjustments are useful to bring the phases between the transmitters closer together in a common direction.
  • phase threshold step is the size of the random disturbance added by the transmitter at different stages.
  • the phase threshold is determined by the maximum phase difference x(k) between the transmitters by the formula (4).
  • the value is at the receiver and the received signal.
  • the intensity R(n) is compared to determine if it should proceed to the next stage.
  • the two are mainly generated by the following two formulas:
  • phase threshold step g(k) of each phase can be generated, and the generation rule is:
  • the phase threshold step is half of the maximum phase difference. It can be seen that in the case where the transmitter phase variation range is [0, 2 ⁇ ), the transmitter phase difference is [0, ⁇ ). Obviously, the phase threshold step is half of the maximum phase difference for two purposes: It is possible to regularly reduce the phase difference between the transmitters. Second, the step size of the adjustment will be from large to small, the acceleration algorithm converges in the early stage, and the algorithm converges to the ideal situation in the later stage.
  • FIG. 3 illustrates the feedback adjustment mechanism between the transmitter and receiver of the present invention.
  • the closed-loop phase synchronization method based on continuous negative feedback provided by the present invention includes the following steps performed in each time slot:
  • Step A The receiver determines whether the strength of the received signal in the current time slot is greater than or equal to the threshold of the next stage, and feeds back corresponding single-bit information to the transmitter according to the determination result;
  • Step B the transmitter receives the single-bit information and parses, if the analysis result is that the received signal strength of the receiver is greater than or equal to the next-stage threshold, step C is performed, otherwise step D is performed;
  • Step C the best phase of the transmitter in the next time slot still takes its best phase in the current time slot, and does not generate a disturbance step in the next time slot; the best phase of the transmitter in the next time slot plus the initial phase plus the initial phase Transmitting the signal as the phase of the transmission, and incrementing the number of stages by one, the counter is set to zero; the initial phase is obtained by estimating the signal received by the transmitter in the first time slot according to the transmitter;
  • Step D The transmitter determines whether the counter value of the counter exceeds a preset threshold threshold. If exceeded, the transmitter's disturbance step size in the next time slot is equal to the product of the disturbance step direction and the current phase threshold step, and the transmitter is next. The gap is subtracted from the optimal phase of the current time slot by the threshold of its consecutive thresholds. The sum of the moving step and the perturbation step of the next time slot, the obtained value is taken as the optimal phase of the next time slot, and the transmitter transmits the signal by adding the initial phase as the transmitting phase to the best phase of the time slot below the next time slot.
  • the transmitter's perturbation step in the next slot is equal to the product of its perturbation step direction and the current phase threshold step, and the transmitter is in the next slot with the best phase of the current slot.
  • the sum of the disturbance step sizes of the next time slot is used as the optimal phase of the next time slot, and the transmitter transmits the signal by adding the initial phase as the transmission phase to the optimum phase of the next time slot and increments the counter;
  • the direction of the disturbance step is randomly generated by the transmitter; the counter is used to count the number of consecutive time slots in which the strength of the continuously received signal is less than the threshold of the next stage.
  • Steps C and D correspond to the +1 module flow of FIG. 4 and the -1 module flow of FIG. 5, respectively.
  • the disturbance step size ⁇ i (n) has a random direction, but at a certain stage, its size is fixed.
  • formula (5) the formula for adjusting the disturbance step size can be obtained as follows:
  • randsrc(N,1) generates a random disturbance step direction.
  • the transmitter phase does not generate a disturbance step, and the adjustment proceeds to the next step.
  • Stage, ie k k+1. If it is less than the next stage threshold, a new direction change is generated and the size of the disturbance step is unchanged, the magnitude of which is generated by the stage threshold step g(k).
  • the optimum phase ⁇ i (n) is updated according to the threshold threshold C T only when the receiver feeds back "-1" bit information.
  • the updated formula for both is as follows:
  • the counter C n performs an increment operation only when "-1" bit information is continuously received.
  • the optimal phase ⁇ i (n) is updated differently only when the "-1" bit information is fed back.
  • the present invention can be applied to a wireless environment in which a plurality of wireless transmitting nodes transmit the same signal to a receiver, form a closed loop by the feedback adjustment mechanism of the present invention, and quickly converge the signal strength of the receiver under a complicated channel.

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Mobile Radio Communication Systems (AREA)

Abstract

La présente invention est applicable dans le domaine technique des radiocommunications. L'invention concerne un système réparti et un procédé de synchronisation de phase en boucle fermée faisant appel à une rétroaction négative continue. Selon la présente invention, une perturbation à grande taille de pas est utilisée dans plusieurs créneaux temporels initiaux quand l'intensité d'un signal reçu est inférieure à un seuil d'étage suivant, permettant ainsi une croissance rapide de l'intensité du signal reçu d'un récepteur ; une perturbation à petite taille de pas est utilisée dans des créneaux temporels d'étage ultérieur quand l'intensité du signal reçu est inférieure à un seuil d'étage suivant, permettant ainsi l'obtention de la stabilité de l'état de la technique, et permettant de manière itérative aux intensités de signal du récepteur de converger vers une situation idéale ; également, quand le récepteur renvoie à plusieurs reprises et successivement des informations de bit "-1", un renvoi répété d'informations de bit "-1" par le récepteur est supprimé, ce qui permet à un algorithme de retourner à un processus de convergence d'algorithme normal.
PCT/CN2014/088103 2014-04-10 2014-10-05 Système réparti et son procédé de synchronisation de phase en boucle fermée faisant appel à une rétroaction négative continue WO2015154395A1 (fr)

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CN103905178B (zh) * 2014-04-10 2017-01-25 深圳大学 分布式系统及其基于定向负反馈的闭环式相位同步方法
CN103944710B (zh) * 2014-04-10 2017-01-25 深圳大学 分布式系统及其基于连续负反馈的闭环式相位同步方法
CN105306190B (zh) * 2015-12-08 2018-04-03 深圳大学 基于累积正反馈的闭环式相位同步方法及分布式通信系统
CN107437963B (zh) * 2017-07-05 2020-10-20 深圳大学 基于反馈控制的分布式安全波束成型方法及装置
WO2019006715A1 (fr) * 2017-07-05 2019-01-10 深圳大学 Procédé et appareil de formation de faisceau sécurisé et distribué basé sur un contrôle de rétroaction
CN113242074B (zh) * 2021-03-31 2022-06-03 电子科技大学 一种两步法2bit反馈迭代的协作波束形成相位同步方法

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CN102057581A (zh) * 2008-06-27 2011-05-11 熵敏通讯股份有限公司 用于有源双工器的系统和方法
CN103475460A (zh) * 2013-09-17 2013-12-25 北京邮电大学 分布式波束成形中的相位同步方法及系统
CN103905178A (zh) * 2014-04-10 2014-07-02 深圳大学 分布式系统及其基于定向负反馈的闭环式相位同步方法
CN103944710A (zh) * 2014-04-10 2014-07-23 深圳大学 分布式系统及其基于连续负反馈的闭环式相位同步方法

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Publication number Priority date Publication date Assignee Title
CN102057581A (zh) * 2008-06-27 2011-05-11 熵敏通讯股份有限公司 用于有源双工器的系统和方法
CN103475460A (zh) * 2013-09-17 2013-12-25 北京邮电大学 分布式波束成形中的相位同步方法及系统
CN103905178A (zh) * 2014-04-10 2014-07-02 深圳大学 分布式系统及其基于定向负反馈的闭环式相位同步方法
CN103944710A (zh) * 2014-04-10 2014-07-23 深圳大学 分布式系统及其基于连续负反馈的闭环式相位同步方法

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