WO2015148210A3 - Gestion de synapses plastiques - Google Patents

Gestion de synapses plastiques Download PDF

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Publication number
WO2015148210A3
WO2015148210A3 PCT/US2015/021240 US2015021240W WO2015148210A3 WO 2015148210 A3 WO2015148210 A3 WO 2015148210A3 US 2015021240 W US2015021240 W US 2015021240W WO 2015148210 A3 WO2015148210 A3 WO 2015148210A3
Authority
WO
WIPO (PCT)
Prior art keywords
management
synapse
plastic
plastic synapse
synapse type
Prior art date
Application number
PCT/US2015/021240
Other languages
English (en)
Other versions
WO2015148210A2 (fr
Inventor
Vikram Gupta
Sarah Paige Gibson
Jeffrey Alexander LEVIN
Ravindra Manohar Patwardhan
Avijit Chakraborty
William Howard CONSTABLE
William Richard BELL II
Original Assignee
Qualcomm Incorporated
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Incorporated filed Critical Qualcomm Incorporated
Priority to KR1020167028651A priority Critical patent/KR101825937B1/ko
Priority to EP15714722.4A priority patent/EP3123406A2/fr
Priority to JP2016558797A priority patent/JP6193509B2/ja
Priority to CN201580016078.5A priority patent/CN106133763B/zh
Publication of WO2015148210A2 publication Critical patent/WO2015148210A2/fr
Publication of WO2015148210A3 publication Critical patent/WO2015148210A3/fr

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/06—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons
    • G06N3/063—Physical realisation, i.e. hardware implementation of neural networks, neurons or parts of neurons using electronic means
    • G06N3/065—Analogue means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/08—Learning methods
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06N—COMPUTING ARRANGEMENTS BASED ON SPECIFIC COMPUTATIONAL MODELS
    • G06N3/00—Computing arrangements based on biological models
    • G06N3/02—Neural networks
    • G06N3/04—Architecture, e.g. interconnection topology

Abstract

Un procédé de gestion de la plasticité synaptique dans un réseau neuronal consiste à convertir un premier ensemble de synapses d'un premier type de synapse plastique à un type de synapse fixe. Le procédé peut également consister à convertir un second ensemble de synapses du premier type de synapse fixe au type de synapse plastique.
PCT/US2015/021240 2014-03-27 2015-03-18 Gestion de synapses plastiques WO2015148210A2 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR1020167028651A KR101825937B1 (ko) 2014-03-27 2015-03-18 가소성 시냅스 관리
EP15714722.4A EP3123406A2 (fr) 2014-03-27 2015-03-18 Gestion de synapses plastiques
JP2016558797A JP6193509B2 (ja) 2014-03-27 2015-03-18 可塑性シナプス管理
CN201580016078.5A CN106133763B (zh) 2014-03-27 2015-03-18 可塑性突触管理

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US14/228,078 US9542645B2 (en) 2014-03-27 2014-03-27 Plastic synapse management
US14/228,078 2014-03-27

Publications (2)

Publication Number Publication Date
WO2015148210A2 WO2015148210A2 (fr) 2015-10-01
WO2015148210A3 true WO2015148210A3 (fr) 2016-02-04

Family

ID=52814217

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2015/021240 WO2015148210A2 (fr) 2014-03-27 2015-03-18 Gestion de synapses plastiques

Country Status (6)

Country Link
US (1) US9542645B2 (fr)
EP (1) EP3123406A2 (fr)
JP (1) JP6193509B2 (fr)
KR (1) KR101825937B1 (fr)
CN (1) CN106133763B (fr)
WO (1) WO2015148210A2 (fr)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3427192A4 (fr) * 2016-03-11 2019-03-27 Magic Leap, Inc. Apprentissage de structure dans des réseaux neuronaux à convolution
US20200019838A1 (en) * 2018-07-11 2020-01-16 The Board Of Trustees Of The Leland Stanford Junior University Methods and apparatus for spiking neural network computing based on randomized spatial assignments
KR102356787B1 (ko) * 2019-04-15 2022-01-28 한국과학기술원 신경망을 이용한 기억 장치 및 그의 정확성-저장용량 트레이드오프에 기반한 정보의 자동적 재분배 및 가변적 저장 용량 구현을 위한 동작 방법
US20220230064A1 (en) * 2021-01-20 2022-07-21 Mediatek Singapore Pte. Ltd. Calibration of analog circuits for neural network computing
JP7447034B2 (ja) 2021-02-24 2024-03-11 株式会社東芝 シナプス回路およびニューラルネットワーク装置

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Publication number Priority date Publication date Assignee Title
GB9902115D0 (en) 1999-02-01 1999-03-24 Axeon Limited Neural networks
WO2004048513A2 (fr) 2002-05-03 2004-06-10 University Of Southern California Systemes neuronaux artificiels munis de synapses dynamiques
US7496546B2 (en) 2003-03-24 2009-02-24 Riken Interconnecting neural network system, interconnecting neural network structure construction method, self-organizing neural network structure construction method, and construction programs therefor
US7533071B2 (en) * 2005-06-28 2009-05-12 Neurosciences Research Foundation, Inc. Neural modeling and brain-based devices using special purpose processor
US8630966B2 (en) 2009-01-27 2014-01-14 Salk Institute For Biological Studies Temporally dynamic artificial neural networks
JP5779332B2 (ja) * 2010-11-03 2015-09-16 学校法人中部大学 ニューラルネットワークの学習装置、学習方法およびそれを用いたｍｐｐｔコンバータの制御装置
US8738554B2 (en) * 2011-09-16 2014-05-27 International Business Machines Corporation Event-driven universal neural network circuit
US9092735B2 (en) 2011-09-21 2015-07-28 Qualcomm Incorporated Method and apparatus for structural delay plasticity in spiking neural networks
US8909575B2 (en) 2012-02-29 2014-12-09 Qualcomm Incorporated Method and apparatus for modeling neural resource based synaptic placticity
US20140074761A1 (en) 2012-05-30 2014-03-13 Qualcomm Incorporated Dynamical event neuron and synapse models for learning spiking neural networks
US9002760B2 (en) * 2012-08-23 2015-04-07 Qualcomm Incorporated Neural system of adaptive behavior
US9460382B2 (en) * 2013-12-23 2016-10-04 Qualcomm Incorporated Neural watchdog

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
IGLESIAS J ET AL: "Dynamics of pruning in simulated large-scale spiking neural networks", BIOSYSTEMS, NORTH-HOLLAND, AMSTERDAM, NL, vol. 79, no. 1-3, 1 January 2005 (2005-01-01), pages 11 - 20, XP027606684, ISSN: 0303-2647, [retrieved on 20050101] *
JAYAWAN H B WIJEKOON ET AL: "Heterogeneous neurons and plastic synapses in a reconfigurable cortical neural network IC", 2012 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, 1 May 2012 (2012-05-01), pages 2417 - 2420, XP055233864, ISBN: 978-1-4673-0217-3, DOI: 10.1109/ISCAS.2012.6271786 *
NAGESWARAN J M ET AL: "A configurable simulation environment for the efficient simulation of large-scale spiking neural networks on graphics processors", NEURAL NETWORKS, ELSEVIER SCIENCE PUBLISHERS, BARKING, GB, vol. 22, no. 5-6, 1 July 2009 (2009-07-01), pages 791 - 800, XP026446158, ISSN: 0893-6080, [retrieved on 20090702] *
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Also Published As

Publication number Publication date
WO2015148210A2 (fr) 2015-10-01
US9542645B2 (en) 2017-01-10
CN106133763B (zh) 2018-02-09
EP3123406A2 (fr) 2017-02-01
KR101825937B1 (ko) 2018-02-06
JP6193509B2 (ja) 2017-09-06
JP2017515207A (ja) 2017-06-08
CN106133763A (zh) 2016-11-16
KR20160138125A (ko) 2016-12-02
US20150278683A1 (en) 2015-10-01

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