WO2015142770A3 - Configuring resources used by a graphics processing unit - Google Patents

Configuring resources used by a graphics processing unit Download PDF

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Publication number
WO2015142770A3
WO2015142770A3 PCT/US2015/020850 US2015020850W WO2015142770A3 WO 2015142770 A3 WO2015142770 A3 WO 2015142770A3 US 2015020850 W US2015020850 W US 2015020850W WO 2015142770 A3 WO2015142770 A3 WO 2015142770A3
Authority
WO
WIPO (PCT)
Prior art keywords
root
arguments
application
data structure
processing unit
Prior art date
Application number
PCT/US2015/020850
Other languages
French (fr)
Other versions
WO2015142770A2 (en
Inventor
Amar Patel
Matthew D. SANDY
Yuri Dotsenko
Jesse T. NATALIE
Max A. Mcmullen
Original Assignee
Microsoft Technology Licensing, Llc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US14/480,617 external-priority patent/US9766954B2/en
Application filed by Microsoft Technology Licensing, Llc filed Critical Microsoft Technology Licensing, Llc
Publication of WO2015142770A2 publication Critical patent/WO2015142770A2/en
Publication of WO2015142770A3 publication Critical patent/WO2015142770A3/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T1/00—General purpose image data processing
    • G06T1/60—Memory management
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/451—Execution arrangements for user interfaces
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/30—Creation or generation of source code
    • G06F8/36—Software reuse
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformation of program code
    • G06F8/41—Compilation
    • G06F8/44—Encoding
    • G06F8/443—Optimisation
    • G06F8/4441—Reducing the execution time required by the program code
    • G06F8/4443—Inlining

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • General Engineering & Computer Science (AREA)
  • Image Generation (AREA)

Abstract

The application programming interface permits an application to specify resources to be used by shaders, executed by the GPU, through a data structure called the "root arguments." A root signature is a data structure in an application that defines the layout of the root arguments used by an application. The root arguments are a data structure resulting from the application populating locations in memory according to the root signature. The root arguments can include one or more constant values or other state information, and/or one or more pointers to memory locations which can contain descriptors, and/or one or more descriptor tables. Thus, the root arguments can support multiple levels of indirection through which a GPU can identify resources that are available for shaders to access.
PCT/US2015/020850 2014-03-19 2015-03-17 Configuring resources used by a graphics processing unit WO2015142770A2 (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201461955715P 2014-03-19 2014-03-19
US61/955,715 2014-03-19
US14/480,617 US9766954B2 (en) 2014-09-08 2014-09-08 Configuring resources used by a graphics processing unit
US14/480,617 2014-09-08

Publications (2)

Publication Number Publication Date
WO2015142770A2 WO2015142770A2 (en) 2015-09-24
WO2015142770A3 true WO2015142770A3 (en) 2015-12-03

Family

ID=53059390

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2015/020850 WO2015142770A2 (en) 2014-03-19 2015-03-17 Configuring resources used by a graphics processing unit

Country Status (1)

Country Link
WO (1) WO2015142770A2 (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019206398A1 (en) * 2018-04-23 2019-10-31 Huawei Technologies Co., Ltd. Instruction processing
US10679317B2 (en) * 2018-07-19 2020-06-09 Microsoft Technology Licensing, Llc Techniques for displaying a shader table associated with raytracing images

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7659901B2 (en) * 2006-07-24 2010-02-09 Microsoft Corporation Application program interface for programmable graphics pipeline

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7659901B2 (en) * 2006-07-24 2010-02-09 Microsoft Corporation Application program interface for programmable graphics pipeline

Non-Patent Citations (11)

* Cited by examiner, † Cited by third party
Title
JAIKRISHNAN MENON ET AL: "iGPU: Exception support and speculative execution on GPUs", COMPUTER ARCHITECTURE (ISCA), 2012 39TH ANNUAL INTERNATIONAL SYMPOSIUM ON, IEEE, 9 June 2012 (2012-06-09), pages 72 - 83, XP032200023, ISBN: 978-1-4673-0475-7, DOI: 10.1109/ISCA.2012.6237007 *
MICROSOFT: "D3D11_SHADER_RESOURCE_VIEW_DESC structure", MICROSOFT - WINDOWS DEV CENTER, 14 August 2012 (2012-08-14), pages 1 - 3, XP055212493, Retrieved from the Internet <URL:https://web.archive.org/web/20120814041516/http://msdn.microsoft.com/en-us/library/windows/desktop/ff476211(v=vs.85).aspx> [retrieved on 20150910] *
MICROSOFT: "How To: Create a Device and Immediate Context", MICROSOFT - WINDOWS DEV CENTER, 23 July 2012 (2012-07-23), pages 1 - 3, XP055212678, Retrieved from the Internet <URL:https://web.archive.org/web/20120723035134/http://msdn.microsoft.com/en-us/library/windows/desktop/ff476879(v=vs.85).aspx> [retrieved on 20150910] *
MICROSOFT: "ID3D11Device::CreateShaderResourceView method", MICROSOFT - WINDOWS DEV CENTER, 29 July 2012 (2012-07-29), pages 1 - 2, XP055212561, Retrieved from the Internet <URL:https://web.archive.org/web/20120729035532/http://msdn.microsoft.com/en-us/library/windows/desktop/ff476519(v=vs.85).aspx> [retrieved on 20150910] *
MICROSOFT: "ID3D11ShaderResourceView interface", MICROSOFT - WINDOWS DEV CENTER, 31 May 2012 (2012-05-31), pages 1 - 2, XP055212367, Retrieved from the Internet <URL:https://web.archive.org/web/20120531144143/http://msdn.microsoft.com/en-us/library/windows/desktop/ff476628(v=vs.85).aspx> [retrieved on 20150909] *
MICROSOFT: "ID3D11ShaderResourceView::GetDesc method", MICROSOFT - WINDOWS DEV CENTER, 23 July 2012 (2012-07-23), pages 1 - 2, XP055212491, Retrieved from the Internet <URL:https://web.archive.org/web/20120723112718/http://msdn.microsoft.com/en-us/library/windows/desktop/ff476629(v=vs.85).aspx> [retrieved on 20150910] *
MICROSOFT: "Introduction to a Resource in Direct3D 11", MICROSOFT - WINDOWS DEV CENTER, 28 May 2012 (2012-05-28), pages 1 - 3, XP055212304, Retrieved from the Internet <URL:https://web.archive.org/web/20120528102416/http://msdn.microsoft.com/en-us/library/windows/desktop/ff476900(v=vs.85).aspx> [retrieved on 20150909] *
MICROSOFT: "Introduction to Buffers in Direct3D 11", MICROSOFT - WINDOWS DEV CENTER, 30 October 2012 (2012-10-30), pages 1 - 2, XP055212353, Retrieved from the Internet <URL:https://web.archive.org/web/20121030210805/http://msdn.microsoft.com/en-us/library/windows/desktop/ff476898(v=vs.85).aspx> [retrieved on 20150909] *
MICROSOFT: "Resource Interfaces", MICROSOFT - WINDOWS DEV CENTER, 29 May 2012 (2012-05-29), pages 1 - 2, XP055212369, Retrieved from the Internet <URL:https://web.archive.org/web/20120529054248/http://msdn.microsoft.com/en-us/library/windows/desktop/ff476172(v=vs.85).aspx> [retrieved on 20150909] *
RANDY FERNANDO ET AL: "Programming Graphics Hardware", EUROGRAPHICS 2004, 21 June 2012 (2012-06-21), XP055141935 *
RODRIGO B PINHEIRO ET AL: "Introduction to Multithreaded Rendering and the Usage of Deferred Context in DirectX 11", SBC - PROCEEDINGS OF SBGAMES 2011; SALVADOR, BAHIA, BRAZIL; NOVEMBER 7TH - 9TH, 2011,, vol. TB-02820-001_v01, 7 November 2011 (2011-11-07), pages 1 - 5, XP002692613 *

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