WO2015141739A1 - Liquid crystal display device - Google Patents

Liquid crystal display device Download PDF

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Publication number
WO2015141739A1
WO2015141739A1 PCT/JP2015/058106 JP2015058106W WO2015141739A1 WO 2015141739 A1 WO2015141739 A1 WO 2015141739A1 JP 2015058106 W JP2015058106 W JP 2015058106W WO 2015141739 A1 WO2015141739 A1 WO 2015141739A1
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WO
WIPO (PCT)
Prior art keywords
liquid crystal
display device
crystal display
color filter
substrate
Prior art date
Application number
PCT/JP2015/058106
Other languages
French (fr)
Japanese (ja)
Inventor
倫久 山田
正樹 柳沢
Original Assignee
株式会社オルタステクノロジー
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Filing date
Publication date
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Publication of WO2015141739A1 publication Critical patent/WO2015141739A1/en

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    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1335Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509Filters, e.g. light shielding masks
    • G02F1/133512Light shielding layers, e.g. black matrix
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1335Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509Filters, e.g. light shielding masks
    • G02F1/133514Colour filters
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/13606Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit having means for reducing parasitic capacitance
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136286Wiring, e.g. gate line, drain line
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/121Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode common or background

Definitions

  • the present invention relates to a liquid crystal display device.
  • Various liquid crystal display devices capable of color display have been developed.
  • a color filter is used in a liquid crystal display device that performs color display.
  • a common electrode is formed on the entire surface of the color filter substrate on which the color filter is formed. From the viewpoint of controlling the alignment of the liquid crystal layer, the common electrode is desirably flat. For this reason, the coloring members of a plurality of colors constituting the color filter are arranged without a gap, and the color filter is often arranged outside the active area as in the inside of the active area.
  • the distance between the common electrode and the wiring arranged via the liquid crystal layer is shortened. This increases the capacitance on the wiring, resulting in an increase in current consumption of the liquid crystal display device.
  • the present invention provides a liquid crystal display device capable of reducing current consumption by reducing the capacitance between the common electrode and the wiring via the liquid crystal layer.
  • a liquid crystal display device includes a first substrate, a second substrate, a liquid crystal layer sandwiched between the first substrate and the second substrate, and a plurality of pixels provided over the first substrate.
  • a pixel electrode provided above the signal line via an insulating film, electrically connected to the signal line, and provided to correspond to the pixel.
  • the light shielding film is disposed above the signal line without passing through the color filter.
  • liquid crystal display device capable of reducing current consumption by reducing the capacitance between the common electrode and the wiring via the liquid crystal layer.
  • FIG. 1 is a schematic plan view of a liquid crystal display device according to a first embodiment.
  • FIG. 2 is a circuit diagram of a pixel array included in an active area shown in FIG. 1.
  • 1 is a plan view of a liquid crystal display device according to a first embodiment.
  • FIG. 4 is a cross-sectional view of the liquid crystal display device along line A-A ′ shown in FIG. 3.
  • FIG. 4 is a cross-sectional view of the liquid crystal display device along line B-B ′ shown in FIG. 3.
  • the top view of the liquid crystal display device which concerns on a 1st modification.
  • FIG. 8 is a cross-sectional view of the liquid crystal display device along the line B-B ′ shown in FIG. 7.
  • FIG. 11 is a cross-sectional view of the liquid crystal display device along line A-A ′ shown in FIG. 10.
  • FIG. 5 is a schematic plan view of a liquid crystal display device according to a second embodiment of the present invention.
  • FIG. 15 is a cross-sectional view of the liquid crystal display device along line A-A ′ shown in FIG. 14.
  • FIG. 1 is a schematic plan view of a liquid crystal display device 10 according to the first embodiment of the present invention.
  • the active matrix type liquid crystal display device 10 will be described as an example.
  • the liquid crystal display device 10 includes an active area (effective display area) 11 on which an image is displayed, and a peripheral area 12 provided around the active area 11.
  • the active area 11 is provided with a pixel array composed of a plurality of pixels.
  • the peripheral area 12 is provided with a peripheral circuit for driving and controlling the pixel array.
  • the peripheral area 12 is shielded by a light shielding film (black matrix), which will be described later, and is visually recognized as a black region by an observer.
  • FIG. 2 is a circuit diagram of the pixel array included in the active area 11 shown in FIG. In FIG. 2, four pixels are extracted and shown.
  • a plurality of scanning lines GL each extending in the row direction (X direction) and a plurality of signal lines SL each extending in the column direction (Y direction) are arranged.
  • a pixel 13 is disposed in each of the intersecting regions of the plurality of scanning lines GL and the plurality of signal lines SL.
  • the pixel 13 includes a switching element 14, a liquid crystal capacitor Clc, and a storage capacitor Cs.
  • a switching element 14 for example, a TFT (Thin-Film-Transistor) is used.
  • the source of the TFT 14 is electrically connected to the signal line SL.
  • the gate of the TFT 14 is electrically connected to the scanning line GL.
  • the drain of the TFT 14 is electrically connected to the liquid crystal capacitor Clc.
  • the liquid crystal capacitor Clc includes a pixel electrode, a common electrode, and a liquid crystal layer sandwiched between them.
  • the storage capacitor Cs is connected in parallel to the liquid crystal capacitor Clc.
  • the storage capacitor Cs has a function of suppressing the potential fluctuation generated in the pixel electrode and holding the drive voltage applied to the pixel electrode until the drive voltage corresponding to the next signal is applied.
  • the storage capacitor Cs includes a pixel electrode, a storage electrode (storage capacitor line), and an insulating film sandwiched between them.
  • a common voltage Vcom is applied to the common electrode and the storage electrode.
  • Peripheral circuits provided in the peripheral area 12 include, for example, a scanning driver (scanning line driving circuit) 15, a signal driver (signal line driving circuit) 16, a common voltage supply circuit 17, a voltage generation circuit (not shown), and a control.
  • a circuit (not shown) and the like are included.
  • the scanning driver 15 is connected to a plurality of scanning lines GL through lead lines described later.
  • the scan driver 15 applies a scan signal for controlling on and off of the TFT 14 to the scan line GL.
  • the signal driver 16 is connected to a plurality of signal lines SL through lead lines described later.
  • the signal driver 16 applies a gradation signal (drive voltage) corresponding to the display image to the signal line SL.
  • the common voltage supply circuit 17 generates a common voltage Vcom and supplies it to the pixel array.
  • the control circuit supplies control signals to the scanning driver 15, the signal driver 16, and the common voltage supply circuit 17, respectively.
  • the voltage generation circuit generates various voltages necessary for the operation of the liquid crystal display device 10 and supplies them to each circuit unit.
  • liquid crystal display device 10 configured as described above, when the TFT 14 included in an arbitrary pixel 13 is turned on, a driving voltage is applied to the pixel electrode via the signal line SL, and the voltage between the driving voltage and the common voltage Vcom is determined. The alignment state of the liquid crystal changes according to the difference. Thereby, the transmission state of the light incident on the liquid crystal display device 10 from the light source is changed, and image display is performed.
  • FIG. 3 is a plan view of the liquid crystal display device 10. 4 is a cross-sectional view of the liquid crystal display device 10 taken along line AA ′ shown in FIG.
  • FIG. 5 is a cross-sectional view of the liquid crystal display device 10 taken along line BB ′ shown in FIG.
  • FIG. 3 is a configuration example of the stripe arrangement of the color filter.
  • the liquid crystal display device 10 includes a TFT substrate 21 on which TFTs as switching elements and pixel electrodes are formed, and a color filter substrate (CF substrate) on which a color filter, a common electrode, and the like are formed and arranged opposite to the TFT substrate 21. 22 and a liquid crystal layer 23 sandwiched between the TFT substrate 21 and the CF substrate 22.
  • Each of the TFT substrate 21 and the CF substrate 22 is composed of a transparent substrate (for example, a glass substrate).
  • the liquid crystal layer 23 is composed of a liquid crystal material sealed by a sealing material 24 that bonds the TFT substrate 21 and the CF substrate 22 together.
  • An alignment film (not shown) for controlling the alignment of the liquid crystal molecules is formed on the TFT substrate 21 and the CF substrate 22 so as to be in contact with the liquid crystal layer 23 and sandwich the liquid crystal layer 23.
  • the cell gap of the liquid crystal layer 23 is controlled by a spacer (not shown) provided in the liquid crystal layer 23.
  • the orientation of liquid crystal molecules is controlled according to the electric field, and the optical characteristics change.
  • the display method of the liquid crystal display device 10 is not particularly limited, and various display methods such as a TN (Twisted Nematic) mode, a VA (Vertical Alignment) mode, an IPS (In-Plane Switching) mode, and an OCB (Optically Compensated Bend) mode. Is applicable.
  • TN Transmission Nematic
  • VA Vertical Alignment
  • IPS In-Plane Switching
  • OCB Optically Compensated Bend
  • a scanning line (gate line) GL and a storage capacitor line Cs are provided on the TFT substrate 21 (on the liquid crystal layer 23 side) in the active area 11.
  • An insulating film 25 is provided on the scanning line GL and the storage capacitor line Cs.
  • a signal line (source line) SL is provided on the insulating film 25.
  • An insulating film 26 is provided on the signal line SL.
  • a pixel electrode 27 is provided on the insulating film 26.
  • FIG. 6 is a plan view of the wiring provided on the TFT substrate 21.
  • the scanning line GL extends in the X direction.
  • the scanning line GL includes an electrode portion that extends to below the semiconductor layer 29 constituting the TFT 14.
  • a semiconductor layer 29 is provided over the electrode portion of the scanning line GL via a gate insulating film.
  • the signal line SL extends in the Y direction.
  • One end of the electrode 28 is electrically connected to the signal line SL, and the other end is disposed so as to partially overlap the semiconductor layer 29 constituting the TFT 14.
  • the electrode 30 is provided to be separated from the electrode 28 in the Y direction, and is disposed so that one end thereof partially overlaps the semiconductor layer 29.
  • the TFT 14 includes a scanning line GL, a semiconductor layer 29, and electrodes 28 and 30. The TFT 14 is not shown in the cross-sectional views of FIGS. 4 and 5.
  • a contact plug 31 is provided at the other end of the electrode 30, and the contact plug 31 is electrically connected to the pixel electrode 27.
  • the storage capacitor line Cs is composed of a first wiring portion extending in the X direction and a plurality of second wiring portions extending in the Y direction from the first wiring portion.
  • the first and second wiring portions constituting the storage capacitor line Cs are arranged so as to overlap the pixel electrode 27.
  • a light shielding film (black matrix) BM that partitions the plurality of pixels 13 is provided on the CF substrate 22 (the liquid crystal layer 23 side) in the active area 11.
  • the black matrix BM is provided at a boundary portion between the plurality of pixels 13 and has a plurality of openings OP corresponding to the plurality of pixels 13.
  • the black matrix BM has a function of shielding light unnecessary for display between the pixels 13.
  • the black matrix BM is formed in, for example, a lattice shape (knitting shape).
  • the black matrix BM is composed of, for example, a black resin containing a dye or pigment as a coloring material.
  • a color filter 34 is provided on the CF substrate 22 and in the opening OP of the black matrix BM. That is, the color filter 34 is provided above the plurality of pixel electrodes 27.
  • the color filter 34 includes a plurality of coloring members, and specifically includes a plurality of red filters 34-R, a plurality of green filters 34-G, and a plurality of blue filters 34-B.
  • the color filter 34 is made of a colored resin, for example.
  • a general color filter is composed of three primary colors of light, red (R), green (G), and blue (B).
  • a set of three colors R, G, and B adjacent to each other is a display unit (referred to as a pixel or a pixel), and any single color portion of R, G, or B in one pixel is a subpixel (subpixel). This is a minimum drive unit called a pixel.
  • the TFT 14 and the pixel electrode 27 are provided for each subpixel.
  • a subpixel is referred to as a pixel unless it is particularly necessary to distinguish between a pixel and a subpixel.
  • the color filter is formed in a line shape. That is, a line-shaped coloring member is provided in a plurality of pixels of the same color arranged in the Y direction.
  • a common electrode 35 is provided on the color filter 34 and the black matrix BM.
  • the common electrode 35 is formed on the entire surface of the active area 11 and the peripheral area 12.
  • a plurality of lead lines (lead lines) 32 for the scanning lines GL are provided on the TFT substrate 21 in the peripheral area 12 (on the liquid crystal layer 23 side).
  • the lead line 32 is a wiring for electrically connecting the plurality of scanning lines GL to the scanning driver 15.
  • a plurality of lead lines (lead lines) 33 for the signal lines SL are provided on the insulating film 25.
  • the lead line 33 is a wiring for electrically connecting the plurality of signal lines SL to the signal driver 16.
  • the black matrix BM is provided on the entire surface of the peripheral area 12 on the CF substrate 22 (on the liquid crystal layer 23 side).
  • the color filter 34 is provided partially or entirely.
  • the color filter 34 in the peripheral area 12 is formed in the same pattern as the color filter in the active area 11.
  • the pixel electrode 27 and the common electrode 35 are composed of transparent electrodes, and for example, ITO (indium tin oxide) is used.
  • the insulating films 25 and 26 are made of a transparent insulating material, and for example, silicon nitride (SiN) is used.
  • the scanning line GL, the signal line SL, the storage capacitor line Cs, and the lead lines 32 and 33 are made of a low-resistance conductive material. For example, aluminum (Al), molybdenum (Mo), chromium (Cr), tungsten (W ) Or an alloy containing one or more of these.
  • the red filter 34-R, the green filter 34-G, and the blue filter 34-B arranged in the X direction are not in contact with each other, and the pixels Each color filter is arranged with a space SP therebetween so as to be isolated in an island shape (in a line shape in the example of FIG. 3).
  • the signal line SL is arranged in the space SP of the color filter 34 in plan view. That is, the signal line SL faces the black matrix BM without passing through the color filter 34. In other words, the black matrix BM is arranged above the signal line SL without using the color filter 34.
  • the electrostatic capacitance C 1 on the signal line SL is expressed by the following equation (1 ).
  • C 1 ⁇ LC ⁇ S SL / d 1 (1)
  • it can be increased thickness d 1 of the liquid crystal layer 23 on the signal line SL.
  • it is possible to reduce the capacitance C 1 of the signal line SL.
  • FIG. 7 is a plan view of the liquid crystal display device 10 according to the first modification.
  • FIG. 8 is a cross-sectional view of the liquid crystal display device 10 taken along the line BB ′ shown in FIG.
  • a cross-sectional view of the liquid crystal display device 10 along the line AA ′ shown in FIG. 7 is the same as FIG.
  • FIG. 7 is a configuration example of a stripe arrangement.
  • the plurality of red filters 34-R, the plurality of green filters 34-G, and the plurality of blue filters 34-B are separated for each pixel, and each filter is formed in an island shape. That is, the plurality of red filters 34-R arranged in the Y direction are arranged with a space SP therebetween.
  • the green filter 34-G and the blue filter 34-B are the same as the red filter 34-R.
  • the scanning line GL is arranged in the space SP of the color filter 34. That is, the scanning line GL faces the black matrix BM without passing through the color filter 34. According to the first modification, similarly to the signal line SL, the capacitance on the scanning line GL can be further reduced.
  • FIG. 9 is a plan view of the liquid crystal display device 10 according to the second modification.
  • FIG. 9 is a configuration example of a delta arrangement.
  • the red filter 34-R, the green filter 34-G, and the blue filter 34-B constituting the color filter 34 are arranged in a delta shape (triangle).
  • the signal line SL and the scanning line GL are disposed in the space of the red filter 34-R, the green filter 34-G, and the blue filter 34-B.
  • this embodiment is applicable also to a delta arrangement.
  • FIG. 10 is a plan view of a liquid crystal display device according to a comparative example.
  • FIG. 11 is a cross-sectional view of the liquid crystal display device along the line AA ′ shown in FIG.
  • FIG. 10 is a configuration example of a stripe arrangement.
  • the color filter 34 of the comparative example has a flat structure. That is, the red filter 34 -R, the green filter 34 -G, and the blue filter 34 -B arranged in the X direction are formed so as to contact each other without leaving a space.
  • the common electrode 35 provided on the color filter 34 is formed in a planar shape with no step.
  • the capacitance C 2 on the signal line SL is expressed by the following equation (2 ).
  • C 2 ⁇ LC ⁇ S SL / d 2 (2)
  • the present embodiment can reduce the capacitance on the signal line SL compared to the comparative example.
  • this embodiment can reduce the capacitance on the scanning line GL as compared with the comparative example.
  • the capacitance on the signal line SL can be reduced by a little less than about 20% compared to the comparative example, and the corresponding current consumption can be reduced.
  • the effect of reducing the capacitance is the same for the capacitance on the scanning line GL.
  • FIG. 12 is a plan view of a liquid crystal display device according to another comparative example.
  • FIG. 12 is a configuration example of a delta arrangement. Also in the delta arrangement of the comparative example, the color filter has a flat structure. Therefore, also in the delta arrangement, the electrostatic capacitances on the signal lines SL and the scanning lines GL increase as in the stripe arrangement.
  • the present embodiment can reduce the electrostatic capacity on the signal line SL and the electrostatic capacity on the scanning line GL as compared with the comparative example, and the corresponding consumption current can be reduced.
  • the red filter 34-R, the green filter 34-G, and the blue filter 34-B arranged in the direction intersecting with the signal line SL are not in contact with each other and are not spaced from each other.
  • the SP is arranged with a space.
  • a black matrix BM is disposed above the signal line SL without using the color filter 34.
  • the black matrix BM is arranged above the scanning line GL without the color filter 34 interposed therebetween.
  • the thickness of the liquid crystal layer 23 on the signal line SL can be increased.
  • the electrostatic capacitance on the signal line SL can be reduced.
  • the current consumption of the liquid crystal display device 10 can be reduced.
  • the electrostatic capacity on the scanning line GL can be reduced, the current consumption of the liquid crystal display device 10 can be further reduced.
  • the thickness of the liquid crystal layer on the signal line SL and the scanning line GL is reduced, the thickness of the liquid crystal layer 23 on the pixel electrode 27 is not changed. Thereby, the current consumption of the liquid crystal display device 10 can be reduced without affecting the characteristics of the pixels.
  • the current consumption of the liquid crystal display device 10 is further reduced by reducing the capacitance of the peripheral area 12.
  • FIG. 13 is a schematic plan view of the liquid crystal display device 10 according to the second embodiment of the present invention.
  • FIG. 14 is a more detailed plan view of the liquid crystal display device 10.
  • FIG. 15 is a cross-sectional view of the liquid crystal display device 10 taken along line A-A ′ shown in FIG. 14.
  • FIG. 14 shows a configuration example of a stripe arrangement.
  • the configuration of the active area 11 is the same as that of the first embodiment.
  • the color filter 34 is disposed only in the active area 11 and is not disposed in the peripheral area 12. Specifically, as shown in FIG. 15, a black matrix BM is provided on the CF substrate 22 in the peripheral area 12. The color filter 34 is not provided on the black matrix BM in the peripheral area 12. In the peripheral area 12, the color filter 34 may not be formed at least above the lead lines 32 and 33. Further, for example, in consideration of manufacturing errors, the color filter 34 is formed so as to protrude somewhat from the boundary of the active area 11 to the peripheral area 12 side.
  • the capacitance C 3 on the lead line 32 is expressed by the following equation (3 ).
  • C 3 ⁇ LC ⁇ S LD / d 3 (3)
  • the capacitance on the lead wire 33 is expressed by the above equation (3).
  • the thickness d 4 of the liquid crystal layer 23 on the lead line 32 and the capacitance C 4 on the lead line 32 are used.
  • this embodiment can reduce the capacitance on the lead-out line 32 by a little less than about 30% compared to the comparative example, and can reduce the corresponding current consumption.
  • the present embodiment can reduce the capacitance on the lead line 33 as compared with the comparative example.
  • FIG. 16 is a plan view of the liquid crystal display device 10 having a delta arrangement. Also in the delta arrangement, the current consumption of the liquid crystal display device 10 can be reduced as in the stripe arrangement.
  • FIG. 17 is a cross-sectional view of the liquid crystal display device 10 according to the first modification.
  • the common electrode 35 is disposed only in the active area 11 and is not disposed in the peripheral area 12. Specifically, as shown in FIG. 17, only the black matrix BM is provided on the CF substrate 22 in the peripheral area 12, and the common electrode 35 is not provided on the black matrix BM in the peripheral area 12.
  • the common electrode 35 is not disposed above the lead lines 32 and 33, the capacitance on the lead lines 32 and 33 can be eliminated. Thereby, the consumption current resulting from the electrostatic capacitance on the lead lines 32 and 33 can be reduced.
  • FIG. 18 is a cross-sectional view of the liquid crystal display device 10 according to the second modification.
  • a plan view of the liquid crystal display device 10 is the same as FIG.
  • the black matrix BM is configured using a light shielding material that can be formed and processed thinner than the resin.
  • a light-shielding metal is used, and specifically, chromium (Cr) or a laminated film of chromium oxide and chromium is used.
  • the thickness of the black matrix BM can be reduced as compared with the second embodiment. Therefore, in the second modification, the thickness d 3 of the liquid crystal layer 23 on the lead lines 32 and 33, it is possible to increase in comparison with the second embodiment, it can be further reduced capacitance on the lead wire 32, 33 . As a result, the current consumption of the liquid crystal display device 10 can be further reduced.
  • the thickness of the black matrix BM in the active area 11 can also be reduced.
  • the thickness d 1 of the liquid crystal layer 23 on the signal line SL can be further increased, thereby further reducing the capacitance on the signal line SL.
  • the current consumption of the liquid crystal display device 10 can be further reduced.
  • the capacitance on the scanning line GL can be further reduced.
  • the present invention is not limited to the embodiment described above, and can be embodied by modifying the constituent elements without departing from the scope of the invention. Further, the above embodiments include inventions at various stages, and are obtained by appropriately combining a plurality of constituent elements disclosed in one embodiment or by appropriately combining constituent elements disclosed in different embodiments. Various inventions can be configured. For example, even if some constituent elements are deleted from all the constituent elements disclosed in the embodiments, the problems to be solved by the invention can be solved and the effects of the invention can be obtained. Embodiments made can be extracted as inventions.
  • SYMBOLS 10 Liquid crystal display device, 11 ... Active area, 12 ... Peripheral area, 13 ... Pixel, 14 ... Switching element, 15 ... Scan driver, 16 ... Signal driver, 17 ... Common voltage supply circuit, 21 ... TFT substrate, 22 ... Color Filter substrate, 23 ... Liquid crystal layer, 24 ... Sealing material, 25, 26 ... Insulating film, 27 ... Pixel electrode, 28, 30 ... Electrode, 29 ... Semiconductor layer, 31 ... Contact plug, 32, 33 ... Lead wire, 34 ... Color filter, 35 ... Common electrode.

Abstract

This liquid crystal display device (10) contains: substrates (21, 22); a liquid crystal layer (23) sandwiched between the substrates (21, 22); a light blocking membrane (BM) provided on the substrate (22) and demarcating a plurality of pixels; a color filter (34) provided to the plurality of openings of the light blocking membrane (BM) on the substrate (22); a common electrode (35) provided on the color filter (34) and the light blocking membrane (BM); a signal line (SL) provided on the substrate (21); and a pixel electrode (27) provided above the signal line (SL) with an insulating film therebetween, electrically connected to the signal line (SL), and provided corresponding to the pixels. The light blocking membrane (BM) is disposed above the signal line (SL) without the color filer (34) therebetween.

Description

液晶表示装置Liquid crystal display
 本発明は、液晶表示装置に関する。 The present invention relates to a liquid crystal display device.
 カラー表示が可能な様々な液晶表示装置が開発されている。カラー表示を行う液晶表示装置には、例えば、カラーフィルターが用いられる。 Various liquid crystal display devices capable of color display have been developed. For example, a color filter is used in a liquid crystal display device that performs color display.
 カラーフィルターが形成されるカラーフィルター基板には、例えば全面に共通電極が形成される。液晶層の配向を制御するという観点では、共通電極はフラットであることが望ましい。このため、カラーフィルターを構成する複数色の着色部材は隙間無く並べられ、またアクティブエリアの外側においてもアクティブエリアの内側と同様にカラーフィルターが配置されることが多い。 For example, a common electrode is formed on the entire surface of the color filter substrate on which the color filter is formed. From the viewpoint of controlling the alignment of the liquid crystal layer, the common electrode is desirably flat. For this reason, the coloring members of a plurality of colors constituting the color filter are arranged without a gap, and the color filter is often arranged outside the active area as in the inside of the active area.
 しかしながら、カラーフィルターをフラットにすると、共通電極と液晶層を介して配置される配線との距離が短くなる。これにより、配線上の静電容量が大きくなり、結果として、液晶表示装置の消費電流が増大してしまう。 However, when the color filter is made flat, the distance between the common electrode and the wiring arranged via the liquid crystal layer is shortened. This increases the capacitance on the wiring, resulting in an increase in current consumption of the liquid crystal display device.
特開平07-120608号公報Japanese Patent Application Laid-Open No. 07-120608 特開平06-265870号公報Japanese Patent Laid-Open No. 06-265870
 本発明は、液晶層を介した共通電極と配線との間の静電容量を小さくすることで消費電流を低減することが可能な液晶表示装置を提供する。 The present invention provides a liquid crystal display device capable of reducing current consumption by reducing the capacitance between the common electrode and the wiring via the liquid crystal layer.
 本発明の一態様に係る液晶表示装置は、第1及び第2基板と、前記第1及び第2基板間に挟持された液晶層と、前記第1基板上に設けられ、複数の画素を区画する遮光膜と、前記第1基板上かつ前記遮光膜の複数の開口部に設けられたカラーフィルターと、前記遮光膜及び前記カラーフィルター上に設けられた共通電極と、前記第2基板上に設けられた信号線と、前記信号線の上方に絶縁膜を介して設けられ、前記信号線に電気的に接続され、画素に対応するように設けられた画素電極とを具備する。前記信号線の上方には、前記カラーフィルターを介さずに前記遮光膜が配置されることを特徴とする。 A liquid crystal display device according to one embodiment of the present invention includes a first substrate, a second substrate, a liquid crystal layer sandwiched between the first substrate and the second substrate, and a plurality of pixels provided over the first substrate. A light shielding film, a color filter provided on the first substrate and in a plurality of openings of the light shielding film, a common electrode provided on the light shielding film and the color filter, and provided on the second substrate. And a pixel electrode provided above the signal line via an insulating film, electrically connected to the signal line, and provided to correspond to the pixel. The light shielding film is disposed above the signal line without passing through the color filter.
 本発明によれば、液晶層を介した共通電極と配線との間の静電容量を小さくすることで消費電流を低減することが可能な液晶表示装置を提供することができる。 According to the present invention, it is possible to provide a liquid crystal display device capable of reducing current consumption by reducing the capacitance between the common electrode and the wiring via the liquid crystal layer.
第1実施形態に係る液晶表示装置の概略的な平面図。1 is a schematic plan view of a liquid crystal display device according to a first embodiment. 図1に示したアクティブエリアに含まれる画素アレイの回路図。FIG. 2 is a circuit diagram of a pixel array included in an active area shown in FIG. 1. 第1実施形態に係る液晶表示装置の平面図。1 is a plan view of a liquid crystal display device according to a first embodiment. 図3に示したA-A’線に沿った液晶表示装置の断面図。FIG. 4 is a cross-sectional view of the liquid crystal display device along line A-A ′ shown in FIG. 3. 図3に示したB-B’線に沿った液晶表示装置の断面図。FIG. 4 is a cross-sectional view of the liquid crystal display device along line B-B ′ shown in FIG. 3. TFT基板に設けられた配線の平面図。The top view of the wiring provided in the TFT substrate. 第1変形例に係る液晶表示装置の平面図。The top view of the liquid crystal display device which concerns on a 1st modification. 図7に示したB-B’線に沿った液晶表示装置の断面図。FIG. 8 is a cross-sectional view of the liquid crystal display device along the line B-B ′ shown in FIG. 7. 第2変形例に係る液晶表示装置の平面図。The top view of the liquid crystal display device which concerns on a 2nd modification. 比較例に係る液晶表示装置の平面図。The top view of the liquid crystal display device which concerns on a comparative example. 図10に示したA-A’線に沿った液晶表示装置の断面図。FIG. 11 is a cross-sectional view of the liquid crystal display device along line A-A ′ shown in FIG. 10. 他の比較例に係る液晶表示装置の平面図。The top view of the liquid crystal display device which concerns on another comparative example. 本発明の第2実施形態に係る液晶表示装置の概略的な平面図。FIG. 5 is a schematic plan view of a liquid crystal display device according to a second embodiment of the present invention. 第2実施形態に係る液晶表示装置の平面図。The top view of the liquid crystal display device which concerns on 2nd Embodiment. 図14に示したA-A’線に沿った液晶表示装置の断面図。FIG. 15 is a cross-sectional view of the liquid crystal display device along line A-A ′ shown in FIG. 14. デルタ配列を有する液晶表示装置の平面図。The top view of the liquid crystal display device which has a delta arrangement | sequence. 第1変形例に係る液晶表示装置の断面図。Sectional drawing of the liquid crystal display device which concerns on a 1st modification. 第2変形例に係る液晶表示装置の断面図。Sectional drawing of the liquid crystal display device which concerns on a 2nd modification.
 以下、実施形態について図面を参照して説明する。ただし、図面は模式的または概念的なものであり、各図面の寸法および比率等は必ずしも現実のものと同一とは限らないことに留意すべきである。また、図面の相互間で同じ部分を表す場合においても、互いの寸法の関係や比率が異なって表される場合もある。特に、以下に示す幾つかの実施形態は、本発明の技術思想を具体化するための装置および方法を例示したものであって、構成部品の形状、構造、配置等によって、本発明の技術思想が特定されるものではない。なお、以下の説明において、同一の機能及び構成を有する要素については同一符号を付し、重複説明は必要な場合にのみ行う。 Hereinafter, embodiments will be described with reference to the drawings. However, it should be noted that the drawings are schematic or conceptual, and the dimensions and ratios of the drawings are not necessarily the same as the actual ones. Further, even when the same portion is represented between the drawings, the dimensional relationship and ratio may be represented differently. In particular, the following embodiments exemplify an apparatus and a method for embodying the technical idea of the present invention, and the technical idea of the present invention depends on the shape, structure, arrangement, etc. of components. Is not specified. In the following description, elements having the same function and configuration are denoted by the same reference numerals, and redundant description will be given only when necessary.
 [第1実施形態]
 [1.液晶表示装置10の全体構成]
 図1は、本発明の第1実施形態に係る液晶表示装置10の概略的な平面図である。本実施形態では、アクティブマトリクス型の液晶表示装置10を例に挙げて説明する。液晶表示装置10は、画像が表示されるアクティブエリア(有効表示領域)11と、アクティブエリア11の周囲に設けられた周辺エリア12とを備える。
[First Embodiment]
[1. Overall Configuration of Liquid Crystal Display Device 10]
FIG. 1 is a schematic plan view of a liquid crystal display device 10 according to the first embodiment of the present invention. In the present embodiment, the active matrix type liquid crystal display device 10 will be described as an example. The liquid crystal display device 10 includes an active area (effective display area) 11 on which an image is displayed, and a peripheral area 12 provided around the active area 11.
 アクティブエリア11には、複数の画素からなる画素アレイが設けられる。周辺エリア12には、画素アレイを駆動及び制御するための周辺回路が設けられる。周辺エリア12は、後述する遮光膜(ブラックマトリクス)によって遮光され、観察者からは黒の領域として視認される。 The active area 11 is provided with a pixel array composed of a plurality of pixels. The peripheral area 12 is provided with a peripheral circuit for driving and controlling the pixel array. The peripheral area 12 is shielded by a light shielding film (black matrix), which will be described later, and is visually recognized as a black region by an observer.
 図2は、図1に示したアクティブエリア11に含まれる画素アレイの回路図である。図2では、4つの画素を抽出して示している。 FIG. 2 is a circuit diagram of the pixel array included in the active area 11 shown in FIG. In FIG. 2, four pixels are extracted and shown.
 アクティブエリア11には、それぞれがロウ方向(X方向)に延びる複数の走査線GLと、それぞれがカラム方向(Y方向)に延びる複数の信号線SLとが配設される。複数の走査線GLと複数の信号線SLとの交差領域の各々には、画素13が配置される。 In the active area 11, a plurality of scanning lines GL each extending in the row direction (X direction) and a plurality of signal lines SL each extending in the column direction (Y direction) are arranged. A pixel 13 is disposed in each of the intersecting regions of the plurality of scanning lines GL and the plurality of signal lines SL.
 画素13は、スイッチング素子14、液晶容量Clc、及び蓄積容量Csを備える。スイッチング素子14としては、例えばTFT(Thin Film Transistor)が用いられる。TFT14のソースは、信号線SLに電気的に接続される。TFT14のゲートは、走査線GLに電気的に接続される。TFT14のドレインは、液晶容量Clcに電気的に接続される。液晶容量Clcは、画素電極と、共通電極と、これらに挟まれた液晶層とにより構成される。 The pixel 13 includes a switching element 14, a liquid crystal capacitor Clc, and a storage capacitor Cs. As the switching element 14, for example, a TFT (Thin-Film-Transistor) is used. The source of the TFT 14 is electrically connected to the signal line SL. The gate of the TFT 14 is electrically connected to the scanning line GL. The drain of the TFT 14 is electrically connected to the liquid crystal capacitor Clc. The liquid crystal capacitor Clc includes a pixel electrode, a common electrode, and a liquid crystal layer sandwiched between them.
 蓄積容量Csは、液晶容量Clcに並列接続される。蓄積容量Csは、画素電極に生じる電位変動を抑制するとともに、画素電極に印加された駆動電圧を次の信号に対応する駆動電圧が印加されるまでの間保持する機能を有する。蓄積容量Csは、画素電極と、蓄積電極(蓄積容量線)と、これらに挟まれた絶縁膜とにより構成される。共通電極及び蓄積電極には、共通電圧Vcomが印加される。 The storage capacitor Cs is connected in parallel to the liquid crystal capacitor Clc. The storage capacitor Cs has a function of suppressing the potential fluctuation generated in the pixel electrode and holding the drive voltage applied to the pixel electrode until the drive voltage corresponding to the next signal is applied. The storage capacitor Cs includes a pixel electrode, a storage electrode (storage capacitor line), and an insulating film sandwiched between them. A common voltage Vcom is applied to the common electrode and the storage electrode.
 周辺エリア12に設けられる周辺回路には、例えば、走査ドライバ(走査線駆動回路)15、信号ドライバ(信号線駆動回路)16、共通電圧供給回路17、電圧発生回路(図示せず)、及び制御回路(図示せず)などが含まれる。 Peripheral circuits provided in the peripheral area 12 include, for example, a scanning driver (scanning line driving circuit) 15, a signal driver (signal line driving circuit) 16, a common voltage supply circuit 17, a voltage generation circuit (not shown), and a control. A circuit (not shown) and the like are included.
 走査ドライバ15は、後述する引き出し線を介して、複数の走査線GLに接続される。走査ドライバ15は、TFT14のオン及びオフを制御するための走査信号を走査線GLに印加する。信号ドライバ16は、後述する引き出し線を介して、複数の信号線SLに接続される。信号ドライバ16は、表示画像に応じた階調信号(駆動電圧)を信号線SLに印加する。共通電圧供給回路17は、共通電圧Vcomを生成してこれを画素アレイに供給する。制御回路は、走査ドライバ15、信号ドライバ16、及び共通電圧供給回路17にそれぞれ制御信号を供給する。電圧発生回路は、液晶表示装置10の動作に必要な各種電圧を生成して各回路部に供給する。 The scanning driver 15 is connected to a plurality of scanning lines GL through lead lines described later. The scan driver 15 applies a scan signal for controlling on and off of the TFT 14 to the scan line GL. The signal driver 16 is connected to a plurality of signal lines SL through lead lines described later. The signal driver 16 applies a gradation signal (drive voltage) corresponding to the display image to the signal line SL. The common voltage supply circuit 17 generates a common voltage Vcom and supplies it to the pixel array. The control circuit supplies control signals to the scanning driver 15, the signal driver 16, and the common voltage supply circuit 17, respectively. The voltage generation circuit generates various voltages necessary for the operation of the liquid crystal display device 10 and supplies them to each circuit unit.
 このように構成された液晶表示装置10において、任意の画素13に含まれるTFT14がオン状態となると、駆動電圧が信号線SLを介して画素電極に印加され、駆動電圧と共通電圧Vcomとの電圧差に応じて液晶の配向状態が変化する。これにより、光源から液晶表示装置10に入射する光の透過状態が変化して画像表示が行われる。 In the liquid crystal display device 10 configured as described above, when the TFT 14 included in an arbitrary pixel 13 is turned on, a driving voltage is applied to the pixel electrode via the signal line SL, and the voltage between the driving voltage and the common voltage Vcom is determined. The alignment state of the liquid crystal changes according to the difference. Thereby, the transmission state of the light incident on the liquid crystal display device 10 from the light source is changed, and image display is performed.
 [2.液晶表示装置10の具体的な構成]
 次に、液晶表示装置10のより具体的な構成について説明する。図3は、液晶表示装置10の平面図である。図4は、図3に示したA-A’線に沿った液晶表示装置10の断面図である。図5は、図3に示したB-B’線に沿った液晶表示装置10の断面図である。図3は、カラーフィルターのストライプ配列の構成例である。
[2. Specific Configuration of Liquid Crystal Display Device 10]
Next, a more specific configuration of the liquid crystal display device 10 will be described. FIG. 3 is a plan view of the liquid crystal display device 10. 4 is a cross-sectional view of the liquid crystal display device 10 taken along line AA ′ shown in FIG. FIG. 5 is a cross-sectional view of the liquid crystal display device 10 taken along line BB ′ shown in FIG. FIG. 3 is a configuration example of the stripe arrangement of the color filter.
 液晶表示装置10は、スイッチング素子としてのTFT、及び画素電極などが形成されるTFT基板21と、カラーフィルター及び共通電極などが形成されかつTFT基板21に対向配置されたカラーフィルター基板(CF基板)22と、TFT基板21及びCF基板22間に挟持された液晶層23とを備える。TFT基板21及びCF基板22の各々は、透明基板(例えば、ガラス基板)から構成される。 The liquid crystal display device 10 includes a TFT substrate 21 on which TFTs as switching elements and pixel electrodes are formed, and a color filter substrate (CF substrate) on which a color filter, a common electrode, and the like are formed and arranged opposite to the TFT substrate 21. 22 and a liquid crystal layer 23 sandwiched between the TFT substrate 21 and the CF substrate 22. Each of the TFT substrate 21 and the CF substrate 22 is composed of a transparent substrate (for example, a glass substrate).
 液晶層23は、TFT基板21及びCF基板22間を貼り合わせるシール材24によって封入された液晶材料により構成される。なお、TFT基板21及びCF基板22にはそれぞれ、液晶層23に接しかつ液晶層23を挟むようにして、液晶分子の配向を制御するための配向膜(図示せず)が形成される。液晶層23のセルギャップは、液晶層23内に設けられたスペーサー(図示せず)によって制御される。液晶材料は、電界に応じて液晶分子の配向が制御されて光学特性が変化する。液晶表示装置10の表示方式は、特に制限されず、TN(Twisted Nematic)モード、VA(Vertical Alignment)モード、IPS(In-Plane Switching)モード、及びOCB(Optically Compensated Bend)モードなど各種の表示方式を適用可能である。 The liquid crystal layer 23 is composed of a liquid crystal material sealed by a sealing material 24 that bonds the TFT substrate 21 and the CF substrate 22 together. An alignment film (not shown) for controlling the alignment of the liquid crystal molecules is formed on the TFT substrate 21 and the CF substrate 22 so as to be in contact with the liquid crystal layer 23 and sandwich the liquid crystal layer 23. The cell gap of the liquid crystal layer 23 is controlled by a spacer (not shown) provided in the liquid crystal layer 23. In the liquid crystal material, the orientation of liquid crystal molecules is controlled according to the electric field, and the optical characteristics change. The display method of the liquid crystal display device 10 is not particularly limited, and various display methods such as a TN (Twisted Nematic) mode, a VA (Vertical Alignment) mode, an IPS (In-Plane Switching) mode, and an OCB (Optically Compensated Bend) mode. Is applicable.
 まず、アクティブエリア11における液晶表示装置10の構造について説明する。アクティブエリア11におけるTFT基板21上(液晶層23側)には、走査線(ゲート線)GLと、蓄積容量線Csとが設けられる。走査線GL及び蓄積容量線Cs上には、絶縁膜25が設けられる。絶縁膜25上には、信号線(ソース線)SLが設けられる。信号線SL上には、絶縁膜26が設けられる。絶縁膜26上には、画素電極27が設けられる。 First, the structure of the liquid crystal display device 10 in the active area 11 will be described. A scanning line (gate line) GL and a storage capacitor line Cs are provided on the TFT substrate 21 (on the liquid crystal layer 23 side) in the active area 11. An insulating film 25 is provided on the scanning line GL and the storage capacitor line Cs. A signal line (source line) SL is provided on the insulating film 25. An insulating film 26 is provided on the signal line SL. A pixel electrode 27 is provided on the insulating film 26.
 図6は、TFT基板21に設けられた配線の平面図である。走査線GLは、X方向に延在する。走査線GLは、TFT14を構成する半導体層29の下方まで延在する電極部分を備える。走査線GLの電極部分上には、ゲート絶縁膜を介して半導体層29が設けられる。 FIG. 6 is a plan view of the wiring provided on the TFT substrate 21. The scanning line GL extends in the X direction. The scanning line GL includes an electrode portion that extends to below the semiconductor layer 29 constituting the TFT 14. A semiconductor layer 29 is provided over the electrode portion of the scanning line GL via a gate insulating film.
 信号線SLは、Y方向に延在する。電極28の一端は信号線SLに電気的に接続され、その他端はTFT14を構成する半導体層29に一部重なるように配置される。電極30は、電極28とY方向に離間して設けられ、その一端が半導体層29に一部重なるように配置される。TFT14は、走査線GL、半導体層29、及び電極28、30から構成される。なお、TFT14は、図4及び図5の断面図では図示を省略している。電極30の他端には、コンタクトプラグ31が設けられ、コンタクトプラグ31は、画素電極27に電気的に接続される。 The signal line SL extends in the Y direction. One end of the electrode 28 is electrically connected to the signal line SL, and the other end is disposed so as to partially overlap the semiconductor layer 29 constituting the TFT 14. The electrode 30 is provided to be separated from the electrode 28 in the Y direction, and is disposed so that one end thereof partially overlaps the semiconductor layer 29. The TFT 14 includes a scanning line GL, a semiconductor layer 29, and electrodes 28 and 30. The TFT 14 is not shown in the cross-sectional views of FIGS. 4 and 5. A contact plug 31 is provided at the other end of the electrode 30, and the contact plug 31 is electrically connected to the pixel electrode 27.
 蓄積容量線Csは、X方向に延在する第1配線部分と、該第1配線部分からY方向に延在する複数の第2配線部分とから構成される。蓄積容量線Csを構成する第1及び第2配線部分は、画素電極27に重なるように配置される。 The storage capacitor line Cs is composed of a first wiring portion extending in the X direction and a plurality of second wiring portions extending in the Y direction from the first wiring portion. The first and second wiring portions constituting the storage capacitor line Cs are arranged so as to overlap the pixel electrode 27.
 図4に戻り、アクティブエリア11におけるCF基板22上(液晶層23側)には、複数の画素13を区画する遮光膜(ブラックマトリクス)BMが設けられる。ブラックマトリクスBMは、複数の画素13の境界部分に設けられ、また、複数の画素13に対応した複数の開口部OPを有する。ブラックマトリクスBMは、画素13間の表示に不要な光を遮光する機能を有する。ブラックマトリクスBMは、例えば格子状(編み目状)に形成される。ブラックマトリクスBMは、例えば、着色材料としての染料又は顔料が含まれた黒色樹脂から構成される。 Referring back to FIG. 4, a light shielding film (black matrix) BM that partitions the plurality of pixels 13 is provided on the CF substrate 22 (the liquid crystal layer 23 side) in the active area 11. The black matrix BM is provided at a boundary portion between the plurality of pixels 13 and has a plurality of openings OP corresponding to the plurality of pixels 13. The black matrix BM has a function of shielding light unnecessary for display between the pixels 13. The black matrix BM is formed in, for example, a lattice shape (knitting shape). The black matrix BM is composed of, for example, a black resin containing a dye or pigment as a coloring material.
 CF基板22上かつブラックマトリクスBMの開口部OPには、カラーフィルター34が設けられる。すなわち、複数の画素電極27の上方には、カラーフィルター34が設けられる。 A color filter 34 is provided on the CF substrate 22 and in the opening OP of the black matrix BM. That is, the color filter 34 is provided above the plurality of pixel electrodes 27.
 カラーフィルター34は、複数の着色部材を備え、具体的には、複数の赤フィルター34-R、複数の緑フィルター34-G、及び複数の青フィルター34-Bを備える。カラーフィルター34は、例えば着色樹脂から構成される。一般的なカラーフィルターは光の三原色である赤(R)、緑(G)、青(B)で構成される。隣接したR、G、Bの三色のセットが表示の単位(ピクセル、又は画素と呼ぶ)となっており、1つの画素中のR、G、Bのいずれか単色の部分はサブピクセル(サブ画素)と呼ばれる最小駆動単位である。TFT14及び画素電極27は、サブピクセルごとに設けられる。以下の説明では、画素とサブ画素との区別が特に必要な場合を除き、サブ画素を画素と呼ぶものとする。図3のカラーフィルターの例では、カラーフィルターはライン状に形成される。すなわち、Y方向に配列された同色の複数の画素には、ライン状の着色部材が設けられる。 The color filter 34 includes a plurality of coloring members, and specifically includes a plurality of red filters 34-R, a plurality of green filters 34-G, and a plurality of blue filters 34-B. The color filter 34 is made of a colored resin, for example. A general color filter is composed of three primary colors of light, red (R), green (G), and blue (B). A set of three colors R, G, and B adjacent to each other is a display unit (referred to as a pixel or a pixel), and any single color portion of R, G, or B in one pixel is a subpixel (subpixel). This is a minimum drive unit called a pixel. The TFT 14 and the pixel electrode 27 are provided for each subpixel. In the following description, a subpixel is referred to as a pixel unless it is particularly necessary to distinguish between a pixel and a subpixel. In the example of the color filter of FIG. 3, the color filter is formed in a line shape. That is, a line-shaped coloring member is provided in a plurality of pixels of the same color arranged in the Y direction.
 カラーフィルター34及びブラックマトリクスBM上には、共通電極35が設けられる。共通電極35は、アクティブエリア11及び周辺エリア12の全面に形成される。 A common electrode 35 is provided on the color filter 34 and the black matrix BM. The common electrode 35 is formed on the entire surface of the active area 11 and the peripheral area 12.
 次に、周辺エリア12における液晶表示装置10の構造について説明する。周辺エリア12におけるTFT基板21上(液晶層23側)には、走査線GL用の複数の引き出し線(リード線)32が設けられる。引き出し線32は、複数の走査線GLを走査ドライバ15に電気的に接続するための配線である。周辺エリア12において、絶縁膜25上には、信号線SL用の複数の引き出し線(リード線)33が設けられる。引き出し線33は、複数の信号線SLを信号ドライバ16に電気的に接続するための配線である。 Next, the structure of the liquid crystal display device 10 in the peripheral area 12 will be described. On the TFT substrate 21 in the peripheral area 12 (on the liquid crystal layer 23 side), a plurality of lead lines (lead lines) 32 for the scanning lines GL are provided. The lead line 32 is a wiring for electrically connecting the plurality of scanning lines GL to the scanning driver 15. In the peripheral area 12, a plurality of lead lines (lead lines) 33 for the signal lines SL are provided on the insulating film 25. The lead line 33 is a wiring for electrically connecting the plurality of signal lines SL to the signal driver 16.
 周辺エリア12におけるCF基板22上(液晶層23側)には、ブラックマトリクスBMが全面に設けられる。ブラックマトリクスBM上には、カラーフィルター34が一部又は全面に設けられる。周辺エリア12におけるカラーフィルター34は、アクティブエリア11のカラーフィルターと同じパターンで形成される。 The black matrix BM is provided on the entire surface of the peripheral area 12 on the CF substrate 22 (on the liquid crystal layer 23 side). On the black matrix BM, the color filter 34 is provided partially or entirely. The color filter 34 in the peripheral area 12 is formed in the same pattern as the color filter in the active area 11.
 画素電極27及び共通電極35は、透明電極から構成され、例えばITO(インジウム錫酸化物)が用いられる。絶縁膜25、26は、透明な絶縁材料から構成され、例えばシリコン窒化物(SiN)が用いられる。走査線GL、信号線SL、蓄積容量線Cs、及び引き出し線32、33は、低抵抗な導電材料が用いられ、例えば、アルミニウム(Al)、モリブデン(Mo)、クロム(Cr)、タングステン(W)のいずれか、またはこれらの1種類以上を含む合金等が用いられる。 The pixel electrode 27 and the common electrode 35 are composed of transparent electrodes, and for example, ITO (indium tin oxide) is used. The insulating films 25 and 26 are made of a transparent insulating material, and for example, silicon nitride (SiN) is used. The scanning line GL, the signal line SL, the storage capacitor line Cs, and the lead lines 32 and 33 are made of a low-resistance conductive material. For example, aluminum (Al), molybdenum (Mo), chromium (Cr), tungsten (W ) Or an alloy containing one or more of these.
 (静電容量について)
 ここで、図3及び図4に示すように、本実施形態では、X方向に並ぶ赤フィルター34-R、緑フィルター34-G、及び青フィルター34-Bは、互いに接触しておらず、画素ごとのカラーフィルターが島状に(図3の例では、ライン状に)孤立するように互いにスペースSPを空けて配置される。
(Capacitance)
Here, as shown in FIGS. 3 and 4, in the present embodiment, the red filter 34-R, the green filter 34-G, and the blue filter 34-B arranged in the X direction are not in contact with each other, and the pixels Each color filter is arranged with a space SP therebetween so as to be isolated in an island shape (in a line shape in the example of FIG. 3).
 また、平面視において、カラーフィルター34のスペースSPには、信号線SLが配置される。すなわち、信号線SLは、カラーフィルター34を介さずに、ブラックマトリクスBMと向き合っている。換言すると、信号線SLの上方には、カラーフィルター34を介さずに、ブラックマトリクスBMが配置される。 Further, the signal line SL is arranged in the space SP of the color filter 34 in plan view. That is, the signal line SL faces the black matrix BM without passing through the color filter 34. In other words, the black matrix BM is arranged above the signal line SL without using the color filter 34.
 液晶層23の誘電率εLC、信号線SLの面積SSL、信号線SL上の液晶層23の厚さdとすると、信号線SL上の静電容量Cは、以下の式(1)で表される。

 C=εLC・SSL/d     ・・・(1)

 本実施形態では、信号線SL上の液晶層23の厚さdを大きくできる。これにより、信号線SL上の静電容量Cを小さくできる。
When the dielectric constant ε LC of the liquid crystal layer 23, the area S SL of the signal line SL, and the thickness d 1 of the liquid crystal layer 23 on the signal line SL, the electrostatic capacitance C 1 on the signal line SL is expressed by the following equation (1 ).

C 1 = ε LC · S SL / d 1 (1)

In the present embodiment, it can be increased thickness d 1 of the liquid crystal layer 23 on the signal line SL. Thus, it is possible to reduce the capacitance C 1 of the signal line SL.
 [3.変形例]
 図7は、第1変形例に係る液晶表示装置10の平面図である。図8は、図7に示したB-B’線に沿った液晶表示装置10の断面図である。図7に示したA-A’線に沿った液晶表示装置10の断面図は、図4と同じである。図7は、ストライプ配列の構成例である。
[3. Modified example]
FIG. 7 is a plan view of the liquid crystal display device 10 according to the first modification. FIG. 8 is a cross-sectional view of the liquid crystal display device 10 taken along the line BB ′ shown in FIG. A cross-sectional view of the liquid crystal display device 10 along the line AA ′ shown in FIG. 7 is the same as FIG. FIG. 7 is a configuration example of a stripe arrangement.
 複数の赤フィルター34-R、複数の緑フィルター34-G、及び複数の青フィルター34-Bは、画素ごとに分離され、各フィルターは、島状に形成される。すなわち、Y方向に並んだ複数の赤フィルター34-Rは、互いにスペースSPを空けて配置される。緑フィルター34-G及び青フィルター34-Bについても赤フィルター34-Rと同様である。 The plurality of red filters 34-R, the plurality of green filters 34-G, and the plurality of blue filters 34-B are separated for each pixel, and each filter is formed in an island shape. That is, the plurality of red filters 34-R arranged in the Y direction are arranged with a space SP therebetween. The green filter 34-G and the blue filter 34-B are the same as the red filter 34-R.
 また、平面視において、カラーフィルター34のスペースSPには、走査線GLが配置される。すなわち、走査線GLは、カラーフィルター34を介さずに、ブラックマトリクスBMと向き合っている。第1変形例によれば、信号線SLと同様に、走査線GL上の容量をさらに低減できる。 In a plan view, the scanning line GL is arranged in the space SP of the color filter 34. That is, the scanning line GL faces the black matrix BM without passing through the color filter 34. According to the first modification, similarly to the signal line SL, the capacitance on the scanning line GL can be further reduced.
 図9は、第2変形例に係る液晶表示装置10の平面図である。図9は、デルタ配列の構成例である。 FIG. 9 is a plan view of the liquid crystal display device 10 according to the second modification. FIG. 9 is a configuration example of a delta arrangement.
 カラーフィルター34を構成する赤フィルター34-R、緑フィルター34-G、及び青フィルター34-Bは、デルタ状(三角形)に配置される。そして、平面視において、赤フィルター34-R、緑フィルター34-G、及び青フィルター34-Bのスペースには、信号線SL及び走査線GLが配設される。このように、デルタ配列にも本実施形態を適用可能である。 The red filter 34-R, the green filter 34-G, and the blue filter 34-B constituting the color filter 34 are arranged in a delta shape (triangle). In plan view, the signal line SL and the scanning line GL are disposed in the space of the red filter 34-R, the green filter 34-G, and the blue filter 34-B. Thus, this embodiment is applicable also to a delta arrangement.
 [4.比較例]
 次に、比較例について説明する。図10は、比較例に係る液晶表示装置の平面図である。図11は、図10に示したA-A’線に沿った液晶表示装置の断面図である。図10は、ストライプ配列の構成例である。
[4. Comparative example]
Next, a comparative example will be described. FIG. 10 is a plan view of a liquid crystal display device according to a comparative example. FIG. 11 is a cross-sectional view of the liquid crystal display device along the line AA ′ shown in FIG. FIG. 10 is a configuration example of a stripe arrangement.
 比較例のカラーフィルター34は、フラット構造を有する。すなわち、X方向に並んだ赤フィルター34-R、緑フィルター34-G、及び青フィルター34-Bは、スペースを空けずに、互いに接するように形成される。カラーフィルター34上に設けられる共通電極35は、段差がない状態で平面状に形成される。 The color filter 34 of the comparative example has a flat structure. That is, the red filter 34 -R, the green filter 34 -G, and the blue filter 34 -B arranged in the X direction are formed so as to contact each other without leaving a space. The common electrode 35 provided on the color filter 34 is formed in a planar shape with no step.
 液晶層23の誘電率εLC、信号線SLの面積SSL、信号線SL上の液晶層23の厚さdとすると、信号線SL上の静電容量Cは、以下の式(2)で表される。

 C=εLC・SSL/d     ・・・(2)

 本実施形態と比較例とを比べると、“d>d”であるので、“C<C”となる。このため、比較例では、静電容量Cが大きくなるため、液晶表示装置の消費電流が大きくなる。これに対して、本実施形態は、比較例に比べて、信号線SL上の静電容量を小さくできる。同様に、本実施形態は、比較例に比べて、走査線GL上の静電容量を小さくできる。
When the dielectric constant ε LC of the liquid crystal layer 23, the area S SL of the signal line SL, and the thickness d 2 of the liquid crystal layer 23 on the signal line SL, the capacitance C 2 on the signal line SL is expressed by the following equation (2 ).

C 2 = ε LC · S SL / d 2 (2)

When this embodiment is compared with the comparative example, since “d 1 > d 2 ”, “C 1 <C 2 ” is obtained. Therefore, in the comparative example, since the capacitance C 2 is increased, the current consumption of the liquid crystal display device is increased. On the other hand, the present embodiment can reduce the capacitance on the signal line SL compared to the comparative example. Similarly, this embodiment can reduce the capacitance on the scanning line GL as compared with the comparative example.
 一例として、TNモードの液晶表示装置を想定し、d=5.5μm、d=4.5μmとすると、“C≒0.82C”となる。すなわち、本実施形態は、比較例に比べて、信号線SL上の静電容量が約2割弱だけ低減でき、それに相当する消費電流が低減できる。静電容量の削減効果は、走査線GL上の静電容量についても同様である。 As an example, assuming a TN mode liquid crystal display device and d 1 = 5.5 μm and d 2 = 4.5 μm, “C 1 ≈0.82 C 2 ”. That is, according to the present embodiment, the capacitance on the signal line SL can be reduced by a little less than about 20% compared to the comparative example, and the corresponding current consumption can be reduced. The effect of reducing the capacitance is the same for the capacitance on the scanning line GL.
 図12は、他の比較例に係る液晶表示装置の平面図である。図12は、デルタ配列の構成例である。比較例のデルタ配列においても、カラーフィルターは、フラット構造を有している。よって、デルタ配列においても、ストライプ配列と同様に、信号線SL及び走査線GL上の静電容量が大きくなる。 FIG. 12 is a plan view of a liquid crystal display device according to another comparative example. FIG. 12 is a configuration example of a delta arrangement. Also in the delta arrangement of the comparative example, the color filter has a flat structure. Therefore, also in the delta arrangement, the electrostatic capacitances on the signal lines SL and the scanning lines GL increase as in the stripe arrangement.
 デルタ配列においても、本実施形態は、比較例に比べて、信号線SL上の静電容量及び走査線GL上の静電容量を低減でき、それに相当する消費電流が低減できる。 Also in the delta arrangement, the present embodiment can reduce the electrostatic capacity on the signal line SL and the electrostatic capacity on the scanning line GL as compared with the comparative example, and the corresponding consumption current can be reduced.
 [5.効果]
 以上詳述したように第1実施形態では、信号線SLと交差する方向に並ぶ赤フィルター34-R、緑フィルター34-G、及び青フィルター34-Bは、互いに接触しておらず、互いにスペースSPを空けて配置される。そして、信号線SLの上方には、カラーフィルター34を介さずにブラックマトリクスBMが配置される。また、信号線SLの場合と同様に、走査線GLの上方には、カラーフィルター34を介さずにブラックマトリクスBMが配置される。
[5. effect]
As described above in detail, in the first embodiment, the red filter 34-R, the green filter 34-G, and the blue filter 34-B arranged in the direction intersecting with the signal line SL are not in contact with each other and are not spaced from each other. The SP is arranged with a space. A black matrix BM is disposed above the signal line SL without using the color filter 34. Similarly to the signal line SL, the black matrix BM is arranged above the scanning line GL without the color filter 34 interposed therebetween.
 従って第1実施形態によれば、信号線SL上の液晶層23の厚さを大きくできる。これにより、信号線SL上の静電容量を小さくできる。この結果、液晶表示装置10の消費電流を低減できる。同様に、走査線GL上の静電容量を小さくできるので、液晶表示装置10の消費電流をより低減できる。 Therefore, according to the first embodiment, the thickness of the liquid crystal layer 23 on the signal line SL can be increased. Thereby, the electrostatic capacitance on the signal line SL can be reduced. As a result, the current consumption of the liquid crystal display device 10 can be reduced. Similarly, since the electrostatic capacity on the scanning line GL can be reduced, the current consumption of the liquid crystal display device 10 can be further reduced.
 また、信号線SL及び走査線GL上の液晶層の厚さを小さくする一方で、画素電極27上の液晶層23の厚さは変更されない。これにより、画素の特性に影響を与えずに、液晶表示装置10の消費電流を低減できる。 Further, while the thickness of the liquid crystal layer on the signal line SL and the scanning line GL is reduced, the thickness of the liquid crystal layer 23 on the pixel electrode 27 is not changed. Thereby, the current consumption of the liquid crystal display device 10 can be reduced without affecting the characteristics of the pixels.
 [第2実施形態]
 第2実施形態は、周辺エリア12の静電容量を低減することで、液晶表示装置10の消費電流をさらに低減するようにしている。
[Second Embodiment]
In the second embodiment, the current consumption of the liquid crystal display device 10 is further reduced by reducing the capacitance of the peripheral area 12.
 図13は、本発明の第2実施形態に係る液晶表示装置10の概略的な平面図である。図14は、液晶表示装置10のより詳細な平面図である。図15は、図14に示したA-A’線に沿った液晶表示装置10の断面図である。図14は、ストライプ配列の構成例である。アクティブエリア11の構成は、第1実施形態と同じである。 FIG. 13 is a schematic plan view of the liquid crystal display device 10 according to the second embodiment of the present invention. FIG. 14 is a more detailed plan view of the liquid crystal display device 10. FIG. 15 is a cross-sectional view of the liquid crystal display device 10 taken along line A-A ′ shown in FIG. 14. FIG. 14 shows a configuration example of a stripe arrangement. The configuration of the active area 11 is the same as that of the first embodiment.
 カラーフィルター34は、アクティブエリア11にのみ配置され、周辺エリア12には配置されない。具体的には、図15に示すように、周辺エリア12におけるCF基板22上には、ブラックマトリクスBMが設けられる。周辺エリア12におけるブラックマトリクスBM上には、カラーフィルター34が設けられない。なお、周辺エリア12において、カラーフィルター34は、少なくとも引き出し線32、33の上方に形成されなければよい。また、例えば、製造誤差などを考慮して、カラーフィルター34は、アクティブエリア11の境界から周辺エリア12側に多少はみ出すように形成される。 The color filter 34 is disposed only in the active area 11 and is not disposed in the peripheral area 12. Specifically, as shown in FIG. 15, a black matrix BM is provided on the CF substrate 22 in the peripheral area 12. The color filter 34 is not provided on the black matrix BM in the peripheral area 12. In the peripheral area 12, the color filter 34 may not be formed at least above the lead lines 32 and 33. Further, for example, in consideration of manufacturing errors, the color filter 34 is formed so as to protrude somewhat from the boundary of the active area 11 to the peripheral area 12 side.
 液晶層23の誘電率εLC、引き出し線32の面積SLD、引き出し線32上の液晶層23の厚さdとすると、引き出し線32上の静電容量Cは、以下の式(3)で表される。

 C=εLC・SLD/d     ・・・(3)

また、同様に、引き出し線33上の静電容量は、上記式(3)で表される。
When the dielectric constant ε LC of the liquid crystal layer 23, the area S LD of the lead line 32, and the thickness d 3 of the liquid crystal layer 23 on the lead line 32, the capacitance C 3 on the lead line 32 is expressed by the following equation (3 ).

C 3 = ε LC · S LD / d 3 (3)

Similarly, the capacitance on the lead wire 33 is expressed by the above equation (3).
 図11の比較例において、引き出し線32上の液晶層23の厚さd、引き出し線32上の静電容量Cとする。一例として、TNモードの液晶表示装置を想定し、d=5.5μm、d=4.0μmとすると、“C≒0.73C”となる。すなわち、本実施形態は、比較例に比べて、引き出し線32上の静電容量が約3割弱だけ低減でき、それに相当する消費電流が低減できる。同様に、本実施形態は、比較例に比べて、引き出し線33上の静電容量を低減できる。 In the comparative example of FIG. 11, the thickness d 4 of the liquid crystal layer 23 on the lead line 32 and the capacitance C 4 on the lead line 32 are used. As an example, assuming a TN mode liquid crystal display device and d 3 = 5.5 μm and d 4 = 4.0 μm, “C 3 ≈0.73C 4 ”. That is, this embodiment can reduce the capacitance on the lead-out line 32 by a little less than about 30% compared to the comparative example, and can reduce the corresponding current consumption. Similarly, the present embodiment can reduce the capacitance on the lead line 33 as compared with the comparative example.
 図16は、デルタ配列を有する液晶表示装置10の平面図である。デルタ配列においても、ストライプ配列と同様に、液晶表示装置10の消費電流が低減できる。 FIG. 16 is a plan view of the liquid crystal display device 10 having a delta arrangement. Also in the delta arrangement, the current consumption of the liquid crystal display device 10 can be reduced as in the stripe arrangement.
 (第1変形例)
 図17は、第1変形例に係る液晶表示装置10の断面図である。第1変形例では、共通電極35は、アクティブエリア11にのみ配置され、周辺エリア12には配置されない。具体的には、図17に示すように、周辺エリア12におけるCF基板22上には、ブラックマトリクスBMのみが設けられ、周辺エリア12におけるブラックマトリクスBM上には、共通電極35が設けられない。
(First modification)
FIG. 17 is a cross-sectional view of the liquid crystal display device 10 according to the first modification. In the first modification, the common electrode 35 is disposed only in the active area 11 and is not disposed in the peripheral area 12. Specifically, as shown in FIG. 17, only the black matrix BM is provided on the CF substrate 22 in the peripheral area 12, and the common electrode 35 is not provided on the black matrix BM in the peripheral area 12.
 第1変形例では、引き出し線32、33の上方には、共通電極35が配置されないので、引き出し線32、33上の静電容量を無くすことができる。これにより、引き出し線32、33上の静電容量に起因する消費電流を削減できる。 In the first modification, since the common electrode 35 is not disposed above the lead lines 32 and 33, the capacitance on the lead lines 32 and 33 can be eliminated. Thereby, the consumption current resulting from the electrostatic capacitance on the lead lines 32 and 33 can be reduced.
 (第2変形例)
 図18は、第2変形例に係る液晶表示装置10の断面図である。液晶表示装置10の平面図は、図14と同じである。
(Second modification)
FIG. 18 is a cross-sectional view of the liquid crystal display device 10 according to the second modification. A plan view of the liquid crystal display device 10 is the same as FIG.
 第2変形例では、樹脂に比べて薄く形成かつ加工できる遮光材料を用いてブラックマトリクスBMを構成するようにしている。ブラックマトリクスBMは、例えば遮光性を有する金属が用いられ、具体的には、クロム(Cr)、又は、酸化クロムとクロムとの積層膜などが用いられる。 In the second modification, the black matrix BM is configured using a light shielding material that can be formed and processed thinner than the resin. For the black matrix BM, for example, a light-shielding metal is used, and specifically, chromium (Cr) or a laminated film of chromium oxide and chromium is used.
 第2変形例では、第2実施形態に比べて、ブラックマトリクスBMの厚さを小さくできる。よって、第2変形例では、引き出し線32、33上の液晶層23の厚さdは、第2実施形態に比べて大きくできるため、引き出し線32、33上の静電容量をより低減できる。この結果、液晶表示装置10の消費電流をより低減できる。 In the second modified example, the thickness of the black matrix BM can be reduced as compared with the second embodiment. Therefore, in the second modification, the thickness d 3 of the liquid crystal layer 23 on the lead lines 32 and 33, it is possible to increase in comparison with the second embodiment, it can be further reduced capacitance on the lead wire 32, 33 . As a result, the current consumption of the liquid crystal display device 10 can be further reduced.
 また、第2変形例では、アクティブエリア11におけるブラックマトリクスBMの厚さも薄くできる。これにより、第2変形例では、第1実施形態に比べて、信号線SL上の液晶層23の厚さdをより大きくできるため、信号線SL上の静電容量をより低減できる。この結果、液晶表示装置10の消費電流をより低減できる。同様に、走査線GL上の静電容量をより低減できる。 In the second modification, the thickness of the black matrix BM in the active area 11 can also be reduced. Thus, in the second modification, as compared with the first embodiment, since the thickness d 1 of the liquid crystal layer 23 on the signal line SL can be further increased, thereby further reducing the capacitance on the signal line SL. As a result, the current consumption of the liquid crystal display device 10 can be further reduced. Similarly, the capacitance on the scanning line GL can be further reduced.
 本発明は、上記実施形態に限定されるものではなく、その要旨を逸脱しない範囲内で、構成要素を変形して具体化することが可能である。さらに、上記実施形態には種々の段階の発明が含まれており、1つの実施形態に開示される複数の構成要素の適宜な組み合わせ、若しくは異なる実施形態に開示される構成要素の適宜な組み合わせにより種々の発明を構成することができる。例えば、実施形態に開示される全構成要素から幾つかの構成要素が削除されても、発明が解決しようとする課題が解決でき、発明の効果が得られる場合には、これらの構成要素が削除された実施形態が発明として抽出されうる。 The present invention is not limited to the embodiment described above, and can be embodied by modifying the constituent elements without departing from the scope of the invention. Further, the above embodiments include inventions at various stages, and are obtained by appropriately combining a plurality of constituent elements disclosed in one embodiment or by appropriately combining constituent elements disclosed in different embodiments. Various inventions can be configured. For example, even if some constituent elements are deleted from all the constituent elements disclosed in the embodiments, the problems to be solved by the invention can be solved and the effects of the invention can be obtained. Embodiments made can be extracted as inventions.
 10…液晶表示装置、11…アクティブエリア、12…周辺エリア、13…画素、14…スイッチング素子、15…走査ドライバ、16…信号ドライバ、17…共通電圧供給回路、21…TFT基板、22…カラーフィルター基板、23…液晶層、24…シール材、25,26…絶縁膜、27…画素電極、28,30…電極、29…半導体層、31…コンタクトプラグ、32,33…引き出し線、34…カラーフィルター、35…共通電極。 DESCRIPTION OF SYMBOLS 10 ... Liquid crystal display device, 11 ... Active area, 12 ... Peripheral area, 13 ... Pixel, 14 ... Switching element, 15 ... Scan driver, 16 ... Signal driver, 17 ... Common voltage supply circuit, 21 ... TFT substrate, 22 ... Color Filter substrate, 23 ... Liquid crystal layer, 24 ... Sealing material, 25, 26 ... Insulating film, 27 ... Pixel electrode, 28, 30 ... Electrode, 29 ... Semiconductor layer, 31 ... Contact plug, 32, 33 ... Lead wire, 34 ... Color filter, 35 ... Common electrode.

Claims (7)

  1.  第1及び第2基板と、
     前記第1及び第2基板間に挟持された液晶層と、
     前記第1基板上に設けられ、複数の画素を区画する遮光膜と、
     前記第1基板上かつ前記遮光膜の複数の開口部に設けられたカラーフィルターと、
     前記遮光膜及び前記カラーフィルター上に設けられた共通電極と、
     前記第2基板上に設けられた信号線と、
     前記信号線の上方に絶縁膜を介して設けられ、前記信号線に電気的に接続され、画素に対応するように設けられた画素電極と、
     を具備し、
     前記信号線の上方には、前記カラーフィルターを介さずに前記遮光膜が配置されることを特徴とする液晶表示装置。
    First and second substrates;
    A liquid crystal layer sandwiched between the first and second substrates;
    A light shielding film provided on the first substrate and defining a plurality of pixels;
    A color filter provided on the first substrate and at a plurality of openings of the light shielding film;
    A common electrode provided on the light shielding film and the color filter;
    A signal line provided on the second substrate;
    A pixel electrode provided above the signal line via an insulating film, electrically connected to the signal line, and corresponding to a pixel;
    Comprising
    The liquid crystal display device, wherein the light shielding film is disposed above the signal line without the color filter.
  2.  前記第2基板上に設けられた走査線をさらに具備し、
     前記走査線の上方には、前記カラーフィルターを介さずに前記遮光膜が配置されることを特徴とする請求項1に記載の液晶表示装置。
    A scanning line provided on the second substrate;
    The liquid crystal display device according to claim 1, wherein the light shielding film is disposed above the scanning line without the color filter.
  3.  前記複数の画素が配置されるアクティブエリアと、
     前記複数の画素を駆動する周辺回路が配置される周辺エリアと、
     前記周辺エリアの前記第2基板上に設けられ、前記信号線と前記周辺回路とを電気的に接続する第1引き出し線と、
     をさらに具備し、
     前記第1引き出し線の上方には、前記カラーフィルターを介さずに前記遮光膜が配置されることを特徴とする請求項1に記載の液晶表示装置。
    An active area in which the plurality of pixels are disposed;
    A peripheral area in which peripheral circuits for driving the plurality of pixels are disposed;
    A first lead line provided on the second substrate in the peripheral area and electrically connecting the signal line and the peripheral circuit;
    Further comprising
    The liquid crystal display device according to claim 1, wherein the light shielding film is disposed above the first lead line without the color filter interposed therebetween.
  4.  前記引き出し線の上方には、前記共通電極が配置されないことを特徴とする請求項3に記載の液晶表示装置。 4. The liquid crystal display device according to claim 3, wherein the common electrode is not disposed above the lead line.
  5.  前記複数の画素が配置されるアクティブエリアと、
     前記複数の画素を駆動する周辺回路が配置される周辺エリアと、
     前記周辺エリアの前記第2基板上に設けられ、前記走査線と前記周辺回路とを電気的に接続する第2引き出し線と、
     をさらに具備し、
     前記第2引き出し線の上方には、前記カラーフィルターを介さずに前記遮光膜が配置されることを特徴とする請求項2に記載の液晶表示装置。
    An active area in which the plurality of pixels are disposed;
    A peripheral area in which peripheral circuits for driving the plurality of pixels are disposed;
    A second lead line provided on the second substrate in the peripheral area and electrically connecting the scanning line and the peripheral circuit;
    Further comprising
    The liquid crystal display device according to claim 2, wherein the light shielding film is disposed above the second lead line without the color filter.
  6.  前記引き出し線の上方には、前記共通電極が配置されないことを特徴とする請求項5に記載の液晶表示装置。 6. The liquid crystal display device according to claim 5, wherein the common electrode is not disposed above the lead line.
  7.  前記遮光膜は、樹脂又は金属から構成されることを特徴とする請求項1に記載の液晶表示装置。 2. The liquid crystal display device according to claim 1, wherein the light shielding film is made of resin or metal.
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