WO2015133035A1

WO2015133035A1 - Resistance changing element and non-volatile storage device

Info

Publication number: WO2015133035A1
Application number: PCT/JP2014/083002
Authority: WO
Inventors: 石川　貴之; 章輔藤井
Original assignee: 株式会社東芝
Priority date: 2014-03-04
Filing date: 2014-12-12
Publication date: 2015-09-11
Also published as: JP2015170610A

Abstract

According to the embodiment, a resistance changing element comprises a ferromagnetic first layer, a ferromagnetic second layer, a paraelectric third layer provided between the first layer and the second layer, a paraelectric fourth layer provided between the third layer and the second layer, and a ferroelectric fifth layer provided between the third layer and the fourth layer.

Description

Resistance change element and nonvolatile memory device

Embodiments described herein relate generally to a variable resistance element and a nonvolatile memory device.

There is a resistance change element using a magnetic tunnel junction (MTJ: Magnetic Tunnel Junction). There is also a variable resistance element using a tunnel junction using a ferroelectric. Stable operation is desired.

Embodiments of the present invention provide a variable resistance element and a nonvolatile memory device capable of stable operation.

According to the embodiment of the present invention, the variable resistance element includes a ferromagnetic first layer, a ferromagnetic second layer, and a paraelectric property provided between the first layer and the second layer. A third layer, a paraelectric fourth layer provided between the third layer and the second layer, and a ferroelectric material provided between the third layer and the fourth layer. And a fifth layer.

FIG. 1A to FIG. 1D are schematic cross-sectional views illustrating the resistance change element according to the first embodiment. It is a graph which illustrates the characteristic of the resistance change element concerning a 1st embodiment. FIG. 5 is a schematic cross-sectional view illustrating another resistance change element according to the first embodiment. FIG. 5 is a schematic cross-sectional view illustrating another resistance change element according to the first embodiment. It is a typical sectional view which illustrates another variable resistance element concerning a 2nd embodiment. FIG. 6A and FIG. 6B are schematic perspective views illustrating the nonvolatile memory device according to the third embodiment.

Embodiments of the present invention will be described below with reference to the drawings.
The drawings are schematic or conceptual, and the relationship between the thickness and width of each part, the size ratio between the parts, and the like are not necessarily the same as actual ones. Further, even when the same part is represented, the dimensions and ratios may be represented differently depending on the drawings.
Note that, in the present specification and each drawing, the same elements as those described above with reference to the previous drawings are denoted by the same reference numerals, and detailed description thereof is omitted as appropriate.

(First embodiment)
FIG. 1A to FIG. 1D are schematic cross-sectional views illustrating the resistance change element according to the first embodiment.
As shown in FIG. 1A, the variable resistance element 110 according to this embodiment includes a first layer 11, a second layer 12, a third layer 23, a fourth layer 24, and a fifth layer 25. And including. The nonvolatile memory device 210 according to the embodiment includes a resistance change element 110 and a control unit 50.

The first layer 11 and the second layer 12 are ferromagnetic (ferromagnetic material). The third layer 23 and the fourth layer 24 are paraelectric (paraelectric). The fifth layer 25 is ferroelectric (ferromagnetic).

For example, at least one of the first layer 11 and the second layer 12 includes iron, cobalt, nickel, cobalt iron, permalloy, cobalt iron boron, cobalt manganese silicon, cobalt manganese germanium, cobalt iron aluminum, cobalt iron aluminum silicon, At least one of cobalt iron silicon, cobalt iron manganese silicon, iron platinum, and cobalt platinum is used. The material of the first layer 11 may be the same as or different from the material of the second layer 12. The first layer 11 and the second layer 12 are, for example, conductive.

For example, magnesium oxide is used for at least one of the third layer 23 and the fourth layer 24. At least one of aluminum oxide, magnesium aluminum oxide, and strontium titanium oxide may be used for at least one of the third layer 23 and the fourth layer 24. The material of the third layer 23 may be the same as or different from the material of the fourth layer 24.

When magnesium oxide is used for the third layer 23 and the fourth layer 24, for example, high lattice matching between the material of the first layer 11 and the second layer 12 and the third layer 23 and the fourth layer 24. Is obtained. Thereby, for example, a good tunnel interface is easily formed. Thereby, for example, a high tunneling magnetoresistance ratio is easily obtained.

For example, the fifth layer 25 includes hafnium oxide. The fifth layer 25 may further include at least one of zirconium, aluminum, yttrium, strontium, silicon, and gadolinium. As the fifth layer 25, at least one of barium titanate, lead zirconate titanate, and bismuth ferrite may be used.

Each of the thickness of the third layer 23 and the thickness of the fourth layer 24 is, for example, 5 nanometers (nm) or less. At least one of the thickness of the third layer 23 and the thickness of the fourth layer 24 is preferably 2 nm or less, for example. When the thickness of the third layer 23 and the thickness of the fourth layer 24 are thin, for example, the resistance change element 110 can easily obtain a large output signal.

For example, the thickness of the third layer 23 is preferably different from the thickness of the fourth layer 24. If the thickness of the third layer 23 is different from the thickness of the fourth layer 24, the difference between a plurality of resistance values depending on the ferroelectric polarization direction becomes large. For example, the absolute value of the difference between the thickness of the third layer 23 and the thickness of the fourth layer 24 is 0.5 nm. Thereby, the difference of several resistance value can be enlarged.

If the difference in thickness is excessively large, for example, the thickness of one layer becomes excessively thick, and the operating voltage increases. Alternatively, the thickness of one layer becomes excessively thin and the characteristics become unstable. The absolute value of the difference between the thickness of the third layer 23 and the thickness of the fourth layer 24 is, for example, 2 nm or less. Stable operating characteristics can be obtained.

In the resistance change element 110, for example, a voltage is applied between the first layer 11 and the second layer 12. This applied voltage is distributed to the third layer 23, the fourth layer 24, and the fifth layer 25, for example. The voltage distribution depends on, for example, the difference (for example, ratio) between the relative dielectric constant of the third layer 23, the relative dielectric constant of the fourth layer 24, and the relative dielectric constant of the fifth layer 25.

By reducing the difference (for example, the ratio) between the relative dielectric constant of the third layer 23, the relative dielectric constant of the fourth layer 24, and the relative dielectric constant of the fifth layer 25, a high voltage is applied to any layer. Addition can be suppressed.

For example, by reducing the relative permittivity of the fifth layer 25, the difference between the relative permittivity of the third layer 23, the relative permittivity of the fourth layer 24, and the relative permittivity of the fifth layer 25 (for example, Ratio) can be reduced. For example, the relative dielectric constant of hafnium oxide is low among materials exhibiting ferroelectricity. By using hafnium oxide as the fifth layer 25, for example, in the resistance change element 110, high reliability can be easily obtained.

For example, if the difference between the relative permittivity of the third layer 23 and the relative permittivity of the fifth layer 25 and the difference between the relative permittivity of the fourth layer 24 and the relative permittivity of the fifth layer 25 are excessively large, It is difficult to obtain desired characteristics. For example, when the polarization inversion is caused in the fifth layer 25 by the voltage, the electrical breakdown is likely to occur in the third layer 23 and the fourth layer 24 before the polarization inversion in the fifth layer 25. By reducing the difference in relative permittivity, polarization inversion can be obtained in the fifth layer 25 without causing electrical breakdown.

For example, the relative dielectric constant of the fifth layer 25 is not more than four times that of the third layer 23 and not more than four times that of the fourth layer 24. Thus, high reliability and stable operation can be obtained by reducing the difference (ratio) in relative permittivity.

The thickness of the fifth layer 25 is, for example, 10 nm or less. The thickness of the fifth layer 25 is preferably 5 nm or less, for example. If the thickness of the fifth layer 25 is thin, for example, the operating voltage can be reduced. A large output signal is easily obtained.

The total thickness of the third layer 23, the fourth layer 24, and the fifth layer 25 is, for example, 20 nm or less.

In the resistance change element 110, for example, four states can be obtained. 1A to 1D correspond to the first state ST1 to the fourth state ST4, respectively.

As shown in FIG. 1A, in the first state ST1, the first magnetization 11m of the first layer 11 is along the second magnetization 12m of the second layer 12. That is, the first magnetization 11m is “parallel” to the second magnetization 12m and is not “antiparallel”.

In the embodiment, the “parallel” state of the first magnetization 11m and the second magnetization 12m is not limited to a state in which the relative angle between the magnetizations is strictly 0 degrees. The “parallel” state includes, for example, a state deviated from 0 degree. The deviation angle is, for example, not less than −45 degrees and not more than +45 degrees. The “anti-parallel” state of the first magnetization 11m and the second magnetization 12m is not limited to a state in which the relative angle between the magnetizations is strictly 180 degrees. The “anti-parallel” state includes, for example, a state deviated from 180 degrees. The angle of deviation is not less than −45 degrees and not more than +45 degrees.

In the first state ST1, the polarization direction D5 of the fifth layer 25 is along the direction from the second layer 12 toward the first layer 11.

As shown in FIG. 1B, in the second state ST2, the first magnetization 11m is along the second magnetization 12m. That is, the first magnetization 11m is “parallel” to the second magnetization 12m. In the second state ST2, the polarization direction D5 of the fifth layer 25 is along the direction from the first layer 11 toward the second layer 12.

As shown in FIG. 1C, in the third state ST3, the first magnetization 11m is opposite to the second magnetization 12m. That is, the first magnetization 11m is “antiparallel” with the second magnetization 12m. In the third state ST3, the polarization direction D5 of the fifth layer 25 is along the direction from the second layer 12 toward the first layer 11.

As shown in FIG. 1D, in the fourth state ST4, the first magnetization 11m is opposite to the second magnetization 12m. That is, the first magnetization 11m is “antiparallel” with the second magnetization 12m. In the fourth state ST4, the polarization direction D5 of the fifth layer 25 is along the direction from the first layer 11 toward the second layer 12.

As will be described later, in these plural states, the electrical resistance (hereinafter simply referred to as “resistance”) between the first layer 11 and the second layer 12 is different from each other.

For example, the reversal of the polarization direction in the fifth layer 25 (inversion of the direction D5) is performed, for example, by applying a voltage to the resistance change element 110.

On the other hand, the reversal of the first magnetization 11m of the first layer 11 and the reversal of the second magnetization 12m of the second layer 12 are performed by, for example, a current (spin transfer torque) accompanying voltage application to the resistance change element 110. Is done. Alternatively, as described later, the reversal of the first magnetization 11m and the reversal of the second magnetization 12m may be performed by a current magnetic field generated by a current flowing through the wiring.

For example, a control unit 50 is provided. The controller 50 is electrically connected to the first layer 11 and the second layer 12.

In the embodiment, the state of being electrically connected includes a state in which two conductors are in direct contact and a state in which another conductor between the two conductors is inserted and a current flows between the two conductors. Further, in the electrically connected state, a switch element (for example, a transistor or a diode) is inserted between the two conductors, and a current can flow between the two conductors according to the operation of the switch element. Includes state.

A potential difference is formed between the first layer 11 and the second layer 12 by the control unit 50. Due to this potential difference (voltage), inversion of the polarization direction in the fifth layer 25 (inversion of the direction D5) is performed. Inversion of the first magnetization 11m and inversion of the second magnetization 12m are performed by the current accompanying this potential difference.

Hereinafter, first, a case where polarization reversal and magnetization reversal are obtained by applying a voltage between the first layer 11 and the second layer 12 will be described.

In the embodiment, for example, a difference is provided between the ease of magnetization reversal in the first layer 11 and the ease of magnetization reversal in the second layer 12.

In the following description, a case where magnetization reversal can be obtained in the first layer 11 more easily than in the second layer 12 will be described.

For example, an antiferromagnetic layer is provided in contact with the second layer 12 or in the vicinity of the second layer 12. On the other hand, no antiferromagnetic layer is provided in the vicinity of the first layer 11. Thereby, the magnetization reversal can be obtained in the first layer 11 more easily than in the second layer 12.

The material of the first layer 11 may be changed from the material of the second layer 12. The size of the first layer 11 may be changed from the size of the second layer 12. The size includes a length in a direction perpendicular to the stacking direction. The size includes a thickness (a length along the stacking direction). Further, the shape of the first layer 11 may be changed to the shape of the second layer 12. Thereby, the magnetization reversal can be obtained in the first layer 11 more easily than in the second layer 12.

Hereinafter, examples of the first state ST1 to the fourth state ST4 will be described.
For example, the second state ST2 is an initial state. In the second state ST2, the magnetizations of the two ferromagnetic layers (first layer 11 and second layer 12) are in a parallel state, and the polarization direction of the ferroelectric layer (fifth layer 25) is downward. The initial state is formed, for example, by applying a voltage of a predetermined value or more between the second layer 12 and the first layer 11. For example, a positive voltage is applied to the first layer 11 with the second layer 12 as a reference.

That is, in the resistance change element 110, the write operation is performed by applying a voltage (applied voltage Vap) between the first layer 11 and the second layer 12, for example. Thereby, the reversal of the polarization direction of the fifth layer 25 or the reversal of the first magnetization 11m of the first layer 11 occurs. When the inversion of the fifth layer 25 occurs, the first state ST1 is formed. When the reversal of the first magnetization 11m occurs, the fourth state ST4 occurs. That is, a state transition occurs.

The transition to the first state ST1 occurs, for example, when the voltage applied to the fifth layer 25 exceeds the threshold voltage (V _FE ) in ferroelectric polarization reversal.

The transition to the fourth state ST4 occurs when the current flowing through the resistance change element 110 exceeds the threshold current (I _FM ) in the reversal of the first magnetization 11m of the first layer 11. The reversal of the first magnetization 11m is caused by, for example, spin transfer torque.

Transition states (first state ST1 or the fourth state ST4) is by application of a voltage to the resistance variable element 110, more than one threshold and the threshold voltage _{V FE} and the threshold current _{I FM} earlier It depends on what. Which threshold of threshold voltage V _FE and threshold current I _FM is exceeded first is determined by, for example, the thickness of each of third layer 23, fourth layer 24, and fifth layer 25, and It depends on the value depending on the material. The value depending on the material includes a relative dielectric constant and the like.

Furthermore, when further increasing the applied voltage Vap to the resistance variable element 110, the voltage applied to the fifth layer 25 exceeds the threshold voltage _{V FE,} current exceeds the threshold current _{I FM.} That is, both the reversal of the polarization direction of the fifth layer 25 and the reversal of the first magnetization 11m occur. Thereby, the third state ST3 occurs.

FIG. 2 is a graph illustrating characteristics of the variable resistance element according to the first embodiment.
The horizontal axis in FIG. 2 represents the applied voltage Vap applied between the first layer 11 and the second layer 12. The vertical axis represents the current Ic flowing between the first layer 11 and the second layer 12.

In this example, when the applied voltage Vap is increased in the second state ST2, when a predetermined voltage is exceeded, a transition to the fourth state ST4 occurs. Alternatively, a transition to the first state ST1 occurs. When the applied voltage Vap is further increased, a transition to the third state ST3 occurs. Even if the applied voltage Vap is decreased from the third state ST3, the third state ST3 is maintained.

Thus, by applying a voltage to the resistance change element 110, in addition to the second state ST2 and the third state ST3, at least one of the first state ST1 and the fourth state ST4 is obtained. The number of states obtained is three or more. That is, three or more multi-value resistors can be obtained.

Reading of these states is performed by applying a voltage to the resistance change element 110. The polarity (current direction) of the voltage at this time is arbitrary. That is, a current flowing from the first layer 11 toward the second layer 12 may be used. A current flowing from the second layer 12 toward the first layer 11 may be used.

For example, the resistors in the first state ST1 to the fourth state ST4 are referred to as a first resistor R1 to a fourth resistor R4. For example, when a current is passed from the first layer 11 toward the second layer 12, the following occurs. The third resistor R3 is higher than the second resistor R2. The first resistor R1 and the fourth resistor R4 are between the second resistor R2 and the third resistor R3. The first resistor R1 is higher or lower than the fourth resistor R4. That is, R2 <R1 <R4 <R3. Or, R2 <R4 <R1 <R3. Which of these relations is obtained is determined by, for example, the materials and thicknesses of the first layer 11 to the fifth layer 25.

In the variable resistance element 110, the erasing operation can be performed, for example, by applying a voltage having a polarity opposite to that of writing. For example, a positive voltage is applied to the first layer 11 with the second layer 12 as a reference. As a result, a transition to the first state ST1 occurs. An initial state is obtained.

As described above, in the write operation, three or more states can be obtained by the voltage Vap applied to the resistance change element 110. Three or more resistance values corresponding to these states can be obtained.

For example, there is a resistance change element using MTJ. In this element, the tunnel current value changes depending on whether the relative magnetization arrangement in the two ferromagnetic layers is parallel or antiparallel. Application of such a resistance change element to a memory cell of a magnetoresistive change memory (MRAM: Magnetoresistive Random Access Memory) has been studied.

There is a reference example using a magnetization arrangement other than parallel and antiparallel as a method for realizing multi-valued operation in an MTJ element. However, in general, the other magnetization arrangements of the two states are unstable and difficult to operate stably.

On the other hand, there is a resistance change element using a tunnel junction using a ferroelectric. In this element, the potential of the tunnel barrier is modulated depending on the direction of the polarization direction of the ferroelectric, and the tunnel current value changes.

For example, it is conceivable to use a ferroelectric as the MTJ tunnel insulating film. In addition to the resistance change depending on the ferromagnetic magnetization arrangement, a resistance change depending on the polarization direction of the ferroelectric substance can be obtained. As a result, a multi-value operation of three or more values can be obtained.

At this time, there is a reference example using perovskite oxide-based PbZrTiO ₃ or BaTiO ₃ as the ferroelectric layer. However, since a special material system called perovskite oxide is used, the affinity with the ferromagnetic material system is low. For this reason, it is difficult to obtain a high tunnel magnetoresistance ratio. Furthermore, this reference example requires a high-temperature process, and mixing occurs at the tunnel interface, making it difficult to obtain desired characteristics.

In the present embodiment, a ferroelectric fifth layer 25 is provided between the ferromagnetic first layer 11 and the ferromagnetic second layer 12. A paraelectric third layer 23 is provided between the first layer 11 and the fifth layer 25, and a fourth layer 24 is provided between the second layer 12 and the fifth layer 25. Controllability of change in magnetization and change in polarization is enhanced. For example, the selection range of the material of the fifth layer 25 is expanded.

Particularly, a material having a small relative dielectric constant difference from the material of the third layer 23 and a small relative dielectric constant difference from the material of the fourth layer 24 is selected as the material of the fifth layer 25. Thereby, the controllability of magnetization change and polarization change is enhanced. In this respect, for example, hafnium oxide having a low relative dielectric constant in the ferroelectric material group is preferably selected as the material of the fifth layer 25. In addition, by selecting hafnium oxide, there is an advantage that the process temperature is not excessively high and desired characteristics can be obtained.

By using an appropriate material for the third layer 23 and the fourth layer 24, high crystallinity is obtained, and a high tunneling magnetoresistance ratio is easily obtained. In this respect, it is preferable to use, for example, magnesium oxide as the material of the third layer 23 and the fourth layer 24.

According to the embodiment, a multi-value resistance change can be obtained stably. A variable resistance element capable of stable operation and a nonvolatile memory device using the variable resistance element can be provided.

FIG. 3 is a schematic cross-sectional view illustrating another variable resistance element according to the first embodiment.
As shown in FIG. 3, the resistance change element 111 according to this embodiment further includes an antiferromagnetic layer 12 a in addition to the first layer 11 to the fifth layer 25. The nonvolatile memory element 211 according to the embodiment includes a resistance change element 111 and a control unit 50.

The second layer 12 is disposed between the antiferromagnetic layer 12 a and the fourth layer 24. Thereby, inversion of the second magnetization 12m in the second layer 12 becomes more difficult than inversion of the first magnetization 11m in the first layer 11. More stable operation can be obtained.

For example, an antiferromagnetic material (for example, iridium manganese or platinum manganese) is used for the antiferromagnetic layer 12a. A combination of a laminated ferrimagnetic structure and an antiferromagnetic material may be applied as the antiferromagnetic layer 12a. As the antiferromagnetic layer 12a, for example, a laminated structure of ruthenium / cobalt iron / iridium manganese may be applied.

FIG. 4 is a schematic cross-sectional view illustrating another variable resistance element according to the first embodiment.
As shown in FIG. 4, the variable resistance element 112 according to the present embodiment further includes a first conductive layer 31 in addition to the first layer 11 to the fifth layer 25. The nonvolatile memory element 212 according to the embodiment includes the resistance change element 112 and the control unit 50.

For example, a current is passed through the first conductive layer 31 during a write operation. The first layer 11 is heated by the generated Joule heat. The first magnetization 11m of the first layer 11 is easily reversed. It becomes easier to form the fourth state ST4. This facilitates the generation of the first state ST1 and the generation of the fourth state ST4 separately.

Also in the resistance change element 112, the same read operation and erase operation as the resistance change element 110 can be performed.

In the variable resistance element 112, in this case, the transition voltage V4 to the fourth state ST4 by voltage application is set lower than the transition voltage V1 to the first state ST1 by voltage application. Then, Joule heat assist is used for the transition to the fourth state 4. In this example, the transition voltage V4 is set low. In the present embodiment, for example, the material of the first layer 11 and the material and thickness of the fifth layer 25 are appropriately set. Thereby, the transition voltage V4 and the transition voltage V1 are set appropriately.

In the resistance change element 112, a transition from the second state ST2 to the fourth state ST4 can be caused by a relatively small current. Therefore, for example, it is advantageous when writing a quaternary state for a fine cell structure (for example, a cell size of 100 nm or less).

(Second Embodiment)
FIG. 5 is a schematic cross-sectional view illustrating another resistance change element according to the second embodiment.
As shown in FIG. 5, the variable resistance element 120 according to the present embodiment further includes a first conductive layer 31 and a first insulating layer 3 i in addition to the first layer 11 to the fifth layer 25. The nonvolatile memory element 220 according to the embodiment includes a resistance change element 120 and a control unit 50.

The first layer 11 is disposed between the first conductive layer 31 and the third layer 23. A first insulating layer 31 i is disposed between the first layer 11 and the first conductive layer 31.

A current can be passed through the first conductive layer 31. The current flowing through the first conductive layer 31 is controlled separately from the current flowing between the first layer 11 and the second layer 12. This current is controlled by the control unit 50, for example.

A magnetic field generated by a current flowing through the first conductive layer 31 is applied to the first layer 11. As a result, the first magnetization 11m of the first layer 11 is reversed. That is, the first magnetization 11 m can be reversed by a current flowing through the first conductive layer 31. For example, a current greater than or equal to a predetermined value is passed through the first conductive layer 31. If the direction of the current is changed, the first magnetization 11m can be reversed.

Thereby, the first magnetization 11m of the first layer 11 can be controlled by the current flowing through the first conductive layer 31 separately from the applied voltage Vap between the first layer 11 and the second layer 12. Thereby, the controllability of the first magnetization 11m is enhanced.

For example, the transition from the second state ST2 to the first state ST1 is performed by applying a voltage between the first layer 11 and the second layer 12. On the other hand, a transition from the second state ST2 to the fourth state ST4 causes a current to flow through the first conductive layer 31. The reversal of the first magnetization 11m of the first layer 11 occurs due to the current magnetic field generated by the current. The transition from the second state ST2 to the third state ST3 is performed by applying a high voltage between the first layer 11 and the second layer 12. In this example, a four-value state can be written by a simpler method.

For example, by using the first conductive layer 31 as compared with the case where the first state ST1 and the fourth state ST4 are obtained only by the voltage Vap applied between the first layer 11 and the second layer 12, the first conductive layer 31 is used. The formation stability of the state ST1 and the fourth state ST4 is increased. Thereby, four states can be obtained more stably.

Also in the resistance change element 120, the same read operation and erase operation as the resistance change element 110 can be performed.

For the first conductive layer 31, for example, at least one of tungsten (W), aluminum (Al), and copper (Cu) is used. For example, at least one of silicon oxide and silicon nitride is used for the first insulating layer 31i. The thickness of the first insulating layer 31i is, for example, not less than 5 nm and not more than 100 nm.

Hereinafter, examples of layers included in the variable resistance element according to the first embodiment and the second embodiment will be described.

For example, cobalt iron manganese silicon is used as the first layer 11 and the second layer 12. Magnesium oxide is used for the third layer 23 and the fourth layer 24. As the fifth layer 25, hafnium oxide is used.

For example, a cobalt iron manganese silicon layer is formed as the second layer 12 by, for example, sputtering. Thereafter, heat treatment is performed, for example, under reduced pressure (for example, in vacuum). Thereby, the crystallinity of the cobalt iron manganese silicon layer is improved. For example, the base layer of the second layer 12 is (001) oriented.

As the fourth layer 24, a magnesium oxide layer is formed by using, for example, a sputtering method or an electron beam evaporation method. Cobalt iron manganese silicon and magnesium oxide have good lattice matching. For this reason, the magnesium oxide layer is epitaxially grown on the cobalt iron manganese silicon layer.

For example, when the second layer 12 (for example, cobalt iron manganese silicon layer) is (001) oriented, the magnesium oxide layer formed thereon is (001) oriented. A high tunnel magnetoresistance ratio can be obtained by orienting the fourth layer 24 to (001).

As the fifth layer 25, a hafnium oxide layer is formed by sputtering or ALD (Atomic Layer Deposition) method. By setting the formation temperature of the hafnium oxide layer low, an amorphous hafnium oxide layer can be obtained.

As the third layer 23, a magnesium oxide layer is formed using, for example, sputtering or electron beam evaporation. Magnesium oxide is preferentially (001) oriented. For this reason, when a magnesium oxide layer is deposited on an amorphous film as a base, it becomes a (001) orientation layer. Thereby, the magnesium oxide layer of the third layer 23 is also (001) oriented in the same manner as the fourth layer 24. This makes it easy to obtain a high tunnel magnetoresistance ratio.

As the first layer 11, a cobalt iron manganese silicon layer is formed by, for example, sputtering. Crystallinity is improved by heat-treating the cobalt iron manganese silicon layer of the first layer 11 under reduced pressure. By this heat treatment, for example, the ferroelectricity is improved in the hafnium oxide layer of the fifth layer 25.

In the embodiment, for example, a combination of cobalt iron manganese silicon and magnesium oxide is used. Cobalt iron manganese silicon is a half-metal material. Thereby, it is easy to obtain a high tunnel magnetoresistance ratio.

Hafnium oxide having a dielectric constant comparable to magnesium oxide is used. Thereby, the electric field inversion of the ferroelectric polarization in the hafnium oxide layer can be performed without causing dielectric breakdown of the magnesium oxide layer.

For example, by providing a difference in thickness in the third layer 23 and the fourth layer 24, the modulation effect of the tunnel current value according to the ferroelectric polarization direction can be increased.

According to the embodiment, for example, a multi-value state with a large output signal difference is obtained. According to the embodiment, dielectric breakdown is suppressed. Thereby, a highly reliable resistance change operation is obtained.

(Third embodiment)
The present embodiment relates to a nonvolatile memory device. The nonvolatile memory device according to the embodiment includes any of the nonvolatile memory devices described in regard to the first and second embodiments, and modifications thereof. For example, the nonvolatile memory device according to the present embodiment includes, for example, any one of the resistance change elements described above and the control unit 50 that applies a voltage between the first layer 11 and the second layer 12. According to the present embodiment, a nonvolatile memory device capable of stable operation can be provided.

FIG. 6A and FIG. 6B are schematic perspective views illustrating the nonvolatile memory device according to the third embodiment.
As illustrated in FIG. 6A, the nonvolatile memory device 250 according to the present embodiment includes a plurality of first wirings WR1, a plurality of second wirings WR2, and a plurality of memory cells MC. The plurality of memory cells MC include the resistance change element according to the embodiment and modifications thereof.

The plurality of first wirings WR1 cross three-dimensionally with the plurality of second wirings WR2. For example, the first wiring WR1 extends along the X-axis direction. The second wiring WR2 extends along the Y-axis direction. In this example, the Y-axis direction is orthogonal to the X-axis direction. A direction orthogonal to the X-axis direction and the Y-axis direction is taken as a Z-axis direction. In this example, the second wiring WR1 is separated from the first wiring WR1 in the Z-axis direction.

Each of the plurality of memory cells MC (resistance change elements) is disposed at a position between the plurality of first wirings WR1 and the plurality of second wirings WR2.

The first wiring WR1 and the second wiring WR2 are electrically connected to the control unit 50. A voltage is applied to the memory cell MC through the first wiring WR1 and the second wiring WR2, and the above operation is performed.

The first wiring WR1 includes, for example, first to third bits BL1 to BL3. The second wiring WR2 includes first to third word lines WL1 to WL3. The state of the memory cell MC is written, read, or erased by these bit lines and word lines.

In the embodiment, a rectifying element (for example, a diode) may be provided at least at a position between the first wiring WR1 and the resistance change element and between the second wiring WR2 and the resistance change element.

As shown in FIG. 6B, the nonvolatile memory element 251 according to this embodiment includes a plurality of element memory layers MA stacked on each other. The plurality of element memory layers MA are stacked, for example, along the Z-axis direction. In this example, four element memory layers MA, that is, first to fourth element memory layers MA1 to MA4 are provided. The number of element memory layers MA is arbitrary.

Each of the element memory layers MA includes a first wiring WR1, a second wiring WR2, and a memory cell MC.

The first element memory layer MA1 includes a first layer bit line BLL1 (including bit lines BL11, BL12, and BL13), a first layer word line WLL1 (including word lines WL11, WL12, and WL13), and a first layer memory. Cell MC1.

The second element memory layer MA2 includes a second layer bit line BLL2 (including bit lines BL21, BL22, and BL23), a first layer word line WLL1 (including word lines WL11, WL12, and WL13), and a second layer memory. Cell MC2.

The third element memory layer MA2 includes a second layer bit line BLL2 (including bit lines BL21, BL22, and BL23), a second layer word line WLL2 (including word lines WL21, WL22, and WL23), and a third layer memory. Cell MC3.

The fourth element memory layer MA4 includes a third layer bit line BLL3 (including bit lines BL31, BL32, and BL33), a second layer word line WLL2 (including word lines WL21, WL22, and WL23), and a fourth layer memory. Cell MC4.

In this example, the bit line BL or the word line WL is shared in the element memory layers MA adjacent along the Z-axis direction. The embodiment is not limited to this. For example, an interlayer insulating film may be provided between element memory layers MA adjacent along the Z-axis direction, and a bit line BL and a word line WL may be provided in each of the element memory layers MA. In this case, the extending direction of the bit line BL and the extending direction of the word line WL in each of the element memory layers MA are arbitrary.

According to the present embodiment, writing in a multi-valued state with a large output signal ratio can be realized with high reliability by utilizing the characteristics of both a ferromagnetic material and a ferroelectric material. According to the embodiment, a highly reliable element with multi-value operation can be obtained.

According to the embodiment, it is possible to provide a variable resistance element and a non-volatile memory device capable of stable operation.

In the present specification, “vertical” and “parallel” include not only strictly vertical and strictly parallel, but also include, for example, variations in the manufacturing process, and may be substantially vertical and substantially parallel. It ’s fine.

The embodiments of the present invention have been described above with reference to specific examples. However, the present invention is not limited to these specific examples. For example, a person skilled in the art has a specific layer configuration of each element such as the first to fifth layers, the conductive layer, the insulating layer, the antiferromagnetic layer, the control unit, and the wiring included in the variable resistance element and the nonvolatile memory device Is appropriately included in the scope of the present invention as long as the present invention can be carried out in the same manner and the same effects can be obtained by appropriately selecting from the known ranges.
Moreover, what combined any two or more elements of each specific example in the technically possible range is also included in the scope of the present invention as long as the gist of the present invention is included.

In addition, all variable resistance elements and nonvolatile memory devices that can be implemented by those skilled in the art based on the variable resistance elements and nonvolatile memory devices described above as embodiments of the present invention are also included in the present invention. As long as the gist is included, it belongs to the scope of the present invention.

In addition, in the category of the idea of the present invention, those skilled in the art can conceive of various changes and modifications, and it is understood that these changes and modifications also belong to the scope of the present invention. .

Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

Claims

A ferromagnetic first layer;
A second ferromagnetic layer;
A paraelectric third layer provided between the first layer and the second layer;
A paraelectric fourth layer provided between the third layer and the second layer;
A ferroelectric fifth layer provided between the third layer and the fourth layer;
A variable resistance element.
The resistance change element according to claim 1, wherein a relative dielectric constant of the fifth layer is not more than four times that of the third layer and not more than four times that of the fourth layer.
2. The variable resistance element according to claim 1, wherein at least one of the third layer and the fourth layer includes magnesium oxide, aluminum oxide, magnesium aluminum oxide, and strontium titanium oxide.
The resistance change element according to claim 1, wherein the fifth layer contains hafnium oxide.
5. The variable resistance element according to claim 4, wherein the fifth layer further includes at least one of zirconium, aluminum, yttrium, strontium, silicon, and gadolinium.
At least one of the first layer and the second layer is made of iron, cobalt, nickel, cobalt iron, permalloy, cobalt iron boron, cobalt manganese silicon, cobalt manganese germanium, cobalt iron aluminum, cobalt iron aluminum silicon, cobalt iron silicon. The resistance change element according to claim 1, comprising at least one of cobalt iron manganese silicon, iron platinum, and cobalt platinum.
The resistance change element according to claim 1, wherein the thickness of the fifth layer is 10 nanometers or less.
The resistance change element according to claim 1, wherein each of the thickness of the third layer and the thickness of the fourth layer is 5 nanometers or less.
The resistance change element according to claim 1, wherein an absolute value of a difference between the thickness of the third layer and the thickness of the fourth layer is 0.5 nanometer or more.
The resistance change element according to claim 9, wherein an absolute value of a difference between the thickness of the third layer and the thickness of the fourth layer is 2 nanometers or less.
The resistance change element according to claim 1, wherein a total thickness of the third layer, the fourth layer, and the fifth layer is 20 nanometers or less.
A first state can be formed;
In the first state, the first magnetization of the first layer is along the second magnetization of the second layer, and the polarization direction of the fifth layer is changed from the second layer to the first layer. The resistance change element according to claim 1, wherein the resistance change element is along a direction of heading.
A second state can be further formed;
The said 1st magnetization is along the said 2nd magnetization in the said 2nd state, The said direction of the said polarization is along the direction which goes to the said 2nd layer from the said 1st layer. Variable resistance element.
A third state can be further formed;
The said 1st magnetization is reverse to the said 2nd magnetization in the said 3rd state, The said direction of the said polarization is along the direction which goes to the said 1st layer from the said 2nd layer. Variable resistance element.
A fourth state can be further formed;
15. In the fourth state, the first magnetization is opposite to the second magnetization, and the direction of the polarization is along a direction from the first layer toward the second layer. Variable resistance element.
A conductive layer;
The variable resistance element according to claim 1, wherein the first layer is disposed between the conductive layer and the third layer.
Further comprising an insulating layer;
The variable resistance element according to claim 1, wherein the insulating layer is disposed between the first layer and the conductive layer.
Further comprising an antiferromagnetic layer,
The resistance change element according to claim 1, wherein the second layer is disposed between the antiferromagnetic layer and the fourth layer.
The variable resistance element according to claim 1,
A controller that applies a voltage between the first layer and the second layer;
A non-volatile storage device.
A plurality of first wires;
A plurality of second wires;
Further comprising
The plurality of first wirings intersect with the plurality of second wirings,
A plurality of the variable resistance elements are provided,
The nonvolatile memory device according to claim 19, wherein each of the plurality of resistance change elements is disposed at a position between the plurality of first wirings and the plurality of second wirings.