WO2015131391A1

WO2015131391A1 - Device and method for current sensing and power supply modulator using the same

Info

Publication number: WO2015131391A1
Application number: PCT/CN2014/073046
Authority: WO
Inventors: Zhancang WANG
Original assignee: Nokia Technologies Oy; Nokia (China) Investment Co., Ltd.
Priority date: 2014-03-07
Filing date: 2014-03-07
Publication date: 2015-09-11
Also published as: EP3114761A1; EP3114761A4

Abstract

Embodiments of the invention provide a current sensor. The current sensor comprises: a current sensing element having a first sensing terminal and a second sensing terminal, a first current mirror network CMN cell, a second CMN cell and a third CMN cell. The first CMN cell comprises: a first CMN that has a first high impedance terminal, a first low impedance terminal and a first output terminal, and a first local current mode feedback network LCMFN connected between the first output terminal and the first low impedance terminal. The first CMN cell is DC-coupled to the first sensing terminal of the current sensing element via the first high impedance terminal and operative to generate a first output signal according to the current sensed at the first sensing terminal. The second CMN cell comprises: a second CMN that has a second high impedance terminal, a second low impedance terminal and a second output terminal, and a second LCMFN connected between the second output terminal and the second low impedance terminal. The second CMN cell is DC-coupled to the second sensing terminal of the current sensing element via the second high impedance terminal and operative to generate a second output signal according to the current sensed at the second sensing terminal. The third CMN cell comprises: a third CMN that has a third high impedance terminal, a third low impedance terminal and a third output terminal, and a third LCMFN connected between the third output terminal and the third low impedance terminal. The third CMN cell receives the first output signal and the second output signal via the third high impedance terminal and the third low impedance terminal, respectively and is operative to generate a third output signal according to a combination of the first output signal and the second output signal.

Description

DEVICE AND METHOD FOR CURRENT SENSING AND POWER SUPPLY MODULATOR USING THE SAME

TECHNICAL FIELD

[0001] Embodiments of the invention generally relate to the field of wireless communications and more specifically, to a device and method for current sensing and an envelope tracking power supply modulator using the same.

BACKGROUND

[0002] With the development of wireless communication technologies, there has been a dramatic increase in use of various multimedia signals. Accordingly, an interest in fourth generation (4G) or higher generation (e.g. 5G) communication systems is increasing as the number of rapider transmission of various multimedia signals in mobile environments increases.

[0003] Efficiency of a power amplifier, which is generally defined as a ratio between the desired transmission power and total power provided by the power amplifier, may drop rapidly as its output power is reduced and the power amplifier operates in a more linear region. 4G or 5G communication systems may provide a higher transmission rate, a wider bandwidth, and a higher peak-to-average power ratio (PAPR) than other communication systems, which may result in higher power dissipation and lower efficiency when a radio frequency (RF) power amplifier used in a base station or a mobile station is supplied with a fixed supply voltage. For example, a RF long term evolution (LTE)/ LTE- Advanced (LTE-A) signal has a high PAPR, which may result in inefficient operation of a RF power amplifier being powered with a supply of a fixed direct current power supply.

SUMMARY

[0004] Various embodiments of the invention aim at addressing at least part of the above problems and disadvantages. Other features and advantages of embodiments of the invention will also be understood from the following description of specific embodiments when read in conjunction with the accompanying drawings, which illustrate, by way of example, the principles of embodiments of the invention. [0005] Various aspects of embodiments of the invention are set forth in the appended claims and summarized in this section. It shall be noted that the protection scope of the invention is limited by the appended claims.

[0006] In a first aspect of the invention, there is provided a current mode current sensor. The current sensor comprises: a current sensing element having a first sensing terminal and a second sensing terminal, a first current mirror network (CMN) cell, a second CMN cell and a third CMN cell. The first CMN cell comprises: a first CMN that has a first high impedance terminal, a first low impedance terminal and a first output terminal, and a first local current mode feedback network (LCMFN) connected between the first output terminal and the first low impedance terminal. The first CMN cell is direct current (DC)-coupled to the first sensing terminal of the current sensing element via the first high impedance terminal and operative to generate a first output signal according to the current sensed at the first sensing terminal. The second CMN cell comprises: a second CMN that has a second high impedance terminal, a second low impedance terminal and a second output terminal, and a second LCMFN connected between the second output terminal and the second low impedance terminal. The second CMN cell is DC-coupled to the second sensing terminal of the current sensing element via the second high impedance terminal and operative to generate a second output signal according to the current sensed at the second sensing terminal. The third CMN cell comprises: a third CMN that has a third high impedance terminal, a third low impedance terminal and a third output terminal, and a third LCMFN connected between the third output terminal and the third low impedance terminal. The third CMN cell receives the first output signal and the second output signal via the third high impedance terminal and the third low impedance terminal, respectively and is operative to generate a third output signal according to a combination of the first output signal and the second output signal.

[0007] In an embodiment, the current sensing element may be a resistor or diode/transistor circuitry.

[0008] In another embodiment, each of the first, second and third CMN cells may compare the current at the corresponding high impedance terminal and the current at the corresponding low impedance terminal to obtain an error current and then amplify the error current via a trans-impedance of the corresponding CMN cell to generate a corresponding one of the first, second and third output signals that is a voltage signal. [0009] In yet another embodiment, the current sensor may further comprises at least one global current mode feedback network coupled between the third output terminal of the third CMN and at least one of the first high impedance terminal and the second high impedance terminal.

[0010] In yet another embodiment, the current sensor may further comprise: a first DC offset adjusting circuit coupled between the first sensing terminal of the sensing element and the first high impedance terminal of the first CMN; and a second DC offset adjusting circuit coupled between the second sensing terminal of the sensing element and the second high impedance terminal of the second CMN.

[0011] In yet another embodiment, at least one of the first and second DC offset adjusting circuits may comprise a series of voltage dividing circuits.

[0012] In yet another embodiment, the third LCMFN may have low pass filter characteristics.

[0013] In a second aspect of the invention, there is provided an envelope tracking supply modulator. The envelope tracking supply modulator comprises: a reference bias voltage generator and shifter operative to generate a reference bias voltage based on an input signal and to shift the input signal based on the generated reference bias voltage; an amplifier circuit operative to amply the shifted input signal; a current sensor circuit operative to provide a supply output signal and a switching output signal proportional to the envelope of the input signal; a switching control circuit operative to provide a switching control signal responsive to the switching output signal. The amplifier circuit, the current sensor circuit, and the switching control circuit are biased by the generated reference bias voltage. The switching control signal is coupled to the supply output signal of the current sensor circuit.

[0014] In a third aspect of the invention, there is provided a power amplifier whose supply voltage is modulated by the envelope tracking supply modulator according to the second aspect of the invention.

[0015] In a fourth aspect of the invention, there is provided an apparatus comprising the power amplifier according to the third aspect of the invention.

[0016] In a fifth aspect of the invention, there is provided a method for current sensing. The method comprises: obtaining a first signal sensed at a first sensing terminal of a current sensing element; generating a first output signal according to the first sensed signal and a negative feedback of the first output signal; obtaining a second signal sensed at a second sensing terminal of the current sensing element; generating a second output signal according to the second sensed signal and a negative feedback of the second output signal; and generating a third output signal based on a combination of the first output signal and the second output signal and according to a negative feedback of the third output signal.

[0017] In a sixth aspect of the invention, there is provided a device for current sensing. The device comprises: means for obtaining a first signal sensed at a first sensing terminal of a current sensing element; means for generating a first output signal according to the first sensed signal and a negative feedback of the first output signal; means for obtaining a second signal sensed at a second sensing terminal of the current sensing element; means for generating a second output signal according to the second sensed signal and a negative feedback of the second output signal; and means for generating a third output signal based on a combination of the first output signal and the second output signal and according to a negative feedback of the third output signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The above and other aspects, features, and benefits of various embodiments of the invention will become more fully apparent, by way of example, from the following detailed description and the accompanying drawings, in which like reference numerals refer to the same or similar elements:

[0019] Fig. 1 illustrates spectra of an LTE baseband signal and its envelope;

[0020] Fig. 2 illustrates an existing envelope tracking supply modulator in the prior art;

[0021] Fig. 3 illustrates architecture of a current sensor according to an embodiment of the present invention;

[0022] Fig. 4 illustrates an example topology of a local current mode feedback network (LCMFN);

[0023] Fig. 5 illustrates an example topology of a global current mode feedback network (GCMFN);

[0024] Fig. 6 illustrates a conceptual circuit diagram of a current mirror network cell according to an embodiment of the present invention;

[0025] Fig. 7 illustrates an example implementation for the current sensor as illustrated in Fig. 3; [0026] Fig. 8 exemplarily illustrates another transistor level implementation for the current sensor as illustrated in Fig. 3 with bipolar junction transistors (BJTs);

[0027] Fig. 9(a) illustrates an envelope tracking supply modulator using the current sensor as illustrated in Fig. 3 according to an embodiment of the present invention, and Fig. 9(b) illustrates an existing exemplary configuration of the reference bias voltage generator and shifter circuit in the prior art;

[0028] Fig. 10 illustrates an example circuitry that uses the envelope tracking supply modulator according to an embodiment of the present invention to supply power for a F power amplifier;

[0029] Fig. 11 illustrates a method for current sensing according to an embodiment of the present invention; and

[0030] Fig. 12 illustrates the method for current sensing as shown in Fig. 11 in a different order.

DETAILED DESCRIPTION [0031] In order to enhance the efficiency of a power amplifier, one promising technology is based on power supply modulation, i.e., modulation of the power supply for the power amplifier. The drain modulation may involve use of envelope tracking (ET) or envelope elimination & restoration (EE&R) schemes. With these schemes, a drain modulator may monitor the envelope of an input signal to be amplified by a power amplifier and then provide, for the power amplifier, a modulated power supply that is proportional to and changing in real time with the envelope of the input signal. By this way, the power supply provided to the power amplifier may be increased or decreased according to the desired transmission power for the input signal to be amplified.

[0032] However, with the development of communications systems to even higher generations, bandwidths of radio signals have been spread extensively. The existing drain modulators may not be proper for use in such wideband systems, for example in LTE/ LTE-A systems, due to their inherent limitations in speed and bandwidth.

[0033] Fig.l illustrates the spectra of an LTE base band signal and its envelope. As illustrated, the bandwidth of the signal envelope is much wider than the base band signal, which indicates a bandwidth design challenge for the envelope tracking supply modulator. In envelope tracking, the envelope signal's bandwidth is a determinative factor for an envelope tracking supply modulator's performance. On the one hand, the much wider envelope bandwidth leads to a rule of thumb that the bandwidth of the envelope tracking supply modulator is at least three times of that of the base band signal bandwidth, depending on characteristics of a specific profile of the modulated signal. On the other hand, from the perspective of signal energy distribution, nonlinear transformations from and to the envelope signal would expand the envelope signal's bandwidth to infinity. However, most of the envelope energy is concentrated from a direct current (DC) to several kilo Hertz (kHz). For example, more than 85% energy of an LTE signal envelope is contained in a few kHz range, and 99% of the energy is concentrated within the base band signal's bandwidth.

[0034] Fig. 2 illustrates an existing drain modulator in the prior art, which as shown generally comprises a supply modulator circuitry and an envelope signal sensing circuitry. The supply modulator circuitry may be a closed-loop wideband power amplifier in which there is a linear part, e.g. a well-known linear amplifier and a switching part, e.g. a current-controlled DC-DC buck switcher. In the existing supply modulator, the linear amplifier may have a wider bandwidth but a relatively low efficiency, while the buck switcher may have a narrower bandwidth but a relatively high efficiency. The buck switcher may be controlled by a control signal from the linear amplifier, and therefore there may be a delay between the processing procedures of the linear amplifier and the buck switcher. The effect of this delay may become more relevant as the RF signal's frequency increases. It therefore may become more and more significant to get the linear amplifier and the buck switcher to be synchronized as the RF signal's frequency keeps increasing. Additionally, the linear amplifier and the buck switcher may be built with separate devices of larger sizes, which may result in higher cost and poor reliability and no possibility to be integrated into a semiconductor chip.

[0035] The existing supply modulators used for RF power amplifiers often employ current sensing technology to implement the envelope signal sensing circuitry, partly because the current sensing technology may be more suitable to measure high-frequency current components. For instance, in an envelope tracking or envelope elimination & restoration (EE&R) circuitry, current sensors may be used to monitor the fast transient change of wideband envelope signals in order to control a DC-DC converter to provide a fine shape of the envelope signals fed into a RF power amplifier. However, with the spreading bandwidth of radio signals, more precise current sensing of wideband radio signals may be desired. Although there are some existing current sensing solutions, higher frequency components of the wideband radio signals may still be challenging to be captured in modern wideband application scenarios, such as in LTE/ LTE-A applications.

[0036] A promising current sensing solution for used in such wideband applications, as disclosed in US patent No. 6,661,217B2, first separately processes a low frequency component of a RF signal by a differential amplifier and a high frequency component of the radio signal by a transformer, and then combines the separately processed signals together to output as the sensed signal. This splitting and combining scheme may result in a poor immunity to signal magnitude unbalance and a transition point during the current sensing and signal amplification. Also, there is an inherent magnitude gap or notch which may impact frequency response flatness. Additionally, this current sensing solution uses voltage amplification, which has to rely on the splitting processing and apparently imposes limitations on bandwidth performance. Moreover, this current sensing solution uses large transformers, which may not be suitable to be applied to small-size electronic devices, such as a mobile phone etc.

[0037] In the following description, numerous specific details of embodiments of the present invention are set forth. However, it shall be understood that embodiments of the invention may be practiced without these specific details. In other instances, well-known circuits, structures and techniques have not been shown in detail in order not to obscure the understanding of this description. It will be appreciated, however, by those of ordinary skills in the art that the invention may be practiced without such specific details. Those of ordinary skills in the art, with the included descriptions, will be able to implement appropriate functionality without undue experimentation.

[0038] References in the specification to "one embodiment," "an embodiment," "an example embodiment," etc., indicate that the embodiment described may include a particular feature, structure, or characteristic, but every embodiment may not necessarily include the particular feature, structure, or characteristic. Moreover, such phrases are not necessarily referring to the same embodiment. Further, when a particular feature, structure, or characteristic is described in connection with an embodiment, it is submitted that it is within the knowledge of one skilled in the art to affect such feature, structure, or characteristic in connection with other embodiments whether or not explicitly described. It shall be understood that the singular forms "a", "an" and "the" include plural referents unless the context explicitly indicates otherwise. [0039] It shall be understood that, although the terms "first" and "second" etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and similarly, a second element could be termed a first element, without departing from the scope of example embodiments. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed terms.

[0040] In the following description and claims, unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs.

[0041] In the accompanying figures, unless defined otherwise, all circuit symbols used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs.

[0042] It shall be understood that when an element is referred to as being "connected" or "coupled" to another element, it may be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being "directly connected" or "directly coupled" to another element, there are no intervening elements present. Other words used to describe the relationship between elements should be interpreted in a like fashion (e.g., "between" versus "directly between", "adjacent" versus "directly adjacent" etc.).

[0043] In the following, descriptions will be made with reference to Figs. 3-8 to illustrate a precision current sensing solution according to embodiments of the present invention. Because of the broad range of applications that use or require precision current sensing, the following discussion regarding exemplary current sensing details does not attempt an exhaustive treatment of such applications. However, the discussion does detail an exemplary application of the present invention in power supply modulation using envelope tracking techniques. Any context-specific examples given herein should not be construed as limiting the present invention.

[0044] Reference is first made to Fig. 3, in which architecture of a device for current sensing, which will be referred to as a current sensor hereafter, according to an embodiment of the present invention is illustrated. Generally, the current sensor may offer precision current sensing from low frequencies, including DC, up to a desired upper frequency and generate a single-ended voltage signal proportional to the sensed current. For example, with an appropriate configuration, the current sensor may provide precision current sensing from DC to approximately 100MHz. Component selections and physical layout may offer a person skilled in the art an opportunity to tailor the current sensor to specific applications.

[0045] In Fig. 3, the depicted example embodiment of a current sensor 30 comprises a current sensing element 31, an upper (or first) current processing branch 32 and a lower (or second) current processing branch 33, and an output circuit 34.

[0046] The current sensing element 31, which may be a resistor or diode/transistor circuitry, has a first sensing terminal TS 1 and a second sensing terminal TS2 and may be operative to sense the current while an envelope input signal flows through it. In applications for modulating supply of a RF power amplifier, the current sensing element 31 may be connected in series to the supply terminal of the RF power supply.

[0047] The upper or first processing branch 32 may comprise: a first current mirror network (CMN) having a first high impedance terminal THl, a first low impedance terminal TLl and a first output terminal TOl, and a first local current mode feedback network (LCMFN) 322 being connected between the first low impedance terminal TLl and the first output terminal TOl . The first CMN and the first LCMFN constitute a first CMN cell.

[0048] The first LCMFN 322 may provide a negative feedback for the first CMN 321 in a current mode. The first CMN cell is DC-coupled, via the first high impedance terminal THl, to the first sensing terminal TSl of the current sensing element 31 and operative to generate a first output signal according to the current sensed at the first sensing terminal TSl . In one embodiment, the first CMN cell may compare the current at the first high impedance terminal THl and the current at the first low impedance TLl to obtain an error current and then amplify the error current over a trans-impedance of the first CMN cell to obtain a voltage signal as the first output signal.

[0049] The first LCMFN 322 may be either a pure resistor network, or a resistor-capacitor (RC) network with low pass filter characteristics. An example topology of the first LCMFN 322 is illustrated in Fig. 4, which may be an N order "Pi" or "T" shape filter or a hybrid filter, wherein N may be selected depending on performance requirements to be an integer equal to or larger than one. As illustrated in Fig. 4, a RC network in block RC1 is optional for frequency response tuning, and the RC network in block RC2 is optional for noise suppression. Preferably, a pure resistor network may be employed with consideration of the stability of the first CMN cell. Further details about the CMN cell will be described with respect to Fig 6. By virtue of the first LCMFN, much higher bandwidth, system stability and linearity performance may be offered relative to the existing solution.

[0050] Similarly, the lower or second processing branch 33 comprises: a second CMN 331 having a second high impedance terminal TH2, a second low impedance terminal TL2 and a second output terminal T02, and a second LCMFN 332 being connected between the second low impedance terminal TL2 and the second output terminal T02. The second CMN 331 and the second LCMFN 332 constitute a second CMN cell.

[0051] The second LCMFN 332 may provide a negative feedback for the second CMN 331 in a current mode. The second CMN cell is DC-coupled, via the second high impedance terminal TH2, to the second sensing terminal TS2 of the current sensing element 31 and operative to generate a second output signal according to the current sensed at the second sensing terminal TS2. In one embodiment, the second CMN cell may compare the current at the second high impedance terminal TH2 and the current at the second low impedance TL2 to obtain an error current and then amplify the error current over a trans-impedance of the second CMN cell to obtain a voltage signal as the second output signal.

[0052] The second LCMFN 332 may be either a pure resistor network, or a RC network with low pass filter characteristics. Similarly to the first LCMFN 322, an example topology of the second LCMFN may also be an N order "Pi" or "T" shape filter or a hybrid filter as illustrated in Fig. 4, wherein N may be selected depending on performance requirements to be an integer equal to or larger than one. As illustrated, the RC network in block RC 1 is optional for frequency response tuning, and the RC network in block RC2 is optional for noise suppression. Preferably, a pure resistor network may be selected for bandwidth performance with consideration of the stability of the second CMN cell. By virtue of the second LCMFN, system bandwidth, stability and linearity performance may further be improved relative to the existing solution. According to performance requirements, the first and second LCMFNs may be configured in the same form or in different forms.

[0053] The output circuit 34 comprises: a third CMN 341 having a third high impedance terminal TH3, a third low impedance terminal TL3 and a third output terminal T03, and a third LCMFN 342 being connected between the second low impedance terminal TH3 and the third output terminal T03. The third CMN 341 and the third LCMFN 342 constitute a third CMN cell. The third LCMFN 342 provides a negative feedback for the third CMN 341 in a current mode. The third CMN cell receives the first output signal from the first CMN 321 via the third low impedance terminal TL3 and receives the second output signal from the second CMN 331 via the third high impedance terminal TH3. The third CMN cell is operative to generate a third output signal based on a combination of the first output signal and the second output signal. In one example, the third CMN cell may compare the first output signal and the second output signal to obtain an error current and then amplify the error current over a trans-impedance of the third CMN cell to obtain a voltage signal as the third output signal.

[0054] The third LCMFN 342 may be either a pure resistor network, or a C network with low pass filter characteristics. Similarly to the first or second LCMFN, an example topology of the third LCMFN 342 may also be an N order "Pi" or "T" shape filter or a hybrid filter as illustrated in Fig. 4, wherein N may be selected depending on performance requirements to be an integer equal to or larger than one. As illustrated, the RC network in block RC1 is optional for frequency response tuning, and the RC network in block RC2 is optional for noise suppression. Preferably, a pure resistor network may be selected with consideration of the stability of the third CMN cell. By virtue of the third LCMFN 342, system bandwidth, stability and linearity performance may be further improved relative to the existing solution. According to performance requirements, the third LCMFN 342 may be configured in the same form as or in different forms from the first or second LCMFN.

[0055] In one embodiment, the upper or first processing branch 32 may further comprise a first global current mode feedback network (GCMFN) 323, which may be coupled between the third output terminal T03 of the output circuit 34 and the high impedance terminal TH1 of the first CMN 321. The first GCMFN 323 may be employed to boost whole system bandwidth performance. The first GCMFN 323 may be either a pure resistor network, or a RC network with low pass filter characteristics. An example topology of the GCMFN 323 is illustrated in Fig. 5, which may be an N order "Pi" or "T" shape filter or a hybrid filter, wherein N may be selected depending on performance requirements to be an integer equal to or larger than one. In an example as illustrated in Fig. 5, the first GCMFN 323 with a RC network in block RC3 is preferable, with consideration of global noise suppression performance. [0056] Alternatively or additionally, the lower or second processing branch 33 may further comprise a second GCMFN 333, which may be coupled between the third output terminal T03 of the output circuit 34 and the high impedance terminal TH2 of the second CMN 331. The second GCMFN 333 may be further employed to boost whole system bandwidth performance. Similarly to the first GCMFN 323, the second GCMFN 333 may be either a pure resistor network, or a RC network with low pass filter characteristics. An example topology of the GCMFN may also be an N order "Pi" or "T" shape filter or a hybrid filter as illustrated in Fig. 5, wherein N may be selected depending on performance requirements to be an integer equal to or larger than one. In an example as illustrated in Fig. 5, the second GCMFN 333 with a RC network in block RC3 is preferable, with consideration of global noise suppression performance. According to overall performance requirements, the first and second GCMFNs may be configured in the same form or in different forms.

[0057] In one embodiment, the upper or first processing branch 32 may further comprise a first DC offset adjusting circuit 324, which is DC-coupled between the first sensing terminal TS1 of the current sensing element 31 and the first high impedance terminal TH1 of the first CMN 321. The lower or second processing branch 33 may comprise a second DC offset adjusting circuit 334, which is DC-coupled between the second sensing terminal TS2 of the current sensing element 31 and the second high impedance terminal TH2 of the second CMN 331. The two DC offset adjusting circuits are used herein for matching the DC level of the current sensor 30 to the DC level at inputs of the following circuits, for example at the input of a hysteretic comparator when the current sensor 30 is used in a drain modulator as illustrated in Fig. 9 (which will be detailed later).

[0058] Either of the first and second DC offset adjusting circuits 324, 334 may comprise a series of voltage dividing resistors as illustrated in Fig. 7. However, a person skilled in the art shall understand that the first and second DC offset adjusting circuits 324, 334 are not limited to voltage dividing resistors, other technologies such as diodes or transistors are also possible, as long as they can realize the function of DC level adjusting.

[0059] The current sensor 30 according to embodiments of the present invention is operative to convert differential signals to a single ended signal, which thereby is termed as a D2S (differential to single end) device. In the architecture of the current sensor 30 as illustrated in Fig. 3, three CMN cells may be collaboratively utilized to realize the D2S conversion. Otherwise, if only one CMN cell, e.g. the third CMN cell may be used for the D2S conversion, since the third CMN 341 may have a low impedance terminal TL3 as an input, which may limit its bandwidth and affect isolation from the previous stage circuit. According to embodiments of the present invention, by adding the first CMN cell and the second CMN cell, the current sensor 30 as a whole system exhibits two high impedance inputs, i.e. the first high impedance terminal TH1 of the first CMN 321 and the second high impedance terminal TH2 of the second CMN 331, when seen from the perspective of the current sensing element 31. This architecture may be configured to be operable without input impedance matching functionality but may also offer some other beneficial characteristics, such as low drift, low noise, and high common-mode rejection ratio (CMRR) etc.

[0060] Additionally, for a current mode sensor with a feedback network, its gain and bandwidth may be independent of each other, which means high gain and wide bandwidth may be obtained simultaneously; while for a voltage mode sensor with a feedback network, its gain and bandwidth may be interdependent, for example, its Gain Bandwidth Product (GBP) may be constant over a wide range of frequencies, and therefore high gain and wide bandwidth may not be obtained simultaneously. Moreover, due to several other advantages of current mode circuits over voltage mode circuits, such as being not vulnerable to external interference, faster processing speed etc., the first, second and third CMN cells of the current sensor 30 according to embodiments of the present invention may be all implemented with current mode circuits. By this way, processing of a wideband RF envelope signal may be directly realized without being split and combined, which may offer a flat gain over a wide range frequencies for the RF envelope signal. Preferably, the current mode circuits may be bipolar junction transistor (B JT) circuits due to better thermal characteristics in high currents of BJTs. However, a person skilled in the art shall understand that the present invention is not limited to BJT circuits. Other technologies, such as CMOS circuits may also be possible.

[0061] Fig. 6 exemplarily illustrates a conceptual circuit diagram of any of the first, second and third CMN cells according to an embodiment of the present invention. The CMN as illustrated in Fig. 6 is a type of current controlled voltage source (CCVS). The illustrated CMN cell comprises a LCMFN, wherein "Ie" represents an error or differential current between the current at the high impedance terminal TH and the current at the low impedance terminal TL; "XI" represents a scaling factor for amplifying the error current Ie; and Z represents an open loop trans-impedance gain of the CMN cell.

[0062] When the CMN cell does not have the LCMFN, i.e. in an open loop state, its output may be expressed as:

[0063] Vout=Ie*Z.

[0064] When the LCMFN is applied to the CMN, the error current Ie may be driven to zero, which causes the voltages at the high impedance terminal TH and the low impedance terminal TL to be equal and causes currents to be summed up at the low impedance terminal TL. With this architecture, D2S processing within the CMN cell is performed in a current mode.

[0065] Fig. 7 illustrates an example implementation for the current sensor 30 as illustrated in Fig. 3. In this figure, each CMN cell, i.e. CMN Cell-1, CMN Cell-2 or CMN Cell-3, comprises a CMN that is illustrated as a CCVS and a LCMFN, wherein "lei" represents an error or differential current between the current at a corresponding high impedance terminal THi and the current at a corresponding low impedance terminal TLi (i=l, 2, 3); "XI" represents the scaling factor for amplifying the error current lei; and Zi represents the corresponding open loop trans-impedance gain of each CMN cell.

[0066] As illustrated, an envelope input signal, which may be a baseband amplitude-modulated radio signal, flows through a current sensing element, which is a resistor Rsens in this example. A first DC offset adjusting circuit, which is composed of two dividing resistors Rl and R2, is DC-coupled between the first sensing terminal TSl of the resistor Rsens and the high impedance terminal THI of the first CMN in CMN Cell-1. The low impedance terminal TLI of the first CMN receives a current feedback from the first output terminal T03 via LCMFN- 1. A first output signal generated by the CMN Cell-1, which is a voltage signal equal to Zl *Iel, is then coupled, via a resistor R5, to the high impedance terminal TH3 of the third CMN in CMN cell-3. Resistors R5 and R6 are operative to adjust the DC bias for the CMN cell-3.

[0067] Similarly, a second DC offset adjusting circuit, which may be composed of two dividing resistors R3 and R4, is DC-coupled between the second sensing terminal TS2 of the resistor Rsens and the high impedance terminal TH2 of the second CMN in CMN Cell-2. The low impedance terminal TL2 of the second CMN receives a current feedback from the second output terminal T02 via LCMFN-2. A second output signal generated by the CMN cell-2, which may be a voltage signal equal to Z2 Te2, is then coupled, via a resistor 7, to the low impedance terminal TL3 of the third CMN in CMN Cell-3. In this example, there is a GCMFN connected between the third output terminal T03 and the second high impedance terminal TH2 of the second CMN.

[0068] Then, the CMN Cell-3 compares the first output signal and the second output signal to obtain an error current Ie3 and then amplifies the error current Ie3 over trans-impedance Z3 of the CMN Cell-3 to obtain the third output signal Vsens out at the third output terminal T03. The overall gain of the current sensor in this example may be expressed as ~~r + 1 _> where Req is the equivalent resistance of LCMFN-3 network.

[0069] In this example, only one GCMFN is used between the third output terminal and the high impedance terminal TH2 of the second CMN. However, depending on requirements for stability and noise suppression performance, another GCMFN may be used between the third output terminal T03 and the high impedance terminal TH1 of the first CMN.

[0070] Although in this implementation, the first and second DC offset adjusting circuits are implemented in the same form, and the LCMFN-1, LCMFN-2 and LCMFN-3 are also implemented in the same form, a person skilled in the art shall understand that they may be implemented in different forms as long as the desired functions can be realized. The present invention is not limited to any particular implementation for any specific circuit.

[0071] Fig. 8 illustrates another example implementation at transistor level for the current sensor as illustrated in Fig. 3. As mentioned above, unless defined otherwise, all circuit symbols used in the accompanying figures have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. Therefore, for the purpose of brevity, meanings of the circuit symbols used in this figure will not be defined one by one.

[0072] In this example, circuits in each of the first, second and third CMNs may be divided into three stages: an input current mirror stage, a current mode amplification stage and an output power push-pull buffer stage as illustrated. The three stages comprised in a respective CMN are differentiated with a postfix 1, 2, and 3 following the corresponding stage name. All circuits in this example are implemented with NPN and PNP bipolar junction transistors (BJTs), although they may be implemented with other technologies, such as complementary metal oxide semiconductor (CMOS). With this implementation, the current sensor may easily be integrated into a semiconductor chip. Particular circuit connections at each functional stage are well known in the art. For the purpose of brevity, detailed descriptions for each stage will be omitted herein.

[0073] Compared to the existing current sensing solution, the current sensing solution according to embodiments of the present invention may offer the following advantages: (1) no need for splitting and combining low and high frequency components of a input signal, resulting in that the overall frequency response of the output sensed signal exhibits a flat gain over a wide range of frequencies; (2) removal of some large and bulky devices, such as transformers, resulting in saving of the area on a printed circuit board (PCB) and a possibility of being integrated into a semiconductor chip, and thereby saving a manufacture cost; (3) substitution voltage mode processing with current mode processing, resulting in much wider bandwidth to meet performance requirements of higher generation communications systems, such as LTE/ LTE-A systems.

[0074] Fig. 9(a) illustrates an envelope tracking supply modulator 90 employing the current sensor as illustrated in Fig. 3 according to an embodiment of the present invention. As illustrated, the illustrated envelope tracking supply modulator 90 comprises a reference bias voltage generator and shifter circuit 91, an amplifier circuit 92, a current sensor circuit 93 and a switching control circuit 94.

[0075] The reference bias voltage generator and shifter circuit 91 may receive an envelope input signal ENV_IN, which may be a baseband envelope signal corresponding to a RF input signal to be amplified by a RF power amplifier 95. Then based on the received input signal ENV_IN, the reference bias voltage generator and shifter circuit 91 may be operative to generate a reference bias voltage, for example according to working conditions or performance requirements of the envelope tracking supply modulator 90. All following circuits in this envelope tracking supply modulator, i.e. the amplifier circuit 92, the current sensor circuit 93, and the switching control circuit 94 may be biased by the generated reference bias voltage. By this way, the sensing sensibility for near DC components may be improved. The reference bias voltage generator and shifter circuit 91 is further operative to shift the input signal based on the generated reference bias voltage. In one embodiment, the reference bias voltage may be generated as a mean value of the peak values of the input signal, and the input signal may be shifted by this mean value. Fig. 9(b) illustrates an existing configuration of the reference bias voltage generator and shifter circuit in the prior art. It shall be understood that other configurations for the reference bias voltage generator and shifter circuit may also be applied to the envelope tracking supply modulator.

[0076] The shifted input signal is then coupled to the amplifier circuit 92. The amplifier circuit 92 may be an operational amplifier for example, which is operative to amply the shifted input signal. Usually, the amplifier circuit 92 may comprise a buffer amplifier circuit 921, which is operative to buffer the shifted input signal so as to drive the following stage circuit; and a linear amplifier circuit 922, which is operative to amplify the buffered input signal. The linear amplifier circuit 922 is usually a wideband amplifier. Either of the buffer amplifier circuit 921 and the linear amplifier circuit 922 may be implemented with an operational amplifier with a proper configuration according requirements. These circuits are well known in the prior art and will not be detailed herein for the purpose of brevity.

[0077] The amplified signal is then coupled to the current sensor circuit 93, particularly to a first sensing terminal of a current sensing element 931. As already discussed above, the current sensor circuit 93 may provide a switching output signal proportional to the envelope input signal (corresponding to the third output signal as described with respect to Fig. 3). The signal at a second sensing terminal of the current sensing element 931 is provided to the RF power amplifier 96 as a supply output signal. Details regarding the current sensor circuit 93 have been described with reference to Figs. 3-8, and will not be repeated herein for the purpose of brevity.

[0078] The switching output signal is then coupled to the switching control circuit 94, which is operative to provide a switching control signal responsive to the switching output signal from the current sensor circuit 93. The switching control circuit 94 may comprise: a hysteretic comparator circuit 941 that may be operative to provide a hysteretic switching signal responsive to the switching output signal; and a hysteretic switcher circuit 942 that may be operative to provide the switching control signal responsive to the hysteretic switching signal. For example, the hysteretic comparator circuit 941 may be an operational amplifier circuitry. The hysteretic switcher 942 may be a CMOS or BJT transistor and usually comprises a filter for filtering out ripples on the switching control signal. The switching control signal is finally coupled to the supply output signal at the second sensing terminal of the current sensing element for supplying power to the RF power amplifier 96. [0079] In one embodiment, the envelope tracking supply modulator 90 may further comprise a feedback network 95 connected between the output and the input of the amplifier circuit 92 to further improve the bandwidth performance.

[0080] Although the above descriptions of the current sensor with reference to Fig. 3-9 are related to applications in a supply modulator, the current sensor according to embodiments of the present invention may be extensively used for other applications, for example power management and linearization applications, such as load-current sensing circuits and output sensing of a feed forward loop for counteract distortions.

[0081] The envelope tracking supply modulator 90 according to embodiments of the present invention may be used in a base station, which may be termed as NodeB or evolved NodeB (eNodeB), Base Transceiver Station BTS or access point, depending on the technology and terminology used, or any other suitable radio communication intermediary devices, such as a radio relay node or radio router. The envelope tracking supply modulator 90 according to embodiments of the present invention may also be used in a terminal device, including but not limited to mobile phone, smart phone, tablet computer, laptop, portable computer, sensor device, meter, vehicle, household appliance, medical appliance, media player, camera, or any type of consumer electronic having a capability of wireless communications.

[0082] Fig. 10 illustrates an example circuitry that employs the envelope tracking supply modulator 90 to supply power for a RF power amplifier. In this example circuitry, the reference bias voltage generator and shifter circuit 91, most of the amplifier circuit 91, and the current sensor circuit 93 except for the sensing element 931 are integrated as a single chip 110. As illustrated, block 120 may be regarded as a part of the amplifier circuit 91; CSI+ and CSI- represent the current signal sensed at the first and second sensing terminals of the current sensing element 130; and CSO represents the switching output signal from the current sensor circuit. The CSO signal is coupled to a hysteretic comparator 140. The output from the hysteretic comparator 140 may be input to a MOSFET driver 141 to improve the driving capability. A transistor 151 and a diode 152 function as the hysteretic switcher circuit to generate the switching control signal. An inductor 160 functions as the filter for filtering out ripples on the switching control signal. Then the filtered switching control is coupled to the supply input of the RF power supply.

[0083] Fig. 11 illustrates a flowchart of a method 1000 for current sensing according to an embodiment of the present invention. As illustrated, in block 1100, the method obtains a first signal sensed at a first sensing terminal of a current sensing element. The first sensed signal may be a current signal. Then in block 1200, the method generates a first output signal according to the first sensed signal and a negative feedback of the first output signal. Further, in block 1300, the method obtains a second signal sensed at a second sensing terminal of the current sensing element. The second sensed signal may be a current signal. Then in block 1400, the method generates a second output signal according to the second sensed signal and a negative feedback of the second output signal. Subsequently in block 1500, the method generates a third output signal based on a combination of the first output signal and the second output signal and according to a negative feedback of the third output signal.

[0084] In one embodiment, the operations in blocks 1200 and 1400 may further comprise comparing the corresponding sensed signal and the corresponding negative feedback to obtain an error current and to amplify the error current via a trans-impedance to generate a corresponding one of the first and second output signal.

[0085] In one embodiment, the operation in block 1500 may further comprise comparing the first output signal and the second output signal to obtain an error current and amplifying the error current via a trans-impedance to generate the third output signal.

[0086] In one embodiment, the method 1000 may further comprise adjusting a DC offset for the first sensed signal before generating the first output signal in block 1200; and adjusting the DC offset for the second sensed signal before generating the second output signal in block 1400.

[0087] Although the method 1000 is described in the illustrated certain order, a person skilled in the art shall understand that the method 1000 is not necessarily to be performed in the illustrated order. Operations in some blocks may be performed in parallel or reversely. For example, Fig. 12 illustrates the method 1000 for current sensing in a different order, in which the operations in blocks 1100 and 1200 are performed in parallel with the operations in blocks 1300 and 1400. The method 1000 is not limited to any specific order.

[0088] According to an embodiment of the present invention, an apparatus for current sensing is provided. The apparatus for current sensing may comprise means for obtaining a first signal sensed at a first sensing terminal of a current sensing element, which may be a resistor, diode or transistor circuit, and means for generating a first output signal according to the first sensed signal and a negative feedback of the first output signal. The apparatus may also comprise means for obtaining a second signal sensed at a second sensing terminal of the current sensing element and means for generating a second output signal according to the second sensed signal and a negative feedback of the second output signal. The apparatus may further comprise means for generating a third output signal based on a combination of the first output signal and the second output signal and according to a negative feedback of the third output signal.

[0089] In one embodiment, the means for generating the first output signal or the means for generating the second output signal may respectively comprise means for comparing the corresponding sensed signal and the corresponding negative feedback to obtain an error current and to amplify the error current via a trans-impedance to generate a corresponding one of the first and second output signal. The means for generating the third output signal may further comprise means for comparing the first output signal and the second output signal to obtain an error current and to amplify the error current via a trans-impedance to generate the third output signal.

[0090] In one embodiment, the apparatus for current sensing may further comprise means for adjusting a DC offset for the first sensed signal before generating the first output signal and means for adjusting the DC offset for the second sensed signal before generating the second output signal.

[0091] While this specification contains many specific implementation details, these should not be construed as limitations on the scope of any implementation or of what may be claimed, but rather as descriptions of features that may be specific to particular embodiments of particular implementations. Certain features that are described in this specification in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of a single embodiment can also be implemented in multiple embodiments separately or in any suitable sub-combination. Moreover, although features may be described above as acting in certain combinations and even initially claimed as such, one or more features from a claimed combination can in some cases be excised from the combination, and the claimed combination may be directed to a sub-combination or variation of a sub-combination.

[0092] It should also be noted that the above described embodiments are given for describing rather than limiting the invention, and it is to be understood that modifications and variations may be resorted to without departing from the spirit and scope of the invention as those skilled in the art readily understand. Such modifications and variations are considered to be within the scope of the invention and the appended claims. The protection scope of the invention is defined by the accompanying claims. In addition, any of the reference numerals in the claims should not be interpreted as a limitation to the claims. Use of the verb "comprise", "have" and their conjugations does not exclude the presence of elements or steps other than those stated in a claim.

Claims

WHAT IS CLAIMED IS:

1. A current sensor (30), comprising:

a current sensing element (31) having a first sensing terminal and a second sensing terminal;

a first current mirror network CMN cell, comprising:

a first CMN (321) that has a first high impedance terminal, a first low impedance terminal and a first output terminal, and

a first local current mode feedback network LCMFN (322) connected between the first output terminal and the first low impedance terminal,

wherein the first CMN cell is DC-coupled to the first sensing terminal of the current sensing element via the first high impedance terminal and operative to generate a first output signal according to the current sensed at the first sensing terminal;

a second CMN cell, comprising:

a second CMN (331) that has a second high impedance terminal, a second low impedance terminal and a second output terminal, and

a second LCMFN (332) connected between the second output terminal and the second low impedance terminal,

wherein the second CMN cell is DC-coupled to the second sensing terminal of the current sensing element via the second high impedance terminal and operative to generate a second output signal according to the current sensed at the second sensing terminal; a third CMN cell, comprising:

a third CMN (341) that has a third high impedance terminal, a third low impedance terminal and a third output terminal, and

a third LCMFN (342) connected between the third output terminal and the third low impedance terminal,

wherein the third CMN cell receives the first output signal and the second output signal via the third high impedance terminal and the third low impedance terminal, respectively and is operative to generate a third output signal according to a combination of the first output signal and the second output signal.

2. The current sensor of claim 1, wherein the current sensing element (31) is a resistor.

3. The current sensor of Claim 1 or 2, wherein each of the first, second and third CMN cells is operative to compare the current at the corresponding high impedance terminal and the current at the corresponding low impedance terminal to obtain an error current and to amplify the error current via a trans-impedance of the corresponding CMN cell to generate a corresponding one of the first, second and third output signals that is a voltage signal.

4. The current sensor of any of Claims 1-3, further comprising:

at least one global current mode feedback network (323, 333) coupled between the third output terminal of the third CMN and at least one of the first high impedance terminal and the second high impedance terminal.

5. The current sensor of any of Claims 1-4, further comprising:

a first DC offset adjusting circuit (324) coupled between the first sensing terminal of the sensing element and the first high impedance terminal of the first CMN; and

a second DC offset adjusting circuit (334) coupled between the second sensing terminal of the sensing element and the second high impedance terminal of the second CMN.

6. The current sensor of Claim 5, wherein,

at least one of the first and second DC offset adjusting circuits (324, 334) comprises a series of voltage dividing circuits.

7. The current sensor of any of Claims 1-6, wherein the third LCMFN has low pass filter characteristics.

8. An envelope tracking supply modulator, comprising:

a reference bias voltage generator and shifter (91) operative to generate a reference bias voltage based on an input signal and to shift the input signal based on the generated reference bias voltage;

an amplifier circuit (92) operative to amply the shifted input signal;

a current sensor circuit (93) operative to provide a supply output signal and a switching output signal proportional to the envelope of the input signal;

a switching control circuit (94) operative to provide a switching control signal responsive to the switching output signal; wherein

the amplifier circuit (92), the current sensor circuit (93), and the switching control circuit (94) are biased by the generated reference bias voltage; and the switching control signal is coupled to the supply output signal of the current sensor circuit.

9. The envelope tracking supply modulator of Claim 8, wherein the amplifier circuit (92) further comprises:

a buffer amplifier circuit (921) and a linear amplifier circuit (922), wherein the buffer amplifier circuit (921) is operative to buffer the shifted input signal so as to drive the linear amplifier circuit; and

the linear amplifier circuit (922) is operative to amplify the buffered input signal.

10. The envelope tracking supply modulator of Claim 8 or 9, wherein the switching control circuit (94) further comprises:

a hysteretic comparator circuit (941) operative to provide a hysteretic switching signal responsive to the switching output signal; and

a hysteretic switcher circuit (942) operative to generate the switching control signal responsive to the hysteretic switching signal.

11. The envelope tracking supply modulator of any of Claims 8-10, wherein the current sensor circuit (93) comprises:

a current sensing element (931) having a first sensing terminal and a second sensing terminal, wherein the supply output signal is present at the second sensing terminal;

a first current mirror network cell, comprising:

a first current mirror network CMN (321) that has a first high impedance terminal, a first low impedance terminal and a first output terminal, and

a second CMN cell, comprising:

a second LCMFN (332) connected between the second output terminal and the second low impedance terminal, wherein the second CMN cell is DC-coupled to the second sensing terminal of the current sensing element via the second high impedance terminal and operative to generate a second output signal according to the current sensed at the second sensing terminal; a third CMN cell, comprising:

wherein the third CMN cell receives the first output signal and the second output signal via the third high impedance terminal and the third low impedance terminal, respectively and is operative to generate the switching output signal according to a combination of the first output signal and the second output signal.

12. The envelope tracking supply modulator of claim 11, wherein the current sensing element (931) is a resistor.

13. The envelope tracking supply modulator of Claim 11 or 12, wherein each of the first, second and third CMN cells is operative to compare the current at the corresponding high impedance terminal and the current at the corresponding low impedance terminal to obtain an error current and to amplify the error current via a trans-impedance of the corresponding CMN cell to generate a corresponding one of the first, second and third output signals.

14. The envelope tracking supply modulator of any of Claims 11-13, wherein the current sensor circuit further comprises:

at least one global current mode feedback network coupled between the third output terminal of the third CMN and at least one of the first high impedance terminal and the second high impedance terminal.

15. The envelope tracking supply modulator of any of Claims 11-14, wherein the current sensor circuit further comprises:

a first DC offset adjusting circuit coupled between the first sensing terminal of the sensing element and the first high impedance terminal of the first CMN; and

a second DC offset adjusting circuit coupled between the second sensing terminal of the sensing element and the second high impedance terminal of the second CMN.

16. The envelope tracking supply modulator Claim 15, wherein, at least one of the first and second DC offset adjusting circuits comprises a series of voltage dividing circuits.

17. The envelope tracking supply modulator of any of Claims 11-16, wherein the third LCMFN has low pass filter characteristics.

18. A power amplifier whose supply voltage is modulated by the envelope tracking supply modulator according to any of Claims 8-17.

19. An apparatus comprising the power amplifier according to Claim 18.

20. A method for current sensing, comprising:

obtaining a first signal sensed at a first sensing terminal of a current sensing element;

generating a first output signal according to the first sensed signal and a negative feedback of the first output signal;

obtaining a second signal sensed at a second sensing terminal of the current sensing element;

generating a second output signal according to the second sensed signal and a negative feedback of the second output signal; and

generating a third output signal based on a combination of the first output signal and the second output signal and according to a negative feedback of the third output signal.

21. The method of Claim 20, wherein the current sensing element is a resistor.

22. The method of Claim 20 or 21, wherein each of the first and second sensed signals is a current signal.

23. The method of any of Claims 20-22, wherein:

generating the first or second output signal comprises comparing the corresponding sensed signal and the corresponding negative feedback to obtain an error current and to amplify the error current via a trans-impedance to generate a corresponding one of the first and second output signal; and

generating the third output signal comprises comparing the first output signal and the second output signal to obtain an error current and to amplify the error current via a trans-impedance to generate the third output signal.

24. The method of any of Claims 20-23, further comprising:

adjusting a DC offset for the first sensed signal before generating the first output signal; and

adjusting the DC offset for the second sensed signal before generating the second output signal.

25. The method of Claim 24, wherein:

the adjusting of the DC offset is implemented by a series of voltage dividing circuits.

26. An apparatus for current sensing, comprising:

means for obtaining a first signal sensed at a first sensing terminal of a current sensing element;

means for generating a first output signal according to the first sensed signal and a negative feedback of the first output signal;

means for obtaining a second signal sensed at a second sensing terminal of the current sensing element;

means for generating a second output signal according to the second sensed signal and a negative feedback of the second output signal; and

means for generating a third output signal based on a combination of the first output signal and the second output signal and according to a negative feedback of the third output signal.

27. The apparatus of Claim 26, wherein the current sensing element is a resistor.

28. The apparatus of Claim 26 or 27, wherein each of the first and second sensed signals is a current signal.

29. The apparatus of any of Claims 26-28, wherein:

means for generating the first or second output signal further comprises means for comparing the corresponding sensed signal and the corresponding negative feedback to obtain an error current and to amplify the error current via a trans-impedance to generate a corresponding one of the first and second output signal; and

means for generating the third output signal further comprises means for comparing the first output signal and the second output signal to obtain an error current and to amplify the error current via a trans-impedance to generate the third output signal.

30. The apparatus of any of Claims 26-29, further comprising: means for adjusting a DC offset for the first sensed signal before generating the first output signal; and

means for adjusting the DC offset for the second sensed signal before generating the second output signal.