WO2015064127A1 - 送信装置、受信装置および通信システム - Google Patents
送信装置、受信装置および通信システム Download PDFInfo
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- WO2015064127A1 WO2015064127A1 PCT/JP2014/062019 JP2014062019W WO2015064127A1 WO 2015064127 A1 WO2015064127 A1 WO 2015064127A1 JP 2014062019 W JP2014062019 W JP 2014062019W WO 2015064127 A1 WO2015064127 A1 WO 2015064127A1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/26—Systems using multi-frequency codes
- H04L27/2601—Multicarrier modulation systems
- H04L27/2626—Arrangements specific to the transmitter only
- H04L27/26265—Arrangements for sidelobes suppression specially adapted to multicarrier systems, e.g. spectral precoding
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W16/00—Network planning, e.g. coverage or traffic planning tools; Network deployment, e.g. resource partitioning or cells structures
- H04W16/14—Spectrum sharing arrangements between different networks
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J11/00—Orthogonal multiplex systems, e.g. using WALSH codes
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/26—Systems using multi-frequency codes
- H04L27/2601—Multicarrier modulation systems
- H04L27/2626—Arrangements specific to the transmitter only
- H04L27/2627—Modulators
- H04L27/2634—Inverse fast Fourier transform [IFFT] or inverse discrete Fourier transform [IDFT] modulators in combination with other circuits for modulation
- H04L27/2636—Inverse fast Fourier transform [IFFT] or inverse discrete Fourier transform [IDFT] modulators in combination with other circuits for modulation with FFT or DFT modulators, e.g. standard single-carrier frequency-division multiple access [SC-FDMA] transmitter or DFT spread orthogonal frequency division multiplexing [DFT-SOFDM]
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L27/00—Modulated-carrier systems
- H04L27/26—Systems using multi-frequency codes
- H04L27/2601—Multicarrier modulation systems
- H04L27/2626—Arrangements specific to the transmitter only
- H04L27/2627—Modulators
- H04L27/2644—Modulators with oversampling
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W72/00—Local resource management
- H04W72/50—Allocation or scheduling criteria for wireless resources
- H04W72/54—Allocation or scheduling criteria for wireless resources based on quality criteria
- H04W72/541—Allocation or scheduling criteria for wireless resources based on quality criteria using the level of interference
Definitions
- the present invention relates to a transmission device, a reception device, and a communication system.
- transmission path frequency selectivity and time variation occur due to multipath fading caused by reflection of a transmission signal on a building or the like, and Doppler fluctuation caused by movement of a terminal.
- the received signal is a signal that interferes with a transmitted symbol and a symbol that arrives after a delay time.
- a single carrier block transmission method has recently attracted attention in order to obtain the best reception characteristics (for example, see Non-Patent Document 1 below).
- the single carrier (SC) block transmission system has a lower peak power than the OFDM (Orthogonal Frequency Division Multiplexing) transmission system (for example, see Non-Patent Document 2 below), which is a multiple carrier (MC) block transmission. can do.
- OFDM Orthogonal Frequency Division Multiplexing
- a transmitter that performs SC block transmission for example, the following transmission is performed to take measures against multifading.
- PSK Phase Shift Keying
- QAM Quadrature Amplitude Modulation
- the digital modulation signal is converted into a time domain signal by the precoder and IDFT (Inverse Discrete Fourier Transform) processing unit. Convert.
- IDFT Inverse Discrete Fourier Transform
- a CP is inserted in a CP (Cyclic Prefix) insertion unit.
- the CP insertion unit copies a predetermined number of samples after the time domain signal and adds them to the beginning of the transmission signal.
- ZP Zero Padding
- a transmitter that performs SC transmission generally performs DFT (Discrete Fourier Transform) processing in a precoder.
- DFT Discrete Fourier Transform
- the transmission peak power is suppressed while reducing the influence of multipath fading.
- the phase and amplitude between the SC blocks are discontinuous, and therefore, an out-of-band spectrum or out-of-band leakage occurs.
- the out-of-band spectrum becomes interference of adjacent channels. For this reason, out-of-band spectrum suppression is required.
- a spectrum mask is defined in a general communication system, and it is necessary to suppress the out-of-band spectrum so as to satisfy the mask.
- the present invention has been made in view of the above, and an object thereof is to obtain a transmission device, a reception device, and a communication system that can suppress out-of-band spectrum.
- the present invention is a transmission apparatus that transmits a block signal including a plurality of data symbols, and generates data symbols for one block for each block.
- a storage unit for storing a data symbol at a first position among the data symbols for one block generated by the data symbol generation unit as a duplicate symbol, and for one block generated by the data symbol generation unit A symbol that generates a block symbol by arranging the data symbol and the duplicate symbol so that the duplicate symbol of the previous block stored in the storage unit is inserted at the second position of the data symbol
- An insertion unit a time-frequency conversion unit that converts the block symbol into a frequency domain signal; and
- An interpolation processing section performing interpolation processing on the frequency domain signal, characterized in that it comprises a CP insertion unit for generating said block signal by insertion of Cyclic Prefix to the signal after the interpolation processing.
- FIG. 1 is a diagram illustrating a functional configuration example of the transmission apparatus according to the first embodiment.
- FIG. 2 is a diagram illustrating an example of CP insertion.
- FIG. 3 is a diagram showing an example in which the phase and amplitude between SC blocks are discontinuous in conventional SC block transmission.
- FIG. 4 is a diagram illustrating a configuration example of the time / frequency conversion unit and the interpolation processing unit according to the first embodiment.
- FIG. 5 is a diagram illustrating an example of guard band processing according to the first embodiment.
- FIG. 6 is a diagram illustrating a processing example of the symbol insertion unit, the storage and processing unit, the symbol selection unit, and the DFT unit.
- FIG. 7 is a diagram illustrating an example of a configuration of a block signal according to the first embodiment.
- FIG. 1 is a diagram illustrating a functional configuration example of the transmission apparatus according to the first embodiment.
- FIG. 2 is a diagram illustrating an example of CP insertion.
- FIG. 3 is a
- FIG. 8 is a diagram illustrating an example of data processing according to the first embodiment.
- FIG. 9 is a diagram illustrating an example in which different modulation symbols are mixed.
- FIG. 10 is a diagram illustrating a functional configuration example of the receiving apparatus according to the second embodiment.
- FIG. 11 is a diagram illustrating a functional configuration example of the transmission apparatus according to the third embodiment.
- FIG. 12 is a diagram illustrating an arrangement example of data symbols and pilot signals according to the third embodiment.
- FIG. 13 is a diagram illustrating a configuration example of a signal according to the third embodiment.
- FIG. 14 is a diagram illustrating a configuration example of a signal according to the third embodiment when a guard band is included.
- FIG. 15 is a diagram illustrating a functional configuration example of the receiving apparatus according to the fourth embodiment.
- FIG. 10 is a diagram illustrating a functional configuration example of the receiving apparatus according to the second embodiment.
- FIG. 11 is a diagram illustrating a functional configuration example of the transmission apparatus according to the third embodiment
- FIG. 16 is a diagram illustrating a processing example of the transmission device according to the fifth embodiment.
- FIG. 18 is a diagram illustrating a specific example using the QPSK symbol according to the fifth embodiment.
- FIG. 19 is a diagram illustrating a data configuration example of the i-th block according to the fifth embodiment.
- FIG. 20 is a diagram illustrating a data configuration example of block signals for three blocks according to the fifth embodiment.
- FIG. 21 is a diagram illustrating a processing example of the transmission apparatus according to the sixth embodiment.
- FIG. 22 is a diagram illustrating a processing example of the transmission device according to the seventh embodiment.
- FIG. 23 is a diagram showing a 64QAM constellation.
- FIG. 25 is a diagram illustrating a configuration example of a transmission apparatus according to the tenth embodiment.
- FIG. 26 is a diagram illustrating an example in which past symbols d 0 (k ⁇ 1) are inserted into the 0th symbol in succession for one block.
- FIG. 27 is a diagram illustrating an example in which past symbols d 0 (k ⁇ 1) are inserted into the 0th symbol in succession for two blocks.
- FIG. 28 is a flowchart illustrating an operation example of the insertion unit according to the tenth embodiment.
- FIG. 29 is a diagram illustrating a configuration example of the transmission apparatus according to the eleventh embodiment.
- FIG. 30 is a diagram illustrating an example in which the first group and the second group are copied every other block.
- FIG. 31 is a diagram illustrating an example in which the first group and the second group are copied in two consecutive blocks.
- FIG. 32 is a flowchart illustrating an operation example of the insertion unit according to the eleventh embodiment.
- FIG. 33 is a diagram illustrating a configuration example and a processing example of the transmission apparatus according to the twelfth embodiment.
- FIG. 34 is a diagram illustrating a configuration example of the symbol selection unit 4a according to the twelfth embodiment.
- FIG. 35 is a diagram illustrating a configuration example of the power adjustment unit when all QPSK is used.
- FIG. 1 is a diagram illustrating a functional configuration example of a first embodiment of a transmission device according to the present invention.
- the transmission apparatus includes a symbol generation unit 1 (data symbol generation unit), a symbol insertion unit 2, a storage and processing unit 3 (storage unit), a symbol selection unit 4, a time / frequency.
- a conversion unit 5 a waveform shaping filter unit (waveform shaping unit) 6, a guard band insertion unit 7, an interpolation processing unit 8, and a CP insertion unit 9 are provided.
- storage and processing unit 3 is abbreviated as storage / processing unit 3.
- the symbol generator 1 generates data symbols (for example, PSK (Phase Shift Keying) symbols, QAM (Quadrature Amplitude Modulation) symbols, etc.).
- the symbol generation unit 1 inputs the generated data symbol to the symbol insertion unit 2.
- the symbol insertion unit 2 receives one or more symbols stored in the storage and processing unit 3 with respect to the input data symbols, and includes symbol insertion position information that is information indicating a symbol insertion position (second position). Insert at the position specified by. Input to the symbol insertion unit 2 is symbol insertion position information and storage and output from the processing unit 3.
- the symbol selection unit 4 inputs the symbol group after the symbol is inserted by the symbol insertion unit 2 to the time / frequency conversion unit 5 and selects one or more symbols (replicated symbols) from the symbol group, The selected symbol is copied and sent to the storage and processing unit 3.
- the symbol position (first position) selected by the symbol selector 4 is specified by the symbol selection position information.
- the storage and processing unit 3 stores the symbol input from the symbol selection unit 4.
- the storage and processing unit 3 outputs the symbols (replicated symbols) stored in the storage and processing unit 3 to the symbol insertion unit 2 when processing the next block.
- the symbol insertion unit 2 may read the symbols stored in the storage and processing unit 3 when processing the next block.
- the time / frequency converter 5 converts the time domain signal (symbol group) output from the symbol selector 4 into a frequency domain signal.
- the waveform shaping filter unit 6 performs a desired filtering process on the frequency domain signal.
- the guard band insertion unit 7 performs a guard band insertion process on the frequency domain signal after the filtering process. Generally, a guard band is inserted in the frequency domain in order to prevent signal quality deterioration due to interference from adjacent signals.
- the interpolation processing unit 8 performs an interpolation process on the frequency domain signal after the guard band insertion process, and converts the frequency domain signal after the interpolation process into a time domain signal.
- the CP insertion unit 9 inserts a CP into the time domain signal output from the interpolation processing unit 8.
- the CP insertion unit 9 copies the last MCP sample in the block and arranges it at the head of the block.
- the signal after CP insertion is transmitted as an SC block signal (block signal).
- the interpolation processing unit 8 is an interpolation in which a point interpolated so as to interpolate between the last symbol in the block and the first symbol in the block is set as the last sample of the block in the time domain signal after the interpolation processing. Any interpolation processing method may be used as long as it is a processing method.
- the interpolation process is such that the last sample after the interpolation process (the point added by the interpolation) becomes a point that smoothly leads to the value of the first sample in the block. I just need it.
- FIG. 3 is a diagram showing an example in which the phase and amplitude between SC blocks are discontinuous in conventional SC block transmission.
- an out-of-band spectrum or out-of-band leakage occurs due to a phase discontinuity between the kth (k is an integer) th block and the (k + 1) th block.
- Such an out-of-band spectrum becomes interference of adjacent channels.
- the out-of-band spectrum is reduced by inserting a symbol at a predetermined position in the previous block between data symbols.
- FIG. 4 is a diagram illustrating a configuration example of the time / frequency conversion unit 5 and the interpolation processing unit 8 according to the present embodiment.
- FIG. 4 shows an example in which the interpolation processing unit 8 is configured by an oversampling processing unit 81 and an IDFT unit 82.
- the time / frequency conversion unit 5 becomes the DFT unit 5.
- the symbol generation unit 1, the symbol insertion unit 2, the storage and processing unit 3, the symbol selection unit 4, the guard band insertion unit 7 and the CP insertion unit 9 are the same as the configuration example of FIG. The operation of this embodiment will be described based on the configuration example of FIG.
- the number of symbols selected by the symbol selection unit 4 is 1, and the number of symbols inserted by the symbol insertion unit 2 is 1.
- the number of symbols after symbols are inserted by the symbol insertion unit 2 is N
- the symbol selection position of the symbol selection unit 4 is n (0 ⁇ n ⁇ N ⁇ 1) (that is, the symbol selection unit 4 Selects the nth symbol of the input symbol group).
- the generated i th symbol is d i (k) .
- the symbol insertion unit 2 sets the symbol insertion position to m (0 ⁇ m ⁇ N ⁇ 1) (that is, when a symbol is inserted between the (m ⁇ 1) th data symbol and the mth data symbol). To do).
- d m (k-1) is copied by the symbol selection unit 4 and stored and processed 3 Is stored.
- the output of the symbol insertion unit 2 is as shown in the following equation (1).
- the storage and processing unit 3 may add a phase rotation to the stored symbol and output it to the symbol insertion unit 2 as shown in the following equation (2).
- ⁇ is an amplitude adjustment value
- f is a phase rotation amount. The amount of phase rotation varies depending on the zero insertion method.
- the DFT processing is performed on the time domain signal output from the symbol selection unit 4, and the output signal becomes a frequency domain signal as shown in the following equation (3).
- a frequency domain signal represented as a vector as in Expression (3) is referred to as a frequency domain signal vector.
- the waveform shaping filter unit 6 performs a filtering process for removing signals other than the desired frequency domain on the frequency domain signal vector s (bold) (k) .
- the guard band insertion unit 7 performs a guard band insertion process on the frequency domain signal after the filtering process.
- FIG. 5 is a diagram illustrating an example of guard band processing according to the present embodiment.
- the guard band insertion unit 7 inserts zeros on both sides of the signal in the frequency domain as guard band insertion processing. Let N ALL be the total number of samples (points) after zero is inserted.
- the waveform shaping filter unit 6 is not shown for the sake of simplicity.
- the oversampling processing unit 81 performs an oversampling process on the frequency domain signal after the guard band insertion process, for example, by zero insertion. Specifically, for example, using the signal interpolation formula described in “B. Porat,“ A Course in Digital Signal Processing ”, John Wiley and Sons Inc., 1997” (hereinafter referred to as Porat literature), etc.
- Oversampling processing (generally increasing the sampling rate, that is, reducing the sampling interval) is performed, and oversampling is performed on the input signal so that there are L sampling points per symbol. That is, oversampling is performed so that the sampling rate is L times the input.
- the oversampling rate is a value indicating how many times the sampling rate after oversampling is higher than the input sampling rate.
- the IDFT unit 82 converts the frequency domain signal after the oversampling process into a time domain signal by the IDFT process. Interpolated sample points are added between symbols by IDFT processing. Due to the cyclic nature of the IDFT output described in the above Porat document, the interpolation point added after the last symbol is a point that interpolates between the last symbol and the first (first) symbol.
- the phase at a predetermined position of the signal after IDFT processing may be made to approach a desired value. Specifically, in each block, the number of samples to be copied at the time of CP insertion (M CP in FIG. 2) so that the top of the area to be copied at the time of CP insertion and the phase of the last sample point of the previous block are continuous. ) Will be decided.
- a desired value for example, positive integers ⁇ and ⁇ satisfying the following expression (4) are set.
- ⁇ and ⁇ satisfying the following expression (4) are set.
- a is a parameter for determining the CP length.
- the CP length is determined by the delay time due to multipath existing in the transmission path. That is, when setting the value of a, the CP length M CP is set to (N ALL ⁇ a ⁇ ) L, and (N ALL ⁇ a ⁇ ) L is set to be longer than the maximum delay time in the transmission path.
- the phase of the a ⁇ -th sample of the IDFT unit 82 is a ⁇ (0 ⁇ 0) of the input of the DFT unit 5 to which phase rotation is added. It approaches the phase of the (a ⁇ ⁇ N ⁇ 1) th sample (symbol) (the sample corresponds to the a ⁇ th sample). Therefore, when the symbol insertion unit 2 arranges d n (k ⁇ 1) in the a ⁇ th, the phase of the a ⁇ th sample output from the IDFT unit 82 is the phase of d n (k ⁇ 1) to which the phase rotation is added. Get closer to.
- the output of the IDFT unit 82 is expressed by the following equation (6).
- the La ⁇ th phase of the output of the IDFT unit 82 approaches the a ⁇ th phase in the data symbol subjected to phase rotation. Therefore, when determining the symbol arrangement of the previous block, the first symbol of the block after CP insertion (that is, the first symbol at the location copied in CP insertion) is close to the phase of the last sample of the previous block. In order to achieve this, the first symbol of the previous block is arranged at the a ⁇ th position, and the CP length M CP is set to (N ALL ⁇ a ⁇ ) L.
- the a ⁇ -th symbol d n (k ⁇ 1) arranged in the k-th block is the n-th symbol in the k ⁇ 1-th block one block before the k-th block.
- parameter selection based on the following setting conditions may be performed.
- Design conditions 1: M CP (N ALL -a ⁇ ) L and setting design condition 2: the n 0, and the a ⁇ th symbol ⁇ ⁇ d 0 (k-1 )
- FIG. 6 is a diagram illustrating a processing example of the symbol insertion unit 2, the storage and processing unit 3, the symbol selection unit 4, and the DFT unit 5.
- FIG. 7 is a diagram illustrating an example of a configuration of a block signal according to the present embodiment.
- the phase between blocks is connected as follows. As shown in FIG. 6, the last sample of the (k ⁇ 1) th block in the time domain approaches the phase of d 0 (k ⁇ 1) due to the cyclic nature of the IDFT output explained in the above Porat document. Since the first symbol of the CP of the kth block is d 0 (k ⁇ 1) according to the above design condition 2, the phase of the k ⁇ 1st last sample and the first sample of the CP of the kth block Phase is connected.
- FIG. 8 is a diagram illustrating an example of data processing according to the present embodiment.
- “COPY” in FIG. 8 indicates a process of copying the last M CP sample of each block in the CP insertion unit 9 to the top.
- ⁇ 8 32.
- BPSK Binary Phase Shift Keying
- FIG. 8 shows that the sample (3) corresponding to the CP portion of the (K + 1) th block is set in phase with the first sample (1) of the Kth block. Since the sample at the end of the Kth block (the last sample after interpolation processing (the point added by interpolation)) is smoothly connected to the sample (1), the sample (1) Approach the phase. Since the top of the CP portion of the (K + 1) th block is the same as the phase (1) (the phase of the sample (3)), the phases between the Kth and K + 1th blocks are connected. Similarly, it can be seen that the sample (4) corresponding to the CP location of the (K + 2) th block is set in phase with the first sample (2) of the (K + 1) th block.
- Symbol selection position information (0th position) and symbol insertion position information (a ⁇ th position) can be determined by determining a, ⁇ , and ⁇ so as to satisfy the above setting conditions 1 and 2. .
- the symbol selection position information and the symbol insertion position information may be input from the outside, or may be set in advance in the transmission apparatus. Further, it may be changed after being set in advance.
- FIG. 9 is a diagram illustrating an example in which different modulation symbols are mixed.
- d n (k ⁇ 1) may be set to a symbol having a multilevel number equal to or higher than QPSK, such as 16QAM symbol or 64QAM.
- QPSK quadrature phase modulation number
- d 0 (k ⁇ 1) is 16QAM symbol
- l ⁇ 0, l ⁇ a ⁇ d l (k ⁇ 1) may be set to QPSK symbol.
- the following effects are obtained.
- d 0 (k ⁇ 1) is a QPSK symbol
- one symbol in the block is a copy of the symbol from the previous block, so the number of transmission symbol bits per block is 2 (N ⁇ 1) bits.
- the number of transmission symbol bits per block is 2N bits, which is the same as when N QPSK symbols are sent. Since d 0 (k) appears in the next block, the demodulation accuracy is higher than other symbols. For this reason, the multi-level modulation value of the symbol of d 0 (k ⁇ 1) can be set higher than other symbols, and the number of transmission bits can be increased.
- the data symbol at the predetermined selection position of the previous block is stored in the storage and processing unit 3, and the symbol insertion unit 2 stores the data symbol in the predetermined position of the generated data symbol.
- the data symbol held in the processing unit 3 is inserted at a predetermined insertion position. Then, the predetermined selection position and the predetermined insertion position are determined so that the phase of the first sample of the block is continuous with the phase of the last sample of the previous block. For this reason, an out-of-band spectrum can be suppressed.
- the guard band insertion process is performed, but the guard band insertion process may not be performed.
- FIG. FIG. 10 is a diagram illustrating a functional configuration example of the second embodiment of the receiving device according to the present invention.
- the receiving apparatus according to the present embodiment receives the SC block signal transmitted by the transmitting apparatus described in the first embodiment.
- the receiving apparatus of this embodiment includes a CP removal unit 13, a DFT unit 14, a transmission path estimation unit 15, a frequency domain equalization unit 16, an undersampling processing unit 17, an IDFT unit 18, and a symbol selection.
- Unit 19 storage and processing unit 20 (storage unit), demodulation unit 21, and decoding unit 22.
- the received signal is subjected to CP removal by the CP removal unit 13 and then input to the DFT processing unit 14.
- the DFT processing unit 14 converts the received signal into a frequency domain signal.
- the transmission path estimation unit 15 performs transmission path estimation based on the frequency domain signal, and inputs the transmission path estimation value to the frequency domain equalization unit 16.
- the frequency domain equalization unit 16 performs equalization processing using the frequency domain signal and the transmission path estimation value.
- the undersampling processing unit 17 performs undersampling processing (downsampling processing) on the equalized signal and extracts a frequency component containing information.
- the IDFT unit 18 converts the frequency component extracted by the undersampling processing unit 17 into a time domain signal.
- the symbol selection unit 19 selects the n-th symbol of the time domain signal output from the IDFT unit 18 and stores it in the storage and processing unit 20.
- the symbols stored in the storage and processing unit 20 are read out by the demodulation unit 21 when the next block is demodulated.
- the demodulator 21 demodulates N symbols.
- the time domain signal output from the IDFT unit 18 on the receiving side is represented by the following equation (8).
- demodulation can be performed according to the following equation (9), for example.
- D is a candidate for the value of the symbol d (hat) 0 (k) .
- D is a candidate for the value of the symbol d (hat) 0 (k) .
- demodulation of the 0th symbol of the previous block may be performed using v a ⁇ (k) using the method shown in the following equation (12).
- d 0 (k-1) is assumed to be a symbol having the same multi-valued number as d i (k-1) when i ⁇ 0, but as described in the first embodiment. Furthermore, d 0 (k ⁇ 1) may be a multi-valued symbol different from d i (k ⁇ 1) .
- the n-th symbol of the time domain signal output from IDFT unit 18 is stored in storage and processing unit 20, and demodulating unit 21 stores it at the time of demodulation of the next block.
- demodulation is performed using symbols stored in the processing unit 20. Therefore, when receiving a signal transmitted from the transmission apparatus according to the first embodiment, the transmitted data symbol can be demodulated, and the memory and processing unit 20 can be used when performing demodulation using the mth time domain signal. The demodulation accuracy can be improved by using the symbols stored in the.
- FIG. FIG. 11 is a figure which shows the function structural example of Embodiment 3 of the transmitter concerning this invention.
- a pilot signal generation unit 10 a waveform shaping filter unit 11, and an upper frequency domain arrangement unit (frequency domain arrangement unit) 12 are added to the transmission apparatus shown in FIG. 4 of the first embodiment.
- This is the same as the transmission apparatus shown in FIG. 4 of the first embodiment.
- Components having the same functions as those in the first embodiment are denoted by the same reference numerals as those in the first embodiment, and redundant description is omitted. A different part from Embodiment 1 is demonstrated.
- a pilot signal may be used for transmission path estimation and synchronization processing, and an arrangement of the pilot signal and DFT-processed data symbols is performed in the frequency domain.
- pilot signals are arranged in the frequency domain.
- Data symbol generation unit 1 generates data symbols in the same manner as data symbol generation unit 1 of the first embodiment. However, the number of data symbols generated per block is N ⁇ N T (N T is per block). Number of pilot symbols).
- the pilot signal generation unit 10 generates a time domain pilot signal (pilot signal (time domain signal)) and a frequency domain pilot signal (pilot signal (frequency domain signal)), and inserts the pilot signal (time domain signal) as a symbol.
- the pilot signal (frequency domain signal) is input to the waveform shaping filter unit 11.
- the waveform shaping filter unit 11 shapes the waveform of the input pilot signal (frequency domain signal) and inputs it to the frequency domain arrangement unit 12.
- the symbol insertion unit 2 inserts a symbol (symbol of the previous block) stored in the data symbol and stored in the processing unit 3. At this time, the symbol insertion unit 2 inserts into the pilot signal (time domain signal). Modify and insert the symbol to insert based on.
- the frequency domain upper arrangement unit 12 arranges the frequency domain data symbols output from the waveform shaping filter unit 6 and the pilot signal (frequency domain signal) output from the waveform shaping filter unit 11 in the frequency domain, and guard band Output to the insertion unit 7.
- FIG. 12 is a diagram illustrating an arrangement example of data symbols and pilot signals under the above conditions.
- s 0 , s 1 ,..., S N / 2-1 indicate data symbols in the frequency domain (output of the DFT unit 5), and p 0 , p 1 ,.
- the pilot signal is shown.
- data symbols and pilot signals are alternately arranged.
- FIG. 12 is an example, and the arrangement position and the number of pilot signals are not limited to the example of FIG.
- pilot symbols and data symbols are multiplexed in the frequency domain
- a ⁇ -th sample is set to d n (k ⁇ 1) in the time domain signal that is the output of IDFT section 82
- pilot symbols It is necessary to consider the time domain signal.
- the pilot signal time domain signal is q 0 , q 1 ,..., Q NALL-1
- a ⁇ (k ′) is the symbol insertion position in the time domain
- b and c are the time domain signal output from the IDFT unit 82.
- the values of b and c are complex numbers or real numbers, and are determined by the pilot insertion position in the frequency domain and the symbol arrangement position of the previous block.
- N T N / 2
- N D N / 2.
- N ALL N.
- a pilot symbol arranged in the frequency domain is represented by the following equation (14), and a DFT matrix is represented by the following equation (15).
- a (bold) H represents Hermitian Transpose of the matrix A (bold).
- the data signal after DFT processing (output of the waveform shaping filter unit 6) arranged in the frequency domain is expressed by the following formula (17)
- the time domain signal of the data signal is expressed by the following formula (18).
- t (bold) 1 is a vector of N D data symbols as shown in the following equation (19). Further, s (bold) is a vector shown in the following equation (20).
- the signal obtained by multiplexing the pilot signal and the data signal after DFT processing in the frequency domain is expressed by the following equation (21), and the time domain signal of the multiplexed signal is expressed by the following equation (22).
- M CP is set to (N ALL / 2 ⁇ a ⁇ ), and the signal at the head of CP is set to the 0th symbol of the previous block as in the example described in the first embodiment.
- L 1
- the waveform shaping filter unit 6 is a solid filter for the signal band.
- FIG. 13 is a diagram illustrating a configuration example of a signal according to the present embodiment.
- y a ⁇ (k) is expressed by the following equation (25), when selecting pilot signals (pilot sequences) p 0 , p 1 ,..., P N / 2-1 , y a ⁇ (k It is desirable to select a pilot sequence that does not amplify the peak power in ) .
- a pilot sequence may be searched using an evaluation formula shown in the following formula (26).
- Q is assumed to be a pilot sequence candidate
- E [•] denotes an average
- the average is assumed to be performed over all the symbol candidates of d 0 (k ⁇ 1) .
- averaging is performed using all the candidates shown in the above formula (10), and in the case of QPSK, all the candidates of formula (11) are used.
- the guard band is not included.
- ⁇ and ⁇ satisfying the following equations (27) and (28) may be obtained.
- FIG. 14 is a diagram illustrating a configuration example of a signal according to the present embodiment when a guard band is included.
- the data symbol at the predetermined selection position of the previous block is stored in the storage and processing unit 3 as in the first embodiment.
- the symbol insertion unit 2 inserts the data symbol stored in the data symbol and held in the processing unit 3 at a predetermined insertion position in consideration of the time domain signal of the pilot signal. Then, the predetermined selection position and the predetermined insertion position are determined so that the phase of the first sample of the block is continuous with the phase of the last sample of the previous block. For this reason, when a pilot signal is multiplexed, an out-of-band spectrum can be suppressed as in the first embodiment.
- FIG. 15 is a diagram illustrating an example of a functional configuration of the receiving apparatus according to the fourth embodiment of the present invention.
- the receiving apparatus according to the present embodiment receives the SC block signal transmitted by the transmitting apparatus described in the third embodiment.
- the receiving apparatus of the present embodiment includes a CP removing unit 13, a DFT unit 14, a transmission path estimating unit 15, a frequency domain equalizing unit 16, an undersampling processing unit 17, a pilot signal removing unit 23, An IDFT unit 181, a symbol selection unit 191, a storage and processing unit 201 (storage unit), a demodulation unit 211, and a decoding unit 221 are provided.
- Components having the same functions as those of the receiving apparatus according to the second embodiment are denoted by the same reference numerals as those of the second embodiment, and redundant description is omitted.
- the pilot signal removal unit 23 removes the pilot signal from the signal after the undersampling process.
- IDFT section 181 converts the signal after removal of the pilot signal into a time domain signal.
- the symbol selection unit 191 selects the nth symbol and stores it in the storage and processing unit 201.
- the symbols stored in the storage and processing unit 201 are read out by the demodulation unit 211 when the next block is demodulated.
- the demodulator 211 demodulates N symbols. At this time, in order to improve demodulation accuracy, symbols stored in the storage and processing unit 201 can be used when performing demodulation using the mth time domain signal.
- n 0, and the demodulation unit 21 demodulates the 0th signal of the time domain signal of the previous block using the a ⁇ th time domain signal.
- demodulation is performed using the following equation (30) using v a ⁇ (k) .
- the pilot signal is removed in the frequency domain by pilot signal removing section 23, and the time domain signal output from IDFT section 181 is the same as in the receiving apparatus of Embodiment 2.
- the n-th symbol is stored in the storage and processing unit 201, and the demodulation unit 211 performs demodulation using the symbol stored in the storage and processing unit 201 when the next block is demodulated. For this reason, when a signal transmitted from the transmission apparatus according to the third embodiment is received, the transmitted data symbol can be demodulated, and the memory and processing unit 201 can be used when performing demodulation using the mth time domain signal.
- the demodulation accuracy can be improved by using the symbols stored in the.
- the present invention is not limited to this, and can be applied to various types of transmission devices and reception devices including wired communication.
- DFT Downward Fast Fourier Transform
- IFFT Inverse FFT
- the configurations of the transmitting device and the receiving device are not limited to the device configurations shown in the respective embodiments. Further, the configurations of the transmitting device and the receiving device are not limited to the device configurations shown in the respective embodiments.
- an out-of-band spectrum suppression effect can be obtained by using a block including only data symbols in the first embodiment and a block in which the data symbols and pilot symbols in the third embodiment are multiplexed.
- a guard interval other than the CP may be used.
- the symbol of the previous block may be arranged at a predetermined position of the current block.
- FIG. FIG. 16 is a diagram illustrating a processing example of the fifth embodiment of the transmission device according to the present invention.
- the configuration of the transmission apparatus according to the present embodiment is the same as that of the first embodiment.
- a different part from Embodiment 1 is demonstrated.
- X CP N D -a ⁇
- Y a ⁇ .
- ⁇ j , ⁇ -j and ⁇ 0 are phase rotations.
- the symbol insertion unit 2 inserts the previous block between the YN Lth symbol of the symbol generated by the symbol generation unit 1 and the next symbol. Insert a symbol whose phase has been rotated. That is, d 0 (k) , d 1 (k) ,..., D Y-NL-1 (k) are arranged at symbol positions from the 0th to the YN L ⁇ 1th, and then stored and processed. A first symbol group and a second symbol group, which are symbols obtained by phase-rotating the symbol group of the previous block read from the unit 3, are inserted.
- N D ⁇ 1 ⁇ Y ⁇ N R d Y + NR + 1 (k) ,..., D ND-1 (k) are arranged thereafter.
- NL, NR, and ND in the subscripts in d Y-NL-1 (k) , d Y + NR + 1 (k) , and d ND-1 (k) indicate N L , N R , and N D. .
- symbol selector 4 outputs the symbols arranged by the symbol insertion section 2 to the DFT unit 5, a symbol d 0 from 0-th N to R-th (k), d 1 (k ), ..., d NR (k) and symbols ( ND NL-NL (k) , d ND-NL + 1 (k) ,..., D ND-1 ( ) from the (N D ⁇ N R ) th to the (N D ⁇ 1) th k) is stored in the storage and processing unit 3. These symbols stored in the storage and processing unit 3 are read out when the (k + 1) -th block signal is generated.
- the symbol insertion unit 2 generates the first symbol group and the second symbol group based on the symbols read from the storage and processing unit 3 in the generation of the (k + 1) -th block signal, and the same as above. Are inserted between the YN L- th symbol generated by the symbol generator 1 and the next symbol.
- the first symbol group and the second symbol group are represented by the following expression (32).
- FIG. 18 is a diagram illustrating a specific example using a QPSK symbol. Assuming that s (bold) i is the output of the DFT unit 5, s (bold) i is given by the following equation (33). L is an oversampling rate, N is the total number of carriers, and 0 (bold) i indicates i zeros.
- FIG. 19 is a diagram illustrating a data configuration example of the i-th block according to the present embodiment.
- the second symbol group is arranged so that the Yth symbol is the last of the second symbol group.
- FIG. 20 is a diagram illustrating a data configuration example of block signals for three blocks according to the present embodiment.
- an arrow described as COPY indicates a portion where the symbol of the previous block is arranged with the phase rotated in the next block.
- the last sample of the (k ⁇ 1) th block in the time domain approaches the phase of d 0 (k ⁇ 1) . Since the first symbol of the kth block CP is d 0 (k ⁇ 1) , the phase of the k ⁇ 1th last sample and the phase of the first sample of the CP of the kth block are connected.
- the symbol groups before and after the first symbol of this CP also give phase rotation to the symbols in the previous block.
- the first symbol group and the second symbol group are generated by giving the phase rotation to the symbols of the previous block, but the phase rotation may not be given.
- the first symbol group is arranged after the first symbol of the portion copied as CP, and the symbol before the first symbol of the portion copied as CP is the first symbol.
- the second symbol group is arranged so as to be the end of the two symbol groups.
- the first symbol group is generated based on the head portion of the previous block, and the second symbol group is generated based on the tail portion of the previous block. For this reason, the out-of-band spectrum can be further reduced as compared with the first embodiment.
- FIG. FIG. 21 is a diagram illustrating a processing example of the transmission apparatus according to the sixth embodiment of the present invention.
- the configuration of the transmission apparatus of the present embodiment is the same as that of the third embodiment.
- Embodiment 3 a different part from Embodiment 3 is demonstrated.
- Embodiment 5 a plurality of symbols instead of one symbol are copied from the previous block, and a symbol group based on the symbols copied from the previous block is copied as the CP starting position and this starting position. It was arranged before and after. This technique can also be applied when pilot symbols are multiplexed.
- out-of-band spectrum suppression is achieved even in the case of pilot multiplexing by subtracting from the leading symbol of the portion copied as the CP of the time domain component of the pilot symbol output from the pilot signal generation unit 10. It becomes possible.
- a method as described in Equation (28) of Embodiment 3 may be used.
- FIG. FIG. 22 is a diagram illustrating a processing example of the seventh embodiment of the transmission device according to the present invention.
- the configuration of the transmission apparatus according to the present embodiment is the same as that of the first embodiment.
- a different part from Embodiment 1 is demonstrated.
- FIG. 22 shows an example in which different modulation multi-value numbers are mixed in the first symbol group and the second symbol group.
- d 0 (k) may be set to 64 QAM
- d 1 (k) may be set to QPSK
- d 2 (k) may be set to 16 QAM.
- Embodiment 8 FIG. Next, a receiving apparatus according to the eighth embodiment will be described.
- the receiving apparatus according to the present embodiment receives the SC block signal transmitted by the transmitting apparatus described in the fifth embodiment.
- the configuration of the receiving apparatus of this embodiment is the same as that of the receiving apparatus of the second embodiment.
- the receiving apparatus can perform demodulation using received signals for two blocks.
- the output of the IDFT unit 18 of the receiving apparatus is expressed by the following formula (34)
- the demodulation method shown in the formula (35) can be used.
- D j is a symbol candidate for d j .
- the same demodulation method can also be used in the receiving device that receives the SC block signal transmitted from the transmitting device of the sixth embodiment and the seventh embodiment.
- Embodiment 9 FIG. Next, the transmission apparatus of Embodiment 9 will be described.
- the configuration of the transmission apparatus of the present embodiment is the same as that of the fifth embodiment.
- Embodiment 5 a different part from Embodiment 5 is demonstrated.
- the symbol of the previous block is used as a part of the block symbol.
- a symbol that is a symbol in the same quadrant as the symbol of the previous block may be used as a part of the block symbol.
- symbol settings as shown in the following formula (36) may be performed.
- FIG. 23 is a diagram showing a 64QAM constellation.
- FIG. 24 uses the 64QAM symbol bits of FIG.
- the upper 2 bits of the symbol of symbol number Y are “00”, which is the same as the upper 2 bits of the symbol of symbol number 0 of the k-th block. is there.
- the upper 2 bits of the symbol of symbol number (Y + 1) is “10”, which is the same as the upper 2 bits of the symbol of symbol number 1 of the kth block.
- the number of bits that can be transmitted is increased compared to the fifth embodiment.
- it is possible to transmit 4 ⁇ (1 + 2 + 1) 16 bits more in one block than when the same symbol is used instead of the same quadrant symbol.
- FIG. FIG. 25 is a diagram of a configuration example of the tenth embodiment of the transmission device according to the present invention.
- the configuration of the transmission apparatus according to the present embodiment is the same as that of the transmission apparatus according to the first embodiment except that symbol insertion section 2 is replaced with symbol insertion section 2a.
- the symbol insertion unit 2 a includes an insertion unit 101.
- Embodiment 1 a different part from Embodiment 1 is demonstrated.
- the insertion unit 101 plays a role of inserting the past symbol d 0 (k ⁇ 1) into the 0th symbol over several blocks.
- FIG. 26 is a diagram illustrating an example in which past symbols d 0 (k ⁇ 1) are inserted into the 0th symbol in succession for one block.
- FIG. 27 is a diagram illustrating an example in which past symbols d 0 (k ⁇ 1) are inserted into the 0th symbol in succession for two blocks.
- FIG. 28 is a flowchart illustrating an operation example of the insertion unit 101 according to the present embodiment.
- FIG. FIG. 29 is a diagram of a configuration example of the eleventh embodiment of the transmission apparatus according to the present invention.
- the configuration of the transmission apparatus of the present embodiment is the same as that of the transmission apparatus of the fifth embodiment, except that symbol insertion unit 2 is replaced with symbol insertion unit 2b.
- the symbol insertion unit 2b includes insertion units 101-1 and 101-2.
- Embodiment 5 a different part from Embodiment 5 is demonstrated.
- Insertion section 101-1 inserts the first symbol group over a plurality of blocks
- insertion section 101-2 inserts the second symbol group over a plurality of blocks.
- FIG. 30 is a diagram showing an example in which the first group and the second group are copied every other block.
- FIG. 31 is a diagram illustrating an example in which the first group and the second group are copied in two consecutive blocks.
- FIG. 32 is a flowchart showing an operation example in the insertion units 101-1 and 101-2 according to the present embodiment.
- Steps S1 to S5 in FIG. 32 are the same as those in the tenth embodiment.
- the insertion units 101-1 and 101 have the following formula (37). Is performed (step S12), and the process proceeds to step S7.
- Steps S7, S8, S10, and S11 are the same as those in the tenth embodiment.
- step S5 If m is larger than M in step S5 (No in step S5), the insertion units 101-1 and 101-2 do not perform the copy process (step S13), and the process proceeds to step S10.
- FIG. FIG. 33 is a diagram of a configuration example and a processing example of the transmission apparatus according to the twelfth embodiment of the present invention.
- the symbol insertion unit 2 and the symbol selection unit 4 of the third embodiment are configured as one symbol insertion / selection unit 2a.
- the symbol insertion unit 2 and the symbol selection unit 4 may be merged.
- the processing in consideration of the time domain signal of the pilot signal may be performed in addition to the data symbols at the locations described in the third embodiment.
- the process shown in FIG. 33 is a process in which the processes of the symbol insertion unit 2 and the symbol selection unit 4 are combined with the process of the third embodiment. In the present embodiment, for example, a process represented by the following formula (38) may be added.
- c 1 and c 2 are complex or real coefficients as in the case of b and c in equation (28).
- the predetermined selection position and the predetermined insertion position are determined so that the phase of the first sample of the block is continuous with the phase of the last sample of the previous block. For this reason, when a pilot signal is multiplexed, an out-of-band spectrum can be suppressed as in the first embodiment.
- the reception method in the reception device described in the fourth embodiment is a method for performing the processing shown in the following equation (39).
- FIG. 34 is a diagram illustrating a configuration example of the symbol selection unit 4a of the present embodiment.
- a power adjustment unit 41 is provided in the symbol selection unit 4a.
- power adjustment is performed on the input value. For example, when the number of inputs and the number of outputs of the power adjustment unit 41 is N, the adjustment may be performed as in the following equation (40).
- the average bit error characteristic is deteriorated compared to QPSK by using 16QAM, so symbols using 16QAM, that is, d 0 (k) to d NR (k) , d ND-1 ( From k) to d ND-NL (k) , d Y-NL (k) to d Y + NR (k) (the circled area in FIG.
- Symbol Error Rate symbol error rate
- Bit Error Rate bit error rate
- Block Error Rate block symbol error rate
- Packet Error Rate a value that prevents deterioration of the packet determination error rate
- FIG. 35 is a diagram illustrating a configuration example of the power adjustment unit 41 when all QPSK is used. Since symbols from the previous block are used from d Y-NL (k) to d Y + NR (k) , if the previous block is to be demodulated, it is set from d Y-NL (k) to d Y + NR (k). The symbol appears twice.
- the power of symbols from d Y-NL (k) to d Y + NR (k) and the symbols copied from d Y -NL (k + 1) to d Y + NR (k + 1) (ie d Symbol power from 0 (k) to d NR (k) , d ND-NL (k) to d ND-1 (k) , and d 0 (k) to d NR (k) , d ND- It may be set lower than the power of symbols other than NL (k) to d ND-1 (k) and d Y-NL (k) to d Y + NR (k) .
- a value that prevents deterioration of the symbol determination error rate, the bit determination error rate, the block symbol determination error rate, or the packet determination error rate may be set. Further, assuming that 0 ⁇ k ⁇ N D ⁇ 1, g k may be calculated using values of N D , N R , and N L.
- the transmission device, the reception device, and the communication system according to the present invention are useful for a communication system that performs SC block transmission, and are particularly suitable for a communication system that performs CP insertion.
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Abstract
Description
図1は、本発明にかかる送信装置の実施の形態1の機能構成例を示す図である。図1に示すように、本実施の形態の送信装置は、シンボル生成部1(データシンボル生成部)、シンボル挿入部2、記憶および処理部3(記憶部)、シンボル選択部4、時間・周波数変換部5、波形整形フィルタ部(波形整形部)6、ガードバンド挿入部7、補間処理部8およびCP挿入部9を備える。なお、図では、記憶および処理部3を記憶・処理部3と略す。
r0=d0,r4=-d3,r8=d5,r12=-d9,r16=d12,r20=-d15,
r24=d18,r28=-d21
設計条件1:MCPを(NALL-aμ)Lと設定
設計条件2:n=0とし、aχ番目のシンボルをβ・d0 (k-1)とする
図10は、本発明にかかる受信装置の実施の形態2の機能構成例を示す図である。本実施の形態の受信装置は、実施の形態1で説明した送信装置により送信されたSCブロック信号を受信する。
図11は、本発明にかかる送信装置の実施の形態3の機能構成例を示す図である。図11に示すように、実施の形態1の図4で示した送信装置に、パイロット信号生成部10、波形整形フィルタ部11および周波数領域上配置部(周波数領域配置部)12を追加する以外は実施の形態1の図4で示した送信装置と同様である。実施の形態1と同様の機能を有する構成要素は、実施の形態1と同一の符号を付して重複する説明を省略する。実施の形態1と異なる部分を説明する。
図15は、本発明にかかる受信装置の実施の形態4の機能構成例を示す図である。本実施の形態の受信装置は、実施の形態3で説明した送信装置により送信されたSCブロック信号を受信する。
図16は、本発明にかかる送信装置の実施の形態5の処理例を示す図である。本実施の形態の送信装置の構成は、実施の形態1と同様である。以下、実施の形態1と異なる部分を説明する。
図21は、本発明にかかる送信装置の実施の形態6の処理例を示す図である。本実施の形態の送信装置の構成は、実施の形態3と同様である。以下、実施の形態3と異なる部分を説明する。
図22は、本発明にかかる送信装置の実施の形態7の処理例を示す図である。本実施の形態の送信装置の構成は、実施の形態1と同様である。以下、実施の形態1と異なる部分を説明する。
次に、実施の形態8の受信装置について説明する。本実施の形態の受信装置は、実施の形態5で説明した送信装置により送信されたSCブロック信号を受信する。本実施の形態の受信装置の構成は、第2の実施の形態の受信装置と同様である。
次に、実施の形態9の送信装置について説明する。本実施の形態の送信装置の構成は、実施の形態5と同様である。以下、実施の形態5と異なる部分を説明する。
図25は、本発明にかかる送信装置の実施の形態10の構成例を示す図である。本実施の形態の送信装置の構成は、シンボル挿入部2をシンボル挿入部2aに替える以外は実施の形態1の送信装置と同様である。シンボル挿入部2aは、挿入部101を備える。以下、実施の形態1と異なる部分を説明する。
図29は、本発明にかかる送信装置の実施の形態11の構成例を示す図である。本実施の形態の送信装置の構成は、シンボル挿入部2をシンボル挿入部2bに替える以外は実施の形態5の送信装置と同様である。シンボル挿入部2bは、挿入部101-1,101-2を備える。以下、実施の形態5と異なる部分を説明する。
図33は、本発明にかかる実施の形態12の送信装置の構成例と処理例を示す図である。本実施の形態の送信装置は、実施の形態3のシンボル挿入部2とシンボル選択部4とを1つのシンボル挿入・選択部2aとして構成している。このように、実施の形態3において、シンボル挿入部2およびシンボル選択部4を融合してもよい。パイロット信号の時間領域信号を配慮した処理は、実施の形態3に記載された箇所のデータシンボル以外に処理を行っても良い。図33に示した処理は実施の形態3の処理に加え、シンボル挿入部2およびシンボル選択部4の処理が融合された処理となる。本実施の形態において、例えば以下の式(38)に示す処理を追加してもよい。
次に、実施の形態13の送信装置について説明する。実施の形態7のように、異なる多重シンボルが混ざる場合、シンボル選択部内で電力調整を行ってもよい。図34は、本実施の形態のシンボル選択部4aの構成例を示す図である。図34に示すように、シンボル選択部4a内に電力調整部41を備える。電力調整部41内では入力値に対し、電力調整を行う。例えば電力調整部41入力数および出力数をNとすると、以下の式(40)のように調整を行ってよい。
Claims (16)
- 複数のデータシンボルを含むブロック信号を送信する送信装置であって、
ブロックごとに1ブロック分のデータシンボルを生成するデータシンボル生成部と、
前記データシンボル生成部により生成された1ブロック分の前記データシンボルのうち第1の位置のデータシンボルを複製シンボルとして記憶する記憶部と、
前記データシンボル生成部により生成された1ブロック分の前記データシンボルの第2の位置に前記記憶部に記憶された1つ前のブロックの前記複製シンボルが挿入されるように、前記データシンボルおよび前記複製シンボルを配置してブロックシンボルを生成するシンボル挿入部と、
前記ブロックシンボルを周波数領域信号に変換する時間周波数変換部と、
前記周波数領域信号に対して補間処理を行う補間処理部と、
補間処理後の信号に対してCyclic Prefixの挿入を行って前記ブロック信号を生成するCP挿入部と、
を備えることを特徴とする送信装置。 - 前記補間処理部は、
前記周波数領域信号に対してデータ点数を増加させるオーバサンプリング処理を行うオーバサンプリング処理部と、
前記オーバサンプリング処理後の周波数領域信号に対して逆フーリエ変換を行う逆フーリエ変換部と、
を備えることを特徴とする請求項1に記載の送信装置。 - 前記第1の位置を1ブロック分の前記データシンボルの先頭の位置とし、
前記第2の位置をCyclic Prefixとしてコピーされる前記データシンボルの先頭位置とし、
前記補間処理部は、前記ブロックシンボルの最後のシンボルとCP挿入後の前記ブロックシンボルの先頭のシンボルとの間を補間した補間点が前記最後のシンボルの後ろに追加されるように前記補間処理を実施することを特徴とする請求項1または2に記載の送信装置。 - 前記周波数領域信号に対して波形整形処理を行う波形整形部と、
前記波形整形処理後の前記周波数領域信号に対してガードバンド挿入処理を行うガードバンド挿入部と、
を備え、
前記補間処理部は、前記ガードバンド挿入処理後の前記周波数領域信号に対して前記補間処理を行うことを特徴とする請求項1、2または3に記載の送信装置。 - 複数のデータシンボルを含むブロック信号を送信する送信装置であって、
ブロックごとに1ブロック分のデータシンボルを生成するデータシンボル生成部と、
前記データシンボル生成部により生成された1ブロック分の前記データシンボルのうち第1の位置のデータシンボルを複製シンボルとして記憶する記憶部と、
周波数領域のパイロット信号と、前記パイロット信号の時間領域信号を生成するパイロットシンボル生成部と、
前記記憶部に記憶された1つ前のブロックの前記複製シンボルを前記時間領域信号に基づいて修正し、前記データシンボル生成部により生成された1ブロック分の前記データシンボルの第2の位置に修正後の前記複製シンボルが挿入されるように、前記データシンボルおよび修正後の前記複製シンボルを配置してブロックシンボルを生成するシンボル挿入部と、
前記ブロックシンボルに対してフーリエ変換処理を行うフーリエ変換部と、
前記フーリエ変換処理後のデータと前記パイロット信号とを周波数領域上で多重した配置データを生成する周波数領域配置部と、
前記配置データに対してデータ点数を増加させるオーバサンプリング処理を行うオーバサンプリング処理部と、
前記オーバサンプリング処理後のデータに対して逆フーリエ変換を行う逆フーリエ変換部と、
を備えることを特徴とする送信装置。 - 前記第1の位置を1ブロック分の前記データシンボルの先頭の位置とし、
前記第2の位置をCyclic Prefixとしてコピーされる前記データシンボルの先頭位置とすることを特徴とする請求項5に記載の送信装置。 - 前記複製シンボルに対し、それぞれ位相回転、振幅調整のうち1つ以上を加えることを特徴とする請求項1から6のいずれか1つに記載の送信装置。
- 前記第1の位置の前記データシンボルの変調方式を、前記第1の位置以外の前記データシンボルのうち1つ以上の前記データシンボルの変調方式と異なる方式とすることを特徴とする請求項1から7のいずれか1つに記載の送信装置。
- 前記第1の位置を1ブロック分の前記データシンボルの先頭の位置とし、
前記第2の位置をCyclic Prefixとしてコピーされる前記データシンボルの先頭位置とし、
前記記憶部は、前記データシンボルの先頭の第1の個数のシンボルである第1のシンボル群と、前記データシンボルの最後の第2の個数のシンボルである第2のシンボル群とを前記複製シンボルとして記憶し、
前記シンボル挿入部は、前記記憶部に記憶された1つ前のブロックの前記第1のシンボル群を構成するそれぞれのシンボルと同象限となる同象限シンボルで構成される第1の同象限シンボル群を生成し、前記第1の同象限シンボルの先頭が前記第2の位置となるよう前記第1の同象限シンボル群を配置し、前記記憶部に記憶された1つ前のブロックの前記第2のシンボル群を構成するそれぞれのシンボルと同象限となる同象限シンボルで構成された第2の同象限シンボル群を生成し、前記第2の同象限シンボル群の最後のシンボルが前記第2の位置の1つ前のシンボルとなるよう前記第2の同象限シンボル群を配置することを特徴とする請求項1から8のいずれか1つに記載の送信装置。 - 前記第1の同象限シンボル群として前記記憶部に記憶された1つ前のブロックの前記第1のシンボル群を用い、前記第2の同象限シンボル群として前記記憶部に記憶された1つ前のブロックの前記第2のシンボル群を用いることを特徴とする請求項9に記載の送信装置。
- 前記シンボル挿入部は、前記記憶部に記憶された1つ前のブロックの前記第1の同象限シンボル群に位相回転を与えて第1の同象限シンボル群を生成し、前記記憶部に記憶された1つ前のブロックの前記第2の同象限シンボル群に位相回転を与えて第2の同象限シンボル群を生成することを特徴とする請求項9または10に記載の送信装置。
- 前記第1の同象限シンボル群および前記第2の同象限シンボル群を構成するシンボルの少なくとも1つのシンボルは前記第1の同象限シンボル群および前記第2の同象限シンボル群を構成する他のシンボルと変調方式が異なることを特徴とする請求項9、10または11に記載の送信装置。
- 前記シンボル挿入部は、連続した規定数のブロックに、前記複製シンボルを配置することを特徴とする請求項1から12のいずれか1つに記載の送信装置。
- 請求項2に記載の送信装置から送信された信号を受信信号として受信する受信装置であって、
前記受信信号からCyclic Prefixを除去するCP除去部と、
Cyclic Prefix除去後の前記受信信号に対してDFT処理を行うことにより周波数信号を生成するDFT処理部と、
前記周波数領域信号に基づいて伝送路推定を行う伝送路推定部と、
前記周波数領域信号と前記伝送路推定の結果とに基づいて等化処理を行う等化処理部と、
前記等化処理後の信号に対してアンダーサンプリング処理を行うサンプリング処理部と、
前記アンダーサンプリング処理後の信号に対してIDFT処理を行うIDFT処理部と、
前記IDFT処理後の信号から、第1の位置のデータシンボルを選択するシンボル選択部と、
前記シンボル選択部により選択された選択シンボルを記憶する記憶部と、
前記IDFT処理後の信号から、第2の位置のデータシンボル以外のデータシンボルを復調し、前記第2の位置のデータシンボルと前記記憶部に記憶されている前記選択シンボルとを用いて前記第2の位置のデータシンボルを復調する復調部と、
を備えることを特徴とする受信装置。 - 請求項5に記載の送信装置から送信された信号を受信信号として受信する受信装置であって、
前記受信信号からCyclic Prefixを除去するCP除去部と、
Cyclic Prefix除去後の前記受信信号に対してDFT処理を行うことにより周波数信号を生成するDFT処理部と、
前記周波数領域信号に基づいて伝送路推定を行う伝送路推定部と、
前記周波数領域信号と前記伝送路推定の結果とに基づいて等化処理を行う等化処理部と、
前記等化処理後の信号に対してアンダーサンプリング処理を行うサンプリング処理部と、
前記アンダーサンプリング処理後の信号からパイロットシンボルを除去するサンプリング処理部と、
前記パイロットシンボルの除去後の信号に対してIDFT処理を行うIDFT処理部と、
前記IDFT処理後の信号から、第1の位置のデータシンボルを選択するシンボル選択部と、
前記シンボル選択部により選択された選択シンボルを記憶する記憶部と、
前記IDFT処理後の信号から、第2の位置のデータシンボル以外のデータシンボルを復調し、前記第2の位置のデータシンボルと前記記憶部に記憶されている前記選択シンボルとを用いて前記第2の位置のデータシンボルを復調する復調部と、
を備えることを特徴とする受信装置。 - 請求項1から13のいずれか1つに記載の送信装置と、
前記送信装置から送信された信号を受信する受信装置と、
を備えることを特徴とする通信システム。
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