WO2015039352A1 - Data caching method and storage system - Google Patents

Data caching method and storage system Download PDF

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Publication number
WO2015039352A1
WO2015039352A1 PCT/CN2013/084024 CN2013084024W WO2015039352A1 WO 2015039352 A1 WO2015039352 A1 WO 2015039352A1 CN 2013084024 W CN2013084024 W CN 2013084024W WO 2015039352 A1 WO2015039352 A1 WO 2015039352A1
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WIPO (PCT)
Prior art keywords
controller
data
address information
read
target data
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PCT/CN2013/084024
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French (fr)
Chinese (zh)
Inventor
陈磊
蒋培军
李小华
邹蛟同
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华为技术有限公司
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Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to PCT/CN2013/084024 priority Critical patent/WO2015039352A1/en
Priority to CN201380001620.0A priority patent/CN103635887B/en
Publication of WO2015039352A1 publication Critical patent/WO2015039352A1/en

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0862Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches with prefetch
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • G06F12/0868Data transfer between cache memory and other subsystems, e.g. storage devices or host systems

Definitions

  • the present invention relates to storage technologies, and in particular, to a method and a storage system for caching data. Background technique
  • the cache memory (also referred to as cache) is a buffer memory between the CPU and the main memory (for example, a hard disk) in the storage system.
  • the volume is smaller than the hard disk, but the speed is faster than the hard disk.
  • a cache hit the result of the read data request can be immediately returned.
  • the miss the read data request is sent to the hard disk for reading.
  • Write data Since the cache access speed is much faster than the hard disk read and write speed, the higher the cache hit ratio, the higher the performance of the storage system. Therefore, the existing practice is to read the data that is "may be accessed" to the cache in advance, and the subsequent read data request can be hit immediately. This is called prefetching.
  • controllers For a storage system with multiple controllers, if multiple controllers are in primary/standby (A/P) mode, that is, only one controller is in working state, then for a storage system, it stores the data in the cache. It is stored centrally in the cache of the controller, so the cache data can be prefetched by sequential stream identification of the read data request. However, if multiple controllers are in master/master (A/A) mode, each controller is active and read data requests may be distributed to each controller, so each controller makes a read data request. When the sequential stream is identified for prefetching, the information on which it is based is not comprehensive enough, so the prefetched data is not accurate enough. Summary of the invention
  • Embodiments of the present invention provide a method for caching data and a storage system to accurately predict target data to be read in a case where the storage system includes a plurality of controllers.
  • a first aspect of the embodiments of the present invention provides a method for buffering data, where the method is applied to save
  • the storage system includes a plurality of controllers, wherein each controller includes a cache; and the method includes:
  • the first controller receives the read data request sent by the host, the read data request carries the address information, determines the second controller according to the address information carried by the read data request, and sends the address information to the second controller;
  • the second controller obtains address information of the target data to be read according to the address information, to read the target data into the cache according to the address information of the target data.
  • the address information carried by the read data request includes a start address carried by the read data request.
  • Determining the second controller according to the address information carried by the read data request comprises: determining, according to the set hash algorithm, the second controller according to the starting address carried by the read data request.
  • the set hash algorithm includes a consistent hash algorithm.
  • the address information carried by the read data request includes a start address carried by the read data request.
  • Determining the second controller according to the address information carried in the read data request comprises: querying a preset configuration table according to the start address, and obtaining a second controller corresponding to the start address.
  • the reading the target data into the cache according to the address information of the target data includes:
  • the second controller reads the target data into a cache of the second controller according to address information of the target data.
  • the reading, by the address information of the target data, the target data into the cache includes:
  • the third controller reads the target data into a cache of the third controller according to address information of the target data.
  • a second aspect of the embodiments of the present invention provides a storage system, including:
  • the first controller is configured to receive a read data request sent by the host, where the read data request carries address information, determine a second controller according to the address information carried by the read data request, and send the address information to the second controller. ;
  • the second controller is configured to obtain address information of the target data to be read according to the address information, to read the target data into the cache according to the address information of the target data.
  • the address information carried by the read data request includes a start address carried by the read data request.
  • the first controller is specifically configured to determine the second controller according to the set hash algorithm according to the starting address carried by the read data request.
  • the set hash algorithm includes a consistent hash algorithm.
  • the address information carried by the read data request includes a start address carried by the read data request.
  • the first controller is specifically configured to query a preset configuration table according to the start address, and obtain a second controller corresponding to the start address.
  • the second controller is further configured to: read the target data into a cache of the second controller according to the address information of the target data. .
  • system further includes a third controller
  • the second controller is further configured to determine the target number according to the address information of the target data. And corresponding to the third controller; sending a prefetch command to the third controller, where the prefetch command includes address information of the target data;
  • the third controller is configured to read the target data into a cache of the third controller according to the address information of the target data.
  • the first controller determines the second controller according to the address information carried by the read data request, and sends the address information to the second
  • the controller obtains target data to be read according to the address information by the second controller to perform an operation of reading the target data to the cache. Since the controller performing the operation of obtaining the target data to be read is determined by the address information carried by the read data request, the read data request occurring above a logical address can be collectively analyzed by a controller for this logical address. In other words, the obtained information of the read data request is comprehensive, so the target data to be read can be accurately predicted and read into the cache.
  • FIG. 1 is a schematic diagram of an application network architecture of a method for caching data according to an embodiment of the present invention
  • FIG. 2 is a flowchart of a method for buffering data according to an embodiment of the present invention
  • FIG. 3 is a flowchart of another method for buffering data according to an embodiment of the present invention
  • FIG. 5 is a data structure diagram of a data block table in a data prefetching unit according to an embodiment of the present invention
  • FIG. 7 is a schematic diagram of correspondence between a read data request and a data block according to an embodiment of the present invention
  • FIG. 8 is a schematic structural diagram of a storage system according to an embodiment of the present invention.
  • FIG. 1 is a schematic diagram of a system architecture of a method for caching data according to an embodiment of the present invention.
  • the storage system includes multiple controllers (including four controllers as an example) and a storage device.
  • the storage device is illustrated by using a hard disk as an example.
  • FIG. 1 is only an exemplary description, and is not limited to a specific networking manner, such as: a cascading tree network or a ring network. As long as the controller and the storage device can communicate with each other.
  • the controller can include any computing device known in the art, such as a server, desktop computer, and the like.
  • each controller can process a read data request from a host, and can also access data stored in the storage device, for example, reading data in the storage device and storing the data in the storage device. Cache.
  • each controller can process read data requests from the host, but each controller corresponds to a segment of storage space in the storage device (eg, part of a disk or a portion of a disk's storage space), That is to say, each piece of storage space in the storage device has its corresponding specific controller and cannot be managed or accessed by other controllers.
  • the storage device herein refers to a disk, a hard disk or other storage medium, and does not include a controller.
  • the cache is a buffer between the CPU and the hard disk. It is smaller than the hard disk but faster than the hard disk. Some data is stored in the Cache. When the CPU processes the read data request, if the available data is found in the cache, it is a cache hit.
  • Each controller can communicate with each other and can access data stored in the cache of other controllers.
  • the controller 0 receives a read data request from the host (not shown) to access the data A, and the cache 0 of the controller 0 does not store the data A, but the cache of the controller 1 stores the data A, so the controller 0 can send a data read command to the controller 1, so that the controller 1 reads the data A from the cache and sends it to the controller 0, so the controller 0 can directly return the data A to the host.
  • the data communication between the caches is a high-speed data transmission channel
  • the cache data sharing access speed between the controllers is very fast, compared with the cache misses that need to read the data in the storage device, from other The process of obtaining data in the controller's cache takes a short time.
  • each controller includes at least one prefetch management unit, and in the embodiment of the present invention, the number of prefetch management units included in each controller is substantially equal.
  • Each prefetch management unit is used to perform a logical storage space data read operation of an address range.
  • the logical storage space managed by each of the prefetch management units may be a Logic Unit Number (LU), a LUN, or a folder, and is not limited thereto.
  • the distribution of the prefetch management unit in the controller can be determined based on the address range of the logical storage space.
  • a consistent hash algorithm or other hash storage device may be included in a storage device known in the art, such as SSD, or direct access memory (Direct Access) Storage Device, DASD), etc.
  • the storage space of the storage device can be divided into a number of logical chunks, each of which has a unique ID.
  • the management of the data in the storage device is in chunks, for example, the data can be read into the cache in units of chunks.
  • each controller can perform read and write operations on the storage device. For example, each controller can read data in the storage device to itself. Inside the cache, you can implement the cache life when executing subsequent read data requests.
  • each controller corresponds to a part of the storage space of the storage device, and can only read and write data stored in the part of the storage space, for example, reading data stored in the storage space. Go to your own cache, and the data stored in the other storage space of the storage device is managed by other controllers.
  • the method for buffering data is as follows. As shown in FIG. 2, a flowchart of a method for caching data according to an embodiment of the present invention is applied to a storage system, where the storage system includes multiple The controller, wherein each controller includes a cache; the method includes: Step S201: The first controller receives a read data request sent by the host, where the read data request carries address information; and the address carried according to the read data request The information determines a second controller; the address information is sent to the second controller.
  • the address information includes a start address and a length of the data to be read
  • the second control corresponding to the read data request may be obtained according to the set hash algorithm according to the start address of the data to be read.
  • Step S202 The second controller obtains address information of the target data to be read according to the address information, to read the target data into the cache according to the address information of the target data.
  • the target data may be read into the cache of the second controller according to the address information of the target data; Or sending a prefetch command to the third controller according to the address information of the target data, and the third controller reads the target data into the cache of the third controller according to the address information of the target data.
  • the embodiment of the present invention may also be applied to a distributed system, where the distributed system includes multiple nodes, each node is a server, and each server performs functions similar to each controller in the storage system. , will not repeat them here.
  • the read data request sent by the host received by the first controller may be One, or more than one.
  • the plurality of read data requests may be consecutively determined according to the address information carried by the plurality of read data requests, and if consecutive, the plurality of read data requests may be combined to obtain A continuous piece of address information. Determining, according to the address information carried by the read data request, the second controller specifically refers to determining the second controller according to the merged consecutive address information. If the plurality of read data requests are not consecutive, the second controller is determined according to the address information carried by each read data request.
  • the first controller determines the second controller according to the address information carried by the read data request, and sends the address information to the second
  • the controller obtains target data to be read according to the address information by the second controller to perform an operation of reading the target data to the cache. Since the controller performing the operation of obtaining the target data to be read is determined by the address information carried by the read data request, the read data request occurring above a logical address can be collectively analyzed by a controller for this logical address. In other words, the obtained information of the read data request is comprehensive, so the target data to be read can be accurately predicted and read into the cache. As shown in FIG.
  • FIG. 3 it is a flowchart of another method for buffering data provided by an embodiment of the present invention.
  • the embodiment of the present invention takes three controllers as an example, but is not limited to three controllers. Referring to FIG. 3, the following steps may be specifically performed by a processor in a controller, where the method includes:
  • Step S301 The first controller receives a first read data request sent by the host, where the first read data request carries address information of the first data to be read, where the address information includes a start of the first data to be read. Address (LBA) and length.
  • the logical address in the embodiment of the present invention also called the starting address, is also called LBA.
  • Step S302 The first controller determines a controller corresponding to the first read data request.
  • each controller includes at least one prefetch management unit,
  • the number of prefetch management units included in each controller is substantially equal, and each prefetch management unit is used to manage a storage space of an address range, such as a segment of the LU.
  • the controller corresponding to the first read data request may be obtained according to the LBA of the first data to be read according to the consistency hash algorithm or other hash algorithm, and then the prefetch management unit in the controller is obtained.
  • the controller corresponding to the first read data request determines, and then the prefetch management unit corresponding to the first read data request is determined; when the controller includes multiple prefetches
  • each prefetch management unit manages the storage space of a range of addresses, so it is also possible to uniquely determine a prefetch management unit in a controller based on the LBA.
  • the controller corresponding to the first data to be read is a second controller.
  • a hashing algorithm also known as a hashing algorithm, is a data structure that determines a unique access address based on a certain key value, with the goal of speeding up the lookup. Where key is the starting address.
  • the usual hashing algorithm can be implemented with a hash table, and the corresponding access address can be obtained by searching in the hash table according to the key value.
  • the general hash algorithm is a linear calculation method.
  • a hash algorithm can be used to uniquely determine a controller by inputting a starting address.
  • the consistent hash algorithm can use a circular data structure to implement the location of the key value to the access location.
  • a plurality of virtual nodes may be included, such as virtual node 0, virtual node 1, virtual node 2, virtual node 3, virtual node 10, and each virtual node corresponds to an access address.
  • Each of the two adjacent virtual nodes is connected in turn, and the virtual node 10 is connected to the virtual node 0 to form a ring.
  • controllers in the storage system as an example.
  • the three controllers are named controller A, controller B, and controller C.
  • Each controller corresponds to a virtual node in several ring data structures, for example, controller A corresponds.
  • controller D when a new controller is added to the storage system, for example, With controller D, there is no need to rearrange the data structure or modify the algorithm. Only need to adjust the corresponding virtual node of each controller, so that the newly added controller D can correspond to a starting address.
  • each controller of the storage system may save a preset configuration table, where the configuration table includes a correspondence between a starting address and each controller, and the controller that receives the read data request may be configured according to The start address carried in the read data request is queried in the configuration table to obtain a controller corresponding to the start address.
  • the configuration table may be saved in only one controller.
  • the controller may send a query request to the controller that saves the configuration table, where the query request includes the read data request to carry. a starting address, so that the controller that saves the configuration table can perform a query in the configuration table according to the starting address, thereby obtaining a controller corresponding to the starting address, and sending the query result to the received read data. Requested controller.
  • a copy of the configuration table may be saved in another controller of the storage system.
  • the controller corresponding to the start address may be obtained by using a modulo method. Specifically, the start address is divided by the number of controllers, and the corresponding control is obtained according to the calculated mode. Device.
  • Step S303 The second controller receives a second read data request sent by the host, where the second read data request carries address information of the second data to be read, where the address information includes a start of the second data to be read. Address (LBA) and length.
  • step S301 there is no order between step S301 and step S303.
  • Step S304 The second controller determines a controller corresponding to the second read data request.
  • the corresponding controller may be obtained according to the LBA of the second data to be read, which is similar to step S302, and details are not described herein again.
  • the two controllers may respectively perform the operations of buffering data prefetching without affecting each other.
  • the controller corresponding to the first read data request and the controller corresponding to the second read data request are mainly discussed. The same situation.
  • Step S305 The first controller sends the landing information of the first read data request to the second controller, where the drop information includes address information of the first data to be read, and the drop information may further include sending the first The ID of the host that reads the data request, and the ID of the first controller, etc., and the drop point information can be used as an analysis basis for data prefetching.
  • the processor of the second controller may push the address stored in the cache of the second read data request to the pre-fetch of the second controller.
  • the management unit causes the prefetch management unit of the second controller to obtain the drop information of the second read data request, which is not limited herein.
  • Step S306 The second controller predicts the target data of the next read data request according to the drop point information of the first read data request and the drop point information of the second read data request.
  • the next read data request refers to the read data request that the storage system is about to receive (not yet received).
  • the next read data request is referred to as the third read data request. It should be noted that the next read data request is not limited to the read data request immediately following the first read data request and the second read data request, as long as the read data is received after the first read data request and the second read data request. The request can be called the next read data request.
  • the second controller may utilize the prefetch management unit to predict the target data of the third read data request.
  • the prefetch management unit is a function unit included in the controller for performing a cache data read operation. As shown in FIG. 4, the prefetch management unit includes: a data block table, an interface, and a prefetch policy module. Where the data block table contains a plurality of data blocks, each data block corresponding to a logical block on the disk
  • the data block is used to record the landing information of the read data request as well as other information.
  • the data block table may be sorted according to the LBAs included in the drop information, from small to large, or from large to small.
  • the data block table of the embodiment of the present invention may not be limited to the form of a table, and may also be a red-black tree, or a binary tree or other data management structure that can implement sequential search.
  • the data recorded in each data block is the landing information of the read data request and other information, but does not include the data to be read itself.
  • the interface is used to receive other controls
  • the drop information of the read data request sent by the device, or send a prefetch command to other controllers; the prefetch policy module is configured to perform a read operation according to the set prefetch policy.
  • the information recorded in each data block may include: a Chunk ID, a drop point information, and an ID of a chunk that was last read, wherein the drop point information may specifically include a host ID, a controller ID, an LBA, and Length
  • the Chunk ID specifically refers to the ID of the chunk on the disk corresponding to the data block, and the Chunk ID is multiplied by the size of each chunk to obtain the starting address of the chunk. Since the prefetching of data is in chunks, it is also necessary to know the starting address of the chunk in which the target data is located when prefetching the target data. It should be noted that the LBA described above refers to the starting address of the request according to the request, which is different from the starting address of the chunk. In some cases, the start address of the request is the same as the start address of the chunk, but in most cases, the start address of the read data request is not the same as the start address of the chunk.
  • the ID of the most recently read chunk is used to identify the prefetch range of the last read operation occurring on the data block, since the read operation is performed in chunks. Therefore, it can be determined according to the ID of the chunk that was read last time whether the prefetching overlaps with the range of the last prefetch, and if so, the chunk of the overlapping portion may not be included when the reading operation is performed.
  • step S306 may specifically include the following steps:
  • S3061 Determine, according to the falling point information of the first read data request and the falling point information of the second read data request, that the first read data request and the second read data request have a sequential order relationship.
  • the specific determination method is: obtaining the end address of the first read data request according to the start address and the length of the first read data request, if the end address of the first read data request and the start address of the second read data request are consecutive, Describe that the first read data request and the second read data request have a sequential order relationship; or, obtain the end address of the second read data request according to the start address and length of the second read data request, if the end of the second read data request Address and first read data request
  • the start address is continuous, indicating that the first read data request and the second read data request have a sequential order relationship.
  • the first read data request and the second read data request may not be absolutely continuous, and a certain degree of address gap is allowed between them.
  • S3062 Determine a data block corresponding to the first read data request and the second read data request.
  • the data block corresponding to the first read data request and the second read data request may be determined according to the drop information of the first read data request and the drop information of the second read data request. Since the first read data request and the second read data request have a sequential order relationship, their corresponding data blocks are also continuous.
  • the data block corresponding to the first read data request and the second read data request may be as shown in FIG.
  • S3063 Determine a data block consecutive data block corresponding to the first read data request and the second read data request, to obtain a maximum continuous segment of the data block.
  • the data block corresponding to the first read data request and the second read data request may be traversed forward, if the data block has a data block corresponding to the first read data request and the second read data request. Continuously, according to the falling point information recorded on the consecutive data blocks, it is determined whether the read data request on the data block last time is consecutive with the current first read data request and the second read data request, and if continuous, continue Consecutive data blocks are obtained in the data block table until a maximum contiguous segment of data blocks corresponding to the first read data request and the second read data request is obtained.
  • the length of the target data is obtained by calculating the prefetching strategy.
  • the data may be removed.
  • the target data may be read from the disk according to the start address and the length of the target data, and stored in the cache of the second controller, to A cache hit is available for the next execution of the third read data request. This situation is primarily applicable to scenarios where each controller can manage or access each disk in the storage device.
  • each controller can only manage or access part of the storage space (partial disk or part of the storage space of a disk) in the storage device, that is, each storage space in the storage device has The corresponding specific controller cannot be managed or accessed by other controllers.
  • the embodiment may further include:
  • Step S307 The second controller sends a prefetch command to the third controller, where the prefetch command includes a start address and a length of the target data, so that the third controller reads the target data into its cache.
  • the second controller may determine, according to the start address of the target data, that the storage space where the target data is located is managed by the third controller, so that the data prefetch command may be sent to the third controller.
  • the second controller may obtain a controller corresponding to the storage space where the target data is located by using a system configuration or some existing calculation methods, from a starting address of the target data.
  • Step S308 The third controller prefetches the target data into its cache.
  • the third controller may read the target data from the disk according to the starting address and length of the target data, and store the data in the cache of the third controller.
  • Step S309 The first controller receives a third read data request sent by the host, where the data to be read requested by the third read data is the target data, or the data to be read is a part of the target data.
  • the first controller After receiving the third read data request, the first controller finds that the target data is not stored in the cache, but the target data is stored in the cache of the third controller, and the step of executing S310.
  • receiving the third read data request may be any one of the controllers in the storage system, and if receiving the third controller of the third read data request, the third controller may directly cache the Sending target data to the host does not need to perform steps S310-S311; if receiving the third read data request is another controller in the storage system, the operating step and the first controller receive the third read data The request is similar.
  • Step S310 The first controller sends a data read command to the third controller, where the data read command includes a start address and a length of the target data, and is used to request the third controller to send the target data. .
  • Step S311 The third controller sends the target data to the first controller.
  • the data channel between the controllers uses a high-speed data transmission channel.
  • the access speed of the cache data between the controllers is generally less than lms.
  • the speed of reading target data from disk is 6-10ms. Therefore, even across controller hits, the speed is much faster than reading data from disk.
  • Step S312 After receiving the target data sent by the third controller, the first controller sends the target data to the host, that is, the cache hit is implemented.
  • the first controller may further determine, according to the information carried in the third read data request, a controller corresponding to the third read data request, and send, to the controller, the drop information of the third read data request, so that The prefetch management unit of the controller continues to predict the data to be read of the next read data request, and performs an operation of buffering the data.
  • the process may repeat steps S301 to S308, and details are not described herein again.
  • the first controller determines the second controller according to the address information carried by the read data request, and sends the address information to the second
  • the controller obtains target data to be read according to the address information by the second controller to perform an operation of reading the target data to the cache. Since the controller performing the operation of obtaining the target data to be read is determined by the address information carried by the read data request, at a logical address
  • the read data request generated by the surface can be analyzed centrally by a controller. For this logical address, the obtained read data request information is comprehensive, so the target data to be read can be accurately predicted and read. In the cache.
  • FIG. 8 it is a structural diagram of a storage system 80 according to an embodiment of the present invention, which includes multiple controllers, where each controller includes a processor and a cache; :
  • the first controller 801 is configured to receive a read data request sent by the host, where the read data request carries the address information, determine the second controller 802 according to the address information carried by the read data request, and send the second controller 802 to the second controller 802.
  • the address information is performed by the processor in the first controller 801.
  • the address information includes a start address and a length of the data to be read, and the controller corresponding to the read data request is obtained according to the set hash algorithm according to the start address of the data to be read.
  • each controller includes at least one prefetch management unit.
  • the number of prefetch management units included in each controller is substantially equal, and each prefetch The snap-in is used to manage storage space for a range of addresses, such as a section of the LU.
  • the controller corresponding to the first read data request may be obtained according to the LBA of the first data to be read according to the consistency hash algorithm or other hash algorithm, and then the prefetch management unit in the controller is obtained.
  • the controller corresponding to the first read data request determines, and then the prefetch management unit corresponding to the first read data request is determined; when the controller includes multiple prefetches
  • each prefetch management unit manages the storage space of a range of addresses, so it is also possible to uniquely determine a prefetch management unit in a controller based on the LBA.
  • the controller corresponding to the first data to be read is a second controller.
  • a hash algorithm may be used to uniquely determine a controller by inputting a starting address, and the hashing algorithm may be a consistent hashing algorithm.
  • each controller of the storage system may save a preset configuration table, where the configuration table includes a correspondence between a starting address and each controller, and the controller that receives the read data request may be configured according to The start address carried in the read data request is queried in the configuration table to obtain a controller corresponding to the start address.
  • the configuration table may be saved in only one controller.
  • the controller may send a query request to the controller that saves the configuration table, where the query request includes the read data request to carry. a starting address, so that the controller that saves the configuration table can perform a query in the configuration table according to the starting address, thereby obtaining a controller corresponding to the starting address, and sending the query result to the received read data. Requested controller.
  • a copy of the configuration table may be saved in another controller of the storage system.
  • the controller corresponding to the start address may be obtained by using a modulo method. Specifically, the start address is divided by the number of controllers, and the corresponding control is obtained according to the calculated mode. Device.
  • the first controller 801 determines the second controller according to the address information carried by the read data request.
  • the address information can be sent to the second controller 802.
  • the second controller 802 is configured to obtain address information of the target data to be read according to the address information, to read the target data into the cache according to the address information of the target data. Specifically, the above operation is performed by the processor in the first controller 801.
  • the second controller 802 may read the target data to the cache of the second controller 802 according to the address information of the target data.
  • sending a prefetch command to the third controller 803 according to the address information of the target data and the third controller 803 reads the target data to the cache of the third controller 803 according to the address information of the target data. in.
  • the second controller 802 can use the prefetch management unit to obtain target data to be read.
  • the specific obtaining method is similar to the method embodiment described above, and details are not described herein again.
  • the first controller 801 receives a next read data request sent by the host, where the data to be read of the next read data request is the target data, or the data to be read is a part of the target data.
  • the first controller 801 finds that the target data is not stored in the cache, but the third controller 803 stores the target data in the cache, and may go to the third controller 803. And sending a data read command, where the data read command includes a start address and a length of the target data, and is used to request the third controller 803 to send the target data.
  • the third controller 803 transmits the target data to the first controller 801.
  • next read data request is not limited to the read data request received immediately by the first controller, and the read data request received after the read data request may be referred to as the next read data request.
  • the access speed of the cache data between the controllers is generally less than lms. However, if you can't cache hits, the target data is read from disk at 6-10ms. Therefore, even if it is hit across controllers, its speed is much greater than the speed of reading data from disk.
  • the first controller determines the second controller according to the address information carried by the read data request, and sends the address information to the second
  • the controller obtains target data to be read according to the address information by the second controller to perform an operation of reading the target data to the cache. Since the controller performing the operation of obtaining the target data to be read is determined by the address information carried by the read data request, the read data request occurring above a logical address can be collectively analyzed by a controller for this logical address. In other words, the obtained information of the read data request is comprehensive, so the target data to be read can be accurately predicted and read into the cache.
  • aspects of the present invention, or possible implementations of various aspects may be embodied as a system, method, or computer program product.
  • aspects of the invention, or possible implementations of various aspects may employ an entirely hardware embodiment, full software Embodiments (including firmware, resident software, etc.), or a combination of software and hardware aspects, are collectively referred to herein as "circuits,""modules," or “systems.”
  • aspects of the invention, or possible implementations of various aspects may take the form of a computer program product, which is a computer readable program code stored on a computer readable medium.
  • the computer readable medium can be a computer readable signal medium or a computer readable storage medium.
  • the computer readable storage medium includes, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or device, or any suitable combination of the foregoing, such as random access memory (RAM), read only memory (ROM), Erase programmable read-only memory (EPROM or flash memory), optical fiber, portable read-only memory (CD-ROM:).
  • the processor in the computer reads the computer readable program code stored in the computer readable medium, such that the processor can perform the functional actions specified in each step or combination of steps in the flowchart; A device that functions as specified in each block, or combination of blocks.
  • the computer readable program code can be executed entirely on the user's computer, partly on the user's computer, as a separate software package, partly on the user's computer and partly on the remote computer, or entirely on the remote computer or server.
  • the functions noted in the various steps of the flowchart, or in the blocks in the block diagrams may not occur in the order noted.
  • two steps, or two blocks, shown in succession may in fact be executed substantially simultaneously, or the blocks may sometimes be executed in the reverse order.

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Abstract

Provided in an embodiment of the present invention are a data caching method and storage system, the storage system comprising a plurality of controllers, and each controller including a cache. The method comprises: a first controller receives a data read request transmitted by a host, the data read request carrying address information; determining a second controller according to the address information carried by the data read request; transmitting the address information to the second controller; and according to the address information, the second controller acquires the address information of target data to be read, and reads the target data into cache according to the address information of the target data, thus realizing accurate forecast of target data to be read.

Description

緩存数据的方法和存储系统 技术领域  Method and storage system for caching data
本发明涉及存储技术, 尤其涉及一种緩存数据的方法和存储系统。 背景技术  The present invention relates to storage technologies, and in particular, to a method and a storage system for caching data. Background technique
高速緩冲存储器(简称緩存, 又称 cache ) , 是存储系统中 CPU与主存 储器(例如, 硬盘)之间的緩冲存储器, 体积比硬盘小, 但速度比硬盘快。 通常情况下, CPU在处理读数据请求时, 如果在緩存中找到可用数据 (称为 cache命中) , 则可立即返回该读数据请求的结果, 不命中时才将读数据请 求发送到硬盘中读写数据。 由于緩存访问的速度远大于硬盘读写的速度, 因 此 cache命中率越高, 存储系统的性能越高。 因此, 现有的做法是将 "即将 可能被访问到" 的数据提前读取到 cache中, 后续的读数据请求则可立即命 中, 这种做法就称之为预取。  The cache memory (also referred to as cache) is a buffer memory between the CPU and the main memory (for example, a hard disk) in the storage system. The volume is smaller than the hard disk, but the speed is faster than the hard disk. Normally, when the CPU processes the read data request, if the available data is found in the cache (called a cache hit), the result of the read data request can be immediately returned. When the miss occurs, the read data request is sent to the hard disk for reading. Write data. Since the cache access speed is much faster than the hard disk read and write speed, the higher the cache hit ratio, the higher the performance of the storage system. Therefore, the existing practice is to read the data that is "may be accessed" to the cache in advance, and the subsequent read data request can be hit immediately. This is called prefetching.
对于包含多个控制器的存储系统,如果多个控制器是主 /备 ( A/P )模式, 即只有一个控制器处于工作状态,那么对一个存储系统来说,其保存在 cache 里面的数据都会集中存储在该控制器的 cache中, 因此可以通过对读数据请 求进行顺序流识别来进行 cache数据的预取。 然而, 如果多个控制器是主 / 主(A/A )模式, 每个控制器都处于工作状态, 读数据请求可能会被分发到 各个控制器上, 因此每个控制器对读数据请求进行顺序流识别从而进行预取 时, 所依据的信息不够全面, 因此预取的数据不够准确。 发明内容  For a storage system with multiple controllers, if multiple controllers are in primary/standby (A/P) mode, that is, only one controller is in working state, then for a storage system, it stores the data in the cache. It is stored centrally in the cache of the controller, so the cache data can be prefetched by sequential stream identification of the read data request. However, if multiple controllers are in master/master (A/A) mode, each controller is active and read data requests may be distributed to each controller, so each controller makes a read data request. When the sequential stream is identified for prefetching, the information on which it is based is not comprehensive enough, so the prefetched data is not accurate enough. Summary of the invention
本发明实施例提供一种緩存数据的方法以及存储系统, 以实现在存储 系统包括多个控制器的情况下, 准确地预测待读取的目标数据。  Embodiments of the present invention provide a method for caching data and a storage system to accurately predict target data to be read in a case where the storage system includes a plurality of controllers.
本发明实施例第一方面提供了一种緩存数据的方法, 所述方法应用于存 储系统中, 所述存储系统包括多个控制器, 其中, 每个控制器包括緩存; 所述方法包括: A first aspect of the embodiments of the present invention provides a method for buffering data, where the method is applied to save In the storage system, the storage system includes a plurality of controllers, wherein each controller includes a cache; and the method includes:
第一控制器接收主机发送的读数据请求, 所述读数据请求携带地址信 息; 根据所述读数据请求携带的地址信息确定第二控制器; 向所述第二控 制器发送所述地址信息;  The first controller receives the read data request sent by the host, the read data request carries the address information, determines the second controller according to the address information carried by the read data request, and sends the address information to the second controller;
所述第二控制器根据所述地址信息获得待读取的目标数据的地址信息, 以根据所述目标数据的地址信息将所述目标数据读取到緩存中。  The second controller obtains address information of the target data to be read according to the address information, to read the target data into the cache according to the address information of the target data.
在本发明实施例第一方面的第一种实施方式中,所述读数据请求携带的 地址信息包括所述读数据请求携带的起始地址;  In a first implementation manner of the first aspect of the embodiment, the address information carried by the read data request includes a start address carried by the read data request.
所述根据所述读数据请求携带的地址信息确定第二控制器包括: 根据所述读数据请求携带的起始地址, 按照设定的散列算法, 确定第二 控制器。  Determining the second controller according to the address information carried by the read data request comprises: determining, according to the set hash algorithm, the second controller according to the starting address carried by the read data request.
结合本发明实施例第一方面的第一种实施方式, 在本发明实施例第一方 面的第二种实施方式中, 所述设定的散列算法包括一致性哈希算法。  With reference to the first embodiment of the first aspect of the embodiments of the present invention, in the second implementation manner of the first aspect of the embodiment of the present invention, the set hash algorithm includes a consistent hash algorithm.
在本发明实施例第一方面的第三种实施方式中,所述读数据请求携带的 地址信息包括所述读数据请求携带的起始地址;  In a third implementation manner of the first aspect of the embodiment, the address information carried by the read data request includes a start address carried by the read data request.
所述根据所述读数据请求携带的地址信息确定第二控制器包括: 根据所述起始地址查询预设的配置表, 获得所述起始地址对应的第二控 制器。  Determining the second controller according to the address information carried in the read data request comprises: querying a preset configuration table according to the start address, and obtaining a second controller corresponding to the start address.
在本发明实施例第一方面的第四种实施方式中, 所述根据所述目标数据 的地址信息将所述目标数据读取到緩存中包括:  In a fourth implementation manner of the first aspect of the embodiments of the present disclosure, the reading the target data into the cache according to the address information of the target data includes:
所述第二控制器根据所述目标数据的地址信息将所述目标数据读取到所 述第二控制器的緩存中。  The second controller reads the target data into a cache of the second controller according to address information of the target data.
在本发明实施例第一方面的第五种实施方式中, 所述根据所述目标数据 的地址信息将所述目标数据读取到緩存中包括:  In a fifth implementation manner of the first aspect of the embodiments of the present disclosure, the reading, by the address information of the target data, the target data into the cache includes:
所述第二控制器根据所述目标数据的地址信息确定所述目标数据对 应的第三控制器; 向所述第三控制器发送预取命令, 所述预取命令包括所 述目标数据的地址信息; Determining, by the second controller, the target data pair according to address information of the target data a third controller; sending a prefetch command to the third controller, the prefetch command including address information of the target data;
所述第三控制器根据所述目标数据的地址信息将所述目标数据读取 到所述第三控制器的緩存中。  The third controller reads the target data into a cache of the third controller according to address information of the target data.
本发明实施例第二方面提供了一种存储系统, 包括:  A second aspect of the embodiments of the present invention provides a storage system, including:
第一控制器用于接收主机发送的读数据请求, 所述读数据请求携带地 址信息; 根据所述读数据请求携带的地址信息确定第二控制器; 向所述第 二控制器发送所述地址信息;  The first controller is configured to receive a read data request sent by the host, where the read data request carries address information, determine a second controller according to the address information carried by the read data request, and send the address information to the second controller. ;
所述第二控制器用于根据所述地址信息获得待读取的目标数据的地址信 息, 以根据所述目标数据的地址信息将所述目标数据读取到緩存中。  The second controller is configured to obtain address information of the target data to be read according to the address information, to read the target data into the cache according to the address information of the target data.
在本发明实施例第二方面的第一种实施方式中, 所述读数据请求携带 的地址信息包括所述读数据请求携带的起始地址;  In a first implementation manner of the second aspect of the embodiment, the address information carried by the read data request includes a start address carried by the read data request.
所述第一控制器具体用于根据所述读数据请求携带的起始地址, 按照设 定的散列算法, 确定第二控制器。  The first controller is specifically configured to determine the second controller according to the set hash algorithm according to the starting address carried by the read data request.
结合本发明实施例第二方面的第一种实施方式, 在本发明实施例第二 方面的第二种实施方式中, 所述设定的散列算法包括一致性哈希算法。  With reference to the first embodiment of the second aspect of the embodiments of the present invention, in the second implementation manner of the second aspect of the embodiment, the set hash algorithm includes a consistent hash algorithm.
在本发明实施例第二方面的第三种实施方式中, 所述读数据请求携带 的地址信息包括所述读数据请求携带的起始地址;  In a third implementation manner of the second aspect of the embodiment, the address information carried by the read data request includes a start address carried by the read data request.
所述第一控制器具体用于根据所述起始地址查询预设的配置表, 获得所 述起始地址对应的第二控制器。  The first controller is specifically configured to query a preset configuration table according to the start address, and obtain a second controller corresponding to the start address.
在本发明实施例第二方面的第四种实施方式中, 所述第二控制器还用 于根据所述目标数据的地址信息将所述目标数据读取到所述第二控制器的緩 存中。  In a fourth implementation manner of the second aspect of the embodiment, the second controller is further configured to: read the target data into a cache of the second controller according to the address information of the target data. .
在本发明实施例第二方面的第五种实施方式中, 所述系统还包括第三 控制器;  In a fifth implementation manner of the second aspect of the embodiment, the system further includes a third controller;
所述第二控制器还用于根据所述目标数据的地址信息确定所述目标数 据对应的第三控制器; 向所述第三控制器发送预取命令, 所述预取命令包 括所述目标数据的地址信息; The second controller is further configured to determine the target number according to the address information of the target data. And corresponding to the third controller; sending a prefetch command to the third controller, where the prefetch command includes address information of the target data;
所述第三控制器用于根据所述目标数据的地址信息将所述目标数据读 取到所述第三控制器的緩存中。  The third controller is configured to read the target data into a cache of the third controller according to the address information of the target data.
在本发明实施例中, 在第一控制器接收到主机发送的读数据请求后, 根 据所述读数据请求携带的地址信息确定第二控制器, 并将所述地址信息发送 给所述第二控制器, 由第二控制器根据地址信息获得待读取的目标数据, 以 执行读取所述目标数据到緩存的操作。 由于执行获得待读取的目标数据的操 作的控制器是由读数据请求携带的地址信息确定的, 因此在一段逻辑地址上 面发生的读数据请求可以由一个控制器集中分析, 对于这段逻辑地址来说, 所获得的读数据请求的信息是全面的, 因此可以准确地预测待读取的目标数 据, 并读取到緩存中。 附图说明  In the embodiment of the present invention, after receiving the read data request sent by the host, the first controller determines the second controller according to the address information carried by the read data request, and sends the address information to the second The controller obtains target data to be read according to the address information by the second controller to perform an operation of reading the target data to the cache. Since the controller performing the operation of obtaining the target data to be read is determined by the address information carried by the read data request, the read data request occurring above a logical address can be collectively analyzed by a controller for this logical address. In other words, the obtained information of the read data request is comprehensive, so the target data to be read can be accurately predicted and read into the cache. DRAWINGS
为了更清楚地说明本发明实施例或现有技术中的技术方案, 下面将对实 施例或现有技术描述中所需要使用的附图作简单地介绍, 显而易见地, 下面 描述中的附图是本发明的一些实施例, 对于本领域普通技术人员来讲, 在不 付出创造性劳动性的前提下, 还可以根据这些附图获得其他的附图。  In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings to be used in the embodiments or the description of the prior art will be briefly described below. Obviously, the drawings in the following description are Some embodiments of the present invention may also be used to obtain other drawings based on these drawings without departing from the skilled artisan.
图 1 为本发明实施例提供的一种緩存数据的方法的应用网络架构示意 图;  1 is a schematic diagram of an application network architecture of a method for caching data according to an embodiment of the present invention;
图 2为本发明实施例提供的一种緩存数据的方法的流程图;  2 is a flowchart of a method for buffering data according to an embodiment of the present invention;
图 3为本发明实施例提供的另一种緩存数据的方法的流程图; 图 5为本发明实施例提供的数据预取单元中的数据块表的数据结构图; 图 6为本发明实施例提供的另一种緩存数据的方法的具体流程示意图; 图 7为本发明实施例提供的读数据请求与数据块的对应示意图; 图 8为本发明实施例提供的存储系统的结构示意图。 3 is a flowchart of another method for buffering data according to an embodiment of the present invention; FIG. 5 is a data structure diagram of a data block table in a data prefetching unit according to an embodiment of the present invention; A specific flow chart of another method for buffering data provided; FIG. 7 is a schematic diagram of correspondence between a read data request and a data block according to an embodiment of the present invention; FIG. 8 is a schematic structural diagram of a storage system according to an embodiment of the present invention.
具体实施方式 detailed description
为使本发明实施例的目的、 技术方案和优点更加清楚, 下面将结合本发 明实施例中的附图, 对本发明实施例中的技术方案进行清楚、 完整地描述, 显然, 所描述的实施例是本发明一部分实施例, 而不是全部的实施例。 基于 本发明中的实施例, 本领域普通技术人员在没有作出创造性劳动前提下所获 得的所有其他实施例, 都属于本发明保护的范围。  The technical solutions in the embodiments of the present invention are clearly and completely described in the following with reference to the accompanying drawings in the embodiments of the present invention. It is a partial embodiment of the invention, and not all of the embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative efforts are within the scope of the present invention.
本发明实施例的系统架构  System architecture of an embodiment of the present invention
本发明实施例提供的緩存数据的方法可以在存储系统上实现。 图 1为本 发明实施例提供的緩存数据的方法的系统架构示意图, 如图 1所示, 该存储 系统包括多个控制器(图中以包含 4个控制器为例)和存储设备。 本实施例 中, 存储设备以硬盘为例说明。  The method for buffering data provided by the embodiment of the present invention can be implemented on a storage system. FIG. 1 is a schematic diagram of a system architecture of a method for caching data according to an embodiment of the present invention. As shown in FIG. 1, the storage system includes multiple controllers (including four controllers as an example) and a storage device. In this embodiment, the storage device is illustrated by using a hard disk as an example.
图 1仅是示例性说明, 并不限定具体的组网方式, 如: 级联树形组网、 环状组网都可以。 只要控制器和存储设备之间能够相互通信。  FIG. 1 is only an exemplary description, and is not limited to a specific networking manner, such as: a cascading tree network or a ring network. As long as the controller and the storage device can communicate with each other.
控制器可以包括当前技术已知的任何计算设备, 如服务器、 台式计算机 等等。 在本发明实施例的一种应用场景中, 每个控制器都可以处理来自主机 的读数据请求, 也都可以访问存储设备中存储的数据, 比如将存储设备中的 数据读取出来, 存储在 cache中。 或者, 在另一种应用场景中, 每个控制器 都可以处理来自主机的读数据请求, 但是每个控制器对应存储设备中的一段 存储空间 (例如部分磁盘或者一个磁盘的部分存储空间) , 也就是说存储 设备中的每段存储空间都有其对应的特定的控制器, 不能被其他控制器管 理或者访问。 需要说明的是, 这里的存储设备是指磁盘、 硬盘或者其他存 储介质, 不包括控制器。  The controller can include any computing device known in the art, such as a server, desktop computer, and the like. In an application scenario of the embodiment of the present invention, each controller can process a read data request from a host, and can also access data stored in the storage device, for example, reading data in the storage device and storing the data in the storage device. Cache. Alternatively, in another application scenario, each controller can process read data requests from the host, but each controller corresponds to a segment of storage space in the storage device (eg, part of a disk or a portion of a disk's storage space), That is to say, each piece of storage space in the storage device has its corresponding specific controller and cannot be managed or accessed by other controllers. It should be noted that the storage device herein refers to a disk, a hard disk or other storage medium, and does not include a controller.
在控制器内部, 包含有緩存( cache ) , cache是 CPU和硬盘之间的緩冲 存储器,体积比硬盘小,但速度比硬盘快。 Cache中存储有部分数据, 当 CPU 在处理读数据请求时, 如果在 cache中找到可用数据, 即 cache命中。 每个控制器之间可以相互通信, 可以访问其他控制器的 cache中存储的 数据。 例如, 控制器 0接收到来自主机(图中未示出)访问数据 A的读数据 请求, 控制器 0的 cache中没有存储数据 A, 但控制器 1的 cache中存储有数 据 A,因此控制器 0可以向控制器 1发送数据读取命令,使得控制器 1从 cache 中读取数据 A, 并发送给控制器 0, 因此控制器 0就可以直接向主机返回数 据 A了。 需要说明的是, 由于 cache之间的数据通信是釆用高速数据传输通 道, 因此控制器之间 cache数据共享访问速度非常快, 与 cache未命中需要读 取存储设备中的数据相比, 从其他控制器的 cache中获得数据的过程所花费 的时间很短。 Inside the controller, there is a cache. The cache is a buffer between the CPU and the hard disk. It is smaller than the hard disk but faster than the hard disk. Some data is stored in the Cache. When the CPU processes the read data request, if the available data is found in the cache, it is a cache hit. Each controller can communicate with each other and can access data stored in the cache of other controllers. For example, the controller 0 receives a read data request from the host (not shown) to access the data A, and the cache 0 of the controller 0 does not store the data A, but the cache of the controller 1 stores the data A, so the controller 0 can send a data read command to the controller 1, so that the controller 1 reads the data A from the cache and sends it to the controller 0, so the controller 0 can directly return the data A to the host. It should be noted that since the data communication between the caches is a high-speed data transmission channel, the cache data sharing access speed between the controllers is very fast, compared with the cache misses that need to read the data in the storage device, from other The process of obtaining data in the controller's cache takes a short time.
控制器中安装有操作系统以及其他软件程序。 例如, 每个控制器中都包 含有至少一个预取管理单元, 在本发明实施例中, 每个控制器中所包含的预 取管理单元的数量大致相等。 每个预取管理单元用于执行一段地址范围的逻 辑存储空间数据读取操作。 这里的每个预取管理单元管理的逻辑存储空间, 可以是一个逻辑存储单元( Logic Unit Number, LU ) , 也可以是 LU 的一 段区域, 还可以是文件夹等, 在此不作限定。 预取管理单元在控制器中的分 布情况可以根据逻辑存储空间的地址范围来确定。 例如, 对于一个逻辑地址 (例如 Logic Block Address, LB A ) , 可以按照一致性哈希算法或者其他散列 存储设备可以包括当前技术已知的存储设备, 如 SSD、 或直接存取存储 器( Direct Access Storage Device , DASD )等。 存储设备的存储空间可以被划 分为若干个逻辑块(chunk ) , 每个 chunk具有唯一的 ID。 在本实施例中, 对 存储设备中的数据的管理是以 chunk为单位的, 例如可以以 chunk为单位将 数据读取到 cache中。  The operating system and other software programs are installed in the controller. For example, each controller includes at least one prefetch management unit, and in the embodiment of the present invention, the number of prefetch management units included in each controller is substantially equal. Each prefetch management unit is used to perform a logical storage space data read operation of an address range. The logical storage space managed by each of the prefetch management units may be a Logic Unit Number (LU), a LUN, or a folder, and is not limited thereto. The distribution of the prefetch management unit in the controller can be determined based on the address range of the logical storage space. For example, for a logical address (eg, Logic Block Address, LB A ), a consistent hash algorithm or other hash storage device may be included in a storage device known in the art, such as SSD, or direct access memory (Direct Access) Storage Device, DASD), etc. The storage space of the storage device can be divided into a number of logical chunks, each of which has a unique ID. In this embodiment, the management of the data in the storage device is in chunks, for example, the data can be read into the cache in units of chunks.
根据前面的描述可知, 在本发明实施例的一种应用场景中, 每个控制器 都可以对存储设备进行读写操作, 例如, 每个控制器都可以将存储设备中的 数据读取到自己的 cache里面,以执行后续的读数据请求时可以实现 cache命 中; 在另一种应用场景中, 每个控制器对应存储设备的一部分存储空间, 只 能对这部分存储空间中存储的数据进行读写操作, 例如将这部分存储空间中 存储的数据读取到自己的 cache中, 而该存储设备的其他存储空间中存储的 数据由其他控制器管理。 緩存数据的方法 According to the foregoing description, in an application scenario of the embodiment of the present invention, each controller can perform read and write operations on the storage device. For example, each controller can read data in the storage device to itself. Inside the cache, you can implement the cache life when executing subsequent read data requests. In another application scenario, each controller corresponds to a part of the storage space of the storage device, and can only read and write data stored in the part of the storage space, for example, reading data stored in the storage space. Go to your own cache, and the data stored in the other storage space of the storage device is managed by other controllers. Method of caching data
下面介绍本发明实施例提供的緩存数据的方法, 如图 2所示, 为本发明 实施例提供的緩存数据的方法的流程图, 所述方法应用于存储系统中, 所述 存储系统包括多个控制器, 其中, 每个控制器包括緩存; 所述方法包括: 步骤 S201 : 第一控制器接收主机发送的读数据请求, 所述读数据请求 携带地址信息; 根据所述读数据请求携带的地址信息确定第二控制器; 向 所述第二控制器发送所述地址信息。  The method for buffering data provided by the embodiment of the present invention is as follows. As shown in FIG. 2, a flowchart of a method for caching data according to an embodiment of the present invention is applied to a storage system, where the storage system includes multiple The controller, wherein each controller includes a cache; the method includes: Step S201: The first controller receives a read data request sent by the host, where the read data request carries address information; and the address carried according to the read data request The information determines a second controller; the address information is sent to the second controller.
可选的, 所述地址信息包括待读取数据的起始地址和长度, 可以根据待 读取数据的起始地址, 按照设定的散列算法, 获得所述读数据请求对应的第 二控制器。  Optionally, the address information includes a start address and a length of the data to be read, and the second control corresponding to the read data request may be obtained according to the set hash algorithm according to the start address of the data to be read. Device.
步骤 S202:所述第二控制器根据所述地址信息获得待读取的目标数据的 地址信息, 以根据所述目标数据的地址信息将所述目标数据读取到緩存中。  Step S202: The second controller obtains address information of the target data to be read according to the address information, to read the target data into the cache according to the address information of the target data.
可选的, 第二控制器根据所述地址信息获得待读取的目标数据的地址信 息后, 可以根据所述目标数据的地址信息将所述目标数据读取到第二控制器 的緩存中; 或者根据所述目标数据的地址信息向第三控制器发送预取命令, 第三控制器根据所述目标数据的地址信息将所述目标数据读取到第三控制器 的緩存中。  Optionally, after the second controller obtains the address information of the target data to be read according to the address information, the target data may be read into the cache of the second controller according to the address information of the target data; Or sending a prefetch command to the third controller according to the address information of the target data, and the third controller reads the target data into the cache of the third controller according to the address information of the target data.
可选的, 本发明实施例还可以应用在分布式系统中, 所述分布式系统包 括多个节点, 每个节点为一个服务器, 每个服务器执行的功能与存储系统中 的每个控制器类似, 在此不再赘述。  Optionally, the embodiment of the present invention may also be applied to a distributed system, where the distributed system includes multiple nodes, each node is a server, and each server performs functions similar to each controller in the storage system. , will not repeat them here.
需要说明的是, 所述第一控制器接收到的主机发送的读数据请求可以是 一个, 也可以是多个。 当读数据请求是多个时, 可以根据所述多个读数据请 求携带的地址信息判断所述多个读数据请求是否连续, 若连续, 则可以将所 述多个读数据请求进行合并, 得到一段连续的地址信息。 所述根据所述读数 据请求携带的地址信息确定第二控制器具体是指, 根据合并后连续的地址 信息确定第二控制器。 若所述多个读数据请求之间不连续, 则分别根据每 个读数据请求携带的地址信息确定第二控制器。 It should be noted that the read data request sent by the host received by the first controller may be One, or more than one. When the number of read data requests is multiple, the plurality of read data requests may be consecutively determined according to the address information carried by the plurality of read data requests, and if consecutive, the plurality of read data requests may be combined to obtain A continuous piece of address information. Determining, according to the address information carried by the read data request, the second controller specifically refers to determining the second controller according to the merged consecutive address information. If the plurality of read data requests are not consecutive, the second controller is determined according to the address information carried by each read data request.
在本发明实施例中, 在第一控制器接收到主机发送的读数据请求后, 根 据所述读数据请求携带的地址信息确定第二控制器, 并将所述地址信息发送 给所述第二控制器, 由第二控制器根据地址信息获得待读取的目标数据, 以 执行读取所述目标数据到緩存的操作。 由于执行获得待读取的目标数据的操 作的控制器是由读数据请求携带的地址信息确定的, 因此在一段逻辑地址上 面发生的读数据请求可以由一个控制器集中分析, 对于这段逻辑地址来说, 所获得的读数据请求的信息是全面的, 因此可以准确地预测待读取的目标数 据, 并读取到緩存中。 如图 3所示, 为本发明实施例提供的另一个緩存数据的方法的流程图, 为了方便描述, 本发明实施例以三个控制器为例, 但实际上并不限于三个 控制器。 参见图 3 , 具体执行下述步骤的可以是控制器中的处理器, 所述方 法包括:  In the embodiment of the present invention, after receiving the read data request sent by the host, the first controller determines the second controller according to the address information carried by the read data request, and sends the address information to the second The controller obtains target data to be read according to the address information by the second controller to perform an operation of reading the target data to the cache. Since the controller performing the operation of obtaining the target data to be read is determined by the address information carried by the read data request, the read data request occurring above a logical address can be collectively analyzed by a controller for this logical address. In other words, the obtained information of the read data request is comprehensive, so the target data to be read can be accurately predicted and read into the cache. As shown in FIG. 3, it is a flowchart of another method for buffering data provided by an embodiment of the present invention. For convenience of description, the embodiment of the present invention takes three controllers as an example, but is not limited to three controllers. Referring to FIG. 3, the following steps may be specifically performed by a processor in a controller, where the method includes:
步骤 S301 : 第一控制器接收主机发送的第一读数据请求, 所述第一读 数据请求携带第一待读取数据的地址信息, 其中所述地址信息包括第一待 读取数据的起始地址 (LBA ) 和长度。  Step S301: The first controller receives a first read data request sent by the host, where the first read data request carries address information of the first data to be read, where the address information includes a start of the first data to be read. Address (LBA) and length.
需要说明的是, 本发明实施例中的逻辑地址, 又称起始地址, 又称 LBA。  It should be noted that the logical address in the embodiment of the present invention, also called the starting address, is also called LBA.
步骤 S302: 第一控制器确定所述第一读数据请求对应的控制器。 在本发明实施例中, 每个控制器中都包含有至少一个预取管理单元, 在 本发明实施例中, 每个控制器中所包含的预取管理单元的数量大致相等, 每 个预取管理单元用于管理一段地址范围的存储空间, 例如 LU 的一段区域。 具体的, 可以根据第一待读取数据的 LBA, 按照一致性哈希算法或者其他散 列算法, 获得第一读数据请求对应的控制器, 进而获得该控制器中的预取管 理单元。 当控制器中包含一个预取管理单元时, 第一读数据请求对应的控制 器确定了, 那么第一读数据请求对应的预取管理单元也就确定了; 当控制器 中包含多个预取管理单元时, 每个预取管理单元管理一段地址范围的存储空 间, 因此也可以根据 LBA唯一确定一个控制器中的一个预取管理单元。 举例 来说, 所述第一待读取数据对应的控制器是第二控制器。 Step S302: The first controller determines a controller corresponding to the first read data request. In the embodiment of the present invention, each controller includes at least one prefetch management unit, In the embodiment of the present invention, the number of prefetch management units included in each controller is substantially equal, and each prefetch management unit is used to manage a storage space of an address range, such as a segment of the LU. Specifically, the controller corresponding to the first read data request may be obtained according to the LBA of the first data to be read according to the consistency hash algorithm or other hash algorithm, and then the prefetch management unit in the controller is obtained. When the controller includes a prefetch management unit, the controller corresponding to the first read data request determines, and then the prefetch management unit corresponding to the first read data request is determined; when the controller includes multiple prefetches When the unit is managed, each prefetch management unit manages the storage space of a range of addresses, so it is also possible to uniquely determine a prefetch management unit in a controller based on the LBA. For example, the controller corresponding to the first data to be read is a second controller.
散列算法, 又称哈希算法, 是指根据一定的关键(key )值确定唯一的访 问地址的一种数据结构, 其目的是加快查找。 其中, key是指起始地址。 可选 的, 通常的散列算法可以用一张散列表来实现, 根据 key值在散列表中进行 查找可以获得其对应的访问地址。 需要说明的是, 一般的散列算法是线性的 计算方式。 在本发明实施例中, 可以釆用散列算法通过起始地址的输入来唯 一确定一个控制器。  A hashing algorithm, also known as a hashing algorithm, is a data structure that determines a unique access address based on a certain key value, with the goal of speeding up the lookup. Where key is the starting address. Alternatively, the usual hashing algorithm can be implemented with a hash table, and the corresponding access address can be obtained by searching in the hash table according to the key value. It should be noted that the general hash algorithm is a linear calculation method. In an embodiment of the invention, a hash algorithm can be used to uniquely determine a controller by inputting a starting address.
可选的, 一致性散列算法可以釆用环形的数据结构实现 key值到访问位置 的定位。 在所述环形的数据结构中, 可以包含多个虚拟节点, 例如虚拟节点 0、 虚拟节点 1、 虚拟节点 2、 虚拟节点 3…虚拟节点 10, , 每个虚拟节点对 应一段访问地址。 其中每两个相邻的虚拟节点依次连接, 虚拟节点 10与虚拟 节点 0首尾连接, 共同组成一个环形。 以存储系统有三个控制器为例, 三个 控制器分别命名为控制器 A、 控制器 B和控制器 C, 每个控制器分别对应几 个环形数据结构中的虚拟节点, 例如控制器 A对应虚拟节点 0、 虚拟节点 1、 虚拟节点 2、 虚拟节点 3; 控制器 B对应虚拟节点 4、 虚拟节点 5、 虚拟节点 6、 虚拟节点 7; 控制器 C对应虚拟节点 8、 虚拟节点 9、 虚拟节点 10。 通过 这种方式, 也可以使起始地址唯一对应一个控制器。  Optionally, the consistent hash algorithm can use a circular data structure to implement the location of the key value to the access location. In the ring data structure, a plurality of virtual nodes may be included, such as virtual node 0, virtual node 1, virtual node 2, virtual node 3, virtual node 10, and each virtual node corresponds to an access address. Each of the two adjacent virtual nodes is connected in turn, and the virtual node 10 is connected to the virtual node 0 to form a ring. Take three controllers in the storage system as an example. The three controllers are named controller A, controller B, and controller C. Each controller corresponds to a virtual node in several ring data structures, for example, controller A corresponds. Virtual node 0, virtual node 1, virtual node 2, virtual node 3; controller B corresponds to virtual node 4, virtual node 5, virtual node 6, virtual node 7; controller C corresponds to virtual node 8, virtual node 9, virtual node 10. In this way, it is also possible to make the starting address unique to one controller.
然而, 对于一致性散列算法来说, 当存储系统增加新的控制器时, 例如增 加控制器 D, 无需重新排布数据结构或者修改算法, 仅需要调整每个控制器 对应虚拟节点, 就可以使新增的控制器 D对应一段起始地址。 However, for a consistent hash algorithm, when a new controller is added to the storage system, for example, With controller D, there is no need to rearrange the data structure or modify the algorithm. Only need to adjust the corresponding virtual node of each controller, so that the newly added controller D can correspond to a starting address.
可选的, 存储系统的每个控制器中可以保存一张预设的配置表, 所述配置 表包括起始地址与各个控制器之间的对应关系, 接收到读数据请求的控制器 可以根据读数据请求中携带的起始地址在配置表中进行查询, 从而获得所述 起始地址对应的控制器。  Optionally, each controller of the storage system may save a preset configuration table, where the configuration table includes a correspondence between a starting address and each controller, and the controller that receives the read data request may be configured according to The start address carried in the read data request is queried in the configuration table to obtain a controller corresponding to the start address.
可选的, 上述配置表可以仅仅保存在一个控制器中, 当其他控制器接收到 读数据请求时, 可以向保存配置表的控制器发送查询请求, 所述查询请求包 括所述读数据请求携带的起始地址, 使得所述保存配置表的控制器可以根据 所述起始地址在配置表中进行查询, 从而获得所述起始地址对应的控制器, 并将查询结果发送给接收到读数据请求的控制器。  Optionally, the configuration table may be saved in only one controller. When the other controller receives the read data request, the controller may send a query request to the controller that saves the configuration table, where the query request includes the read data request to carry. a starting address, so that the controller that saves the configuration table can perform a query in the configuration table according to the starting address, thereby obtaining a controller corresponding to the starting address, and sending the query result to the received read data. Requested controller.
可选的, 为了防止保存配置表的控制器发生故障时, 所述配置表丟失, 可 以在所述存储系统的另一个控制器中保存所述配置表的副本。  Optionally, in order to prevent the configuration table from being lost when the controller that saves the configuration table is lost, a copy of the configuration table may be saved in another controller of the storage system.
可选的,还可以通过取模的方式获得所述起始地址对应的控制器,具体的, 用所述起始地址除以控制器的个数, 根据计算出来的模即可获得对应的控制 器。  Optionally, the controller corresponding to the start address may be obtained by using a modulo method. Specifically, the start address is divided by the number of controllers, and the corresponding control is obtained according to the calculated mode. Device.
步骤 S303 : 第二控制器接收主机发送的第二读数据请求, 所述第二读 数据请求携带第二待读取数据的地址信息, 其中所述地址信息包括第二待 读取数据的起始地址 (LBA ) 和长度。  Step S303: The second controller receives a second read data request sent by the host, where the second read data request carries address information of the second data to be read, where the address information includes a start of the second data to be read. Address (LBA) and length.
需要说明的是, 步骤 S301和步骤 S303之间没有先后顺序之分。  It should be noted that there is no order between step S301 and step S303.
步骤 S304: 第二控制器确定所述第二读数据请求对应的控制器。  Step S304: The second controller determines a controller corresponding to the second read data request.
具体的, 可以根据第二待读取数据的 LBA获得其对应的控制器, 与 步骤 S302类似, 在此不再赘述。  Specifically, the corresponding controller may be obtained according to the LBA of the second data to be read, which is similar to step S302, and details are not described herein again.
当第一读数据请求对应的控制器与第二读数据请求对应的控制器不 相同时, 两个控制器可以分别进行緩存数据预取的操作, 互不影响。 这里 重点讨论第一读数据请求对应的控制器与第二读数据请求对应的控制器 相同的情况。 When the controller corresponding to the first read data request is different from the controller corresponding to the second read data request, the two controllers may respectively perform the operations of buffering data prefetching without affecting each other. Here, the controller corresponding to the first read data request and the controller corresponding to the second read data request are mainly discussed. The same situation.
步骤 S305: 第一控制器向第二控制器发送第一读数据请求的落点信 息, 所述落点信息包括第一待读取数据的地址信息, 此外, 落点信息还可 以包括发送第一读数据请求的主机的 ID, 以及第一控制器的 ID等, 所述 落点信息可以作为数据预取的分析依据。  Step S305: The first controller sends the landing information of the first read data request to the second controller, where the drop information includes address information of the first data to be read, and the drop information may further include sending the first The ID of the host that reads the data request, and the ID of the first controller, etc., and the drop point information can be used as an analysis basis for data prefetching.
由于第二读数据请求对应的控制器是第二控制器, 因此第二控制器的 处理器可以将第二读数据请求的落点信息存储在緩存中的地址推送给第 二控制器的预取管理单元, 或者以其他方式使得第二控制器的预取管理单 元获得第二读数据请求的落点信息, 在此不作限定。  Since the controller corresponding to the second read data request is the second controller, the processor of the second controller may push the address stored in the cache of the second read data request to the pre-fetch of the second controller. The management unit, or otherwise, causes the prefetch management unit of the second controller to obtain the drop information of the second read data request, which is not limited herein.
步骤 S306:第二控制器根据第一读数据请求的落点信息和第二读数据 请求的落点信息, 预测下一个读数据请求的目标数据。  Step S306: The second controller predicts the target data of the next read data request according to the drop point information of the first read data request and the drop point information of the second read data request.
下一个读数据请求是指存储系统即将接收的读数据请求(目前还没有 收到) , 为了方便描述, 将下一个读数据请求称作第三读数据请求。 需要 说明的是, 下一个读数据请求并不限于紧接着第一读数据请求、 第二读数 据请求的读数据请求, 只要是在第一读数据请求、 第二读数据请求之后接 收的读数据请求都可以称作下一个读数据请求。  The next read data request refers to the read data request that the storage system is about to receive (not yet received). For convenience of description, the next read data request is referred to as the third read data request. It should be noted that the next read data request is not limited to the read data request immediately following the first read data request and the second read data request, as long as the read data is received after the first read data request and the second read data request. The request can be called the next read data request.
第二控制器可以利用预取管理单元来预测第三读数据请求的目标数 据。 预取管理单元是控制器中包含的用于执行緩存数据读取操作的功能单 元, 如图 4所示, 预取管理单元包括: 数据块表、 接口和预取策略模块。 其中数据块表包含多个数据块, 每个数据块对应磁盘上的一个逻辑块 The second controller may utilize the prefetch management unit to predict the target data of the third read data request. The prefetch management unit is a function unit included in the controller for performing a cache data read operation. As shown in FIG. 4, the prefetch management unit includes: a data block table, an interface, and a prefetch policy module. Where the data block table contains a plurality of data blocks, each data block corresponding to a logical block on the disk
( chunk ) , 并且大小相同。 所述数据块用于记录读数据请求的落点信息 以及其他信息。 所述数据块表可以按照落点信息中包含的 LBA从小到大 排序, 或者从大到小排序。 另外, 本发明实施例的数据块表也可以不限于 表的形式, 还可以是红黑树, 或者二叉树等其他可以实现顺序查找的数据 管理结构。 需要说明的是, 每个数据块中记录的是读数据请求的落点信息 以及其他信息, 但不包括待读取数据本身。 另外, 接口用于接收其他控制 器发送的读数据请求的落点信息, 或者向其他控制器发送预取命令; 预取 策略模块用于根据设定的预取策略执行读取操作。 ( chunk ) , and the same size. The data block is used to record the landing information of the read data request as well as other information. The data block table may be sorted according to the LBAs included in the drop information, from small to large, or from large to small. In addition, the data block table of the embodiment of the present invention may not be limited to the form of a table, and may also be a red-black tree, or a binary tree or other data management structure that can implement sequential search. It should be noted that the data recorded in each data block is the landing information of the read data request and other information, but does not include the data to be read itself. In addition, the interface is used to receive other controls The drop information of the read data request sent by the device, or send a prefetch command to other controllers; the prefetch policy module is configured to perform a read operation according to the set prefetch policy.
如图 5所示, 每个数据块中记录的信息可以包括: Chunk ID、 落点信 息以及最近一次读取到的 chunk的 ID , 其中落点信息具体可以包括主机 ID、 控制器 ID、 LBA和长度;  As shown in FIG. 5, the information recorded in each data block may include: a Chunk ID, a drop point information, and an ID of a chunk that was last read, wherein the drop point information may specifically include a host ID, a controller ID, an LBA, and Length
所述 Chunk ID具体是指所述数据块所对应的磁盘上的 chunk的 ID , 用 Chunk ID乘以每个 chunk的大小可以获得 chunk的起始地址。 由于数 据的预取是以 chunk为单位的, 所以在预取目标数据时还需要知道目标数 据所在的 chunk的起始地址。 需要说明的是, 前面描述的 LBA是指读数 据请求的起始地址, 区别于所述 chunk的起始地址。 在某些情况下, 读数 据请求的起始地址与 chunk的起始地址相同, 但大多数情况, 读数据请求 的起始地址与 chunk的起始地址不相同。  The Chunk ID specifically refers to the ID of the chunk on the disk corresponding to the data block, and the Chunk ID is multiplied by the size of each chunk to obtain the starting address of the chunk. Since the prefetching of data is in chunks, it is also necessary to know the starting address of the chunk in which the target data is located when prefetching the target data. It should be noted that the LBA described above refers to the starting address of the request according to the request, which is different from the starting address of the chunk. In some cases, the start address of the request is the same as the start address of the chunk, but in most cases, the start address of the read data request is not the same as the start address of the chunk.
所述最近一次读取到的 chunk的 ID ,用于标识在所述数据块上发生的 上次的读取操作的预取范围, 由于在执行读取操作时, 都是以 chunk为单 位来执行的, 所以可以根据所述最近一次读取到的 chunk的 ID判断本次 预取是否与上次预取的范围有重叠, 如果有, 在执行读取操作时可以不包 含重叠部分的 chunk。  The ID of the most recently read chunk is used to identify the prefetch range of the last read operation occurring on the data block, since the read operation is performed in chunks. Therefore, it can be determined according to the ID of the chunk that was read last time whether the prefetching overlaps with the range of the last prefetch, and if so, the chunk of the overlapping portion may not be included when the reading operation is performed.
此外, 还可以记录读数据请求的序列号、 时间戳、 位图等信息。 如图 6所示, 步骤 S306具体可以包括以下步骤:  In addition, you can record the serial number, time stamp, bitmap, and other information of the read data request. As shown in FIG. 6, step S306 may specifically include the following steps:
S3061 : 根据第一读数据请求的落点信息和第二读数据请求的落点信 息, 确定第一读数据请求和第二读数据请求具有连续的顺序关系。  S3061: Determine, according to the falling point information of the first read data request and the falling point information of the second read data request, that the first read data request and the second read data request have a sequential order relationship.
具体的判断方法是, 根据第一读数据请求的起始地址和长度获得第一 读数据请求的末尾地址, 如果第一读数据请求的末尾地址和第二读数据请 求的起始地址连续, 则说明第一读数据请求和第二读数据请求具有连续的 顺序关系; 或者, 根据第二读数据请求的起始地址和长度获得第二读数据 请求的末尾地址, 如果第二读数据请求的末尾地址和第一读数据请求的起 始地址连续, 则说明第一读数据请求和第二读数据请求具有连续的顺序关 系。 The specific determination method is: obtaining the end address of the first read data request according to the start address and the length of the first read data request, if the end address of the first read data request and the start address of the second read data request are consecutive, Describe that the first read data request and the second read data request have a sequential order relationship; or, obtain the end address of the second read data request according to the start address and length of the second read data request, if the end of the second read data request Address and first read data request The start address is continuous, indicating that the first read data request and the second read data request have a sequential order relationship.
需要说明的是, 在本发明实施例中, 第一读数据请求和第二读数据请 求可以不绝对连续, 允许它们之间有一定程度的地址空隙。  It should be noted that, in the embodiment of the present invention, the first read data request and the second read data request may not be absolutely continuous, and a certain degree of address gap is allowed between them.
S3062: 确定第一读数据请求和第二读数据请求对应的数据块。  S3062: Determine a data block corresponding to the first read data request and the second read data request.
具体的, 可以根据第一读数据请求的落点信息和第二读数据请求的落 点信息, 确定第一读数据请求和第二读数据请求对应的数据块。 由于第一 读数据请求和第二读数据请求具有连续的顺序关系, 所以他们对应的数据 块也连续。 第一读数据请求和第二读数据请求对应的数据块可以如图 7所 示。  Specifically, the data block corresponding to the first read data request and the second read data request may be determined according to the drop information of the first read data request and the drop information of the second read data request. Since the first read data request and the second read data request have a sequential order relationship, their corresponding data blocks are also continuous. The data block corresponding to the first read data request and the second read data request may be as shown in FIG.
S3063 : 确定与所述第一读数据请求和第二读数据请求对应的数据块 连续的数据块, 得到数据块的最大连续段。  S3063: Determine a data block consecutive data block corresponding to the first read data request and the second read data request, to obtain a maximum continuous segment of the data block.
具体的, 可以根据第一读数据请求和第二读数据请求对应的数据块, 向前遍历所述数据块表, 若有数据块与第一读数据请求和第二读数据请求 对应的数据块连续, 则根据其连续的数据块上记录的落点信息判断上次发 生所述数据块上的读数据请求是否和当前的第一读数据请求、 第二读数据 请求连续, 若连续, 则继续在数据块表中获得连续的数据块, 直至获得与 所述第一读数据请求和第二读数据请求对应的数据块的最大连续段。  Specifically, the data block corresponding to the first read data request and the second read data request may be traversed forward, if the data block has a data block corresponding to the first read data request and the second read data request. Continuously, according to the falling point information recorded on the consecutive data blocks, it is determined whether the read data request on the data block last time is consecutive with the current first read data request and the second read data request, and if continuous, continue Consecutive data blocks are obtained in the data block table until a maximum contiguous segment of data blocks corresponding to the first read data request and the second read data request is obtained.
S3064: 获得目标数据的长度和起始地址。  S3064: Get the length and start address of the target data.
具体的, 可以根据步骤 S3063得到的数据块的最大连续段的大小, 经 过预取策略的计算, 得到目标数据的长度。  Specifically, according to the size of the largest continuous segment of the data block obtained in step S3063, the length of the target data is obtained by calculating the prefetching strategy.
可选的, 如果由所述最近一次读取到的 chunk的 ID获知, 目标数据 中的其中一部分在上次读取操作时被预取过, 那么可以除去这部分数据。  Optionally, if the ID of the chunk that was read last time is known, and part of the target data is prefetched during the last read operation, the data may be removed.
另外, 预测下一个读数据请求的目标数据, 除了确定目标数据的长度 以外, 还需要确定目标数据的起始地址。 在本实施例中, 目标数据的起始 地址为第一读数据请求的末尾地址或者第二读数据请求的末尾地址。 当第二控制器预测出下一个读数据请求的目标数据之后, 可以根据所 述目标数据的起始地址和长度从磁盘中读取所述目标数据, 存储在第二控 制器的 cache中, 以供下次执行第三读数据请求时可以 cache命中。 这种 情况主要适用于每个控制器均可以管理或者访问存储设备中的每个磁盘 的场景。 In addition, in order to predict the target data of the next read data request, in addition to determining the length of the target data, it is also necessary to determine the start address of the target data. In this embodiment, the start address of the target data is the end address of the first read data request or the end address of the second read data request. After the second controller predicts the target data of the next read data request, the target data may be read from the disk according to the start address and the length of the target data, and stored in the cache of the second controller, to A cache hit is available for the next execution of the third read data request. This situation is primarily applicable to scenarios where each controller can manage or access each disk in the storage device.
然而, 在某些应用场景中, 每个控制器只能管理或者访问存储设备中 的部分存储空间 (部分磁盘或者一个磁盘的部分存储空间) , 也就是说存 储设备中的每段存储空间都有其对应的特定的控制器, 不能被其他控制器 管理或者访问。 在这种情况下, 假设目标数据所在的存储空间是由第三控 制器管理的, 那么本实施例还可以包括:  However, in some application scenarios, each controller can only manage or access part of the storage space (partial disk or part of the storage space of a disk) in the storage device, that is, each storage space in the storage device has The corresponding specific controller cannot be managed or accessed by other controllers. In this case, if the storage space in which the target data is located is managed by the third controller, the embodiment may further include:
步骤 S307 : 第二控制器向第三控制器发送预取命令, 所述预取命令包 括目标数据的起始地址和长度, 使得第三控制器将所述目标数据读取到其 緩存中。  Step S307: The second controller sends a prefetch command to the third controller, where the prefetch command includes a start address and a length of the target data, so that the third controller reads the target data into its cache.
可选的, 第二控制器可以根据目标数据的起始地址确定所述目标数据 所在的存储空间是由第三控制器管理的, 因此可以向第三控制器发送数据 预取命令。具体的,第二控制器可以通过系统配置或者一些现有计算方法, 由目标数据的起始地址, 获得所述目标数据所在的存储空间对应的控制 器。  Optionally, the second controller may determine, according to the start address of the target data, that the storage space where the target data is located is managed by the third controller, so that the data prefetch command may be sent to the third controller. Specifically, the second controller may obtain a controller corresponding to the storage space where the target data is located by using a system configuration or some existing calculation methods, from a starting address of the target data.
步骤 S308 : 第三控制器预取所述目标数据到其緩存中。  Step S308: The third controller prefetches the target data into its cache.
具体的, 第三控制器可以根据所述目标数据的起始地址和长度, 从磁 盘中读取所述目标数据, 存储在第三控制器的 cache中。  Specifically, the third controller may read the target data from the disk according to the starting address and length of the target data, and store the data in the cache of the third controller.
步骤 S309 : 第一控制器接收主机发送的第三读数据请求, 所述第三读 数据请求的待读取数据是所述目标数据, 或者待读取数据是所述目标数据 的一部分。  Step S309: The first controller receives a third read data request sent by the host, where the data to be read requested by the third read data is the target data, or the data to be read is a part of the target data.
第一控制器接收所述第三读数据请求后, 发现其 cache中没有存储所 述目标数据, 但第三控制器的 cache中存储有所述目标数据, 执行步骤 S310。 After receiving the third read data request, the first controller finds that the target data is not stored in the cache, but the target data is stored in the cache of the third controller, and the step of executing S310.
可选的, 接收所述第三读数据请求的可以是存储系统中的任意一个控 制器, 若接收所述第三读数据请求的第三控制器, 则第三控制器可以直接 将其緩存中目标数据发送给所述主机, 不需执行步骤 S310-S311 ; 若接收 所述第三读数据请求的是存储系统中的其他控制器, 其操作步骤与第一控 制器接收所述第三读数据请求的情况相类似。  Optionally, receiving the third read data request may be any one of the controllers in the storage system, and if receiving the third controller of the third read data request, the third controller may directly cache the Sending target data to the host does not need to perform steps S310-S311; if receiving the third read data request is another controller in the storage system, the operating step and the first controller receive the third read data The request is similar.
步骤 S310: 第一控制器向第三控制器发送数据读取命令, 所述数据读 取命令包括所述目标数据的起始地址和长度, 用于要求所述第三控制器发 送所述目标数据。  Step S310: The first controller sends a data read command to the third controller, where the data read command includes a start address and a length of the target data, and is used to request the third controller to send the target data. .
步骤 S311 : 第三控制器向第一控制器发送所述目标数据。  Step S311: The third controller sends the target data to the first controller.
需要说明的是, 控制器之间的数据通道釆用的是高速数据传输通道, 据统计, 控制器间的 cache数据的访问速度一般小于 lms。 然而, 如果无 法 cache命中, 从磁盘读取目标数据的速度是 6-10ms。 因此, 即使是跨控 制器命中, 其速度也是远大于从磁盘读取数据的速度的。  It should be noted that the data channel between the controllers uses a high-speed data transmission channel. According to statistics, the access speed of the cache data between the controllers is generally less than lms. However, if there is no cache hit, the speed of reading target data from disk is 6-10ms. Therefore, even across controller hits, the speed is much faster than reading data from disk.
步骤 S312: 第一控制器接收第三控制器发送的目标数据后, 向主机发 送所述目标数据, 即实现了緩存命中。  Step S312: After receiving the target data sent by the third controller, the first controller sends the target data to the host, that is, the cache hit is implemented.
另外, 在本实施例中, 第一控制器还可以根据第三读数据请求携带的 信息确定第三读数据请求对应的控制器, 向该控制器发送第三读数据请求 的落点信息, 使得该控制器的预取管理单元继续预测下一个读数据请求的 待读取数据,执行緩存数据的操作。该过程可以重复步骤 S301-步骤 S308 , 这里不再赘述。  In addition, in this embodiment, the first controller may further determine, according to the information carried in the third read data request, a controller corresponding to the third read data request, and send, to the controller, the drop information of the third read data request, so that The prefetch management unit of the controller continues to predict the data to be read of the next read data request, and performs an operation of buffering the data. The process may repeat steps S301 to S308, and details are not described herein again.
在本发明实施例中, 在第一控制器接收到主机发送的读数据请求后, 根 据所述读数据请求携带的地址信息确定第二控制器, 并将所述地址信息发送 给所述第二控制器, 由第二控制器根据地址信息获得待读取的目标数据, 以 执行读取所述目标数据到緩存的操作。 由于执行获得待读取的目标数据的操 作的控制器是由读数据请求携带的地址信息确定的, 因此在一段逻辑地址上 面发生的读数据请求可以由一个控制器集中分析, 对于这段逻辑地址来说, 所获得的读数据请求的信息是全面的, 因此可以准确地预测待读取的目标数 据, 并读取到緩存中。 In the embodiment of the present invention, after receiving the read data request sent by the host, the first controller determines the second controller according to the address information carried by the read data request, and sends the address information to the second The controller obtains target data to be read according to the address information by the second controller to perform an operation of reading the target data to the cache. Since the controller performing the operation of obtaining the target data to be read is determined by the address information carried by the read data request, at a logical address The read data request generated by the surface can be analyzed centrally by a controller. For this logical address, the obtained read data request information is comprehensive, so the target data to be read can be accurately predicted and read. In the cache.
存储系统  Storage System
下面介绍本发明实施例提供的存储系统, 如图 8所示, 为本发明实施例 提供的存储系统 80的结构图, 包括多个控制器, 其中, 每个控制器包括处 理器和緩存; 其中:  The following describes the storage system provided by the embodiment of the present invention. As shown in FIG. 8 , it is a structural diagram of a storage system 80 according to an embodiment of the present invention, which includes multiple controllers, where each controller includes a processor and a cache; :
第一控制器 801用于接收主机发送的读数据请求, 所述读数据请求携 带地址信息; 根据所述读数据请求携带的地址信息确定第二控制器 802; 向所述第二控制器 802发送所述地址信息。 具体的, 执行上述操作的是第一 控制器 801中的处理器。  The first controller 801 is configured to receive a read data request sent by the host, where the read data request carries the address information, determine the second controller 802 according to the address information carried by the read data request, and send the second controller 802 to the second controller 802. The address information. Specifically, the above operation is performed by the processor in the first controller 801.
可选的, 所述地址信息包括待读取数据的起始地址和长度, 可以根据待 读取数据的起始地址, 按照设定的散列算法, 获得所述读数据请求对应的控 制器是第二控制器 802。  Optionally, the address information includes a start address and a length of the data to be read, and the controller corresponding to the read data request is obtained according to the set hash algorithm according to the start address of the data to be read. The second controller 802.
在本发明实施例中, 每个控制器中都包含有至少一个预取管理单元, 在 本发明实施例中, 每个控制器中所包含的预取管理单元的数量大致相等, 每 个预取管理单元用于管理一段地址范围的存储空间, 例如 LU 的一段区域。 具体的, 可以根据第一待读取数据的 LBA, 按照一致性哈希算法或者其他散 列算法, 获得第一读数据请求对应的控制器, 进而获得该控制器中的预取管 理单元。 当控制器中包含一个预取管理单元时, 第一读数据请求对应的控制 器确定了, 那么第一读数据请求对应的预取管理单元也就确定了; 当控制器 中包含多个预取管理单元时, 每个预取管理单元管理一段地址范围的存储空 间, 因此也可以根据 LBA唯一确定一个控制器中的一个预取管理单元。 举例 来说, 所述第一待读取数据对应的控制器是第二控制器。  In the embodiment of the present invention, each controller includes at least one prefetch management unit. In the embodiment of the present invention, the number of prefetch management units included in each controller is substantially equal, and each prefetch The snap-in is used to manage storage space for a range of addresses, such as a section of the LU. Specifically, the controller corresponding to the first read data request may be obtained according to the LBA of the first data to be read according to the consistency hash algorithm or other hash algorithm, and then the prefetch management unit in the controller is obtained. When the controller includes a prefetch management unit, the controller corresponding to the first read data request determines, and then the prefetch management unit corresponding to the first read data request is determined; when the controller includes multiple prefetches When the unit is managed, each prefetch management unit manages the storage space of a range of addresses, so it is also possible to uniquely determine a prefetch management unit in a controller based on the LBA. For example, the controller corresponding to the first data to be read is a second controller.
可选的,可以釆用散列算法通过起始地址的输入来唯一确定一个控制器, 所述散列算法可以是一致性散列算法。 可选的, 存储系统的每个控制器中可以保存一张预设的配置表, 所述配置 表包括起始地址与各个控制器之间的对应关系, 接收到读数据请求的控制器 可以根据读数据请求中携带的起始地址在配置表中进行查询, 从而获得所述 起始地址对应的控制器。 Optionally, a hash algorithm may be used to uniquely determine a controller by inputting a starting address, and the hashing algorithm may be a consistent hashing algorithm. Optionally, each controller of the storage system may save a preset configuration table, where the configuration table includes a correspondence between a starting address and each controller, and the controller that receives the read data request may be configured according to The start address carried in the read data request is queried in the configuration table to obtain a controller corresponding to the start address.
可选的, 上述配置表可以仅仅保存在一个控制器中, 当其他控制器接收到 读数据请求时, 可以向保存配置表的控制器发送查询请求, 所述查询请求包 括所述读数据请求携带的起始地址, 使得所述保存配置表的控制器可以根据 所述起始地址在配置表中进行查询, 从而获得所述起始地址对应的控制器, 并将查询结果发送给接收到读数据请求的控制器。  Optionally, the configuration table may be saved in only one controller. When the other controller receives the read data request, the controller may send a query request to the controller that saves the configuration table, where the query request includes the read data request to carry. a starting address, so that the controller that saves the configuration table can perform a query in the configuration table according to the starting address, thereby obtaining a controller corresponding to the starting address, and sending the query result to the received read data. Requested controller.
可选的, 为了防止保存配置表的控制器发生故障时, 所述配置表丟失, 可以在所述存储系统的另一个控制器中保存所述配置表的副本。  Optionally, in order to prevent the configuration table from being lost when the controller that saves the configuration table is lost, a copy of the configuration table may be saved in another controller of the storage system.
可选的, 还可以通过取模的方式获得所述起始地址对应的控制器, 具体 的, 用所述起始地址除以控制器的个数, 根据计算出来的模即可获得对应的 控制器。  Optionally, the controller corresponding to the start address may be obtained by using a modulo method. Specifically, the start address is divided by the number of controllers, and the corresponding control is obtained according to the calculated mode. Device.
第一控制器 801根据所述读数据请求携带的地址信息确定第二控制器 The first controller 801 determines the second controller according to the address information carried by the read data request.
802之后, 可以向所述第二控制器 802发送所述地址信息。 After 802, the address information can be sent to the second controller 802.
所述第二控制器 802用于根据所述地址信息获得待读取的目标数据的地 址信息, 以根据所述目标数据的地址信息将所述目标数据读取到緩存中。 具 体的, 执行上述操作的是第一控制器 801中的处理器。  The second controller 802 is configured to obtain address information of the target data to be read according to the address information, to read the target data into the cache according to the address information of the target data. Specifically, the above operation is performed by the processor in the first controller 801.
可选的, 第二控制器 802根据所述地址信息获得待读取的目标数据的地 址信息后, 可以根据所述目标数据的地址信息将所述目标数据读取到第二控 制器 802的緩存中; 或者根据所述目标数据的地址信息向第三控制器 803发 送预取命令, 第三控制器 803根据所述目标数据的地址信息将所述目标数据 读取到第三控制器 803的緩存中。  Optionally, after obtaining the address information of the target data to be read according to the address information, the second controller 802 may read the target data to the cache of the second controller 802 according to the address information of the target data. Or sending a prefetch command to the third controller 803 according to the address information of the target data, and the third controller 803 reads the target data to the cache of the third controller 803 according to the address information of the target data. in.
其中, 第二控制器 802可以利用预取管理单元来获得待读取的目标数 据。 具体的获得方法与上面描述的方法实施例类似, 这里不再赘述。 可选的, 第一控制器 801接收主机发送的下一个读数据请求, 所述下 一个读数据请求的待读取数据是所述目标数据, 或者待读取数据是所述目 标数据的一部分。 第一控制器 801接收所述下一个读数据请求后, 发现其 cache中没有存储所述目标数据,但第三控制器 803的 cache中存储有所述 目标数据, 则可以向第三控制器 803发送数据读取命令, 所述数据读取命 令包括所述目标数据的起始地址和长度, 用于要求所述第三控制器 803发 送所述目标数据。 第三控制器 803接收所述数据读取命令后, 向第一控制 器 801发送所述目标数据。 The second controller 802 can use the prefetch management unit to obtain target data to be read. The specific obtaining method is similar to the method embodiment described above, and details are not described herein again. Optionally, the first controller 801 receives a next read data request sent by the host, where the data to be read of the next read data request is the target data, or the data to be read is a part of the target data. After receiving the next read data request, the first controller 801 finds that the target data is not stored in the cache, but the third controller 803 stores the target data in the cache, and may go to the third controller 803. And sending a data read command, where the data read command includes a start address and a length of the target data, and is used to request the third controller 803 to send the target data. After receiving the data read command, the third controller 803 transmits the target data to the first controller 801.
需要说明的是, 下一个读数据请求并不限于紧接着所述第一控制器接 收的读数据请求, 只要是所述读数据请求之后接收的读数据请求都可以称 作下一个读数据请求。  It should be noted that the next read data request is not limited to the read data request received immediately by the first controller, and the read data request received after the read data request may be referred to as the next read data request.
由于控制器之间的数据通道釆用的是高速数据传输通道, 据统计, 控 制器间的 cache数据的访问速度一般小于 lms。 然而, 如果无法 cache命 中, 从磁盘读取目标数据的速度是 6-10ms。 因此, 即使是跨控制器命中, 其速度也是远大于从磁盘读取数据的速度的。  Since the data channel between the controllers uses a high-speed data transmission channel, according to statistics, the access speed of the cache data between the controllers is generally less than lms. However, if you can't cache hits, the target data is read from disk at 6-10ms. Therefore, even if it is hit across controllers, its speed is much greater than the speed of reading data from disk.
在本发明实施例中, 在第一控制器接收到主机发送的读数据请求后, 根 据所述读数据请求携带的地址信息确定第二控制器, 并将所述地址信息发送 给所述第二控制器, 由第二控制器根据地址信息获得待读取的目标数据, 以 执行读取所述目标数据到緩存的操作。 由于执行获得待读取的目标数据的操 作的控制器是由读数据请求携带的地址信息确定的, 因此在一段逻辑地址上 面发生的读数据请求可以由一个控制器集中分析, 对于这段逻辑地址来说, 所获得的读数据请求的信息是全面的, 因此可以准确地预测待读取的目标数 据, 并读取到緩存中。  In the embodiment of the present invention, after receiving the read data request sent by the host, the first controller determines the second controller according to the address information carried by the read data request, and sends the address information to the second The controller obtains target data to be read according to the address information by the second controller to perform an operation of reading the target data to the cache. Since the controller performing the operation of obtaining the target data to be read is determined by the address information carried by the read data request, the read data request occurring above a logical address can be collectively analyzed by a controller for this logical address. In other words, the obtained information of the read data request is comprehensive, so the target data to be read can be accurately predicted and read into the cache.
本领域普通技术人员将会理解, 本发明的各个方面、 或各个方面的可能 实现方式可以被具体实施为系统、 方法或者计算机程序产品。 因此, 本发明 的各方面、 或各个方面的可能实现方式可以釆用完全硬件实施例、 完全软件 实施例 (包括固件、驻留软件等等),或者组合软件和硬件方面的实施例的形 式, 在这里都统称为 "电路" 、 "模块" 或者 "系统" 。 此外, 本发明的各 方面、 或各个方面的可能实现方式可以釆用计算机程序产品的形式, 计算机 程序产品是指存储在计算机可读介质中的计算机可读程序代码。 Those of ordinary skill in the art will appreciate that various aspects of the present invention, or possible implementations of various aspects, may be embodied as a system, method, or computer program product. Thus, aspects of the invention, or possible implementations of various aspects, may employ an entirely hardware embodiment, full software Embodiments (including firmware, resident software, etc.), or a combination of software and hardware aspects, are collectively referred to herein as "circuits,""modules," or "systems." Furthermore, aspects of the invention, or possible implementations of various aspects, may take the form of a computer program product, which is a computer readable program code stored on a computer readable medium.
计算机可读介质可以是计算机可读信号介质或者计算机可读存储介质。 计算机可读存储介质包含但不限于电子、 磁性、 光学、 电磁、 红外或半导体 系统、 设备或者装置, 或者前述的任意适当组合, 如随机存取存储器 (RAM), 只读存储器 (ROM)、 可擦除可编程只读存储器 (EPROM或者快闪 存储器)、 光纤、 便携式只读存储器 (CD-ROM:)。  The computer readable medium can be a computer readable signal medium or a computer readable storage medium. The computer readable storage medium includes, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, device, or device, or any suitable combination of the foregoing, such as random access memory (RAM), read only memory (ROM), Erase programmable read-only memory (EPROM or flash memory), optical fiber, portable read-only memory (CD-ROM:).
计算机中的处理器读取存储在计算机可读介质中的计算机可读程序代 码, 使得处理器能够执行在流程图中每个步骤、 或各步骤的组合中规定的功 能动作;生成实施在框图的每一块、或各块的组合中规定的功能动作的装置。  The processor in the computer reads the computer readable program code stored in the computer readable medium, such that the processor can perform the functional actions specified in each step or combination of steps in the flowchart; A device that functions as specified in each block, or combination of blocks.
计算机可读程序代码可以完全在用户的计算机上执行、 部分在用户的计 算机上执行、 作为单独的软件包、 部分在用户的计算机上并且部分在远程计 算机上, 或者完全在远程计算机或者服务器上执行。 也应该注意, 在某些替 代实施方案中, 在流程图中各步骤、 或框图中各块所注明的功能可能不按图 中注明的顺序发生。 例如, 依赖于所涉及的功能, 接连示出的两个步骤、 或 两个块实际上可能被大致同时执行, 或者这些块有时候可能被以相反顺序执 行。  The computer readable program code can be executed entirely on the user's computer, partly on the user's computer, as a separate software package, partly on the user's computer and partly on the remote computer, or entirely on the remote computer or server. . It should also be noted that in some alternative implementations, the functions noted in the various steps of the flowchart, or in the blocks in the block diagrams, may not occur in the order noted. For example, depending on the functionality involved, two steps, or two blocks, shown in succession may in fact be executed substantially simultaneously, or the blocks may sometimes be executed in the reverse order.

Claims

权 利 要 求 书 claims
1、 一种緩存数据的方法, 所述方法应用于存储系统中, 所述存储系统 包括多个控制器, 其中, 每个控制器包括緩存; 其特征在于, 所述方法包 括: 1. A method of caching data. The method is applied to a storage system. The storage system includes multiple controllers, where each controller includes a cache; characterized in that the method includes:
第一控制器接收主机发送的读数据请求, 所述读数据请求携带地址信 息; 根据所述读数据请求携带的地址信息确定第二控制器; 向所述第二控 制器发送所述地址信息; The first controller receives a read data request sent by the host, and the read data request carries address information; determines the second controller based on the address information carried by the read data request; sends the address information to the second controller;
所述第二控制器根据所述地址信息获得待读取的目标数据的地址信息, 以根据所述目标数据的地址信息将所述目标数据读取到緩存中。 The second controller obtains the address information of the target data to be read according to the address information, and reads the target data into the cache according to the address information of the target data.
2、 根据权利要求 1 所述的方法, 其特征在于, 所述读数据请求携带 的地址信息包括所述读数据请求携带的起始地址; 2. The method according to claim 1, characterized in that the address information carried in the read data request includes the starting address carried in the read data request;
所述根据所述读数据请求携带的地址信息确定第二控制器包括: 根据所述读数据请求携带的起始地址, 按照设定的散列算法, 确定第二 控制器。 Determining the second controller based on the address information carried in the read data request includes: determining the second controller based on the starting address carried in the read data request and according to the set hash algorithm.
3、 根据权利要求 2 所述的方法, 其特征在于, 所述设定的散列算法 包括一致性哈希算法。 3. The method according to claim 2, characterized in that the set hash algorithm includes a consistent hash algorithm.
4、 根据权利要求 1 所述的方法, 其特征在于, 所述读数据请求携带 的地址信息包括所述读数据请求携带的起始地址; 4. The method according to claim 1, characterized in that the address information carried in the read data request includes the starting address carried in the read data request;
所述根据所述读数据请求携带的地址信息确定第二控制器包括: 根据所述起始地址查询预设的配置表, 获得所述起始地址对应的第二控 制器。 Determining the second controller according to the address information carried in the read data request includes: querying a preset configuration table according to the starting address to obtain the second controller corresponding to the starting address.
5、 根据权利要求 1所述的方法, 其特征在于, 所述根据所述目标数据 的地址信息将所述目标数据读取到緩存中包括: 5. The method according to claim 1, characterized in that, reading the target data into the cache according to the address information of the target data includes:
所述第二控制器根据所述目标数据的地址信息将所述目标数据读取到所 述第二控制器的緩存中。 The second controller reads the target data into the cache of the second controller according to the address information of the target data.
6、 根据权利要求 1所述的方法, 其特征在于, 所述根据所述目标数据 的地址信息将所述目标数据读取到緩存中包括: 6. The method according to claim 1, characterized in that: according to the target data The address information to read the target data into the cache includes:
所述第二控制器根据所述目标数据的地址信息确定所述目标数据对 应的第三控制器; 向所述第三控制器发送预取命令, 所述预取命令包括所 述目标数据的地址信息; The second controller determines the third controller corresponding to the target data according to the address information of the target data; sends a prefetch command to the third controller, where the prefetch command includes the address of the target data. information;
所述第三控制器根据所述目标数据的地址信息将所述目标数据读取 到所述第三控制器的緩存中。 The third controller reads the target data into the cache of the third controller according to the address information of the target data.
7、 根据权利要求 6所述的方法, 其特征在于, 还包括: 7. The method according to claim 6, further comprising:
所述第一控制器接收所述主机发送的下一个读数据请求, 所述下一个读 数据请求包括所述目标数据的地址信息; The first controller receives the next read data request sent by the host, where the next read data request includes the address information of the target data;
根据所述目标数据的地址信息确定所述第三控制器的緩存中存储有所述 目标数据; Determine that the target data is stored in the cache of the third controller according to the address information of the target data;
向所述第三控制器发送数据读取命令, 使得所述第三控制器将所述目标 数据发送给所述第一控制器; Send a data read command to the third controller, causing the third controller to send the target data to the first controller;
向所述主机发送所述目标数据。 Send the target data to the host.
8、 根据权利要求 1 所述的方法, 其特征在于, 所述目标数据的地址 信息包括所述目标数据的起始地址和长度; 8. The method according to claim 1, wherein the address information of the target data includes the starting address and length of the target data;
所述第二控制器根据所述地址信息获得待读取的目标数据的地址信息包 括: The second controller obtains the address information of the target data to be read according to the address information, including:
所述第二控制器根据所述主机发送的读数据请求携带的地址信息, 确定 所述目标数据的起始地址; 以及 The second controller determines the starting address of the target data based on the address information carried in the read data request sent by the host; and
根据所述主机发送的读数据请求携带的地址信息, 确定数据块表中对应 的第一数据块, 以及与所述第一数据块连续的第二数据块; 根据所述第一数 据块和第二数据块的大小的总和, 获得所述目标数据的长度。 According to the address information carried in the read data request sent by the host, determine the corresponding first data block in the data block table and the second data block that is continuous with the first data block; According to the first data block and the third data block, The sum of the sizes of two data blocks is obtained to obtain the length of the target data.
9、 一种存储系统, 其特征在于, 所述系统包括: 9. A storage system, characterized in that the system includes:
第一控制器用于接收主机发送的读数据请求, 所述读数据请求携带地 址信息; 根据所述读数据请求携带的地址信息确定第二控制器; 向所述第 二控制器发送所述地址信息; The first controller is configured to receive a read data request sent by the host, where the read data request carries address information; determine the second controller according to the address information carried in the read data request; and send the data to the third controller. The second controller sends the address information;
所述第二控制器用于根据所述地址信息获得待读取的目标数据的地址信 息, 以根据所述目标数据的地址信息将所述目标数据读取到緩存中。 The second controller is configured to obtain the address information of the target data to be read according to the address information, and read the target data into the cache according to the address information of the target data.
10、 根据权利要求 9所述的系统, 其特征在于, 所述读数据请求携带 的地址信息包括所述读数据请求携带的起始地址; 10. The system according to claim 9, characterized in that the address information carried in the read data request includes the starting address carried in the read data request;
所述第一控制器具体用于根据所述读数据请求携带的起始地址, 按照设 定的散列算法, 确定第二控制器。 The first controller is specifically configured to determine the second controller according to the starting address carried in the read data request and according to the set hash algorithm.
11、根据权利要求 10所述的系统, 其特征在于, 所述设定的散列算法 包括一致性哈希算法。 11. The system according to claim 10, characterized in that the set hash algorithm includes a consistent hash algorithm.
12、 根据权利要求 9所述的系统, 其特征在于, 所述读数据请求携带 的地址信息包括所述读数据请求携带的起始地址; 12. The system according to claim 9, characterized in that the address information carried in the read data request includes the starting address carried in the read data request;
所述第一控制器具体用于根据所述起始地址查询预设的配置表, 获得所 述起始地址对应的第二控制器。 The first controller is specifically configured to query a preset configuration table according to the starting address to obtain the second controller corresponding to the starting address.
13、 根据权利要求 9所述的系统, 其特征在于, 所述第二控制器还用 于根据所述目标数据的地址信息将所述目标数据读取到所述第二控制器的緩 存中。 13. The system according to claim 9, wherein the second controller is further configured to read the target data into the cache of the second controller according to the address information of the target data.
14、 根据权利要求 9所述的系统, 其特征在于, 所述系统还包括第三 控制器; 14. The system according to claim 9, wherein the system further includes a third controller;
所述第二控制器还用于根据所述目标数据的地址信息确定所述目标数 据对应的第三控制器; 向所述第三控制器发送预取命令, 所述预取命令包 括所述目标数据的地址信息; The second controller is further configured to determine a third controller corresponding to the target data according to the address information of the target data; and send a prefetch command to the third controller, where the prefetch command includes the target data. The address information of the data;
所述第三控制器用于根据所述目标数据的地址信息将所述目标数据读 取到所述第三控制器的緩存中。 The third controller is configured to read the target data into the cache of the third controller according to the address information of the target data.
15、 根据权利要求 14所述的系统, 其特征在于, 15. The system according to claim 14, characterized in that,
所述第一控制器还用于接收所述主机发送的下一个读数据请求,所述下 一个读数据请求包括所述目标数据的地址信息; 根据所述目标数据的地址信息确定所述第三控制器的緩存中存储有所述 目标数据; The first controller is also configured to receive a next read data request sent by the host, where the next read data request includes address information of the target data; Determine that the target data is stored in the cache of the third controller according to the address information of the target data;
向所述第三控制器发送数据读取命令, 使得所述第三控制器将所述目标 数据发送给所述第一控制器; Send a data read command to the third controller, causing the third controller to send the target data to the first controller;
向所述主机发送所述目标数据。 Send the target data to the host.
16、 根据权利要求 9所述的系统, 其特征在于, 所述目标数据的地址 信息包括所述目标数据的起始地址和长度; 16. The system according to claim 9, wherein the address information of the target data includes the starting address and length of the target data;
所述第二控制器用于根据所述主机发送的读数据请求携带的地址信息 , 确定所述目标数据的起始地址; 以及 The second controller is configured to determine the starting address of the target data according to the address information carried in the read data request sent by the host; and
根据所述主机发送的读数据请求携带的地址信息, 确定数据块表中对应 的第一数据块, 以及与所述第一数据块连续的第二数据块; 根据所述第一数 据块和第二数据块的大小的总和, 获得所述目标数据的长度。 According to the address information carried in the read data request sent by the host, determine the corresponding first data block in the data block table and the second data block that is continuous with the first data block; According to the first data block and the third data block, The sum of the sizes of two data blocks is obtained to obtain the length of the target data.
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