WO2015037953A1 - Highly integrated filter type phase shifter - Google Patents

Highly integrated filter type phase shifter Download PDF

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Publication number
WO2015037953A1
WO2015037953A1 PCT/KR2014/008549 KR2014008549W WO2015037953A1 WO 2015037953 A1 WO2015037953 A1 WO 2015037953A1 KR 2014008549 W KR2014008549 W KR 2014008549W WO 2015037953 A1 WO2015037953 A1 WO 2015037953A1
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Prior art keywords
pass filter
inductor
transistor
parallel
low pass
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PCT/KR2014/008549
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French (fr)
Korean (ko)
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박철순
송인상
오인열
조성준
김홍이
이채준
이해진
이중호
윤종현
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한국과학기술원
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Publication of WO2015037953A1 publication Critical patent/WO2015037953A1/en

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/01Frequency selective two-port networks
    • H03H7/0153Electrical filters; Controlling thereof
    • H03H7/0161Bandpass filters
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/66Phase shifters
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H2240/00Indexing scheme relating to filter banks
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H2250/00Indexing scheme relating to dual- or multi-band filters

Definitions

  • the present invention relates to a phase shifter, and more particularly, to a phase shifter having low loss characteristics and a degree of integration by integrating a high pass filter having a smaller size than that of the low pass filter in a space of a low pass filter having a considerable size in a millimeter wave band.
  • Millimeter-wave and terahertz communications require beamforming techniques because of the high loss due to high frequencies and the difficulty of signal generation.
  • the beamforming technique uses an array antenna, and generates a beam in a desired direction by adjusting a phase of a signal excited by the antenna.
  • the most important block in beamforming technology is the phase shifter that controls the phase of the signal.
  • Phase shifter is a kind of circuit used for transmitting / receiving module. It is a key component for changing the phase of signal to phased array antenna. It is used for microwave antenna of satellite and satellite.
  • the phase shifter adjusts the length of the electrical signal in an electrical or physical manner. Since phase control through physical methods is large and slow, they are not suitable for small, high-speed operation, and electrical methods are mainly used in the millimeter wave and terahertz bands.
  • the phase shifter can be implemented in various ways.
  • a filter type phase shifter composed of a low pass filter and a high pass filter
  • a continuous phase shift cannot be generated as a single element, but it can have good phase shift characteristics in a relatively simple method.
  • power consumption is low and good linearity has been widely used in an array antenna system of millimeter wave band, which is difficult to obtain performance due to high complexity.
  • Due to the frequency characteristics of the filter structure a phase of 90 Hz or more cannot be generated, and the band characteristic of the filter deteriorates as it approaches 90 Hz. Therefore, in general, a high-pass filter and a low-pass filter are combined to implement a filter type phase shifter.
  • the conventional method simply puts two filters in parallel and takes a selective mode of operation through a single pole double throw (SPDT) switch, and the size of the two SPDT switches themselves is not negligible. However, it is not suitable for integration on silicon.
  • SPDT single pole double throw
  • a conventional filter-type phase shifter comprising a high pass filter composed of two capacitors and one inductor, and a low pass filter composed of two inductors and one capacitor, respectively, and an operation mode of the high pass filter and the low pass filter.
  • SPDT Single pole double throw
  • the phase shifter of the filter type as shown in FIG. 1 has been widely used due to its simple operating principle and ease of implementation.
  • two modes of a high pass filter and a low pass filter are separately configured, and they are selectively operated using two single pole double throw (SPDT) switches.
  • SPDT single pole double throw
  • FIG. 2 is a simulation result showing that the insertion loss characteristic of the ideal low pass filter deteriorates with increasing phase.
  • the filter can change phase up to 90 ⁇ , and as the amount of phase change increases, the overall filter performance deteriorates. Simulation results show that the insertion loss characteristics of the ideal lowpass filter without loss are increased by 20 ⁇ and the band characteristics deteriorate as the insertion phase increases. Occurs.
  • a single mode phase shifter to solve the size problem can be examined by adopting a structure in which a desired phase is changed to only one mode on silicon as shown in FIGS. 3 to 5. .
  • FIG. 3 is a filter type phase shifter implemented only in a low pass filter mode.
  • the inductor Ls and the capacitor Cp / 2 operate as a band stop filter and bypass the phase shifter. (bypass) It works.
  • the inductor Ls and the two capacitors Cp form a low pass filter to generate a required phase shift. .
  • FIG. 4 is an equivalent circuit of the bypass mode of the phase shifter of FIG. 3, in which the inductor Ls and the capacitor Cp / 2 operate as a band erasing filter, and thus an applied signal is transmitted through the turned on first transistor T1. do.
  • FIG. 5 is an equivalent circuit diagram of a phase shifter of the low pass filter type of FIG. 3. The phase change required by the inductor Ls and the two capacitors Cp occurs.
  • the single mode phase shifter as shown in Figs. 3 to 5 causes degradation of the overall performance by implementing all required phases in one mode, which is a more serious problem in high loss bands such as millimeter wave bands. .
  • the phase shifter of the single mode must be solved because the phase shifter of 360 mode is realized by connecting several phases in series rather than operating as a single element. I think it's a task to do.
  • An object of the present invention is to provide a filter type phase shifter in which a high pass filter is integrated inside a low pass filter to improve low loss characteristics and integration as a phase shifter operating in a millimeter wave band to solve the above problems.
  • the integrated filter type phase shifter according to the present invention for solving the above problems is a phase shifter in which both a high pass filter and a low pass filter are integrated on one chip, and an internal space between a series inductor and a parallel capacitor constituting the low pass filter.
  • the chip size is reduced by arranging a series capacitor and a parallel inductor constituting the high pass filter in a space.
  • a highly integrated filter type phase shifter is a phase shifter for shifting a phase by selectively operating a high pass filter and a low pass filter, wherein the high pass filter and the low pass filter selectively select an input signal.
  • a switching unit is provided to receive the switching unit, wherein the switching unit includes a transistor, an inductor connected in parallel between the drain terminal and the source terminal of the transistor, and a high resistance connected to the substrate of the transistor.
  • the highly integrated filter type phase shifter includes an inductor array and a capacitor array of various sizes, and the inductor array and the capacitor array are connected to each other by a plurality of switching elements, and then combined with a high pass filter or a low pass.
  • a filter is formed, and the plurality of switching elements selectively connect the inductor and the capacitor according to a control signal to operate the phase shifter as a high pass filter or a low pass filter.
  • the present invention has a high speed data communication characteristic when applied to a millimeter wave band mobile terminal by providing a small phase shifter having low power and low loss characteristics.
  • the reflection loss can be lowered to 10 dB or less at 55 GHz to 65 GHz, and the insertion loss is reduced to 3.8 dB and 4.4 dB in the low pass filter and the high pass filter mode, and has a phase shift characteristic of about 83 dB.
  • the present invention can solve the chip size by integrating the high pass filter inside the low pass filter, the size of the chip that must be increased to obtain the 90 kHz phase change characteristics.
  • the insertion loss is increased by parasitic capacitance when the switch is turned off, and thus the insertion loss is reduced through the inductor and the high resistance connected in parallel with the transistor. Has characteristics.
  • 1 is a filter type phase shifter of a general structure.
  • 2 is a graph of simulation results showing degradation of insertion loss characteristics with increasing phase in an ideal filter.
  • 3 is a filter type phase shifter implemented only in a low pass filter mode.
  • FIG. 4 is an equivalent circuit diagram of a reference state of a filter type phase shifter implemented only in a low pass filter mode.
  • Fig. 5 is an equivalent circuit diagram of a low pass filter state of a filter type phase shifter implemented only in the low pass filter mode.
  • phase shifter 6 is a phase shifter according to the present invention.
  • FIG. 7 is a switching device shown in FIG.
  • FIG. 8 is a layout diagram of a phase shifter according to the present invention.
  • FIG 9 is a graph showing the reflection loss and insertion loss characteristics of the phase shifter according to the present invention.
  • phase adjustment performance graph of the phase shifter according to the present invention is a phase adjustment performance graph of the phase shifter according to the present invention.
  • FIG. 6 is a highly integrated filter type phase shifter according to the present invention, and includes inductor arrays Ls1 and Lp1 having various sizes and capacitor arrays Cs1, Cs2, Cp1 and Cp2, and the inductor array and the capacitor array have a plurality of switching. element to form a high-pass filter or low-pass filters each connected in combination with (S1 ⁇ S5), the switching device of said plurality is selectively connected to the inductor and capacitor filter high-frequency group the phase shift in response to a control signal (V control) Or operate as a low pass filter.
  • V control control signal
  • the inductor with the low pass filter may overlap the inductor with the high pass filter, and the capacitor with the high pass filter may be used with the capacitor with the low pass filter, thereby realizing the high pass filter and the low pass filter in a small area.
  • the inductor or capacitor used in the low pass filter can be connected or disconnected by the switching element so that the filter can be used in the high pass filter. This can be more effective when a phase shifter array is used than one phase shifter.
  • the phase shifter may be implemented by a low pass filter, a high pass filter, a high pass filter switching unit (S1, S2), a low pass filter switching unit (S3, S4, S5), and a controller (INV).
  • the present invention is arranged between the series capacitors Cs1 and Cs2 and the parallel inductor Lp1 constituting the high pass filter between the series inductor Ls1 and the parallel capacitors Cp1 and Cp2 constituting the low pass filter.
  • the invention can reduce the chip size by the size. Referring to FIG. 8, since the size of the inductor is overwhelmingly larger than that of the capacitor in the millimeter wave band, the phase shifter of the present invention uses the minimum number of inductors of the low pass filter and the high pass filter, and increases the capacitor having a small area instead. In this way, the chip size can be reduced even though the filter is of the same order.
  • the low pass filter since the size of the inductor constituting the low pass filter is larger than that of the capacitor or the inductor or capacitor constituting the high pass filter, the low pass filter does not use two inductors and one capacitor.
  • the implementation makes the size of the phase shifter small.
  • the low pass filter is a pi-type filter that passes only the low frequency components of the input signal and delays the phase of the signal.
  • the low pass filter includes a series inductor Ls1 and two parallel capacitors Cp1 and Cp2.
  • the low pass filter adds more inductors and capacitors as the order increases. As the order increases, the filtering becomes sharper, resulting in better pass characteristics, but worse insertion loss or group delay, and larger filter size.
  • the low pass filter may be implemented as a low pass filter having different orders of two or more, including a capacitor and an inductor, as well as a third-order filter including one series inductor Ls1 and two parallel capacitors Cp1 and Cp2. .
  • the high pass filter is a tee (T) -type filter which passes only a high frequency component of an input signal and accelerates the phase of the signal, and includes two series capacitors Cs1 and Cs2 and one parallel inductor Lp1. As with the low pass filter, the high pass filter adds an additional number of inductors and capacitors.
  • the high pass filter may be implemented as a third order filter including two series capacitors Cs1 and Cs2 and one parallel inductor Lp1, as well as a high pass filter having two or more orders of magnitude including a capacitor and an inductor. .
  • the switching elements constituting the high pass filter switching units S1 and S2 and the low pass filter switching units S3, S4, and S5 use a switching element having a structure as shown in FIG. use. 7, the switching elements are implemented in the third transistor (T3), an inductor (Lr) and a high resistance (R body).
  • the parasitic capacitance and the band erasure filter are operated to prevent signal leakage caused by the parasitic capacitance.
  • the inductor Lr is connected in parallel with the drain and the source of the third transistor T3.
  • the inductor Lr When the third transistor T3 is in the on mode, since the inductor Lr has a sufficiently large value, the inductor Lr is connected in parallel with the third transistor T3 and thus, the operation of the third transistor T3 and The influence of the inductor Lr on the performance of the switching element is minimal.
  • the third transistor T3 When the third transistor T3 is in the off mode, the parasitic capacitance of the third transistor T3 is canceled by the inductance of the inductor Lr, thereby reducing the loss of a signal.
  • the third transistor T3 When the third transistor T3 is implemented in a CMOS process, when the signal passes, the leakage of the signal occurs to the substrate body of the third transistor T3, so that the substrate of the third transistor T3 is prevented.
  • the high resistance (R body ) is inserted into the high resistance (R body ) is formed inside the substrate to prevent leakage of the signal.
  • the high pass filter switching units S1 and S2 include a first switching element S1 for passing an input signal to the high pass filter and a second switching element S2 for transmitting the output signal of the high pass filter to the output pad.
  • the operation of the first switching element S1 and the second switching element S2 is simultaneously performed by a control signal.
  • the low-pass filter switching units S3, S4, and S5 may include a fourth switching element for transmitting a signal passing through the third switching element S3 and the parallel capacitor Cp to pass the input signal to the low-pass filter to the ground line. S4) and the fifth switching element S5.
  • the low loss characteristics can be improved by connecting the switching elements shown in FIG. 7 to the individual capacitors Cp and grounding them more reliably. Therefore, when operating in the low pass filter mode of the conventional phase shifter, it is possible to solve the problem that the loss characteristic caused by the grounded structure by combining the common nodes of the two capacitors together.
  • the controller INV may be implemented as an inverter INV that inverts and outputs the control signal V control .
  • the input terminal of the inverter INV is connected to a terminal for controlling one of the high pass filter switching units S1 and S2 or the low pass filter switching units S3, S4, and S5, and the output terminal of the inverter INV is rested. Connect with one controlling terminal.
  • the high pass filter and low pass filter can be controlled by one signal (V control ). For example, when the control signal V control is logic high, the high pass filter switching units S1 and S2 are operated in the on mode, so that the output signal of which the phase of the input signal is advanced by the high pass filter can be obtained.
  • the low pass filter switching units S3, S4, and S5 operate in the on mode, and thus the low pass filter may obtain an output signal having a delayed phase of the input signal.
  • the high pass filter switching units S1 and S2 are turned on, a signal is inputted to the high pass filter and the output signal is output with the phase advanced from the phase of the input signal, and the low pass filter switching units S3, S4, and S5 are turned on. In this state, the input signal is transmitted to the low pass filter and the output signal is delayed in phase than the phase of the input signal.
  • the phase change is realized as the difference between the advanced phase passing through the high pass filter and the delayed phase passing through the low pass filter.
  • phase shifter 8 is a layout diagram for manufacturing a phase shifter according to the present invention in a CMOS process.
  • the phase shifter of the present invention it is possible to implement a very small size of 0.47x0.36 mm 2 including the pad.
  • the series inductor Ls1 is formed by rotating a transmission line a predetermined number of times between the input pad and the output pad, and the parallel capacitors Cp1 and Cp2 are connected to the series inductor ( It is arrange
  • a parallel inductor Lp1 and a series capacitor Cs1 and Cs2 having a smaller size than the series inductor Ls1 are disposed in a space between the series inductor Ls1 and the parallel capacitors Cp1 and Cp2.
  • the high pass filter switching units S1 and S2 are disposed between the input pad and the series capacitor Cs1 and between the output pad and the series capacitor Cs2 and include an inductor connected in parallel to the transistor and the drain and the source of the transistor.
  • the high pass filter switching units S1 and S2 include a high resistance connected to the substrate to prevent signal leakage of the transistor to the substrate.
  • the low-pass filter switching unit S3 is disposed between an input pad and the series inductor Ls1, and is connected to the inductor connected in parallel with a transistor and a drain and a source of the transistor, and connected to the substrate for preventing signal leakage to the substrate of the transistor.
  • High resistance disposed.
  • the low-pass filter switching unit (S4, S5) is a transistor disposed between the parallel capacitor and the ground, an inductor connected in parallel to the drain and the source of the transistor, the connection arrangement to the substrate for preventing signal leakage to the substrate of the transistor Includes high resistance.
  • the size of one single pole double throw (SPDT) switch is about 0.5x0.5 mm 2 , and when the two single pole double throw switches, the high pass filter and the low pass filter are separately configured, It can be seen that the phase shifter of the present invention greatly improves the degree of integration compared to the area becoming large enough to be inadequate to integrate.
  • the present invention satisfies both the reference 10dB from 55GHz to 65GHz and the insertion loss shows low loss characteristics of 3.8dB and 4.4dB in the high pass filter and the low pass filter mode.
  • Figure 10 shows the phase control characteristics of the high density millimeter wave band low loss phase shifter according to the present invention.
  • the phase shifter designed as shown in FIG. 6 may acquire a 83 GHz phase shift characteristic in the 55 GHz to 65 GHz band.
  • the phase shifter having high integration and low loss characteristics of the present invention is necessary in millimeter wave and terahertz bands where loss characteristics are very important.
  • the wireless communication system can expect an increase in data transmission efficiency.
  • the present invention can be utilized for a beamforming system suitable for high-capacity high-speed data wireless transmission using a millimeter wave band.

Abstract

The present invention relates to a phase shifter having a high-pass filter and a low-pass filter integrated altogether into a single chip and, more particularly, to a highly integrated filter type phase shifter in which a serial capacitor and a parallel inductor, which configure the high-pass filter, are arranged in an inner space between a serial inductor and a parallel capacitor, which configure the low-pass filter, thereby reducing chip size. In addition, the present invention relates to a phase shifter, which shifts the phase by selectively operating a high-pass filter and a low-pass filter, wherein each of the high-pass filter and the low-pass filter has at least one switching unit for selectively receiving an input signal, and the switching unit reduces an overall chip size by replacing a single pole double throw switch including a transistor, an inductor connected in parallel between a drain end and a source end of the transistor and a high resistor connected to a substrate of the transistor.

Description

고집적 필터형 위상 천이기Highly Integrated Filter Phase Shifters
본 발명은 위상 천이기에 관한 것으로서, 상세하게는 밀리미터파 대역에서 크기가 상당한 저역필터 내부 공간에 상기 저역필터보다 크기가 작은 고역필터를 집적하여 저손실 특성과 집적도가 향상된 위상 천이기에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase shifter, and more particularly, to a phase shifter having low loss characteristics and a degree of integration by integrating a high pass filter having a smaller size than that of the low pass filter in a space of a low pass filter having a considerable size in a millimeter wave band.
최근 밀리미터파 및 테라헤르츠 대역 고속 대용량 데이터 통신이 큰 관심을 받으면서 다양한 연구가 광범위하게 수행되고 있다. 밀리미터파 및 테라헤르츠 통신은 높은 주파수로 인하여 손실이 크고, 신호 생성이 어렵기 때문에 빔포밍 기술이 필수적으로 요구된다. 빔포밍 기술은 배열 안테나를 이용한 것으로서, 안테나로 여기되는 신호의 위상을 조절하여 빔을 원하는 방향으로 생성하는 기술이다. 빔포밍 기술에서 가장 중요한 블록은 신호의 위상을 조절하는 위상 천이기이다. 위상 천이기는 송수신 모듈에 쓰이는 회로의 일종으로 특히 위상배열안테나에 신호의 위상변화를 주기 위한 핵심부품으로 초고주파 레이다 및 위성의 안테나에 쓰이는 부품이다. 위상 천이기는 전기적 혹은 물리적인 방법으로 전기적 신호의 길이를 조절한다. 물리적 방법을 통한 위상 조절은 크기가 크고 동작속도가 느리기 때문에 소형의 고속 동작을 위한 용도로는 적합하지 않기 때문에, 밀리미터파 및 테라헤르츠 대역에서는 주로 전기적 방법이 주를 이룬다. Recently, a variety of researches have been extensively carried out with high interest in millimeter wave and terahertz band high speed data communication. Millimeter-wave and terahertz communications require beamforming techniques because of the high loss due to high frequencies and the difficulty of signal generation. The beamforming technique uses an array antenna, and generates a beam in a desired direction by adjusting a phase of a signal excited by the antenna. The most important block in beamforming technology is the phase shifter that controls the phase of the signal. Phase shifter is a kind of circuit used for transmitting / receiving module. It is a key component for changing the phase of signal to phased array antenna. It is used for microwave antenna of satellite and satellite. The phase shifter adjusts the length of the electrical signal in an electrical or physical manner. Since phase control through physical methods is large and slow, they are not suitable for small, high-speed operation, and electrical methods are mainly used in the millimeter wave and terahertz bands.
위상 천이기는 다양한 방법으로 구현이 가능한데, 저역필터 및 고역필터로 구성된 필터타입의 위상 천이기의 경우에는, 단일 소자로서 연속적인 위상 천이를 발생할 수 없지만, 비교적 단순한 방법으로 좋은 위상 천이 특성을 가질 수 있는 장점이 있다. 또한 수동소자로 구성되기 때문에 전력소모가 적고, 좋은 선형성을 가지고 있기 때문에 복잡도가 높을수록 성능을 얻기 어려운 밀리미터파 대역의 배열 안테나 시스템에서 널리 활용되어 왔다. 필터 구조의 주파수 특성상 90ㅀ 이상의 위상을 생성할 수 없고, 90ㅀ에 가까워질수록 필터의 대역 특성이 열화되기 때문에, 보통의 경우, 필터타입의 위상 천이기를 구현할 때는 고역필터와 저역필터를 결합함으로써, 전체적인 이득과 대역, 위상 특성을 최적화하는 방식을 택한다. 기존의 방식은 단순히 2개의 필터를 병렬로 두고, 단극쌍투(single pole double throw : SPDT) 스위치를 통해서 선택적으로 동작모드를 취하는 방식이고, 2개의 SPDT의 스위치 자체의 크기도 무시할만한 수준이 아니기 때문에, 실리콘 상에서 집적하기에는 적절하지 않다. The phase shifter can be implemented in various ways. In the case of a filter type phase shifter composed of a low pass filter and a high pass filter, a continuous phase shift cannot be generated as a single element, but it can have good phase shift characteristics in a relatively simple method. There is an advantage. In addition, since it is composed of passive elements, power consumption is low and good linearity has been widely used in an array antenna system of millimeter wave band, which is difficult to obtain performance due to high complexity. Due to the frequency characteristics of the filter structure, a phase of 90 Hz or more cannot be generated, and the band characteristic of the filter deteriorates as it approaches 90 Hz. Therefore, in general, a high-pass filter and a low-pass filter are combined to implement a filter type phase shifter. We then choose a method that optimizes the overall gain, band, and phase characteristics. The conventional method simply puts two filters in parallel and takes a selective mode of operation through a single pole double throw (SPDT) switch, and the size of the two SPDT switches themselves is not negligible. However, it is not suitable for integration on silicon.
도 1은 종래의 필터타입 위상 천이기로서, 2개의 커패시터와 1개의 인덕터로 구성된 고역필터와 2개의 인덕터와 1개의 커패시터로 구성된 저역필터를 개별적으로 구성하고, 고역필터와 저역필터의 동작모드를 선택하기 위한 단극쌍투(SPDT) 스위치가 양쪽에 위치한다. 1 is a conventional filter-type phase shifter, comprising a high pass filter composed of two capacitors and one inductor, and a low pass filter composed of two inductors and one capacitor, respectively, and an operation mode of the high pass filter and the low pass filter. Single pole double throw (SPDT) switches for selection are located on both sides.
도 1과 같은 필터타입의 위상 천이기는 동작원리가 단순하고, 구현의 용이함으로 인하여 널리 사용되고 있다. 하지만, 도 1이나 특허문헌 1과 같이, 종래의 구조에서는 고역필터와 저역필터 두 모드를 각각 개별적으로 구성하고, 이를 2개의 단극쌍투(SPDT) 스위치를 이용하여 선택적으로 동작시킴으로 인하여, 실리콘 상에 집적하기에는 적절하지 않을 정도로 크기가 커지는 문제점이 있다. The phase shifter of the filter type as shown in FIG. 1 has been widely used due to its simple operating principle and ease of implementation. However, in the conventional structure, as shown in FIG. 1 and Patent Document 1, two modes of a high pass filter and a low pass filter are separately configured, and they are selectively operated using two single pole double throw (SPDT) switches. There is a problem that the size becomes large enough not to be suitable for integration.
도 2는 이상적인 저역필터 필터에서 위상 증가에 따른 삽입 손실 특성이 열화되는 것을 보여주는 모의실험 결과이다. 필터는 최고 90ㅀ까지 위상 변화가 가능하며, 위상 변화량이 증가할수록 전체적인 필터의 성능이 열화된다. 모의실험을 통해서 손실이 없는 이상적인 저역필터에서 삽입 위상을 20ㅀ 단위로 증가시키면서 삽입 손실 특성을 살펴보면, 삽입 위상 증가에 따라서 대역 특성이 심하게 열화되는 것을 알 수 있으며, 손실을 고려한 실제 상황에서는 더욱 심하게 발생한다.2 is a simulation result showing that the insertion loss characteristic of the ideal low pass filter deteriorates with increasing phase. The filter can change phase up to 90 ㅀ, and as the amount of phase change increases, the overall filter performance deteriorates. Simulation results show that the insertion loss characteristics of the ideal lowpass filter without loss are increased by 20 ㅀ and the band characteristics deteriorate as the insertion phase increases. Occurs.
이러한 문제로 인해서 두 가지 모드를 모두 구현하지 않고 도 3 내지 도 5와 같이, 실리콘 상에서 하나의 모드로만 원하는 위상을 변화시키는 구조를 채택하여 크기 문제를 해결하고자 하는 단일 모드의 위상 천이기를 살펴볼 수 있다.Due to this problem, as shown in FIGS. 3 to 5, a single mode phase shifter to solve the size problem can be examined by adopting a structure in which a desired phase is changed to only one mode on silicon as shown in FIGS. 3 to 5. .
도 3은 저역필터 모드로만 구현된 필터타입 위상 천이기이다. 제1 트랜지스터(T1)가 켜지고, 제2 트랜지스터(T2)가 꺼지면, 도 4와 같이, 인덕터(Ls)와 커패시터(Cp/2)가 대역소거필터(band stop filter)로 동작하고 위상 천이기는 우회(bypass) 동작한다. 또한 제1 트랜지스터(T1)가 꺼지고, 제2 트랜지스터(T2)가 켜지면, 도 5와 같이, 인덕터(Ls)와 두 개의 커패시터(Cp)가 저역필터를 구성하여, 요구되는 위상 변화가 발생한다. 3 is a filter type phase shifter implemented only in a low pass filter mode. When the first transistor T1 is turned on and the second transistor T2 is turned off, as shown in FIG. 4, the inductor Ls and the capacitor Cp / 2 operate as a band stop filter and bypass the phase shifter. (bypass) It works. In addition, when the first transistor T1 is turned off and the second transistor T2 is turned on, as shown in FIG. 5, the inductor Ls and the two capacitors Cp form a low pass filter to generate a required phase shift. .
도 4는 도 3의 위상 천이기의 우회 모드의 등가회로로서, 인덕터(Ls)와 커패시터(Cp/2)가 대역소거필터로 동작하여, 인가된 신호는 켜진 제1 트랜지스터(T1)를 통해서 전달된다. 도 5는 도 3의 저역필터 타입의 위상 천이기의 등가회로도이다. 인덕터(Ls)와 2개의 커패시터(Cp)에 의해 요구되는 위상 변화가 발생한다. FIG. 4 is an equivalent circuit of the bypass mode of the phase shifter of FIG. 3, in which the inductor Ls and the capacitor Cp / 2 operate as a band erasing filter, and thus an applied signal is transmitted through the turned on first transistor T1. do. FIG. 5 is an equivalent circuit diagram of a phase shifter of the low pass filter type of FIG. 3. The phase change required by the inductor Ls and the two capacitors Cp occurs.
그러나 도 3 내지 도 5와 같은 단일 모드의 위상 천이기는 하나의 모드로 요구되는 위상을 모두 구현함에 따른 전체적인 성능의 열화가 발생하고, 이는 밀리미터파 대역과 같이 손실이 큰 대역에서 더 심각한 문제가 된다. 또한 필터타입의 위상 천이기의 경우에는, 단일 소자로 동작하는 경우보다 여러 위상을 직렬로 연결하여, 360ㅀ의 위상을 구현하는 구조이기 때문에, 단일 모드의 위상 천이기의 크기 문제는 반드시 해결해야 할 과제로 판단된다.However, the single mode phase shifter as shown in Figs. 3 to 5 causes degradation of the overall performance by implementing all required phases in one mode, which is a more serious problem in high loss bands such as millimeter wave bands. . In addition, in the case of the filter type phase shifter, the phase shifter of the single mode must be solved because the phase shifter of 360 mode is realized by connecting several phases in series rather than operating as a single element. I think it's a task to do.
* 선행기술문헌* Prior art literature
* 특허문헌* Patent Literature
1. 한국등록특허 제10-0652232호(2006년 11월 23일 등록)1. Korea Registered Patent No. 10-0652232 (registered November 23, 2006)
본 발명은 상기의 문제점을 해결하기 위하여 밀리미터파 대역에서 동작하는 위상 천이기로서 저역필터 내부에 고역필터를 집적하여 저손실 특성과 집적도를 향상시킨 필터형 위상 천이기를 제공하는 것을 목적으로 한다.An object of the present invention is to provide a filter type phase shifter in which a high pass filter is integrated inside a low pass filter to improve low loss characteristics and integration as a phase shifter operating in a millimeter wave band to solve the above problems.
상기의 과제를 해결하기 위한 본 발명에 의한 고집적 필터형 위상 천이기는 고역필터와 저역필터를 모두 하나의 칩에 집적한 위상 천이기에 있어서, 상기 저역필터를 구성하는 직렬 인덕터와 병렬 커패시터의 사이의 내부 공간에 상기 고역필터를 구성하는 직렬 커패시터와 병렬 인덕터를 배치하여 칩크기를 감소시킨 것을 특징으로 한다.The integrated filter type phase shifter according to the present invention for solving the above problems is a phase shifter in which both a high pass filter and a low pass filter are integrated on one chip, and an internal space between a series inductor and a parallel capacitor constituting the low pass filter. The chip size is reduced by arranging a series capacitor and a parallel inductor constituting the high pass filter in a space.
본 발명의 또 다른 실시예로서 본 발명에 의한 고집적 필터형 위상 천이기는 고역필터와 저역필터를 선택적으로 동작시켜 위상을 천이시키는 위상 천이기에 있어서, 상기 고역필터와 상기 저역필터는 입력 신호를 선택적으로 전달받기 위한 스위칭부를 구비하되, 상기 스위칭부는, 트랜지스터, 상기 트랜지스터의 드레인단과 소스단 사이에 병렬 연결된 인덕터 및 상기 트랜지스터의 기판에 연결된 고저항을 포함하여 칩크기를 감소시킨 것을 특징으로 한다.In another embodiment of the present invention, a highly integrated filter type phase shifter is a phase shifter for shifting a phase by selectively operating a high pass filter and a low pass filter, wherein the high pass filter and the low pass filter selectively select an input signal. A switching unit is provided to receive the switching unit, wherein the switching unit includes a transistor, an inductor connected in parallel between the drain terminal and the source terminal of the transistor, and a high resistance connected to the substrate of the transistor.
본 발명의 또 다른 실시예로서 본 발명에 의한 고집적 필터형 위상 천이기는 크기가 다양한 인덕터 어레이와 커패시터 어레이를 구비하고, 인덕터 어레이와 커패시터 어레이는 복수의 스위칭 소자로 각각 연결하여 조합하여 고역 필터 또는 저역 필터를 형성하고, 상기 복수의 스위칭 소자는 제어 신호에 따라 상기 인덕터와 커패시터를 선택적으로 연결하여 상기 위상 천이기를 고역 필터 또는 저역 필터로 동작시키는 것을 특징으로 한다.As another embodiment of the present invention, the highly integrated filter type phase shifter includes an inductor array and a capacitor array of various sizes, and the inductor array and the capacitor array are connected to each other by a plurality of switching elements, and then combined with a high pass filter or a low pass. A filter is formed, and the plurality of switching elements selectively connect the inductor and the capacitor according to a control signal to operate the phase shifter as a high pass filter or a low pass filter.
본 발명은 저 전력, 저 손실 특성을 갖는 소형의 위상 천이기를 제공함으로써 밀리미터파 대역 이동단말기에 적용 시 고속 데이터 통신 특성을 갖는다.The present invention has a high speed data communication characteristic when applied to a millimeter wave band mobile terminal by providing a small phase shifter having low power and low loss characteristics.
본 발명을 CMOS 공정으로 제조 시, 55GHz~65GHz에서 반사손실 10dB 이하로 낮출 수 있으며, 삽입손실은 저역필터와 고역필터 모드에서 3.8dB, 4.4dB로 손실이 감소되고, 대략 83ㅀ의 위상 천이 특성을 갖는다. When the present invention is manufactured in a CMOS process, the reflection loss can be lowered to 10 dB or less at 55 GHz to 65 GHz, and the insertion loss is reduced to 3.8 dB and 4.4 dB in the low pass filter and the high pass filter mode, and has a phase shift characteristic of about 83 dB. Has
본 발명은 90ㅀ 위상 변화 특성을 얻기 위해 커질 수밖에 없는 칩의 크기를 고역필터를 저역필터 내부에 집적함으로써 칩크기를 해결할 수 있다.The present invention can solve the chip size by integrating the high pass filter inside the low pass filter, the size of the chip that must be increased to obtain the 90 kHz phase change characteristics.
본 발명은 스위치가 오프상태에서 기생 커패시턴스에 의해 삽입손실이 증가되는 문제점을 트랜지스터와 병렬 연결된 인덕터와 고저항을 통해 삽입 손실을 감소시킴으로써 종래의 단극쌍투 스위치를 대체할 수 있어 칩크기를 감소시키면서도 저손실 특성을 갖는다. According to the present invention, the insertion loss is increased by parasitic capacitance when the switch is turned off, and thus the insertion loss is reduced through the inductor and the high resistance connected in parallel with the transistor. Has characteristics.
도 1은 일반적인 구조의 필터타입 위상 천이기.1 is a filter type phase shifter of a general structure.
도 2는 이상적인 필터에서 위상 증가에 따른 삽입 손실 특성의 열화를 보여주는 모의실험 결과 그래프.2 is a graph of simulation results showing degradation of insertion loss characteristics with increasing phase in an ideal filter.
도 3은 저역필터 모드로만 구현된 필터타입 위상 천이기. 3 is a filter type phase shifter implemented only in a low pass filter mode.
도 4는 저역필터 모드로만 구현된 필터타입 위상 천이기의 기준 상태의 등가회로도.4 is an equivalent circuit diagram of a reference state of a filter type phase shifter implemented only in a low pass filter mode.
도 5는 저역필터 모드로만 구현된 필터타입 위상 천이기의 저역필터 상태의 등가회로도. Fig. 5 is an equivalent circuit diagram of a low pass filter state of a filter type phase shifter implemented only in the low pass filter mode.
도 6은 본 발명에 의한 위상 천이기.6 is a phase shifter according to the present invention.
도 7은 도 6에 도시된 스위칭 소자. 7 is a switching device shown in FIG.
도 8은 본 발명에 의한 위상 천이기의 레이아웃도.8 is a layout diagram of a phase shifter according to the present invention.
도 9는 본 발명에 의한 위상 천이기의 반사손실과 삽입손실 특성 그래프. 9 is a graph showing the reflection loss and insertion loss characteristics of the phase shifter according to the present invention.
도 10은 본 발명에 의한 위상 천이기의 위상 조절 성능 그래프. 10 is a phase adjustment performance graph of the phase shifter according to the present invention.
이하 본 발명의 실시를 위한 구체적인 실시 예를 도면을 참고하여 설명한다. 예시된 도면은 발명의 명확성을 위하여 핵심적인 내용만 확대 도시하고 부수적인 것은 생략하였으므로 도면에 한정하여 해석하여서는 아니 된다.Hereinafter, specific embodiments for the practice of the present invention will be described with reference to the drawings. The illustrated drawings are only enlarged to the essential content for clarity of the invention, and the additional ones are omitted and should not be construed as limited to the drawings.
도 6은 본 발명에 의한 고집적 필터형 위상 천이기로서, 크기가 다양한 인덕터 어레이(Ls1, Lp1)와 커패시터 어레이(Cs1, Cs2, Cp1, Cp2)를 구비하고, 인덕터 어레이와 커패시터 어레이는 복수의 스위칭 소자(S1~S5)로 각각 연결하여 조합하여 고역 필터 또는 저역 필터를 형성하고, 상기 복수의 스위칭 소자는 제어 신호(Vcontrol)에 따라 상기 인덕터와 커패시터를 선택적으로 연결하여 상기 위상 천이기를 고역 필터 또는 저역 필터로 동작시킨다. 즉, 저역필터를 형성한 인덕터가 고역필터를 형성하는 인덕터와 중복될 수 있으며, 고역필터를 형성한 커패시터가 저역필터를 형성한 커패시터와 중복사용될 수 있으므로, 좁은 면적에 고역필터와 저역필터를 구현하되, 각 필터를 별도로 형성하지 않고, 저역필터에 사용되는 인덕터 또는 커패시터를 스위칭 소자에 의해 연결 또는 차단함으로써 고역필터에 사용할 수 있게 한다. 이것은 하나의 위상 천이기보다 위상 천이기 어레이가 사용되는 경우에 그 효과가 더 발휘될 수 있다.6 is a highly integrated filter type phase shifter according to the present invention, and includes inductor arrays Ls1 and Lp1 having various sizes and capacitor arrays Cs1, Cs2, Cp1 and Cp2, and the inductor array and the capacitor array have a plurality of switching. element to form a high-pass filter or low-pass filters each connected in combination with (S1 ~ S5), the switching device of said plurality is selectively connected to the inductor and capacitor filter high-frequency group the phase shift in response to a control signal (V control) Or operate as a low pass filter. That is, the inductor with the low pass filter may overlap the inductor with the high pass filter, and the capacitor with the high pass filter may be used with the capacitor with the low pass filter, thereby realizing the high pass filter and the low pass filter in a small area. However, without forming each filter separately, the inductor or capacitor used in the low pass filter can be connected or disconnected by the switching element so that the filter can be used in the high pass filter. This can be more effective when a phase shifter array is used than one phase shifter.
상기 위상 천이기는 저역필터, 고역필터, 고역필터 스위칭부(S1,S2), 저역필터 스위칭부(S3, S4, S5) 및 제어기(INV)로 구현할 수 있다.The phase shifter may be implemented by a low pass filter, a high pass filter, a high pass filter switching unit (S1, S2), a low pass filter switching unit (S3, S4, S5), and a controller (INV).
본 발명은 특히, 저역필터를 구성하는 직렬 인덕터(Ls1)와 병렬 커패시터(Cp1, Cp2)의 사이에 고역필터를 구성하는 직렬 커패시터(Cs1, Cs2)와 병렬 인덕터(Lp1)를 배치하여 고역필터의 크기만큼 칩크기를 감소시킬 수 있는 발명이다. 도 8을 참조하면, 밀리미터파 대역에서 인덕터의 크기가 커패시터에 비해 압도적으로 크므로 본 발명의 위상 천이기는 저역필터와 고역필터의 인덕터 개수를 최소한의 개수로 사용하고, 대신 면적이 작은 커패시터를 늘림으로써 같은 차수의 필터임에도 칩크기를 감소시킬 수 있다. 특히, 저역필터를 구성하는 인덕터의 크기는 커패시터나 고역필터를 구성하는 인덕터나 커패시터에 비해 크기가 크므로 저역필터는 2개의 인덕터와 1개의 커패시터를 사용하지 않고, 1개의 인덕터와 2개의 커패시터로 구현함으로써 위상 천이기의 크기를 작게 한다. In particular, the present invention is arranged between the series capacitors Cs1 and Cs2 and the parallel inductor Lp1 constituting the high pass filter between the series inductor Ls1 and the parallel capacitors Cp1 and Cp2 constituting the low pass filter. The invention can reduce the chip size by the size. Referring to FIG. 8, since the size of the inductor is overwhelmingly larger than that of the capacitor in the millimeter wave band, the phase shifter of the present invention uses the minimum number of inductors of the low pass filter and the high pass filter, and increases the capacitor having a small area instead. In this way, the chip size can be reduced even though the filter is of the same order. In particular, since the size of the inductor constituting the low pass filter is larger than that of the capacitor or the inductor or capacitor constituting the high pass filter, the low pass filter does not use two inductors and one capacitor. The implementation makes the size of the phase shifter small.
저역필터는 입력 신호의 저주파 성분만을 통과시키며, 신호의 위상을 지연시키는 파이(Pi)-타입 필터로서, 직렬 인덕터(Ls1)와 두 개의 병렬 커패시터(Cp1, Cp2)를 포함한다. 저역필터는 차수가 높아지면 인덕터와 커패시터의 개수가 더 추가된다. 차수가 높아지면 필터링이 샤프해져서 통과 특성이 좋아지나 삽입손실이나 군지연이 나빠지며 필터의 크기가 커진다. 저역필터는 1개의 직렬 인덕터(Ls1)와 2개의 병렬 커패시터(Cp1, Cp2)로 구성된 3차 필터뿐만 아니라, 커패시터와 인덕터를 포함하여 2개 또는 그 이상의 개수로 차수가 다른 저역필터로 구현할 수 있다. The low pass filter is a pi-type filter that passes only the low frequency components of the input signal and delays the phase of the signal. The low pass filter includes a series inductor Ls1 and two parallel capacitors Cp1 and Cp2. The low pass filter adds more inductors and capacitors as the order increases. As the order increases, the filtering becomes sharper, resulting in better pass characteristics, but worse insertion loss or group delay, and larger filter size. The low pass filter may be implemented as a low pass filter having different orders of two or more, including a capacitor and an inductor, as well as a third-order filter including one series inductor Ls1 and two parallel capacitors Cp1 and Cp2. .
고역필터는 입력 신호의 고주파 성분만을 통과시키며, 신호의 위상을 빠르게 하는 티(T)-타입 필터로서, 2개의 직렬 커패시터(Cs1, Cs2)와 하나의 병렬 인덕터(Lp1)를 포함한다. 고역필터도 저역필터와 마찬가지로 차수가 높아지면 인덕터와 커패시터의 개수가 더 추가된다. 고역필터는 2개의 직렬 커패시터(Cs1, Cs2)와 1개의 병렬 인덕터(Lp1)로 구성된 3차 필터뿐만 아니라, 커패시터와 인덕터를 포함하여 2개 또는 그 이상의 개수로 차수가 다른 고역필터로 구현할 수 있다. The high pass filter is a tee (T) -type filter which passes only a high frequency component of an input signal and accelerates the phase of the signal, and includes two series capacitors Cs1 and Cs2 and one parallel inductor Lp1. As with the low pass filter, the high pass filter adds an additional number of inductors and capacitors. The high pass filter may be implemented as a third order filter including two series capacitors Cs1 and Cs2 and one parallel inductor Lp1, as well as a high pass filter having two or more orders of magnitude including a capacitor and an inductor. .
고역필터 스위칭부(S1,S2)와 저역필터 스위칭부(S3, S4, S5)를 구성하는 스위칭 소자는 종래의 단극쌍투 스위치 대신 저손실 특성이면서 소형으로 집적이 가능한 도 7과 같은 구조의 스위칭 소자를 사용한다. 도 7을 참조하면, 스위칭 소자는 제3 트랜지스터(T3), 인덕터(Lr) 및 고저항(Rbody)으로 구현한다. 제3 트랜지스터(T3)가 오프(off) 모드일 때 제3 트랜지스터(T3)의 기생 커패시턴스가 매우 커지는 문제점을 해결하기 위해, 기생 커패시턴스에 의한 신호 누설을 방지하고자 기생 커패시턴스와 대역소거필터로 동작하는 인덕터(Lr)를 제3 트랜지스터(T3)의 드레인과 소스에 병렬로 연결한다. 제3 트랜지스터(T3)가 온(on) 모드 일 때, 인덕터(Lr)는 충분히 큰 값을 가지기 때문에, 상기 제3 트랜지스터(T3)와 병렬로 연결되어 있으므로 상기 제3 트랜지스터(T3)의 동작 및 스위칭 소자의 성능에 인덕터(Lr)에 의한 영향은 미미하다. 제3 트랜지스터(T3)가 오프 모드 일 때, 제3 트랜지스터(T3)의 기생 커패시턴스는 인덕터(Lr)의 인덕턴스에 의해 상쇄되므로 신호의 손실을 감소시킬 수 있다. The switching elements constituting the high pass filter switching units S1 and S2 and the low pass filter switching units S3, S4, and S5 use a switching element having a structure as shown in FIG. use. 7, the switching elements are implemented in the third transistor (T3), an inductor (Lr) and a high resistance (R body). In order to solve the problem that the parasitic capacitance of the third transistor T3 becomes very large when the third transistor T3 is in the off mode, the parasitic capacitance and the band erasure filter are operated to prevent signal leakage caused by the parasitic capacitance. The inductor Lr is connected in parallel with the drain and the source of the third transistor T3. When the third transistor T3 is in the on mode, since the inductor Lr has a sufficiently large value, the inductor Lr is connected in parallel with the third transistor T3 and thus, the operation of the third transistor T3 and The influence of the inductor Lr on the performance of the switching element is minimal. When the third transistor T3 is in the off mode, the parasitic capacitance of the third transistor T3 is canceled by the inductance of the inductor Lr, thereby reducing the loss of a signal.
제3 트랜지스터(T3)는 CMOS 공정으로 구현하면, 신호가 통과할 때, 제3 트랜지스터(T3)의 기판(body)으로 신호의 누설이 발생하기 때문에, 이를 막기 위해서 제3 트랜지스터(T3)의 기판에 고저항(Rbody)을 삽입하거나 기판 내부에 고저항(Rbody)을 형성하여, 신호의 누설을 방지한다. When the third transistor T3 is implemented in a CMOS process, when the signal passes, the leakage of the signal occurs to the substrate body of the third transistor T3, so that the substrate of the third transistor T3 is prevented. The high resistance (R body ) is inserted into the high resistance (R body ) is formed inside the substrate to prevent leakage of the signal.
고역필터 스위칭부(S1,S2)는 입력 신호를 고역필터로 통과시키기 위한 제1 스위칭 소자(S1)와 고역필터의 출력 신호를 출력 패드로 전달하기 위한 제2 스위칭 소자(S2)를 포함한다. 상기 제1 스위칭 소자(S1)와 상기 제2 스위칭 소자(S2)의 작동은 제어 신호에 의해 동시에 이루어진다.The high pass filter switching units S1 and S2 include a first switching element S1 for passing an input signal to the high pass filter and a second switching element S2 for transmitting the output signal of the high pass filter to the output pad. The operation of the first switching element S1 and the second switching element S2 is simultaneously performed by a control signal.
저역필터 스위칭부(S3, S4, S5)는 입력 신호를 저역필터로 통과시키기 위한 제3 스위칭 소자(S3)와 병렬 커패시터(Cp)를 통과하는 신호를 접지 라인으로 전달하기 위한 제4 스위칭 소자(S4) 및 제5 스위칭 소자(S5)로 구성된다.The low-pass filter switching units S3, S4, and S5 may include a fourth switching element for transmitting a signal passing through the third switching element S3 and the parallel capacitor Cp to pass the input signal to the low-pass filter to the ground line. S4) and the fifth switching element S5.
개별 커패시터(Cp)에 도 7에 도시된 스위칭 소자를 각각 연결하여 보다 확실하게 접지 처리함으로써, 저손실 특성을 향상시킬 수 있다. 따라서 기존의 위상 천이기의 저역필터 모드에서 동작 시에, 두 개의 커패시터의 공통 노드를 하나로 묶어서 접지 처리한 구조에서 발생하는 손실 특성이 열화되는 문제점을 해결할 수 있다.The low loss characteristics can be improved by connecting the switching elements shown in FIG. 7 to the individual capacitors Cp and grounding them more reliably. Therefore, when operating in the low pass filter mode of the conventional phase shifter, it is possible to solve the problem that the loss characteristic caused by the grounded structure by combining the common nodes of the two capacitors together.
제어기(INV)는 제어신호(Vcontrol)를 반전시켜 출력하는 인버터(INV)로 구현할 수 있다. 상기 인버터(INV)의 입력단을 상기 고역필터 스위칭부(S1,S2) 또는 상기 저역필터 스위칭부(S3, S4, S5) 중 하나를 제어하는 단자와 연결하고, 상기 인버터(INV)의 출력단을 나머지 하나를 제어하는 단자와 연결한다. 인버터를 이용해서 고역필터 동작 모드와 저역필터 동작 모드를 하나의 신호(Vcontrol)로 제어가 가능하다. 예를 들면, 제어신호(Vcontrol)가 로직 하이이면 고역필터 스위칭부(S1,S2)를 온 모드로 동작시키므로 고역필터에 의해 입력 신호의 위상이 전진된 출력 신호를 얻을 수 있으며, 제어신호(Vcontrol)가 로직 로우이면 저역필터 스위칭부(S3, S4, S5)를 온 모드로 동작시키므로 저역필터에 의해 입력 신호의 위상이 지연된 출력 신호를 얻을 수 있다. 고역필터 스위칭부(S1,S2)가 온 상태이면, 고역필터로 신호가 입력되어 출력되는 신호는 입력신호의 위상보다 위상이 전진되어 출력되며, 저역필터 스위칭부(S3, S4, S5)가 온 상태이면, 저역필터로 입력신호가 전달되어 출력되는 신호는 입력신호의 위상보다 위상이 지연되어 출력된다. 이렇게 고역필터를 통과하면서 전진된 위상과 저역필터를 통과하면서 지연된 위상의 차이로서 위상변화를 구현하게 된다.The controller INV may be implemented as an inverter INV that inverts and outputs the control signal V control . The input terminal of the inverter INV is connected to a terminal for controlling one of the high pass filter switching units S1 and S2 or the low pass filter switching units S3, S4, and S5, and the output terminal of the inverter INV is rested. Connect with one controlling terminal. Using the inverter, the high pass filter and low pass filter can be controlled by one signal (V control ). For example, when the control signal V control is logic high, the high pass filter switching units S1 and S2 are operated in the on mode, so that the output signal of which the phase of the input signal is advanced by the high pass filter can be obtained. When V control ) is logic low, the low pass filter switching units S3, S4, and S5 operate in the on mode, and thus the low pass filter may obtain an output signal having a delayed phase of the input signal. When the high pass filter switching units S1 and S2 are turned on, a signal is inputted to the high pass filter and the output signal is output with the phase advanced from the phase of the input signal, and the low pass filter switching units S3, S4, and S5 are turned on. In this state, the input signal is transmitted to the low pass filter and the output signal is delayed in phase than the phase of the input signal. The phase change is realized as the difference between the advanced phase passing through the high pass filter and the delayed phase passing through the low pass filter.
도 8은 본 발명에 의한 위상 천이기를 CMOS 공정으로 제조하기 위한 레이아웃도이다. 본 발명의 위상 천이기의 경우, 패드를 포함하여 0.47x0.36 mm2로 굉장히 작은 크기로 구현할 수 있다. 도 8에 도시된 위상 천이기는 직렬 인덕터(Ls1)는 입력 패드(Input PAD)와 출력 패드(Output PAD) 사이에 전송 선로를 소정 수 회전시켜 형성하고, 병렬 커패시터(Cp1, Cp2)는 직렬 인덕터(Ls1)의 양단부에 배치된다. 직렬 인덕터(Ls1)와 상기 병렬 커패시터(Cp1, Cp2)의 사이의 공간에 직렬 인덕터(Ls1)보다 크기가 작은 병렬 인덕터(Lp1)와 직렬 커패시터(Cs1, Cs2)가 배치된다. 고역필터 스위칭부(S1,S2)는 입력패드와 직렬 커패시터(Cs1) 사이 및 출력패드와 직렬 커패시터(Cs2) 사이에 배치되고, 트랜지스터와 트랜지스터의 드레인과 소스에 병렬 연결된 인덕터를 포함한다. 또한 고역필터 스위칭부(S1,S2)는 상기 트랜지스터의 기판으로의 신호 누설을 막기 위한 상기 기판에 연결 배치된 고저항을 포함한다. 저역필터 스위칭부(S3)는 입력패드와 상기 직렬 인덕터(Ls1) 사이에 배치되고, 트랜지스터와 상기 트랜지스터의 드레인과 소스에 병렬 연결된 인덕터, 상기 트랜지스터의 기판으로의 신호 누설을 막기 위한 상기 기판에 연결 배치된 고저항을 포함한다. 또한, 저역필터 스위칭부(S4,S5)는 상기 병렬 커패시터와 접지 사이에 배치되는 트랜지스터와 상기 트랜지스터의 드레인과 소스에 병렬 연결된 인덕터, 상기 트랜지스터의 기판으로의 신호 누설을 막기 위한 상기 기판에 연결 배치된 고저항을 포함한다. 입력 패드와 스위칭 소자(S3) 사이와, 출력 패드와 직렬 인덕터(Ls1) 사이에 각각 임피던스를 정합을 조절하는 인덕터들(Lm1,Lm2)을 연결함으로써 임피던스를 정합하여 전송 손실을 감소시킨다.8 is a layout diagram for manufacturing a phase shifter according to the present invention in a CMOS process. In the case of the phase shifter of the present invention, it is possible to implement a very small size of 0.47x0.36 mm 2 including the pad. In the phase shifter shown in FIG. 8, the series inductor Ls1 is formed by rotating a transmission line a predetermined number of times between the input pad and the output pad, and the parallel capacitors Cp1 and Cp2 are connected to the series inductor ( It is arrange | positioned at the both ends of Ls1). A parallel inductor Lp1 and a series capacitor Cs1 and Cs2 having a smaller size than the series inductor Ls1 are disposed in a space between the series inductor Ls1 and the parallel capacitors Cp1 and Cp2. The high pass filter switching units S1 and S2 are disposed between the input pad and the series capacitor Cs1 and between the output pad and the series capacitor Cs2 and include an inductor connected in parallel to the transistor and the drain and the source of the transistor. In addition, the high pass filter switching units S1 and S2 include a high resistance connected to the substrate to prevent signal leakage of the transistor to the substrate. The low-pass filter switching unit S3 is disposed between an input pad and the series inductor Ls1, and is connected to the inductor connected in parallel with a transistor and a drain and a source of the transistor, and connected to the substrate for preventing signal leakage to the substrate of the transistor. High resistance disposed. In addition, the low-pass filter switching unit (S4, S5) is a transistor disposed between the parallel capacitor and the ground, an inductor connected in parallel to the drain and the source of the transistor, the connection arrangement to the substrate for preventing signal leakage to the substrate of the transistor Includes high resistance. By connecting the inductors Lm1 and Lm2 for regulating the impedance matching between the input pad and the switching element S3 and the output pad and the series inductor Ls1, respectively, the impedance is matched to reduce the transmission loss.
도 1의 종래의 위상 천이와 같이, 하나의 단극쌍투(SPDT) 스위치의 크기만 약 0.5x0.5mm2 정도로써, 2개의 단극쌍투 스위치, 고역필터 및 저역필터를 개별적으로 구성하면, 실리콘 기판 상에서 집적하기에 부적절할 정도로 면적이 커지는 것과 비교하면 본 발명의 위상 천이기가 집적도가 크게 향상됨을 알 수 있다. As in the conventional phase shift of FIG. 1, the size of one single pole double throw (SPDT) switch is about 0.5x0.5 mm 2 , and when the two single pole double throw switches, the high pass filter and the low pass filter are separately configured, It can be seen that the phase shifter of the present invention greatly improves the degree of integration compared to the area becoming large enough to be inadequate to integrate.
도 9는 본 발명에 의한 고집적 필터형 위상 천이기의 반사손실과 삽입손실 특성을 보여주는 도면이다. 본 발명은 크기를 소형화시킬 뿐 만 아니라 반사손실의 경우, 기준이 되는 10dB를 55GHz~65GHz까지 모두 만족하며, 삽입손실은 고역필터 및 저역필터 모드에서 3.8dB와 4.4dB로 저손실 특성을 보여준다. 9 is a view showing the reflection loss and insertion loss characteristics of the highly integrated filter type phase shifter according to the present invention. In addition to miniaturizing the size, the present invention satisfies both the reference 10dB from 55GHz to 65GHz and the insertion loss shows low loss characteristics of 3.8dB and 4.4dB in the high pass filter and the low pass filter mode.
도 10은 본 발명에 의한 집적도가 높은 밀리미터파 대역 저손실 위상 천이기의 위상 조절 특성을 보여준다. 도 6과 같이 설계된 위상 천이기는 55GHz~65GHz 대역에서 83ㅀ의 위상 천이 특성을 획득할 수 있다.Figure 10 shows the phase control characteristics of the high density millimeter wave band low loss phase shifter according to the present invention. The phase shifter designed as shown in FIG. 6 may acquire a 83 GHz phase shift characteristic in the 55 GHz to 65 GHz band.
이러한 본 발명의 고집적도와 저손실 특성의 위상 천이기는 손실 특성이 매우 중요한 밀리미터파 및 테라헤르츠 대역에서 꼭 필요한 것으로서, 본 발명의 위상 천이기를 적용할 경우, 무선 통신 시스템은 데이터 전송 효율의 증가를 기대할 수 있으며, 밀리미터파 대역을 이용한 대용량 고속 데이터 무선전송에 적합한 빔포밍(beamforming) 시스템에 활용될 수 있다. The phase shifter having high integration and low loss characteristics of the present invention is necessary in millimeter wave and terahertz bands where loss characteristics are very important. When the phase shifter of the present invention is applied, the wireless communication system can expect an increase in data transmission efficiency. The present invention can be utilized for a beamforming system suitable for high-capacity high-speed data wireless transmission using a millimeter wave band.
이상에서는 실시 예를 참조하여 설명하였지만, 해당 기술 분야의 숙련된 당업자는 하기의 특허 청구의 범위에 기재된 본 발명의 사상 및 영역으로부터 벗어나지 않는 범위 내에서 본 발명을 다양하게 수정 및 변경시킬 수 있음을 이해할 수 있을 것이다.Although described above with reference to the embodiments, those skilled in the art can be variously modified and changed within the scope of the invention without departing from the spirit and scope of the invention described in the claims below. I can understand.
* 부호의 설명* Explanation of the sign
S1, S2, S3, S4, S5 : 스위칭 소자S1, S2, S3, S4, S5: switching element
Ls1 : 직렬 인덕터Ls1: Series Inductor
Lp1 : 병렬 인덕터Lp1: Parallel Inductor
Cs1, Cs2 : 직렬 커패시터Cs1, Cs2: series capacitor
Cp1, Cp2 : 병렬 커패시터Cp1, Cp2: Parallel Capacitors

Claims (13)

  1. 고역필터와 저역필터를 모두 하나의 칩에 집적한 위상 천이기에 있어서,In the phase shifter in which both the high pass filter and the low pass filter are integrated on one chip,
    적어도 하나의 직렬 인덕터와 병렬 커패시터를 포함하는 저역필터의 내부에 적어도 하나의 직렬 커패시터와 병렬 인덕터를 포함하는 고역필터를 배치하는 것을 특징으로 하는 고집적 필터형 위상 천이기.And a high pass filter comprising at least one series capacitor and a parallel inductor in a low pass filter including at least one series inductor and a parallel capacitor.
  2. 제1항에 있어서,The method of claim 1,
    상기 저역필터는, The low pass filter,
    상기 직렬 인덕터는 1개이고, 상기 병렬 커패시터는 상기 직렬 인덕터의 양단에 병렬로 연결된 것을 특징으로 하는 고집적 필터형 위상 천이기.Wherein the series inductor is one, and the parallel capacitor is connected in parallel to both ends of the series inductor.
  3. 제1항에 있어서,The method of claim 1,
    상기 직렬 인덕터는 입력패드와 출력 패드 사이에 전송 선로를 소정 수 회전시켜 형성하고, 상기 병렬 커패시터는 상기 직렬 인덕터의 양단부에 연결 배치되며, 상기 직렬 인덕터와 양쪽에 배치된 상기 병렬 커패시터의 사이의 공간에 상기 직렬 인덕터보다 크기가 작은 병렬 인덕터와 직렬 커패시터를 집적하여 상기 고역필터가 형성된 것을 특징으로 하는 고집적 필터형 위상 천이기.The series inductor is formed by rotating a predetermined number of transmission lines between an input pad and an output pad, and the parallel capacitor is connected to both ends of the series inductor, and a space between the series inductor and the parallel capacitor disposed at both sides. And the high pass filter is formed by integrating a series capacitor and a parallel inductor smaller in size than the series inductor.
  4. 제1항에 있어서,The method of claim 1,
    입력패드와 상기 직렬 커패시터 사이에 배치되는 트랜지스터와 상기 트랜지스터의 드레인과 소스에 병렬 연결된 인덕터를 포함하는 고역필터 스위칭부를 더 포함하는 것을 특징으로 하는 고집적 필터형 위상 천이기.And a high pass filter switching unit including a transistor disposed between an input pad and the series capacitor and an inductor connected in parallel with a drain and a source of the transistor.
  5. 제4항에 있어서,The method of claim 4, wherein
    상기 고역필터 스위칭부는,The high pass filter switching unit,
    상기 트랜지스터 기판의 일면에 형성된 고저항을 더 포함하는 것을 특징으로 하는 고집적 필터형 위상 천이기.And a high resistance formed on one surface of the transistor substrate.
  6. 제1항에 있어서,The method of claim 1,
    입력패드와 상기 직렬 인덕터 사이에 배치되는 트랜지스터와 상기 트랜지스터의 드레인과 소스에 병렬 연결된 인덕터를 포함하는 저역필터 스위칭부를 더 포함하는 것을 특징으로 하는 고집적 필터형 위상 천이기.And a low pass filter switching unit including a transistor disposed between an input pad and the series inductor and an inductor connected in parallel with a drain and a source of the transistor.
  7. 제1항에 있어서,The method of claim 1,
    상기 저역필터 스위칭부는,The low pass filter switching unit,
    상기 병렬 커패시터와 접지 사이에 배치되는 트랜지스터와 상기 트랜지스터의 드레인과 소스에 병렬 연결된 인덕터를 포함하는 저역필터 스위칭부를 더 포함하는 것을 특징으로 하는 고집적 필터형 위상 천이기.And a low pass filter switching unit including a transistor disposed between the parallel capacitor and ground and an inductor connected in parallel with a drain and a source of the transistor.
  8. 제6항 또는 제7항에 있어서,The method according to claim 6 or 7,
    상기 저역필터 스위칭부는,The low pass filter switching unit,
    상기 트랜지스터의 기판에 연결된 고저항을 더 포함하는 것을 특징으로 하는 고집적 필터형 위상 천이기.And a high resistance connected to the substrate of the transistor.
  9. 제8항에 있어서,The method of claim 8,
    입력패드와 출력패드 사이에 형성되어 임피던스를 정합하는 인덕터를 더 포함하는 것을 특징으로 하는 고집적 필터형 위상 천이기.And an inductor formed between the input pad and the output pad to match impedance.
  10. 제1항에 있어서,The method of claim 1,
    제어신호에 따라 상기 고역필터 스위칭부와 상기 저역필터 스위칭부를 배타적으로 동작시키는 제어기를 더 포함하는 특징으로 하는 고집적 필터형 위상 천이기.And a controller for exclusively operating the high pass filter switching unit and the low pass filter switching unit according to a control signal.
  11. 제10항에 있어서,The method of claim 10,
    상기 제어기는,The controller,
    상기 제어 신호를 반전시켜 출력하는 인버터를 구비하고, An inverter for inverting and outputting the control signal,
    상기 인버터의 입력단이 상기 고역필터 스위칭부 또는 상기 저역필터 스위칭부 중 하나를 제어하는 단자와 연결되고,An input terminal of the inverter is connected to a terminal for controlling one of the high pass filter switching unit or the low pass filter switching unit,
    상기 인버터의 출력단이 나머지 하나를 제어하는 단자와 연결된 것을 특징으로 하는 고집적 필터형 위상 천이기.And an output terminal of the inverter is connected to a terminal for controlling the other one.
  12. 제1항에 있어서,The method of claim 1,
    상기 고역필터는, The high pass filter,
    두개의 직렬 커패시터가 직렬 연결되고, 상기 두개의 직렬 커패시터의 접점 노드에 병렬 인덕터가 접지 라인과 연결된 것을 특징으로 하는 고집적 필터형 위상 천이기.2. A highly integrated filter type phase shifter characterized in that two series capacitors are connected in series and a parallel inductor is connected with a ground line at a contact node of the two series capacitors.
  13. T 타입 고역필터와 Pi 타입의 저역필터를 선택적으로 동작시켜 위상을 천이시키는 위상 천이기에 있어서, 상기 고역필터와 상기 저역필터는 입력 신호를 선택적으로 전달받기 위한 스위칭 소자를 각 필터마다 적어도 하나씩을 구비하되,A phase shifter for shifting a phase by selectively operating a T-type high pass filter and a Pi type low pass filter, wherein the high pass filter and the low pass filter include at least one switching element for each filter to selectively receive an input signal. But
    상기 스위칭 소자는,The switching device,
    트랜지스터;transistor;
    상기 트랜지스터의 드레인단과 소스단 사이에 병렬 연결된 인덕터 및An inductor connected in parallel between the drain terminal and the source terminal of the transistor;
    상기 트랜지스터의 기판에 연결된 고저항을 포함하는 것을 특징으로 하는 고집적 필터형 위상 천이기.And a high resistance coupled to the substrate of the transistor.
PCT/KR2014/008549 2013-09-16 2014-09-15 Highly integrated filter type phase shifter WO2015037953A1 (en)

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CN109217836A (en) * 2018-09-03 2019-01-15 南京邮电大学 Four port low-reflection type duplexer filters
EP3217553B1 (en) * 2016-03-11 2019-10-23 Socionext Inc. Integrated circuitry

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KR102316430B1 (en) * 2019-12-10 2021-10-22 국방과학연구소 Phase shifter

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EP3217553B1 (en) * 2016-03-11 2019-10-23 Socionext Inc. Integrated circuitry
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CN109217836B (en) * 2018-09-03 2022-05-31 南京邮电大学 Four-port low-reflection duplex filter

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