WO2015030686A1 - Measuring method of small capacitance in a circuit - Google Patents

Measuring method of small capacitance in a circuit Download PDF

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Publication number
WO2015030686A1
WO2015030686A1 PCT/SI2014/000017 SI2014000017W WO2015030686A1 WO 2015030686 A1 WO2015030686 A1 WO 2015030686A1 SI 2014000017 W SI2014000017 W SI 2014000017W WO 2015030686 A1 WO2015030686 A1 WO 2015030686A1
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WO
WIPO (PCT)
Prior art keywords
measured
capacitance
resistor
measuring
measurement
Prior art date
Application number
PCT/SI2014/000017
Other languages
French (fr)
Inventor
Anton MARTINJAK
Original Assignee
RC IKT d.o.o.
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Publication date
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Publication of WO2015030686A1 publication Critical patent/WO2015030686A1/en

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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R27/00Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
    • G01R27/02Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
    • G01R27/26Measuring inductance or capacitance; Measuring quality factor, e.g. by using the resonance method; Measuring loss factor; Measuring dielectric constants ; Measuring impedance or related variables
    • G01R27/2605Measuring capacitance
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26Testing of individual semiconductor devices
    • G01R31/27Testing of devices without physical removal from the circuit of which they form part, e.g. compensating for effects surrounding elements
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2853Electrical testing of internal connections or -isolation, e.g. latch-up or chip-to-lead connections

Definitions

  • the object of the invention is a method for measuring low capacitances (may be with a parallel connected resistor) at low frequency, and use of the method in a nodal and VI signature test together with a measurement of dynamic resistance of semiconductors.
  • the described method can be used to measure not only low capacitances but also capacitance of individual links of digital electronic circuits with a resistor connected in parallel below 1 kD.
  • Capacitance of a link is a sum of capacitances of a trace on a printed circuit board and of all connections of integrated circuit boards linked to it. This capacitance is relatively low, even below 5 pF, so it is very difficult to be measured in a circuit with conventional resonance and impedance methods as they require relatively high frequencies.
  • a further problem is pull-up resistors that prevent use of resonance methods.
  • a low measuring current poses main problems; when a resistor is connected in parallel, a problem of accuracy of measurement of a low current phase is encountered, as there is no simple method for calibrating the phase of the entire system without a test object. If higher frequencies are used, we face problems of instrument-test object connection. In the method of the invention, the measured quantity is largest at minimum capacitance.
  • a small capacitor and capacitance of a link is excited by an alternate signal via a resistor R and then by measuring amplitude and phase of a signal upstream and downstream of the resistor a phase shift caused by the capacitor is calculated, and out of this value a value of the measured capacitor and (by considering a drop in voltage) of the parallel connected resistor R is calculated.
  • a very slight change in capacitance of an order of magnitude of 0.01 pF causes a sufficient phase shift which can be undoubtedly detected by the method of the invention with a slow manual measurement.
  • 0.01 pF represents a phase shift of 0.0425 m° or a time shift of 12 ps.
  • Figure 1 a schematic view of a circuit for measuring low capacitances and VI signature test.
  • a demonstration circuit of the method for measuring low capacitances of the invention exhibits a resistor R' connected on a DAQ card between pins Analog Out and Analog In 1 , and an equal value resistor R between pins Analog Out and Analog In 2, wherein a test object is connected between the pin Analog In 2 and GND.
  • a test object i. e. capacitive coupling or a measured capacitor
  • a series resistor R e. g. 1 kQ
  • a sinusoidal signal e. g.
  • the same coupling also allows for a conventional measurement of impedance (in large capacitors or complex impedance levels) and implementation of a nodal signature test. Both methods can be carried out sequentially or in real time.
  • Measurement of capacitance of a coupling or of a small capacitor without a parallel resistor R' has the following steps:
  • a second huge advantage is simple calibration of open pins without additional measurement standards or accessories, wherein the phase shift is simply measured without the test object being connected, said test object being subtracted in measurements.
  • a third advantage is extraordinary repeatability and accuracy of measurements and both mostly depend on hardware of the AD converter and a measuring interval, in which phase calculation or averaging of results is performed.
  • a 16-bit AD with input sensitivity of +/-1 V at a generator voltage of 200 mVp, series resistor R 1 kQ and frequency of 10 kHz and sampling time of 40 ms allows random deviation and repeatability of a measurement +/-0.15 pF, at 160 ms sampling or averaging of 40 ms samplings +/- 0.075 pF, all that up to huge angles or capacitances of about 30 nF, of course at a very stable series resistor R.
  • a stability of +/-0.005 pF can be reached or at 10 nF resolution or short-term stability within a range of 1 ppm-a.
  • a fourth advantage is high accuracy and long-term stability of the measurement that depends on the series resistor R, a differential changing in the capacitance of an AD-input due to the temperature of the DAQ card, and a change in the coupling-to-test-object capacitance.
  • a temperature drift is practically unnoticeable, so periodical calibration of open pins is actually not needed.
  • said card used in a not air- conditioned summer environment reaches whole-day stability within 0.1 pF + deviation of the series resistor.
  • a fifth advantage is minimum influence of contacting.
  • stable capacitance of the connection is almost of exclusive importance, whereas the length or induction of connections and contact resistance, which is required by other methods, is not important.
  • the contacting resistance of 22 kQ increases a reading by merely about 1 %.
  • the same connection also allows a conventional impedance test, which is a sixth huge advantage.
  • Impedance can be calculated from the measured voltages and a phase by using nothing more than secondary- school trigonometry.
  • the measurements in the lower range of measurement have as perfect accuracy as the measurement of minimum capacitances.
  • one excitement signal can cover a diagnostic range (tolerance about +/- 50 %) from 0.02 pF to about 10 pF, or a measuring range from 2 pF to 0.1 uF at measurement tolerance of 1 %, or adequately more or less at a different frequency and series resistor.
  • a seventh advantage is high resistance to interfering signals except very closely to measuring frequency.
  • a straight wire of 1 m on a desk has a capacitance of about 20 pF; in the described method with averaging the reading is stable within 0.1 pF.
  • An eighth advantage is a possibility of measuring low capacitances at a parallel connected resistor.
  • a parallel connected resistor Rp together with the series measuring resistor R forms resistance that causes together with the capacitor a phase shift to be measured.
  • a problem is posed by the capacitance of the measuring link and of the AD input, yet their influence can be eliminated by using trigonometry. The scope of elimination depends on the accuracy of the mathematical model. In an ideal model a parallel resistor 1 kQ downgrades all results by a half or doubles deviation.
  • Single-point undemanding contacting and low measuring frequency are suited for InCircuit fasteners with a field of spring pins, and for Flying Probers.
  • Calibration in a pin fastener can be carried out without a test object. All pins with the exception of the pin to be measured are connected via relay matrix to the ground and phase is measured, which phase is subtracted from the measured phase when the test objects are measured. Calibration can be carried out also with an unequipped printed circuit board and its influence can thus be subtracted.
  • the obtained capacitances are only a result of the components arranged on the printed circuit board. Any change performed in the device, such as replacement of a matrix, change in the fastener or change in connecting cables gets practically eliminated by simple calibration. This is not possible with the conventional impedance method and the devices of this type are therefore limited to the measurement of capacitance of up to about 100 pF at low accuracy.
  • the proposed circuit is especially applicable for advanced manual measurement of VI characteristic, where within a time interval of several 10 ms capacitance or impedance measurements are performed at sinusoidal voltage of 200 mVp and VI response is plotted (nodal or VI signature test) at excitation sinusoidal voltages up to 10 V and 10 kHz (in the case of use of the described DAQ card). Current is calculated from a voltage drop on the series resistor. If staircase saw tooth voltage is added, a diagram of dynamic resistance of protective diodes can be added. An accurate maximum value of voltage drop on protective diodes in the circuit can also be of great help. All measured quantities and both diagrams can be stored and subsequently used for a comparison with a good circuit. Such combination of real-time measurements allows fabrication of a very efficient device for manual diagnostics or as a simple InCircuit tester that practically needs no programming. Only a comparison with a good circuit is performed.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Measurement Of Resistance Or Impedance (AREA)

Abstract

A method for measuring low capacitances, also with a parallel connected resistor, at low frequency, an implementation of the measurement with a conventional DAQ card and a use of the method for measuring VI characteristic together with a graphical representation of dynamic resistance especially of protective diodes in a circuit. The method is based on the measurement of a change in phase shift due to measured capacitance which forms an RC member with the measuring resistor, wherein the resistor is coupled between a generator and a measuring element, to which the measured capacitance is linked.

Description

MEASURING METHOD OF SMALL CAPACITANCE IN A CIRCUIT
The object of the invention is a method for measuring low capacitances (may be with a parallel connected resistor) at low frequency, and use of the method in a nodal and VI signature test together with a measurement of dynamic resistance of semiconductors. The described method can be used to measure not only low capacitances but also capacitance of individual links of digital electronic circuits with a resistor connected in parallel below 1 kD.
Modern, especially digital electronic circuits have a plurality of digital links that are difficult to check due to their production technology (BGA, QFN...), especially when the circuits are not boundary-scan compatible. One of the methods for establishing integrity of a link is measuring link-to- ground capacitance. Capacitance of a link is a sum of capacitances of a trace on a printed circuit board and of all connections of integrated circuit boards linked to it. This capacitance is relatively low, even below 5 pF, so it is very difficult to be measured in a circuit with conventional resonance and impedance methods as they require relatively high frequencies. A further problem is pull-up resistors that prevent use of resonance methods.
In a conventional impedance mode of measuring low capacitances, a low measuring current poses main problems; when a resistor is connected in parallel, a problem of accuracy of measurement of a low current phase is encountered, as there is no simple method for calibrating the phase of the entire system without a test object. If higher frequencies are used, we face problems of instrument-test object connection. In the method of the invention, the measured quantity is largest at minimum capacitance.
In the resonance method of measuring capacitance, a parallel connected resistor poses an unsolvable problem.
Both conventional methods encounter problems in contacting: in flying probers and in fasteners with spring pins and also in manual measuring for the needs of repair.
In the method for measuring low capacitances of the invention, a small capacitor and capacitance of a link is excited by an alternate signal via a resistor R and then by measuring amplitude and phase of a signal upstream and downstream of the resistor a phase shift caused by the capacitor is calculated, and out of this value a value of the measured capacitor and (by considering a drop in voltage) of the parallel connected resistor R is calculated. A very slight change in capacitance of an order of magnitude of 0.01 pF causes a sufficient phase shift which can be undoubtedly detected by the method of the invention with a slow manual measurement. In a concrete embodiment 0.01 pF represents a phase shift of 0.0425 m° or a time shift of 12 ps.
By changing excitation voltages from the same source in real time, a classic nodal signature test can be implemented simultaneously. The same connection also provides for a conventional impedance test which can be advantageous for both the Flying Prober and the ln-circuit Tester.
The invention will be described in more detail by way of an embodiment on the figure which shows:
Figure 1 a schematic view of a circuit for measuring low capacitances and VI signature test.
A demonstration circuit of the method for measuring low capacitances of the invention exhibits a resistor R' connected on a DAQ card between pins Analog Out and Analog In 1 , and an equal value resistor R between pins Analog Out and Analog In 2, wherein a test object is connected between the pin Analog In 2 and GND. According to the method of the invention, a test object, i. e. capacitive coupling or a measured capacitor, is excited via a series resistor R (e. g. 1 kQ) by a sinusoidal signal (e. g. 10 kHz) having a voltage of 200 mVp and in fact voltages lying below knee voltages of diodes, such that semiconductors do not disturb the measurement Both voltages are simultaneously scanned by an AD converter. By digitally processing the obtained samples a phase shift caused by the capacitor is measured. In fact, advanced conventional DAQ cards (e. g. National Instrument PCI 6251) can reach long-term repeatability of a manual measurement 0.01 pF. At low values of a capacitive coupling or capacitor (up to 1 nF), only a phase shift of a RC member can be included into calculations, said member being formed by a series resistor R between a generator and a test object, and capacitance of same. If a resistor Rp is connected in parallel with the capacitor in a circuit, the phase shift is reduced, as the resistance of the source which excites the capacitor is reduced. The influence of the parallel resistor Rp on the accuracy of the measurement of the capacitor can almost be completely eliminated.
The same coupling also allows for a conventional measurement of impedance (in large capacitors or complex impedance levels) and implementation of a nodal signature test. Both methods can be carried out sequentially or in real time.
Measurement of capacitance of a coupling or of a small capacitor without a parallel resistor R' has the following steps:
- adjusting a generator to 10 kHz sine 200 mVp without a test object being connected;
- parallel capturing of n x 12500 samples of each of AD channels with a frequency of 1.25 MHz;
- calculation by digital processing of both voltages and phases;
- subtraction of phases to obtain PhO;
- connection of measured capacitance or capacitor;
- repeated sampling of both voltages and calculation of voltages and phases; - subtraction of phases and PhO to obtain a phase shift Phm (in degrees) owing to the test object;
- calculation of capacitance C=Phm x k/R, wherein k = sin (1°)/ω. The schematic illustration on Figure 1 clearly shows that only one link
(apart from the ground) is used. A second huge advantage is simple calibration of open pins without additional measurement standards or accessories, wherein the phase shift is simply measured without the test object being connected, said test object being subtracted in measurements. A third advantage is extraordinary repeatability and accuracy of measurements and both mostly depend on hardware of the AD converter and a measuring interval, in which phase calculation or averaging of results is performed. A 16-bit AD with input sensitivity of +/-1 V at a generator voltage of 200 mVp, series resistor R 1 kQ and frequency of 10 kHz and sampling time of 40 ms allows random deviation and repeatability of a measurement +/-0.15 pF, at 160 ms sampling or averaging of 40 ms samplings +/- 0.075 pF, all that up to huge angles or capacitances of about 30 nF, of course at a very stable series resistor R. By using additional averaging in a manual method, a stability of +/-0.005 pF can be reached or at 10 nF resolution or short-term stability within a range of 1 ppm-a.
A fourth advantage is high accuracy and long-term stability of the measurement that depends on the series resistor R, a differential changing in the capacitance of an AD-input due to the temperature of the DAQ card, and a change in the coupling-to-test-object capacitance. In a stable air-conditioned environment and heated DAQ card and computer, a temperature drift is practically unnoticeable, so periodical calibration of open pins is actually not needed. In practice, said card used in a not air- conditioned summer environment reaches whole-day stability within 0.1 pF + deviation of the series resistor.
A fifth advantage is minimum influence of contacting. In a connection to the test object stable capacitance of the connection is almost of exclusive importance, whereas the length or induction of connections and contact resistance, which is required by other methods, is not important. In a measurement of the capacitor 100 pH, the contacting resistance of 22 kQ increases a reading by merely about 1 %.
The same connection also allows a conventional impedance test, which is a sixth huge advantage. Impedance can be calculated from the measured voltages and a phase by using nothing more than secondary- school trigonometry. As the voltage on the test object at minimum impedances is directly proportional to impedance, the measurements in the lower range of measurement have as perfect accuracy as the measurement of minimum capacitances. By combining both methods which use the same connection and the same measured quantities (phase and voltage), one manual slow measurement (i. e. one excitement signal, the same series resistor R, the same frequency and the same AD sensitivity) can cover a diagnostic range (tolerance about +/- 50 %) from 0.02 pF to about 10 pF, or a measuring range from 2 pF to 0.1 uF at measurement tolerance of 1 %, or adequately more or less at a different frequency and series resistor.
A seventh advantage is high resistance to interfering signals except very closely to measuring frequency. A straight wire of 1 m on a desk has a capacitance of about 20 pF; in the described method with averaging the reading is stable within 0.1 pF.
An eighth advantage is a possibility of measuring low capacitances at a parallel connected resistor. A parallel connected resistor Rp together with the series measuring resistor R forms resistance that causes together with the capacitor a phase shift to be measured. A problem is posed by the capacitance of the measuring link and of the AD input, yet their influence can be eliminated by using trigonometry. The scope of elimination depends on the accuracy of the mathematical model. In an ideal model a parallel resistor 1 kQ downgrades all results by a half or doubles deviation.
Single-point undemanding contacting and low measuring frequency are suited for InCircuit fasteners with a field of spring pins, and for Flying Probers. Calibration in a pin fastener can be carried out without a test object. All pins with the exception of the pin to be measured are connected via relay matrix to the ground and phase is measured, which phase is subtracted from the measured phase when the test objects are measured. Calibration can be carried out also with an unequipped printed circuit board and its influence can thus be subtracted. The obtained capacitances are only a result of the components arranged on the printed circuit board. Any change performed in the device, such as replacement of a matrix, change in the fastener or change in connecting cables gets practically eliminated by simple calibration. This is not possible with the conventional impedance method and the devices of this type are therefore limited to the measurement of capacitance of up to about 100 pF at low accuracy.
The proposed circuit is especially applicable for advanced manual measurement of VI characteristic, where within a time interval of several 10 ms capacitance or impedance measurements are performed at sinusoidal voltage of 200 mVp and VI response is plotted (nodal or VI signature test) at excitation sinusoidal voltages up to 10 V and 10 kHz (in the case of use of the described DAQ card). Current is calculated from a voltage drop on the series resistor. If staircase saw tooth voltage is added, a diagram of dynamic resistance of protective diodes can be added. An accurate maximum value of voltage drop on protective diodes in the circuit can also be of great help. All measured quantities and both diagrams can be stored and subsequently used for a comparison with a good circuit. Such combination of real-time measurements allows fabrication of a very efficient device for manual diagnostics or as a simple InCircuit tester that practically needs no programming. Only a comparison with a good circuit is performed.

Claims

Patent claims
1. Method for measuring low capacitances in a circuit
characterized in that
by using AD sampling and an established mathematical method a change in the phase shift of a signal is measured with a resistor via which the measured capacitance is connected to a generator of sinusoidal voltage, and the value of the connected capacitance is calculated from a change in the measured angle.
2. Implementation of the method according to claim 1 with a DAQ card
characterized in that
simultaneously (in fact alternately one sample of each signal) via identical resistors and thus differentially signal phases are measured on a generator and a test object which eliminates a bunch of changes in phase shifts in the DAQ card, especially due to changes in temperatures, which would limit accuracy, and especially short and long-term stability.
3. Use of the method according to claims 1 and 2
characterized in that the same link can be used to measure impedance, VI characteristic of the link and to measure dynamic resistance of protective diodes in real time, i. e. all results within several 10 ms.
PCT/SI2014/000017 2013-08-27 2014-03-25 Measuring method of small capacitance in a circuit WO2015030686A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
SI201300235A SI24168A (en) 2013-08-27 2013-08-27 Method of measurement of small capacitance in the circuit
SIP-201300235 2013-08-27

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WO2015030686A1 true WO2015030686A1 (en) 2015-03-05

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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3713022A (en) * 1971-12-17 1973-01-23 Systomation Inc Capacitance measurement by phase-controlled sampling
JPS559126A (en) * 1978-07-04 1980-01-23 Mitsubishi Electric Corp Tangent delta measuring apparatus
DE3346207A1 (en) * 1983-12-21 1985-07-11 Siemens AG, 1000 Berlin und 8000 München Circuit arrangement for a device for measuring the capacitance and the dissipation factor of electrical capacitors
JPH0346572A (en) * 1989-07-13 1991-02-27 Fujitsu Ltd Capacitance measuring circuit
US6356086B1 (en) * 1999-04-12 2002-03-12 Sencore, Inc. Method and apparatus for the in-circuit testing of a capacitor
JP2004219159A (en) * 2003-01-10 2004-08-05 Ngk Spark Plug Co Ltd Electrostatic capacitance measuring instrument and sine wave amplitude detecting device
US20070120608A1 (en) * 2005-11-28 2007-05-31 Seagate Technology Llc Capacitor detection by phase shift

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3713022A (en) * 1971-12-17 1973-01-23 Systomation Inc Capacitance measurement by phase-controlled sampling
JPS559126A (en) * 1978-07-04 1980-01-23 Mitsubishi Electric Corp Tangent delta measuring apparatus
DE3346207A1 (en) * 1983-12-21 1985-07-11 Siemens AG, 1000 Berlin und 8000 München Circuit arrangement for a device for measuring the capacitance and the dissipation factor of electrical capacitors
JPH0346572A (en) * 1989-07-13 1991-02-27 Fujitsu Ltd Capacitance measuring circuit
US6356086B1 (en) * 1999-04-12 2002-03-12 Sencore, Inc. Method and apparatus for the in-circuit testing of a capacitor
JP2004219159A (en) * 2003-01-10 2004-08-05 Ngk Spark Plug Co Ltd Electrostatic capacitance measuring instrument and sine wave amplitude detecting device
US20070120608A1 (en) * 2005-11-28 2007-05-31 Seagate Technology Llc Capacitor detection by phase shift

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