WO2015019344A2 - Condensateur virtuel infini - Google Patents

Condensateur virtuel infini Download PDF

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Publication number
WO2015019344A2
WO2015019344A2 PCT/IL2014/050681 IL2014050681W WO2015019344A2 WO 2015019344 A2 WO2015019344 A2 WO 2015019344A2 IL 2014050681 W IL2014050681 W IL 2014050681W WO 2015019344 A2 WO2015019344 A2 WO 2015019344A2
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WO
WIPO (PCT)
Prior art keywords
input
capacitor
voltage
control circuitry
current
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Application number
PCT/IL2014/050681
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English (en)
Other versions
WO2015019344A3 (fr
Inventor
Guy YONA
George Weiss
Moshe KALECHSTAIN
Original Assignee
Yona Guy
George Weiss
Kalechstain Moshe
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yona Guy, George Weiss, Kalechstain Moshe filed Critical Yona Guy
Publication of WO2015019344A2 publication Critical patent/WO2015019344A2/fr
Publication of WO2015019344A3 publication Critical patent/WO2015019344A3/fr

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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
    • H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
    • H02M7/12—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/21—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/217—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M7/219—Conversion of ac power input into dc power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only in a bridge configuration
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/42—Circuits or arrangements for compensating for or adjusting power factor in converters or inverters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/66—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal
    • H02M7/68—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal by static converters
    • H02M7/72—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/79—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/797—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output with possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P80/00—Climate change mitigation technologies for sector-wide applications
    • Y02P80/10—Efficient use of energy, e.g. using compressed air or pressurized fluid as energy carrier

Definitions

  • the present application relates to the field of non-linear circuit elements, and more particularly to a circuit that behaves as a non-linear capacitor over a predetermined operating range and to a power factor correcting stage comprising the non-linear capacitor.
  • a power converter receives an input direct current (DC) or alternating current (AC) power, and converts it to a DC or AC output power, typically exhibiting a different voltage than the input power. Control of the output power may be responsive to the output voltage or to the output current.
  • DC direct current
  • AC alternating current
  • an arrangement circuit that behaves as a non-linear capacitor over a predetermined operating range, the circuit comprising: an input node arranged to receive an input current; an input capacitor coupled to the input node; an energy storage component arranged to store energy; a control circuitry, comprising a nonlinear controller, arranged to receive information regarding the received input current; a power converter coupled between the input capacitor and the energy storage component, the power converter responsive to the control circuitry, the control circuitry arranged to operate the converter such that over the predetermined operating range the voltage on the input capacitor is substantially unchanged irrespective of the total charge received at the input node.
  • FIG. 1 illustrates a high level block diagram of an exemplary circuit that behaves as a non-linear capacitor over a predetermined operating range
  • FIG. 2 is an idealized plot of the operation of the non-linear capacitor of FIG. 1;
  • FIG. 3 illustrates a high level circuit diagram of an exemplary embodiment of a non-linear capacitor, further illustrating a load in cooperation therewith;
  • FIG. 4 illustrates an average model of a portion of the circuit of FIG. 3
  • FIG. 5 illustrates a high level block diagram of an arrangement comprising a non-linear capacitor in cooperation with a charge control circuitry to control the input current I_IN to the non-linear capacitor;
  • FIG. 6 illustrates a high level schematic diagram of a non-linear capacitor in cooperation with a PFC front end circuit
  • FIG. 7 illustrates the current flow through the inductor of the PFC front end circuit of FIG. 6.
  • FIGs. 8A - 8D illustrate certain electrical waveforms of the circuit of
  • FIG. 1 illustrates a high level block diagram of an exemplary circuit that behaves as a non-linear capacitor over a predetermined operating range, denoted NLC 10.
  • NLC 10 comprises: input node 20 receiving an input current I_IN; an input capacitor 30; a power converter 40; an energy storage component 50; and a control circuitry 60 comprising sensors and a non-linear controller.
  • Power converter 40 is a bi-directional converter as will be explained further below.
  • Input node 20 is coupled to a first end of capacitor 30, to a first end of power converter 40 and to a first sensing input of control circuitry 60.
  • a second end of power converter 40 is coupled to energy storage component 50.
  • energy storage component 50 is coupled to a second sensing input of control circuitry 60, the optional coupling indicated by a dashed line.
  • Power converter 40 is responsive to a control output of control circuitry 60.
  • control circuitry 60 responsive to the operation of non-linear controller 70, is arranged to alternately: transfer current from input node 20 to energy storage component 50; and transfer current from energy storage component 50 to input node 20.
  • FIG. 2 is an idealized plot of the operation of NLC 10 of FIG. 1, where the x-axis represents charge of NLC 10 in arbitrary units, and the y-axis represents the voltage across NLC 10 in arbitrary units.
  • the voltage across NLC 10 is represented by the voltage V across capacitor 30, and the charge of NLC 10 is represented by the integral over time of I_IN appearing at node 20.
  • NLC 10 differs from such prior art behavior in that between QMIN and QMAX voltage V is substantially unchanged and is equal to a predetermined value denoted VREF.
  • NLC 10 is considered to be non-linear in that voltage V is a non-linear function of the charge Q .
  • NLC 10 as a nonlinear capacitor, is thus energy-conserving, in the sense that when moving from a charge Q 1 to a charge Q 2 where Q 2 > Qi (charging) and then back to Q 1 (discharging), we get back the same energy that we have stored. Assuming that NLC 10 cannot produce any energy, the stored energy at any point must be positive for all Q > 0, i.e.,
  • NLC 10 exhibits an additional output, as shown by the dotted path, through which Q can be measured, allowing to keep it in the desired range Q G [QMIN, QMAX] , since in this range Q cannot be estimated from V.
  • Q G [QMIN, QMAX] the dynamic capacitance is infinite, but the amount of stored energy is of course finite and in an exemplary embodiment not very large.
  • NLC 10 is advantageous for filtering or voltage regulation. While the plot of FIG. 2 is substantially flat in the region between QMIN and QMAX, and has been drawn with a linear relationship outside of that range, this is not meant to be limiting in any way.
  • the plot may have any shape as long as the restriction of EQ. 1 is satisfied.
  • An NLC 10 with a hysteretic Q-V plot may be designed without exceeding the scope, and may be particularly useful in case that a very fast power-up is needed.
  • VREF across a load, as will be described further below, when the energy from I_IN is variable. VREF may be fixed or variable without exceeding the scope.
  • FIG. 3 illustrates a high level circuit diagram of an exemplary embodiment of NLC 10, further illustrating a load 1 10 in cooperation therewith, and a first sense resistor R_IN.
  • NLC 10 comprises: capacitor 30; control circuitry 60 comprising a non-linear controller illustrated without limitation as a sliding mode controller; a first and a second driver 120; a first and a second electronically controlled switch 130, each illustrated as an NMOSFET, without limitation; a first and a second diode 140; an inductor 150; a second sense resistor R_S and a storage capacitor 160.
  • sense resistors are illustrated at points wherein current is to be sensed, it being understood that the use of sense resistors to sense current is simply one of a plurality of implementations to perform current sensing, and is not meant to be limiting in any way.
  • Energy storage component 160 is illustrated as a capacitor without limitation, those skilled in the art recognizing that an inductor may be utilized without exceeding the scope.
  • Input node 20 is coupled to a respective sense input of control circuitry
  • a second end of first sense resistor R_IN is coupled to a respective sense input of control circuitry 60, to a first end of load 110; to a first end of capacitor 30; to a drain of NMOSFET 130 and to the cathode of first diode 140.
  • a second end of load 110 and capacitor 130 are coupled to a common potential.
  • a first output of control circuitry 60 is coupled to the input of first driver 120 and the output of first driver 120 is coupled to the gate of first NMOSFET 130.
  • first NMOSFET 130 is coupled to the drain of second
  • control circuitry 60 further receives a predetermined reference value, VREF.
  • Control circuitry 60 works with a sampling period T s , and signals A, A G ⁇ 0,1 ⁇ that control the switches are preferably constant during each sampling period.
  • current I_IN and hence charge Q
  • charge fluctuations in the range [QMIN, QMAX] are transferred to storage capacitor 160 via converter 40, as long as the frequency of the charge fluctuations is much lower than the controller sampling frequency 1/T S .
  • V S m [ n is preferably not chosen to be too small, because it would lead to the DC/DC converter working at a high voltage ratio and hence low efficiency. There is also another reason why V s m ; n is preferably not chosen to be too small, and similarly VREF— V S max is not preferably chosen to be too small, which will be explained further below.
  • converter 40 in the region to the left of QMIN, which we denote the first region, when the total charge of the system is small (e.g., during power-up), converter 40 preferably creates an almost constant ratio between its input and output voltages,
  • V_S When V reaches the value VREF, V_S reaches the value V S min .
  • the charge needed for V to reach voltage VREF is QMIN.
  • the control of converter 40 in the first region can be, for example, sliding mode control or pulse width modulation (PWM) with proportional control.
  • the dynamic capacitance in this region is defined by +D 2 C S , where C represents the capacitance of capacitor 30, D represents the duty cycle of the operation of converter 40 and Cs represents the capacitance of storage capacitor 160.
  • the dynamic capacitance determined above is valid for frequencies significantly lower than the resonant frequency of inductor 150 and storage capacitor 160.
  • V_S may be allowed to exceed VREF, by reversing the operation of DC/DC converter 40.
  • This alternative realization allows much better regulation of voltage V , but the higher voltage required on storage capacitor 160 may be a drawback for many applications.
  • the operating range Q G [QMIN, QMAX] corresponds to storage capacitor 160 holding energy in the range
  • NLC 10 in the second region of FIG. 2, i.e. when Q G [QMIN, QMAX] .
  • storage capacitor 160 as a variable voltage source providing voltage Cs and NLC 10 as a boost converter that should produce a constant output voltage VREF.
  • V VREF
  • FIG. 4 illustrates a high level DC diagram of NLC 10, i.e. an average model of NLC 10.
  • a controlled current source 210 forces a current equals DC S V S
  • a controlled voltage source 220 forces a voltage equals DV. Assuming that voltage V is constant, we have:
  • D is the short-time average of A (this is the duty-cycle if A is a PWM signal) so that 0 ⁇ D ⁇ 1.
  • V s is the time derivative of V_S
  • I_S is the current through the inductor
  • This current can be calculated for example by measuring the voltage across R_S. i s is the time derivative of I_S, and L is the inductance of inductor 150. This is a second order nonlinear system with state variables V_S , I_S , which depends on the control signal D . From the equality of the two expressions for
  • non-linear controller 70 implements a particular a sliding mode controller working in the region Q G [QMIN, QMAX] .
  • the state equations of this system are:
  • NLC 10 preferably employs a novel sliding function, i.e. a function of three state variables and the disturbance i.
  • a novel sliding function i.e. a function of three state variables and the disturbance i.
  • nonlinear controller 70 determines the state of the switches of power converter 40 responsive to: VREF, the voltage V across capacitor 30, current i flowing into node 20, illustrated as current I_IN, voltage V_S across energy storage component 40 and current I_S , the current into energy storage component 50.
  • non-linear controller 70 is a sliding mode controller.
  • EQ. 12 imposes an upper bound for the ripple of V when x stays close to ⁇ and the existence condition is satisfied. Indeed, expressing V from EQ. 12 and then applying the first two constraints from EQ. 4 and the first constraint from EQ. 6 we obtain
  • non-linear controller 70 in accord with EQ. 5, however this is not meant to be limiting in any way.
  • Other implementations of non-linear controller 70 to determine the state of the switches of power converter 40 responsive to: VREF, current i flowing into node 20, voltage V_S across energy storage component 40 and current I_S may be implemented without exceeding the scope.
  • FIG. 5 illustrates a high level block diagram of an arrangement 250 comprising NLC 10 in cooperation with a charge control circuitry 270.
  • arrangement 250 comprises: an input stage 260; NLC 10 comprising therein input capacitor 30, power converter 40, energy storage component 50 and control circuitry 60 with non-linear controller 70; a load 110; and charge control circuitry 270.
  • Input stage 260 receives an electrical power P_IN, and converts same to an output current I_IN and voltage for presentation to load 110.
  • NLC 10 is present in parallel with load 110 to maintain a fixed voltage there across over a range of operating conditions.
  • Charge control circuitry 270 is arranged to receive a representation of I_IN and the voltage across energy storage component 50, V_S.
  • charge control circuitry 270 is arranged to adjust the operation of input stage 260 responsive to the received representation of I_IN and V_S so as to ensure that NLC 10 is maintained within the operating region Q G [QMIN, QMAX] .
  • charge control circuitry 270 operates as a PI controller responsive to inputs V_S, the input voltage from P_IN, denoted u r , and the current to the load, denoted i R .
  • a representation of the load current and input voltage is further provided to charge control circuit 270, and I_IN is not required.
  • input V_S is squared, filtered by a low pass filter, and then summed with the average V_S, i.e. 1 ⁇ 2 (Vs ,m ax A 2 + Vs ,m in A 2).
  • the output of the summation is fed to a PI controller.
  • the output of the PI controller is summed with a function of the current to the load, to set Ton so as to achieve both load regulation and PFC.
  • FIG. 6 illustrates a high level schematic diagram of NLC 10 in cooperation with a PFC front end, forming circuit 300, wherein a characteristic of NLC 10 is used to control the on time of the PFC front end.
  • a feedback advantageously controls the input of NLC 10 so as to maintain Q within QMIN and QMAX over the range of input voltages.
  • Circuit 300 comprises: full wave bridge 310; input capacitor 320; PFC inductor 330; critical mode controller 340; PFC inductor sense resistor R_LB ; electronically controlled switch 350, illustrated without limitation as an NMOSFET; first diode 360 and second diode; node 20; load sense resistor R_R; input sense resistor R_IN; charge control circuit 380; load 110; and NLC 10.
  • Three sense resistors are shown, it being understood that various embodiments described below do not require all three. As described above, sense resistors are illustrated as a particular method of sensing current flow values, however this is not meant to be limiting in any way, and current mirrors or Hall effect sensors may be utilized without exceeding the scope.
  • Second diode 365 may be implemented within MOSFET 350 without exceeding the scope.
  • the node input current I_D can, in one embodiment, be determined by the voltage drop across R_IN less the voltage drop across R_R.
  • the total charge Q stored in NLC 10 which is a function of the input current I_D, is utilized, thus providing information regarding the input current.
  • I_D is determined responsive to t_on, as described further below.
  • An input AC voltage is received and full wave rectified by full wave bridge 310.
  • the full wave rectified voltage is filtered by input capacitor 320 to remove high frequency components.
  • Critical mode controller 340 is arranged to open and close NMOSFET 350 so as to ensure the current I_LB flowing through inductor 330 is substantially aligned with the voltage appearing across input capacitor 320.
  • NMOSFET 350 When NMOSFET 350 is open, current flows towards load 110 and NLC 10 via first diode 360, with second diode 365 acting as a freewheeling diode.
  • NLC 10 operates as described above in relation to FIG. 3 to ensure that the voltage there across, and appearing across load 110 is substantially unchanged over the operating range.
  • NLC 10 further supplies voltage V_S to a sense input of charge control circuit 380.
  • Charge control circuit 380 is further arranged to receive at respective sensing inputs a representation of the current flowing towards load 110, depicted as I_R, and a representation of the charge Q stored in NLC 10.
  • the output charge control circuit 380 is coupled as a control input to critical mode controller 340 and is arranged to control the fixed "on" time of critical mode controller 340 so as to ensure that NLC 10 is within its predetermined operating range over the entire AC cycle range of the received AC voltage.
  • charge control circuitry 380 and critical mode controller 340 may cooperate to maintain NLC 10 within its operating range over a range of average AC input voltages received, and is not strictly limited to the operation over the AC cycle.
  • each current pulse through inductor 330 depicted as I_LB, has the form shown in FIG. 7, wherein the x-axis represents time and the y-axis represents current value.
  • NMOSFET 350 is closed and inductor current I_LB rises.
  • T_ON ⁇ t ⁇ T NMOSFER 350 is opened by critical mode controller 340 and the energy in inductor 330 is released to load 110 and NLC 10, causing I_LB to fall to zero, since V, the voltage across load 110 is greater than the voltage across input capacitor 320, which is denoted as u r .
  • V > u r ⁇ u g ⁇ , where represents the average AC input voltage received at full wave bridge 310.
  • critical mode controller 340 critical mode controller 340 again closes NMOSFET 350, starting the next triangular pulse.
  • the switching frequency is 1/T, which is variable, and is preferably much greater than the grid frequency, i.e. much greater than the frequency of the received AC power signal.
  • the average current in a triangle is
  • the average current of the diode is
  • T ⁇ D i (T - T_0N) T_0N .
  • NLC 10 is arranged to attempt to maintain the voltage V across load 110 substantially constant.
  • keeping Q in the region Q G [Q m j n , Q max ] (which is equivalent to keeping V_S G [3 ⁇ 4 ;m j n , s , max] ) involves regulating T_ON using a particular embodiment of charge controller 270 of arrangement 250, herein described in relation to charge control circuitry 380.
  • T_ON The value T_ON that the boost converter receives is updated when the grid voltage crosses zero, hence at twice the grid frequency, because T_ON should be constant in each semi-cycle to guarantee a nice sinusoidal shape for the current drawn from the AC grid, i g .
  • a feed-forward term from i out is used to improve the transient response to changes in the load:
  • tonO) W(s) ⁇ fl(s) + Ci 01it (s) .
  • u is the output of the controller 60
  • a hat denotes the Laplace transformation of the respective signal
  • W(s) is a low-pass filter
  • K is the feed-forward gain
  • u g max is the amplitude of the grid voltage.
  • the feed forward gain is derived from the steady-state criterion for zero energy change during one grid semi-cycle.
  • load changes do not occur frequently in relation to the frequency of the input AC power signal, since when a sudden change in the load occurs, the first priority is to maintain a constant V, even at the price of temporarily causing a distortion in i g .
  • the feed-forward term may instantaneously affect T_ON, thus violating the PFC objective of sinusoidal L, this is particularly true in the event that NLC 10 does not have enough energy reserve in energy storage component 50.
  • NLC 10 The performance of NLC 10 has been examined by MATLAB simulations using the SimPowerSystems toolbox.
  • the sampling frequency of control circuitry 60 is in one embodiment 2MHz.
  • the results are shown in FIGs 8A - 8D, wherein the x-axis of the respective graphs represents time and the y-axis represents amplitude.
  • I_LB of FIG. 8A represents the output current of the bridge rectifier.
  • I_IN of FIG. 8B represents the input current of NLC_10
  • .V_ERROR of FIG. 8C represents the voltage error VREF-V filtered via a low-pass filter with a cut off frequency of lKHz
  • V_S of FIG. 8D is as described above
  • Embodiments herein enable an NLC, which is an electronic circuit that replaces a large filter capacitor.
  • a realization of the NLC using a bidirectional DC/DC converter with sliding mode control was further enabled.
  • An application of the NLC as a component in the boost converter of a PFC was enabled providing for a capacitor 65 times smaller than an equivalent filter capacitor required to achieve the same output voltage ripple.
  • the use of much smaller capacitors instead of electrolytic capacitors contributes to higher reliability and smaller devices. Therefore, the NLC enabled herein may be utilized to replace the input or output capacitors in various power converters, where there is a significant low frequency current flowing through the capacitor. Typical applications are in PFCs and in single phase inverters.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

Cette invention concerne un circuit qui se comporte comme un condensateur non linéaire sur une plage de fonctionnement prédéterminée, ledit circuit comprenant : un nœud d'entrée conçu pour recevoir un courant d'entrée ; un condensateur d'entrée couplé au nœud d'entrée ; un composant de stockage d'énergie conçu pour stocker de l'énergie ; un circuit de commande, comprenant un condensateur non linéaire, conçu pour recevoir des informations concernant le courant d'entrée reçu ; un convertisseur de puissance couplé entre le condensateur d'entrée et le composant de stockage d'énergie, ledit convertisseur de puissance réagissant au circuit de commande, ledit circuit de commande étant conçu pour actionner le convertisseur de telle façon que sur la plage de fonctionnement prédéterminée la tension au niveau du condensateur d'entrée reste sensiblement identique indépendamment de la charge totale reçue sur le nœud d'entrée.
PCT/IL2014/050681 2013-08-07 2014-07-27 Condensateur virtuel infini WO2015019344A2 (fr)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019073353A1 (fr) * 2017-10-09 2019-04-18 Technology Innovation Momentum Fund (Israel) Limited Partnership Réalisation prête à l'emploi de condensateurs virtuels infinis
US20200127455A1 (en) * 2018-10-21 2020-04-23 Technology Innovation Momentum Fund (Israel) Limited Partnership Device and Method for Controlling DC Bus Ripple

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8279642B2 (en) 2009-07-31 2012-10-02 Solarbridge Technologies, Inc. Apparatus for converting direct current to alternating current using an active filter to reduce double-frequency ripple power of bus waveform

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5404092A (en) * 1993-09-03 1995-04-04 Motorola, Inc. High power factor AC-DC converter with reactive shunt regulation
EP1001514A3 (fr) * 1998-11-16 2000-09-27 Alcatel Convertisseur de puissance à decoupage avec temps de maintien et réduction des harmoniques
US6424207B1 (en) * 2001-04-18 2002-07-23 Northrop Grumman Corporation PWM active filter for DC power systems
EP1296441B1 (fr) * 2001-09-25 2006-08-16 ABB Schweiz AG Système de production d'énergie
WO2010014749A1 (fr) * 2008-07-30 2010-02-04 Rolls-Royce Corporation Système d'énergie électrique avec redresseur à modulation d'impulsions en durée (pwm) haute densité

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8279642B2 (en) 2009-07-31 2012-10-02 Solarbridge Technologies, Inc. Apparatus for converting direct current to alternating current using an active filter to reduce double-frequency ripple power of bus waveform

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
NA; GOU; KIM: "Journal of Electrical Engineering, Theory and Applications (JEETA", 2010, HYPERSCIENCES PUBLISHER, article "Analysis and Control of a Bidirectional DC/DC Converter for an Ultra-Capacitor in a Fuel Cell Generation System"

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019073353A1 (fr) * 2017-10-09 2019-04-18 Technology Innovation Momentum Fund (Israel) Limited Partnership Réalisation prête à l'emploi de condensateurs virtuels infinis
US20200127455A1 (en) * 2018-10-21 2020-04-23 Technology Innovation Momentum Fund (Israel) Limited Partnership Device and Method for Controlling DC Bus Ripple

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