WO2015010387A1 - 基板及其制作方法、显示装置 - Google Patents
基板及其制作方法、显示装置 Download PDFInfo
- Publication number
- WO2015010387A1 WO2015010387A1 PCT/CN2013/086550 CN2013086550W WO2015010387A1 WO 2015010387 A1 WO2015010387 A1 WO 2015010387A1 CN 2013086550 W CN2013086550 W CN 2013086550W WO 2015010387 A1 WO2015010387 A1 WO 2015010387A1
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- WIPO (PCT)
- Prior art keywords
- area
- buffer structure
- display area
- substrate
- sealant
- Prior art date
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 106
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 16
- 239000000565 sealant Substances 0.000 claims abstract description 91
- 239000004973 liquid crystal related substance Substances 0.000 claims abstract description 53
- 229920002120 photoresistant polymer Polymers 0.000 claims description 57
- 238000000034 method Methods 0.000 claims description 29
- 125000006850 spacer group Chemical group 0.000 claims description 21
- 230000005540 biological transmission Effects 0.000 claims description 20
- 230000008569 process Effects 0.000 claims description 20
- 230000014759 maintenance of location Effects 0.000 claims description 13
- 238000007789 sealing Methods 0.000 claims description 12
- 238000009792 diffusion process Methods 0.000 claims description 11
- 230000000717 retained effect Effects 0.000 claims description 9
- 238000002834 transmittance Methods 0.000 claims description 9
- 239000003292 glue Substances 0.000 claims description 8
- 238000000059 patterning Methods 0.000 claims description 6
- 230000000630 rising effect Effects 0.000 claims description 5
- 239000010410 layer Substances 0.000 description 15
- 230000036961 partial effect Effects 0.000 description 8
- 230000002829 reductive effect Effects 0.000 description 6
- 239000010408 film Substances 0.000 description 5
- 230000015572 biosynthetic process Effects 0.000 description 4
- 238000012864 cross contamination Methods 0.000 description 4
- 238000001723 curing Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 239000010409 thin film Substances 0.000 description 3
- 230000003139 buffering effect Effects 0.000 description 2
- 210000002858 crystal cell Anatomy 0.000 description 2
- 239000011241 protective layer Substances 0.000 description 2
- PEDCQBHIVMGVHV-UHFFFAOYSA-N Glycerine Chemical compound OCC(O)CO PEDCQBHIVMGVHV-UHFFFAOYSA-N 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000003365 glass fiber Substances 0.000 description 1
- 238000013007 heat curing Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000008188 pellet Substances 0.000 description 1
- 238000000016 photochemical curing Methods 0.000 description 1
- 230000002035 prolonged effect Effects 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1341—Filling or closing of cells
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1341—Filling or closing of cells
- G02F1/13415—Drop filling process
Definitions
- Embodiments of the present invention relate to a substrate, a method of fabricating the same, and a display device. Background technique
- the liquid crystal display is a flat ultra-thin display device, and its performance parameters such as response time, color, viewing angle, and contrast are mainly determined by the liquid crystal display panel.
- the liquid crystal display panel comprises an array substrate, a color filter substrate and a liquid crystal layer, and the liquid crystal layer is disposed between the array substrate and the color filter substrate and located in the display region.
- a sealant is disposed outside the display area for sealing the liquid crystal display panel.
- the manufacturing process of the liquid crystal display panel is generally as follows: a color film substrate and an array substrate are prepared, and a frame sealant is coated on the color film substrate or the array substrate, and a liquid crystal dropping device is used to drip an appropriate amount of liquid crystal in a region surrounded by the sealant.
- the cell-assembly is carried out in a vacuum environment, the two substrates are bonded to each other, and finally the frame sealant is fixed.
- One embodiment of the present invention provides a substrate including a display area, a sealant region, and a buffer structure between the display region and the sealant region.
- the buffer structure is used to reduce the speed at which the liquid crystal of the display area diffuses into the sealant region.
- the buffer structure may be a slope that gradually increases in a direction away from the display area.
- the buffer structure may further include a plane close to the sealant region, the plane being higher than a surface of the display area, the slope being located between the plane and the display area, the slope connection The plane.
- the spacing between the buffer structure and the edge of the display area adjacent to the buffer structure may be 100 to 200 ⁇ m.
- the sealant region is located on a side of the buffer structure away from the display area, and a spacing between a side of the buffer structure adjacent to the sealant region and the sealant region may be 100. ⁇ 200 ⁇ .
- the sealant region is located above the plane of the buffer structure, and the spacing between the sealant region and the slope of the buffer structure may be 100-200 ⁇ m.
- Another embodiment of the present invention also provides a display device comprising any of the substrates described above.
- a further embodiment of the present invention further provides a method for fabricating a substrate, comprising: forming a pattern including a buffer structure on the substrate, the buffer structure being located between the display area and the sealant region, The speed at which the liquid crystal of the display area diffuses toward the sealant region is reduced.
- a photoresist layer is formed on the substrate; a pattern including a buffer structure and a spacer is formed on the substrate by a patterning process.
- the buffer structure includes a slope gradually rising in a direction away from the display area, and a plane close to the sealant region, the plane being higher than a surface of the display area, the slope being located at the Between the plane and the display area, the slope is connected to the plane; the photoresist layer is exposed through a multi-gray mask to form a photoresist completely non-retained area in the display area,
- the planar region of the buffer structure forms a photoresist partial retention region, the spacer region forms a photoresist complete retention region, and the slope region of the buffer structure forms light that gradually rises away from the display region
- the glue is incrementally incremented.
- the photoresist may be a negative photoresist
- the multi-gray mask includes a completely transparent region, a completely opaque region, a partially permeable region, and an incremental transmission region. a region corresponding to the photoresist completely reserved region, the completely opaque region corresponding to the photoresist completely non-retained region, the partial transmission region corresponding to the photoresist portion reserved region, the incremental transmission The region corresponds to the photoresist incremental retention region, and the transmittance of the incremental transmission region increases as the remaining photoresist height increases.
- FIG. 1 is a schematic view of a first substrate in an embodiment of the present invention
- FIG. 2 is a schematic view of a second substrate in an embodiment of the present invention.
- FIG. 3 is a schematic view of a third substrate in an embodiment of the present invention.
- FIG. 4 is an enlarged schematic view of a ⁇ region in FIG. 1 according to an embodiment of the present invention
- FIG. 5 is a schematic diagram of a fourth substrate according to an embodiment of the present invention.
- Figure 6 is a schematic view showing an exposure process for forming a spacer and a buffer structure in an embodiment of the present invention
- Fig. 7 is a schematic view showing another exposure process for forming a spacer and a buffer structure in an embodiment of the present invention.
- the inventors found that during the process of dropping liquid crystal, the diffusion speed of the liquid crystal is very fast, and when the sealing frame glue on the color film substrate or the array substrate is not completely cured, the liquid crystal is in contact with the sealant, so the liquid crystal Cross-contamination with the sealant. At the same time, due to the excessive impact force of the liquid crystal on the sealant, it is easy to cause the sealant to be damaged or even puncture, which reduces the yield and display effect of the liquid crystal display panel.
- Embodiments of the present invention provide a substrate, a manufacturing method thereof, and a display device, which can reduce the diffusion speed of the liquid crystal outside the display area during the process of dropping the liquid crystal, and avoid the liquid crystal and the sealing when the sealing glue is not completely cured.
- the cross-contamination generated by the contact between the frame and the moon reduces the impact damage of the liquid crystal on the sealant, and improves the yield and display effect of the liquid crystal display panel.
- the present embodiment provides a substrate.
- the substrate includes a display area 1 and a sealant region 2 of a coated sealant 21.
- the display area 1 is disposed in the middle of the substrate, and is surrounded by the display area.
- the surrounding area including the sealant area.
- the substrate further includes a buffer structure 3 between the display region 1 and the sealant region 2 for reducing the speed at which the liquid crystal of the display region 1 diffuses toward the sealant region 2. Since the buffer structure is disposed between the display area and the sealant area on the substrate, the buffer structure reduces the speed of diffusion of the liquid crystal in the display area to the sealant area during the process of dropping the liquid crystal, and avoids the sealing of the sealant. When fully cured, the cross-contamination caused by the contact between the liquid crystal and the sealant is reduced, and the impact damage of the liquid crystal on the sealant is reduced, and the yield and display effect of the liquid crystal display panel are improved.
- the position between the display area 1 and the sealant area 2 refers to the display area.
- the buffer structure 3 is located between the display area 1 and the sealant area 2, and the display area 1 and the sealant area 2 may be located on the upper and lower sides of the buffer structure 3, on the left and right sides; or the display area 1 may be located in the buffer structure.
- the sealant area 2 is located on one side of the buffer structure 3, or the display area 1 is located on one side of the buffer structure 3, and the sealant area 2 is located on one side of the buffer structure 3 .
- the present invention is not limited to the above structural modifications.
- the substrate may be an array substrate or a color film substrate.
- the display region 1 is a region where a thin film transistor, a gate line, a data line, and a storage capacitor are located.
- the display region 1 is a region covered by a color photoresist layer or the like.
- the edge portion of the substrate is coated with a sealant 21, which functions to closely bond the array substrate and the color filter substrate to form a liquid crystal cell, and cut off contact between the liquid crystal and the outside.
- a sealant 21 which functions to closely bond the array substrate and the color filter substrate to form a liquid crystal cell, and cut off contact between the liquid crystal and the outside.
- the main component of the sealant 21 is a resin, and the types can be classified into a thermosetting type and a photocuring type.
- the heat curing type frame sealant has high strength, but the curing time is long; the light curing type frame sealant has low strength, but the curing time is short. Therefore, in order to enable the sealant to achieve higher strength in a shorter curing time, a hybrid sealant is often used. It is also common to add glass fibers and metal pellets to the sealant to improve the performance of the sealant.
- the display area of the substrate in the conventional technology has a larger height than the non-display area (such as the frame sealant area) around the display area, and the liquid crystal of the display area diffuses to the non-display area too fast.
- the buffer structure 3 is further disposed on the substrate, and the buffer structure 3 has a certain hindrance effect on the diffusion of the liquid crystal in the display area to the non-display area, and reduces the diffusion speed of the liquid crystal in the non-display area of the display area.
- the buffer structure 3 may be any structure that can reduce the diffusion speed of the liquid crystal.
- the buffer structure 3 can make a structure which is gradually increased along a direction away from the display area 1 and a plane close to the sealant area 2; as shown in FIG. 2, the buffer structure 3 can be A structure having a wavy surface gradually rising in the direction of the display region 1; as shown in FIG. 3, the buffer structure 3 may be a structure having a step-up surface in a direction away from the display region 1, and the like.
- the buffer structure 3 shown in Fig. 1 is preferred in the embodiment of the present invention for the comprehensive consideration of the buffering effect and the ease of manufacture.
- the cushioning structure 3 is a slope which gradually rises in a direction away from the display area 1.
- the cushioning structure 3 further includes a plane adjacent to the sealant region 2 which is higher than the surface of the display region 1, the bevel being directly connected to the plane, and the bevel being located between the plane and the display region 1.
- the surface of the display region 1 means that when the substrate is an array substrate, the surface of the display region 1 is a surface on which a thin film transistor, a gate line, a data line, an electrode structure, or the like is formed.
- the surface of the display region 1 is a surface on which a color resist layer or the like is formed.
- a certain buffer is provided for the liquid crystal of the display area 1, and the buffer structure 3 and the edge of the display area 1 close to the buffer structure 3 may be provided.
- dl can be 100 ⁇ 200 ⁇ , and the specific value can be determined by the fineness of the device and the design requirements of the frame.
- the gap dl between the buffer structure 3 and the edge of the display area 1 near the buffer structure 3 is 200 ⁇ m.
- the arrangement of the buffer structure 3 on the substrate should be such as to not affect the formation of the sealant 21.
- the sealant region 2 is located on the side of the buffer structure 3 away from the display region 1, as shown in FIG. 4, there is a certain distance d2 between the side of the buffer structure 3 adjacent to the sealant region 2 and the sealant region 2.
- the d2 may be in the range of 100 to 200 ⁇ m, and the specific value may be determined by the fineness of the device and the design requirements of the frame. In the embodiment of the present invention, d2 is preferably 150 ⁇ m; when the sealant region 2 is located above the plane of the buffer structure 3, As shown in FIG.
- d3 there is a certain distance d3 between the sealant region 2 and the edge of the slope of the buffer structure 3, and d3 may be 100 ⁇ 200 ⁇ , and the specific value may be determined by the design precision of the device and the design requirement of the aperture ratio. In the embodiment of the invention, it is preferred that d3 is 150 ⁇ m.
- the relative position of the buffer structure 3 and the sealant region 2 is not limited to the above two modes, as long as the buffer structure 3 is satisfied.
- the setting does not affect the formation of the sealant 21, which may be determined according to the actual situation, and is not specifically limited in the embodiment of the present invention.
- Embodiments of the present invention also provide a display device including a substrate having the structure as described above.
- the display device can be: a liquid crystal panel, an electronic paper, an organic light emitting display panel, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigation device, and the like, or any display product or component.
- the embodiment of the present invention further provides a method for fabricating a substrate as shown in FIG. 1 to FIG. 5, the method comprising: forming a pattern of a buffer structure on a substrate, wherein the buffer structure is located between the display area 1 and the sealant area. To reduce the speed at which the liquid crystal in the display area diffuses into the sealant region.
- the technical solution of the present invention also provides a method for fabricating a substrate, and the method for fabricating the substrate is as described above.
- the manufacturing method of the substrate is based on the improvement of the existing substrate manufacturing method, so that the prepared substrate has a buffer structure, which can reduce the speed of diffusion of the liquid crystal in the display region to the sealant region, and the method is easy to promote. .
- the buffer structure 3 can be separately fabricated on the substrate during the substrate fabrication process.
- a thin film transistor, a gate line, a data line, and an electrode junction protection layer may be formed on the array substrate.
- a buffer structure 3 is formed on the array substrate; when the substrate is a color filter substrate, A black matrix, a color photoresist layer, a transparent protective layer and a spacer protective layer may be formed on the color filter substrate.
- the buffer structure 3 is formed on the color filter substrate.
- the buffer structure 3 When the buffer structure 3 is separately fabricated on the substrate, a plurality of patterning processes are required, the process is complicated, and the masking plate is expensive to manufacture, and there is a problem of alignment error at the time of multiple exposure. Since the buffer structure 3 acts to hinder the diffusion of the liquid crystal, there is no requirement for the properties of the materials used. Therefore, in the process of fabricating the substrate, the buffer structure 3 can be formed while forming other structures on the substrate, the number of exposures is reduced, and the cost is reduced, and at the same time, The problem of alignment error that exists during multiple exposures.
- the buffer structure 3 may be any structure that can reduce the diffusion speed of the liquid crystal.
- the buffer structure 3 may be a structure composed of a slope gradually rising in a direction away from the display area 1 and a plane close to the sealant region 2;
- the buffer structure 3 may be a structure having a wavy surface that gradually rises in a direction away from the display area 1.
- the buffer structure 3 may have a step rise in a direction away from the display area 1. The structure of the surface, etc.
- the step of fabricating the buffer structure 3 while forming the spacer on the substrate can be performed by: forming a photoresist layer on the substrate; forming a pattern including the buffer structure and the spacer on the substrate by a patterning process.
- a layer of photoresist can be formed on the substrate by spin coating, slit coating, or the like.
- the buffer structure 3 as shown in Fig. 1 is preferred in the embodiment of the invention for the comprehensive consideration of the buffering effect and ease of manufacture.
- the cushioning structure 3 is a slope which gradually rises in a direction away from the display area 1.
- the cushioning structure 3 further includes a plane adjacent to the sealant region 2 which is higher than the surface of the display region 1, the slope being located between the plane and the display region 1 and being directly connected to the plane.
- the multi-gray mask having the buffer structure 3 as shown in Fig. 1 while fabricating the spacer may have the following design.
- the multi-gray mask 10 When the photoresist coated on the array substrate is a negative photoresist, the multi-gray mask 10 includes a completely permeable region 5, a completely opaque region 6, a partially permeable region 7, and an incremental transmission region 8.
- the complete transmission region 5 corresponds to the photoresist completely reserved region;
- the completely opaque region 6 corresponds to the photoresist completely unretained region;
- the partial transmission region 7 corresponds to the photoresist partial retention region, exemplarily, the transmittance is 50 %, which can be adjusted according to actual conditions;
- the incremental transmission region 8 corresponds to the photoresist incremental retention region, and the transmittance of the incremental transmission region 8 increases as the retained photoresist height increases, exemplarily, the transmittance It is 10% ⁇ 40%, and the specific height can be adjusted according to the needs of the photoresist.
- the photoresist layer is exposed through the multi-gray mask to form a photoresist-free region in the display region 1.
- the planar region of the buffer structure 3 forms a photoresist partial retention region, and the spacer region 4 A photoresist complete retention region is formed, and the slope region of the buffer structure 3 forms a photoresist incremental retention region that gradually rises away from the display region 1.
- a certain distance d1 between the buffer structure 3 and the edge of the display area 1 near the buffer structure 3 may be obtained, and the dl may be 100 ⁇ 200 ⁇ , its specific value can be determined by the fineness of the equipment and the aperture ratio and the design requirements of the frame.
- the gap dl between the buffer structure 3 and the edge of the display region 1 close to the buffer structure 3 may be 200 ⁇ m.
- the arrangement of the buffer structure 3 on the substrate should be such as to not affect the formation of the sealant 21.
- d2 may be 150 ⁇ m; and when the sealant region 2 is located above the plane of the buffer structure 3, as shown in the figure, the specific value may be determined by the device fineness and the design requirements of the frame.
- d3 there is a certain distance d3 between the frame sealant 21 and the inclined surface of the buffer structure 3.
- the d3 may be 100 ⁇ 200 ⁇ , and the specific value may be determined by the design requirements of the device fineness and the aperture ratio, etc., in the embodiment of the present invention. Preferably, d3 may be 150 ⁇ m.
- the relative position of the buffer structure 3 and the sealant region 2 is not limited to the above two modes. As long as the setting of the buffer structure 3 is not affected, the formation of the sealant 21 may be affected, which may be determined according to actual conditions. There are no specific restrictions on this.
- the embodiment of the present invention can also select a multi-gray mask with the following design to cover the photoresist layer for exposure: the photoresist coated on the array substrate
- the multi-gray mask includes a full transmission region 5, a completely opaque region 6, a partial transmission region 7, and an incremental transmission region 8.
- the completely transparent region 5 corresponds to the photoresist completely reserved region, that is, the position of the spacer 4; the completely impervious region 6 corresponds to the photoresist completely unretained region, that is, the position of the display region 1 and the buffer structure 3 and the display region 1 Close to the position between the edges of the buffer structure 3 (ie, at the dl shown in FIG.
- the completely non-transmissive area 6 may further include The framed rubber region 2;
- the partial transmission region 7 corresponds to the photoresist portion reserved region, that is, the position of the planar region of the buffer structure 3, exemplarily, the transmittance is 50%, which can be adjusted according to actual conditions;
- the region 8 corresponds to the photoresist incremental retention region, that is, the position of the slope region of the buffer structure 3, and the transmittance of the incremental transmission region 8 increases as the remaining photoresist height increases, exemplarily, the transmittance is 10 % ⁇ 40%, the specific can be adjusted according to the height of the photoresist to be retained.
- the photoresist layer is covered with a multi-gray mask as described above, and the photoresist layer is exposed to a position between the display region 1, the buffer structure 3 and the edge of the display region 1 near the buffer structure 3, and
- the sealant region forms a completely non-retained area of the photoresist
- the planar region of the buffer structure 3 forms a photoresist partial retention region
- the region of the spacer 4 forms a photoresist completely reserved region
- the slope region of the buffer structure 3 is formed away from A photoresist incremental retention region in which the direction of the region 1 is gradually increased is displayed.
- a positive photoresist may also be coated on the array substrate, and when the buffer structure 3 is fabricated, the light transmittance of different regions on the half gray mask layer used may be correspondingly Adjustment can be made, the process and method are similar, and will not be described here.
- a spacer 4 is illustrated in the display area 1 in Fig. 6 or Fig. 7, and is not a limitation on the shape, number and position of the spacer 4.
- the spacer 4 may be provided with a plurality of spacers 4 of different shapes in a suitable position of the display area 1 or the non-display area according to the requirement of the thickness of the liquid crystal cell.
- the spacer 4 is formed in the display area. 1 can also be formed on the non-display area, and its shape can be columnar or spherical. The embodiments of the present invention are not limited to these variations.
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Abstract
提供一种基板包括显示区域(1)、封胶框区域(2)、位于显示区域(1)和封胶框区域(2)之间的缓冲结构(3),该缓冲结构(3)用于降低显示区域(1)的液晶向封胶框区域(2)扩散的速度。并将该基板应用于显示装置中。该基板的制作方法包括:在基板上形成包括缓冲结构(3)的图形,缓冲结构(3)位于显示区域(1)和封胶框区域(2)之间,以降低显示区域(1)的液晶向封胶框区域(2)扩散的速度。
Description
基板及其制作方法、 显示装置 技术领域
本发明的实施例涉及一种基板及其制作方法、 显示装置。 背景技术
液晶显示器是一种平面超薄显示设备, 其响应时间、 色彩、 可视角度、 对比度等性能参数主要由液晶显示面板决定。 液晶显示面板包括阵列基板、 彩膜基板和液晶层, 液晶层设置在阵列基板和彩膜基板之间且位于显示区域 内。 此外, 在显示区域外设置有封框胶, 用于密封液晶显示面板。
液晶显示面板的制作流程通常为: 制作彩膜基板及阵列基板, 在彩膜基 板或阵列基板上涂布一圏封框胶, 使用液晶滴下装置在封框胶围成的区域内 滴下适量的液晶, 在真空环境中进行对盒工艺(cell-assembly ) , 将两块基板 相互贴合, 最后使封框胶固定成型。 发明内容
本发明的一个实施例提供了一种基板, 所述基板包括显示区域、 封框胶 区域和位于所述显示区域和所述封框胶区域之间的緩沖结构。 所述緩沖结构 用于降低所述显示区域的液晶向所述封框胶区域扩散的速度。
例如, 所述緩沖结构可以为沿着远离所述显示区域的方向逐渐升高的斜 面。
例如, 所述緩沖结构还可以包括靠近所述封框胶区域的平面, 所述平面 高于所述显示区域的表面, 所述斜面位于所述平面和所述显示区域之间, 所 述斜面连接所述平面。
例如, 所述緩沖结构与所述显示区域的靠近所述緩沖结构的边缘之间的 间距可以为 100~200μηι。
例如, 所述封框胶区域位于所述緩沖结构远离所述显示区域的一侧, 所 述緩沖结构靠近所述封框胶区域的一侧与所述封框胶区域之间的间距可以为 100~200μηι。
例如, 所述封框胶区域位于所述緩沖结构的平面之上, 所述封框胶区域 与所述緩沖结构的斜面之间的间距可以为 100~200μηι。
本发明的另一个实施例还提供了一种显示装置, 包括如上所述的任一基 板。
本发明的再一个实施例还提供了一种基板的制作方法, 包括: 在所述基 板上形成包括緩沖结构的图形, 所述緩沖结构位于所述显示区域和所述封框 胶区域之间, 以降低所述显示区域的液晶向所述封框胶区域扩散的速度。
例如, 在所述基板上形成一层光刻胶层; 通过构图工艺在所述基板上形 成包括緩沖结构和隔垫物的图形。
例如,所述緩沖结构包括沿着远离所述显示区域的方向逐渐升高的斜面, 以及靠近所述封框胶区域的平面, 所述平面高于所述显示区域的表面, 所述 斜面位于所述平面和所述显示区域之间, 所述斜面连接所述平面; 通过多灰 阶掩膜板对所述光刻胶层进行曝光, 以在所述显示区域形成光刻胶完全不保 留区, 所述緩沖结构的平面区域形成光刻胶部分保留区, 所述隔垫物的区域 形成光刻胶完全保留区, 所述緩沖结构的斜面区域形成沿远离所述显示区域 方向逐渐升高的光刻胶递增保留区。
例如, 所述光刻胶可以为负性光刻胶, 所述多灰阶掩膜板包括完全透过 区、 完全不透过区、 部分透过区和递增透过区, 所述完全透过区对应所述光 刻胶完全保留区, 所述完全不透过区对应所述光刻胶完全不保留区, 所述部 分透过区对应所述光刻胶部分保留区, 所述递增透过区对应所述光刻胶递增 保留区, 且所述递增透过区的透过率随保留的光刻胶高度递增而递增。 附图说明
为了更清楚地说明本发明实施例的技术方案, 下面将对实施例的附图作 筒单地介绍,显而易见地,下面描述中的附图仅仅涉及本发明的一些实施例, 而非对本发明的限制。
图 1为本发明实施例中的第一种基板示意图;
图 2为本发明实施例中的第二种基板示意图;
图 3为本发明实施例中的第三种基板示意图;
图 4为本发明实施例中的图 1中的 Α区域放大示意图;
图 5为本发明实施例中的第四种基板示意图;
图 6 为本发明实施例中的形成隔垫物和緩沖结构的一种曝光过程示意 图;
图 7为本发明实施例中的形成隔垫物和緩沖结构的另一种曝光过程示意 图。
附图标记:
1一显示区域; 2—封框胶; 3—緩沖结构;
隔垫物; 5—完全透过区; 6—完全不透过区; 7一部分透过区 8—递增透过区。 具体实施方式
为使本发明实施例的目的、 技术方案和优点更加清楚, 下面将结合本发 明实施例的附图,对本发明实施例的技术方案进行清楚、 完整地描述。显然, 所描述的实施例是本发明的一部分实施例, 而不是全部的实施例。 基于所描 述的本发明的实施例, 本领域普通技术人员在无需创造性劳动的前提下所获 得的所有其他实施例, 都属于本发明保护的范围。
发明人在研究过程中发现,在滴注液晶工艺过程中,液晶扩散速度很快, 导致在彩膜基板或阵列基板上的封框胶尚未完全固化时, 液晶就与封框胶接 触, 因此液晶和封框胶产生交叉污染。 同时由于液晶对封框胶的沖击力过大, 容易导致封框胶被破坏甚至出现穿刺现象, 降低了液晶显示面板的良品率和 显示效果。
本发明的实施例提供了一种基板及其制作方法、 显示装置, 其能够在滴 注液晶工艺过程中, 降低液晶在显示区域外的扩散速度, 避免封框胶尚未完 全固化时, 液晶和封框月交接触产生的交叉污染, 同时减小液晶对封框胶的沖 击破坏, 提高液晶显示面板的良品率和显示效果。
实施例一
本实施例提供一种基板, 如图 1所示, 该基板包括显示区域 1和涂布封 框胶 21的封框胶区域 2, 该显示区域 1设置在该基板的中部, 在显示区域周 围是包括封框胶区域在内的周边区域。 该基板还包括位于显示区域 1和封框 胶区域 2之间的緩沖结构 3, 该緩沖结构 3用于降低显示区域 1的液晶向封 框胶区域 2扩散的速度。
由于基板上在显示区域和封框胶区域之间设置有緩沖结构, 所以在滴注 液晶工艺过程中, 该緩沖结构降低了显示区域的液晶向封框胶区域扩散的速 度, 避免封框胶尚未完全固化时, 液晶和封框胶接触产生的交叉污染, 同时 减小液晶对封框胶的沖击破坏, 提高液晶显示面板的良品率和显示效果。
需要说明的是, 显示区域 1和封框胶区域 2之间的位置是指与显示区域
1和封框胶区域均相邻或接触的位置, 虽然位于显示区域 1和封框胶区域 2 之间的位置不仅限于水平方向或竖直方向, 也可以为斜向或者其他特定的方 向。 例如緩沖结构 3位于显示区域 1和封框胶区域 2之间的示例可以为显示 区域 1和封框胶区域 2位于緩沖结构 3上下两侧、 左右两侧; 也可以为显示 区域 1位于緩沖结构 3左右的某一侧, 封框胶区域 2位于緩沖结构 3上下的 某一侧, 或者显示区域 1位于緩沖结构 3上下的某一侧, 封框胶区域 2位于 緩沖结构 3左右的某一侧。 对于以上结构的变形, 本发明均不做限定。
进一步地, 该基板可以为阵列基板也可以为彩膜基板。 当上述基板为阵 列基板时, 显示区域 1为薄膜晶体管、栅线、数据线和存储电容等所在区域; 当上述基板为彩膜基板时, 显示区域 1为彩色光阻层等覆盖的区域。
在阵列基板或彩膜基板的制作过程中, 基板的边缘部位涂布有封框胶 21 , 其作用在于使阵列基板和彩膜基板紧密结合以形成液晶盒(cell ) , 切断 液晶与外界的接触, 以确保液晶显示面板的稳定性和可靠性, 并在一定程度 上起到维持阵列基板和彩膜基板之间的间隙稳定的作用。
封框胶 21的主要成分为树脂,种类可分为热固化型和光固化型。热固化 型封框胶强度高, 但固化时间长; 光固化型封框胶强度低, 但固化时间短。 因此, 为了使封框胶能够在较短的固化时间内获得较高强度, 常采用混合型 封框胶。 通常还可以在封框胶内添加玻璃纤维和金属小球等来改善封框胶的 性能。 然后, 采用液晶滴注工艺在基板上滴加适量液晶, 在真空环境中进行 对盒工艺, 使阵列基板和彩膜基板相互贴合, 最后使封框胶 21固定成型。
在液晶滴注工艺过程中, 传统技术中的基板的显示区域比显示区域周围 的非显示区域(如封框胶区域)具有更大的高度, 显示区域的液晶向非显示 区域扩散的速度过快。 在本发明实施例中, 基板上还设置有緩沖结构 3 , 该 緩沖结构 3对显示区域的液晶向非显示区域的扩散具有一定阻碍作用, 降低 了显示区域的液晶在非显示区域的扩散速度, 使液晶到达封框胶区域所需的
时间延长,可以实现封框胶 21固化后液晶才与之接触,避免了液晶和封框胶 21的交叉污染。 同时, 液晶扩散速度降低之后, 对封框胶区域的沖击变小, 从而降低了对封框胶 21的沖击破坏。
进一步地, 本发明的实施例中, 緩沖结构 3只要是能降低液晶扩散速度 的结构均可。 例如, 如图 1所示, 緩沖结构 3可以使沿着远离显示区域 1的 方向逐渐升高的斜面和靠近封框胶区域 2的平面组成的结构; 如图 2所示, 緩沖结构 3可以是沿着显示区域 1的方向逐渐升高的具有波浪形表面的结构; 如图 3所示, 緩沖结构 3可以是沿着远离显示区域 1的方向具有阶梯上升表 面的结构等。 出于对緩沖效果和制作筒易程度的综合考虑, 在本发明实施例 中优选如图 1所示的緩沖结构 3。 緩沖结构 3为沿着远离显示区域 1的方向 逐渐升高的斜面。 緩沖结构 3还包括靠近封框胶区域 2的平面, 该平面高于 显示区域 1的表面, 斜面与平面直接连接, 且所述斜面位于所述平面和所述 显示区域 1之间。
需要说明的是,所述显示区域 1的表面是指, 当所述基板为阵列基板时, 显示区域 1的表面为形成有薄膜晶体管、栅线、数据线和电极结构等的表面。 当所述基板为彩膜基板时,显示区域 1的表面为形成有彩色光阻层等的表面。
此外, 如图 4所示, 为了防止緩沖结构 3对显示区域 1的影响, 为显示 区域 1的液晶留有一定的緩沖, 可以使緩沖结构 3与显示区域 1的靠近緩沖 结构 3的边缘之间存在一定的间距 dl , dl可以为 100~200μηι, 其具体数值 可由设备精细度以及边框的设计要求等决定。 优选地, 緩沖结构 3与显示区 域 1的靠近緩沖结构 3的边缘之间的间隙 dl为 200μηι。
类似地,基板上緩沖结构 3的设置应该满足不影响封框胶 21的形成。 当 封框胶区域 2位于緩沖结构 3远离显示区域 1的一侧时, 如图 4所示, 緩沖 结构 3靠近封框胶区域 2的一侧与封框胶区域 2之间存在一定的间距 d2 , d2可以为 100~200μηι,其具体数值也可由设备精细度以及边框的设计要求等 决定, 本发明实施例中优选 d2为 150μηι; 当封框胶区域 2位于緩沖结构 3 的平面之上时, 如图 5所示, 封框胶区域 2与緩沖结构 3的斜面的边缘之间 存在一定的间距 d3 , d3可以为 100~200μηι, 其具体数值可由设备精细度以 及开口率的设计要求等决定, 本发明实施例中优选 d3为 150μηι。緩沖结构 3 与封框胶区域 2的相对位置不局限于以上两种方式, 只要满足緩沖结构 3的
设定不影响封框胶 21的形成即可,可以根据实际情况而定,本发明实施例对 此不作具体限制。
本发明实施例还提供了一种显示装置, 该显示装置包括具有如上所述结 构的基板。 该显示装置可以为: 液晶面板、 电子纸、 有机发光显示面板、 手 机、 平板电脑、 电视机、 显示器、 笔记本电脑、 数码相框、 导航仪等任何具 有显示功能的产品或部件。
实施例二
本发明实施例还提供了一种如图 1-图 5所示的基板的制作方法, 该方法 包括: 在基板上形成緩沖结构的图形, 緩沖结构位于显示区域 1和封框胶区 域之间, 以降低显示区域的液晶向封框胶区域扩散的速度。
本发明技术方案还提供了一种基板的制作方法, 该基板的制作方法如上 所述。 该基板的制作方法是在现有基板制作方法基础上的改进, 使得制得的 基板具有緩沖结构, 能够降低显示区域的液晶向封框胶区域扩散的速度, 同 时该方法操作筒单, 易于推广。
例如, 在基板制作过程中, 可以在基板上单独制作緩沖结构 3。 当基板 为阵列基板时, 可以在阵列基板上形成薄膜晶体管、 栅线、 数据线和电极结 保护层) , 经过构图工艺后, 在阵列基板上形成緩沖结构 3 ; 当基板为彩膜 基板时, 可以在彩膜基板上形成黑矩阵、 彩色光阻层、 透明保护层和隔垫物 保护层) , 经过构图工艺后, 在彩膜基板上形成緩沖结构 3。
在基板上单独制作緩沖结构 3时, 需要经过多次构图工艺, 工艺较为复 杂, 而且掩膜板制作成本较大, 同时多次曝光时存在对位误差问题。 由于緩 沖结构 3起阻碍液晶扩散的作用, 对所用材料性能并无要求, 因此在基板制 作过程中, 还可以在基板上形成其他结构的同时形成緩沖结构 3 , 曝光次数 减少, 成本降低, 同时避免了多次曝光时存在的对位误差问题。
在本发明实施例中优选在制作隔垫物的同时制作緩沖结构 3。 隔垫物可 以位于彩膜基板上也可以位于阵列基板上。 緩沖结构 3只要是能降低液晶扩 散速度的结构均可。 例如, 如图 1所示, 緩沖结构 3可以是由沿着远离显示 区域 1的方向逐渐升高的斜面和靠近封框胶区域 2的平面组成的结构; 如图
2所示, 緩沖结构 3可以是沿着远离显示区域 1的方向逐渐升高的具有波浪 形表面的结构; 如图 3所示, 緩沖结构 3可以是沿着远离显示区域 1的方向 具有阶梯上升表面的结构等。
例如,在基板上制作隔垫物的同时制作緩沖结构 3的步骤可以如下进行: 在基板上形成一层光刻胶层; 通过构图工艺在基板上形成包括緩沖结构和隔 垫物的图形。
例如, 可以通过旋涂、 狭缝涂布等方法在基板上形成一层光刻胶层。 出于对緩沖效果和制作筒易程度的综合考虑, 在本发明实施例中优选如 图 1所示的緩沖结构 3。 緩沖结构 3为沿着远离显示区域 1的方向逐渐升高 的斜面。 緩沖结构 3还包括靠近封框胶区域 2的平面, 该平面高于显示区域 1的表面, 所述斜面位于所述平面和显示区域 1之间斜面与平面直接连接。
如图 6所示, 在制作隔垫物的同时制作具有如图 1所示的緩沖结构 3所 用的多灰阶掩膜板可以具有如下设计。
阵列基板上涂覆的光刻胶为负性光刻胶时,多灰阶掩膜板 10包括完全透 过区 5、 完全不透过区 6、 部分透过区 7和递增透过区 8。 完全透过区 5对应 光刻胶完全保留区; 完全不透过区 6对应光刻胶完全不保留区; 部分透过区 7对应光刻胶部分保留区, 示例性地, 透过率为 50%, 具体可根据实际情况 调节; 递增透过区 8对应光刻胶递增保留区, 且递增透过区 8的透过率随保 留的光刻胶高度递增而递增, 示例性地, 透过率为 10%~40%, 具体的可以根 据需要保留的光刻胶的高度调节。
通过上述多灰阶掩膜板对光刻胶层进行曝光, 以在显示区域 1形成光刻 胶完全不保留区, 緩沖结构 3的平面区域形成光刻胶部分保留区, 隔垫物 4 的区域形成光刻胶完全保留区, 緩沖结构 3的斜面区域形成沿远离显示区域 1方向逐渐升高的光刻胶递增保留区。
进一步地, 如图 4所示, 为了防止緩沖结构 3对显示区域 1的影响, 可 以使緩沖结构 3与显示区域 1的靠近緩沖结构 3的边缘之间存在一定的间距 dl , dl可以为 100~200μηι, 其具体数值可由设备精细度以及开口率以及边框 的设计要求等决定。 优选地, 緩沖结构 3与显示区域 1的靠近緩沖结构 3的 边缘之间的间隙 dl可以为 200μηι。
类似地,基板上緩沖结构 3的设置应该满足不影响封框胶 21的形成。 当
封框胶区域位于緩沖结构 3远离显示区域 1的一侧时, 如图 4所示, 緩沖结 构 3靠近封框胶区域 2的一侧与封框胶 21之间存在一定的间距 d2, d2可以 为 100~200μηι, 其具体数值也可由设备精细度以及边框的设计要求等决定, 本发明实施例中优选 d2可以为 150μηι; 当封框胶区域 2位于緩沖结构 3的 平面之上时,如图 5所示,封框胶 21与緩沖结构 3的斜面之间存在一定的间 距 d3 , d3可以为 100~200μηι, 其具体数值可由设备精细度以及开口率的设 计要求等决定, 本发明实施例中优选 d3可以为 150μηι。 緩沖结构 3与封框 胶区域 2的相对位置不局限于以上两种方式, 只要满足緩沖结构 3的设定不 影响封框胶 21的形成即可,可以根据实际情况而定,本发明实施例对此不作 具体限制。
因此, 综合以上两方面的考虑, 如图 7所示, 本发明实施例还可以选用 具有如下设计的多灰阶掩膜板遮盖光刻胶层进行曝光: 在阵列基板上涂覆的 光刻胶为负性光刻胶时, 多灰阶掩膜板包括完全透过区 5、 完全不透过区 6、 部分透过区 7和递增透过区 8。 完全透过区 5对应光刻胶完全保留区, 即隔 垫物 4所在位置; 完全不透过区 6对应光刻胶完全不保留区, 即显示区域 1 所在位置和緩沖结构 3与显示区域 1的靠近緩沖结构 3的边缘之间的位置(即 图 4所示的 dl处), 当封框胶区域 2位于緩沖结构 3远离显示区域 1的一侧 时, 完全不透过区 6还可以包括封框胶区域 2; 部分透过区 7对应光刻胶部 分保留区, 即緩沖结构 3的平面区域所在位置, 示例性地, 透过率为 50%, 具体可根据实际情况调节; 递增透过区 8对应光刻胶递增保留区, 即緩沖结 构 3的斜面区域所在位置, 且递增透过区 8的透过率随保留的光刻胶高度递 增而递增, 示例性地, 透过率为 10%~40%, 具体的可以根据需要保留的光刻 胶的高度调节。
使用如上所述的多灰阶掩膜板遮盖光刻胶层, 对光刻胶层进行曝光, 以 在显示区域 1、 緩沖结构 3与显示区域 1的靠近緩沖结构 3的边缘之间的位 置和封框胶区域形成光刻胶完全不保留区, 緩沖结构 3的平面区域形成光刻 胶部分保留区, 隔垫物 4的区域形成光刻胶完全保留区, 緩沖结构 3的斜面 区域形成沿远离显示区域 1方向逐渐升高的光刻胶递增保留区。
在阵列基板的制作过程中, 还可以在阵列基板上涂覆正性光刻胶, 在制 作緩沖结构 3的时候, 只要将所用半灰阶掩膜板上不同区域的透光性作相应
调整即可, 其工艺过程和方法类似, 此处不再赘述。
需要说明的是, 图 6或图 7中在显示区域 1示意了一个隔垫物 4, 并不 是对隔垫物 4形状、 数量和位置的限定。 在具体实施时, 隔垫物 4可以根据 对液晶盒厚的要求在显示区域 1或非显示区域合适的位置设置多个不同形状 的隔垫物 4, 例如, 隔垫物 4除了形成在显示区域 1上, 还可以形成在非显 示区域上, 其外形可以为柱状, 也可以为球形。 对于这些变形, 本发明实施 例均不做限定。
以上所述仅是本发明的示范性实施方式, 而非用于限制本发明的保护范 围, 本发明的保护范围由所附的权利要求确定。
Claims
1、 一种基板, 所述基板包括: 显示区域、封框胶区域和位于所述显示区 域和所述封框胶区域之间的緩沖结构, 其中, 所述緩沖结构用于降低所述显 示区域的液晶向所述封框胶区域扩散的速度。
2、 根据权利要求 1所述的基板, 其中,
所述緩沖结构包括沿着远离所述显示区域的方向逐渐升高的斜面。
3、 根据权利要求 2所述的基板, 其中,
所述緩沖结构还包括靠近所述封框胶区域的平面, 所述平面高于所述显 示区域的表面, 所述斜面位于所述平面和所述显示区域之间, 且所述斜面与 所述平面连接。
4、 根据权利要求 1-3任一项所述的基板, 其中,
所述緩沖结构与所述显示区域的靠近所述緩沖结构的边缘之间的间距为 100~200μηι。
5、 根据权利要求 1-4任一项所述的基板, 其中,
所述封框胶区域位于所述緩沖结构远离所述显示区域的一侧, 所述緩沖 结构靠近所述封框胶区域的一侧与所述封框胶区域之间的间距为 100~200μηι。
6、 根据权利要求 3所述的基板, 其中,
所述封框胶区域位于所述緩沖结构的平面之上, 所述封框胶区域与所述 緩沖结构的斜面之间的间距为 100~200μηι。
7、 一种显示装置, 包括权利要求 1-6任一项所述的基板。
8、一种基板的制作方法, 所述基板包括显示区域和封框胶区域, 该方法 包括: 在所述基板上形成包括緩沖结构的图形, 所述緩沖结构位于所述显示 区域和所述封框胶区域之间, 以降低所述显示区域的液晶向所述封框胶区域 扩散的速度。
9、根据权利要求 8所述的基板的制作方法, 其中, 在所述基板上形成一 层光刻胶层;通过构图工艺在所述基板上形成包括緩沖结构和隔垫物的图形。
10、 根据权利要求 9所述的基板的制作方法, 其中,
所述緩沖结构包括沿着远离所述显示区域的方向逐渐升高的斜面, 以及
靠近所述封框胶区域的平面, 所述平面高于所述显示区域的表面, 所述斜面 位于所述平面和所述显示区域之间, 所述斜面与所述平面连接;
通过多灰阶掩膜板对所述光刻胶层进行曝光, 以在所述显示区域形成光 刻胶完全不保留区, 所述緩沖结构的平面区域形成光刻胶部分保留区, 所述 隔垫物的区域形成光刻胶完全保留区, 所述緩沖结构的斜面区域形成沿远离 所述显示区域方向逐渐升高的光刻胶递增保留区。
11、 根据权利要求 10所述的基板的制作方法, 其中,
所述光刻胶为负性光刻胶, 所述多灰阶掩膜板包括完全透过区、 完全不 透过区、 部分透过区和递增透过区, 所述完全透过区对应所述光刻胶完全保 留区, 所述完全不透过区对应所述光刻胶完全不保留区, 所述部分透过区对 应所述光刻胶部分保留区, 所述递增透过区对应所述光刻胶递增保留区, 且 所述递增透过区的透过率随保留的光刻胶高度递增而递增。
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