WO2014208174A1 - Touch panel controller, touch panel system, and electronic device - Google Patents

Touch panel controller, touch panel system, and electronic device Download PDF

Info

Publication number
WO2014208174A1
WO2014208174A1 PCT/JP2014/060170 JP2014060170W WO2014208174A1 WO 2014208174 A1 WO2014208174 A1 WO 2014208174A1 JP 2014060170 W JP2014060170 W JP 2014060170W WO 2014208174 A1 WO2014208174 A1 WO 2014208174A1
Authority
WO
WIPO (PCT)
Prior art keywords
touch panel
capacitance
value
linear sum
estimated
Prior art date
Application number
PCT/JP2014/060170
Other languages
French (fr)
Japanese (ja)
Inventor
雄亮 金澤
Original Assignee
シャープ株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by シャープ株式会社 filed Critical シャープ株式会社
Publication of WO2014208174A1 publication Critical patent/WO2014208174A1/en

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0416Control or interface arrangements specially adapted for digitisers
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
    • G06F3/0446Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means using a grid-like structure of electrodes in at least two directions, e.g. using row and column electrodes

Definitions

  • the present invention relates to a touch panel controller, an integrated circuit including the touch panel controller, a touch panel system, and an electronic device.
  • Touch panel systems are widely used in various electronic devices such as PCs (Personal Computers), mobile phones, and tablets.
  • PCs Personal Computers
  • touch panel system an input operation to the touch panel is performed when the user brings his / her finger or touch pen into contact with the touch panel.
  • a change in electrostatic capacitance in the touch panel which is caused when a user's finger or touch pen touches the touch panel, is detected. Then, the position where the capacitance change occurs on the touch panel is recognized as the input position for the touch panel.
  • Patent Document 1 as a device for detecting capacitance values distributed in a matrix, (P ⁇ M) static electricity formed at each intersection of M drive lines and P sense lines.
  • a touch panel system including a touch panel controller that detects (estimates) a distribution of capacitance is disclosed.
  • FIG. 6 is a diagram illustrating a configuration of a touch panel 1000 which is an example of a configuration of the touch panel system disclosed in Patent Document 1. As illustrated in FIG.
  • the touch panel system 1000 includes a touch panel controller 1010 and a touch panel 1020.
  • the touch panel 1020 includes M (M is an integer of 2 or more) drive lines DL1 to DLM arranged in parallel with each other along the vertical direction, and P (P is a parallel display) arranged in parallel with each other along the horizontal direction. (Integer greater than or equal to 1) sense lines SL1 to SLP.
  • (P ⁇ M) capacitances C11 to CPM are formed at the intersections of the drive lines DL1 to DLM and the sense lines SL1 to SLP.
  • the capacitance CPM represents the capacitance formed at the intersection of the sense line SLP and the drive line DLM.
  • the touch panel controller 1010 includes a drive unit 1011.
  • the touch panel controller 1010 includes differential amplifiers 1012a and 1012b as two differential amplifiers.
  • the drive unit 1011 drives the drive lines DL1 to DL4 in parallel based on a code sequence having a sequence length N (N is an integer).
  • FIG. 7 shows an M-sequence code MC1 for generating a code sequence used for driving the drive lines DL1 to DL4 by the drive unit 1011.
  • the M-sequence code MC1 is represented as a 31 ⁇ 31 square matrix in which the value of each component of the matrix is either “1” or “ ⁇ 1”.
  • Each row (1st to 31st rows) in the M-sequence code MC1 corresponds to each of 31 signals 1st Vector to 31th Vector.
  • Each column (first column to 31st column) in the M-sequence code MC1 corresponds to each of 31 signals Drive1 to Drive31.
  • a signal 1st Vector to 31th Vector included in the M-sequence code MC1 is a signal that defines a value of a voltage to be applied to each drive line in the i-th drive drive (1 ⁇ i ⁇ 31).
  • the drive unit 1011 drives all drive lines (up to 31 drive lines) 31 times based on the signal 1st Vector to 31th Vector.
  • the driving unit 1011 applies the voltage Vdrive to the Xth drive line DLX when the component of the Xth (1 ⁇ X ⁇ M) signal DriveX is “1” in the i-th driveline drive. In addition, when the component of the Xth signal DriveX is “ ⁇ 1”, the driving unit 1011 applies a voltage ( ⁇ Vdrive) to the Xth drive line DLX.
  • the drive unit 1011 drives each of the 31 drive lines based on the signals Drive1 to Drive31.
  • Signals Drive1 to Drive31 are code sequences used for driving the drive lines DL1 to DL31, and are hereinafter referred to as code sequences Drive1 to Drive31.
  • the drive unit 1011 drives the drive lines DL1 to DL4 based on four code sequences Drive1 to Drive4 among the 31 code sequences Drive1 to Drive31.
  • the voltage Vdrive may be a power supply voltage applied to the touch panel system 1000, for example. Further, as the voltage Vdrive, a voltage other than the power supply voltage such as a reference voltage applied to the touch panel system 1000 may be used.
  • the differential amplifiers 1012a and 1012b are two-input two-output amplifiers that amplify the difference between the two input signals and output them as output signals.
  • the differential amplifiers 1012a and 1012b are each connected to two integration capacitors Cint. That is, one of the integration capacitors Cint is connected between one input terminal and one output terminal of the differential amplifier 1012a or 1012b. The other one of the integration capacitors Cint is connected between the other input terminal and the other output terminal of the differential amplifier 1012a or 1012b.
  • the differential amplifier 1012a is arranged so that signals acquired from the sense lines SL1 and SL2 are input thereto.
  • the differential amplifier 1012a receives an input signal from the sense line SL1 (linear sum signal relating to the capacitance formed at the intersection of the sense line SL1 and the drive lines DL1 to DL4) and an input signal from the sense line SL2 ( The difference between the sense line SL2 and the linear sum signal relating to the capacitance formed at the intersections of the drive lines DL1 to DL4 is amplified and output as an output signal.
  • the output signal output from the differential amplifier 1012a is also a linear sum signal related to capacitance.
  • the differential amplifier 1012b is arranged such that signals acquired from the sense lines SL3 and SL4 are input thereto.
  • the differential amplifier 1012b includes an input signal from the sense line SL3 (a linear sum signal related to the capacitance formed at the intersection of the sense line SL3 and the drive lines DL1 to DL4) and the sense line SL4 (the sense line SL4 and the sense line SL4).
  • the difference from the input signal from the linear sum signal regarding the capacitance formed at the intersections with the drive lines DL1 to DL4 is amplified and output as an output signal.
  • the output signal output from the differential amplifier 1012b is also a linear sum signal related to capacitance.
  • the drive unit 1011 applies (i) the voltage Vdrive to the drive lines DL1, DL3, and DL4, and (ii) applies the voltage ( ⁇ Vdrive) to the drive line DL2. ) Is applied.
  • the linear sum signal Y1 as the output of the differential amplifier 1012b in the first drive of the live lines DL1 to DL4 is expressed by the following equation (1).
  • a linear sum signal output from the differential amplifiers 1012a and 1012b (i) a linear sum signal output from the differential amplifiers 1012a and 1012b, and (ii) any one of the code sequences Di, 1, Di, 2, Di, 3 or Di, 4
  • the capacitance formed on the touch panel 1020 is estimated by the inner product calculation.
  • the value of the difference in capacitance (C31-C41) is estimated using the linear sum signal Yi output from the differential amplifier 1012b will be described.
  • the touch panel controller 1010 performs an inner product operation of the linear sum signal Yi and the code series Di, 2 corresponding to the drive line DL1 within a range of 1 ⁇ i ⁇ 31. That is, the touch panel controller 1010 calculates the following formula (3).
  • the inner product value between the same code sequences is equal to the sequence length N, and the inner product value between different code sequences is -1. Is known.
  • the touch panel controller 1010 can estimate the capacitance (C31-C41) on the right side based on the inner product calculation on the left side.
  • the change amount of the capacitance C31 is changed by ⁇ C by the input to the touch panel 1020 in the drive of the drive lines DL1 to DL4 from the 11th to the 31st. For this reason, in the drive of the drive lines DL1 to DL4 from the 11th time to the 31st time, the capacitance C31 is replaced with (C31 + ⁇ C).
  • the estimated value of the capacitance (C31-C41) in driving the drive lines DL1 to DL4 from the first time to the 31st time is expressed as the following (6).
  • Equation (6) indicates that an amount caused by the change amount ⁇ C of the capacitance C31 is included in the estimated value of the capacitance (C31-C41).
  • Equation (6) the first term on the right side is more dominant than the second term on the right side. Therefore, an estimated value of the capacitance (C31-C41) may be calculated based on the equation (6).
  • Equation (7) shows the inner product calculation for estimating the value of the capacitance (C32-C42).
  • the magnitude (absolute value) of the first term on the right side of Equation (8) is 1/31 of the magnitude (absolute value) of the first term on the right side of Equation (6), and can be regarded as a minute amount. it can. Therefore, in Equation (8), the first term on the right side relating to the capacitance (C31-C41) can be ignored as it is substantially equal to zero.
  • the change amount ⁇ C of the capacitance C31 exists, and the capacitance C31 is replaced by (C31 + ⁇ C).
  • the change amount ⁇ C of the capacitance C31 does not exist.
  • the signals 1st Vector to 31th Vector are used in order as in the drive lines DL1 to DL4 from the 1st time to the 31st time.
  • the 32nd drive lines DL1 to DL4 are driven using the signal 1st Vector, and the 62nd drive lines DL1 to DL4 are driven using the signal 31st Vector.
  • the (j + 31) th drive lines DL1 to DL4 are driven using the jth signal jth Vector (1 ⁇ j ⁇ 31).
  • the (i-31) th signal (i-31) th Vector is used to drive the i-th (32 ⁇ i ⁇ 62) drive lines DL1 to DL4.
  • the estimated value of the capacitance (C31-C41) in driving the drive lines DL1 to DL4 from the 32nd to the 62nd is expressed as the following equation (9).
  • Equation (9) also includes an amount caused by the change amount ⁇ C of the capacitance C31 with respect to the estimated value of the capacitance (C31-C41).
  • Equation (9) the first term on the right side is more dominant than the second term on the right side. Therefore, an estimated value of the capacitance (C31-C41) may be calculated based on the equation (9).
  • the estimated value of the capacitance (C32-C42) in driving the drive lines DL1 to DL4 from the 32nd time to the 62nd time is expressed as the following equation (10).
  • the second term on the right side relating to the change amount ⁇ C may be a size that cannot be ignored.
  • the capacitance value (C32-C42) is actually 0, but the capacitance value depending on the change amount ⁇ C is 0. In some cases, the value of the capacitance (C32-C42) is estimated incorrectly.
  • Japanese Patent Publication Japanese Patent Laid-Open No. 2013-3603 (published on January 7, 2013)”
  • the estimated capacitance value May include an error that cannot be ignored.
  • the present invention has been made to solve the above problem, and an object of the present invention is to provide a touch panel controller capable of estimating the capacitance more accurately.
  • a touch panel controller performs M drive lines (M is an integer of 2 or more) N times based on a code sequence having a sequence length N (N is an integer).
  • a drive unit that outputs N linear sum signals relating to M capacitances respectively formed at intersections of the M drive lines and one sense line by driving; After holding the N linear sum signals, K linear sum signals are obtained each time the driving unit drives the drive line K times (K is an integer satisfying 0 ⁇ K ⁇ N).
  • K linear sum signals are obtained each time the driving unit drives the drive line K times (K is an integer satisfying 0 ⁇ K ⁇ N).
  • K is an integer satisfying 0 ⁇ K ⁇ N).
  • N output signals consisting of K updated linear sum signals and (NK) pre-update linear sum signals are output.
  • Signal processing unit and the N output signals By performing inner product calculation of the code sequence is characterized in that it comprises a, and the inner product calculation unit for calculating an electrostatic capacitance estimate as an estimate of the value of the M capacitance.
  • the touch panel controller according to one aspect of the present invention has an effect that the capacitance can be estimated more accurately.
  • FIG. 1 is a diagram illustrating a configuration of a touch panel system 100 according to the present embodiment.
  • the touch panel system 100 includes a touch panel controller 110 and a touch panel 120.
  • the touch panel 120 includes M (M is an integer of 2 or more) drive lines DL1 to DLM arranged in parallel with each other along the vertical direction, and P (P is a parallel display) arranged in parallel with each other along the horizontal direction. (Integer greater than or equal to 1) sense lines SL1 to SLP.
  • (P ⁇ M) electrostatic capacitances C1, 1 to CP, M are formed at the intersections of the drive lines DL1 to DLM and the sense lines SL1 to SLP.
  • the capacitances CP and M represent the capacitance formed at the intersection of the sense line SLP and the drive line DLM.
  • the touch panel controller 110 includes a drive unit 111.
  • the touch panel controller 110 includes differential amplifiers 112a and 112b, AD (Analog-Digital) converters 113a and 113b, signal processors 114a and 114b, inner product arithmetic units 115a and 115b, and estimated value evaluation units 116a and 116b. ing.
  • each of the differential amplifiers 112a and 112b, the AD conversion units 113a and 113b, the signal processing units 114a and 114b, the inner product calculation units 115a and 115b, and the estimated value evaluation units 116a and 116b are sense lines SL1 to SL provided in the touch panel 120. Depending on the number P of SLPs, three or more may be provided. In FIG. 1, as representative members, differential amplifiers 112a and 112b, AD conversion units 113a and 113b, signal processing units 114a and 114b, inner product calculation units 115a and 115b, and estimated value evaluation units 116a and 116b, respectively, It is shown in the figure.
  • the driving unit 111 drives the drive lines DL1 to DLM based on the code sequence Drive1 to DriveN having the sequence length N.
  • the code sequences Drive1 to DriveN may be generated by, for example, the M sequence code MC1 shown in FIG.
  • the drive lines DL1 to DLM are driven based on the code sequences Drive1 to DriveM.
  • signals 1st Vector to Nth Vector that specify the value of the voltage to be applied to each drive line are also represented by, for example, M It may be defined by the sequence code MC1 or the like.
  • the drive unit 111 includes switches D1 to DM and DB1 to DBM.
  • the drive unit 111 applies the voltage Vdrive to the Xth drive line DLX via the Xth switch DX.
  • the drive unit 111 applies a voltage ( ⁇ Vdrive) to the Xth drive line DLX via the Xth switch DBX.
  • the driving unit 111 applies the voltage Vdrive to the Xth drive line DLX when the component of the Xth signal DriveX is “1” in the i-th driveline drive.
  • the drive unit 111 applies a voltage ( ⁇ Vdrive) to the Xth drive line DLX when the component of the Xth signal DriveX is “ ⁇ 1”.
  • the voltage Vdrive may be a power supply voltage applied to the touch panel system 100, for example. Further, as the voltage Vdrive, a voltage other than the power supply voltage such as a reference voltage applied to the touch panel system 100 may be used.
  • code sequences Drive1 to DriveM in the driving of the drive lines DL1 to DLM for the i (1 ⁇ i ⁇ N) times are represented as code sequences Di, 1 to Di, M.
  • Each of the code sequences Di, 1 to Di, M preferably has a small correlation with each other.
  • the differential amplifiers 112a and 112b are two-input two-output amplifiers, amplify the difference between the two input signals, and output as an output signal.
  • the differential amplifiers 112a and 112b are each connected to two integration capacitors Cint. That is, one of the integration capacitors Cint is connected between one input terminal and one output terminal of the differential amplifier 112a or 112b. The other one of the integration capacitors Cint is connected between the other input terminal and the other output terminal of the differential amplifier 112a or 112b.
  • the differential amplifier 112b is arranged such that signals acquired from the sense lines SL1 and SL2 are input thereto.
  • the differential amplifier 112b includes an input signal from the sense line SL1 (linear sum signal relating to capacitance formed at the intersection of the sense line SL1 and the drive lines DL1 to DLM) and an input signal from the sense line SL2 (sense line).
  • the difference between the SL2 and the linear sum signal relating to the capacitance formed at the intersections of the drive lines DL1 to DLM) is amplified, and a linear sum signal as an output signal is given to the AD converter 113b.
  • the differential amplifier 112a is arranged so that signals acquired from the sense lines SL (P-1) and SLP are respectively input thereto.
  • the differential amplifier 112a includes an input signal from the sense line SL (P-1) (a linear sum signal related to the capacitance formed at the intersection of the sense line SL (P-1) and the drive lines DL1 to DLM), Amplifies the difference from the input signal from the sense line SLP (linear sum signal related to the capacitance formed at the intersection of the sense line SLP and the drive lines DL1 to DLM), and AD converts the linear sum signal as the output signal To the part 113a.
  • AD converters 113a and 113b perform AD conversion on the linear sum signals output from the differential amplifiers 112a and 112b as analog signals, respectively. Subsequently, the AD conversion units 113a and 113b supply the digitized linear sum signals to the signal processing units 114a and 114b, respectively.
  • the linear sum signal is supplied as a digital signal from the AD conversion units 113a and 113b to the signal processing units 114a and 114b, whereby the capacitance distribution in the signal processing units 114a and 114b and the inner product calculation units 115a and 115b is changed. Various operations for calculation are facilitated.
  • the signal processing units 114a and 114b temporarily hold the value of the linear sum signal provided from the AD conversion units 113a and 113b in each drive of the drive lines DL1 to DLM, respectively. Subsequently, the signal processing units 114a and 114b give the values of the linear sum signals necessary for the inner product calculation for estimating the capacitance value to the inner product calculation units 115a and 115b, respectively.
  • the signal processing units 114a and 114b hold the linear sum signals Y1 to YN obtained by driving the N drive lines DL1 to DLM.
  • the signal processing units 114a and 114b pass through the AD conversion units 113a and 113b to obtain the latest K
  • the linear sum signals Y2 (1) to Y2 (K) are obtained.
  • the signal processing units 114a and 114b use the K linear sum signals (that is, Y1 to YK) among the held linear sum signals Y1 to YN as the latest K linear sum signals Y2 (1 ) To Y2 (K).
  • (NK) linear sum signals (that is, Y (K + 1) to YN) among the held linear sum signals Y1 to YN are not updated.
  • the signal processing units 114a and 114b then hold the K linear sum signals Y2 (1) to Y2 (K) and (NK) linear sum signals Y (K + 1) to YN that are currently held.
  • N linear sum signals consisting of are given as output signals to the inner product calculation sections 115a and 115b.
  • integer K that defines the number of linear sum signals to be updated may be a specific value predetermined in the touch panel system 100, or may be a processor provided outside the touch panel system 100 (for example, It may be a value that can be changed by a CPU 310 in FIG.
  • the inner product calculation units 115a and 115b are calculation units that perform an inner product calculation for estimating a capacitance value. That is, the inner product calculation units 115a and 115b calculate the inner product of the N output signals (linear sum signals) given from the signal processing units 114a and 114b and any one of the code sequences Di, 1 to Di, M. I do. Subsequently, the inner product calculation units 115a and 115b provide the estimated value of the capacitance obtained as a result of the inner product calculation to the estimated value evaluation units 116a and 116b, respectively.
  • the code sequences Di, 1 to Di, M may be given from the signal processing units 114a and 114b to the inner product calculation units 115a and 115b, or may be held in advance in the inner product calculation units 115a and 115b. Also good.
  • Estimatimated value evaluation units 116a and 116b The estimated value evaluation units 116a and 116b perform evaluation on a plurality of estimated capacitance values obtained as a result of the inner product calculation in the inner product calculation units 115a and 115b, respectively. Subsequently, the estimated value evaluation units 116a and 116b determine the estimated value of the capacitance with the least error based on the evaluation result.
  • the estimated value evaluation units 116a and 116b perform evaluation on the estimated values of the plurality of capacitances by calculating standard deviations or variances of the estimated values of the plurality of capacitances. Then, the estimated value evaluation units 116a and 116b use the estimated value of the capacitance with the smallest standard deviation or variance as the representative value of the estimated values of the plurality of capacitances (that is, the estimated value of the capacitance with the least error). ).
  • the touch panel controller 110 of the present embodiment is similar to the touch panel controller 1010 provided in the touch panel system 1000 of Patent Document 1 to estimate the capacitance. To calculate the inner product.
  • the inner product calculation for estimating the capacitance (C31-C41) is performed by the equation (6).
  • the inner product calculation for estimating the capacitance value (C32-C42) is performed by Expression (8).
  • the touch panel controller 110 determines the output signal Y2i based on the following equation (11) with respect to the linear sum signal Yi.
  • the linear sum signal Y1 obtained in the first drive lines DL1 to DL4 is updated to the linear sum signal Y32 obtained in the 32nd drive line DL1 to DL4 drive.
  • the linear sum signals Y2 to Y31 obtained in the drive of the drive lines DL1 to DL4 from the second time to the 31st time are held as they are.
  • the touch panel controller 110 performs an inner product operation for estimating the capacitance (C31-C41) based on the output signal Y2i instead of the linear sum signal Yi.
  • the inner product calculation for estimating the capacitance (C31-C41) based on the output signal Y2i is expressed by the following equation (12).
  • the coefficient of the second term on the right side related to the change amount ⁇ C of the capacitance C31 in Expression (12) (that is, 22) is the coefficient of the second term on the right side related to the change amount ⁇ C of the capacitance C31 in Expression (6). Compared with 21) by one.
  • the output signal Y2i is determined by the touch panel controller 110 according to the following equation (13).
  • the linear sum signal Y1 obtained in the driving of the drive lines DL1 to DL4 from the first time to the tenth time is the linear obtained in the driving of the drive lines DL1 to DL4 from the 32nd time to the 41st time.
  • the sum signals Y32 to Y41 are updated.
  • the linear sum signals Y2 to Y31 obtained in the drive of the drive lines DL1 to DL4 from the 11th time to the 31st time are held as they are.
  • the linear sum signals Y1 to Y10 obtained in the driving of the drive lines DL1 to DL4 from the first time to the tenth time are obtained from the drive lines DL1 to DL4 of the 32nd to 41st times.
  • the linear sum signals Y32 to Y41 obtained in driving are updated.
  • the linear sum signals Y11 to Y31 obtained in the drive of the drive lines DL1 to DL4 from the 11th time to the 31st time are held as they are.
  • Equation (14) the coefficient of the second term on the right side (ie, 31) related to the change amount ⁇ C of the capacitance C31 is equal to the coefficient (ie, 31) of the first term on the right side related to the capacitance (C31 ⁇ C41). .
  • the linear sum signals Y1 to Y10 obtained by driving the drive lines DL1 to DL4 from the first time to the tenth time are represented by the 32 to 41st drive lines DL1 to DL4.
  • the linear sum signals Y32 to Y41 obtained in driving are updated.
  • the linear sum signals Y11 to Y31 obtained in the drive of the drive lines DL1 to DL4 from the 11th time to the 31st time are held as they are.
  • the coefficient of the second term on the right side (that is, ⁇ 1) related to the change amount ⁇ C of the capacitance C31 is the coefficient of the first term on the right side related to the capacitance (C32 ⁇ C42) (ie, ⁇ Equivalent to 1).
  • the touch panel system 100 of the present embodiment it is possible to suppress erroneous estimation of the capacitance at the position of the touch panel where the capacitance does not actually change.
  • FIG. 2 is a diagram illustrating a configuration example of the touch panel system 100.
  • the touch panel system 100s includes a touch panel controller 110s and a touch panel 120s.
  • the touch panel 120s includes 18 drive lines DL1 to DL18 and two sense lines SL1 to SL2. Then, 36 electrostatic capacitances C1, 1 to C2, 18 are formed at the intersections of the drive lines DL1 to DL18 and the sense lines SL1 to SL2, respectively.
  • the touch panel controller 110s includes a drive unit 111s, a differential amplifier 112s, an AD conversion unit 113s, a signal processing unit 114s, an inner product calculation unit 115s, and an estimated value evaluation unit 116s.
  • the differential amplifier 112s, the AD conversion unit 113s, the signal processing unit 114s, the inner product calculation unit 115s, and the estimated value evaluation unit 116s are arranged so as to process signals from the sense lines SL1 and SL2.
  • the AD conversion unit 113b, the signal processing unit 114b, the inner product calculation unit 115b, and the estimated value evaluation unit 116s are arranged so as to process signals from the sense lines SL1 and SL2.
  • the AD conversion unit 113b, the signal processing unit 114b, the inner product calculation unit 115b, and the estimated value evaluation unit 116s respectively.
  • the 63 code sequences corresponding to the t-th clock signal given to the touch panel controller 110s are referred to as DM1, t to DM63, t.
  • the code sequences DM1, t to DM63, t have different values for each clock frequency t.
  • the code sequence corresponding to the first clock signal is represented as DM1,1 to DM63,1 and the code sequence corresponding to the 63rd clock signal is represented as DM1,63 to DM63,63. .
  • the signal processing unit 114s acquires the linear sum signal Y1 (t) in the t-th clock signal that satisfies 1 ⁇ t ⁇ 63.
  • the signal processing unit 114s holds 63 linear sum signals from Y1 (1) to Y1 (63).
  • the 63 linear sum signals held by the signal processing unit 114s are expressed as output signals YM (j).
  • j is an integer satisfying 1 ⁇ j ⁇ N, and here 1 ⁇ j ⁇ 63.
  • the signal processing unit provides the output signal YM (j) to the inner product calculation unit 115s.
  • 3A to 3H are graphs showing the values of the output signals YM (j) (that is, the values of YM (1) to YM (63)) acquired at the timing of each predetermined clock signal. Indicates.
  • the horizontal axis indicates the value of the integer j.
  • the vertical axis indicates the value of the output signal YM (j).
  • the output signal YM (j) is a physical quantity with the voltage (V) as a unit.
  • FIG. 3 shows the value of the output signal YM (j) when the 73rd clock signal is given.
  • FIG. 3 shows the value of the output signal YM (j) when the 83rd clock signal is given.
  • FIG. 3 shows the value of the output signal YM (j) at the time when the 93rd clock signal is given.
  • FIG. 3 shows the value of the output signal YM (j) when the 103rd clock signal is given.
  • FIG. 3 shows the value of the output signal YM (j) when the 113th clock signal is given.
  • FIG. 3 shows the value of the output signal YM (j) at the time when the 123rd clock signal is given.
  • FIG. 3 shows the value of the output signal YM (j) when the 126th clock signal is given.
  • FIG. 4 are graphs showing estimated values of the difference in capacitance calculated at the timing of each predetermined clock signal.
  • the horizontal axis shows each of the 18 types of capacitance differences from the capacitance difference (C1, 1-C2, 1) to the capacitance difference (C1, 18-C2, 18). Yes.
  • the vertical axis shows the estimated value of the difference in capacitance corresponding to the horizontal axis as a physical quantity in units of capacitance (pF).
  • (A) of FIG. 4 shows the estimated value of the difference in capacitance when the 63rd clock signal is given.
  • the estimated value of the difference in capacitance (C1, 1-C2, 1) is 0.105 pF.
  • (B) of FIG. 4 shows the estimated value of the difference in capacitance when the 73rd clock signal is given.
  • the estimated value of the difference in capacitance (C1, 1-C2, 1) is 0.137 pF.
  • (C) of FIG. 4 shows the estimated value of the difference in capacitance at the time when the 83rd clock signal is given.
  • the estimated value of the difference in capacitance (C1, 1-C2, 1) is 0.169 pF.
  • (D) of FIG. 4 shows the estimated value of the difference in capacitance at the time when the 93rd clock signal is given.
  • the estimated value of the difference in capacitance (C1, 1-C2, 1) is 0.193 pF.
  • FIG. 4 (e) shows the estimated value of the difference in capacitance when the 103rd clock signal is given.
  • the estimated value of the difference in capacitance (C1,1-C2,1) is 0.185 pF.
  • (F) of FIG. 4 shows the estimated value of the difference in capacitance at the time when the 113th clock signal is given.
  • the estimated value of the difference in capacitance (C1, 1-C2, 1) is 0.154 pF.
  • (G) of FIG. 4 shows the estimated value of the difference in capacitance at the time when the 123rd clock signal is given.
  • the estimated value of the difference in capacitance (C1, 1-C2, 1) is 0.123 pF.
  • (H) of FIG. 4 shows the estimated value of the difference in capacitance when the 126th clock signal is given.
  • the estimated value of the difference in capacitance (C1, 1-C2, 1) is 0.114 pF.
  • the inner product calculation unit 115s gives the estimated values of the 18 differences in capacitance shown in each of (a) to (h) of FIG. 4 to the estimated value evaluation unit 116s. Then, the estimated value evaluating unit 116s calculates the standard deviation of the estimated values of the 18 different capacitance differences at the timing of each clock signal.
  • the standard deviation of the estimated value of the difference in capacitance at the time when the 63rd clock signal is given as shown in FIG. 4 (a) is 0.0125 pF.
  • the standard deviation of the estimated value of the difference in capacitance when the 73rd clock signal is given as shown in FIG. 4B is 0.0121 pF.
  • the standard deviation of the estimated value of the difference in capacitance at the time when the 83rd clock signal is given is 0.0083 pF.
  • the standard deviation of the estimated value of the difference in capacitance at the time when the 103rd clock signal is given as shown in (e) of FIG. 4 is 0.003 pF.
  • the standard deviation of the estimated value of the difference in capacitance at the time when the 113th clock signal shown in FIG. 4 (f) is given is 0.0094 pF.
  • the standard deviation of the estimated value of the difference in capacitance when the 123rd clock signal is given is 0.0103 pF.
  • the standard deviation of the estimated value of the difference in capacitance at the time when the 126th clock signal is given is 0.0109 pF.
  • the estimated value evaluating unit 116s compares the standard deviations of the estimated values of the difference in capacitance between the 64th and 126th clock signals.
  • the estimated value evaluating unit 116s obtains the estimated value of the difference in capacitance from the 64th time to the 126th time when the 93rd clock signal is given, in which the standard deviation of the estimated value of the difference in capacitance is minimized. It is determined as a representative value of the estimated value of the difference in capacitance when the clock signal is given 63 times until the first time.
  • the estimated value evaluating unit 116s may calculate the standard deviation only for the estimated value of the capacitance that is equal to or less than a predetermined capacitance threshold value TC (for example, ⁇ 0.05 pF).
  • Capacitance threshold TC may be a specific value determined in advance in touch panel system 100, or may be changed by a processor or the like provided outside touch panel system 100 (for example, CPU 310 in FIG. 5 described later). It may be a value.
  • the estimated value evaluation unit 116s obtains the estimated value of the difference in capacitance at the time when the 63rd clock signal is given as the capacitance at the time when the first to 63rd clock signals are given. Determined as a representative value of the difference estimate
  • the estimated value of the capacitance that minimizes the standard deviation is used as the representative value of the estimated value of the capacitance.
  • an average value of the estimated capacitance value may be used as a representative value of the estimated capacitance value.
  • An average value of the estimated capacitance can be used.
  • the representative value of the estimated capacitance value (C1, 11-C2, 11) is 0.154 pF. Further, the standard deviation of the average value of the estimated capacitance value is 0.003 pF.
  • the standard deviation (0.003 pF) of the average value of the estimated capacitance value is the standard deviation (0.0109 pF) of the capacitance value when the 126th clock signal shown in the first embodiment is given. Smaller than. That is, by selecting the average value of the estimated capacitance values as the representative value of the estimated capacitance value, a more accurate capacitance value can be estimated.
  • the estimated value of the capacitance for each clock equal to the number of series length N is used as the output of the touch panel system 100s.
  • the touch panel system 100 s outputs an estimated value of the capacitance every clock K times the sequence length N. For this reason, the touch panel system 100 s having the above-described configuration can cope with a signal (for example, a quick touch input) whose time change is fast.
  • a signal for example, a quick touch input
  • the already held linear sum signal S1,1 is updated by one latest linear sum signal S2,1 obtained by the next drive line drive. Then, the next estimated capacitance value is calculated based on the N linear sum signals S2,1, S1,2, S1,3,..., S1, (N-1), S1, N.
  • the signal processing unit 114s holds N linear sum signals and updates K linear sum signals every K clocks.
  • the signal processing unit 114s may hold more than N linear sum signals and give N linear sum signals to the inner product operation unit 115s.
  • the linear sum signal is updated more frequently in the signal processing unit 114s. Accordingly, the touch panel system 100s can follow a signal that changes with time at a higher speed.
  • the touch panel system 100s with a small K value selected is mounted on a high-performance electronic device that can tolerate large power consumption and a large amount of memory consumption (or a large circuit area for mounting a memory). It is preferable.
  • the touch panel system 100s with a large K value selected is mounted on an electronic device that is driven by low power consumption and low memory consumption (or a small circuit area for mounting a memory) and does not particularly require high performance. It is preferred that
  • K it is preferable to select a value of K in the range of “0 ⁇ K ⁇ N / 2”. This is because if “0 ⁇ K ⁇ N / 2”, the signal processing unit 114 s does not cause a situation in which part of the updated linear sum signal is further updated in the next update in the output signal. Because.
  • a code sequence based on the M sequence code is used.
  • a code sequence can be easily generated by using a shift register connected in series. For this reason, when an M-sequence code is used, there is an advantage that a circuit for generating a code sequence can be easily configured.
  • a code sequence may be generated based on other than the M sequence code.
  • a code sequence may be generated based on a Walsh code or a Hadamard code.
  • the generated code sequence has a property that the correlation between codes is zero.
  • the correlation between codes is not zero.
  • each drive line signal does not include an error caused by another drive line signal, and the accuracy of various calculations can be further improved. There is an advantage.
  • the touch panel system 100s using the code sequence based on the Walsh code or the Hadamard code is mounted on a high-performance electronic device that can tolerate a large amount of memory consumption (or a large circuit area for mounting the memory). It is preferable.
  • the touch panel system 100s using a code sequence based on an M-sequence code is mounted on an electronic device that is driven by a small memory consumption (or a small circuit area for mounting a memory) and does not particularly require high performance. It is preferable.
  • a differential amplifier for example, differential amplifiers 112a, 112b, and 112s
  • a single-ended amplifier may be used as the amplifier.
  • touch panel controller 110 or 110s described in the first embodiment is also included in the technical scope of the present invention. Therefore, the touch panel controller 110 or 110s described in the first embodiment may be realized by an integrated circuit such as an IC (Integrated Circuit) chip.
  • IC Integrated Circuit
  • FIG. 5 is a functional block diagram illustrating a configuration of a mobile phone 300 (electronic device) as an example of an electronic device including the touch panel system 100 described in the first embodiment.
  • the mobile phone 300 includes a CPU (Central Processing Unit) 310, a camera 313, a microphone 314, a speaker 315, an operation unit 316, a display panel 318, a display control circuit 309, a ROM (Read Only Memory) 311, and a RAM (Random Access Memory) 312. , And a touch panel system 100.
  • a CPU Central Processing Unit
  • ROM Read Only Memory
  • RAM Random Access Memory
  • Each component included in the mobile phone 300 is connected to each other by a data bus.
  • the mobile phone 300 may be configured to include an interface for connecting to another electronic device by wire.
  • CPU 310 controls the operation of mobile phone 300.
  • CPU 310 executes a program stored in ROM 311, for example.
  • the operation unit 316 is an input device that receives an instruction input by the user of the mobile phone 300, and is, for example, various operation keys or buttons.
  • the ROM 311 is a ROM capable of writing and erasing such as an EPROM (Erasable Programmable ROM) and a flash memory, and stores data in a nonvolatile manner.
  • the RAM 312 volatilely stores data generated by execution of a program by the CPU 310 or data input via the operation unit 316.
  • the camera 313 captures a subject in accordance with the operation of the operation unit 316 by the user.
  • the image data of the photographed subject is stored in the RAM 312 or an external memory (for example, a memory card).
  • the microphone 314 receives user's voice input.
  • the mobile phone 300 digitizes the input audio signal as analog data.
  • the cellular phone 300 sends an audio signal as a digitized signal to a communication target (for example, another cellular phone).
  • the speaker 315 outputs an audio signal as an analog signal based on, for example, music data stored in the RAM 312.
  • the display panel 318 displays images stored in the ROM 311 and the RAM 312 by the display control circuit 309.
  • the display panel 318 may be overlaid on the touch panel 120 or may incorporate the touch panel 120.
  • the touch recognition signal indicating the touch position on the touch panel 120 generated by the touch panel controller 110 may have the same role as the signal indicating that the operation unit 316 is operated.
  • the touch panel system 100 includes a touch panel controller 110 and a touch panel 120.
  • the operation of the touch panel system 100 is controlled by the CPU 310.
  • the process of determining the capacitance estimation value based on the digitized linear sum signal may be executed by the CPU 310 provided outside the touch panel controller 110.
  • the signal processing units 114a and 114b, the inner product calculation units 115a and 115b, and the estimated value evaluation units 116a and 116b included in the touch panel controller 110 in the first embodiment may be provided in the CPU 310.
  • the touch panel controller 110 provides the digitized linear sum signal from the AD conversion units 113a and 113b to the signal processing units 114a and 114b provided in the CPU 310.
  • the CPU 310 performs the same processing as that in the first embodiment in each of the signal processing units 114a and 114b, the inner product calculation units 115a and 115b, and the estimated value evaluation units 116a and 116b.
  • the mobile phone 300 includes the touch panel system 100, so that the capacitance can be accurately estimated. Therefore, the mobile phone 300 can accurately recognize an input operation performed on the touch panel system 100 by the user. Therefore, the mobile phone 300 can accurately execute the process desired by the user.
  • the mobile phone 300 as an example of an electronic device including the touch panel system 100 is a mobile phone with a camera or a smartphone, but the electronic device including the touch panel system 100 is not limited thereto.
  • a mobile terminal device such as a tablet
  • an information processing device such as a PC monitor, signage, an electronic blackboard, and an information display are also included in the electronic device provided with the touch panel system 100.
  • the control block (particularly the CPU 310) of the mobile phone 300 may be realized by a logic circuit (hardware) formed in an integrated circuit (IC chip) or the like, or may be realized by software using a CPU.
  • the mobile phone 300 includes a CPU that executes instructions of a program that is software that realizes each function, a ROM or a storage device in which the above-described program and various data are recorded so as to be readable by a computer (or CPU). (Referred to as “recording medium”), and a RAM or the like for expanding the program. And the objective of this invention is achieved when a computer (or CPU) reads the said program from the said recording medium and runs it.
  • a “non-temporary tangible medium” such as a tape, a disk, a card, a semiconductor memory, a programmable logic circuit, or the like can be used.
  • the program may be supplied to the computer via an arbitrary transmission medium (such as a communication network or a broadcast wave) that can transmit the program.
  • a transmission medium such as a communication network or a broadcast wave
  • the present invention can also be realized in the form of a data signal embedded in a carrier wave in which the program is embodied by electronic transmission.
  • the touch panel controller (110) drives M (M is an integer of 2 or more) drive lines (DL1 to DLM) N times based on a code sequence having a sequence length N (N is an integer).
  • N is an integer.
  • N pieces of M capacitances eg, C1, 1 to C1, M
  • the drive unit drives the M drive lines N times based on the code sequence of the sequence length N, whereby the intersection of the M drive lines and one sense line. N linear sum signals relating to the M electrostatic capacitances respectively formed in the sense line are output from the sense line.
  • the signal processing unit holds N linear sum signals output from the sense lines. After that, each time the driving unit drives the drive line K times and the latest K linear sum signals are output from the sense line, the signal processing unit, among the N linear sum signals already held, The K linear sum signals are sequentially updated with the latest K linear sum signals.
  • the signal processing unit outputs N linear sum signals composed of K updated linear sum signals and (NK) pre-updated linear sum signals as N output signals. .
  • the inner product calculation unit performs an inner product calculation of the output signal and the code sequence, that is, an inner product calculation of N output signals and a code sequence of sequence length N between N-dimensional vectors, and M electrostatic An estimated capacitance value is calculated as an estimated value of the capacitance value. That is, the inner product calculation unit performs an inner product calculation using K updated linear sum signals, which are the latest linear sum signals included in the output signal.
  • the inner product calculation is performed every time the drive unit drives the drive line N times. For this reason, if a temporary change in capacitance occurs during driving of the N drive lines, the error in the estimated capacitance value due to the temporary capacitance is so large that it cannot be ignored. There was a problem that could be.
  • the inner product calculation is performed using the K updated linear sum signals. Therefore, when a temporary change in capacitance occurs during driving of the N drive lines, the degree of error in the estimated capacitance value caused by the temporary capacitance is conventionally determined. This can be further suppressed as compared with the touch panel controller.
  • the capacitance can be estimated more accurately.
  • the touch panel controller is the estimated value evaluation unit (116a, 116b) that determines a representative value of the estimated capacitance value from the plurality of estimated capacitance values in the aspect 1. May be further provided.
  • the accuracy of the estimated capacitance value can be further improved by using the representative value of the estimated capacitance value determined by the estimated value evaluation unit as the estimated capacitance value.
  • the estimated value evaluation unit calculates the standard deviation of the plurality of estimated capacitance values, and the standard deviation is the minimum.
  • the estimated capacitance value may be determined as a representative value of the estimated capacitance value.
  • the estimated value evaluation unit determines the estimated capacitance value having the smallest standard deviation, and thus can obtain a highly accurate estimated capacitance value in which the influence of the error is suppressed. it can.
  • the estimated value evaluation unit calculates a variance of the plurality of estimated capacitance values, and the capacitance estimation has a minimum variance.
  • the value may be determined as a representative value of the estimated capacitance value.
  • the estimated value evaluation unit determines the estimated capacitance value having the minimum variance, it is possible to obtain a highly accurate estimated capacitance value in which the influence of the error is suppressed. .
  • the estimated value evaluation unit calculates an average value of a plurality of the estimated capacitance values, and the average value is calculated as the estimated capacitance value. It may be determined as a representative value.
  • the estimated value evaluation unit determines the estimated capacitance value as the average value of the plurality of estimated capacitance values, and thus the highly accurate capacitance with the influence of the error suppressed. An estimate can be obtained.
  • the code sequence may be generated based on an M-sequence code.
  • the circuit for generating the code sequence based on the M-sequence code can be realized by a shift register or the like, the configuration of the circuit for generating the code sequence can be facilitated.
  • the code sequence may be generated based on a Walsh code or a Hadamard code.
  • a code sequence in which the correlation between codes is 0 is generated based on the Walsh code or Hadamard code. Therefore, the error due to the signal of another drive line is not included in the signal of each drive line, and the accuracy of various calculations in the touch panel controller can be further improved.
  • touch panel controller according to aspect 8 of the present invention may be set such that the value of K is 0 ⁇ K ⁇ N / 2 in any one of the above aspects 1 to 7.
  • the integrated circuit according to aspect 9 of the present invention may include the touch panel controller according to any one of aspects 1 to 8.
  • a touch panel system includes a touch panel controller according to any one of aspects 1 to 8, M (M is an integer of 2 or more) drive lines, and P (P is 1 or more). And a touch panel having sense lines.
  • the electronic device according to aspect 11 of the present invention may include the touch panel system according to aspect 10 described above.
  • the electronic device according to the eleventh aspect may be realized by a computer.
  • the electronic device is realized by the computer by causing the computer to operate as each unit included in the electronic device.
  • a program and a computer-readable recording medium on which the program is recorded also fall within the scope of the present invention.
  • the present invention can also be expressed as follows.
  • the touch panel controller includes N capacitances formed between M drive lines (M is an integer of 2 or more) and one sense line.
  • the touch panel controller includes a drive unit that is driven in parallel with a plurality of M-dimensional vectors (N is an integer), and that outputs N linear sum signals based on the charges accumulated in the M capacitances from the sense line.
  • an inner product calculation unit for estimating the value of the M electrostatic capacitances by calculating the inner product of the first linear sum signal and M N-dimensional vectors, each time the drive line is driven K times.
  • K is an integer, and 0 ⁇ K ⁇ N
  • a new linear sum signal in which a part of the value of the linear sum signal is different is obtained, and the inner product of the new linear sum signal and M N-dimensional vectors
  • the M electrostatic capacitances are calculated. To estimate the value.
  • the touch panel controller selects and outputs an estimated value with few errors among a plurality of estimated capacitance values obtained every time the drive line is driven K times.
  • the touch panel controller selects the signal with less error based on the standard deviation of the capacity estimation value.
  • the touch panel controller outputs an average value of a plurality of capacitances obtained every time K is driven.
  • the touch panel device includes a touch panel controller and a touch panel controlled by the touch panel controller.
  • an electronic device includes a touch panel controller and a touch panel controlled by the touch panel controller.
  • the present invention can be used for a touch panel controller, an integrated circuit including the touch panel controller, a touch panel system, and an electronic device.

Abstract

This touch panel controller (110) is provided with a drive unit (111) which, on the basis of a code series of series length N, drives M (M ≧ 2) drive lines (DL1-DLM) and outputs N linear sum signals from one sense line (SL1-SLP), signal processing units (114a, 114b) which output N output signals by sequentially updating K (0 < K < N) linear sum signals, and inner product calculation units (115a, 115b) which calculate the inner products of the abovementioned output signals and the abovementioned code series and calculate an estimated capacitance value.

Description

タッチパネルコントローラ、タッチパネルシステム、および電子機器Touch panel controller, touch panel system, and electronic device
 本発明は、タッチパネルコントローラ、ならびに、タッチパネルコントローラを含んだ集積回路、タッチパネルシステム、および電子機器に関する。 The present invention relates to a touch panel controller, an integrated circuit including the touch panel controller, a touch panel system, and an electronic device.
 タッチパネルシステムは、PC(Personal Computer)、携帯電話機、およびタブレット等の様々な電子機器において、広く利用されている。タッチパネルシステムにおいては、ユーザが自身の指またはタッチペンを、タッチパネルへ接触させることにより、タッチパネルへの入力操作が行われる。 Touch panel systems are widely used in various electronic devices such as PCs (Personal Computers), mobile phones, and tablets. In the touch panel system, an input operation to the touch panel is performed when the user brings his / her finger or touch pen into contact with the touch panel.
 静電容量方式のタッチパネルシステムでは、ユーザの指またはタッチペンがタッチパネルに接触することによって生じた、タッチパネルにおける静電容量の変化が検出される。そして、タッチパネルにおいて静電容量の変化が生じた位置が、タッチパネルに対する入力位置として認識される。 In the capacitive touch panel system, a change in electrostatic capacitance in the touch panel, which is caused when a user's finger or touch pen touches the touch panel, is detected. Then, the position where the capacitance change occurs on the touch panel is recognized as the input position for the touch panel.
 特許文献1には、マトリクス状に分布した静電容量の値を検出する装置として、M本のドライブラインとP本のセンスラインとの各交点に形成される、(P×M)個の静静電容量の分布を検出(推定)するタッチパネルコントローラを備えたタッチパネルシステムが開示されている。 In Patent Document 1, as a device for detecting capacitance values distributed in a matrix, (P × M) static electricity formed at each intersection of M drive lines and P sense lines. A touch panel system including a touch panel controller that detects (estimates) a distribution of capacitance is disclosed.
 以下、特許文献1に開示されたタッチパネルシステムについて、図6および図7に基づいて説明する。 Hereinafter, the touch panel system disclosed in Patent Document 1 will be described with reference to FIGS. 6 and 7.
 (特許文献1に開示されたタッチパネルシステム1000の構成)
 図6は、特許文献1に開示されたタッチパネルシステムの一構成例である、タッチパネル1000の構成を示す図である。タッチパネルシステム1000は、タッチパネルコントローラ1010、およびタッチパネル1020を備えている。
(Configuration of touch panel system 1000 disclosed in Patent Document 1)
FIG. 6 is a diagram illustrating a configuration of a touch panel 1000 which is an example of a configuration of the touch panel system disclosed in Patent Document 1. As illustrated in FIG. The touch panel system 1000 includes a touch panel controller 1010 and a touch panel 1020.
 (タッチパネル1020)
 タッチパネル1020は、垂直方向に沿って互いに平行に配置された、M(Mは2以上の整数)本のドライブラインDL1~DLMと、水平方向に沿って互いに平行に配置された、P(Pは1以上の整数)本のセンスラインSL1~SLPとを備えている。
(Touch panel 1020)
The touch panel 1020 includes M (M is an integer of 2 or more) drive lines DL1 to DLM arranged in parallel with each other along the vertical direction, and P (P is a parallel display) arranged in parallel with each other along the horizontal direction. (Integer greater than or equal to 1) sense lines SL1 to SLP.
 そして、タッチパネル1020において、(P×M)個の静電容量C11~CPMが、ドライブラインDL1~DLMとセンスラインSL1~SLPとの各交点に形成されている。ここで、静電容量CPMは、センスラインSLPと、ドライブラインDLMとの交点に形成された静電容量を表す。 In the touch panel 1020, (P × M) capacitances C11 to CPM are formed at the intersections of the drive lines DL1 to DLM and the sense lines SL1 to SLP. Here, the capacitance CPM represents the capacitance formed at the intersection of the sense line SLP and the drive line DLM.
 図6では、M=P=4のケースが例示されている。すなわち、タッチパネル1020において、ドライブラインDL1~DL4とセンスラインSL1~SL4との各交点に、それぞれの静電容量C11~C44が形成されている。 FIG. 6 illustrates the case of M = P = 4. That is, on the touch panel 1020, respective capacitances C11 to C44 are formed at intersections of the drive lines DL1 to DL4 and the sense lines SL1 to SL4.
 (タッチパネルコントローラ1010)
 タッチパネルコントローラ1010は、駆動部1011を備えている。また、タッチパネルコントローラ1010は、2つの差動増幅器として、差動増幅器1012aおよび1012bを備えている。
(Touch panel controller 1010)
The touch panel controller 1010 includes a drive unit 1011. The touch panel controller 1010 includes differential amplifiers 1012a and 1012b as two differential amplifiers.
  (駆動部1011)
 駆動部1011は、系列長N(Nは整数)の符号系列に基づき、ドライブラインDL1~DL4を並列駆動する。図7は、駆動部1011による、ドライブラインDL1~DL4の駆動に用いられる符号系列を生成するためのM系列(M-sequence)符号MC1を示している。
(Driver 1011)
The drive unit 1011 drives the drive lines DL1 to DL4 in parallel based on a code sequence having a sequence length N (N is an integer). FIG. 7 shows an M-sequence code MC1 for generating a code sequence used for driving the drive lines DL1 to DL4 by the drive unit 1011.
 M系列符号MC1は、系列長31(すなわち、N=31)のM系列符号である。ここで、M系列符号MC1は、行列の各成分の値が、「1」または「-1」のいずれかである、31×31の正方行列として表されている。 The M-sequence code MC1 is an M-sequence code having a sequence length of 31 (that is, N = 31). Here, the M-sequence code MC1 is represented as a 31 × 31 square matrix in which the value of each component of the matrix is either “1” or “−1”.
 M系列符号MC1におけるそれぞれの行(1行目~31行目)は、31個の信号1st Vector~31th Vectorのそれぞれに対応している。また、M系列符号MC1におけるそれぞれの列(1列目~31列目)は、31個の信号Drive1~Drive31のそれぞれに対応している。 Each row (1st to 31st rows) in the M-sequence code MC1 corresponds to each of 31 signals 1st Vector to 31th Vector. Each column (first column to 31st column) in the M-sequence code MC1 corresponds to each of 31 signals Drive1 to Drive31.
 M系列符号MC1に含まれる信号1st Vector~31th Vectorは、i回目(1≦i≦31)のドライブラインの駆動において、各ドライブラインに印加されるべき電圧の値を規定する信号である。駆動部1011は、信号1st Vector~31th Vectorに基づき、全てのドライブライン(最大31個のドライブライン)を31回駆動する。 A signal 1st Vector to 31th Vector included in the M-sequence code MC1 is a signal that defines a value of a voltage to be applied to each drive line in the i-th drive drive (1 ≦ i ≦ 31). The drive unit 1011 drives all drive lines (up to 31 drive lines) 31 times based on the signal 1st Vector to 31th Vector.
 駆動部1011は、i回目のドライブラインの駆動において、X番目(1≦X≦M)の信号DriveXの成分が「1」であるとき、X番目のドライブラインDLXに、電圧Vdriveを印加する。また、駆動部1011は、X番目の信号DriveXの成分が「-1」であるとき、X番目のドライブラインDLXに、電圧(-Vdrive)を印加する。 The driving unit 1011 applies the voltage Vdrive to the Xth drive line DLX when the component of the Xth (1 ≦ X ≦ M) signal DriveX is “1” in the i-th driveline drive. In addition, when the component of the Xth signal DriveX is “−1”, the driving unit 1011 applies a voltage (−Vdrive) to the Xth drive line DLX.
 従って、駆動部1011は、信号Drive1~Drive31に基づき、31個のドライブラインのそれぞれを駆動する。信号Drive1~Drive31は、ドライブラインDL1~DL31の駆動に用いられる符号系列であり、以降、符号系列Drive1~Drive31と称する。 Therefore, the drive unit 1011 drives each of the 31 drive lines based on the signals Drive1 to Drive31. Signals Drive1 to Drive31 are code sequences used for driving the drive lines DL1 to DL31, and are hereinafter referred to as code sequences Drive1 to Drive31.
 ここでは、31個の符号系列Drive1~Drive31のうち、4つの符号系列Drive1~Drive4に基づき、駆動部1011がドライブラインDL1~DL4を駆動する場合を考える。ここで、符号系列Drive1~Drive31の系列長Nは、N=31であり、ドライブラインの本数Mは、M=4である。 Here, a case is considered in which the drive unit 1011 drives the drive lines DL1 to DL4 based on four code sequences Drive1 to Drive4 among the 31 code sequences Drive1 to Drive31. Here, the sequence length N of the code sequences Drive1 to Drive31 is N = 31, and the number M of drive lines is M = 4.
 なお、電圧Vdriveは、例えば、タッチパネルシステム1000に印加される電源電圧であってよい。また、電圧Vdriveとして、タッチパネルシステム1000に印加される参照電圧等の、電源電圧以外の電圧が用いられてもよい。 The voltage Vdrive may be a power supply voltage applied to the touch panel system 1000, for example. Further, as the voltage Vdrive, a voltage other than the power supply voltage such as a reference voltage applied to the touch panel system 1000 may be used.
  (差動増幅器1012aおよび1012b)
 差動増幅器1012aおよび1012bは、2入力2出力の増幅器であり、2つの入力信号の差を増幅し、出力信号として出力する。
( Differential amplifiers 1012a and 1012b)
The differential amplifiers 1012a and 1012b are two-input two-output amplifiers that amplify the difference between the two input signals and output them as output signals.
 差動増幅器1012aおよび1012bは、それぞれ、2つの積分容量Cintと接続されている。すなわち、積分容量Cintのうちの1つは、差動増幅器1012aまたは1012bの、1つの入力端子と1つの出力端子との間に接続されている。また、積分容量Cintのうちのもう1つは、差動増幅器1012aまたは1012bの、もう1つの入力端子ともう1つの出力端子との間に接続されている。 The differential amplifiers 1012a and 1012b are each connected to two integration capacitors Cint. That is, one of the integration capacitors Cint is connected between one input terminal and one output terminal of the differential amplifier 1012a or 1012b. The other one of the integration capacitors Cint is connected between the other input terminal and the other output terminal of the differential amplifier 1012a or 1012b.
 差動増幅器1012aは、センスラインSL1およびSL2から取得された信号が、それぞれ入力されるように配置されている。 The differential amplifier 1012a is arranged so that signals acquired from the sense lines SL1 and SL2 are input thereto.
 従って、差動増幅器1012aは、センスラインSL1からの入力信号(センスラインSL1とドライブラインDL1~DL4との交点に形成される静電容量に関する線形和信号)と、センスラインSL2からの入力信号(センスラインSL2とドライブラインDL1~DL4との交点に形成される静電容量に関する線形和信号)との差を増幅し、出力信号として出力する。差動増幅器1012aから出力された出力信号もまた、静電容量に関する線形和信号である。 Accordingly, the differential amplifier 1012a receives an input signal from the sense line SL1 (linear sum signal relating to the capacitance formed at the intersection of the sense line SL1 and the drive lines DL1 to DL4) and an input signal from the sense line SL2 ( The difference between the sense line SL2 and the linear sum signal relating to the capacitance formed at the intersections of the drive lines DL1 to DL4 is amplified and output as an output signal. The output signal output from the differential amplifier 1012a is also a linear sum signal related to capacitance.
 同様に、差動増幅器1012bは、センスラインSL3およびSL4から取得された信号が、それぞれ入力されるように配置されている。 Similarly, the differential amplifier 1012b is arranged such that signals acquired from the sense lines SL3 and SL4 are input thereto.
 従って、差動増幅器1012bは、センスラインSL3からの入力信号(センスラインSL3とドライブラインDL1~DL4との交点に形成される静電容量に関する線形和信号)と、センスラインSL4(センスラインSL4とドライブラインDL1~DL4との交点に形成される静電容量に関する線形和信号)からの入力信号との差を増幅し、出力信号として出力する。差動増幅器1012bから出力された出力信号もまた、静電容量に関する線形和信号である。 Accordingly, the differential amplifier 1012b includes an input signal from the sense line SL3 (a linear sum signal related to the capacitance formed at the intersection of the sense line SL3 and the drive lines DL1 to DL4) and the sense line SL4 (the sense line SL4 and the sense line SL4). The difference from the input signal from the linear sum signal regarding the capacitance formed at the intersections with the drive lines DL1 to DL4 is amplified and output as an output signal. The output signal output from the differential amplifier 1012b is also a linear sum signal related to capacitance.
 (タッチパネルシステム1000における静電容量の推定)
 続いて、特許文献1に開示されたタッチパネルシステム1000における静電容量の推定について説明する。
(Estimation of capacitance in touch panel system 1000)
Next, estimation of capacitance in the touch panel system 1000 disclosed in Patent Document 1 will be described.
 駆動部1011は、符号系列MC1の信号1st Vectorに基づき、(Drive1,Drive2,Drive3,Drive4)=(1,-1,1,1)なる符号系列によって、1回目のドライブラインDL1~DL4の駆動を行う。 Based on the signal 1st Vector of the code sequence MC1, the drive unit 1011 drives the first drive lines DL1 to DL4 with the code sequence of (Drive1, Drive2, Drive3, Drive4) = (1, -1,1,1). I do.
 従って、1回目のドライブラインDL1~DL4の駆動において、駆動部1011は、(i)ドライブラインDL1、DL3、およびDL4に、電圧Vdriveを印加し、(ii)ドライブラインDL2に、電圧(-Vdrive)を印加する。 Accordingly, in the first drive of the drive lines DL1 to DL4, the drive unit 1011 applies (i) the voltage Vdrive to the drive lines DL1, DL3, and DL4, and (ii) applies the voltage (−Vdrive) to the drive line DL2. ) Is applied.
 ここで、センスラインSL3およびSL4からの入力信号が与えられている、差動増幅器1012bの出力に着目する。いま、1回目のライブラインDL1~DL4の駆動における差動増幅器1012bの出力としての線形和信号Y1は、以下の式(1)によって表される。 Here, attention is paid to the output of the differential amplifier 1012b to which the input signals from the sense lines SL3 and SL4 are given. Now, the linear sum signal Y1 as the output of the differential amplifier 1012b in the first drive of the live lines DL1 to DL4 is expressed by the following equation (1).
Figure JPOXMLDOC01-appb-M000001
Figure JPOXMLDOC01-appb-M000001
 ここで、i(1≦i≦31)回目のドライブラインDL1~DL4の駆動における、符号系列Drive1~Drive4のそれぞれの成分を、符号系列Di,1、Di,2、Di,3、およびDi,4として表す。例えば、上述のi=1において、Di,1=1、Di,2=-1、Di,3=1,Di,4=1である。 Here, the respective components of the code sequences Drive1 to Drive4 in the drive of the drive lines DL1 to DL4 for the i (1 ≦ i ≦ 31) times are represented by code sequences Di, 1, Di, 2, Di, 3, and Di, This is expressed as 4. For example, at i = 1, Di, 1 = 1, Di, 2 = −1, Di, 3 = 1, Di, 4 = 1.
 このとき、i回目のライブラインDL1~DL4の駆動における差動増幅器1012bの出力としての線形和信号Yiは、以下の式(2)によって表される。 At this time, the linear sum signal Yi as the output of the differential amplifier 1012b in driving the i-th live lines DL1 to DL4 is expressed by the following equation (2).
Figure JPOXMLDOC01-appb-M000002
Figure JPOXMLDOC01-appb-M000002
 タッチパネルシステム1000では、(i)差動増幅器1012aおよび1012bから出力される線形和信号と、(ii)符号系列Di,1、Di,2、Di,3、またはDi,4のうちのいずれか1つとの内積演算によって、タッチパネル1020に形成された静電容量の推定が行われる。ここでは、差動増幅器1012bから出力される線形和信号Yiを用いて、静電容量の差の値(C31-C41)が推定される場合について、説明を行う。 In the touch panel system 1000, (i) a linear sum signal output from the differential amplifiers 1012a and 1012b, and (ii) any one of the code sequences Di, 1, Di, 2, Di, 3 or Di, 4 The capacitance formed on the touch panel 1020 is estimated by the inner product calculation. Here, a case where the value of the difference in capacitance (C31-C41) is estimated using the linear sum signal Yi output from the differential amplifier 1012b will be described.
 駆動部1011は、信号1st Vector~31th Vectorに基づき、ドライブラインDL1~DL4を31回駆動する。そして、31個の線形和信号Yi(i=1、2、…、31)が、差動増幅器1012bから出力される。 The driving unit 1011 drives the drive lines DL1 to DL4 31 times based on the signal 1st Vector to 31th Vector. Then, 31 linear sum signals Yi (i = 1, 2,..., 31) are output from the differential amplifier 1012b.
 続いて、タッチパネルコントローラ1010は、1≦i≦31の範囲において、線形和信号Yiと、ドライブラインDL1に対応する符号系列Di,2との内積演算を行う。すなわち、タッチパネルコントローラ1010は、以下の式(3)を計算する。 Subsequently, the touch panel controller 1010 performs an inner product operation of the linear sum signal Yi and the code series Di, 2 corresponding to the drive line DL1 within a range of 1 ≦ i ≦ 31. That is, the touch panel controller 1010 calculates the following formula (3).
Figure JPOXMLDOC01-appb-M000003
Figure JPOXMLDOC01-appb-M000003
 ここで、M系列符号MC1に基づき生成された符号系列において、同じ符号系列同士の内積の値は、系列長Nと等しく、また、異なる符号系列同士の内積の値は、-1となるという数学的性質が知られている。 Here, in the code sequence generated based on the M-sequence code MC1, the inner product value between the same code sequences is equal to the sequence length N, and the inner product value between different code sequences is -1. Is known.
 従って、系列長N=31であることを考慮すれば、式(3)において、上述の数学的性質に基づき、以下の式(4)が導かれる。 Therefore, considering that the sequence length N = 31, the following equation (4) is derived in the equation (3) based on the above-described mathematical property.
Figure JPOXMLDOC01-appb-M000004
Figure JPOXMLDOC01-appb-M000004
 さらに、全てのドライブライン(すなわち、DL1~DL4)、および全てのセンスライン(すなわち、SL1~SL4)が、それぞれ均一の幅を有するように製作されている場合を考える。 Further, consider a case where all drive lines (ie, DL1 to DL4) and all sense lines (ie, SL1 to SL4) are manufactured to have uniform widths.
 このとき、静電容量C31~C44のそれぞれの値は、ほぼ等しい値であると仮定できる。従って、式(4)において、右辺第1項、すなわち、31×(C31-C41)は、右辺第2項(C32-C42)、右辺第3項(C33-C43)、および右辺第4項(C34-C44)のそれぞれに比べて、十分に大きい値を有するといえる。このため、式(4)に基づき、以下の式(5)によって表される近似式が導かれる。 At this time, it can be assumed that the values of the capacitances C31 to C44 are substantially equal. Therefore, in Expression (4), the first term on the right side, that is, 31 × (C31-C41) is the second term on the right side (C32-C42), the third term on the right side (C33-C43), and the fourth term on the right side ( It can be said that it has a sufficiently large value as compared with each of C34-C44). For this reason, an approximate expression represented by the following expression (5) is derived based on the expression (4).
Figure JPOXMLDOC01-appb-M000005
Figure JPOXMLDOC01-appb-M000005
 従って、タッチパネルコントローラ1010において、左辺の内積演算に基づき、右辺の静電容量(C31-C41)を推定することができる。 Therefore, the touch panel controller 1010 can estimate the capacitance (C31-C41) on the right side based on the inner product calculation on the left side.
 (タッチパネルシステム1000における静電容量の推定に含まれる誤差)
 タッチパネルシステム1000では、M本のドライブラインに対するN回の駆動が完了する前に、タッチパネル1020に対する入力が行われた場合、静電容量の推定値に、無視できない程度の大きさの誤差が含まれるという問題がある。以下、この理由について数学的に説明する。なお、ここでは、M=4、N=31である。
(Error included in capacitance estimation in touch panel system 1000)
In the touch panel system 1000, when an input is made to the touch panel 1020 before N times of driving for the M drive lines are completed, the estimated capacitance value includes an error that cannot be ignored. There is a problem. The reason for this will be described mathematically below. Here, M = 4 and N = 31.
 また、簡単ために、式(3)において、C32=C42=C33=C43=C34=C44=0の場合を考える。すなわち、式(3)において、静電容量(C31-C41)に係る右辺第1項に着目する。 Also, for the sake of simplicity, consider the case of C32 = C42 = C33 = C43 = C34 = C44 = 0 in equation (3). That is, in the expression (3), attention is focused on the first term on the right side relating to the capacitance (C31-C41).
  (1回目から31回目までのドライブラインDL1~DL4の駆動時)
 いま、(i)1回目から10回目までのドライブラインDL1~DL4の駆動において、タッチパネル1020に対する入力が与えられておらず、かつ、(ii)11回目から31回目までのドライブラインDL1~DL4の駆動において、タッチパネル1020に対する入力が与えられている場合を想定する。
(Driving from the first to 31st drive lines DL1 to DL4)
Now, (i) in the driving of the drive lines DL1 to DL4 from the first time to the tenth time, no input is given to the touch panel 1020, and (ii) the drive lines DL1 to DL4 from the 11th time to the 31st time are supplied. It is assumed that an input to the touch panel 1020 is given in driving.
 また、11回目から31回目までのドライブラインDL1~DL4の駆動において、タッチパネル1020に対する入力によって、静電容量C31の変化量がΔCだけ変化したとする。このため、11回目から31回目までのドライブラインDL1~DL4の駆動において、静電容量C31は、(C31+ΔC)に置き換えられる。 Further, it is assumed that the change amount of the capacitance C31 is changed by ΔC by the input to the touch panel 1020 in the drive of the drive lines DL1 to DL4 from the 11th to the 31st. For this reason, in the drive of the drive lines DL1 to DL4 from the 11th time to the 31st time, the capacitance C31 is replaced with (C31 + ΔC).
 従って、式(3)に基づき、1回目から31回目までのドライブラインDL1~DL4の駆動における静電容量(C31-C41)の推定値は、以下の(6)として表される。 Therefore, based on the equation (3), the estimated value of the capacitance (C31-C41) in driving the drive lines DL1 to DL4 from the first time to the 31st time is expressed as the following (6).
Figure JPOXMLDOC01-appb-M000006
Figure JPOXMLDOC01-appb-M000006
 式(6)は、静電容量(C31-C41)の推定値に対して、静電容量C31の変化量ΔCに起因する量が含まれていることを示している。 Equation (6) indicates that an amount caused by the change amount ΔC of the capacitance C31 is included in the estimated value of the capacitance (C31-C41).
 なお、式(6)において、右辺第1項は、右辺第2項に比べて、より支配的である。従って、式(6)に基づいて、静電容量(C31-C41)の推定値が計算されてもよい。 In Equation (6), the first term on the right side is more dominant than the second term on the right side. Therefore, an estimated value of the capacitance (C31-C41) may be calculated based on the equation (6).
 次に、以下の式(7)に示された、線形和信号Yiと、ドライブラインDL2に対応する符号系列Di,2との内積演算を考える。式(7)は、静電容量(C32-C42)の値を推定するための内積演算を示している。 Next, consider the inner product operation of the linear sum signal Yi and the code sequence Di, 2 corresponding to the drive line DL2 shown in the following equation (7). Equation (7) shows the inner product calculation for estimating the value of the capacitance (C32-C42).
Figure JPOXMLDOC01-appb-M000007
Figure JPOXMLDOC01-appb-M000007
 式(6)と同様にして、C32=C42=C33=C43=C34=C44=0に基づき、式(7)を変形することにより、以下の式(8)が導かれる。 Similarly to Expression (6), the following Expression (8) is derived by modifying Expression (7) based on C32 = C42 = C33 = C43 = C34 = C44 = 0.
Figure JPOXMLDOC01-appb-M000008
Figure JPOXMLDOC01-appb-M000008
 式(8)の右辺第1項の大きさ(絶対値)は、式(6)の右辺第1項の大きさ(絶対値)の1/31であり、微小な量であるとみなすことができる。従って、式(8)において、静電容量(C31-C41)に係る右辺第1項は、ほぼ0に等しいとして、無視することができる。 The magnitude (absolute value) of the first term on the right side of Equation (8) is 1/31 of the magnitude (absolute value) of the first term on the right side of Equation (6), and can be regarded as a minute amount. it can. Therefore, in Equation (8), the first term on the right side relating to the capacitance (C31-C41) can be ignored as it is substantially equal to zero.
 他方、式(8)において、変化量ΔCに係る右辺第2項は、無視することができない大きさとなる可能性がある。このため、C32=C42=0の仮定によれば、静電容量(C32-C42)の真値は0であるが、式(8)に示された内積演算に基づく、静電容量(C32-C42)の推定値は、0でない場合がある。 On the other hand, in Expression (8), the second term on the right side related to the change amount ΔC may be a size that cannot be ignored. Therefore, according to the assumption that C32 = C42 = 0, the true value of the capacitance (C32−C42) is 0, but the capacitance (C32−C42−) based on the inner product calculation shown in Expression (8). The estimated value of C42) may not be zero.
 この場合、静電容量の値(C32-C42)は、実際は0であるにもかかわらず、変化量ΔCに依存する静電容量の値が存在しているとして、静電容量(C32-C42)の値が誤って推定される。 In this case, although the capacitance value (C32-C42) is actually 0, it is assumed that there is a capacitance value depending on the change amount ΔC, and the capacitance (C32-C42). The value of is estimated incorrectly.
  (32回目から62回目までのドライブラインDL1~DL4の駆動時)
 続いて、上述の11回目から31回目までのドライブラインDL1~DL4の駆動におけるタッチパネル1020に対する入力が、32回目から50回目までのドライブラインDL1~DL4の駆動において継続している場合を考える。
(Driving drive lines DL1 to DL4 from the 32nd to 62nd times)
Next, consider a case where the input to the touch panel 1020 in the drive of the drive lines DL1 to DL4 from the 11th to the 31st time is continued in the drive of the drive lines DL1 to DL4 from the 32nd to the 50th.
 すなわち、(i)32回目から50回目までのドライブラインDL1~DL4の駆動において、タッチパネル1020に対する入力が与えられており、かつ、(ii)51回目から62回目までのドライブラインDL1~DL4の駆動において、タッチパネル1020に対する入力が与えられていない場合を想定する。 That is, (i) in driving the drive lines DL1 to DL4 from the 32nd to 50th times, an input to the touch panel 1020 is given, and (ii) driving the drivelines DL1 to DL4 from the 51st to the 62nd time Suppose that no input is given to the touch panel 1020.
 従って、32回目から50回目までのドライブラインDL1~DL4の駆動において、静電容量C31の変化量ΔCが存在しており、静電容量C31は、(C31+ΔC)に置き換えられる。他方、51回目から62回目までのドライブラインDL1~DL4の駆動において、静電容量C31の変化量ΔCが存在していない。 Therefore, in the drive of the drive lines DL1 to DL4 from the 32nd time to the 50th time, the change amount ΔC of the capacitance C31 exists, and the capacitance C31 is replaced by (C31 + ΔC). On the other hand, in the drive of the drive lines DL1 to DL4 from the 51st time to the 62nd time, the change amount ΔC of the capacitance C31 does not exist.
 また、32回目から62回目までのドライブラインDL1~DL4の駆動には、1回目から31回目までのドライブラインDL1~DL4の駆動と同様に、信号1st Vector~31th Vectorを順番に用いる。 Also, for driving the drive lines DL1 to DL4 from the 32nd time to the 62nd time, the signals 1st Vector to 31th Vector are used in order as in the drive lines DL1 to DL4 from the 1st time to the 31st time.
 従って、信号1st Vectorを用いて、32回目のドライブラインDL1~DL4の駆動が行われ、信号31st Vectorを用いて、62回目のドライブラインDL1~DL4の駆動が行われる。 Therefore, the 32nd drive lines DL1 to DL4 are driven using the signal 1st Vector, and the 62nd drive lines DL1 to DL4 are driven using the signal 31st Vector.
 すなわち、j番目の信号jth Vector(1≦j≦31)を用いて、(j+31)回目のドライブラインDL1~DL4の駆動が行われる。言い換えれば、i回目(32≦i≦62)のドライブラインDL1~DL4の駆動には、(i-31)番目の信号(i-31)th Vectorが用いられている。 That is, the (j + 31) th drive lines DL1 to DL4 are driven using the jth signal jth Vector (1 ≦ j ≦ 31). In other words, the (i-31) th signal (i-31) th Vector is used to drive the i-th (32 ≦ i ≦ 62) drive lines DL1 to DL4.
 従って、式(3)と同様にして、32回目から62回目までのドライブラインDL1~DL4の駆動における静電容量(C31-C41)の推定値は、以下の式(9)として表される。 Therefore, similarly to the equation (3), the estimated value of the capacitance (C31-C41) in driving the drive lines DL1 to DL4 from the 32nd to the 62nd is expressed as the following equation (9).
Figure JPOXMLDOC01-appb-M000009
Figure JPOXMLDOC01-appb-M000009
 式(6)と同様に、式(9)においても、静電容量(C31-C41)の推定値に対して、静電容量C31の変化量ΔCに起因する量が含まれている。 Similarly to Equation (6), Equation (9) also includes an amount caused by the change amount ΔC of the capacitance C31 with respect to the estimated value of the capacitance (C31-C41).
 なお、式(6)と同様に、式(9)においても、右辺第1項は、右辺第2項に比べて、より支配的である。従って、式(9)に基づいて、静電容量(C31-C41)の推定値が計算されてもよい。 Note that, similarly to Equation (6), in Equation (9), the first term on the right side is more dominant than the second term on the right side. Therefore, an estimated value of the capacitance (C31-C41) may be calculated based on the equation (9).
 また、式(8)と同様にして、32回目から62回目までのドライブラインDL1~DL4の駆動における静電容量(C32-C42)の推定値は、以下の式(10)として表される。 Similarly to the equation (8), the estimated value of the capacitance (C32-C42) in driving the drive lines DL1 to DL4 from the 32nd time to the 62nd time is expressed as the following equation (10).
Figure JPOXMLDOC01-appb-M000010
Figure JPOXMLDOC01-appb-M000010
 式(8)と同様に、式(10)においても、変化量ΔCに係る右辺第2項は、無視することができない大きさとなる可能性がある。 Similarly to the equation (8), also in the equation (10), the second term on the right side relating to the change amount ΔC may be a size that cannot be ignored.
 従って、式(8)と同様に、式(10)においても、静電容量の値(C32-C42)は、実際は0であるにもかかわらず、変化量ΔCに依存する静電容量の値が存在しているとして、静電容量(C32-C42)の値が誤って推定される場合がある。 Therefore, similarly to the equation (8), in the equation (10), the capacitance value (C32-C42) is actually 0, but the capacitance value depending on the change amount ΔC is 0. In some cases, the value of the capacitance (C32-C42) is estimated incorrectly.
日本国公開特許公報「特開2013-3603号公報(2013年1月7日公開)」Japanese Patent Publication “Japanese Patent Laid-Open No. 2013-3603 (published on January 7, 2013)”
 上述したように、特許文献1に開示されたタッチパネルシステム1000においては、M本のドライブラインに対するN回の駆動が完了する前に、タッチパネル1020に対する入力が行われた場合、静電容量の推定値に無視できない程度の大きさの誤差が含まれる場合がある。 As described above, in the touch panel system 1000 disclosed in Patent Document 1, when the input to the touch panel 1020 is performed before N times of driving for the M drive lines are completed, the estimated capacitance value May include an error that cannot be ignored.
 このため、実際には静電容量の変化が生じていないタッチパネル1020上の位置において、静電容量の変化が生じているとして、誤った静電容量の推定がなされるという問題が生じる。 For this reason, there is a problem that an erroneous estimation of the capacitance is made assuming that the capacitance has changed at a position on the touch panel 1020 where the capacitance has not actually changed.
 本発明は、上記の問題を解決するためになされたものであり、その目的は、静電容量をより正確に推定することが可能なタッチパネルコントローラを提供することである。 The present invention has been made to solve the above problem, and an object of the present invention is to provide a touch panel controller capable of estimating the capacitance more accurately.
 上記の課題を解決するために、本発明の一態様に係るタッチパネルコントローラは、系列長N(Nは整数)の符号系列に基づき、M本(Mは2以上の整数)のドライブラインをN回駆動することにより、上記M本のドライブラインと1本のセンスラインとの交点にそれぞれ形成されるM個の静電容量に関するN個の線形和信号を、上記センスラインから出力させる駆動部と、上記N個の線形和信号を保持した後、K個(Kは、0<K<Nを満たす整数)の線形和信号を、上記駆動部が上記ドライブラインをK回駆動するごとに得られる最新のK個の線形和信号によって順次に更新することにより、K個の更新後の線形和信号と、(N-K)個の更新前の線形和信号と、からなるN個の出力信号を出力する信号処理部と、上記N個の出力信号と上記符号系列の内積演算を行うことにより、上記M個の静電容量の値の推定値としての静電容量推定値を算出する内積演算部と、を備えていることを特徴としている。 In order to solve the above-described problem, a touch panel controller according to an aspect of the present invention performs M drive lines (M is an integer of 2 or more) N times based on a code sequence having a sequence length N (N is an integer). A drive unit that outputs N linear sum signals relating to M capacitances respectively formed at intersections of the M drive lines and one sense line by driving; After holding the N linear sum signals, K linear sum signals are obtained each time the driving unit drives the drive line K times (K is an integer satisfying 0 <K <N). By sequentially updating with K linear sum signals, N output signals consisting of K updated linear sum signals and (NK) pre-update linear sum signals are output. Signal processing unit and the N output signals By performing inner product calculation of the code sequence is characterized in that it comprises a, and the inner product calculation unit for calculating an electrostatic capacitance estimate as an estimate of the value of the M capacitance.
 本発明の一態様に係るタッチパネルコントローラによれば、静電容量をより正確に推定することができるという効果を奏する。 The touch panel controller according to one aspect of the present invention has an effect that the capacitance can be estimated more accurately.
本発明の実施形態1に係るタッチパネルシステムの構成を示す図である。It is a figure which shows the structure of the touchscreen system which concerns on Embodiment 1 of this invention. 本発明の実施形態1に係るタッチパネルシステムの一構成例を示す図である。It is a figure showing an example of 1 composition of a touch panel system concerning Embodiment 1 of the present invention. 本発明の実施形態1に係るタッチパネルシステムにおいて、それぞれの所定のクロック信号のタイミングにおいて取得された出力信号の値を表す図である。In the touch panel system which concerns on Embodiment 1 of this invention, it is a figure showing the value of the output signal acquired in the timing of each predetermined | prescribed clock signal. 本発明の実施形態1に係るタッチパネルシステムにおいて、それぞれの所定のクロック信号のタイミングにおいて算出された静電容量の差の推定値を表す図である。In the touch panel system which concerns on Embodiment 1 of this invention, it is a figure showing the estimated value of the difference of the electrostatic capacitance calculated in the timing of each predetermined | prescribed clock signal. 本発明の実施形態2に係る携帯電話機の構成を示す機能ブロック図である。It is a functional block diagram which shows the structure of the mobile telephone which concerns on Embodiment 2 of this invention. 特許文献1に開示されたタッチパネルシステムの一構成例を示す図である。It is a figure which shows the example of 1 structure of the touchscreen system disclosed by patent document 1. FIG. 特許文献1に開示されたタッチパネルシステムにおいて、ドライブラインの駆動に用いられる符号系列を生成するためのM系列符号を示す図である。In the touch panel system disclosed by patent document 1, it is a figure which shows the M series code | symbol for producing | generating the code series used for the drive of a drive line.
 〔実施形態1〕
 本発明の実施形態1について図1~図4に基づいて説明すれば、以下の通りである。
[Embodiment 1]
The first embodiment of the present invention will be described with reference to FIGS. 1 to 4 as follows.
 (タッチパネルシステム100の構成)
 図1は、本実施形態のタッチパネルシステム100の構成を示す図である。タッチパネルシステム100は、タッチパネルコントローラ110、およびタッチパネル120を備えている。
(Configuration of touch panel system 100)
FIG. 1 is a diagram illustrating a configuration of a touch panel system 100 according to the present embodiment. The touch panel system 100 includes a touch panel controller 110 and a touch panel 120.
 (タッチパネル120)
 タッチパネル120は、垂直方向に沿って互いに平行に配置された、M(Mは2以上の整数)本のドライブラインDL1~DLMと、水平方向に沿って互いに平行に配置された、P(Pは1以上の整数)本のセンスラインSL1~SLPとを備えている。
(Touch panel 120)
The touch panel 120 includes M (M is an integer of 2 or more) drive lines DL1 to DLM arranged in parallel with each other along the vertical direction, and P (P is a parallel display) arranged in parallel with each other along the horizontal direction. (Integer greater than or equal to 1) sense lines SL1 to SLP.
 そして、タッチパネル120において、(P×M)個の静電容量C1,1~CP,Mが、ドライブラインDL1~DLMとセンスラインSL1~SLPとの各交点に形成されている。ここで、静電容量CP,Mは、センスラインSLPと、ドライブラインDLMとの交点に形成された静電容量を表す。 In the touch panel 120, (P × M) electrostatic capacitances C1, 1 to CP, M are formed at the intersections of the drive lines DL1 to DLM and the sense lines SL1 to SLP. Here, the capacitances CP and M represent the capacitance formed at the intersection of the sense line SLP and the drive line DLM.
 (タッチパネルコントローラ110)
 タッチパネルコントローラ110は、駆動部111を備えている。また、タッチパネルコントローラ110は、差動増幅器112aおよび112b、AD(Analog-Digital)変換部113aおよび113b、信号処理部114aおよび114b、内積演算部115aおよび115b、ならびに推定値評価部116aおよび116bを備えている。
(Touch panel controller 110)
The touch panel controller 110 includes a drive unit 111. The touch panel controller 110 includes differential amplifiers 112a and 112b, AD (Analog-Digital) converters 113a and 113b, signal processors 114a and 114b, inner product arithmetic units 115a and 115b, and estimated value evaluation units 116a and 116b. ing.
 なお、差動増幅器112aおよび112b、AD変換部113aおよび113b、信号処理部114aおよび114b、内積演算部115aおよび115b、および推定値評価部116aおよび116bのそれぞれは、タッチパネル120が備えるセンスラインSL1~SLPの本数Pに応じて、3つ以上設けられてよい。図1では、代表的な部材として、差動増幅器112aおよび112b、AD変換部113aおよび113b、信号処理部114aおよび114b、内積演算部115aおよび115b、ならびに推定値評価部116aおよび116bのそれぞれが、図示されている。 Note that each of the differential amplifiers 112a and 112b, the AD conversion units 113a and 113b, the signal processing units 114a and 114b, the inner product calculation units 115a and 115b, and the estimated value evaluation units 116a and 116b are sense lines SL1 to SL provided in the touch panel 120. Depending on the number P of SLPs, three or more may be provided. In FIG. 1, as representative members, differential amplifiers 112a and 112b, AD conversion units 113a and 113b, signal processing units 114a and 114b, inner product calculation units 115a and 115b, and estimated value evaluation units 116a and 116b, respectively, It is shown in the figure.
  (駆動部111)
 駆動部111は、系列長Nの符号系列Drive1~DriveNに基づき、ドライブラインDL1~DLMを駆動する。符号系列Drive1~DriveNは、例えば、図7に示されたM系列符号MC1等によって生成されてよい。
(Driver 111)
The driving unit 111 drives the drive lines DL1 to DLM based on the code sequence Drive1 to DriveN having the sequence length N. The code sequences Drive1 to DriveN may be generated by, for example, the M sequence code MC1 shown in FIG.
 ここでは、符号系列Drive1~DriveNのうち、符号系列Drive1~DriveMに基づき、ドライブラインDL1~DLMが駆動される。 Here, among the code sequences Drive1 to DriveN, the drive lines DL1 to DLM are driven based on the code sequences Drive1 to DriveM.
 さらに、i回目(1≦i≦N)のドライブラインの駆動において、各ドライブラインに印加されるべき電圧の値を規定する信号1st Vector~Nth Vectorもまた、例えば、図7に示されたM系列符号MC1等によって規定されてよい。 Further, in the i-th (1 ≦ i ≦ N) driving of the drive line, signals 1st Vector to Nth Vector that specify the value of the voltage to be applied to each drive line are also represented by, for example, M It may be defined by the sequence code MC1 or the like.
 駆動部111は、スイッチD1~DMおよびDB1~DBMを備えている。駆動部111は、X番目のスイッチDXを介して、X番目のドライブラインDLXに、電圧Vdriveを印加する。また、駆動部111は、X番目のスイッチDBXを介して、X番目のドライブラインDLXに、電圧(-Vdrive)を印加する。 The drive unit 111 includes switches D1 to DM and DB1 to DBM. The drive unit 111 applies the voltage Vdrive to the Xth drive line DLX via the Xth switch DX. In addition, the drive unit 111 applies a voltage (−Vdrive) to the Xth drive line DLX via the Xth switch DBX.
 駆動部111は、i回目のドライブラインの駆動において、X番目の信号DriveXの成分が「1」であるとき、X番目のドライブラインDLXに、電圧Vdriveを印加する。また、駆動部111は、X番目の信号DriveXの成分が「-1」であるとき、X番目のドライブラインDLXに、電圧(-Vdrive)を印加する。 The driving unit 111 applies the voltage Vdrive to the Xth drive line DLX when the component of the Xth signal DriveX is “1” in the i-th driveline drive. The drive unit 111 applies a voltage (−Vdrive) to the Xth drive line DLX when the component of the Xth signal DriveX is “−1”.
 なお、電圧Vdriveは、例えば、タッチパネルシステム100に印加される電源電圧であってよい。また、電圧Vdriveとして、タッチパネルシステム100に印加される参照電圧等の、電源電圧以外の電圧が用いられてもよい。 The voltage Vdrive may be a power supply voltage applied to the touch panel system 100, for example. Further, as the voltage Vdrive, a voltage other than the power supply voltage such as a reference voltage applied to the touch panel system 100 may be used.
 以降、i(1≦i≦N)回目のドライブラインDL1~DLMの駆動における、符号系列Drive1~DriveMのそれぞれの成分を、符号系列Di,1~Di,Mとして表す。符号系列Di,1~Di,Mのそれぞれは、互いに相関が小さいことが好ましい。 Hereinafter, the respective components of the code sequences Drive1 to DriveM in the driving of the drive lines DL1 to DLM for the i (1 ≦ i ≦ N) times are represented as code sequences Di, 1 to Di, M. Each of the code sequences Di, 1 to Di, M preferably has a small correlation with each other.
  (差動増幅器112aおよび112b)
 差動増幅器112aおよび112bは、2入力2出力の増幅器であり、2つの入力信号の差を増幅し、出力信号として出力する。
(Differential amplifiers 112a and 112b)
The differential amplifiers 112a and 112b are two-input two-output amplifiers, amplify the difference between the two input signals, and output as an output signal.
 差動増幅器112aおよび112bは、それぞれ、2つの積分容量Cintと接続されている。すなわち、積分容量Cintのうちの1つは、差動増幅器112aまたは112bの、1つの入力端子と1つの出力端子との間に接続されている。また、積分容量Cintのうちのもう1つは、差動増幅器112aまたは112bの、もう1つの入力端子ともう1つの出力端子との間に接続されている。 The differential amplifiers 112a and 112b are each connected to two integration capacitors Cint. That is, one of the integration capacitors Cint is connected between one input terminal and one output terminal of the differential amplifier 112a or 112b. The other one of the integration capacitors Cint is connected between the other input terminal and the other output terminal of the differential amplifier 112a or 112b.
 差動増幅器112bは、センスラインSL1およびSL2から取得された信号が、それぞれ入力されるように配置されている。差動増幅器112bは、センスラインSL1からの入力信号(センスラインSL1とドライブラインDL1~DLMとの交点に形成される静電容量に関する線形和信号)と、センスラインSL2からの入力信号(センスラインSL2とドライブラインDL1~DLMとの交点に形成される静電容量に関する線形和信号)との差を増幅し、出力信号としての線形和信号を、AD変換部113bに与える。 The differential amplifier 112b is arranged such that signals acquired from the sense lines SL1 and SL2 are input thereto. The differential amplifier 112b includes an input signal from the sense line SL1 (linear sum signal relating to capacitance formed at the intersection of the sense line SL1 and the drive lines DL1 to DLM) and an input signal from the sense line SL2 (sense line). The difference between the SL2 and the linear sum signal relating to the capacitance formed at the intersections of the drive lines DL1 to DLM) is amplified, and a linear sum signal as an output signal is given to the AD converter 113b.
 同様に、差動増幅器112aは、センスラインSL(P-1)およびSLPから取得された信号が、それぞれ入力されるように配置されている。差動増幅器112aは、センスラインSL(P-1)からの入力信号(センスラインSL(P-1)とドライブラインDL1~DLMとの交点に形成される静電容量に関する線形和信号)と、センスラインSLPからの入力信号(センスラインSLPとドライブラインDL1~DLMとの交点に形成される静電容量に関する線形和信号)との差を増幅し、出力信号としての線形和信号を、AD変換部113aに与える。 Similarly, the differential amplifier 112a is arranged so that signals acquired from the sense lines SL (P-1) and SLP are respectively input thereto. The differential amplifier 112a includes an input signal from the sense line SL (P-1) (a linear sum signal related to the capacitance formed at the intersection of the sense line SL (P-1) and the drive lines DL1 to DLM), Amplifies the difference from the input signal from the sense line SLP (linear sum signal related to the capacitance formed at the intersection of the sense line SLP and the drive lines DL1 to DLM), and AD converts the linear sum signal as the output signal To the part 113a.
  (AD変換部113aおよび113b)
 AD変換部113aおよび113bは、それぞれ、差動増幅器112aおよび112bから出力された、アナログ信号としての線形和信号にAD変換を施す。続いて、AD変換部113aおよび113bは、それぞれ、デジタル化された線形和信号を、信号処理部114aおよび114bに与える。
( AD converters 113a and 113b)
The AD converters 113a and 113b perform AD conversion on the linear sum signals output from the differential amplifiers 112a and 112b as analog signals, respectively. Subsequently, the AD conversion units 113a and 113b supply the digitized linear sum signals to the signal processing units 114a and 114b, respectively.
 線形和信号が、デジタル信号として、AD変換部113aおよび113bから信号処理部114aおよび114bへ与えられることにより、信号処理部114aおよび114b、ならびに内積演算部115aおよび115bにおける、静電容量の分布を計算するための各種演算が容易化される。 The linear sum signal is supplied as a digital signal from the AD conversion units 113a and 113b to the signal processing units 114a and 114b, whereby the capacitance distribution in the signal processing units 114a and 114b and the inner product calculation units 115a and 115b is changed. Various operations for calculation are facilitated.
  (信号処理部114aおよび114b)
 信号処理部114aおよび114bは、それぞれ、ドライブラインDL1~DLMの毎回の駆動において、AD変換部113aおよび113bから与えられる線形和信号の値を一時的に保持する。続いて、信号処理部114aおよび114bは、それぞれ、静電容量の値を推定するための内積演算に必要な線形和信号の値を、内積演算部115aおよび115bに与える。
( Signal processing units 114a and 114b)
The signal processing units 114a and 114b temporarily hold the value of the linear sum signal provided from the AD conversion units 113a and 113b in each drive of the drive lines DL1 to DLM, respectively. Subsequently, the signal processing units 114a and 114b give the values of the linear sum signals necessary for the inner product calculation for estimating the capacitance value to the inner product calculation units 115a and 115b, respectively.
 すなわち、信号処理部114aおよび114bは、N回のドライブラインDL1~DLMの駆動において得られた線形和信号Y1~YNを保持する。 That is, the signal processing units 114a and 114b hold the linear sum signals Y1 to YN obtained by driving the N drive lines DL1 to DLM.
 そして、信号処理部114aおよび114bは、ドライブラインDL1~DLMがK回(Kは、0<K<Nを満たす整数)駆動されるごとに、AD変換部113aおよび113bを介して、最新のK個の線形和信号Y2(1)~Y2(K)を得る。 Each time the drive lines DL1 to DLM are driven K times (K is an integer satisfying 0 <K <N), the signal processing units 114a and 114b pass through the AD conversion units 113a and 113b to obtain the latest K The linear sum signals Y2 (1) to Y2 (K) are obtained.
 続いて、信号処理部114aおよび114bは、保持されている線形和信号Y1~YNのうちのK個の線形和信号(すなわち、Y1~YK)を、最新のK個の線形和信号Y2(1)~Y2(K)に更新する。ここで、保持されている線形和信号Y1~YNのうち、(N-K)個の線形和信号(すなわち、Y(K+1)~YN)は、更新が行われていない。 Subsequently, the signal processing units 114a and 114b use the K linear sum signals (that is, Y1 to YK) among the held linear sum signals Y1 to YN as the latest K linear sum signals Y2 (1 ) To Y2 (K). Here, (NK) linear sum signals (that is, Y (K + 1) to YN) among the held linear sum signals Y1 to YN are not updated.
 そして、信号処理部114aおよび114bは、現在保持している、K個の線形和信号Y2(1)~Y2(K)、および、(N-K)個の線形和信号Y(K+1)~YNからなるN個の線形和信号を、出力信号として内積演算部115aおよび115bに与える。 The signal processing units 114a and 114b then hold the K linear sum signals Y2 (1) to Y2 (K) and (NK) linear sum signals Y (K + 1) to YN that are currently held. N linear sum signals consisting of are given as output signals to the inner product calculation sections 115a and 115b.
 なお、更新されるべき線形和信号の個数を規定する整数Kは、タッチパネルシステム100においてあらかじめ定められた固有の値であってもよいし、タッチパネルシステム100の外部に設けられたプロセッサ等(例えば、後述の図5のCPU310)によって変更可能な値であってもよい。 Note that the integer K that defines the number of linear sum signals to be updated may be a specific value predetermined in the touch panel system 100, or may be a processor provided outside the touch panel system 100 (for example, It may be a value that can be changed by a CPU 310 in FIG.
  (内積演算部115aおよび115b)
 内積演算部115aおよび115bは、静電容量の値を推定するための内積演算を行う演算部である。すなわち、内積演算部115aおよび115bは、信号処理部114aおよび114bから与えられるN個の出力信号(線形和信号)と、符号系列Di,1~Di,Mのうちのいずれか1つとの内積演算を行う。続いて、内積演算部115aおよび115bは、それぞれ、内積演算の結果として得られた静電容量の推定値を、推定値評価部116aおよび116bに与える。
(Inner product calculation units 115a and 115b)
The inner product calculation units 115a and 115b are calculation units that perform an inner product calculation for estimating a capacitance value. That is, the inner product calculation units 115a and 115b calculate the inner product of the N output signals (linear sum signals) given from the signal processing units 114a and 114b and any one of the code sequences Di, 1 to Di, M. I do. Subsequently, the inner product calculation units 115a and 115b provide the estimated value of the capacitance obtained as a result of the inner product calculation to the estimated value evaluation units 116a and 116b, respectively.
 なお、符号系列Di,1~Di,Mは、信号処理部114aおよび114bから、内積演算部115aおよび115bに与えられてもよいし、または、内積演算部115aおよび115bにおいて、あらかじめ保持されていてもよい。 The code sequences Di, 1 to Di, M may be given from the signal processing units 114a and 114b to the inner product calculation units 115a and 115b, or may be held in advance in the inner product calculation units 115a and 115b. Also good.
  (推定値評価部116aおよび116b)
 推定値評価部116aおよび116bは、それぞれ、内積演算部115aおよび115bにおける内積演算の結果として得られた複数の静電容量の推定値に対する評価を行う。続いて、推定値評価部116aおよび116bは、評価結果に基づき、最も誤差の少ない静電容量の推定値を決定する。
(Estimated value evaluation units 116a and 116b)
The estimated value evaluation units 116a and 116b perform evaluation on a plurality of estimated capacitance values obtained as a result of the inner product calculation in the inner product calculation units 115a and 115b, respectively. Subsequently, the estimated value evaluation units 116a and 116b determine the estimated value of the capacitance with the least error based on the evaluation result.
 例えば、推定値評価部116aおよび116bは、複数の静電容量の推定値のそれぞれの標準偏差または分散を算出することにより、複数の静電容量の推定値に対する評価を行う。そして、推定値評価部116aおよび116bは、最も標準偏差または分散の少ない静電容量の推定値を、複数の静電容量の推定値の代表値(すなわち、最も誤差の少ない静電容量の推定値)として決定する。 For example, the estimated value evaluation units 116a and 116b perform evaluation on the estimated values of the plurality of capacitances by calculating standard deviations or variances of the estimated values of the plurality of capacitances. Then, the estimated value evaluation units 116a and 116b use the estimated value of the capacitance with the smallest standard deviation or variance as the representative value of the estimated values of the plurality of capacitances (that is, the estimated value of the capacitance with the least error). ).
 (タッチパネルシステム100における静電容量の推定についての説明)
 続いて、本実施形態のタッチパネルシステム100における静電容量の推定について、数学的に説明する。なお、ここで説明された方法に基づき静電容量の推定を行うタッチパネルシステム100の具体的な構成および動作については、後に詳述する(後述の図2を参照)。
(Explanation of capacitance estimation in touch panel system 100)
Next, the estimation of the capacitance in the touch panel system 100 of the present embodiment will be mathematically described. The specific configuration and operation of the touch panel system 100 that estimates the capacitance based on the method described here will be described in detail later (see FIG. 2 described later).
 ここでは、特許文献1に開示されたタッチパネルシステム1000との対比によって、説明を行う。すなわち、タッチパネルシステム1000の動作の説明と同様に、M=4、N=31、かつ、C32=C42=C33=C43=C34=C44=0の場合を考える。さらに、信号処理部114aおよび114bにおいて更新されるべき線形和信号の個数Kが、K=1として設定されている場合を考える。 Here, description will be made by comparison with the touch panel system 1000 disclosed in Patent Document 1. That is, as in the description of the operation of the touch panel system 1000, consider the case where M = 4, N = 31, and C32 = C42 = C33 = C43 = C34 = C44 = 0. Further, consider the case where the number K of linear sum signals to be updated in the signal processing units 114a and 114b is set as K = 1.
 そして、タッチパネルシステム1000の動作の説明と同様に、1回目から62回目までのドライブラインDL1~DL4の駆動において、11回目から50回目までのドライブラインDL1~DL4の駆動において、タッチパネルに対する入力によって、静電容量C31の変化量がΔCだけ変化した場合を想定する。 Similarly to the description of the operation of the touch panel system 1000, in the drive of the drive lines DL1 to DL4 from the first time to the 62nd time, in the drive of the drive lines DL1 to DL4 from the 11th time to the 50th time, Assume that the change amount of the capacitance C31 is changed by ΔC.
  (1回目から31回目までのドライブラインDL1~DL4の駆動時)
 タッチパネルシステム100において、1回目から31回目までのドライブラインDL1~DL4の駆動を通じて、31個の線形和信号Y1~Y31が新たに得られる。
(Driving from the first to 31st drive lines DL1 to DL4)
In the touch panel system 100, 31 linear sum signals Y1 to Y31 are newly obtained through driving of the drive lines DL1 to DL4 from the first time to the 31st time.
 1回目から31回目までのドライブラインDL1~DL4の駆動時においては、本実施形態のタッチパネルコントローラ110は、特許文献1のタッチパネルシステム1000が備えるタッチパネルコントローラ1010と同様にして、静電容量の推定のための内積演算を行う。 At the time of driving the drive lines DL1 to DL4 from the first time to the 31st time, the touch panel controller 110 of the present embodiment is similar to the touch panel controller 1010 provided in the touch panel system 1000 of Patent Document 1 to estimate the capacitance. To calculate the inner product.
 従って、タッチパネルコントローラ110において、静電容量(C31-C41)を推定するための内積演算は、式(6)によって行われる。また、タッチパネルコントローラ110において、静電容量の値(C32-C42)を推定するための内積演算は、式(8)によって行われる。 Therefore, in the touch panel controller 110, the inner product calculation for estimating the capacitance (C31-C41) is performed by the equation (6). In addition, in the touch panel controller 110, the inner product calculation for estimating the capacitance value (C32-C42) is performed by Expression (8).
 なお、1回目から31回目までのドライブラインDL1~DL4の駆動時において、i回目(1≦i≦31)に得られる線形和信号をYiとして表す。また、式(6)および式(8)を導出するまでの計算過程については、特許文献1のタッチパネルシステム1000においてすでに説明をしているため、詳細な説明は省略する。 Note that a linear sum signal obtained at the i-th (1 ≦ i ≦ 31) is expressed as Yi when the drive lines DL1 to DL4 are driven from the first to the 31st. In addition, since the calculation process until the expressions (6) and (8) are derived has already been described in the touch panel system 1000 of Patent Document 1, detailed description thereof is omitted.
  (32回目のドライブラインDL1~DL4の駆動時)
 次に、タッチパネルシステム100において、32回目のドライブラインDL1~DL4の駆動を考える。
(When driving the drive lines DL1 to DL4 for the 32nd time)
Next, consider the 32nd drive lines DL1 to DL4 in the touch panel system 100.
 32回目のドライブラインDL1~DL4の駆動時において、タッチパネルコントローラ110により、上述の線形和信号Yiに対して、以下の式(11)に基づき、出力信号Y2iが定められる。 When driving the drive lines DL1 to DL4 for the 32nd time, the touch panel controller 110 determines the output signal Y2i based on the following equation (11) with respect to the linear sum signal Yi.
Figure JPOXMLDOC01-appb-M000011
Figure JPOXMLDOC01-appb-M000011
 すなわち、出力信号Y2iにおいて、1回目のドライブラインDL1~DL4の駆動において得られた線形和信号Y1は、32回目のドライブラインDL1~DL4の駆動において得られた線形和信号Y32に更新されている。他方、2回目から31回目までのドライブラインDL1~DL4の駆動において得られた線形和信号Y2~Y31は、そのまま保持されている。 That is, in the output signal Y2i, the linear sum signal Y1 obtained in the first drive lines DL1 to DL4 is updated to the linear sum signal Y32 obtained in the 32nd drive line DL1 to DL4 drive. . On the other hand, the linear sum signals Y2 to Y31 obtained in the drive of the drive lines DL1 to DL4 from the second time to the 31st time are held as they are.
 そして、タッチパネルコントローラ110において、線形和信号Yiに替わり、出力信号Y2iに基づき、静電容量(C31-C41)を推定するための内積演算が行われる。32回目のドライブラインDL1~DL4の駆動時において、出力信号Y2iに基づく、静電容量(C31-C41)を推定するための内積演算は、以下の式(12)によって表される。 Then, the touch panel controller 110 performs an inner product operation for estimating the capacitance (C31-C41) based on the output signal Y2i instead of the linear sum signal Yi. When driving the drive lines DL1 to DL4 for the 32nd time, the inner product calculation for estimating the capacitance (C31-C41) based on the output signal Y2i is expressed by the following equation (12).
Figure JPOXMLDOC01-appb-M000012
Figure JPOXMLDOC01-appb-M000012
 式(12)における静電容量C31の変化量ΔCに係る右辺第2項の係数(すなわち22)は、式(6)における静電容量C31の変化量ΔCに係る右辺第2項の係数(すなわち21)に比べて、1だけ大きい。 The coefficient of the second term on the right side related to the change amount ΔC of the capacitance C31 in Expression (12) (that is, 22) is the coefficient of the second term on the right side related to the change amount ΔC of the capacitance C31 in Expression (6). Compared with 21) by one.
 これは、出力信号Y2iにおいて、タッチパネル120に対する入力が与えられていない1回目の駆動において得られた線形和信号Y1が、タッチパネル120に対する入力が与えられている32回目の駆動において得られた線形和信号Y32に置き換えられているためである。 This is because, in the output signal Y2i, the linear sum signal Y1 obtained in the first drive when the input to the touch panel 120 is not given is the linear sum obtained in the 32nd drive where the input to the touch panel 120 is given. This is because the signal Y32 is replaced.
  (41回目のドライブラインDL1~DL4の駆動時)
 さらに、タッチパネルシステム100において、41回目のドライブラインDL1~DL4の駆動を考える。
(During 41st drive line DL1-DL4 drive)
Further, consider the 41st driving of the drive lines DL1 to DL4 in the touch panel system 100.
 41回目のドライブラインDL1~DL4の駆動時において、タッチパネルコントローラ110により、以下の式(13)によって、出力信号Y2iが定められる。 When the drive lines DL1 to DL4 are driven for the 41st time, the output signal Y2i is determined by the touch panel controller 110 according to the following equation (13).
Figure JPOXMLDOC01-appb-M000013
Figure JPOXMLDOC01-appb-M000013
 すなわち、出力信号Y2iにおいて、1回目から10回目までのドライブラインDL1~DL4の駆動において得られた線形和信号Y1は、32回目から41回目までのドライブラインDL1~DL4の駆動において得られた線形和信号Y32~Y41に更新されている。他方、11回目から31回目までのドライブラインDL1~DL4の駆動において得られた線形和信号Y2~Y31は、そのまま保持されている。 That is, in the output signal Y2i, the linear sum signal Y1 obtained in the driving of the drive lines DL1 to DL4 from the first time to the tenth time is the linear obtained in the driving of the drive lines DL1 to DL4 from the 32nd time to the 41st time. The sum signals Y32 to Y41 are updated. On the other hand, the linear sum signals Y2 to Y31 obtained in the drive of the drive lines DL1 to DL4 from the 11th time to the 31st time are held as they are.
 41回目のドライブラインDL1~DL4の駆動時において、出力信号Y2iに基づく、静電容量(C31-C41)を推定するための内積演算は、以下の式(14)によって表される。 When the drive lines DL1 to DL4 are driven for the 41st time, the inner product calculation for estimating the capacitance (C31-C41) based on the output signal Y2i is expressed by the following equation (14).
Figure JPOXMLDOC01-appb-M000014
Figure JPOXMLDOC01-appb-M000014
 式(14)によれば、出力信号Y2iにおいて、1回目から10回目までのドライブラインDL1~DL4の駆動において得られた線形和信号Y1~Y10は、32~41回目のドライブラインDL1~DL4の駆動において得られた線形和信号Y32~Y41に更新されている。他方、11回目から31回目までのドライブラインDL1~DL4の駆動において得られた線形和信号Y11~Y31は、そのまま保持されている。 According to the equation (14), in the output signal Y2i, the linear sum signals Y1 to Y10 obtained in the driving of the drive lines DL1 to DL4 from the first time to the tenth time are obtained from the drive lines DL1 to DL4 of the 32nd to 41st times. The linear sum signals Y32 to Y41 obtained in driving are updated. On the other hand, the linear sum signals Y11 to Y31 obtained in the drive of the drive lines DL1 to DL4 from the 11th time to the 31st time are held as they are.
 式(14)において、静電容量C31の変化量ΔCに係る右辺第2項の係数(すなわち31)は、静電容量(C31-C41)に係る右辺第1項の係数(すなわち31)と等しい。 In Equation (14), the coefficient of the second term on the right side (ie, 31) related to the change amount ΔC of the capacitance C31 is equal to the coefficient (ie, 31) of the first term on the right side related to the capacitance (C31−C41). .
 これは、出力信号Y2iにおいて、タッチパネル120に対する入力が与えられていない1回目から10回目までの駆動において得られた線形和信号Y1~Y10が、タッチパネル120に対する入力が与えられている32回目から41回目までの駆動において得られた線形和信号Y32~Y41に置き換えられているためである。 This is because, in the output signal Y2i, the linear sum signals Y1 to Y10 obtained in the first to tenth driving when the input to the touch panel 120 is not given are the 32nd to 41th when the input to the touch panel 120 is given. This is because the linear sum signals Y32 to Y41 obtained in the previous driving are replaced.
 他方、41回目のドライブラインDL1~DL4の駆動時において、出力信号Y2iに基づく、静電容量(C32-C42)を推定するための内積演算は、以下の式(15)によって表される。 On the other hand, when the drive lines DL1 to DL4 are driven for the 41st time, the inner product calculation for estimating the capacitance (C32-C42) based on the output signal Y2i is expressed by the following equation (15).
Figure JPOXMLDOC01-appb-M000015
Figure JPOXMLDOC01-appb-M000015
 式(15)によれば、出力信号Y2iにおいて、1回目から10回目までのドライブラインDL1~DL4の駆動において得られた線形和信号Y1~Y10は、32~41回目のドライブラインDL1~DL4の駆動において得られた線形和信号Y32~Y41に更新されている。他方、11回目から31回目までのドライブラインDL1~DL4の駆動において得られた線形和信号Y11~Y31は、そのまま保持されている。 According to the equation (15), in the output signal Y2i, the linear sum signals Y1 to Y10 obtained by driving the drive lines DL1 to DL4 from the first time to the tenth time are represented by the 32 to 41st drive lines DL1 to DL4. The linear sum signals Y32 to Y41 obtained in driving are updated. On the other hand, the linear sum signals Y11 to Y31 obtained in the drive of the drive lines DL1 to DL4 from the 11th time to the 31st time are held as they are.
 式(15)における静電容量C31の変化量ΔCに係る右辺第2項の係数(すなわち-1)の大きさは、静電容量(C32-C42)に係る右辺第1項の係数(すなわち-1)と等しい。 In equation (15), the coefficient of the second term on the right side (that is, −1) related to the change amount ΔC of the capacitance C31 is the coefficient of the first term on the right side related to the capacitance (C32−C42) (ie, − Equivalent to 1).
 従って、式(15)における変化量ΔCに係る右辺第2項の大きさは、式(8)および式(10)に比べて、さらに小さい。 Therefore, the magnitude of the second term on the right side related to the change ΔC in equation (15) is even smaller than in equations (8) and (10).
 すなわち、式(15)においては、式(8)および式(10)に比べて、静電容量の値(C32-C42)に対して含まれる、変化量ΔCに起因する誤差の大きさが抑制されている。 That is, in the equation (15), the magnitude of the error due to the change amount ΔC included in the capacitance value (C32-C42) is suppressed as compared with the equations (8) and (10). Has been.
 このため、本実施形態のタッチパネルシステム100によれば、実際には静電容量の変化が生じていないタッチパネルの位置において、誤った静電容量の推定がなされることが抑制される。 For this reason, according to the touch panel system 100 of the present embodiment, it is possible to suppress erroneous estimation of the capacitance at the position of the touch panel where the capacitance does not actually change.
 (タッチパネルシステム100の一構成例としてのタッチパネルシステム100s)
 図2を用いて、タッチパネルシステム100の具体的な構成および動作の一例について説明する。図2は、タッチパネルシステム100の一構成例を示す図である。
(Touch panel system 100s as one configuration example of touch panel system 100)
An example of a specific configuration and operation of the touch panel system 100 will be described with reference to FIG. FIG. 2 is a diagram illustrating a configuration example of the touch panel system 100.
 図2は、図1に示されたタッチパネルシステム100において、M=18、P=2である場合のタッチパネルシステム100sの構成を示している。タッチパネルシステム100sは、タッチパネルコントローラ110sおよびタッチパネル120sを備えている。 FIG. 2 shows a configuration of the touch panel system 100s in the case where M = 18 and P = 2 in the touch panel system 100 shown in FIG. The touch panel system 100s includes a touch panel controller 110s and a touch panel 120s.
 タッチパネル120sは、18本のドライブラインDL1~DL18と、2本のセンスラインSL1~SL2とを備えている。そして、ドライブラインDL1~DL18と、センスラインSL1~SL2との交点には、36個の静電容量C1,1~C2,18がそれぞれ形成されている。 The touch panel 120s includes 18 drive lines DL1 to DL18 and two sense lines SL1 to SL2. Then, 36 electrostatic capacitances C1, 1 to C2, 18 are formed at the intersections of the drive lines DL1 to DL18 and the sense lines SL1 to SL2, respectively.
 ここで、静電容量C1,1~C2,18のそれぞれは、C=2.2pFの静電容量を有しているとする。また、タッチパネル120sに入力が与えられた時、静電容量C1,1~C2,18のそれぞれに生じる静電容量の変化量ΔCは、ΔC=-0.2pFであるとする。 Here, it is assumed that each of the capacitances C1, 1 to C2, 18 has a capacitance of C = 2.2 pF. Further, it is assumed that the capacitance change amount ΔC generated in each of the capacitances C1, 1 to C2, 18 when the input is given to the touch panel 120s is ΔC = −0.2 pF.
 また、タッチパネルコントローラ110sは、駆動部111s、差動増幅器112s、AD変換部113s、信号処理部114s、内積演算部115s、および推定値評価部116sを備えている。 Further, the touch panel controller 110s includes a drive unit 111s, a differential amplifier 112s, an AD conversion unit 113s, a signal processing unit 114s, an inner product calculation unit 115s, and an estimated value evaluation unit 116s.
 なお、タッチパネルコントローラ110sに与えられるクロック信号の周波数は、1MHzであるとする。また、タッチパネルコントローラ110sに与えられる電源電圧VDDおよびコモンモード電圧VCMは、それぞれ、VDD=3.3V、およびVCM=1.65Vであるとする。 It is assumed that the frequency of the clock signal given to the touch panel controller 110s is 1 MHz. Further, it is assumed that the power supply voltage VDD and the common mode voltage VCM supplied to the touch panel controller 110s are VDD = 3.3V and VCM = 1.65V, respectively.
 駆動部111sは、図1のタッチパネルシステム100において、M=18である場合の駆動部111に対応しており、ドライブラインDL1~DL18を駆動する。すなわち、駆動部1011は、スイッチD1~D18およびDB1~DB18を備えている。 The driving unit 111s corresponds to the driving unit 111 in the case of M = 18 in the touch panel system 100 in FIG. 1, and drives the drive lines DL1 to DL18. That is, the drive unit 1011 includes switches D1 to D18 and DB1 to DB18.
 駆動部111sにおいて、Vdrive=(VDD/2)+VCM=3.3Vとする。また、駆動部111sにおいて、-Vdrive=(-VDD/2)+VCM=0Vとする。 In the driving unit 111s, Vdrive = (VDD / 2) + VCM = 3.3V. Further, in the driving unit 111s, −Vdrive = (− VDD / 2) + VCM = 0V.
 なお、差動増幅器112s、AD変換部113s、信号処理部114s、内積演算部115s、および推定値評価部116sは、センスラインSL1およびSL2からの信号を処理するように配置されており、図1のタッチパネルシステム100における、AD変換部113b、信号処理部114b、内積演算部115b、および推定値評価部116sにそれぞれ対応する。 The differential amplifier 112s, the AD conversion unit 113s, the signal processing unit 114s, the inner product calculation unit 115s, and the estimated value evaluation unit 116s are arranged so as to process signals from the sense lines SL1 and SL2. Corresponds to the AD conversion unit 113b, the signal processing unit 114b, the inner product calculation unit 115b, and the estimated value evaluation unit 116s, respectively.
 (タッチパネルシステム100sの動作の具体例)
 タッチパネルコントローラ110sにおいて、系列長63のM系列符号をビットシフトすることによって生成された63個の符号系列が用いられる場合を考える。
(Specific example of operation of touch panel system 100s)
Consider a case where 63 code sequences generated by bit-shifting an M-sequence code having a sequence length of 63 are used in touch panel controller 110s.
 そして、タッチパネルコントローラ110sに与えられるt回目のクロック信号に対応する63個の符号系列を、DM1,t~DM63,tと呼称する。符号系列DM1,t~DM63,tは、クロック回数tごとにそれぞれ異なる値を有する。符号系列DM1,t~DM63,tの系列長Nは、N=63である。 The 63 code sequences corresponding to the t-th clock signal given to the touch panel controller 110s are referred to as DM1, t to DM63, t. The code sequences DM1, t to DM63, t have different values for each clock frequency t. The sequence length N of the code sequences DM1, t to DM63, t is N = 63.
 特に、1回目のクロック信号に対応する符号系列は、DM1,1~DM63,1と表され、また、63回目のクロック信号に対応する符号系列は、DM1,63~DM63,63と表される。 In particular, the code sequence corresponding to the first clock signal is represented as DM1,1 to DM63,1, and the code sequence corresponding to the 63rd clock signal is represented as DM1,63 to DM63,63. .
 なお、符号系列DM1,t~DM63,tは、63クロック毎に同じ値を繰り返す。従って、t=64回目において、DM1,t~DM63,t=DM1,64~DM63,64=DM1,1~DM63,1となる。すなわち、64回目のクロック信号に対応する符号系列DM1,64~DM63,64は、1回目のクロック信号に対応する符号系列DM1,1~DM63,1に等しい。 The code sequences DM1, t to DM63, t repeat the same value every 63 clocks. Accordingly, at t = 64th time, DM1, t to DM63, t = DM1, 64 to DM63, 64 = DM1, 1 to DM63,1. That is, the code sequences DM1, 64 to DM63, 64 corresponding to the 64th clock signal are equal to the code sequences DM1, 1 to DM63,1 corresponding to the first clock signal.
 まず、1回目のクロック信号から63回目のクロック信号までの期間を考える。信号処理部114sは、1≦t≦63なるt回目のクロック信号において、線形和信号Y1(t)を取得する。そして、63回目のクロック信号が与えられた時、信号処理部114sは、Y1(1)からY1(63)までの、63個の線形和信号を保持している。 First, consider the period from the first clock signal to the 63rd clock signal. The signal processing unit 114s acquires the linear sum signal Y1 (t) in the t-th clock signal that satisfies 1 ≦ t ≦ 63. When the 63rd clock signal is given, the signal processing unit 114s holds 63 linear sum signals from Y1 (1) to Y1 (63).
 以降、信号処理部114sが保持している63個の線形和信号を、出力信号YM(j)として表す。jは、1≦j≦Nを満たす整数であり、ここでは、1≦j≦63である。信号処理部は、出力信号YM(j)を、内積演算部115sに与える。 Hereinafter, the 63 linear sum signals held by the signal processing unit 114s are expressed as output signals YM (j). j is an integer satisfying 1 ≦ j ≦ N, and here 1 ≦ j ≦ 63. The signal processing unit provides the output signal YM (j) to the inner product calculation unit 115s.
 63回目のクロック信号が与えられた時点において、線形和信号の更新は行われていないため、YM(j)=Y1(j)である。以降、信号処理部114sにおいて、K=10として設定されている場合を考える。 Since the update of the linear sum signal has not been performed at the time when the 63rd clock signal is given, YM (j) = Y1 (j). Hereinafter, a case where K = 10 is set in the signal processing unit 114s will be considered.
 次に、28回目のクロック信号から100回目のクロック信号までの期間において、センスラインSL1とドライブラインDL11との交点の付近に、タッチパネル120sに対する入力が与えられている場合を例示する。 Next, the case where the input to the touch panel 120s is given near the intersection of the sense line SL1 and the drive line DL11 in the period from the 28th clock signal to the 100th clock signal is illustrated.
 この場合、28回目のクロック信号から100回目のクロック信号までの期間において、静電容量C1,11の値は、2.2pF(=C)から2.0pF(=C+ΔC)に置き換えられる。 In this case, during the period from the 28th clock signal to the 100th clock signal, the values of the capacitances C1 and C11 are replaced from 2.2 pF (= C) to 2.0 pF (= C + ΔC).
 図3の(a)~(h)に、それぞれの所定のクロック信号のタイミングにおいて取得された出力信号YM(j)の値(すなわち、YM(1)~YM(63)の値)を表すグラフを示す。横軸は、整数jの値を示している。縦軸は、出力信号YM(j)の値を示している。なお、出力信号YM(j)は、電圧(V)を単位とする物理量である。 3A to 3H are graphs showing the values of the output signals YM (j) (that is, the values of YM (1) to YM (63)) acquired at the timing of each predetermined clock signal. Indicates. The horizontal axis indicates the value of the integer j. The vertical axis indicates the value of the output signal YM (j). The output signal YM (j) is a physical quantity with the voltage (V) as a unit.
 図3の(a)は、63回目のクロック信号が与えられた時点における出力信号YM(j)の値を示す。そして、1≦j≦27の範囲(すなわち、タッチパネル120sに対する入力が与えられていない期間)において、Y1(j)=0であるから、YM(j)=0である。 (A) of FIG. 3 shows the value of the output signal YM (j) when the 63rd clock signal is given. Then, in the range of 1 ≦ j ≦ 27 (that is, the period when the input to the touch panel 120s is not given), Y1 (j) = 0, so YM (j) = 0.
 図3の(b)は、73回目のクロック信号が与えられた時点における出力信号YM(j)の値を示す。64≦j≦73の範囲において、YM(j-63)=Y1(j)として、出力信号YM(j)が線形和信号Y1(j-63)によって更新されている。 (B) of FIG. 3 shows the value of the output signal YM (j) when the 73rd clock signal is given. In the range of 64 ≦ j ≦ 73, the output signal YM (j) is updated by the linear sum signal Y1 (j−63) as YM (j−63) = Y1 (j).
 そして、64≦j≦73の範囲(すなわち、タッチパネル120sに対する入力が与えられている期間)において、Y1(j)≠0であるから、YM(j-63)≠0である。従って、(j-63)をjに置換することにより、1≦j≦10の範囲において、YM(j)≠0であることがいえる。それゆえ、YM(j)=0となるjの範囲は、11≦j≦27となる。 In the range of 64 ≦ j ≦ 73 (that is, the period when the input to the touch panel 120s is given), Y1 (j) ≠ 0, so YM (j−63) ≠ 0. Therefore, by replacing (j-63) with j, it can be said that YM (j) ≠ 0 in the range of 1 ≦ j ≦ 10. Therefore, the range of j where YM (j) = 0 is 11 ≦ j ≦ 27.
 図3の(c)は、83回目のクロック信号が与えられた時点における出力信号YM(j)の値を示す。74≦j≦83の範囲において、YM(j-63)=Y1(j)として、出力信号YM(j)が線形和信号Y1(j-63)によって更新されている。 (C) of FIG. 3 shows the value of the output signal YM (j) when the 83rd clock signal is given. In the range of 74 ≦ j ≦ 83, the output signal YM (j) is updated by the linear sum signal Y1 (j−63) as YM (j−63) = Y1 (j).
 そして、74≦j≦83の範囲(すなわち、タッチパネル120sに対する入力が与えられている期間)において、Y1(j)≠0であるから、YM(j-63)≠0である。従って、(j-63)をjに置換することにより、11≦j≦20の範囲において、YM(j)≠0である。それゆえ、YM(j)=0となるjの範囲は、21≦j≦27となる。 And, in the range of 74 ≦ j ≦ 83 (that is, the period when the input to the touch panel 120s is given), Y1 (j) ≠ 0, so YM (j−63) ≠ 0. Therefore, by replacing (j−63) with j, YM (j) ≠ 0 in the range of 11 ≦ j ≦ 20. Therefore, the range of j where YM (j) = 0 is 21 ≦ j ≦ 27.
 図3の(d)は、93回目のクロック信号が与えられた時点における出力信号YM(j)の値を示す。84≦j≦93の範囲において、YM(j-63)=Y1(j)として、出力信号YM(j)が線形和信号Y1(j-63)によって更新されている。 (D) of FIG. 3 shows the value of the output signal YM (j) at the time when the 93rd clock signal is given. In the range of 84 ≦ j ≦ 93, the output signal YM (j) is updated by the linear sum signal Y1 (j−63) as YM (j−63) = Y1 (j).
 そして、84≦j≦93の範囲(すなわち、タッチパネル120sに対する入力が与えられている期間)において、Y1(j)≠0であるから、YM(j-63)≠0である。従って、(j-63)をjに置換することにより、21≦j≦30の範囲において、YM(j)≠0である。それゆえ、YM(j)=0となるjの範囲は、存在していない。 In the range of 84 ≦ j ≦ 93 (that is, the period when the input to the touch panel 120s is given), Y1 (j) ≠ 0, so YM (j−63) ≠ 0. Therefore, by replacing (j−63) with j, YM (j) ≠ 0 in the range of 21 ≦ j ≦ 30. Therefore, there is no j range where YM (j) = 0.
 図3の(e)は、103回目のクロック信号が与えられた時点における出力信号YM(j)の値を示す。94≦j≦103の範囲において、YM(j-63)=Y1(j)として、出力信号YM(j)が線形和信号Y1(j-63)によって更新されている。 (E) of FIG. 3 shows the value of the output signal YM (j) when the 103rd clock signal is given. In the range of 94 ≦ j ≦ 103, the output signal YM (j) is updated by the linear sum signal Y1 (j−63) as YM (j−63) = Y1 (j).
 そして、94≦j≦99の範囲(すなわち、タッチパネル120sに対する入力が与えられている期間)において、Y1(j)≠0であるから、YM(j-63)≠0である。従って、(j-63)をjに置換することにより、31≦j≦36の範囲において、YM(j)≠0である。 In the range of 94 ≦ j ≦ 99 (that is, the period when the input to the touch panel 120s is given), Y1 (j) ≠ 0, so YM (j−63) ≠ 0. Therefore, by replacing (j−63) with j, YM (j) ≠ 0 in the range of 31 ≦ j ≦ 36.
 他方、100≦j≦103の範囲(すなわち、タッチパネル120sに対する入力が与えられていない期間)において、Y1(j)=0であるから、YM(j-63)=0である。従って、(j-63)をjに置換することにより、37≦j≦40の範囲において、YM(j)=0である。 On the other hand, YM (j−63) = 0 because Y1 (j) = 0 in the range of 100 ≦ j ≦ 103 (that is, the period when the input to the touch panel 120s is not given). Therefore, by replacing (j−63) with j, YM (j) = 0 within the range of 37 ≦ j ≦ 40.
 図3の(f)は、113回目のクロック信号が与えられた時点における出力信号YM(j)の値を示す。104≦j≦113の範囲において、YM(j-63)=Y1(j)として、出力信号YM(j)が線形和信号Y1(j-63)によって更新されている。 (F) in FIG. 3 shows the value of the output signal YM (j) when the 113th clock signal is given. In the range of 104 ≦ j ≦ 113, the output signal YM (j) is updated by the linear sum signal Y1 (j−63) as YM (j−63) = Y1 (j).
 そして、104≦j≦113の範囲(すなわち、タッチパネル120sに対する入力が与えられていない期間)において、Y1(j)=0であるから、YM(j-63)=0である。従って、(j-63)をjに置換することにより、41≦j≦50の範囲において、YM(j)=0である。それゆえ、YM(j)=0となるjの範囲は、37≦j≦50となる。 In the range of 104 ≦ j ≦ 113 (that is, a period when no input is given to the touch panel 120s), Y1 (j) = 0, so YM (j−63) = 0. Therefore, by replacing (j−63) with j, YM (j) = 0 in the range of 41 ≦ j ≦ 50. Therefore, the range of j where YM (j) = 0 is 37 ≦ j ≦ 50.
 図3の(g)は、123回目のクロック信号が与えられた時点における出力信号YM(j)の値を示す。114≦j≦123の範囲において、YM(j-63)=Y1(j)として、出力信号YM(j)が線形和信号Y1(j-63)によって更新されている。 (G) in FIG. 3 shows the value of the output signal YM (j) at the time when the 123rd clock signal is given. In the range of 114 ≦ j ≦ 123, the output signal YM (j) is updated by the linear sum signal Y1 (j−63) as YM (j−63) = Y1 (j).
 そして、114≦j≦123の範囲(すなわち、タッチパネル120sに対する入力が与えられていない期間)において、Y1(j)=0であるから、YM(j-63)=0である。従って、(j-63)をjに置換することにより、51≦j≦60の範囲において、YM(j)=0である。それゆえ、YM(j)=0となるjの範囲は、37≦j≦60となる。 In the range of 114 ≦ j ≦ 123 (that is, a period when no input is given to the touch panel 120s), Y1 (j) = 0, so YM (j−63) = 0. Therefore, by replacing (j−63) with j, YM (j) = 0 in the range of 51 ≦ j ≦ 60. Therefore, the range of j where YM (j) = 0 is 37 ≦ j ≦ 60.
 図3の(f)は、126回目のクロック信号が与えられた時点における出力信号YM(j)の値を示す。124≦j≦126の範囲において、YM(j-63)=Y1(j)として、出力信号YM(j)が線形和信号Y1(j-63)によって更新されている。 (F) in FIG. 3 shows the value of the output signal YM (j) when the 126th clock signal is given. In the range of 124 ≦ j ≦ 126, the output signal YM (j) is updated by the linear sum signal Y1 (j−63) as YM (j−63) = Y1 (j).
 そして、124≦j≦126の範囲(すなわち、タッチパネル120sに対する入力が与えられていない期間)において、Y1(j)=0であるから、YM(j-63)=0である。従って、(j-63)をjに置換することにより、61≦j≦63の範囲において、YM(j)≠0である。それゆえ、YM(j)=0となるjの範囲は、37≦j≦63となる。 In the range of 124 ≦ j ≦ 126 (that is, the period when no input is given to the touch panel 120s), Y1 (j) = 0, so YM (j−63) = 0. Therefore, by replacing (j−63) with j, YM (j) ≠ 0 in the range of 61 ≦ j ≦ 63. Therefore, the range of j where YM (j) = 0 is 37 ≦ j ≦ 63.
 図4の(a)~(h)に、それぞれの所定のクロック信号のタイミングにおいて算出された静電容量の差の推定値を表すグラフを示す。横軸は、静電容量の差(C1,1-C2,1)から、静電容量の差(C1,18-C2,18)までの、18通りの静電容量の差のそれぞれを示している。縦軸は、横軸に対応するそれぞれの静電容量の差の推定値を、静電容量(pF)を単位とする物理量として示している。 (A) to (h) of FIG. 4 are graphs showing estimated values of the difference in capacitance calculated at the timing of each predetermined clock signal. The horizontal axis shows each of the 18 types of capacitance differences from the capacitance difference (C1, 1-C2, 1) to the capacitance difference (C1, 18-C2, 18). Yes. The vertical axis shows the estimated value of the difference in capacitance corresponding to the horizontal axis as a physical quantity in units of capacitance (pF).
 以降、各クロック信号のタイミングにおいて、信号処理部114sから与えられた出力信号YM(1)~YM(63)に基づき、内積演算部115sによる計算の結果得られた静電容量の差(C1,1-C2,1)の推定値に着目する。 Thereafter, at the timing of each clock signal, based on the output signals YM (1) to YM (63) given from the signal processing unit 114s, the difference in capacitance (C1, C1) obtained as a result of calculation by the inner product calculation unit 115s Focus on the estimated value of 1-C2,1).
 図4の(a)は、63回目のクロック信号が与えられた時点における静電容量の差の推定値の値を示す。静電容量の差(C1,1-C2,1)の推定値は、0.105pFである。 (A) of FIG. 4 shows the estimated value of the difference in capacitance when the 63rd clock signal is given. The estimated value of the difference in capacitance (C1, 1-C2, 1) is 0.105 pF.
 図4の(b)は、73回目のクロック信号が与えられた時点における静電容量の差の推定値の値を示す。静電容量の差(C1,1-C2,1)の推定値は、0.137pFである。 (B) of FIG. 4 shows the estimated value of the difference in capacitance when the 73rd clock signal is given. The estimated value of the difference in capacitance (C1, 1-C2, 1) is 0.137 pF.
 図4の(c)は、83回目のクロック信号が与えられた時点における静電容量の差の推定値の値を示す。静電容量の差(C1,1-C2,1)の推定値は、0.169pFである。 (C) of FIG. 4 shows the estimated value of the difference in capacitance at the time when the 83rd clock signal is given. The estimated value of the difference in capacitance (C1, 1-C2, 1) is 0.169 pF.
 図4の(d)は、93回目のクロック信号が与えられた時点における静電容量の差の推定値の値を示す。静電容量の差(C1,1-C2,1)の推定値は、0.193pFである。 (D) of FIG. 4 shows the estimated value of the difference in capacitance at the time when the 93rd clock signal is given. The estimated value of the difference in capacitance (C1, 1-C2, 1) is 0.193 pF.
 図4の(e)は、103回目のクロック信号が与えられた時点における静電容量の差の推定値の値を示す。静電容量の差(C1,1-C2,1)の推定値は、0.185pFである。 FIG. 4 (e) shows the estimated value of the difference in capacitance when the 103rd clock signal is given. The estimated value of the difference in capacitance (C1,1-C2,1) is 0.185 pF.
 図4の(f)は、113回目のクロック信号が与えられた時点における静電容量の差の推定値の値を示す。静電容量の差(C1,1-C2,1)の推定値は、0.154pFである。 (F) of FIG. 4 shows the estimated value of the difference in capacitance at the time when the 113th clock signal is given. The estimated value of the difference in capacitance (C1, 1-C2, 1) is 0.154 pF.
 図4の(g)は、123回目のクロック信号が与えられた時点における静電容量の差の推定値の値を示す。静電容量の差(C1,1-C2,1)の推定値は、0.123pFである。 (G) of FIG. 4 shows the estimated value of the difference in capacitance at the time when the 123rd clock signal is given. The estimated value of the difference in capacitance (C1, 1-C2, 1) is 0.123 pF.
 図4の(h)は、126回目のクロック信号が与えられた時点における静電容量の差の推定値の値を示す。静電容量の差(C1,1-C2,1)の推定値は、0.114pFである。 (H) of FIG. 4 shows the estimated value of the difference in capacitance when the 126th clock signal is given. The estimated value of the difference in capacitance (C1, 1-C2, 1) is 0.114 pF.
 内積演算部115sは、図4の(a)~(h)のそれぞれに示された、18通りの静電容量の差の推定値を、推定値評価部116sに与える。そして、推定値評価部116sは、それぞれのクロック信号のタイミングにおける、18通りの静電容量の差の推定値の標準偏差を算出する。 The inner product calculation unit 115s gives the estimated values of the 18 differences in capacitance shown in each of (a) to (h) of FIG. 4 to the estimated value evaluation unit 116s. Then, the estimated value evaluating unit 116s calculates the standard deviation of the estimated values of the 18 different capacitance differences at the timing of each clock signal.
 図4の(a)に示された、63回目のクロック信号が与えられた時点における静電容量の差の推定値の標準偏差は、0.0125pFである。 The standard deviation of the estimated value of the difference in capacitance at the time when the 63rd clock signal is given as shown in FIG. 4 (a) is 0.0125 pF.
 図4の(b)に示された、73回目のクロック信号が与えられた時点における静電容量の差の推定値の標準偏差は、0.0121pFである。 The standard deviation of the estimated value of the difference in capacitance when the 73rd clock signal is given as shown in FIG. 4B is 0.0121 pF.
 図4の(c)に示された、83回目のクロック信号が与えられた時点における静電容量の差の推定値の標準偏差は、0.0083pFである。 4 (c), the standard deviation of the estimated value of the difference in capacitance at the time when the 83rd clock signal is given is 0.0083 pF.
 図4の(d)に示された、93回目のクロック信号が与えられた時点における静電容量の差の推定値の標準偏差は、0.000pFである。 4 (d), the standard deviation of the estimated value of the difference in capacitance when the 93rd clock signal is given is 0.000 pF.
 図4の(e)に示された、103回目のクロック信号が与えられた時点における静電容量の差の推定値の標準偏差は、0.003pFである。 The standard deviation of the estimated value of the difference in capacitance at the time when the 103rd clock signal is given as shown in (e) of FIG. 4 is 0.003 pF.
 図4の(f)に示された、113回目のクロック信号が与えられた時点における静電容量の差の推定値の標準偏差は、0.0094pFである。 The standard deviation of the estimated value of the difference in capacitance at the time when the 113th clock signal shown in FIG. 4 (f) is given is 0.0094 pF.
 図4の(g)に示された、123回目のクロック信号が与えられた時点における静電容量の差の推定値の標準偏差は、0.0103pFである。 4 (g), the standard deviation of the estimated value of the difference in capacitance when the 123rd clock signal is given is 0.0103 pF.
 図4の(h)に示された、126回目のクロック信号が与えられた時点における静電容量の差の推定値の標準偏差は、0.0109pFである。 4 (h), the standard deviation of the estimated value of the difference in capacitance at the time when the 126th clock signal is given is 0.0109 pF.
 推定値評価部116sは、64回目から126回目までのクロック信号が与えられた時点における、それぞれの静電容量の差の推定値の標準偏差の大きさを比較する。 The estimated value evaluating unit 116s compares the standard deviations of the estimated values of the difference in capacitance between the 64th and 126th clock signals.
 そして、推定値評価部116sは、静電容量の差の推定値の標準偏差が最小となる、93回目のクロック信号が与えられた時点における静電容量の差の推定値を、64回目から126回目までの、63回のクロック信号が与えられた時点における静電容量の差の推定値の代表値として決定する。 Then, the estimated value evaluating unit 116s obtains the estimated value of the difference in capacitance from the 64th time to the 126th time when the 93rd clock signal is given, in which the standard deviation of the estimated value of the difference in capacitance is minimized. It is determined as a representative value of the estimated value of the difference in capacitance when the clock signal is given 63 times until the first time.
 すなわち、推定値評価部116sは、93回目のクロック信号が与えられた時点における静電容量の差の推定値(C1,1-C2,1)=0.193pFを、64回目から126回目までの、63回のクロック信号が与えられた時点における静電容量の差の推定値の代表値として決定する。 That is, the estimated value evaluating unit 116s sets the estimated value (C1, 1−C2, 1) = 0.193 pF of the difference in capacitance when the 93rd clock signal is given from the 64th to the 126th time. , 63 as the representative value of the estimated value of the difference in capacitance at the time when the clock signal is given 63 times.
 すなわち、推定値評価部116sは、64回目から126回目までの、63回のクロック信号が与えられた時点における静電容量の差の推定値は、93回目のクロック信号が与えられた時点における静電容量の差の推定値(C1,1-C2,1)=0.193pFであるとして決定する。 In other words, the estimated value evaluating unit 116s determines the electrostatic capacitance difference estimated value when the 63rd clock signal is given from the 64th time to the 126th time as the static value when the 93rd clock signal is given. It is determined that the estimated value of the difference in electric capacity is (C1,1-C2,1) = 0.193 pF.
 なお、推定値評価部116sは、所定の静電容量閾値TC(例えば、±0.05pF)以下の静電容量の推定値についてのみ、標準偏差を算出してもよい。静電容量閾値TCは、タッチパネルシステム100においてあらかじめ定められた固有の値であってもよいし、タッチパネルシステム100の外部に設けられたプロセッサ等(例えば、後述の図5のCPU310)によって変更可能な値であってもよい。 Note that the estimated value evaluating unit 116s may calculate the standard deviation only for the estimated value of the capacitance that is equal to or less than a predetermined capacitance threshold value TC (for example, ± 0.05 pF). Capacitance threshold TC may be a specific value determined in advance in touch panel system 100, or may be changed by a processor or the like provided outside touch panel system 100 (for example, CPU 310 in FIG. 5 described later). It may be a value.
 また、1回目から63回目までのクロック信号が与えられた時点においては、10回ごとの出力信号YM(j)の更新が行われていない。このため、推定値評価部116sは、63回目のクロック信号が与えられた時点における静電容量の差の推定値を、1回目から63回目までのクロック信号が与えられた時点における静電容量の差の推定値の代表値として決定する。 Further, at the time when the first to 63rd clock signals are given, the output signal YM (j) is not updated every 10 times. For this reason, the estimated value evaluation unit 116s obtains the estimated value of the difference in capacitance at the time when the 63rd clock signal is given as the capacitance at the time when the first to 63rd clock signals are given. Determined as a representative value of the difference estimate
 すなわち、推定値評価部116sは、1回目から63回目までの、63回のクロック信号が与えられた時点における静電容量の差の推定値の代表値を、(C1,1-C2,1)=0.105pFと決定する。 That is, the estimated value evaluating unit 116s obtains a representative value of the estimated value of the difference in capacitance at the time when 63 clock signals are given from the first time to the 63rd time as (C1, 1-C2, 1). = 0.105 pF.
 上述のようにして、タッチパネルシステム100において、系列長N=63の符号系列に基づく静電容量の推定を、より高精度に行うことができる。 As described above, in the touch panel system 100, it is possible to estimate the capacitance based on the code sequence of the sequence length N = 63 with higher accuracy.
 〔変形例〕
 実施形態1では、標準偏差が最小となる静電容量の推定値が、静電容量の推定値の代表値として用いられている。これに対して、静電容量の推定値の代表値として、静電容量の推定値の平均値を用いてもよい。
[Modification]
In the first embodiment, the estimated value of the capacitance that minimizes the standard deviation is used as the representative value of the estimated value of the capacitance. On the other hand, an average value of the estimated capacitance value may be used as a representative value of the estimated capacitance value.
 例えば、64回目から126回目までの静電容量の推定値の代表値として、73回目、83回目、93回目、103回目、113回目、123回目、126回目のクロック信号が与えられた時点における静電容量の推定値の平均値を用いることができる。 For example, as representative values of the estimated capacitance values from the 64th time to the 126th time, the static at the time when the 73rd, 83rd, 93rd, 103rd, 113th, 123rd, 126th clock signals are given. An average value of the estimated capacitance can be used.
 この場合、静電容量の推定値の代表値(C1,11-C2,11)の値は、0.154pFとなる。また、静電容量の推定値の平均値の標準偏差は、0.003pFとなる。 In this case, the representative value of the estimated capacitance value (C1, 11-C2, 11) is 0.154 pF. Further, the standard deviation of the average value of the estimated capacitance value is 0.003 pF.
 静電容量の推定値の平均値の標準偏差(0.003pF)は、実施形態1に示された126回目のクロック信号が与えられた時点における静電容量の値の標準偏差(0.0109pF)よりも小さい。すなわち、静電容量の推定値の平均値を、静電容量の推定値の代表値として選択することにより、さらに正確な静電容量の値が推定され得る。 The standard deviation (0.003 pF) of the average value of the estimated capacitance value is the standard deviation (0.0109 pF) of the capacitance value when the 126th clock signal shown in the first embodiment is given. Smaller than. That is, by selecting the average value of the estimated capacitance values as the representative value of the estimated capacitance value, a more accurate capacitance value can be estimated.
 また、実施形態1では、系列長Nの回数と等しいクロックごとの静電容量の推定値を、タッチパネルシステム100sの出力としている。これに対して、K回のクロックごとの静電容量の推定値を、タッチパネルシステム100sの出力とする構成としてもよい。 In the first embodiment, the estimated value of the capacitance for each clock equal to the number of series length N is used as the output of the touch panel system 100s. On the other hand, it is good also as a structure which uses the estimated value of the electrostatic capacitance for every K times of clock as an output of the touch panel system 100s.
 上述の構成により、タッチパネルシステム100sは、系列長Nよりも少ない回数Kのクロックごとに、静電容量の推定値を出力する。このため、上述の構成を有するタッチパネルシステム100sは、時間変化が速い信号(例えば、素早いタッチ入力)に対応することができる。 With the above-described configuration, the touch panel system 100 s outputs an estimated value of the capacitance every clock K times the sequence length N. For this reason, the touch panel system 100 s having the above-described configuration can cope with a signal (for example, a quick touch input) whose time change is fast.
 上述の効果について、特許文献1に開示されたタッチパネルシステム1000との比較に基づき説明を行う。特許文献1に開示されたタッチパネルシステム1000では、N回のドライブラインの駆動ごとに、静電容量推定値が算出されていた。 The above effect will be described based on a comparison with the touch panel system 1000 disclosed in Patent Document 1. In the touch panel system 1000 disclosed in Patent Document 1, an estimated capacitance value is calculated every time the drive line is driven N times.
 すなわち、タッチパネルシステム1000では、はじめに、N回のドライブラインの駆動によって得られた、N個の線形和信号S1,1、S1,2、S1,3、…、S1,(N-1)、S1,Nに基づき、静電容量推定値が算出される。 That is, in the touch panel system 1000, first, N linear sum signals S1,1, S1,2, S1,3,..., S1, (N−1), S1 obtained by driving the drive line N times. , N, an estimated capacitance value is calculated.
 そして、続くN回のドライブラインの駆動によって得られた、N個の線形和信号S2,1、S2,2、S2,3、…、S2,(N-1)、S2,Nに基づき、次の静電容量推定値が算出される。 Then, based on the N linear sum signals S2,1, S2,2, S2,3,..., S2, (N-1), S2, N obtained by driving the drive line N times, The estimated capacitance value is calculated.
 これに対して、実施形態1のタッチパネルシステム100sにおいて、例えば、K=1とした場合を考える。 On the other hand, in the touch panel system 100s of the first embodiment, for example, consider a case where K = 1.
 タッチパネルシステム100sでは、はじめに、N回のドライブラインの駆動によって得られた、N個の線形和信号S1,1、S1,2、S1,3、…、S1,(N-1)、S1,Nが保持される。 In the touch panel system 100s, first, N linear sum signals S1,1, S1,2, S1,3,..., S1, (N−1), S1, N obtained by driving the drive line N times. Is retained.
 そして、次の1回のドライブラインの駆動によって得られた、1つの最新の線形和信号S2,1によって、すでに保持した1つの線形和信号S1,1が更新される。そして、N個の線形和信号S2,1、S1,2、S1,3、…、S1,(N-1)、S1,Nに基づき、次の静電容量推定値が算出される。 The already held linear sum signal S1,1 is updated by one latest linear sum signal S2,1 obtained by the next drive line drive. Then, the next estimated capacitance value is calculated based on the N linear sum signals S2,1, S1,2, S1,3,..., S1, (N-1), S1, N.
 従って、タッチパネルシステム100sでは、1回のドライブラインの駆動ごとに、静電容量推定値が算出される。このため、実施形態1のタッチパネルシステム100sによれば、特許文献1に開示されたタッチパネルシステム1000に比べて、さらに時間変化が速い信号に対応することができる。 Therefore, in the touch panel system 100s, an estimated capacitance value is calculated for each driving of the drive line. For this reason, according to the touch panel system 100 s of the first embodiment, it is possible to cope with a signal that changes more rapidly than the touch panel system 1000 disclosed in Patent Document 1.
 また、実施形態1では、信号処理部114sは、N個の線形和信号を保持し、K回のクロックごとにK個の線形和信号を更新している。これに対して、信号処理部114sが、N個よりも多くの線形和信号を保持し、そのうちのN個の線形和信号を内積演算部115sに与える構成としてもよい。 In the first embodiment, the signal processing unit 114s holds N linear sum signals and updates K linear sum signals every K clocks. On the other hand, the signal processing unit 114s may hold more than N linear sum signals and give N linear sum signals to the inner product operation unit 115s.
 また、実施形態1では、K=10のケースについて例示されているが、Kの値は、タッチパネルシステム100または100sの仕様に応じて、適宜選択されてよい。 In the first embodiment, the case of K = 10 is exemplified, but the value of K may be appropriately selected according to the specification of the touch panel system 100 or 100s.
 Kの値を小さくした場合、信号処理部114sにおける線形和信号の更新が、より高頻度に行われる。従って、タッチパネルシステム100sは、より高速に時間変化する信号に追従することができる。 When the value of K is reduced, the linear sum signal is updated more frequently in the signal processing unit 114s. Accordingly, the touch panel system 100s can follow a signal that changes with time at a higher speed.
 なお、Kの値を小さくした場合、内積演算部115sおよび推定値評価部116sにおいて、より多数の演算回数が必要となる。従って、小さいKの値を選定したタッチパネルシステム100sは、大きい消費電力、多くのメモリ消費量(または、メモリを搭載するための大きい回路面積)を許容可能な、高性能な電子機器に搭載されることが好ましい。 In addition, when the value of K is reduced, the inner product calculation unit 115s and the estimated value evaluation unit 116s require a larger number of calculations. Therefore, the touch panel system 100s with a small K value selected is mounted on a high-performance electronic device that can tolerate large power consumption and a large amount of memory consumption (or a large circuit area for mounting a memory). It is preferable.
 他方、Kの値を大きくした場合、タッチパネルシステム100sの信号に対する追従性は低下するものの、内積演算部115sおよび推定値評価部116sにおいて必要とされる演算回数が低減されるという利点が得られる。 On the other hand, when the value of K is increased, the followability to the signal of the touch panel system 100s is reduced, but there is an advantage that the number of calculations required in the inner product calculation unit 115s and the estimated value evaluation unit 116s is reduced.
 従って、大きいKの値を選定したタッチパネルシステム100sは、小さい消費電力、少ないメモリ消費量(または、メモリを搭載するための少ない回路面積)によって駆動される、高い性能が特に要求されない電子機器に搭載されることが好ましい。 Accordingly, the touch panel system 100s with a large K value selected is mounted on an electronic device that is driven by low power consumption and low memory consumption (or a small circuit area for mounting a memory) and does not particularly require high performance. It is preferred that
 このため、タッチパネルシステム100sにおいて、信号に対する追従性と、要求される性能とのトレードオフを考慮し、Kの値を選定することが好ましい。 For this reason, in the touch panel system 100s, it is preferable to select a value of K in consideration of a trade-off between signal followability and required performance.
 特に、「0<K<N/2」の範囲において、Kの値を選定することが好ましい。これは、「0<K<N/2」とすれば、信号処理部114sにおいて、出力信号において、更新された線形和信号の一部が、次の更新においてさらに更新されるという状況が発生しないためである。 In particular, it is preferable to select a value of K in the range of “0 <K <N / 2”. This is because if “0 <K <N / 2”, the signal processing unit 114 s does not cause a situation in which part of the updated linear sum signal is further updated in the next update in the output signal. Because.
 また、実施形態1では、M系列符号に基づく符号系列が用いられている。M系列符号によれば、直列に接続されたシフトレジスタを用いることにより、符号系列を容易に生成することができる。このため、M系列符号を用いた場合、符号系列を生成するための回路を容易に構成できるという利点がある。 In the first embodiment, a code sequence based on the M sequence code is used. According to the M-sequence code, a code sequence can be easily generated by using a shift register connected in series. For this reason, when an M-sequence code is used, there is an advantage that a circuit for generating a code sequence can be easily configured.
 他方、実施形態1において、M系列符号以外に基づいて符号系列が生成されてもよい。例えば、ウォルシュ(Walsh)符号またはアダマール(Hadamard)符号に基づいて、符号系列が生成されてもよい。 On the other hand, in Embodiment 1, a code sequence may be generated based on other than the M sequence code. For example, a code sequence may be generated based on a Walsh code or a Hadamard code.
 ウォルシュ符号またはアダマール符号を用いた場合、生成された符号系列は、符号間の相関が0であるという性質を有している。なお、M系列符号に基づく符号系列において、符号間の相関は0ではない。 When a Walsh code or Hadamard code is used, the generated code sequence has a property that the correlation between codes is zero. In the code sequence based on the M sequence code, the correlation between codes is not zero.
 このため、ウォルシュ符号またはアダマール符号に基づく符号系列が用いられることにより、各ドライブラインの信号に、別のドライブラインの信号に起因する誤差が含まれず、各種演算の精度をさらに向上させることができるという利点がある。 For this reason, by using a code sequence based on Walsh code or Hadamard code, each drive line signal does not include an error caused by another drive line signal, and the accuracy of various calculations can be further improved. There is an advantage.
 なお、ウォルシュ符号またはアダマール符号が用いられた場合、M系列符号が用いられた場合とは異なり、シフトレジスタを用いて容易に符号系列を生成することができない。このため、符号系列の各成分を格納するためのメモリがさらに必要となり、符号を生成するための回路面積の増大が要求される。 Note that when a Walsh code or Hadamard code is used, a code sequence cannot be easily generated using a shift register, unlike when an M-sequence code is used. For this reason, a memory for storing each component of the code sequence is further required, and an increase in circuit area for generating the code is required.
 従って、ウォルシュ符号またはアダマール符号に基づく符号系列が用いられるタッチパネルシステム100sは、多くのメモリ消費量(または、メモリを搭載するための大きい回路面積)を許容可能な、高性能な電子機器に搭載されることが好ましい。 Accordingly, the touch panel system 100s using the code sequence based on the Walsh code or the Hadamard code is mounted on a high-performance electronic device that can tolerate a large amount of memory consumption (or a large circuit area for mounting the memory). It is preferable.
 他方、M系列符号に基づく符号系列が用いられるタッチパネルシステム100sは、少ないメモリ消費量(または、メモリを搭載するための少ない回路面積)によって駆動される、高い性能が特に要求されない電子機器に搭載されることが好ましい。 On the other hand, the touch panel system 100s using a code sequence based on an M-sequence code is mounted on an electronic device that is driven by a small memory consumption (or a small circuit area for mounting a memory) and does not particularly require high performance. It is preferable.
 また、実施形態1において、線形和出力を増幅する増幅器としては、差動増幅器(例えば、差動増幅器112a、112b、112s)が用いられている。これに対して、実施形態1において、増幅器として、シングルエンドの増幅器を用いてもよい。 In the first embodiment, a differential amplifier (for example, differential amplifiers 112a, 112b, and 112s) is used as an amplifier that amplifies the linear sum output. In contrast, in the first embodiment, a single-ended amplifier may be used as the amplifier.
 また、実施形態1に記載のタッチパネルコントローラ110または110sを含んだ集積回路も、本発明の技術的範囲に含まれる。従って、実施形態1に記載のタッチパネルコントローラ110または110sは、IC(Integrated Circuit)チップ等の集積回路によって実現されてもよい。 An integrated circuit including the touch panel controller 110 or 110s described in the first embodiment is also included in the technical scope of the present invention. Therefore, the touch panel controller 110 or 110s described in the first embodiment may be realized by an integrated circuit such as an IC (Integrated Circuit) chip.
 〔実施形態2〕
 本発明の他の実施形態について、図5に基づいて説明すれば、以下の通りである。なお、説明の便宜上、前記実施形態にて説明した部材と同じ機能を有する部材については、同じ符号を付記し、その説明を省略する。図5は、実施形態1に記載のタッチパネルシステム100を備えた電子機器の一例としての携帯電話機300(電子機器)の構成を示す機能ブロック図である。
[Embodiment 2]
The following will describe another embodiment of the present invention with reference to FIG. For convenience of explanation, members having the same functions as those described in the embodiment are given the same reference numerals, and descriptions thereof are omitted. FIG. 5 is a functional block diagram illustrating a configuration of a mobile phone 300 (electronic device) as an example of an electronic device including the touch panel system 100 described in the first embodiment.
 携帯電話機300は、CPU(Central Processing Unit)310、カメラ313、マイクロフォン314、スピーカ315、操作部316、表示パネル318、表示制御回路309、ROM(Read Only Memory)311、RAM(Random Access Memory)312、およびタッチパネルシステム100を備えている。 The mobile phone 300 includes a CPU (Central Processing Unit) 310, a camera 313, a microphone 314, a speaker 315, an operation unit 316, a display panel 318, a display control circuit 309, a ROM (Read Only Memory) 311, and a RAM (Random Access Memory) 312. , And a touch panel system 100.
 携帯電話機300が備える各構成要素は、相互にデータバスによって接続されている。なお、図6には示されていないが、携帯電話機300が、他の電子機器に有線により接続するためのインターフェースを備える構成としてもよい。 Each component included in the mobile phone 300 is connected to each other by a data bus. Although not shown in FIG. 6, the mobile phone 300 may be configured to include an interface for connecting to another electronic device by wire.
 CPU310は、携帯電話機300の動作を制御する。CPU310は、たとえばROM311に格納されたプログラムを実行する。操作部316は、携帯電話機300のユーザによる指示の入力を受け付ける入力デバイスであり、例えば各種の操作キーまたはボタンである。 CPU 310 controls the operation of mobile phone 300. CPU 310 executes a program stored in ROM 311, for example. The operation unit 316 is an input device that receives an instruction input by the user of the mobile phone 300, and is, for example, various operation keys or buttons.
 ROM311は、EPROM(Erasable Programmable ROM)やフラッシュメモリなどの書込みおよび消去が可能なROMであり、データを不揮発的に格納する。RAM312は、CPU310によるプログラムの実行により生成されたデータ、または操作部316を介して入力されたデータを揮発的に格納する。 The ROM 311 is a ROM capable of writing and erasing such as an EPROM (Erasable Programmable ROM) and a flash memory, and stores data in a nonvolatile manner. The RAM 312 volatilely stores data generated by execution of a program by the CPU 310 or data input via the operation unit 316.
 カメラ313は、ユーザによる操作部316の操作に応じて、被写体を撮影する。なお、撮影された被写体の画像データは、RAM312または外部メモリ(例えば、メモリカード)に格納される。 The camera 313 captures a subject in accordance with the operation of the operation unit 316 by the user. The image data of the photographed subject is stored in the RAM 312 or an external memory (for example, a memory card).
 マイクロフォン314は、ユーザの音声の入力を受付ける。携帯電話機300は、当該入力されたアナログデータとしての音声信号をデジタル化する。そして、携帯電話機300は、通信対象(例えば、他の携帯電話機)に、デジタル化信号としての音声信号を送る。スピーカ315は、例えば、RAM312に記憶された音楽データ等に基づき、アナログ信号としての音声信号を出力する。 The microphone 314 receives user's voice input. The mobile phone 300 digitizes the input audio signal as analog data. Then, the cellular phone 300 sends an audio signal as a digitized signal to a communication target (for example, another cellular phone). The speaker 315 outputs an audio signal as an analog signal based on, for example, music data stored in the RAM 312.
 表示パネル318は、表示制御回路309により、ROM311、RAM312に格納されている画像を表示する。表示パネル318は、タッチパネル120に重ねられていてもよいし、または、タッチパネル120を内蔵していてもよい。なお、タッチパネルコントローラ110において生成されたタッチパネル120上のタッチ位置を示すタッチ認識信号に、操作部316が操作されたことを示す信号と同じ役割を持たせることもできる。 The display panel 318 displays images stored in the ROM 311 and the RAM 312 by the display control circuit 309. The display panel 318 may be overlaid on the touch panel 120 or may incorporate the touch panel 120. Note that the touch recognition signal indicating the touch position on the touch panel 120 generated by the touch panel controller 110 may have the same role as the signal indicating that the operation unit 316 is operated.
 タッチパネルシステム100は、タッチパネルコントローラ110およびタッチパネル120を有している。タッチパネルシステム100の動作は、CPU310によって制御されている。 The touch panel system 100 includes a touch panel controller 110 and a touch panel 120. The operation of the touch panel system 100 is controlled by the CPU 310.
 なお、デジタル化された線形和信号に基づき、静電容量推定値を決定する処理は、タッチパネルコントローラ110の外部に設けられたCPU310によって実行されてもよい。 Note that the process of determining the capacitance estimation value based on the digitized linear sum signal may be executed by the CPU 310 provided outside the touch panel controller 110.
 すなわち、実施形態1においてタッチパネルコントローラ110が備えていた信号処理部114aおよび114b、内積演算部115aおよび115b、ならびに、推定値評価部116aおよび116bは、CPU310に設けられてもよい。 That is, the signal processing units 114a and 114b, the inner product calculation units 115a and 115b, and the estimated value evaluation units 116a and 116b included in the touch panel controller 110 in the first embodiment may be provided in the CPU 310.
 この場合、タッチパネルコントローラ110は、デジタル化された線形和信号を、AD変換部113aおよび113bから、CPU310に設けられた信号処理部114aおよび114bに与える。 In this case, the touch panel controller 110 provides the digitized linear sum signal from the AD conversion units 113a and 113b to the signal processing units 114a and 114b provided in the CPU 310.
 そして、CPU310は、信号処理部114aおよび114b、内積演算部115aおよび115b、ならびに、推定値評価部116aおよび116bのそれぞれにおいて、実施形態1と同様の処理を行う。 The CPU 310 performs the same processing as that in the first embodiment in each of the signal processing units 114a and 114b, the inner product calculation units 115a and 115b, and the estimated value evaluation units 116a and 116b.
 本実施形態の携帯電話機300は、タッチパネルシステム100を備えていることにより、静電容量を正確に推定することができる。従って、携帯電話機300は、ユーザによる、タッチパネルシステム100に対する入力操作を正確に認識することができる。従って、携帯電話機300は、ユーザが所望する処理を、正確に実行することができる。 The mobile phone 300 according to the present embodiment includes the touch panel system 100, so that the capacitance can be accurately estimated. Therefore, the mobile phone 300 can accurately recognize an input operation performed on the touch panel system 100 by the user. Therefore, the mobile phone 300 can accurately execute the process desired by the user.
 本実施形態において、タッチパネルシステム100を備えた電子機器の一例としての携帯電話機300は、カメラ付き携帯電話機またはスマートフォン等であるが、タッチパネルシステム100を備えた電子機器はこれらに限定されない。例えば、タブレットなどの携帯端末装置や、PCモニタ、サイネージ、電子黒板、インフォメーションディスプレイ等の情報処理装置もまた、タッチパネルシステム100を備えた電子機器に含まれる。 In the present embodiment, the mobile phone 300 as an example of an electronic device including the touch panel system 100 is a mobile phone with a camera or a smartphone, but the electronic device including the touch panel system 100 is not limited thereto. For example, a mobile terminal device such as a tablet and an information processing device such as a PC monitor, signage, an electronic blackboard, and an information display are also included in the electronic device provided with the touch panel system 100.
 〔実施形態3〕
 携帯電話機300の制御ブロック(特にCPU310)は、集積回路(ICチップ)等に形成された論理回路(ハードウェア)によって実現してもよいし、CPUを用いてソフトウェアによって実現してもよい。
[Embodiment 3]
The control block (particularly the CPU 310) of the mobile phone 300 may be realized by a logic circuit (hardware) formed in an integrated circuit (IC chip) or the like, or may be realized by software using a CPU.
 後者の場合、携帯電話機300は、各機能を実現するソフトウェアであるプログラムの命令を実行するCPU、上記プログラムおよび各種データがコンピュータ(またはCPU)で読み取り可能に記録されたROMまたは記憶装置(これらを「記録媒体」と称する)、上記プログラムを展開するRAMなどを備えている。そして、コンピュータ(またはCPU)が上記プログラムを上記記録媒体から読み取って実行することにより、本発明の目的が達成される。上記記録媒体としては、「一時的でない有形の媒体」、例えば、テープ、ディスク、カード、半導体メモリ、プログラマブルな論理回路などを用いることができる。また、上記プログラムは、該プログラムを伝送可能な任意の伝送媒体(通信ネットワークや放送波等)を介して上記コンピュータに供給されてもよい。なお、本発明は、上記プログラムが電子的な伝送によって具現化された、搬送波に埋め込まれたデータ信号の形態でも実現され得る。 In the latter case, the mobile phone 300 includes a CPU that executes instructions of a program that is software that realizes each function, a ROM or a storage device in which the above-described program and various data are recorded so as to be readable by a computer (or CPU). (Referred to as “recording medium”), and a RAM or the like for expanding the program. And the objective of this invention is achieved when a computer (or CPU) reads the said program from the said recording medium and runs it. As the recording medium, a “non-temporary tangible medium” such as a tape, a disk, a card, a semiconductor memory, a programmable logic circuit, or the like can be used. The program may be supplied to the computer via an arbitrary transmission medium (such as a communication network or a broadcast wave) that can transmit the program. The present invention can also be realized in the form of a data signal embedded in a carrier wave in which the program is embodied by electronic transmission.
 〔まとめ〕
 本発明の態様1に係るタッチパネルコントローラ(110)は、系列長N(Nは整数)の符号系列に基づき、M本(Mは2以上の整数)のドライブライン(DL1~DLM)をN回駆動することにより、上記M本のドライブラインと1本のセンスライン(例えば、SL1)との交点にそれぞれ形成されるM個の静電容量(例えば、C1,1~C1,M)に関するN個の線形和信号を、上記センスラインから出力させる駆動部(111)と、上記N個の線形和信号を保持した後、K個(Kは、0<K<Nを満たす整数)の線形和信号を、上記駆動部が上記ドライブラインをK回駆動するごとに得られる最新のK個の線形和信号によって順次に更新することにより、K個の更新後の線形和信号と、(N-K)個の更新前の線形和信号と、からなるN個の出力信号を出力する信号処理部(114a,114b)と、上記N個の出力信号と上記符号系列の内積演算を行うことにより、上記M個の静電容量の値の推定値としての静電容量推定値を算出する内積演算部(115a,115b)と、を備えていることを特徴としている。
[Summary]
The touch panel controller (110) according to the first aspect of the present invention drives M (M is an integer of 2 or more) drive lines (DL1 to DLM) N times based on a code sequence having a sequence length N (N is an integer). By doing so, N pieces of M capacitances (eg, C1, 1 to C1, M) formed at the intersections of the M drive lines and one sense line (eg, SL1), respectively. A drive unit (111) for outputting a linear sum signal from the sense line, and holding the N number of linear sum signals, then K (K is an integer satisfying 0 <K <N). Sequentially updating the drive unit with the latest K linear sum signals obtained each time the drive line is driven K times, so that K updated linear sum signals and (NK) Linear sum signal before update A signal processing unit (114a, 114b) that outputs the output signals, and an inner product operation of the N output signals and the code sequence, thereby obtaining a static value as an estimated value of the M electrostatic capacitance values. And an inner product calculation unit (115a, 115b) for calculating an estimated electric capacity.
 上記の構成によれば、タッチパネルコントローラにおいて、駆動部が系列長Nの符号系列に基づき、M本のドライブラインをN回駆動することによって、M本のドライブラインと1本のセンスラインとの交点にそれぞれ形成されるM個の静電容量に関するN個の線形和信号が、センスラインから出力される。 According to the above configuration, in the touch panel controller, the drive unit drives the M drive lines N times based on the code sequence of the sequence length N, whereby the intersection of the M drive lines and one sense line. N linear sum signals relating to the M electrostatic capacitances respectively formed in the sense line are output from the sense line.
 信号処理部は、センスラインから出力されたN個の線形和信号を保持する。その後、駆動部がドライブラインをK回駆動し、最新のK個の線形和信号がセンスラインから出力されるごとに、信号処理部は、すでに保持しているN個の線形和信号のうち、K個の線形和信号を、最新のK個の線形和信号によって順次に更新する。 The signal processing unit holds N linear sum signals output from the sense lines. After that, each time the driving unit drives the drive line K times and the latest K linear sum signals are output from the sense line, the signal processing unit, among the N linear sum signals already held, The K linear sum signals are sequentially updated with the latest K linear sum signals.
 そして、信号処理部は、K個の更新後の線形和信号と、(N-K)個の更新前の線形和信号とからなるN個の線形和信号を、N個の出力信号として出力する。 Then, the signal processing unit outputs N linear sum signals composed of K updated linear sum signals and (NK) pre-updated linear sum signals as N output signals. .
 内積演算部は、上記出力信号と上記符号系列の内積演算、すなわち、N個の出力信号と、系列長Nの符号系列との、N次元ベクトル同士での内積演算を行い、M個の静電容量の値の推定値としての静電容量推定値を算出する。すなわち、内積演算部は、出力信号に含まれる最新の線形和信号である、K個の更新後の線形和信号を用いて、内積演算を行っている。 The inner product calculation unit performs an inner product calculation of the output signal and the code sequence, that is, an inner product calculation of N output signals and a code sequence of sequence length N between N-dimensional vectors, and M electrostatic An estimated capacitance value is calculated as an estimated value of the capacitance value. That is, the inner product calculation unit performs an inner product calculation using K updated linear sum signals, which are the latest linear sum signals included in the output signal.
 他方、特許文献1に記載の従来のタッチパネルシステムにおけるタッチパネルコントローラによれば、駆動部がドライブラインをN回駆動するごとに、内積演算が行われる。このため、N回のドライブラインの駆動の途中に、一時的な静電容量の変化が生じた場合、一時的な静電容量に起因する静電容量推定値の誤差が、無視できない程度の大きさとなり得るという問題があった。
 本発明の一態様に係るタッチパネルコントローラによれば、K個の更新後の線形和信号を用いて内積演算が行われる。従って、N回のドライブラインの駆動の途中に、一時的な静電容量の変化が生じた場合、一時的な静電容量に起因する静電容量推定値の誤差の大きさの程度を、従来のタッチパネルコントローラに比べて、さらに抑制することができる。
On the other hand, according to the touch panel controller in the conventional touch panel system described in Patent Document 1, the inner product calculation is performed every time the drive unit drives the drive line N times. For this reason, if a temporary change in capacitance occurs during driving of the N drive lines, the error in the estimated capacitance value due to the temporary capacitance is so large that it cannot be ignored. There was a problem that could be.
According to the touch panel controller of one embodiment of the present invention, the inner product calculation is performed using the K updated linear sum signals. Therefore, when a temporary change in capacitance occurs during driving of the N drive lines, the degree of error in the estimated capacitance value caused by the temporary capacitance is conventionally determined. This can be further suppressed as compared with the touch panel controller.
 それゆえ、本発明の一態様に係るタッチパネルコントローラによれば、静電容量をより正確に推定することができる。 Therefore, according to the touch panel controller according to one aspect of the present invention, the capacitance can be estimated more accurately.
 また、本発明の態様2に係るタッチパネルコントローラは、上記態様1において、複数の上記静電容量推定値の中から、静電容量推定値の代表値を決定する推定値評価部(116a,116b)をさらに備えていてもよい。 In addition, the touch panel controller according to aspect 2 of the present invention is the estimated value evaluation unit (116a, 116b) that determines a representative value of the estimated capacitance value from the plurality of estimated capacitance values in the aspect 1. May be further provided.
 上記の構成によれば、推定値評価部によって決定された静電容量推定値の代表値を、静電容量推定値として用いることにより、静電容量推定値の精度をさらに向上させることができる。 According to the above configuration, the accuracy of the estimated capacitance value can be further improved by using the representative value of the estimated capacitance value determined by the estimated value evaluation unit as the estimated capacitance value.
 また、本発明の態様3に係るタッチパネルコントローラは、上記態様2において、上記推定値評価部が、複数の上記静電容量推定値の標準偏差を算出し、上記標準偏差が最小である上記静電容量推定値を、上記静電容量推定値の代表値として決定してもよい。 In the touch panel controller according to aspect 3 of the present invention, in the aspect 2, the estimated value evaluation unit calculates the standard deviation of the plurality of estimated capacitance values, and the standard deviation is the minimum. The estimated capacitance value may be determined as a representative value of the estimated capacitance value.
 上記の構成によれば、推定値評価部によって、標準偏差が最小である静電容量推定値が決定されるため、誤差の影響が抑制された、精度の高い静電容量推定値を得ることができる。 According to the above configuration, the estimated value evaluation unit determines the estimated capacitance value having the smallest standard deviation, and thus can obtain a highly accurate estimated capacitance value in which the influence of the error is suppressed. it can.
 また、本発明の態様4に係るタッチパネルコントローラは、上記態様2において、上記推定値評価部が、複数の上記静電容量推定値の分散を算出し、上記分散が最小である上記静電容量推定値を、上記静電容量推定値の代表値として決定してもよい。 In the touch panel controller according to aspect 4 of the present invention, in the aspect 2, the estimated value evaluation unit calculates a variance of the plurality of estimated capacitance values, and the capacitance estimation has a minimum variance. The value may be determined as a representative value of the estimated capacitance value.
 上記の構成によれば、推定値評価部によって、分散が最小である静電容量推定値が決定されるため、誤差の影響が抑制された、精度の高い静電容量推定値を得ることができる。 According to the above configuration, since the estimated value evaluation unit determines the estimated capacitance value having the minimum variance, it is possible to obtain a highly accurate estimated capacitance value in which the influence of the error is suppressed. .
 また、本発明の態様5に係るタッチパネルコントローラは、上記態様2において、上記推定値評価部が、複数の上記静電容量推定値の平均値を算出し、上記平均値を、上記静電容量推定値の代表値として決定してもよい。 In the touch panel controller according to aspect 5 of the present invention, in the aspect 2, the estimated value evaluation unit calculates an average value of a plurality of the estimated capacitance values, and the average value is calculated as the estimated capacitance value. It may be determined as a representative value.
 上記の構成によれば、推定値評価部によって、複数の静電容量推定値の平均値としての静電容量推定値が決定されるため、誤差の影響が抑制された、精度の高い静電容量推定値を得ることができる。 According to the above configuration, the estimated value evaluation unit determines the estimated capacitance value as the average value of the plurality of estimated capacitance values, and thus the highly accurate capacitance with the influence of the error suppressed. An estimate can be obtained.
 また、本発明の態様6に係るタッチパネルコントローラは、上記態様1から5のいずれか1つにおいて、上記符号系列が、M系列符号に基づき生成されていてもよい。 Also, in the touch panel controller according to aspect 6 of the present invention, in any one of the aspects 1 to 5, the code sequence may be generated based on an M-sequence code.
 上記の構成によれば、M系列符号に基づいて符号系列を生成するための回路は、シフトレジスタ等によって実現できるため、符号系列を生成するための回路の構成を容易化できる。 According to the above configuration, since the circuit for generating the code sequence based on the M-sequence code can be realized by a shift register or the like, the configuration of the circuit for generating the code sequence can be facilitated.
 また、本発明の態様7に係るタッチパネルコントローラは、上記態様1から5のいずれか1つにおいて、上記符号系列が、ウォルシュ符号またはアダマール符号に基づき生成されていてもよい。 Also, in the touch panel controller according to aspect 7 of the present invention, in any one of the aspects 1 to 5, the code sequence may be generated based on a Walsh code or a Hadamard code.
 上記の構成によれば、符号間の相関が0である符号系列が、ウォルシュ符号またはアダマール符号に基づいて生成される。従って、各ドライブラインの信号に、別のドライブラインの信号に起因する誤差が含まれず、タッチパネルコントローラにおける各種演算の精度をさらに向上させることができる。 According to the above configuration, a code sequence in which the correlation between codes is 0 is generated based on the Walsh code or Hadamard code. Therefore, the error due to the signal of another drive line is not included in the signal of each drive line, and the accuracy of various calculations in the touch panel controller can be further improved.
 また、本発明の態様8に係るタッチパネルコントローラは、上記態様1から7のいずれか1つにおいて、Kの値が、0<K<N/2であるように設定されていてもよい。 Further, the touch panel controller according to aspect 8 of the present invention may be set such that the value of K is 0 <K <N / 2 in any one of the above aspects 1 to 7.
 上記の構成によれば、出力信号において、更新された線形和信号の一部が、次の更新においてさらに更新されるという状況が回避されるため、内積演算部における内積演算を有効に行うことができる。 According to the above configuration, a situation in which a part of the updated linear sum signal is further updated in the next update in the output signal is avoided, so that the inner product calculation in the inner product calculation unit can be performed effectively. it can.
 また、本発明の態様9に係る集積回路は、上記態様1から8のいずれか1つに係るタッチパネルコントローラを含んでいてもよい。 Further, the integrated circuit according to aspect 9 of the present invention may include the touch panel controller according to any one of aspects 1 to 8.
 また、本発明の態様10に係るタッチパネルシステムは、上記態様1から8のいずれか1つに係るタッチパネルコントローラと、M本(Mは2以上の整数)のドライブラインおよびP本(Pは1以上の整数)のセンスラインを有するタッチパネルと、を備えていてもよい。 A touch panel system according to aspect 10 of the present invention includes a touch panel controller according to any one of aspects 1 to 8, M (M is an integer of 2 or more) drive lines, and P (P is 1 or more). And a touch panel having sense lines.
 また、本発明の態様11に係る電子機器は、上記態様10に係るタッチパネルシステムを含んでいてもよい。 Moreover, the electronic device according to aspect 11 of the present invention may include the touch panel system according to aspect 10 described above.
 また、上記態様11に係る電子機器は、コンピュータによって実現してもよく、この場合には、コンピュータを上記電子機器が備える各部として動作させることにより上記電子機器をコンピュータにて実現させる電子機器の制御プログラム、およびそれを記録したコンピュータ読み取り可能な記録媒体も、本発明の範疇に入る。 In addition, the electronic device according to the eleventh aspect may be realized by a computer. In this case, the electronic device is realized by the computer by causing the computer to operate as each unit included in the electronic device. A program and a computer-readable recording medium on which the program is recorded also fall within the scope of the present invention.
 〔付記事項〕
 本発明は上述した各実施形態に限定されるものではなく、請求項に示した範囲で種々の変更が可能であり、異なる実施形態にそれぞれ開示された技術的手段を適宜組み合わせて得られる実施形態についても本発明の技術的範囲に含まれる。さらに、各実施形態にそれぞれ開示された技術的手段を組み合わせることにより、新しい技術的特徴を形成することができる。
[Additional Notes]
The present invention is not limited to the above-described embodiments, and various modifications are possible within the scope shown in the claims, and embodiments obtained by appropriately combining technical means disclosed in different embodiments. Is also included in the technical scope of the present invention. Furthermore, a new technical feature can be formed by combining the technical means disclosed in each embodiment.
 なお、本発明は、以下のようにも表現できる。 The present invention can also be expressed as follows.
 すなわち、本発明の一態様に係るタッチパネルコントローラは、M本のドライブライン(Mは2以上の整数)と1本のセンスラインとの間にそれぞれ形成されるM個の静電容量を、N個のM次元ベクトル(Nは整数)により並列駆動し、前記M個の静電容量に蓄積された電荷に基づくN個の線形和信号を前記センスラインから出力させる駆動部を備えたタッチパネルコントローラであって、前記第1の線形和信号と、M個のN次元ベクトルとの内積演算により、前記M個の静電容量の値を推定する内積演算部を備え、ドライブラインをK回駆動するごとに(Kは整数、かつ、0<K<N)、前記線形和信号の値の一部が異なる新たな線形和信号を得て、前記新たな線形和信号とM個のN次元ベクトルとの内積演算により、前記M個の静電容量の値を推定する。 That is, the touch panel controller according to one embodiment of the present invention includes N capacitances formed between M drive lines (M is an integer of 2 or more) and one sense line. The touch panel controller includes a drive unit that is driven in parallel with a plurality of M-dimensional vectors (N is an integer), and that outputs N linear sum signals based on the charges accumulated in the M capacitances from the sense line. And an inner product calculation unit for estimating the value of the M electrostatic capacitances by calculating the inner product of the first linear sum signal and M N-dimensional vectors, each time the drive line is driven K times. (K is an integer, and 0 <K <N), a new linear sum signal in which a part of the value of the linear sum signal is different is obtained, and the inner product of the new linear sum signal and M N-dimensional vectors The M electrostatic capacitances are calculated. To estimate the value.
 また、本発明の一態様に係るタッチパネルコントローラは、ドライブラインをK回駆動するごとに得た、複数の静電容量の推定値のうち、エラーが少ない推定値を選択して出力する。 In addition, the touch panel controller according to an aspect of the present invention selects and outputs an estimated value with few errors among a plurality of estimated capacitance values obtained every time the drive line is driven K times.
 また、本発明の一態様に係るタッチパネルコントローラは、前記エラーの少ない信号を、容量推定値の標準偏差に基づいて選択する。 Further, the touch panel controller according to an aspect of the present invention selects the signal with less error based on the standard deviation of the capacity estimation value.
 また、本発明の一態様に係るタッチパネルコントローラは、K回駆動するごとに得た、複数の静電容量の平均値を出力する。 Further, the touch panel controller according to one embodiment of the present invention outputs an average value of a plurality of capacitances obtained every time K is driven.
 また、本発明の一態様に係るタッチパネル装置は、タッチパネルコントローラと、前記タッチパネルコントローラにより制御されるタッチパネルと、を備える。 The touch panel device according to one embodiment of the present invention includes a touch panel controller and a touch panel controlled by the touch panel controller.
 また、本発明の一態様に係る電子機器は、タッチパネルコントローラと、前記タッチパネルコントローラにより制御されるタッチパネルと、を備える。 Moreover, an electronic device according to one embodiment of the present invention includes a touch panel controller and a touch panel controlled by the touch panel controller.
 本発明は、タッチパネルコントローラ、ならびに、タッチパネルコントローラを含んだ集積回路、タッチパネルシステム、および電子機器に利用することができる。 The present invention can be used for a touch panel controller, an integrated circuit including the touch panel controller, a touch panel system, and an electronic device.
 100,100s タッチパネルシステム
 110,110s タッチパネルコントローラ
 111,111s 駆動部
 114a,114b,114s 信号処理部
 115a,115b,115s 内積演算部
 116a,116b,116s 推定値評価部
 120,120s タッチパネル
 300 携帯電話機(電子機器)
 M 整数(ドライブラインの本数を表す整数)
 N 整数(符号系列の符号長を表す整数)
 K 整数(線形和信号を更新すべき間隔を表す整数)
100, 100s Touch panel system 110, 110s Touch panel controller 111, 111s Drive unit 114a, 114b, 114s Signal processing unit 115a, 115b, 115s Inner product calculation unit 116a, 116b, 116s Estimated value evaluation unit 120, 120s Touch panel 300 Mobile phone (electronic device) )
M integer (an integer representing the number of drive lines)
N integer (an integer representing the code length of the code sequence)
K integer (an integer representing the interval at which the linear sum signal should be updated)

Claims (5)

  1.  系列長N(Nは整数)の符号系列に基づき、M本(Mは2以上の整数)のドライブラインをN回駆動することにより、上記M本のドライブラインと1本のセンスラインとの交点にそれぞれ形成されるM個の静電容量に関するN個の線形和信号を、上記センスラインから出力させる駆動部と、
     上記N個の線形和信号を保持した後、K個(Kは、0<K<Nを満たす整数)の線形和信号を、上記駆動部が上記ドライブラインをK回駆動するごとに得られる最新のK個の線形和信号によって順次に更新することにより、K個の更新後の線形和信号と、(N-K)個の更新前の線形和信号と、からなるN個の出力信号を出力する信号処理部と、
     上記出力信号と上記符号系列との内積演算を行うことにより、上記M個の静電容量の値の推定値としての静電容量推定値を算出する内積演算部と、を備えていることを特徴とするタッチパネルコントローラ。
    Based on a code sequence having a sequence length N (N is an integer), the drive line of M (M is an integer of 2 or more) is driven N times so that the intersection of the M drive lines and one sense line. A driving unit that outputs N linear sum signals relating to M capacitances respectively formed from the sense line;
    After holding the N linear sum signals, K linear sum signals are obtained each time the driving unit drives the drive line K times (K is an integer satisfying 0 <K <N). By sequentially updating with K linear sum signals, N output signals consisting of K updated linear sum signals and (NK) pre-update linear sum signals are output. A signal processing unit to
    An inner product calculation unit that calculates an estimated capacitance value as an estimated value of the M capacitance values by performing an inner product calculation of the output signal and the code sequence. Touch panel controller.
  2.  複数の上記静電容量推定値の中から、静電容量推定値の代表値を決定する推定値評価部をさらに備えていることを特徴とする請求項1に記載のタッチパネルコントローラ。 The touch panel controller according to claim 1, further comprising an estimated value evaluation unit that determines a representative value of the estimated capacitance value from the plurality of estimated capacitance values.
  3.  上記推定値評価部は、複数の上記静電容量推定値の標準偏差を算出し、
     上記標準偏差が最小である上記静電容量推定値を、上記静電容量推定値の代表値として決定することを特徴とする請求項2に記載のタッチパネルコントローラ。
    The estimated value evaluation unit calculates a standard deviation of the plurality of estimated capacitance values,
    The touch panel controller according to claim 2, wherein the estimated capacitance value having the smallest standard deviation is determined as a representative value of the estimated capacitance value.
  4.  請求項1から3のいずれか1項に記載のタッチパネルコントローラと、
     M本(Mは2以上の整数)のドライブラインおよびP本(Pは1以上の整数)のセンスラインを有するタッチパネルと、を備えていることを特徴とするタッチパネルシステム。
    The touch panel controller according to any one of claims 1 to 3,
    A touch panel system comprising: M (M is an integer of 2 or more) drive lines and P (P is an integer of 1 or more) sense lines.
  5.  請求項4に記載のタッチパネルシステムを含んでいることを特徴とする電子機器。 An electronic device comprising the touch panel system according to claim 4.
PCT/JP2014/060170 2013-06-25 2014-04-08 Touch panel controller, touch panel system, and electronic device WO2014208174A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2013-133040 2013-06-25
JP2013133040 2013-06-25

Publications (1)

Publication Number Publication Date
WO2014208174A1 true WO2014208174A1 (en) 2014-12-31

Family

ID=52141528

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2014/060170 WO2014208174A1 (en) 2013-06-25 2014-04-08 Touch panel controller, touch panel system, and electronic device

Country Status (1)

Country Link
WO (1) WO2014208174A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112860104A (en) * 2021-01-27 2021-05-28 北京小米移动软件有限公司 Calibration method and device for coordinate deviation of touch screen, mobile terminal and storage medium

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012247870A (en) * 2011-05-25 2012-12-13 Sharp Corp Capacitance estimation method, integrated circuit, and electronic apparatus
JP2013077286A (en) * 2011-09-14 2013-04-25 Sharp Corp Touch panel controller, touch panel system, and operation method for touch panel system
JP2013097687A (en) * 2011-11-02 2013-05-20 Sharp Corp Touch panel driving device, touch panel driving method, display device, program, and recording medium

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012247870A (en) * 2011-05-25 2012-12-13 Sharp Corp Capacitance estimation method, integrated circuit, and electronic apparatus
JP2013077286A (en) * 2011-09-14 2013-04-25 Sharp Corp Touch panel controller, touch panel system, and operation method for touch panel system
JP2013097687A (en) * 2011-11-02 2013-05-20 Sharp Corp Touch panel driving device, touch panel driving method, display device, program, and recording medium

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112860104A (en) * 2021-01-27 2021-05-28 北京小米移动软件有限公司 Calibration method and device for coordinate deviation of touch screen, mobile terminal and storage medium
CN112860104B (en) * 2021-01-27 2024-01-30 北京小米移动软件有限公司 Calibration method and device for touch screen coordinate deviation, mobile terminal and storage medium

Similar Documents

Publication Publication Date Title
US9354757B2 (en) Touch sensor system, and electronic device
JP5826971B2 (en) Stylus pen, touch panel system, and electronic device
AU2017239592B2 (en) Deep temporal preserving recurrent neural network for video representation learning
TW201305873A (en) Linear device value estimating method, capacitance detection method, integrated circuit, touch sensor system, and electronic device
JP5341224B2 (en) Touch panel controller, integrated circuit, touch panel system, and electronic device
US20120249448A1 (en) Method of identifying a gesture and device using the same
JP5973072B2 (en) Touch panel controller, integrated circuit, touch panel device, and electronic device
US20160092007A1 (en) Touch panel controller, integrated circuit, and electronic device
JP5969127B2 (en) Touch panel controller and electronic device
JP5394540B2 (en) Touch panel controller, integrated circuit, touch panel device, and electronic device.
CN110347282A (en) Noise suppression circuit
US20120323524A1 (en) Coordinate detecting device and coordinate detecting program
WO2014208174A1 (en) Touch panel controller, touch panel system, and electronic device
JP2013149223A (en) Linear system coefficient estimation method and integrated circuit using the same, touch panel device and electronic equipment
TWI475433B (en) Touch system for increasing a report rate and method for increasing a report rate of a touch system
JP2015007912A (en) Touch panel controller and electronic device
US8120593B2 (en) Method of positioning coordinate
US9933884B2 (en) Correcting coordinate jitter in touch screen displays due to forceful touches
JP2015118553A (en) Touch panel controller, touch panel device, and electronic apparatus
JP2013008316A (en) Linear system coefficient estimation method, integrated circuit, and electronic equipment
JP5449461B2 (en) Touch panel controller, integrated circuit using the same, touch panel device, and electronic device
JP2015153109A (en) touch panel controller, touch panel device, and electronic equipment
US9195355B2 (en) Method for increasing accuracy of touch coordinate calculation in a capacitive multi-touch system
WO2014129091A1 (en) Touch panel controller, integrated circuit, touch panel device, and electronic apparatus
WO2014038519A1 (en) Touch panel controller, integrated circuit including same, touch panel device, and electronic device

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 14816689

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 14816689

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: JP