WO2014180051A1 - 液晶显示面板的短接条结构及液晶显示面板 - Google Patents

液晶显示面板的短接条结构及液晶显示面板 Download PDF

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Publication number
WO2014180051A1
WO2014180051A1 PCT/CN2013/078245 CN2013078245W WO2014180051A1 WO 2014180051 A1 WO2014180051 A1 WO 2014180051A1 CN 2013078245 W CN2013078245 W CN 2013078245W WO 2014180051 A1 WO2014180051 A1 WO 2014180051A1
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data lines
numbered
odd
short
liquid crystal
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PCT/CN2013/078245
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English (en)
French (fr)
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高冬子
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深圳市华星光电技术有限公司
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Priority to US14/003,022 priority Critical patent/US9158166B2/en
Publication of WO2014180051A1 publication Critical patent/WO2014180051A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136204—Arrangements to prevent high voltage or static electricity failures

Definitions

  • the present invention relates to the field of liquid crystal display, and in particular to a short strip structure of a liquid crystal display panel and a liquid crystal display panel.
  • Liquid Crystal Display has many advantages such as thin body, power saving, and no radiation, and has been widely used.
  • Most of the liquid crystal display devices on the market are backlight type liquid crystal display devices, which include a casing, a liquid crystal display panel disposed in the casing, and a backlight module disposed in the casing.
  • the working principle of the liquid crystal display panel is to place liquid crystal molecules in two parallel glass substrates and apply driving voltages on the two glass substrates.
  • the liquid crystal display panel generally comprises: a thin film transistor (TFT) substrate and a thin film transistor substrate.
  • the even gate line (Mi-EVEN) 100 of the epipolar metal layer (M1) passes the even number of the source/drain metal layer (M2) through the transparent conductive layer 300.
  • the data lines (M2-EVEN) 500 are short-circuited together.
  • the transparent conductive layer 300 is generally an Indium Tin Oxides (ITO) layer, which is generally used to form a pixel electrode of a thin film transistor substrate, and a gate metal layer.
  • the odd gate lines (M1-ODD) 700 also short the odd data lines ( ⁇ 2 ODD ) 900 of the source/drain metal layers through the transparent conductive layer 300.
  • the even number of the source Z drain metal layers of this design The data line 500 and the odd data line 900 are only shorted together through the transparent conductive layer 300.
  • the transparent conductive layer 300 is usually located in the fifth layer, and before that, the even data lines 500 of the source/drain metal layer are odd.
  • the traces of the data line 900 are relatively independent, so it is easy to accumulate the charge 550, and generate an electrostatic discharge (ESD) in a weak link, especially the source/drain metal layer.
  • ESD electrostatic discharge
  • the peak current of the electrostatic discharge can reach several tens of amperes, and the instantaneous power is very large.
  • the generated electrostatic discharge electromagnetic pulse energy is enough to burn the even gate line 100 and the odd gate line 700, resulting in the failure to give the film in the subsequent array test process.
  • the transistor substrate is loaded with test signals to affect the detection and maintenance of electrical defects, which reduces the yield of the thin film transistor substrate.
  • a thin film transistor base of a liquid crystal display is proposed.
  • a plate is formed on the transparent substrate 11 to form a gate line 131, an odd data line 172, an even data line 173, a transparent conductive strip 121 and a short circuit strip 130.
  • the transparent conductive strip 121 is disposed under the cabinet short strip 130, and the gate line 131 and the transparent conductive strip 121 electrically connected, connected by the transparent conductive strip 121 to achieve charge balance, thereby avoiding electrostatic discharge and burning the short circuit strip 130 and the bridge line 131, thereby improving the liquid crystal display thin film transistor The yield of the substrate.
  • An object of the present invention is to provide a short strip structure of a liquid crystal display panel, which utilizes a shorting strip to disperse and dissipate charges, so that charges in the line cannot be accumulated, thereby effectively reducing the damage of static electricity to the line, thereby improving the quality of the liquid crystal display panel.
  • Another object of the present invention is to provide a liquid crystal display panel which is simple in process, low in cost, and high in production yield.
  • the present invention provides a short strip structure of a liquid crystal display panel, comprising: an even-numbered ⁇ -pole line and an odd-numbered gate line arranged in parallel, a plurality of even-numbered data lines and a plurality of odd-numbered data arranged in parallel And a short circuit strip parallel to the even gate line, the even data line is perpendicularly connected to the even drain line, the odd data line is vertically connected to the odd gate line, and the short circuit strip is electrically connected to the plurality of lines
  • the even data line is near one end of the even number of cabinet lines.
  • the even data lines are vertically connected to the even number of gate lines through the transparent conductive layer; the odd data lines are vertically connected to the odd bridge lines through the transparent conductive layer.
  • the transparent conductive layer is made of indium tin oxide.
  • the shorting bar is disposed in the same layer as the plurality of even data lines.
  • the plurality of even data lines are integrally formed with the short strips.
  • the present invention also provides a short strip structure of a liquid crystal display panel, comprising: an even number of gate lines and an odd number of gate lines arranged in parallel, a plurality of even data lines and a plurality of odd data lines arranged in parallel, and an even number
  • the ⁇ -pole parallel shorting strips, the even data lines are vertically connected to the even ⁇ -pole lines, the odd data lines are vertically connected to the odd gate lines, and the shorting bars are electrically connected to the plurality of even data lines Near one end of the even gate line;
  • the even data lines are vertically connected to the even gate lines through the transparent conductive layer;
  • the odd data lines are vertically connected to the odd gate lines through the transparent conductive layer;
  • the transparent conductive layer is made of indium tin oxide
  • the shorting bar is disposed in the same layer as the plurality of even data lines;
  • the plurality of data lines are integrally formed with the short strips.
  • the present invention also provides a liquid crystal display panel, comprising: a thin film transistor substrate; a color filter substrate disposed in contact with the thin film transistor substrate; and a liquid crystal layer disposed between the thin film transistor substrate and the color filter substrate,
  • the thin film transistor substrate includes a transparent substrate, an even gate line and an odd gate line formed on the transparent substrate, a plurality of even data lines and a plurality of odd data lines formed on the transparent substrate, and a short circuit strip formed on the transparent substrate
  • the even gate lines, the odd gate lines, and the shorting bars are disposed in parallel with each other, the plurality of even data lines and the plurality of odd data lines are disposed in parallel with each other, and the even data lines are vertically connected to the even gate lines.
  • the odd data lines are vertically connected to the odd-numbered drain lines, and the short-circuit strips are electrically connected to one end of the plurality of even-numbered data lines.
  • the even data lines are vertically connected to the even gate lines through the transparent conductive layer; the odd data lines are vertically connected to the odd bridge lines through the transparent conductive layer.
  • the transparent conductive layer is made of indium tin oxide.
  • the shorting bar is disposed in the same layer as several even data lines.
  • the plurality of even data lines are integrally formed with the shorting bar.
  • the short strip structure and the liquid crystal display panel of the liquid crystal display panel of the present invention electrically connect the even data lines to one end of the even bridge line by providing a shorting bar, thereby effectively shielding the distributed charge and avoiding
  • the current is too large, causing the line to burn out, thereby effectively improving the yield of the liquid crystal display panel, and the shorting bar and the even data line are simultaneously formed, the process is simple, the cost is low, and the cost control is facilitated.
  • FIG. 1 is a schematic view showing a conventional short circuit strip structure of a liquid crystal display panel
  • FIG. 2 is a schematic plan view showing a planar structure of a conventional thin film transistor substrate
  • FIG. 3 is a schematic structural view of a shorting strip of a liquid crystal display panel of the present invention.
  • FIG. 4 is a schematic structural view of a liquid crystal display panel of the present invention.
  • FIG. 5 is a partial plan view showing the structure of the thin film transistor substrate of FIG. 4.
  • FIG. 5 To further illustrate the technical means and effects of the present invention, the following:
  • the present invention provides a short strip structure of a liquid crystal display panel, comprising: an even gate line 2 and an odd gate line 4 arranged in parallel, a plurality of even data lines 6 and a plurality of lines arranged in parallel An odd data line 8 and a shorting bar 10 parallel to the even shed_pole line 2, the even data line 6 being vertically connected to the even number of the gate line 2, the odd number 8 being perpendicularly connected to the odd gate line 4,
  • the shorting bar 10 is electrically connected to the plurality of even data lines 6 close to the even wire.
  • the shorting bar 10 is disposed in the same layer as the plurality of even data lines 6.
  • the A plurality of even data lines 6 are formed integrally with the shorting bars 10.
  • the plurality of even data lines 6 and the short wiring 10 are integrally formed in the same layer (M2 layer) by a wiring process. Since the plurality of data lines 6 are connected to each other, the distributed charge 62 can be effectively channeled (the direction of the arrow in FIG. 3 indicates the charge direction), and when the charge 62 is finally released due to accumulation, the current is too large and the line is burnt. , thereby effectively improving the yield of the liquid crystal display panel.
  • the even data lines 6 are vertically connected to the even pole lines 2 through the transparent conductive layer 12; the odd data lines 8 are vertically connected to the odd bridge lines 4 through the transparent conductive layer 12.
  • the transparent conductive layer 12 is made of indium tin oxide.
  • the present invention further provides a liquid crystal display panel, comprising: a thin film transistor substrate 20, a color filter substrate 40 disposed on the thin film transistor substrate 20, and a thin film transistor substrate 20 and a color filter.
  • the thin film transistor substrate 20 includes a transparent substrate 22, an even gate line 2 and an odd gate line 4 formed on the transparent substrate 22, a plurality of even data lines 6 and an odd number data line 8 formed on the transparent substrate 22.
  • the shorting bar 10 formed on the transparent substrate 22, the even gate 2, the odd gate line 4 and the shorting bar 10 are arranged in parallel with each other, and the plurality of even data lines 6 and the plurality of odd data lines 8 are arranged in parallel with each other
  • the even data line 6 is vertically connected to the even gate line 2
  • the odd data line 8 is vertically connected to the odd drain line 4
  • the short circuit strip 10 is electrically connected to the plurality of even data lines 6 near the even number of cabinets.
  • the shorting bar 10 is disposed in the same layer as the plurality of even data lines 6.
  • the plurality of even data lines 6 and the shorting bar 10 are integrally formed into a body.
  • the plurality of even data lines 6 and the shorting bar 10 are integrally formed in the same layer (M2 layer) by a wiring process. Since the plurality of even data lines 6 communicate with each other through the shorting bars 10, the distributed charges can be effectively conducted. 62 (The direction of the arrow in Figure 3 indicates the direction of the charge). When the charge 62 is finally released due to accumulation, the current is too large and the line is burnt, which effectively improves the liquid crystal display panel.
  • the even data lines 6 are vertically connected to the even tree line 2 through the transparent conductive layer 12; the odd data lines 8 are vertically connected to the odd gate lines 4 through the transparent conductive layer 12.
  • the transparent conductive layer 12 is made of indium tin oxide.
  • the fabrication process of the thin film transistor substrate 20 may be: first forming a first metal layer (M1 layer) on the transparent substrate 22, and then patterning the first metal layer through a mask process to form a gate electrode (not shown). And an even gate line 2 and an odd gate line 4, and then forming a cabinet insulating layer (not shown) on the cabinet and the even tree line 2 and the odd gate line 4 and patterning the cabinet insulation Forming an activation layer (not shown) on the drain insulating layer and patterning the active layer; forming a second metal layer (M2 layer) in the active layer, and patterning the second metal layer by a mask process To form a source/drain (not shown), a plurality of even data lines 6, a plurality of odd data lines 8 and a short circuit strip 0; at the source/drain, the number of even data lines 6, and the number of odd data lines Forming a protective layer (not shown) on the shorting strip 10 and patterning the protective layer; forming a transparent conductive layer 12 on the protective layer and
  • the short strip structure and the liquid crystal display panel of the liquid crystal display panel of the present invention electrically connect the even data lines to the ends of the even gate lines by providing shorting bars, thereby effectively shielding the distributed charges and avoiding electric charges.
  • the current is too large, causing the line to burn out, thereby effectively improving the yield of the liquid crystal display panel, and the shorting bar and the even data line are simultaneously formed, the process is simple, the cost is low, and the cost control is facilitated.

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Liquid Crystal (AREA)
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Abstract

提供了一种液晶显示面板的短路条结构及液晶显示面板。短路条结构包括：平行排列的一偶数栅极线（2）与一奇数栅极线（4）、平行排列的数条偶数数据线（6）与数条奇数数据线（8）、及与偶数栅极线（2）平行的短路条（10），偶数数据线（6）垂直连接于偶数栅极线（2），奇数数据线（8）垂直连接于奇数栅极线（4），短路条（10）电性连接数条偶数数据线（6）靠近偶数栅极线（2）的一端。通过短路条（10）将偶数数据线（6）靠近偶数栅极线（2）的一端电性连接在一起，有效地疏导分散电荷，避免电荷由于积累而最终释放时电流过大而导致线路烧毁问题，进而有效提升液晶显示面板的良品率，且该短路条（10）与偶数数据线（6）同时形成，制程简单，成本低，利于成本控制。

Description

液晶显示面板的短接条结构及液晶显示面板
本发明涉及液晶显示领域， 尤其涉及一种液晶显示面板的短接条结构 及液晶显示面板。
液晶显示装置 ( Liquid Crystal Display, LCD )具有机身薄、 省电、 无 辐射等众多优点， 得到了广泛的应用。 现有市场上的液晶显示装置大部分 为背光型液晶显示装置， 其包括壳体、 设于壳体内的液晶显示面板及设于 壳体内的背光模组 （backlight module ) 。 液晶显示面板的工作原理是在两 片平行的玻璃基板当中放置液晶分子， 并在两玻璃基板上施加驱动电压来 液晶显示面板一般包括: 薄膜晶体管 （Thin Film Transistor, TFT )基 板与薄膜晶体管基板相对贴合设置的彩色滤光片 （ Color Filter, CF )基板 及设于薄膜晶体管基板与彩色滤光片基板之间的液晶层。 请参阅图 1， 现 有的薄膜晶体管基板制造工艺中， *极金属层 （Ml ) 的偶数柵极线 （Mi- EVEN ) 100 通过透明导电层 300 将源 /漏极金属层 （ M2 ) 的偶数数据线 ( M2- EVEN ) 500短接在一起， 该透明导电层 300一般为铟锡金属氧化物 ( Indium Tin Oxides, ITO ) 层， 一般用于形成薄膜晶体管基板的像素电 极， 栅极金属层的奇数栅极线 ( M1-ODD ) 700同样也通过透明导电层 300 将源 /漏极金属层的奇数数据线 （Μ2 ODD ) 900短接在一起， 这种设计的 源 Z漏极金属层的偶数数据线 500、 奇数数据线 900 只有通过透明导电层 300 才会短接在一起， 透明导电层 300通常位于第五层， 而在这之前， 该 源 /漏极金属层的偶数数据线 500、 奇数数据线 900 的走线均是相对独立 的， 那么就很容易积累电荷 550， 在薄弱的环节产生静电放电 （E】eeto Static discharge, ESD ) ， 尤其是源 /漏极金属层的偶数数据线 500、 奇数数 据线 900与栅极金属层的偶数栅极线 100、 奇数柵极线 700相交接的位置 非常容易产生静电。 静电放电的峰值电流可达几十安培， 瞬间的功率非常 大， 所产生的静电放电电磁脉冲能量足以烧毁偶数栅极线 100与奇数柵极 线 700, 导致在后续的阵列测试工艺中无法给薄膜晶体管基板加载测试信 号而影响电学缺陷的检出与维修， 降低了薄膜晶体管基板的良品率。
针对上述缺陷， 如图 2 所示， 提出一种液晶显示器的薄膜晶体管基 板， 其在透明基板 11 上形成櫥极线 131、 奇数数据线 172、 偶数数据线 173 , 透明导电条 121 及槲短路条 130, 透明导电条 121 设置在櫥短路条 130 的下方， 柵极线 131 与透明导电条 121 电性.连.接， 通过透明导电条 121 转移电荷以达到电荷平衡， 进而避免静电放电而烧毁楣 -短路条 130及 橋极线 131的问题， 从而提高液晶显示器薄膜晶体管基板的良率。
但， 在柵短路条 i30下方设置透明导电条 121增加了薄膜晶体管基板 制程步数， 进而增加了生产成本， 不利于成本控制。 发明内容
本发明的目的在于提供一种液晶显示面板的短接条结构， 其利用短路 条疏导分散电荷， 使得线路中的电荷无法累积， 有效降低静电对线路的损 害， 进而提升液晶显示面板的品质。
本发明的另一目的在于提供一种液晶显示面板， 其制程简单， 成本 低， 生产良率高„
为实现上述目的， 本发明提供一种液晶显示面板的短接条结构， 包 括： 平行排列的一偶数楣 -极线与一奇数栅极线、 平行排列的数条偶数数据 线与数条奇数数据线、 及与偶数栅极线平行的短路条， 所述偶数数据线垂 直连接于偶数槲极线， 所述奇数数据线垂直连接于奇数栅极线， 所述短路 条电性连接所述数条偶数数据线靠近偶数櫥极线的一端。
所述偶数数据线通过透明导电层垂直连接于偶数櫥极线； 所述奇数数 据线通过透明导电层垂直连接于奇数橋极线。
所述透明导电层由铟锡氧化物制成。
所述短路条与所述数条偶数数据线同层设置。
所述数条偶数数据线与所述短接条一体成型制成。
本发明还提供一种液晶显示面板的短接条结构， 包括： 平行排列的一 偶数柵极线与一奇数栅极线、 平行排列的数条偶数数据线与数条奇数数据 线、 及与偶数楣-极线平行的短路条， 所述偶数数据线垂直连接于偶数楣-极 线, 所述奇数数据线垂直连接于奇数栅极线， 所述短路条电性连接所述数 条偶数数据线靠近偶数栅极线的一端；
其中， 所述偶数数据线通过透明导电层垂直连接于偶数栅极线； 所述 奇数数据线通过透明导电层垂直连接于奇数栅极线；
其中， 所述透明导电层由铟锡氧化物制成；
其中， 所述短路条与所述数条偶数数据线同层设置；
其中， 所述数条偶数数据线与所述短接条一体成型制成。 本发明还提供一种液晶显示面板， 包括： 薄膜晶体管基板、 与薄膜晶 体管基板贴合设置的彩色滤光片基板， 及设于薄膜晶体管基板与彩色滤光 片基板之间的液晶层， 所述薄膜晶体管基板包括透明基板、 形成于透明基 板上的偶数柵极线与奇数柵极线、 形成于透明基板上的数条偶数数据线与 数条奇数数据线、 及形成于透明基板上的短路条， 所述偶数栅极线、 奇数 柵极线及短路条相互平行设置， 所述数条偶数数据线与数条奇数数据线相 互平行设置， 所述偶数数据线垂直连接于偶数栅极线， 所述奇数数据线垂 直连接于奇数槲极线， 所述短路条电性连接所述数条偶数数据线靠近偶数 栅极线的一端。
所述偶数数据线通过透明导电层垂直连接于偶数柵极线； 所述奇数数 据线通过透明导电层垂直连接于奇数橋极线。
所述透明导电层由铟锡氧化物制成。
所述短路条与数条偶数数据线同层设置。
所述数条偶数数据线与所述短路条一体成型制成。
本发明的有益效果： 本发明的液晶显示面板的短接条结构及液晶显示 面板， 通过设置短路条将偶数数据线靠近偶数橋极线的一端电性连接在一 起， 有效地疏导分散电荷， 避免电荷由于积累而最终释放时， 电流过大而 导致线路烧毁问题， 进而有效提升液晶显示面板的良品率， 且， 该短路条 与偶数数据线同时形成， 制程简单， 成本低， 利于成本控制。
为了能更进一步了解本发明的特征以及技术内容， 请参阔以下有关本 发明的详细说明与附图， 然而附图仅提供参考与说明用， 并非用来对本发 明加以限制。 附图说明
下面结合附图， 通过对本发明的具体实施方式详细描述， 将使本发明 的技术方案及其它有益效果显而易见。
附图中，
图 1为现有的一种液晶显示面板短接条结构的示意图；
图 2为现有的一种薄膜晶体管基板的平面结构示意图；
图 3为本发明的液晶显示面板的短接条的结构示意图；
图 4为本发明的液晶显示面板的结构示意图；
图 5为图 4中薄膜晶体管基板的局部平面结构示意图。 为更进一步阐述本发明所采取的技术手段及其效果， 以下：
的优选实施例及其附图进行详细描述。
请参阅图 3 , 本发明提供一种液晶显示面板的短接条结构， 包括： 平 行排列的一偶数柵极线 2 与一奇数栅极线 4、 平行排列的数条偶数数据线 6与数条奇数数据线 8、 及与偶数棚 _极线 2平行的短路条 10， 所述偶数数 据线 6垂直连接于偶数.櫥极线 2, 所述奇数 8垂直连接于奇数柵极 线 4, 所述短路条 10电性连接所述数条偶数数据线 6靠近偶 ..线 2的 在本实施例中， 所述短路条 10 与所述数条偶数数据线 6 同层设 置， 优选的， 所述数条偶数数据线 6 与所述短路条 10 —体成型制成。 具 体地， 该数条偶数数据线 6与所述短接线 10通过布线工艺在同一层（M2 层）一体形成。 由于该数条偁数数据线 6之间相互连通， 能有效地疏导分 散电荷 62 (图 3 中箭头方向表示电荷走向 ) , 避免电荷 62由于积累而最 终释放时， 电流过大而导致线路烧毁问题， 进而有效提升液晶显示面板的 良品率。
优选的， 所述偶数数据线 6通过透明导电层 12垂直连接于偶数极极 线 2; 所述奇数数据线 8通过透明导电层 12垂直连接于奇数橋极线 4。 所 述透明导电层 12由铟锡氧化物制成。
请参阅图 4及图 5 , 本发明还提供一种液晶显示面板， 包括： 薄膜晶 体管基板 20、 与薄膜晶体管基板 20贴合设置的彩色滤光片基板 40、 设于 薄膜晶体管基板 20与彩色滤光片基板 40之间的液晶层 60及设于彩色滤 光片基板 40边缘位置的密封胶框 80。
所述薄膜晶体管基板 20包括透明基板 22、 形成于透明基板 22上的偶 数栅极线 2与奇数柵极线 4、 形成于透明基板 22上的数条偶数数据线 6与 条奇数数据线 8、 及形成于透明基板 22 上的短路条 10, 所述偶数栅极 2、 奇数栅极线 4及短路条 10相互平行设置， 所述数条偶数数据线 6与 数条奇数数据线 8相互平行设置， 所述偶数数据线 6垂直连接于偶数栅极 线 2， 所述奇数数据线 8垂直连接于奇数槲极线 4， 所述短路条 10电性连 接所述数条偶数数据线 6靠近偶数櫥极线 2的一端。 在本实施例中， 所述 短路条 10 与所述数条偶数数据线 6 同层设置， 优选的， 所述数条偶数数 据线 6与所述短路条 10—体成型制成„ 具体地， 该数条偶数数据线 6与 所述短路条 10通过布线工艺在同一层 （M2层）一体形成。 由于该数条偶 数数据线 6之间通过.短路条 10相互连通， 能有效地疏导分散电荷 62 (图 3中箭头方向表示电荷走向） ， 避.免电荷 62由于积累而最终释放时， 电流 过大而导致线路烧毁问题， 进而有效提升液晶显示面板的良 '玄< 优选的， 所述偶数数据线 6通过透明导电层 12垂直连接于偶数树极 线 2; 所述奇数数据线 8通过透明导电层 12垂直连接于奇数栅极线 4。 所 述透明导电层 12由铟锡氧化物制成。
具体地， 该薄膜晶体管基板 20的制作工艺可为： 先在透明基板 22上 形成第一金属层 （Ml 层） ， 然后通过光罩制程图案化该第一金属层， 以 形成柵极（未图示）及偶数柵极线 2 与奇数柵极线 4, 再在该櫥极及偶数 树极线 2与奇数栅极线 4上形成櫥极绝缘层 (未图示） 并图案化该櫥极绝 缘层； 接着在槲极绝缘层上形成激活层 （未图示） 并图案化该激活层； 在 该激活层形成第二金属层 （M2 层） ， 并通过光罩制程图案化该第二金属 层， 以形成源 /漏极（未图示） 、 数条偶数数据线 6、 数条奇数数据线 8及 短路条 0; 在该源 /漏极、 数条偶数数据线 6、 数条奇数数据线 8及短路条 10上形成保护层 （未图示）并图案化该保护层； 在该保护层上形成透明导 电层 12 并图案化该透明导电层以形成像素电极（未图示） ， 同时， 该透 明导电层 12还将数条偶数数据线 6与偶数树极线 2 电性连接在一起， 将 数条奇数数据线 8与奇数柵极线 4电性连接在一起。
综上所述， 本发明的液晶显示面板的短接条结构及液晶显示面板， 通 过设置短路条将偶数数据线靠近偶数柵极线端电性连接在一起， 有效地疏 导分散电荷， 避免电荷由于累积而最终释放时， 电流过大导致线路烧毁问 题， 进而有效提升液晶显示面板的良品率， 且， 该短路条与偶数数据线同 时形成， 制程简单， 成本低， 利于成本控制。
以上所述， 对于本领域的普通技术人员来说， 可以根据本发明的技术 方案和技术构思作出其他各种相应的改变和变形， 而所有这些改变和变形 都应属于本发明权利要求的保护范围。

Claims

权 利 要 求
】、 一种液晶显示面板的短接条结构， 包括： 平行排列的一偶数栅极 线与一奇数栅极线、 平行排列的数条偶数数据线与数条奇数数据线、 及与 偶数柵极线平行的短路条， 所述偶数数据线垂直连接于偶数柵极线， 所述 奇数数据线垂直连接于奇数栅极线， 所述短路条电性连接所述数条偶数数 据线靠近偶数櫪极线的一端。
2、 如权利要求 1 所述的液晶显示面板的短接条结构， 其中， 所述偶 数数据线通过透明导电层垂直连接于偶数栅极线； 所述奇数数据线通过透 明导电层垂直连接于奇数栅极线。
3、 如权利要求 2 所述的液晶显示面板的短接条结构， 其中， 所述透 明导电层由铟锡氧化物制成。
4、 如权利要求 1 所述的液晶显示面板的短接条结构， 其中， 所述短 路条与所述数条偶数数据线同层设置。
5、 如权利要求 4 所述的液晶显示面板的短接条结构， 其中， 所述数 条偶数数据线与所述短接条一体成型制成。
6、 一种液晶显示面板的短接条结构， 包括： 平行排列的一偶数槲极 线与一奇数栅极线、 平行排列的数条偶数数据线与数条奇数数据线、 及与 偶数栅极线平行的短路条， 所述偶数数据线垂直连接于偶数栅极线， 所述 奇数数据线垂直连接于奇数栅极线， 所述短路条电性连接所述数条偶数数 据线靠近偶数柵极线的一端；
其中， 所述偶数数据线通过透明导电层垂直连接于偶数柵极线； 所述 奇数数据线通过透明导电层垂直连接于奇数栅极线；
其中， 所述透明导电层由铟锡氧化物制成；
其中， 所述短路条与所述数条偶数数据线同层设置；
其中， 所述数条偶数数据线与所述短接条一体成型制成。
7、 一种液晶显示面板， 包括： 薄膜晶体管基板、 与薄膜晶体管基板 贴合设置的彩色滤光片基板、 及设于薄膜晶体管基板与彩色滤光片基板之 间的液晶层， 所述薄膜晶体管基板包括透明基板、 形成于透明基板上的偶 数栅极线与奇数柵极线、 形成于透明基板上的数条偶数数据线与数条奇数 数据线、 及形成于透明基板上的短路条， 所述偶数柵极线、 奇数 *极线及 短路条相互平行设置， 所述数条偶数数据线与数条奇数数据线相互平行设 置， 所述偶数数据线垂直连接于偶数柵极线， 所述奇数数据线垂直连接于 奇数栅极线， 所述短路条电性连接所述数条偶数数据线靠近偶数 *极线的
—端。
8、 如权利要求 7 所述的液晶显示面板， 其中， 所述偶数数据线通过 透明导电层垂直连接于偶数栅极线； 所述奇数数据线通过透明导电层垂直 连接于奇数柵极线。
9、 如权利要求 8 所述的液晶显示面板， 其中， 所述透明导电层由铟 锡氧化物制成。
10、 如权利要求 7所述的液晶显示面板， 其中， 所述短路条与数条偶 数数据线同层设置。
11、 如权利要求 10 所述的液晶显示面板， 其中， 所述数条偶数数据 线与所述短路条一体成型制成。
PCT/CN2013/078245 2013-05-08 2013-06-28 液晶显示面板的短接条结构及液晶显示面板 WO2014180051A1 (zh)

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