WO2014166692A1 - Contact mechanism for electrical substrates - Google Patents
Contact mechanism for electrical substrates Download PDFInfo
- Publication number
- WO2014166692A1 WO2014166692A1 PCT/EP2014/054865 EP2014054865W WO2014166692A1 WO 2014166692 A1 WO2014166692 A1 WO 2014166692A1 EP 2014054865 W EP2014054865 W EP 2014054865W WO 2014166692 A1 WO2014166692 A1 WO 2014166692A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- connector
- circuit
- connectors
- connector blocks
- encapsulating material
- Prior art date
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 32
- 239000000463 material Substances 0.000 claims abstract description 25
- 238000000034 method Methods 0.000 claims abstract description 20
- 238000005553 drilling Methods 0.000 claims abstract description 9
- 238000003754 machining Methods 0.000 claims abstract description 5
- 239000008393 encapsulating agent Substances 0.000 description 12
- 238000005520 cutting process Methods 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical group [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 229910052802 copper Inorganic materials 0.000 description 3
- 238000005538 encapsulation Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 229910000679 solder Inorganic materials 0.000 description 3
- 229910017083 AlN Inorganic materials 0.000 description 2
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 description 2
- PNEYBMLMFCGWSK-UHFFFAOYSA-N aluminium oxide Inorganic materials [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 description 2
- 230000003628 erosive effect Effects 0.000 description 2
- 238000003801 milling Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- 238000004080 punching Methods 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 239000007787 solid Substances 0.000 description 2
- 238000006467 substitution reaction Methods 0.000 description 2
- LTPBRCUWZOMYOC-UHFFFAOYSA-N Beryllium oxide Chemical compound O=[Be] LTPBRCUWZOMYOC-UHFFFAOYSA-N 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
- H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Coupling Device And Connection With Printed Circuit (AREA)
Abstract
A method of providing a contact mechanism is described. The method comprising encapsulating a circuit formed on an electrical substrate (the circuit including one or more connector blocks) and machining a hole into the connector blocks through the encapsulating material (typically by drilling) such that external connections can be made to each of said connector blocks through the encapsulating material.
Description
contact mechanism for electrical substrates
The present invention relates to the provision of a mechanism to allow contact to circuit elements mounted on an encapsulated electrical substrate.
Encapsulation of semiconductor devices into integrated circuit packages prior to mounting the devices onto printed circuit boards is well known. Such encapsulation might be provided, for example, to provide protection against vibration and moisture ingress. A problem with encapsulation is the need to provide electrical connections. This can readily be achieved, but a problem
with some existing techniques is that multiple process steps are required. A simple and reliable solution to this problem would be advantageous.
The present invention provides a method comprising machining one or more holes into one or more connector blocks of a circuit formed on an electrical substrate, wherein an encapsulating material (sometimes referred to as an encapsulant) covers the connector blocks and wherein the or each hole is machined through the encapsulating material into the respective connector block such that external connections can be made to one or more of said connector blocks through the encapsulating material. The method may include the step of encapsulating the circuit (prior to the machining of the holes through the encapsulating material).
The present invention also provides a circuit (such as a power module) comprising: one or more connector blocks mounted on a substrate (such as a DCB substrate); an encapsulating material (e.g. a resin/mold) encapsulating the circuit and covering the connector blocks; and one or more holes machined into one or more of the connector blocks through the encapsulating material such that external connections can be made to one or more of said connector blocks through the encapsulating material.
In one form of the invention, the holes are machined by drilling. However, many alternatives to drilling exist, such as cutting, punching, pressing, milling, vertical eroding, and the use of cutting screws or lasers.
In many forms of the invention, one or more connectors are inserted into one or more of the connector blocks through the encapsulant, such that each connector is in electrical contact with a connector block and has a terminal end exposed above the encapsulant. In one form of the invention, the connectors are press-fit connectors, although alternatives connector
technologies that could be used exist. When inserted, the connectors may be perpendicular to the plane of the substrate.
The invention may further comprise connecting the exposed terminal end of one or more of the connectors to one or more external connections (such as power inputs or signal inputs and/or outputs). The exposed terminal ends may be press-fit connectors, but this is not essential. For example, the end of the connector that is inserted into the connector block that may be a press-fit connector, whilst the exposed end may be connected is some other way (e.g. by soldering).
The invention may include forming the circuit on the electrical substrate.
In some forms of the invention, the connector blocks have a non-circular cross-section (e.g. hexagonal or octagonal). This provides resistance to rotation, which is particularly advantageous if the holes in the connector block are machined by drilling or by some other method in which the connector blocks could be rotated. In some forms of the invention, the connector blocks have a smaller cross- sectional are at a base (substrate end) than a top (external connection end) of the connector block. A smaller footprint at the base may be advantageous in order to reduce the space taken up by the connector block on the substrate.
The present invention also provides a method comprising: encapsulating a circuit formed on an electrical substrate, wherein the circuit includes one or more connector blocks and wherein an encapsulating material (e.g. a resin/mold) used for encapsulating the circuit covers the connector blocks; and machining (e.g. cutting/drilling) one or more holes into one or more of the connector blocks through the encapsulating material such that external
connections can be made to one or more of said connector blocks through the encapsulating material.
The invention will now be described in further detail with reference to the following schematic drawings, in which:
Figure 1 is a flow chart showing an algorithm in accordance with an
aspect of the present invention; Figure 2 is a cross-section of a partially assembled circuit in accordance with an aspect of the present invention;
Figure 3 is a cross-section of a partially assembled circuit in accordance with an aspect of the present invention;
Figure 4 is a cross-section of a partially assembled circuit in accordance with an aspect of the present invention;
Figure 5 is a cross-section of a circuit assembled in accordance with an aspect of the present invention;
Figure 6 shows a press-fit connector used in some embodiments of the present invention; Figure 7 shows a plurality of press-fit connectors suitable for use in some embodiments of the present invention;
Figure 8 is a side view a connector module used in some embodiments of the present invention; and
Figure 9 is a plan view of a connector module used in some
embodiments of the present invention.
Figure 5 is a highly schematic cross-section of a circuit, indicated generally by the reference numeral 1 , in accordance the principles of the present invention. The circuit 1 may be a power module, but this is not essential to the present invention.
The circuit 1 includes a substrate comprises a lower conducting layer 2, an insulating layer 4 and an upper conducting layer 6. Connector blocks 10 and circuit elements 12 are built on top of the conducting layer 6. The substrate (consisting of the layers 2 to 6) may be a direct copper bonded (DCB) substrate (sometimes also referred to as a direct bonded copper (DBC) substrate).
The insulating layer 4 of the DCB substrate electrically isolates the upper and lower conducting layers. By way of example, the conducting layers 2 and 6 may be copper layers, although alternatives (such as aluminium) are possible. The insulating later may be a ceramic layer. Possible materials for the insulating layer are alumina (AI2O3), aluminium nitride (AIN) and beryllium oxide (BeO). The skilled person will be aware of many alternative materials that could be used.
Power modules often include DCB substrates. The present invention is well suited for use with such power modules. Nevertheless, the invention is widely applicable and is not limited either to power modules or to use with DCB substrates.
Wire bonding 14 is used to connect at least some of the circuit elements 12 and the connector blocks 10 to provide a circuit. Of course, although only one
wire bond 14 is shown in Figure 5 for clarity, a real circuit will include many such wire bonds.
The connector blocks 10, the circuit elements 12 and the wire bonds 14 are 5 all encapsulated using an encapsulant 8 (sometimes referred to herein as an encapsulating material). The encapsulant 8 provides a degree of physical protection for the circuit elements 12, the connector blocks 10 and the wire bonds 14. When the substrate is a DCB substrate, the provision of an encapsulant may also improve mechanical stability.
0
The circuit includes electrical connectors 18 that enable connections to be made to the encapsulated connector blocks 10. The electrical connectors 18 pass through the encapsulant 8 and into the connector blocks 10. The connector blocks are electrically connected to circuit elements 12, as is well5 known in the art.
Figure 1 is a flow chart showing an algorithm, indicated generally by the reference numeral 100, in accordance with an aspect of the present invention. The circuit 1 may be produced using the algorithm 100, as
o described further below.
The algorithm 100 starts at step 102, where solder is printed onto the substrate. The solder layer defines connections that will be used in the circuit that will be built on the substrate.
5
At step 104, connector blocks 10 and circuit elements 12 are mounted onto the substrate. This is typically an automated process in which connector blocks and circuit elements are picked up by a machine and secured on the substrate in defined positions. Such processes are well known (and the
0 particular method of assembling the connector blocks and circuit elements is not essential to this invention).
With the connector blocks 10 and circuit elements 12 placed on the substrate, the wire bond connections 14 can be made (step 106 of the algorithm 100).
Figure 2 is a cross-section of a partially assembled circuit in accordance with steps 102 to 106 of the algorithm 100. The circuit shown in Figure 2 shows to the connector blocks 10, circuit elements 12 and wire bonds 14 located on the substrate formed by the conducting layers 2 and 6 and the insulating layer 4.
Next, the circuit is encapsulated (step 108 of the algorithm 100). The encapsulated circuit is shown in Figure 3. With the circuit encapsulated using an encapsulant 8, the algorithm 100 moves to step 1 10 where holes are machined into the connector blocks 10 through the encapsulant 8. As shown in Figure 4, holes 16 pass through the encapsulant and into the connector blocks 10. The holes 16 can be accurately placed and in combination with the placement of the connector blocks 12, ensure that connections can be made to the circuit in exactly the position required.
The holes 16 may be machined by drilling. Drilling through the encapsulant 8 is a simple process compared, for example, with etching, can be performed accurately and is flexible. The skilled person will be aware of many alternatives to drilling, such as punching, pressing, milling, vertical eroding, and the use of cutting screws or lasers.
Finally, at step 1 12, connectors are mounted in the holes 16. As shown in Figure 5, the connectors 18 enable connections to be made to the connector blocks 10 from outside the circuit. The connectors 18 may be used to provide
power to the circuit. The connectors may be used to provide signal inputs to the circuit and/or to receive signal outputs from the circuit. In this way, a simple method is provided for providing connections to the circuit, whilst maintaining the advantages of encapsulating that circuit. As shown in Figure 5, the connectors 18 may extend beyond the encapsulant 8.
Figure 6 shows a press-fit connector that is used as the connectors 18 in some embodiments of the present invention. Press-fit connectors (sometimes referred to a "compliant pin connectors") have been used for many years to make connections to printed circuit boards without requiring solder
connections. The press-fit connector shown in Figure 6 is indicated by the reference numeral 30. The connector 30 is often referred to as an "eye-of- the-needle" type of connector and includes an end 32 that looks like the eye of a needle. In use, the end 32 is inserted into the hole 16 and makes contact with the connector block 10. The end 32 is slightly larger than the hole 16, such that the connector end is deformed when inserted into the hole. The deformation creates a reliable connection.
Other forms of compliant connectors are known and could be used in the present invention. For example, a solid press-fit connector having a diameter slightly larger than the hole 16 could be used. As with the eye-of-the-needle connector 30, when the solid press-fit connector is inserted into the hole 16, the connector 30 is deformed to create a reliable connection. The press-fit connectors are described above by way of example only. The skilled person will be aware of many alternative connector technologies (such as spring contact connectors) that could be used in alternative embodiments of the invention. Figure 7 shows a plurality of press-fit connectors, indicated generally by the reference numeral 40, suitable for use in some embodiments of the present
invention. In use, each of the plurality of press-fit connectors is inserted into a connector block 10. The press-fit connectors of the plurality 40 are double- ended connectors, having an "eye" at each end. It should be noted that the use of double-ended press-fit connectors is not essential to the present invention. For example, a press-fit connection could be used for connecting to the connector block whilst an alternative connection technology (such as soldering) could be used to connect the exposed terminal end of the connector to another circuit element. Thus, the present invention provides significant freedom.
Figure 8 is a side view a connector module 10 used in some embodiments of the present invention. Figure 9 is a plan view of the connector module 10 of Figure 8. As shown in Figures 8 and 9, in one embodiment of the invention, the connector block 10 has a circular hole 16 drilled (or otherwise machined) therethrough, but the connector module is not itself circular. In the examples of Figures 8 and 9, the connector module is hexagonal, although other shapes (such as octagonal) are possible. Providing a non-circular connector block increases the resistance of the connector module to rotation. This is advantageous as it reduces the likelihood of the connector block 10 rotating when the hole 16 is drilled.
Figure 8 shows that the diameter of the connector block 10 is larger at the top than at the bottom of the connector block. The connector block needs to be relatively large at the top since a mechanical contact to one of the connectors 18 must be made. In one embodiment of the invention, a diameter of 2.5mm to 3mm is used. At the bottom of the connector block, a smaller footprint is advantageous in order to reduce the space taken up by the connector block on the substrate.
Th e embodiments of the invention described above are provided by way of example only. The skilled person will be aware of many modifications, changes and substitutions that could be made without departing from the scope of the present invention. The claims of the present invention are intended to cover all such modifications, changes and substitutions as fall within the spirit and scope of the invention.
Claims
A method comprising machining one or more holes into one or more connector blocks of a circuit formed on an electrical substrate, wherein an encapsulating material covers the connector blocks and wherein the or each hole is machined through the encapsulating material into the respective connector block such that external connections can be made to one or more of said connector blocks through the encapsulating material.
A method as claimed in claim 1 , further comprising the step of encapsulating the circuit.
A method as claimed in claim 1 or claim 2, wherein the holes are machined by drilling.
A method as claimed in any one of claims 1 to 3, further comprising inserting one or more connectors into one or more of the connector blocks through the encapsulating material, such that each connector
is in electrical contact with a connector block and has a terminal end exposed above the encapsulating material.
5. A method as claimed in claim 4, wherein the connectors are press-fit connectors.
6. A method as claimed in claim 4 or claim 5, further comprising
connecting the exposed terminal end of one or more of the connectors to one or more external connections.
7. A method as claimed in any preceding claim, further comprising
forming the circuit on the electrical substrate.
8. A circuit comprising: one or more connector blocks mounted on a substrate; an encapsulating material encapsulating the circuit and covering the connector blocks; and one or more holes machined into one or more of the connector blocks through the encapsulating material such that external connections can be made to one or more of said connector blocks through the encapsulating material.
9. A circuit as claimed in claim 8, further comprising one or more
connectors provided in electrical contact with one or more of the connector blocks through the encapsulating material, wherein each connector has a terminal end exposed above the encapsulating material.
10. A circuit as claimed in claim 9, wherein the connectors are press-fit connectors.
1 1 . A circuit as claimed in claim 9 or claim 10, wherein the terminal ends of one or more of the connectors are connected to one or more external connections.
12. A circuit as claimed in any one of claims 9 to 1 1 , wherein the
connectors are provided substantially perpendicular to the substrate.
13. A circuit as claimed in any one of claims 8 to 12, wherein the
connector blocks have a non-circular cross-section.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| DKDK201300205 | 2013-04-08 | ||
| DK201300205A DK177868B1 (en) | 2013-04-08 | 2013-04-08 | Contact mechansim for electrical substrates |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| WO2014166692A1 true WO2014166692A1 (en) | 2014-10-16 |
Family
ID=50288052
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| PCT/EP2014/054865 WO2014166692A1 (en) | 2013-04-08 | 2014-03-12 | Contact mechanism for electrical substrates |
Country Status (2)
| Country | Link |
|---|---|
| DK (1) | DK177868B1 (en) |
| WO (1) | WO2014166692A1 (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP3217774A1 (en) | 2016-03-08 | 2017-09-13 | ABB Schweiz AG | Semiconductor module |
| US10137789B2 (en) | 2016-07-20 | 2018-11-27 | Ford Global Technologies, Llc | Signal pin arrangement for multi-device power module |
| EP3933896A1 (en) * | 2020-06-29 | 2022-01-05 | Infineon Technologies Austria AG | Power module with metal substrate |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090146272A1 (en) * | 2007-12-10 | 2009-06-11 | Infineon Technologies Ag | Electronic device |
| US20100127383A1 (en) * | 2008-11-25 | 2010-05-27 | Mitsubishi Electric Corporation | Power semiconductor module |
-
2013
- 2013-04-08 DK DK201300205A patent/DK177868B1/en not_active IP Right Cessation
-
2014
- 2014-03-12 WO PCT/EP2014/054865 patent/WO2014166692A1/en active Application Filing
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090146272A1 (en) * | 2007-12-10 | 2009-06-11 | Infineon Technologies Ag | Electronic device |
| US20100127383A1 (en) * | 2008-11-25 | 2010-05-27 | Mitsubishi Electric Corporation | Power semiconductor module |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP3217774A1 (en) | 2016-03-08 | 2017-09-13 | ABB Schweiz AG | Semiconductor module |
| US10079193B2 (en) | 2016-03-08 | 2018-09-18 | Abb Schweiz Ag | Semiconductor module |
| US10137789B2 (en) | 2016-07-20 | 2018-11-27 | Ford Global Technologies, Llc | Signal pin arrangement for multi-device power module |
| EP3933896A1 (en) * | 2020-06-29 | 2022-01-05 | Infineon Technologies Austria AG | Power module with metal substrate |
| US11404336B2 (en) | 2020-06-29 | 2022-08-02 | Infineon Technologies Austria Ag | Power module with metal substrate |
Also Published As
| Publication number | Publication date |
|---|---|
| DK177868B1 (en) | 2014-10-20 |
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