WO2014122285A1

WO2014122285A1 - Transmitter for performing an 8-qam or a 7-qam modulation and correspondent receiver

Info

Publication number: WO2014122285A1
Application number: PCT/EP2014/052476
Authority: WO
Inventors: Daniel Delaruelle
Original assignee: Newtec Cy
Priority date: 2013-02-11
Filing date: 2014-02-07
Publication date: 2014-08-14
Also published as: GB201302386D0

Abstract

The present invention relates to a receiver for a digital communication system comprising - a demodulator arranged for receiving a quadrature amplitude modulated stream of digital symbols and for outputting a sequence of demodulated digital symbols, - a bit demapper arranged for being fed with the sequence of demodulated symbols and for determining a three-bit representation for the demodulated symbols associated with points of a predefined constellation, said three-bit representation being a set of probability values for each bit position, said predefined constellation having a first and second point of different amplitude and zero reference phase, a third point having an amplitude equal to the amplitude of the first point and a 180 degree reference phase, a fourth point having an amplitude equal to the amplitude of the second point and a 180 degree reference phase, and - a decoder arranged for receiving the set of probability values and for determining values for each bit, characterised by said predefined constellation further having a fifth and a sixth point having real magnitudes substantially larger than the amplitude of the first point and equal imaginary magnitudes of opposite sign, and seventh and eighth points having substantially equal to a negation of the amplitude of the fifth and sixth points and equal imaginary magnitudes of opposite sign. The present invention relates to transmitter and a receiver for a digital communication system, the transmitter comprising: • - an encoder for encoding a sequence of information bits and for outputting a sequence of coded bits, • - a bit mapper arranged for being fed with said sequence of coded bits and for mapping said coded bits three-by-three to digital symbols, said digital symbols being a point of a predefined quadrature amplitude modulation constellation, said constellation having a first (B) and second point (H) of different amplitude and zero reference phase, a third point (A) having an amplitude equal to the amplitude of said first point and a 180 degree reference phase, a fourth point (G) having an amplitude equal to the amplitude of said second point and a 180 degree reference phase, • - a modulator arranged for receiving said sequence of said digital symbols and for applying a linear modulation to said sequence of said digital symbols, so that a transmit waveform is obtained, characterised by said predefined con said predefined constellation further having a fifth (D) and a sixth point (F) having real magnitudes larger than the real amplitude of said first point and equal imaginary magnitudes of opposite sign, and seventh (C) and eighth (E) points having real values equal to a negation of the real amplitude of said fifth and sixth points and equal imaginary magnitudes of opposite sign.

Description

TRANSMITTER FOR PERFORMING AN 8-QAM OR A 7-QAM MODULATION AND CORRESPONDENT RECEIVER

Field of the invention

[0001] The present invention is generally related to the field of digital communications systems. More in particular, it relates to a constellation for a linearly modulated digital communications link.

Background of the invention

[0002] In the present invention a constellation and bit mapping is considered for a linearly modulated digital communications link, for example a satellite communications link.

[0003] In a digital communication system one can, at the transmit side, often distinguish the processes of encoding and modulation. The information bits are first translated into a sequence of symbols (encoding) and subsequently the symbol sequence is translated to a transmit waveform (modulation). The transmit waveform usually has a band-pass spectrum. It can then still be represented by an equivalent complex baseband transmit waveform having only low frequency components, followed by quadrature modulation and possibly frequency up-conversion. In so-called linear modulation schemes, such as pulse-amplitude-modulation (PAM), quadrature amplitude modulation (QAM), phase-shift-keying (PSK) and amplitude-phase-shift-keying (APSK), the complex baseband waveform is obtained as the superposition of pulses of essentially finite duration, each pulse being the product of a complex-valued symbol with a delayed instance of a pulse known as the transmit impulse response. The set of complex-valued symbols is known as the constellation. In so- called non-linear modulation schemes, such as continuous-phase-modulation (CPM) the complex baseband transmit waveform is not the superposition of pulses related to a single symbol.

[0004] The geometry of a constellation determines the theoretical capacity, known as the Shannon capacity, to convey information for a system with a given ratio of symbol energy to noise power density (E_s/N₀), and for the best possible encoding. Digital communication systems often use binary encoding. In that the case the encoder in general does not directly map the message bits to symbols. Rather it maps the message bits to code bits. Subsequently a group of code bits is used to designate a transmit symbol. The latter operation is commonly called bit mapping and the group of code bits designating a transmit symbol is called a bit label. This process is usually mirrored at the receive side by bit demapping, followed by binary decoding. The bit demapping and binary decoding process can be done iteratively, which technique is known as iterative demapping (as detailed for example in US6353911). This however entails significant complexity. Non-iterative demapping and binary coding/decoding may on the other hand entail a loss in capacity of the communication link compared to the Shannon capacity. The loss can be mitigated by adapting the geometry and bit labelling of the constellation.

[0005] Another important aspect of digital communications is carrier synchronisation. Carrier synchronisation is needed because the channel modifies the signal phase between the transmitter output and the receiver input as a result of

slow frequency drift effects due to ageing of oscillators and thermal effects

the Doppler effect, caused by movement of terminals or relay devices, such as a satellite random phase fluctuations known as phase noise, occurring in local oscillators used for frequency conversion

Carrier synchronisation commonly uses a feed-back servo known as a phase locked loop that adapts the phase of a local reference oscillator in the receiver, in order to track and cancel phase variations in the channel. The phase locked loop (PLL) comprises a phase error detector (PED) that measures the phase difference between the received symbols and said reference oscillator. The PED can make use of any a priori known symbols or partially known symbols in the transmit symbol sequence. Inserting such symbols slightly reduces the capacity of the digital communication link to carry useful information. Therefore often the PED uses no such knowledge. This situation is known as non-data- aided (NDA) carrier synchronisation. Communication links comprising powerful error correction in general operate at low signal-to-noise ratios. In such conditions the system noise reduces the amount of phase information conveyed per symbol. This is especially true in NDA synchronizers, because the added noise introduces uncertainty regarding the value of a received symbol and consequently regarding the direction in which to adjust the local reference oscillator. The phase uncertainty introduced in this way by additive noise in the channel can be reduced by selecting a lower value for the loop noise bandwidth B_L of the PLL. However, selecting a lower bandwidth also reduces the ability to track channel phase variations, so the selection of the loop noise bandwidth B_L typically involves a compromise between two phase error contributions, firstly, the residual phase uncertainty caused by limited filtering of additive noise effects, and, secondly, the residual non-tracked channel phase variation. It would obviously be desirable to limit as much as possible the phase error. It will however be readily understood by a person skilled in the art of digital communication that reducing the first contribution allows rebalancing the combined effect of both contributions achieving a better overall phase error performance.

[0006] In document US7254188 a method and system for modulating and detecting high data rate sym bol communications is presented, which performs well in channels having a fixed spectral efficiency. A quadrature amplitude modulation (QAM) constellation and an optimized mapping are employed to encode/detect a communications signal and error correction is provided using high speed forward error correction techniques. The proposed QAM-constellation is shown in Fig.l. The constellation has two points, B and H in Fig.l, of differing amplitude and zero reference phase. Points A and G have an amplitude equal to that of points B and H, respectively, while their phase reference is 180 degree. Points D and F have real magnitudes substantially equal to the amplitude of point A and equal imaginary magnitudes of opposite sign. Points C and E have real magnitudes substantially equal to a negation of the amplitude of point A and equal imaginary magnitudes of opposite sign. Hence, as can be seen in Fig.l, the real magnitude of points a, B, C, D; E, F is substantially 1.

[0007] Hence, there is a need for a solution where the drawbacks and limitations of the prior art solutions are overcome.

Summary of the invention

[0008] It is an object of embodiments of the present invention to provide for a constellation scheme that allows for improved performance.

[0009] The above objective is accomplished by the solution according to the present invention.

[0010] In a first aspect the invention relates to a transmitter for a digital communication system comprising

- an encoder for encoding a sequence of information bits and for outputting a sequence of coded bits, - a bit mapper arranged for being fed with said sequence of coded bits and for mapping said coded bits three-by-three to digital symbols, said digital symbols being a point of a predefined quadrature amplitude modulation constellation, said constellation having a first and second point of different amplitude and zero reference phase, a third point having an amplitude equal to the amplitude of said first point and a 180 degree reference phase, a fourth point having an amplitude equal to the amplitude of said second point and a 180 degree reference phase,

- a modulator arranged for receiving said sequence of said digital symbols and for applying a linear modulation to said sequence of said digital symbols, so that a transmit waveform is obtained, characterised by said predefined constellation further having a fifth and a sixth point having real magnitudes substantially larger than the real amplitude of said first point and equal imaginary magnitudes of opposite sign, and seventh and eighth points having substantially equal to a negation of the real amplitude of said fifth and sixth points and equal imaginary magnitudes of opposite sign.

[0011] In an advantageous embodiment the fifth, sixth, seventh and eighth points have a real magnitude of substantially 1, and said first and second point have a real magnitude substantially smaller than 1. [0012] In one embodiment the first and the second point have a real magnitude substantially equal to 0.35. In another embodiment the first and the second point have a real magnitude substantially equal to 0.

[0013] In a preferred embodiment the bit mapper is arranged for applying a 3-by-3 mapping represented by [000,001,010,011, 100, 101,110,111] for said first, fifth, sixth, second, third, seventh, eighth, fourth point, respectively.

[0014] In a preferred embodiment the encoder is arranged for applying low density parity check, LDPC, coding, in particular LDPC coding with a rate 100/180 or a rate 104/180 and an LDPC encoder matrix described through a table whereby each successive row of said table provides all parity bit addresses j for the first information bit in each successive group of 360 information bits.

[0015] In another aspect the invention relates to a receiver for a digital communication system comprising

- a demodulator arranged for receiving a quadrature amplitude modulated stream of digital symbols and for outputting a sequence of demodulated digital symbols,

- a bit demapper arranged for being fed with said sequence of demodulated symbols and for determining a three-valued representation for said demodulated symbols associated with points of a predefined constellation, said three-valued representation being a set of confidence values for each bit position, said predefined constellation having a first and second point of different amplitude and zero reference phase, a third point having a real amplitude equal to the amplitude of said first point and a 180 degree reference phase, a fourth point having a real amplitude equal to the amplitude of said second point and a 180 degree reference phase, and

- a decoder arranged for receiving said set of confidence values and for determining bit values, characterised by said predefined constellation further having a fifth and a sixth point having real magnitudes substantially larger than the amplitude of said first point and equal imaginary magnitudes of opposite sign, and seventh and eighth points having substantially equal to a negation of the amplitude of said fifth and sixth points and equal imaginary magnitudes of opposite sign.

[0016] Advantageously, the receiver is arranged for performing iterative demapping operations.

[0017] In another embodiment the decoder in the receiver is adapted for performing low density parity check decoding. Preferably the decoder is adapted for performing low density parity check decoding of an LDPC code with a rate 100/180 or a rate 104/180 with an LDPC encoder matrix described through a table whereby each successive row of said table provides all parity bit addresses j for the first information bit in each successive group of 360 information bits. [0018] In a further aspect the invention also relates to a digital communication system comprising a transmitter as previously described and a receiver as described.

[0019] In a preferred embodiment the digital communication system is arranged for applying also other constellations.

[0020] In one embodiment the digital communication system further comprises a control unit for adapting constellation parameters. Advantageously, the control unit is arranged for receiving information indicative of the link quality. In a specific embodiment the information indicative of the link quality is obtained from the demodulator and/or the decoder. [0021] For purposes of summarizing the invention and the advantages achieved over the prior art, certain objects and advantages of the invention have been described herein above. Of course, it is to be understood that not necessarily all such objects or advantages may be achieved in accordance with any particular embodiment of the invention. Thus, for example, those skilled in the art will recognize that the invention may be embodied or carried out in a manner that achieves or optimizes one advantage or group of advantages as taught herein without necessarily achieving other objects or advantages as may be taught or suggested herein.

[0022] The above and other aspects of the invention will be apparent from and elucidated with reference to the embodiment(s) described hereinafter.

Brief description of the drawings

[0023] The invention will now be described further, by way of example, with reference to the accompanying drawings, wherein like reference numerals refer to like elements in the various figures.

[0024] Fig.l illustrates a 8-QAM constellation disclosed in US7254188.

[0025] Fig.2 illustrates a block diagram of a digital communications system employing linear modulations.

[0026] Fig.3 illustrates the geometry of an 8-ary constellation according to the invention.

[0027] Fig.4 illustrates a prior art octal constellation (8-PSK) used as reference in the performance simulations.

[0028] Fig.5 illustrates the Shannon Signal to Noise Ratio threshold improvement in dB realized by an 8-ary constellation according to the invention compared to a prior art technique (8- QAM with equal point distances).

[0029] Fig.6 represents the jitter improvement of an optimal (Cramer Rao bound achieving) carrier synchronizer for three constellations: the 8-ary constellation according to the invention and two prior art constellations (8-PSK and 8-QAM with equal point distances). [0030] Fig.7 illustrates the spectral shape of in-band distortion generated by the 8-QAM constellation disclosed in US7254188 and by the constellation of this invention,

the pre-decoding hard decision bit error ratio for three constellations based on average symbol energy : the 8-ary constellation according to the invention and two prior art constellations (8-PSK and 8-QAM with equal point distances).

[0031] Fig.8 illustrates AM/AM characteristics of a app TWTA model.

[0032] Fig.9 illustrates the frame error rate as a function of E_s/N₀ for the constellation of the invention and for a 8-PSK constellation.

[0033] Fig.10 illustrates the labelling.

Detailed description of illustrative embodiments

[0034] The present invention will be described with respect to particular embodiments and with reference to certain drawings but the invention is not limited thereto but only by the claims.

[0035] Furthermore, the terms first, second and the like in the description and in the claims, are used for distinguishing between similar elements and not necessarily for describing a sequence, either temporally, spatially, in ranking or in any other manner. It is to be understood that the terms so used are interchangeable under appropriate circumstances and that the embodiments of the invention described herein are capable of operation in other sequences than described or illustrated herein.

[0036] It is to be noticed that the term "comprising", used in the claims, should not be interpreted as being restricted to the means listed thereafter; it does not exclude other elements or steps. It is thus to be interpreted as specifying the presence of the stated features, integers, steps or components as referred to, but does not preclude the presence or addition of one or more other features, integers, steps or components, or groups thereof. Thus, the scope of the expression "a device comprising means A and B" should not be limited to devices consisting only of components A and B. It means that with respect to the present invention, the only relevant components of the device are A and B.

[0037] Reference throughout this specification to "one embodiment" or "an embodiment" means that a particular feature, structure or characteristic described in connection with the embodiment is included in at least one embodiment of the present invention. Thus, appearances of the phrases "in one embodiment" or "in an embodiment" in various places throughout this specification are not necessarily all referring to the same embodiment, but may. Furthermore, the particular features, structures or characteristics may be combined in any suitable manner, as would be apparent to one of ordinary skill in the art from this disclosure, in one or more embodiments. [0038] Similarly it should be appreciated that in the description of exemplary embodiments of the invention, various features of the invention are sometimes grouped together in a single embodiment, figure, or description thereof for the purpose of streamlining the disclosure and aiding in the understanding of one or more of the various inventive aspects. This method of disclosure, however, is not to be interpreted as reflecting an intention that the claimed invention requires more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive aspects lie in less than all features of a single foregoing disclosed embodiment. Thus, the claims following the detailed description are hereby expressly incorporated into this detailed description, with each claim standing on its own as a separate embodiment of this invention.

[0039] Furthermore, while some embodiments described herein include some but not other features included in other embodiments, combinations of features of different embodiments are meant to be within the scope of the invention, and form different embodiments, as would be understood by those in the art. For example, in the following claims, any of the claimed embodiments can be used in any combination.

[0040] It should be noted that the use of particular terminology when describing certain features or aspects of the invention should not be taken to imply that the terminology is being redefined herein to be restricted to include any specific characteristics of the features or aspects of the invention with which that terminology is associated.

[0041] In the description provided herein, numerous specific details are set forth. However, it is understood that embodiments of the invention may be practiced without these specific details. In other instances, well-known methods, structures and techniques have not been shown in detail in order not to obscure an understanding of this description.

[0042] The present invention discloses a transmitter and a receiver for a digital communication system with linear modulation.

[0043] Fig.2 shows a communication system with linear modulation. The incoming digital data is encoded with a forward error correcting code. This encoder can be a single encoder, but can also be the concatenation of several encoders. In case the encoder uses a binary code the output is a stream of coded bits. Then bits are mapped to symbols belonging to a certain constellation such as PSK, APSK or QAM. An interleaver may further reorder code bits prior to mapping in order to improve overall system performance. A person skilled in the art of digital communications will readily understand that the encoder, interleaver and mapper may at different times employ different code rules, interleaving rules and constellations. A person skilled in the art of digital communications will readily understand that rules and constellations may be varied using a fixed or adaptive pattern, techniques commonly known as variable coding and modulation (VCM) and adaptive coding and modulation (ACM). The present invention relates to a particular constellation geometry and therefore by extension to any digital communication system or scheme using this constellation geometry all the time or only a fraction of the time. A person skilled in the art of digital communications will readily understand that in addition a priori known symbols or partially a priori known symbols may be inserted for the purpose of assisting receiver synchronisation. The symbol sequence is then fed to a modulator applying a linear modulation. The modulator generates a waveform that is transmitted through a channel, such as a satellite communications channel. At the receiver side the waveform is demodulated to obtain the receive value of the symbols. The receive value of a symbol is not exactly equal to the transmit value, due to channel effects such as the addition of noise and distortion. The symbols are subsequently demapped. The demapper outputs likelihood ratios of the coded bits, which are next fed to the decoder. Like the encoder, the decoder can be composed of one or more concatenated decoders. A person skilled in the art of digital receivers will readily understand that one or more decoders can process the received information in an iterative manner and one or more decoders can also exchange information with the demapper in an iterative fashion, as illustrated in Fig.2. Both the receiver and the decoder may provide information regarding the quality of the received signal, more in particular regarding the link margin. This information may be used by an adaptive coding and modulation unit to influence the selection of the current coding, interleaving, mapping and constellation parameters, to increase the availability or the throughput of the communications link.

[0044] Fig.3 shows a constellation according to the present invention. The constellation has 8 points and is therefore adapted for use with a binary encoder providing log₂(8)=3 bits per transmit symbol sent. The constellation geometry is explained using three parameters Γ , Γ₂, Γ₃. A person skilled in the art of digital communications will readily understand that a same constellation geometry can be described using several equivalent parameter sets, for example the relative location of constellation points may be expressed using polar coordinates. A parameter set {Γ , Γ₂, Γ₃} is chosen here for the purpose of explaining advantages of the present invention compared to prior art, in particular the prior art in US7254188. It is also obvious to a person skilled in the art that a common magnitude scaling factor .fif can be applied to all constellation points without changing the scope of the invention, since this is equivalent to applying a signal gain factor. In particular, a scaling factor

^ = (1/2) · (Γ_Ι ² + 9Γ₂ ² + 8Γ₃ ² + 2)^ may be applied to obtain a mean squared amplitude of the signal points equal to 1 in the representation of Fig.3. Furthermore a common angular rotation may be applied to all constellation points without changing the scope of the invention, since this is equivalent to a transmit signal phase rotation. The constellation of the present invention is characterized by a parameter value Γ substantially different from the value one. In particular it may be substantially smaller than one and even be zero. When the parameter Γ approaches zero the points A and B cannot be distinguished in the receiver prior to decoding, but this can nevertheless lead to better end-to-end performance in a communications system using the constellation, in particular at medium to low signal-to-noise ratios. When the parameter Γ becomes zero, the 8-ary constellation becomes effectively a 7-ary constellation, meaning that whenever one of the coinciding points A or B is designated by the encoder a transmit symbol value 0 is used by the modulator. When the three-bit code bit labels of the points A and B differ in one bit position, a receive symbol value close to 0 conveys little a priori information about the corresponding code bit value, but on the other hand the receiver benefits from lower a priori uncertainty regarding the other two code bits in the bit label.

[0045] Fig.4 shows a well-known prior art 8-ary constellation known as 8-PSK having 8 equidistant constellation points placed on a circle. This constellation is used as a reference in the performance simulations presented below. Also the 8-QAM constellation disclosed in US7254188 and shown in Fig.l is used as reference in the performance simulations. Note that in the latter constellation the geometry factor here referred to as Γ is substantially equal to 1.

[0046] We now turn to advantages of the constellation according to the invention over constellations as in Fig.l having a parameter Γ₁ not substantially equal to 1, in particular constellations with a parameter Γ₁ substantially lower than 1. A simplified model of the combined waveform modulator, channel and demodulator of Fig.2 is the well-known discrete-time additive white Gaussian noise memory-less channel model, further referred to as the AWGN channel, described by the equation y(n) = x(n) + win) applicable to each transmitted symbol x(n) and the corresponding output y(n) of the channel disturbed by noise contributions w(n) modelled as independent identically distributed complex Gaussian random variables with variance 2<7² = (E_S /N₀ )^~1 for a constellation having above mentioned symbol energy normalization and a link signal-to-noise ratio parameter E_S/N₀ . It is well known that the average information conveyed per symbol, for equally likely transmit symbols χ(ή) , even with the best possible encoding and decoding, will approach arbitrarily close but never exceed the mutual information expression

where the Gaussian condi

is given expression σ^~2 - exp(- |y - x|²/2a²).

The achievable information rate per symbol _{Xj expressed by this formula, also known as the modulation constrained Shannon information rate or, more precisely, the modulation constrained Shannon symmetric information rate depends only on the constellation design and the signal-to-noise parameter 2σ² = (E_s/N₀ )^_1. Conversely, for a given target spectral efficiency of C{_Xj [bit/symbol] the corresponding minimal required value of E_s/N₀ , also known as the achieva ble E N₀ threshold, can be determined from the above mathematical relation. A better constellation is characterized by a lower such threshold. The relative ability of constellations for conveying information can be assessed by computing the ratio of their respective E N₀ thresholds. Fig.5 illustrates, for a predetermined target information rate of _{xj = 1.7 [bit/symbol], the improvement in achieva ble E. /N₀ threshold, expressed in decibels (dB), of the constellation according to the present invention compared to the 8- QAM prior art constellation of Fig.l with fixed parameters Γ_: = Γ₂ = Γ₃ = 1. The parameters and

Γ₂ for the constellation according to the present invention take values corresponding to the horizontal and vertical axis labels respectively in Fig.5 and the parameter Γ₃ is set to the value 0.9. The curved contours shown in Fig.5 are the loci of parameter combinations resulting in the improvement in E_s/N₀ threshold, expressed in dB, shown in the label of each contour. It follows that an improvement in achievable E_s/N₀ threshold up to 0.15 dB results for parameter Γ₂ around the value 0.7 and parameter Γ, taking a value substantially below 1 and in particular also for the value Γ, = 0 where points A and B in the constellation coincide. This seems counterintuitive, but it can be readily understood as follows. An octal constellation having two coinciding constellation points evidently cannot convey more than log₂(8 - 1) = 2.8 [bit/symbol] at any value of E_s/N₀ but clearly it can convey _{xj = 1.7 [bit/symbol] at a substantially lower E_s/N₀ value than the 8-QAM prior art constellation of Fig.l. In the same way the constellation according to the present invention is also compared to the 8-PSK prior art constellation of Fig.4. The result is that the improvement now increases by another 0.24 dB, more precisely all contour labels in Fig.5 are augmented by 0.24. The advantage in achievable E N₀ threshold of the present invention compared to 8-PSK thus takes the value 0.15+0.24=0.39 dB for parameters Γ_: = 0, Γ₂ ~ 0.7, Γ₃ = 0.9 .

[0047] An optimal set of parameters for the parameters Γ , Γ₂, Γ₃ can be as follows. For Γ and Γ₂ the following combinations are advantageous : (Γ = 0.419, Γ₂ = 0.95) and (Γ = 0.350, Γ₂ = 0.96). For Γ₃ a value higher than 0.7 is recommendable. [0048] In Fig.6 the advantage is illustrated of a constellation according to the present invention regarding the level of the phase error contribution due to additive channel noise in a NDA carrier synchronizer circuit. This advantage can be exploited to achieve a reduced overall phase error when also other sources of phase error, in particular channel phase noise in radio links, are present. Especially, in NDA carrier synchronizers phase error contribution due to additive channel noise depends strongly on the constellation design, on the signal-to-noise ratio parameter E_s/N₀ , on the phase error detector (PED) used in the carrier PLL and on the loop noise bandwidth B_L of this PLL relative to the transmit symbol rate. Fig.6 applies to the above-mentioned additive white Gaussian noise memory-less channel model and compares, for a loop bandwidth B_L of 0.01% times the transmit symbol rate, the mean-square-error phase error, expressed, in [rad²], in 4 systems differing in the constellation design and the PED design

a) First prior art case, being a system using the 8-PSK constellation of Fig.4 and an optimal PED optimal PED adapted for this constellation at a preset signal-to-noise ratio E N₀ as given by the horizontal axis of Fig. 6,

b) Second prior art case, being a system using the 8-QAM constellation according to Fig. 1 and a common PED similar to the one reported in US7254188,

c) Third prior art case, being a system using the 8-QAM constellation according to Fig. 1 with an optimal PED adapted for this constellation at a preset signal-to-noise ratio.

d) Present invention case, being a system using the constellation according to the invention and characterized by parameters = 0.35 ; Γ₂ = 0.7 ; Γ₃ = 0.9 and an optimal PED adapted for this constellation at a preset signal-to-noise ratio.

An optimal PED is defined as any synchronizer with a performance expressed by

where

is the probability density for observing a complex AWGN channel output symbol value y for a single receive symbol suffering a residual phase rotation Θ . E_y denotes an averaging over all possible output values of the channel, in principle the entire complex plane. An example of an optimal PED is a PED converting the measured complex channel output value y into a scalar output value to within an fixed

scale factor, or realizing any function substantially equal to this in a region of the complex plane including all constellation points. As is as well known to a person skilled in the art, such a scale factor is equivalent to a fixed gain in the PLL and is compensated when choosing circuit components or scale factors in an analogue or digital embodiment of a PLL, adapted to realize a preset loop noise bandwidth. It is seen in Fig.6 that for a preset signal-to-noise ratio parameter E_s/N₀ = 5 dB and a loop noise bandwidth of 0.01% of the symbol rate in the case of the present invention a phase error variance is realized that is respectively and approximately 18, 10 and 3 times lower than the phase error variance in said first, second and third prior art cases.

[0049] Another advantage of the constellation according to the present invention is illustrated in Fig. 7 and relates to the spectral shape of the in-band distortion generated when the transmit waveform is passed through a memory-less non-linearity characterized by the well-known Rapp model (Rapp parameter S=3) characterized by a relatively benign memory-less AM/AM and AM/PM characteristics as shown in Fig. 8 having zero or negligible AM/PM distortion. This is a good model for some Ku and Ka band solid-state-power amplifiers (SSPA). The simulation in both cases used a same input back-off of OdB, meaning that the average input power level of the modulated signal equals the power level of the continuous wave transmission having a power level coinciding with the asymptote crossing point in the SSPA Rapp model. The simulation used further an excess bandwidth for the TX baseband filter of 15%. Fig. 6 illustrates that in case of a signal according to the present invention (having parameters Γ, = 0.35 , Γ, = 0.7 , Γ₃ = 0.9 ) the in-band distortion is lower by a few dB compared to the case of a signal with a constellation as in Fig. 1 with parameters = 1 , Γ₂ = 1 , Γ₃ = 1 . The in-band nonlinear distortion can be derived in mathematical simulation by subtracting from the SSPA output signal the best fitting scaled version of the SSPA input signal. It can also be demonstrated practically in the lab using equipment for echo-cancelling to ideally subtract the desired signal from the signal + distortion signal complex.

[0050] To illustrate the applicability of the constellation according to this invention with an example, performance evaluations have been carried out. A low-density parity-check (LDPC) code similar to the one defined in the DVB-S2 standard (ETSI EN 302 307 vl.2.1: Digital Video Broadcasting (DVB), Second generation framing structure, channel coding and modulation systems for Broadcasting, Interactive Services, News Gathering and other broadband satellite applications (DVB- S2)), hereinafter referred to as ETSI EN 302307, is used to encode the data bits prior to the symbol mapping and modulation (as shown in Fig. 3). A state-of-art receiver including a demapper and decoder is used to evaluate the frame error rate (FER) performance of the new constellations. Fig.9 shows the results. Note that no iterative demapping is applied here. Fig.10 illustrates the labelling. [0051] Any of several known binary or non-binary codes may be used with the constellation of the present invention. In particular the constellation may be used with binary low density parity check codes, for example the low-density parity-check codes defined in ETSI EN 302307. These codes may be described by a parity check matrix and interleaver description as explained in Sec. 5.3 in ETSI EN 302307. In order to reduce the storage requirements of the parity-check matrices by a factor M, the check nodes connected to the i^th bit node in a group of M bits can be easily determined from the check nodes connected to the first bit node of that group of M bits. From the above description, it is clear that adjacent check nodes of only one bit node need to be specified in a group of M bits. In ETSI EN 302307, M is equal to 360. In ETSI EN 302307 these check nodes are identified through the addresses of parity bit accumulators (see Sec. 5.3 in ETSI EN 302 307). These addresses are given in a table, whereby each successive row of the table provides all parity bit addresses j for the first information bit in each successive group of M information bits.

[0052] As is well known, although most good binary codes give reasonably good system performance for most constellations, achieving state-of-the-art performance requires adapting the code to the particular constellation used. This generally involves selecting a code structure and optimizing code parameters. For example, for codes having a same structure as codes defined in ETSI EN 302307, it involves selecting said address parity bit accumulator tables, in order to optimize the performance. The present invention therefore also discloses applying rate 100/180 and rate 104/180 binary codes having the structure of ETSI EN 302307, however also having parity bit accumulator address table adapted to provide state-of-the art performance in combination with the constellation as previously proposed.

A. Addresses of parity bit accumulators for number of code bits 64 800 and code rate 100/180 690 1366 2591 2859 4224 5842 7310 8181 12432 15667 15717 16935 17583 19696 20573 21269

2488 2890 6630 6892 11563 12518 15560 16798 18355 18746 19165 19295 21567 23505 23617 23629 321 2844 2894 39864538 7599 7816 9831 10247 11556 16068 17249 18194 23043 23100 25938

2503 2827 4771 5929 6400 7437 8054 10897 11633 14404 16133 17101 24425 24973 25086 25802

1462 2099 3910 5131 5352 8832 9495 9624 10796 12906 13903 14724 14946 17708 21034 26612

260 523 1427 3435 4517 9494 12594 12688 12726 14163 16537 17424 18424 20321 25101 28269

2131 2407 4820 7167 11783 15249 15982 18761 22162 24593 24971 25831 26351 27005 28348 28793 2089 5829 6119 7505 77588122 9870 12107 16656 17582 19115 23738 27646 27692 27862 28356

2714 3288 3337 5013 621080809348 12919 13458 13621 18015 21024 24044 24761 25610 26317

1305 3402 5830 7095 8852 95809793 11157 12725 14355 20659 21400 22289 23823 26250 27006

12936 15702 23593 3616 17219 18621 1234 12759 26749 396 3017 18360 10664 21597 26165 12986 14553 24818 18403 21213 28302 6515 18331 19413 19649 26219 27483 2538 15793 17528 7871 9374 20785 5494 8084 21558 6691 7770 14306 3247 7417 18827 11615 15987 20081 1527 15272 26042 10540 15548 23849 223 2601 25888 2395 21465 28501 19703 21589 27252 12832 15726 25300 3750 10030 16124 401 6474 28682 4424 19876 25563 590 12853 14779 25185 25539 25920 6857 23329 25764 3467 23205 23751 9278 24364 25033 14956 19104 22487 21856 26163 27130 2067 17357 22055 50 14414 19142 306 445 16437 2260 13892 17608 8893 12230 16916 5943 8921 16380 5079 15385 21951 5108 6038 8513

2126 6749 7330

3814 11941 22949

2301 15416 26731

3498 14463 20417

2062 10434 10746

18128 18960 23452

13080 13129 27193

18818 24995 27087

7198 11948 23135

17206 18524 25811

5202 10030 10076

8497 23410 23991

1553 1968 13135

4426 10786 23259

92 7941 23045

6356 14028 23104

18319 20286 22984

5778 25335 26191

662 15922 27478

2920 9733 18974

15337 27509 27519

8659 25028 27723

14865 24564 26361

1383 21234 21770

10767 25752 25843

7717 14536 24248

278 2803 2966 3547 4128 4829 4981 6699 6716 14183 14239 15939 16996 19694 20073

3022 3087 10039 10174 11403 12146 13689 14934 17765 18121 18936 21818 27202 27532 28192 817 3888 4102 9441 10165 10941 18131 20028 22305 23832 25225 26228 27208 27245 27390

6346 7992 9053 11187 12124 16435 16850 21269 21580 22096 23700 24751 26264 27318 27576

1440 3291 5755 12247 12272 15394 15659 15764 16338 17373 18840 19597 19812 22415 27062

937 3118 8745 10933 12703 13906 14113 21442 21539 28140

247 2465 2918 3189 5886 11451 16862 17458 20908 26608

58 10104 11815 14429 16531 19797 24071 26021 28000 28489

4367 5710 7855 14203 18071 19336 19880 20166 26774 28554

191 1085 4068 7452 11739 15962 17501 19172 24130 28476 4961 19716 19964 23479 24004 24340 25537 27930

1688 2235 10464 15112 15134 25143 25910 28689

765 11839 17427 19754 21445 22034 23493 25296

277 7947 9952 12228 12595 16563 19758 21721

1575 2652 5226 8159 16624 25446 26417 26722

10571 17389 22602

1331 7875 18475

11738 13853 23914

9412 11361 26507

16877 23022 27060

2627 16649 22369

9446 14752 28540

4496 7705 22247

2439 19741 28550

6605 12623 26774

B. Addresses of parity bit accumulators for number of code bits 64 800 and code rate 104/180 2087 6318 7314 8327 9453 12989 13156 13763 13819 16963 18495 19352 20510 20651 23379 23847 23953 26469

2680 5652 6816 7854 10673 11431 12379 14570 17081 19341 20749 21056 22990 23012 24902 25547 26718 27284

2142 3940 4724 4791 6617 68009349 9380 10073 10147 11750 12900 16044 16156 17769 21600 21669 22554 1588 3097 4277 6181 6737 8974 9793 12215 12814 17953 18270 21808 22625 24390 25429 25750 25967 26391

561 5825 7106 7166 7475 11844 12905 13559 13978 14176 14437 16070 16587 19792 20187 23754 26070 27232

673 1783 40464887 559683909229 12315 14252 14415 14529 17837 20013 20032 22201 22487 24412 25792 1261 1910 3767 6244 7050 7367 9230 12972 13229 13472 14287 14494 16776 20523 20738 21591 23622 25206

1618 2106 3640 6304 798481589072 9311 12618 15746 16985 18923 20959 21267 23375 24052 24260 24827 6256 6931 7276 7356 7832 12284 12405 13083 13602 14750 19021 20026 22661 23283 24427 25301 25982 27279

2432 3076 3399 5305 737084068826 9237 10537 15492 15606 15619 16515 17562 19550 22525 24389 25740 157 296422 467 7125 9849 9997 15376 15506 16119 17153 17857 18639 23136

1275 1439 6162 82589031 10207 10472 16004 16641 17140 21342 22191 23200 25753 110 1073 6460 9208 10520 15833 15951 17494 18614 19970 20537 21512 21796 22135

3771 5399 5885 7905 8302 8614 10205 11133 11459 16044 22701 25170 26255 27086

1597 2640 2741 3790 5107 7470 9160 12078 12350 14020 18877 19507 22658 24290

4957 5961 6263 8201 8579 9392 10133 11712 14757 15678 15718 19528 25107 25122 870 4508 5944 7360 11724 15003 16387 19543 19893 20189 21942 23740 25686 25849

131 2044 6731 7619 7787 9109 9841 10006 10275 13687 16522 18212 24457 25197

504 1863 4246 5075 5448 6296 6930 11792 13736 14588 16340 17102 17807 26621

1137 1168 2366 3818 4311 6806 8583 10850 12198 12357 21357 23243 23568 25003

2353 11886 22548

1680 9112 12175

15126 16642 27030

5571 5719 19190

6232 13413 19728

8197 12068 17122

3220 3476 24534

1630 4345 23890

19815 20676 24443

12761 14080 15937

41 7963 23895

7658 13020 27128

1017 1447 3285

2268 22921 26255

261 13889 14175

13925 18777 18987

15136 24523 27156

12008 18484 19299

4304 9857 15134

2966 9278 9737

5469 15449 22259

11359 14186 20635

16453 21262 23629

5613 7100 11104

3959 14714 18116

7465 13803 24660

3939 7615 9891

12249 16491 22373

8734 14253 25616 5781 18719 23894

6208 6703 14626

1284 4730 23920

3920 13167 13366

3925 7147 27268

1926 12777 21092

675 8186 22557

487 9590 12433

7090 16031 27037

3083 10445 22950

380 4663 7195

960 12754 20597

1790 12476 24250

11307 22121 22266

3256 7625 12046

11034 11800 17383

6142 14781 19944

2679 11106 22783

7769 11060 15178

7384 9851 20205

14813 19271 22600

3085 11637 19934

6518 7995 19382

11070 15498 26380

248 16291 23824

4989 19436 26642

5954 16039 16042 20349 21326 24656 25427

2558 6628 9167 16825 19069 20808 22617

317 13859 14069 16104 18835 20040 26633 2866 4153 5875 11698 15287 19719 25808

536 6955 9735 16098 20694 24675 26881

25 7316 9961 21037

7823 19458 20404 25186

7142 11057 17748 24788

11315 12358 21583 21836

8995 9326 12826 25981

2281 10560 10674 19801 5001 6655 26231 26542

800 15131 18482 22621

9060 12257 24786 25188

3462 17201 18960 24462

17631 26360 26425

12774 20967 21391

14701 20696 26807

5931 13144 14022

128 16460 26300

801 9487 25937

6153 11296 23054

2749 14434 20049

1732 7646 20402

3839 11031 26022

2159 20918 21407

285 13785 24234

1977 3899 7972

4120 19101 23719 [0053] To illustrate the applicability of the above-mentioned LDPC codes with rate 100/180 and rate 104/180, adapted to provide low frame error ratio when used with the constellation according to the present invention, performance evaluations have been carried out. A receiver including a demapper and decoder is used to evaluate the frame error rate (FE ) performance of the new constellations in combination with the LDPC codes. The required channel quality, expressed by the E_s/N₀ parameter of the AWGN channel, in order to achieve a FER after decoding of 1 in 100000, was determined to amount to 4.72 dB for the rate 100/180 code and to 5.12 dB for the rate 104/180 code. Also in this evaluation no iterative demapping is applied.

[0054] While the invention has been illustrated and described in detail in the drawings and foregoing description, such illustration and description are to be considered illustrative or exemplary and not restrictive. The foregoing description details certain embodiments of the invention. It will be appreciated, however, that no matter how detailed the foregoing appears in text, the invention may be practiced in many ways. The invention is not limited to the disclosed embodiments.

[0055] Other variations to the disclosed embodiments can be understood and effected by those skilled in the art in practicing the claimed invention, from a study of the drawings, the disclosure and the appended claims. In the claims, the word "comprising" does not exclude other elements or steps, and the indefinite article "a" or "an" does not exclude a plurality. A single processor or other unit may fulfil the functions of several items recited in the claims. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage. A computer program may be stored/distributed on a suitable medium, such as an optical storage medium or a solid-state medium supplied together with or as part of other hardware, but may also be distributed in other forms, such as via the Internet or other wired or wireless telecommunication systems. Any reference signs in the claims should not be construed as limiting the scope.

Claims

1. Transmitter for a digital communication system comprising

2. Transmitter as in claim 1, wherein said fifth, sixth, seventh and eighth points have a real magnitude of substantially 1, and said first and second point have a real magnitude substantially smaller than 1.

3. Transmitter as in claim 1 or 2, wherein said first and second point have a real magnitude substantially equal to 0.35.

4. Transmitter as in claim 1 or 2, wherein said first and second point have a real magnitude substantially equal to 0.

5. Transmitter as in any of the previous claims, wherein said bit mapper is arranged for applying a 3- by-3 mapping represented by [000,001,010,011,100,101,110,111] for said first, fifth, sixth, second, third, seventh, eighth, fourth point, respectively.

6. Transmitter as in any of the previous claims, wherein said encoder is arranged for applying low density parity check, LDPC, coding with a rate 100/180 or a rate 104/180 with an LDPC encoder matrix described through a table whereby each successive row of said table provides all parity bit addresses j for the first information bit in each successive group of 360 information bits.

7. Receiver for a digital communication system comprising

- a bit demapper arranged for being fed with said sequence of demodulated symbols and for determining a three-bit representation for said demodulated symbols associated with points of a predefined constellation, said three-bit representation being a set of confidence values for each bit position, said predefined constellation having a first and second point of different amplitude and zero reference phase, a third point having a real amplitude equal to the amplitude of said first point and a 180 degree reference phase, a fourth point having a real amplitude equal to the amplitude of said second point and a 180 degree reference phase, and

8. Receiver as in claim 7, arranged for performing iterative demapping operations.

9. Receiver as in claim 7 or 8, wherein said decoder is adapted for performing low density parity check decoding.

10. Receiver as in claim 9, wherein said decoder is adapted for performing low density parity check decoding of an LDPC code with a rate 100/180 or a rate 104/180 with an LDPC encoder matrix described through a table whereby each successive row of said table provides all parity bit addresses j for the first information bit in each successive group of 360 information bits.

11. Digital communication system comprising a transmitter as in any of claims 1 to 6 and a receiver as in any of claims 7 to 10.

12. Digital communication system as in claim 11, arranged for applying also other constellations.

13. Digital communication system as in claim 11 or 12, further comprising a control unit for adapting constellation parameters.

14. Digital communication system as in claim 13, wherein said control unit is arranged for receiving information indicative of the link quality.

15. Digital communication system as in claim 14, wherein said information indicative of the link quality is obtained from said demodulator and/or said decoder.