WO2014080586A1 - Variable-gain amplifier and tuner system equipped with same - Google Patents

Variable-gain amplifier and tuner system equipped with same Download PDF

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Publication number
WO2014080586A1
WO2014080586A1 PCT/JP2013/006571 JP2013006571W WO2014080586A1 WO 2014080586 A1 WO2014080586 A1 WO 2014080586A1 JP 2013006571 W JP2013006571 W JP 2013006571W WO 2014080586 A1 WO2014080586 A1 WO 2014080586A1
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Prior art keywords
amplifier
variable
gain
signal
phase
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PCT/JP2013/006571
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French (fr)
Japanese (ja)
Inventor
晋一朗 上村
貴文 那須
克昌 土方
錠二 林
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パナソニック株式会社
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Priority to JP2014548443A priority Critical patent/JPWO2014080586A1/en
Publication of WO2014080586A1 publication Critical patent/WO2014080586A1/en

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03GCONTROL OF AMPLIFICATION
    • H03G3/00Gain control in amplifiers or frequency changers without distortion of the input signal
    • H03G3/20Automatic control
    • H03G3/30Automatic control in amplifiers having semiconductor devices
    • H03G3/3052Automatic control in amplifiers having semiconductor devices in bandpass amplifiers (H.F. or I.F.) or in frequency-changers used in a (super)heterodyne receiver
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03GCONTROL OF AMPLIFICATION
    • H03G1/00Details of arrangements for controlling amplification
    • H03G1/0005Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal
    • H03G1/0088Circuits characterised by the type of controlling devices operated by a controlling current or voltage signal using discontinuously variable devices, e.g. switch-operated

Definitions

  • the present invention relates to a receiver used in a communication system or a broadcasting system, and relates to a variable gain amplifier that requires low noise characteristics and low distortion characteristics.
  • Wideband low-noise amplifiers used in radio reception systems have a wide variable gain range.
  • the gain is increased to increase sensitivity, while the electric field of the received signal is strong. In some cases, the gain is lowered to increase the distortion characteristic of the saturated signal.
  • automatic gain control Auto-Gain Control: hereinafter referred to as AGC
  • AGC automatic gain control
  • the gain of the variable amplifier is controlled by changing parameters such as the attenuation of the attenuator inserted in the input or output of the amplifier, the parallel number of the amplifier, and the bias current.
  • parameters such as the attenuation of the attenuator inserted in the input or output of the amplifier, the parallel number of the amplifier, and the bias current.
  • the phase of the output of the amplifier is greatly rotated, and the carrier-to-noise ratio (Carrier Noise Ratio: C) of the entire receiver using the amplifier. (N ratio) deteriorates.
  • a bandwidth of a frequency of 470 MHz to 770 MHz is used, and an orthogonal frequency division multiplexing is used as a transmission channel encoding method.
  • OFDM Orthogonal Frequency-Division Multiplexing
  • the modulation method is 64QAM, which requires a wide variable gain range and seamless gain change.
  • a tuner system that receives the ISDB-T signal needs to suppress a phase shift within ⁇ 3 °.
  • a seamless gain change is required even in a mobile terminal in which the radio wave state constantly changes.
  • Patent Document 1 discloses a technique for suppressing phase rotation. Specifically, the bias of the terminal of the transistor is changed so that the amplitude-phase modulation conversion having the opposite algebraic code occurs with respect to the phase shift caused by the amplifier. In this technique, the bias current of the amplifier is changed by changing the bias of the terminal of the transistor, and the phase shift of the output signal caused by the amplifier is suppressed.
  • an object of the present invention is to suppress a phase shift of an output signal of a variable gain amplifier even when a seamless gain change is performed in a variable gain amplifier that requires a wide variable gain range. .
  • a variable gain amplifier includes a phase correction circuit that adjusts a phase of an input signal, an amplifier that has a variable gain function, amplifies the signal adjusted in phase by the phase correction circuit, and a gain.
  • the control circuit when the gain of the amplifier is changed, sets the gain of the amplifier by the gain setting signal and outputs the phase adjustment signal corresponding to the gain to be set to the phase correction circuit. Controls phase adjustment.
  • the control circuit controls the amount of phase adjustment of the input signal by the phase correction circuit according to the changed gain, so that the phase error (phase shift generated when the gain changes) ) Can be controlled to be canceled by the phase correction circuit. Therefore, even when the gain is changed seamlessly, the phase shift of the output signal of the variable gain amplifier can be kept small. Further, since the phase correction circuit can finely adjust the gain, finer gain setting is possible.
  • the tuner system includes the variable gain amplifier described in the first aspect.
  • the tuner system since the tuner system includes the variable gain amplifier described in the first aspect, the phase error can be suppressed to a small value and a good carrier-to-noise ratio can be obtained.
  • the phase error before and after the gain switching can be suppressed to be small, and the finer Gain setting is also possible.
  • a good carrier-to-noise ratio can be obtained in a system using this variable gain amplifier.
  • FIG. 1 is a circuit diagram illustrating a configuration example of a variable gain amplifier according to a first embodiment.
  • FIG. It is a circuit diagram which shows the other structural example of the variable gain amplifier which concerns on 1st Embodiment. It is a circuit diagram which shows the other structural example of the variable gain amplifier which concerns on 1st Embodiment. It is a circuit diagram which shows the other structural example of the variable gain amplifier which concerns on 1st Embodiment. It is a circuit diagram which shows the other structural example of the variable gain amplifier which concerns on 1st Embodiment. It is a figure which shows an example of a variable capacity
  • variable gain amplifier which concerns on 1st Embodiment. It is a circuit diagram which shows the other structural example of the variable gain amplifier which concerns on 1st Embodiment. It is a circuit diagram which shows the other structural example of the variable gain amplifier which concerns on 1st Embodiment. It is a circuit diagram which shows the structural example of the variable gain amplifier which concerns on 2nd Embodiment. It is a circuit diagram which shows the other structural example of the variable gain amplifier which concerns on 2nd Embodiment. It is a circuit diagram which shows the other structural example of the variable gain amplifier which concerns on 2nd Embodiment.
  • the phase shift amount of the variable gain amplifier when changing the gain of the amplifier is compared with or without phase adjustment. It is a figure which shows the example which applied the variable gain amplifier which concerns on each embodiment to the tuner system.
  • FIG. 1 is a circuit diagram showing a configuration example of a variable gain amplifier according to the first embodiment.
  • the variable gain amplifier includes an amplifier 10, a phase correction circuit 20, and a control circuit 30 that are configured to be variable in gain.
  • the amplifier 10 receives an input signal input from the input terminal IN of the variable gain amplifier via the phase correction circuit 20, amplifies the signal, and outputs the amplified signal to the output terminal OUT of the variable gain amplifier.
  • the control circuit 30 outputs a gain setting signal SC1 for setting the gain of the amplifier 10 to the amplifier 10, and sets the gain of the amplifier 10 to a desired value. Further, the control circuit 30 outputs a phase adjustment signal SC2 for controlling a phase adjustment amount, which will be described later, to the phase correction circuit 20 in accordance with the gain set in the amplifier 10.
  • the phase correction circuit 20 adjusts the phase of the signal received from the input terminal IN based on the phase adjustment signal SC2 received from the control circuit 30, and outputs the phase adjusted signal to the amplifier 10.
  • the control circuit 30 may obtain the phase adjustment signal SC2 corresponding to the gain set in the amplifier 10 each time, or hold a table indicating the correspondence between the gain set in the amplifier 10 and the phase adjustment signal SC2 in advance.
  • the phase adjustment signal SC2 corresponding to the gain set in the amplifier 10 may be read from this table.
  • Phase correction circuit 2 to 4 are circuit diagrams showing other configuration examples of the variable gain amplifier according to the first embodiment. More specifically, it is a diagram illustrating an example of the configuration of the phase correction circuit 20.
  • the phase correction circuit 20 includes a variable capacitor 21 connected between the input unit of the amplifier 10 and the ground.
  • the phase correction circuit 20 adjusts the phase of the input signal by changing the capacitance value of the variable capacitor 21 based on the phase adjustment signal SC2 from the control circuit 30.
  • the signal whose phase is adjusted by the phase correction circuit 20 is input to the amplifier 10 and amplified.
  • the phase correction circuit 20 includes a variable capacitor 22 connected between the input terminal IN of the variable gain amplifier and the input terminal of the amplifier 10.
  • the phase correction circuit 20 receives the phase adjustment signal SC2 from the control circuit 30, and adjusts the phase of the input signal by changing the capacitance value of the variable capacitor 22 based on the phase adjustment signal SC2.
  • the phase correction circuit 20 includes a variable capacitor 23 as a first variable capacitor connected between the input terminal IN of the variable gain amplifier and the input terminal of the amplifier 10, the input terminal of the amplifier 10, and the ground. And a variable capacitor 24 as a second variable capacitor connected between the two.
  • the phase correction circuit 20 receives the phase adjustment signal SC2 from the control circuit 30 and changes the capacitance value of at least one of the variable capacitors 23 and 24 based on the phase adjustment signal SC2 to be input to the amplifier 10. Adjust the phase of the signal to be output.
  • FIG. 5 is a diagram showing an example of the variable capacitor 21.
  • the variable capacitor 21 includes n capacitive elements 80-1 to 80-n (n is an integer of 2 or more) connected in parallel, and capacitive elements 80-1 to 80-n.
  • Transistor switches 81-1 to 81-n serving as second switches are connected in series and receive the phase adjustment signal SC2 at their gates.
  • the phase adjustment signal SC2 has a bus width n, and the corresponding phase adjustment signal SC2 (SC2 ⁇ 1> to SC2 ⁇ n>) is input to each of the transistor switches 81-1 to 81-n.
  • the transistor switches 81-1 to 81-n are turned on / off based on the phase adjustment signal SC2, thereby adjusting the capacitance value of the variable capacitor 21. More specifically, in the transistor switches 81-1 to 81-n, the capacitance value increases by increasing the number of transistor switches to be turned on, while the capacitance value decreases by decreasing the number of transistor switches to be turned on. With the variable capacitor 21 having such a configuration, discrete phase adjustment values can be set by on / off control of the transistor switches 81-1 to 81-n.
  • the variable capacitors 22, 23, and 24 can also be realized with the same configuration. Further, the variable capacitors 21 to 24 are not limited to the configuration shown in FIG. 5, but may have other configurations as long as the capacitance value can be varied based on the phase adjustment signal SC2.
  • FIG. 6 is a diagram illustrating a configuration example of a variable gain amplifier having the common source amplifier 10.
  • the amplifier 10 includes a source-grounded transistor 11 that receives a signal whose phase is adjusted by the phase correction circuit 20 at a gate, and a variable load resistor 12 as a variable resistor connected between a power source and the drain of the transistor 11. The node between the transistor 11 and the variable load resistor 12 is connected to the output terminal OUT.
  • the amplifier 10 receives the gain setting signal SC1 from the control circuit 30, and adjusts the resistance value of the variable load resistor 12 based on the gain setting signal SC1.
  • the control circuit 30 changes the gain of the amplifier 10 by changing the resistance value of the variable load resistor 12 of the amplifier 10 by the gain setting signal SC1.
  • the variable load resistor 12 includes m resistance elements 82-1 to 82-m (m is an integer of 2 or more) connected in parallel, and each resistance element 82-1 to This can be realized by transistor switches 83-1 to 83-m as first switches which are connected in series with 82-m and receive the gain setting signal SC1 at their gates.
  • the gain setting signal SC1 has a bus width of m, and the corresponding gain setting signal SC1 (SC1 ⁇ 1> to SC1 ⁇ m>) is input to each of the transistor switches 83-1 to 83-m. .
  • the resistance value of the variable load resistor 12 is adjusted by performing on / off control of the transistor switches 83-1 to 83-m based on the gain setting signal SC1. More specifically, in the transistor switches 83-1 to 83-m, the resistance value is decreased by increasing the number of transistor switches to be turned on, while the resistance value is increased by decreasing the number of transistor switches to be turned on. With the variable load resistor 12 having such a configuration, the gain of the amplifier 10 can be set discretely by on / off control of the transistor switches 83-1 to 83-m.
  • FIG. 8 is a diagram illustrating an example of a common source amplifier having a variable load resistor.
  • the source grounded amplifier 60 has a source connected to the ground, a drain connected to the output terminal OUT, and a transistor 61 that receives an input signal from the input terminal IN at the gate, and is connected between the power supply and the drain of the transistor 61.
  • the variable load resistor 62 resistance value is R L
  • a capacitor 63 capacitor 63
  • FIG. 9 is a diagram showing a small signal equivalent circuit of the common-source amplifier 60 shown in FIG.
  • the gain of the common-source amplifier 60 can be obtained by Expression (1) and the phase can be obtained by Expression (2).
  • Rs is a signal source impedance
  • Cgs is a gate-source capacitance of the transistor 61
  • Cgd is a gate-drain capacitance of the transistor 61
  • gm is a transconductance of the transistor 61.
  • FIG. 10 shows a small signal equivalent circuit in the case where the phase correction circuit 20 is realized by a capacitance circuit having a variable capacitance to ground (for example, FIG. 2 and FIG. 4).
  • the gain of the variable gain amplifier of FIG. Equation (3) and phase can be obtained from equation (4), respectively.
  • a capacitive load (capacitance value C L ) is connected between the output terminal OUT and the ground.
  • Cvar indicates the capacitance value of the variable capacitance of the phase correction circuit 20 with respect to the ground.
  • the control circuit 30 reduces the gain of the amplifier 10 by reducing the resistance value of the variable load resistor 12 by the gain setting signal SC1, the first term on the right side of the equation (4) becomes small, and as a result, the phase becomes small. Therefore, when the gain of the amplifier 10 is lowered by the gain setting signal SC1, the control circuit 30 increases the capacitance value Cvar of the variable capacitance of the phase correction circuit 20 with respect to the ground by the phase adjustment signal SC2. As a result, the second term on the right side of Equation (4) is increased, and the phase can be shifted in the opposite direction to the phase shift when the resistance value of the variable load resistor 12 is decreased. Accordingly, the variable gain amplifier shown in FIG.
  • variable gain amplifier 6 can suppress the phase shift of the variable gain amplifier even when the resistance value of the variable load resistor 12 is reduced.
  • the phase correction circuit 20 is adjusted by the phase adjustment signal SC2 when the gain is lowered by the gain setting signal SC1
  • the variable gain amplifier can perform the phase shift of the output signal even when the gain of the seamless amplifier is changed. Can be suppressed. At this time, there is no problem of increase in power consumption, gain error, or distortion deterioration.
  • control circuit 30 increases the gain of the amplifier 10 by the gain setting signal SC1
  • the capacitance value Cvar of the variable capacitance of the phase correction circuit 20 with respect to the ground is reduced by the phase adjustment signal SC2, so that the variable gain amplifier Phase shift can be suppressed.
  • “when” is “when the gain is lowered” or “when the gain is raised” is preferably, for example, simultaneous.
  • the phase correction circuit 20 is adjusted by the phase adjustment signal SC2 within a period until the phase shift of ⁇ 3 ° occurs after the gain is reduced by the gain setting signal SC1.
  • the “time” period is not limited to the above, and may be set within a range in which the phase shift can be suppressed.
  • FIG. 11 shows the phase shift amount (without cal) and the variable load resistance when the gain is changed by controlling only the variable load resistor 12 when the gain of the amplifier 10 is changed in the variable gain amplifier shown in FIG. 12 shows a result of comparison between the phase shift amount (with cal) when the gain is changed by controlling both of the phase shifter 12 and the phase correction circuit 20.
  • the horizontal axis (indicated as AGCMODE in the figure) represents the auto gain controller mode (gain control setting mode), and the vertical axis (indicated as ⁇ Phase in the figure) represents the phase shift amount.
  • the phase shift amount at the time of AGCMODE5 represents the phase shift amount at the time of switching from AGCMODE4 to AGCMODE5.
  • FIG. 11 shows the phase shift amount (without cal) and the variable load resistance when the gain is changed by controlling only the variable load resistor 12 when the gain of the amplifier 10 is changed in the variable gain amplifier shown in FIG. 12 shows a result of comparison between the phase shift amount (with cal) when the
  • the phase shift amount (without cal) when the gain is changed by controlling only the variable load resistor 12 increases as the mode of the auto gain controller increases (particularly in AGCMODEs 8 to 10). It is getting bigger.
  • the phase shift amount (with cal) when the gain is changed by controlling both the variable load resistor 12 and the phase correction circuit 20 is larger than that when only the variable load resistor 12 is controlled. Even if it increases, the phase shift amount of the output signal can be kept small, and the phase shift is within ⁇ 3 °. Further, since the phase correction circuit can finely adjust the gain, finer gain setting is possible.
  • FIGS. 12 and 13 are circuit diagrams illustrating other configuration examples of the variable gain amplifier according to the first embodiment. More specifically, FIGS. 12 and 13 are diagrams illustrating other configuration examples of the amplifier 10.
  • variable gain amplifier 12 includes a source-grounded transistor 13 having a variable transconductance function instead of the transistor 11 of the amplifier 10 in FIG. 6, and includes a load 14 instead of the variable load resistor 12.
  • the control circuit 30 changes the gain by switching the transconductance of the transistor 13 according to the gain setting signal SC1.
  • the control circuit 30 adjusts the phase by the phase correction circuit 20 by the phase adjustment signal SC2.
  • the variable gain amplifier shown in FIG. 12 can suppress the phase shift amount due to the change in the gain of the amplifier 10 even when the gain of the amplifier 10 is changed seamlessly. Further, since the phase correction circuit can finely adjust the gain, finer gain setting is possible.
  • the transconductance of the transistor 13 can be switched, for example, by switching the number of transistors 13 in parallel or by controlling the amount of current flowing through the transistor 13.
  • the transistor 13 is connected between the source of the transistor 13 and the ground. It can also be performed by controlling the resistance value of a variable source resistor (not shown).
  • FIG. 13 shows an example in which a source degeneration type amplifier is used as the amplifier 10.
  • the amplifier 10 includes a transistor 15 instead of the transistor 13 having a variable transconductance function.
  • the amplifier 10 includes a variable source resistor 16 between the source of the transistor 15 and the ground.
  • the amplifier 10 receives the gain setting signal SC1 from the control circuit 30, and changes the gain by changing the resistance value of the variable source resistor 16 based on the gain setting signal SC1. Further, when the gain of the amplifier 10 is changed by the gain setting signal SC1, the control circuit 30 adjusts the phase by the phase correction circuit 20 by the phase adjustment signal SC2. As a result, the variable gain amplifier shown in FIG. 13 can suppress the phase shift amount of the output signal due to the change in the gain of the amplifier 10 even when the gain of the amplifier 10 is changed seamlessly. Further, since the phase correction circuit can finely adjust the gain, finer gain setting is possible.
  • the variable gain amplifier shown in FIG. 14 has a variable attenuator 40 having a variable attenuation function between the input terminal IN and the phase correction circuit 20 in addition to the variable gain amplifier in FIG. 1 (denoted as ATT in FIG. 14). It has.
  • the control circuit 30 controls the variable attenuator 40 with a control signal SC3 as an attenuation adjustment signal for adjusting the attenuation.
  • variable gain amplifier of FIG. 14 when the gain of the amplifier 10 is changed by the gain setting signal SC1, the control circuit 30 adjusts the amount of attenuation by the variable attenuator 40 by the control signal SC3 and the phase by the phase adjustment signal SC2.
  • the phase is adjusted by the correction circuit 20. Accordingly, the variable gain amplifier shown in FIG. 14 can suppress the phase shift amount of the output signal due to the change in the gain of the amplifier 10 even when the gain of the amplifier 10 is changed seamlessly as in the above-described embodiment. . Further, since the phase correction circuit can finely adjust the gain, finer gain setting is possible.
  • variable attenuator 40 is connected between the input terminal IN and the phase correction circuit 20, but is connected between the output unit of the phase correction circuit 20 and the input unit of the amplifier 10. May be. Also in this case, when the gain of the amplifier 10 is changed by the gain setting signal SC1, the control circuit 30 adjusts the amount of attenuation by the variable attenuator 40 by the control signal SC3, and the phase correction circuit 20 by the phase adjustment signal SC2. Adjust the phase with.
  • the variable gain amplifier shown in FIG. 15 includes a variable feedback circuit 50 between the input and output terminals (between the input and output units) of the amplifier 10 in addition to the variable gain amplifier in FIG.
  • the control circuit 30 controls the variable feedback circuit 50 by the control signal SC4.
  • variable gain amplifier of FIG. 15 when the gain of the amplifier 10 is changed by the gain setting signal SC1, the control circuit 30 controls the variable feedback circuit 50 by the control signal SC4 and the phase correction circuit 20 by the phase adjustment signal SC2. Adjust the phase with.
  • the variable gain amplifier shown in FIG. 15 can suppress the phase shift amount of the output signal due to the change in the gain of the amplifier 10 even when the gain of the amplifier 10 is changed seamlessly as in the above-described embodiment. . Further, since the phase correction circuit can finely adjust the gain, finer gain setting is possible.
  • the variable gain amplifier shown in FIG. 16 includes a detection circuit 51 that receives the output signal of the amplifier 10 and detects the level of the output signal in addition to the variable gain amplifier shown in FIG.
  • the detection circuit 51 outputs a detection signal SD1 indicating the level of the detected output signal to the control circuit 30.
  • the control circuit 30 sets the gain of the amplifier 10 using the gain setting signal SC1 and controls the phase correction circuit 20 using the phase adjustment signal SC2. As a result, the control circuit 30 can change the gain and adjust the phase according to the output signal level of the amplifier 10.
  • FIG. 17 is a circuit diagram showing a configuration example of a variable gain amplifier according to the second embodiment.
  • the variable gain amplifier shown in FIG. 17 further includes an amplifier 52 as a second amplifier connected between the input terminal IN and the output terminal OUT, as compared with FIG. That is, the amplifier 52, the phase correction circuit 20, and the amplifier 10 are connected in parallel between the input terminal IN and the output terminal OUT.
  • the control circuit 30 performs on / off control of the operation of the amplifier 52 by the control signal SC5.
  • the gain of the amplifier 52 cannot be changed, and the variable gain amplifier switches the circuit to be operated from the amplifier 52 to the amplifier 10 and changes the gain of the amplifier 10 by the gain setting signal SC1.
  • the gain of the variable gain amplifier is changed.
  • the circuit to be operated can be switched by, for example, the control signal SC5 and the gain setting signal SC1. Note that the gain of the amplifier 52 cannot be changed.
  • the present invention is not limited to this, and an amplifier configured so that the gain can be changed may be used.
  • the variable gain amplifier shown in FIG. 18 includes a variable attenuator 40 (indicated as ATT in FIG. 18) between the input terminal IN and the phase correction circuit 20 in addition to the variable gain amplifier shown in FIG. Therefore, the amplifier 52, the variable attenuator 40, the phase correction circuit 20, and the amplifier 10 are connected in parallel between the input terminal IN and the output terminal OUT.
  • a variable attenuator 40 indicated as ATT in FIG. 18
  • variable gain amplifier of FIG. 18 when the circuit to be operated is switched from the amplifier 52 to the amplifier 10 to change the gain, the control circuit 30 controls the variable attenuator 40 by the control signal SC3, and by the phase adjustment signal SC2. The phase is adjusted by the phase correction circuit 20.
  • the variable gain amplifier shown in FIG. 18 can suppress the phase shift amount of the output signal due to the change of the gain of the amplifier 10 even when the gain is seamlessly changed, similarly to the variable gain amplifier shown in FIG. .
  • the circuit to be operated can be switched by, for example, the control signal SC5 and the gain setting signal SC1. Note that the gain of the amplifier 52 cannot be changed.
  • the present invention is not limited to this, and an amplifier configured so that the gain can be changed may be used.
  • FIG. 19 is a diagram showing a detailed configuration example of the phase correction circuit 20 and the variable attenuator 40 in the variable gain amplifier of FIG.
  • the variable attenuator 40 has a variable resistance attenuator 27.
  • the phase correction circuit 20 is connected between a variable capacitor 25 as a first variable capacitor connected between the output terminal of the variable attenuator 40 and the input terminal of the amplifier 10, and between the input terminal of the amplifier 10 and the ground.
  • a variable capacitor 26 as a second variable capacitor.
  • the rest of the configuration is the same as that of the variable gain amplifier of FIG. 17, and detailed description thereof is omitted here.
  • the variable capacitor 25 and the variable capacitor 26 can also operate as the phase correction circuit 20 and the variable attenuator 40 of the variable attenuator 40.
  • FIG. 20 shows the phase shift amount of the variable gain amplifier before and after switching the circuit when the gain is changed by switching the circuit to be operated from the amplifier 52 to the amplifier 10 in FIG.
  • FIG. 20 shows an example when the input frequency is 600 MHz.
  • “AGCMODE” indicates the mode of the auto gain controller (gain control setting mode)
  • “with cal” indicates when the phase is adjusted by the phase correction circuit 20 when the circuit to be operated is switched.
  • the phase shift amount is indicated, and “without cal” indicates the phase shift amount when the phase is not adjusted by the phase correction circuit 20 when the circuit to be operated is switched.
  • the circuit to be operated is the amplifier 52, and the amplifier 10 is not operating.
  • the gain is switched by controlling the switch of the variable load resistance of the amplifier 52.
  • the phase shift amount (without cal) when the gain is changed by controlling only the variable load resistor increases as AGCMODE increases (particularly AGCMODEs 6 to 7) as shown in FIG. .
  • the phase shift amount (with cal) when the gain is changed by controlling both the variable load resistor of the amplifier 52 and the phase correction circuit 20 is the same as the description in FIG. Is within.
  • the control circuit 30 switches the circuit to be operated from the amplifier 52 to the amplifier 10. Therefore, in the period B in FIG. 20, the circuit to be operated is the amplifier 10 and the amplifier 52 is not operating.
  • the phase shift amount of the variable gain amplifier at the time of switching from the amplifier 52 to the amplifier 10 (at the time of switching from AGCMODE 7 to 8). Is getting bigger.
  • the phase correction circuit 20 (with cal)
  • an increase in the phase shift amount of the variable gain amplifier at the time of switching can be suppressed. Specifically, the phase shift can be kept small within ⁇ 3 °.
  • the phase correction circuit 20 adjusts the phase of the signal input to the amplifier 10 after the switching. As a result, the amount of phase shift of the output signal due to the gain change can be kept small. Further, since the phase correction circuit 20 is adjusted by the phase adjustment signal SC2 when the circuit to be operated is switched from the amplifier 52 to the amplifier 10, the phase shift of the output signal is reduced even when the gain of the amplifier is seamlessly changed. Can be suppressed. At this time, there is no problem of increase in power consumption, gain error, or distortion deterioration. Further, since the phase correction circuit can finely adjust the gain, finer gain setting is possible.
  • the frequency band of the amplifiers 10 and 52 is particularly 40 MHz or more and 1 GHz or less, so that the phase shift of the output signal can be effectively suppressed.
  • the frequency band is 40 MHz or more and is not limited to 1 GHz or less.
  • the variable gain amplifier is configured in the same manner.
  • the phase shift amount of the output signal due to the gain change can be suppressed small. More specifically, when a phase correction circuit is provided in front of each amplifier connected in parallel and the circuit to be operated is switched, a phase adjustment signal is transmitted from the control circuit to the phase correction circuit provided in front of the amplifier. What is necessary is just to adjust a phase.
  • the operation of the amplifier 52 is controlled by the control signal SC5.
  • both the amplifier 10 and the amplifier 52 may be controlled by using the gain setting signal SC1.
  • the signals output from the control circuit 30 can be combined, and the control circuit 30 may control each circuit using one signal.
  • FIG. 21 is a diagram showing an example in which the variable gain amplifier according to each of the above embodiments is applied to a tuner system.
  • the antenna 90 receives an RF signal, and outputs the received signal to the RF signal processing circuit 91 having the variable gain amplifier according to each of the above embodiments.
  • the RF signal processing circuit 91 adjusts the signal strength of the RF signal received from the antenna 90.
  • the mixer 92 receives the local oscillation signal received from the PLL (Phase Locked Loop) 93 and the RF signal whose signal intensity is adjusted by the RF signal processing circuit 91, converts this RF signal into a baseband signal, and outputs it. To do.
  • the low-pass filter hereinafter referred to as LPF) removes unnecessary high-frequency components from the baseband signal output from the mixer 92.
  • An analog-to-digital converter (hereinafter referred to as ADC) 95 receives the output signal of the LPF 94, converts it to a digital signal, and outputs it to a DSP (Digital Signal Processor) 96.
  • the DSP 96 performs demodulation processing and the like based on the digital signal received from the ADC 95.
  • the variable attenuator 40 receives a signal input from the antenna 90 to the RF signal processing circuit 91, and the signal output from the amplifier 10 is the RF signal processing.
  • the signal is output from the circuit 91 to the mixer 92.
  • the RF signal processing circuit 91 includes the variable gain amplifier shown in FIG. 14, another circuit may be provided between the antenna 90 and the variable attenuator 40 or between the amplifier 10 and the mixer 92.
  • the RF signal processing circuit 91 may have a variable gain amplifier other than that shown in FIG.
  • the DSP 96 may change the gain of the amplifier 10 and control the phase correction circuit 20 instead of the control circuit 30. Further, the DSP 96 can detect the input signal level of the RF signal based on the digital signal received from the ADC 95, and the input detected by the DSP 96 or the control circuit 30 of the variable gain amplifier according to each embodiment is detected by the DSP 96. The gain of the amplifier 10 may be controlled based on the signal level.
  • the detection circuit 51 of FIG. 16 may be applied to the variable gain amplifier shown in FIGS.
  • the phase error before and after the gain switching can be suppressed to a small level, and a good carrier-to-noise can be achieved.
  • a ratio can be obtained. Therefore, it is useful, for example, as a wireless communication receiving system, a TV tuner, a mobile phone terminal, or the like.
  • variable attenuator 50
  • variable feedback circuit 51 detection circuit 52
  • amplifier second amplifier
  • 81-1 to 81-n Transistor switch second switch
  • 83-1 to 83-m Transistor switch 90 antenna
  • ADC analog-digital converter
  • SC1 gain setting signal SC2 phase adjustment signal
  • SC3 control signal attenuation amount adjustment signal
  • SC5 Control signal (gain setting signal)

Abstract

This variable-gain amplifier is equipped with: a phase correction circuit (20) for adjusting the phase of an input signal; an amplifier (10) which has a variable gain function and amplifies the signal having the phase which has been adjusted by the phase correction circuit (20); and a control circuit (30) which, when the gain of the amplifier (10) is to be changed, changes the gain in accordance with a gain setting signal (SC1) for setting a gain and controls the amount of phase adjustment by the phase correction circuit (20) in accordance with a phase adjustment signal (SC2) which corresponds to the gain to be set.

Description

可変利得増幅器、およびこれを備えたチューナシステムVariable gain amplifier and tuner system including the same
 本発明は、通信システムまたは放送システムで用いる受信機に関し、低雑音特性、低歪特性が求められる可変利得増幅器に関するものである。 The present invention relates to a receiver used in a communication system or a broadcasting system, and relates to a variable gain amplifier that requires low noise characteristics and low distortion characteristics.
 テレビチューナなどの無線受信システムに用いられる広帯域な低雑音増幅器は、広い可変利得レンジを有しており、受信信号の電界が弱いときには、利得を上げて感度を上げる一方、受信信号の電界が強いときには、利得を下げて飽和信号の歪特性を上げるように構成されている。また、このような利得の制御には、出力レベルが一定になるように自動利得制御(Auto Gain Control: 以下AGCと称する)が用いられる。 Wideband low-noise amplifiers used in radio reception systems such as TV tuners have a wide variable gain range. When the electric field of the received signal is weak, the gain is increased to increase sensitivity, while the electric field of the received signal is strong. In some cases, the gain is lowered to increase the distortion characteristic of the saturated signal. For such gain control, automatic gain control (Auto-Gain Control: hereinafter referred to as AGC) is used so that the output level is constant.
 一般的には、可変増幅器の利得の制御は、増幅器の入力または出力に挿入したアテネータの減衰量、増幅器の並列数やバイアス電流などのパラメータを変更して行われる。可変増幅器において、可変利得レンジを大きくとるためには、これらのパラメータを大きく変化させる必要がある。しかしながら、これらのパラメータを大きく変化させて、可変増幅器の利得を変更したとき、増幅器の出力の位相が大きく回転し、その増幅器を用いた受信機全体の搬送波対雑音比(Carrier to Noise Ratio:C/N比)が劣化するという問題が発生する。 Generally, the gain of the variable amplifier is controlled by changing parameters such as the attenuation of the attenuator inserted in the input or output of the amplifier, the parallel number of the amplifier, and the bias current. In the variable amplifier, in order to increase the variable gain range, it is necessary to change these parameters greatly. However, when these parameters are changed greatly to change the gain of the variable amplifier, the phase of the output of the amplifier is greatly rotated, and the carrier-to-noise ratio (Carrier Noise Ratio: C) of the entire receiver using the amplifier. (N ratio) deteriorates.
 日本の地上デジタルテレビ放送サービス(ISDB-T:Integrated Services Digital Broadcasting-Terrestrial)の信号を受信する無線受信システムでは、周波数470MHz-770MHzの帯域幅を使用し、伝送路符号化方式は直交周波数分割多重(OFDM:Orthogonal Frequency-Division Multiplexing)方式である。変調方式は64QAMであり、広い可変利得レンジ、およびシームレスなゲイン変更が必要である。また、良好なC/N比を得るには、そのゲイン変更時の位相シフトの抑制が求められる。例えば、上記ISDB-Tの信号を受信するチューナシステムには±3°以内の位相シフトに抑える必要がある。また、電波状態が常に変化するモバイル端末においても、シームレスなゲイン変更が求められている。 In a radio reception system that receives a signal of a Japanese terrestrial digital television broadcasting service (ISDB-T: Integrated Services Digital Broadcasting-Terrestrial), a bandwidth of a frequency of 470 MHz to 770 MHz is used, and an orthogonal frequency division multiplexing is used as a transmission channel encoding method. (OFDM: Orthogonal Frequency-Division Multiplexing). The modulation method is 64QAM, which requires a wide variable gain range and seamless gain change. In order to obtain a good C / N ratio, it is necessary to suppress the phase shift when changing the gain. For example, a tuner system that receives the ISDB-T signal needs to suppress a phase shift within ± 3 °. In addition, a seamless gain change is required even in a mobile terminal in which the radio wave state constantly changes.
 特許文献1では、位相の回転を抑制する技術が開示されている。具体的には、増幅器に起因して発生する位相シフトに対して、反対の代数符号を有する振幅―位相変調変換が生じるようにトランジスタの端子のバイアスを変更している。この技術では、トランジスタの端子のバイアスを変更することによって増幅器のバイアス電流を変化させ、増幅器に起因して発生する出力信号の位相シフトを抑制している。 Patent Document 1 discloses a technique for suppressing phase rotation. Specifically, the bias of the terminal of the transistor is changed so that the amplitude-phase modulation conversion having the opposite algebraic code occurs with respect to the phase shift caused by the amplifier. In this technique, the bias current of the amplifier is changed by changing the bias of the terminal of the transistor, and the phase shift of the output signal caused by the amplifier is suppressed.
特開昭60-157305号公報JP 60-157305 A
 しかしながら、位相調整のためにバイアス電流を変える技術(例えば、特許文献1)を用いて広い可変利得レンジを得るためには、バイアス電流を大きく変える必要がある。このバイアス電流の変化によってトランスコンダクタンスが変化するため、増幅器の利得誤差が発生し、増幅器の自動利得制御を実施するのが難しくなる。また、上記のトランスコンダクタンスの変化によって増幅器に歪みが発生し、この増幅器を用いた受信システムの妨害特性が劣化する可能性がある。さらに、バイアス電流を増やして位相調整する場合、増幅器自体の消費電力が増大してしまうという課題が発生する。 However, in order to obtain a wide variable gain range using a technique for changing the bias current for phase adjustment (for example, Patent Document 1), it is necessary to greatly change the bias current. Since the transconductance changes due to the change in the bias current, an amplifier gain error occurs, making it difficult to perform automatic gain control of the amplifier. In addition, the above-described change in transconductance may cause distortion in the amplifier, which may degrade the interference characteristics of a reception system using the amplifier. Furthermore, when adjusting the phase by increasing the bias current, there arises a problem that the power consumption of the amplifier itself increases.
 上記問題に鑑み、本発明は、広い可変利得レンジが必要な可変利得増幅器において、シームレスな利得の変更を行った場合においても、可変利得増幅器の出力信号の位相シフトを抑制することを目的とする。 In view of the above problems, an object of the present invention is to suppress a phase shift of an output signal of a variable gain amplifier even when a seamless gain change is performed in a variable gain amplifier that requires a wide variable gain range. .
 本発明の第1の態様では、可変利得増幅器は、入力信号の位相を調整する位相補正回路と、可変利得機能を有し、前記位相補正回路によって位相調整された信号を増幅する増幅器と、利得の変更のとき、利得を設定する利得設定信号によって前記増幅器の利得を設定し、かつ当該設定する利得に応じた位相調整信号によって前記位相補正回路による位相調整量を制御する制御回路とを備えている。 In the first aspect of the present invention, a variable gain amplifier includes a phase correction circuit that adjusts a phase of an input signal, an amplifier that has a variable gain function, amplifies the signal adjusted in phase by the phase correction circuit, and a gain. A control circuit for setting a gain of the amplifier by a gain setting signal for setting a gain and controlling a phase adjustment amount by the phase correction circuit by a phase adjustment signal according to the gain to be set. Yes.
 この態様によると、増幅器の利得変更のとき、制御回路は、利得設定信号によって増幅器の利得を設定し、かつ設定する利得に応じた位相調整信号を位相補正回路に出力して、位相補正回路による位相調整を制御する。これにより、増幅器の利得を変更するとき、制御回路は、変更後の利得に応じて位相補正回路による入力信号の位相調整量の制御を行うため、利得が変化したときに生じる位相誤差(位相シフト)を位相補正回路で相殺するように制御することができる。したがって、シームレスな利得の変更を行った場合においても、可変利得増幅器の出力信号の位相シフトを小さく抑えることができる。また、位相補正回路は利得の微調整もできるため、より細かい利得設定も可能となる。 According to this aspect, when the gain of the amplifier is changed, the control circuit sets the gain of the amplifier by the gain setting signal and outputs the phase adjustment signal corresponding to the gain to be set to the phase correction circuit. Controls phase adjustment. As a result, when the gain of the amplifier is changed, the control circuit controls the amount of phase adjustment of the input signal by the phase correction circuit according to the changed gain, so that the phase error (phase shift generated when the gain changes) ) Can be controlled to be canceled by the phase correction circuit. Therefore, even when the gain is changed seamlessly, the phase shift of the output signal of the variable gain amplifier can be kept small. Further, since the phase correction circuit can finely adjust the gain, finer gain setting is possible.
 本発明の第2の態様では、チューナシステムは第1の態様記載の可変利得増幅器を備えている。 In the second aspect of the present invention, the tuner system includes the variable gain amplifier described in the first aspect.
 この態様によると、チューナシステムは第1の態様記載の可変利得増幅器を備えているため、位相誤差を小さく抑えることができ、良好な搬送波対雑音比を得ることができる。 According to this aspect, since the tuner system includes the variable gain amplifier described in the first aspect, the phase error can be suppressed to a small value and a good carrier-to-noise ratio can be obtained.
 本発明によると、広い可変利得レンジが必要な可変利得増幅器において、シームレスな利得の変更を行った場合においても、利得の切り替え前と切り替え後の位相誤差を小さく抑えることができ、また、より細かい利得設定も可能となる。これにより、この可変利得増幅器を用いたシステムにおいて良好な搬送波対雑音比を得ることができる。 According to the present invention, in a variable gain amplifier that requires a wide variable gain range, even when a seamless gain change is performed, the phase error before and after the gain switching can be suppressed to be small, and the finer Gain setting is also possible. Thereby, a good carrier-to-noise ratio can be obtained in a system using this variable gain amplifier.
第1の実施形態に係る可変利得増幅器の構成例を示す回路図である。1 is a circuit diagram illustrating a configuration example of a variable gain amplifier according to a first embodiment. FIG. 第1の実施形態に係る可変利得増幅器の他の構成例を示す回路図である。It is a circuit diagram which shows the other structural example of the variable gain amplifier which concerns on 1st Embodiment. 第1の実施形態に係る可変利得増幅器の他の構成例を示す回路図である。It is a circuit diagram which shows the other structural example of the variable gain amplifier which concerns on 1st Embodiment. 第1の実施形態に係る可変利得増幅器の他の構成例を示す回路図である。It is a circuit diagram which shows the other structural example of the variable gain amplifier which concerns on 1st Embodiment. 可変容量の一例を示す図である。It is a figure which shows an example of a variable capacity | capacitance. 第1の実施形態に係る可変利得増幅器の他の構成例を示す回路図である。It is a circuit diagram which shows the other structural example of the variable gain amplifier which concerns on 1st Embodiment. 可変抵抗の一例を示す図である。It is a figure which shows an example of a variable resistance. ソース接地型の増幅器を有する一般的な可変利得増幅器の構成例を示す図である。It is a figure which shows the structural example of the general variable gain amplifier which has an amplifier of a common source type. 図8の可変利得増幅器の小信号等価回路を示す図である。It is a figure which shows the small signal equivalent circuit of the variable gain amplifier of FIG. 図6の可変利得増幅器の小信号等価回路を示す図である。It is a figure which shows the small signal equivalent circuit of the variable gain amplifier of FIG. 図6の可変利得増幅器において、増幅器の利得を変更する際の可変利得増幅器の位相シフト量を位相調整の有無で比較した図である。7 is a diagram in which the phase shift amount of the variable gain amplifier when changing the gain of the amplifier in the variable gain amplifier of FIG. 6 is compared with and without phase adjustment. 第1の実施形態に係る可変利得増幅器の他の構成例を示す回路図である。It is a circuit diagram which shows the other structural example of the variable gain amplifier which concerns on 1st Embodiment. 第1の実施形態に係る可変利得増幅器の他の構成例を示す回路図である。It is a circuit diagram which shows the other structural example of the variable gain amplifier which concerns on 1st Embodiment. 第1の実施形態に係る可変利得増幅器の他の構成例を示す回路図である。It is a circuit diagram which shows the other structural example of the variable gain amplifier which concerns on 1st Embodiment. 第1の実施形態に係る可変利得増幅器の他の構成例を示す回路図である。It is a circuit diagram which shows the other structural example of the variable gain amplifier which concerns on 1st Embodiment. 第1の実施形態に係る可変利得増幅器の他の構成例を示す回路図である。It is a circuit diagram which shows the other structural example of the variable gain amplifier which concerns on 1st Embodiment. 第2の実施形態に係る可変利得増幅器の構成例を示す回路図である。It is a circuit diagram which shows the structural example of the variable gain amplifier which concerns on 2nd Embodiment. 第2の実施形態に係る可変利得増幅器の他の構成例を示す回路図である。It is a circuit diagram which shows the other structural example of the variable gain amplifier which concerns on 2nd Embodiment. 第2の実施形態に係る可変利得増幅器の他の構成例を示す回路図である。It is a circuit diagram which shows the other structural example of the variable gain amplifier which concerns on 2nd Embodiment. 図19の可変利得増幅器において、増幅器の利得を変更する際の可変利得増幅器の位相シフト量を、位相調整の有無で比較した図である。In the variable gain amplifier of FIG. 19, the phase shift amount of the variable gain amplifier when changing the gain of the amplifier is compared with or without phase adjustment. 各実施形態に係る可変利得増幅器をチューナシステムに適用した例を示す図である。It is a figure which shows the example which applied the variable gain amplifier which concerns on each embodiment to the tuner system.
 以下、本発明の実施形態について、図面を参照しながら説明する。以下の各実施形態において、同様の要素には、同一の符号を付し、その詳細な説明を省略する。 Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following embodiments, similar elements are denoted by the same reference numerals, and detailed description thereof is omitted.
 <第1実施形態>
 図1は第1の実施形態に係る可変利得増幅器の構成例を示す回路図である。図1に示すように、可変利得増幅器は、利得が可変可能に構成された増幅器10と、位相補正回路20と、制御回路30とを備えている。
<First Embodiment>
FIG. 1 is a circuit diagram showing a configuration example of a variable gain amplifier according to the first embodiment. As shown in FIG. 1, the variable gain amplifier includes an amplifier 10, a phase correction circuit 20, and a control circuit 30 that are configured to be variable in gain.
 増幅器10は、可変利得増幅器の入力端子INから入力された入力信号を、位相補正回路20を介して受け、その信号を増幅して可変利得増幅器の出力端子OUTに出力する。 The amplifier 10 receives an input signal input from the input terminal IN of the variable gain amplifier via the phase correction circuit 20, amplifies the signal, and outputs the amplified signal to the output terminal OUT of the variable gain amplifier.
 制御回路30は、増幅器10の利得を設定する利得設定信号SC1を増幅器10に出力して、増幅器10の利得を所望の値に設定する。また、制御回路30は、上記の増幅器10に設定する利得に応じて、後述する位相調整量を制御する位相調整信号SC2を位相補正回路20に出力する。 The control circuit 30 outputs a gain setting signal SC1 for setting the gain of the amplifier 10 to the amplifier 10, and sets the gain of the amplifier 10 to a desired value. Further, the control circuit 30 outputs a phase adjustment signal SC2 for controlling a phase adjustment amount, which will be described later, to the phase correction circuit 20 in accordance with the gain set in the amplifier 10.
 位相補正回路20は、制御回路30から受けた位相調整信号SC2に基づいて、入力端子INから受けた信号の位相を調整し、位相調整した信号を増幅器10に出力する。 The phase correction circuit 20 adjusts the phase of the signal received from the input terminal IN based on the phase adjustment signal SC2 received from the control circuit 30, and outputs the phase adjusted signal to the amplifier 10.
 なお、制御回路30は、増幅器10に設定する利得に応じた位相調整信号SC2を都度求めてもよいし、増幅器10に設定する利得と位相調整信号SC2との対応関係を示すテーブルをあらかじめ保持し、このテーブルから、増幅器10に設定する利得に応じた位相調整信号SC2を読み出すようにしてもよい。 The control circuit 30 may obtain the phase adjustment signal SC2 corresponding to the gain set in the amplifier 10 each time, or hold a table indicating the correspondence between the gain set in the amplifier 10 and the phase adjustment signal SC2 in advance. The phase adjustment signal SC2 corresponding to the gain set in the amplifier 10 may be read from this table.
 (位相補正回路)
 図2~図4は、第1の実施形態に係る可変利得増幅器の他の構成例を示す回路図である。より具体的には、位相補正回路20の構成の一例を示す図である。
(Phase correction circuit)
2 to 4 are circuit diagrams showing other configuration examples of the variable gain amplifier according to the first embodiment. More specifically, it is a diagram illustrating an example of the configuration of the phase correction circuit 20.
 図2では、位相補正回路20は、増幅器10の入力部とグランドとの間に接続された可変容量21を備えている。位相補正回路20は、制御回路30からの位相調整信号SC2に基づいて可変容量21の容量値を変化させることによって、入力信号の位相を調整する。位相補正回路20によって位相が調整された信号は、増幅器10に入力され、増幅される。 In FIG. 2, the phase correction circuit 20 includes a variable capacitor 21 connected between the input unit of the amplifier 10 and the ground. The phase correction circuit 20 adjusts the phase of the input signal by changing the capacitance value of the variable capacitor 21 based on the phase adjustment signal SC2 from the control circuit 30. The signal whose phase is adjusted by the phase correction circuit 20 is input to the amplifier 10 and amplified.
 図3では、位相補正回路20は、可変利得増幅器の入力端子INと増幅器10の入力端子との間に接続された可変容量22を備えている。位相補正回路20は、制御回路30からの位相調整信号SC2を受け、位相調整信号SC2に基づいて可変容量22の容量値を変化させることによって、入力信号の位相を調整する。 In FIG. 3, the phase correction circuit 20 includes a variable capacitor 22 connected between the input terminal IN of the variable gain amplifier and the input terminal of the amplifier 10. The phase correction circuit 20 receives the phase adjustment signal SC2 from the control circuit 30, and adjusts the phase of the input signal by changing the capacitance value of the variable capacitor 22 based on the phase adjustment signal SC2.
 図4では、位相補正回路20は、可変利得増幅器の入力端子INと増幅器10の入力端子との間に接続された第1の可変容量としての可変容量23と、増幅器10の入力端子とグランドとの間に接続された第2の可変容量としての可変容量24とを備えている。位相補正回路20は、制御回路30からの位相調整信号SC2を受け、位相調整信号SC2に基づいて可変容量23,24のうちの少なくともいずれか一方の容量値を変化させることによって、増幅器10に入力される信号の位相を調整する。 In FIG. 4, the phase correction circuit 20 includes a variable capacitor 23 as a first variable capacitor connected between the input terminal IN of the variable gain amplifier and the input terminal of the amplifier 10, the input terminal of the amplifier 10, and the ground. And a variable capacitor 24 as a second variable capacitor connected between the two. The phase correction circuit 20 receives the phase adjustment signal SC2 from the control circuit 30 and changes the capacitance value of at least one of the variable capacitors 23 and 24 based on the phase adjustment signal SC2 to be input to the amplifier 10. Adjust the phase of the signal to be output.
 図5は可変容量21の一例を示す図である。図5に示すように、可変容量21は、並列に接続されたn個の容量素子80-1~80-n(nは2以上の整数)と、各容量素子80-1~80-nとそれぞれ直列に接続され、ゲートに位相調整信号SC2を受ける第2のスイッチとしてのトランジスタスイッチ81-1~81-nとを備えている。位相調整信号SC2は、バス幅がnであり、各トランジスタスイッチ81-1~81-nに対して、対応する位相調整信号SC2(SC2<1>~SC2<n>)が入力される。そして、このトランジスタスイッチ81-1~81-nを位相調整信号SC2に基づいてオンオフ制御することにより、可変容量21の容量値を調整する。より具体的には、トランジスタスイッチ81-1~81-nにおいて、オンさせるトランジスタスイッチ数を増やすことにより容量値が大きくなる一方、オンさせるトランジスタスイッチ数を減らすことにより容量値が小さくなる。可変容量21をこのような構成とすることにより、トランジスタスイッチ81-1~81-nのオンオフ制御によって、離散的な位相調整値が設定できる。なお、可変容量22,23,24も同様の構成で実現することができる。また、可変容量21~24は図5の構成に限られるものではなく、位相調整信号SC2に基づいてその容量値が可変できるものであれば他の構成であってもよい。 FIG. 5 is a diagram showing an example of the variable capacitor 21. As shown in FIG. 5, the variable capacitor 21 includes n capacitive elements 80-1 to 80-n (n is an integer of 2 or more) connected in parallel, and capacitive elements 80-1 to 80-n. Transistor switches 81-1 to 81-n serving as second switches are connected in series and receive the phase adjustment signal SC2 at their gates. The phase adjustment signal SC2 has a bus width n, and the corresponding phase adjustment signal SC2 (SC2 <1> to SC2 <n>) is input to each of the transistor switches 81-1 to 81-n. The transistor switches 81-1 to 81-n are turned on / off based on the phase adjustment signal SC2, thereby adjusting the capacitance value of the variable capacitor 21. More specifically, in the transistor switches 81-1 to 81-n, the capacitance value increases by increasing the number of transistor switches to be turned on, while the capacitance value decreases by decreasing the number of transistor switches to be turned on. With the variable capacitor 21 having such a configuration, discrete phase adjustment values can be set by on / off control of the transistor switches 81-1 to 81-n. The variable capacitors 22, 23, and 24 can also be realized with the same configuration. Further, the variable capacitors 21 to 24 are not limited to the configuration shown in FIG. 5, but may have other configurations as long as the capacitance value can be varied based on the phase adjustment signal SC2.
 (増幅器の利得変更に係る位相の調整)
 図6はソース接地型の増幅器10を有する可変利得増幅器の構成例を示す図である。図6において、増幅器10は、位相補正回路20によって位相調整された信号をゲートに受けるソース接地のトランジスタ11と、電源とトランジスタ11のドレインとの間に接続された可変抵抗としての可変負荷抵抗12とを備えており、トランジスタ11と可変負荷抵抗12との間のノードが出力端子OUTに接続されている。そして、増幅器10は、制御回路30からの利得設定信号SC1を受け、利得設定信号SC1に基づいて可変負荷抵抗12の抵抗値を調整する。換言すると、制御回路30は、利得設定信号SC1によって増幅器10の可変負荷抵抗12の抵抗値を変更することによって、増幅器10の利得を変更する。なお、可変負荷抵抗12は、例えば図7に示すように、並列に接続されたm個の抵抗素子82-1~82-m(mは2以上の整数)と、各抵抗素子82-1~82-mとそれぞれ直列に接続され、ゲートに利得設定信号SC1を受ける第1のスイッチとしてのトランジスタスイッチ83-1~83-mとによって実現することができる。ここで、利得設定信号SC1はバス幅がmであり、各トランジスタスイッチ83-1~83-mに対して、対応する利得設定信号SC1(SC1<1>~SC1<m>)が入力される。そして、このトランジスタスイッチ83-1~83-mを利得設定信号SC1に基づいてオンオフ制御することにより、可変負荷抵抗12の抵抗値を調整する。より具体的には、トランジスタスイッチ83-1~83-mにおいて、オンさせるトランジスタスイッチ数を増やすことにより抵抗値が小さくなる一方、オンさせるトランジスタスイッチ数を減らすことにより抵抗値が大きくなる。可変負荷抵抗12をこのような構成とすることにより、トランジスタスイッチ83-1~83-mのオンオフ制御によって、増幅器10の利得を離散的に設定することができる。
(Adjusting the phase for changing the gain of the amplifier)
FIG. 6 is a diagram illustrating a configuration example of a variable gain amplifier having the common source amplifier 10. In FIG. 6, the amplifier 10 includes a source-grounded transistor 11 that receives a signal whose phase is adjusted by the phase correction circuit 20 at a gate, and a variable load resistor 12 as a variable resistor connected between a power source and the drain of the transistor 11. The node between the transistor 11 and the variable load resistor 12 is connected to the output terminal OUT. The amplifier 10 receives the gain setting signal SC1 from the control circuit 30, and adjusts the resistance value of the variable load resistor 12 based on the gain setting signal SC1. In other words, the control circuit 30 changes the gain of the amplifier 10 by changing the resistance value of the variable load resistor 12 of the amplifier 10 by the gain setting signal SC1. As shown in FIG. 7, for example, the variable load resistor 12 includes m resistance elements 82-1 to 82-m (m is an integer of 2 or more) connected in parallel, and each resistance element 82-1 to This can be realized by transistor switches 83-1 to 83-m as first switches which are connected in series with 82-m and receive the gain setting signal SC1 at their gates. Here, the gain setting signal SC1 has a bus width of m, and the corresponding gain setting signal SC1 (SC1 <1> to SC1 <m>) is input to each of the transistor switches 83-1 to 83-m. . Then, the resistance value of the variable load resistor 12 is adjusted by performing on / off control of the transistor switches 83-1 to 83-m based on the gain setting signal SC1. More specifically, in the transistor switches 83-1 to 83-m, the resistance value is decreased by increasing the number of transistor switches to be turned on, while the resistance value is increased by decreasing the number of transistor switches to be turned on. With the variable load resistor 12 having such a configuration, the gain of the amplifier 10 can be set discretely by on / off control of the transistor switches 83-1 to 83-m.
 まず、図6に示すような増幅器において、可変負荷抵抗を調整することによる位相の変動(位相シフト)について説明する。 First, in the amplifier as shown in FIG. 6, the phase variation (phase shift) caused by adjusting the variable load resistance will be described.
 図8は可変負荷抵抗を有する、ソース接地増幅器の一例を示す図である。ソース接地増幅器60は、ソースがグランドに接続され、ドレインが出力端子OUTに接続されており、入力端子INからの入力信号をゲートに受けるトランジスタ61と、電源とトランジスタ61のドレインとの間に接続された可変負荷抵抗62(抵抗値はR)と、出力端子OUTとグランドとの間に接続された容量63(容量値はC)とを備えている。 FIG. 8 is a diagram illustrating an example of a common source amplifier having a variable load resistor. The source grounded amplifier 60 has a source connected to the ground, a drain connected to the output terminal OUT, and a transistor 61 that receives an input signal from the input terminal IN at the gate, and is connected between the power supply and the drain of the transistor 61. The variable load resistor 62 (resistance value is R L ) and a capacitor 63 (capacitance value is C L ) connected between the output terminal OUT and the ground.
 図9は、図8に示したソース接地増幅器60の小信号等価回路を示す図である。図9の小信号等価回路において、ソース接地増幅器60の利得は式(1)、位相は式(2)でそれぞれ求めることができる。 FIG. 9 is a diagram showing a small signal equivalent circuit of the common-source amplifier 60 shown in FIG. In the small signal equivalent circuit of FIG. 9, the gain of the common-source amplifier 60 can be obtained by Expression (1) and the phase can be obtained by Expression (2).
Figure JPOXMLDOC01-appb-M000001
Figure JPOXMLDOC01-appb-M000001
Figure JPOXMLDOC01-appb-M000002
Figure JPOXMLDOC01-appb-M000002
 ここで、Rsは信号源インピーダンス、Cgsはトランジスタ61のゲート-ソース間容量、Cgdはトランジスタ61のゲート-ドレイン間容量、gmはトランジスタ61のトランスコンダクタンスである。式(2)より、可変負荷抵抗62の抵抗値Rの変化によってソース接地増幅器60の出力の位相が変動し、抵抗値Rの変化量が大きいと位相の変動も大きくなることがわかる。 Here, Rs is a signal source impedance, Cgs is a gate-source capacitance of the transistor 61, Cgd is a gate-drain capacitance of the transistor 61, and gm is a transconductance of the transistor 61. From equation (2), varies the phase of the output of the source-grounded amplifier 60 in accordance with the change of the resistance value R L of the variable load resistor 62, the amount of change in the resistance value R L is large, it can be seen that the greater the variation in the phase.
 次に、図6に示す可変利得増幅器の増幅器10の利得を変えたときの位相調整の動作について、図10に示す小信号等価回路を用いて説明する。図10は位相補正回路20が対接地の可変容量を有する容量回路で実現された場合(例えば、図2や図4)における小信号等価回路を示しており、図6の可変利得増幅器の利得は式(3)、位相は式(4)でそれぞれ求めることができる。なお、図6には図示していないが、出力端子OUTとグランドとの間に容量負荷(容量値はC)が接続されているものとする。 Next, the phase adjustment operation when the gain of the amplifier 10 of the variable gain amplifier shown in FIG. 6 is changed will be described using the small signal equivalent circuit shown in FIG. FIG. 10 shows a small signal equivalent circuit in the case where the phase correction circuit 20 is realized by a capacitance circuit having a variable capacitance to ground (for example, FIG. 2 and FIG. 4). The gain of the variable gain amplifier of FIG. Equation (3) and phase can be obtained from equation (4), respectively. Although not shown in FIG. 6, it is assumed that a capacitive load (capacitance value C L ) is connected between the output terminal OUT and the ground.
Figure JPOXMLDOC01-appb-M000003
Figure JPOXMLDOC01-appb-M000003
Figure JPOXMLDOC01-appb-M000004
Figure JPOXMLDOC01-appb-M000004
 ここで、Cvarは位相補正回路20の対接地の可変容量の容量値を示している。 Here, Cvar indicates the capacitance value of the variable capacitance of the phase correction circuit 20 with respect to the ground.
 制御回路30が利得設定信号SC1によって可変負荷抵抗12の抵抗値を小さくして増幅器10の利得を下げた場合、式(4)右辺の第1項は小さくなり、結果として位相が小さくなる。そこで、制御回路30は、この利得設定信号SC1によって増幅器10の利得を下げたとき、位相調整信号SC2によって位相補正回路20の対接地の可変容量の容量値Cvarを大きくする。これにより、式(4)右辺の第2項が大きくなり、可変負荷抵抗12の抵抗値を小さくしたときの位相シフトと逆方向に位相をシフトさせることができる。これにより、図6に示す可変利得増幅器は、可変負荷抵抗12の抵抗値を小さくした場合においても、可変利得増幅器の位相シフトを抑えることができる。また、利得設定信号SC1によって利得を下げたときに位相調整信号SC2によって位相補正回路20の調整をしているため、可変利得増幅器は、シームレスな増幅器の利得の変更においても、出力信号の位相シフトを抑制することができる。また、このとき消費電力の増大、および利得誤差の発生や歪み劣化の発生の問題は生じない。 When the control circuit 30 reduces the gain of the amplifier 10 by reducing the resistance value of the variable load resistor 12 by the gain setting signal SC1, the first term on the right side of the equation (4) becomes small, and as a result, the phase becomes small. Therefore, when the gain of the amplifier 10 is lowered by the gain setting signal SC1, the control circuit 30 increases the capacitance value Cvar of the variable capacitance of the phase correction circuit 20 with respect to the ground by the phase adjustment signal SC2. As a result, the second term on the right side of Equation (4) is increased, and the phase can be shifted in the opposite direction to the phase shift when the resistance value of the variable load resistor 12 is decreased. Accordingly, the variable gain amplifier shown in FIG. 6 can suppress the phase shift of the variable gain amplifier even when the resistance value of the variable load resistor 12 is reduced. In addition, since the phase correction circuit 20 is adjusted by the phase adjustment signal SC2 when the gain is lowered by the gain setting signal SC1, the variable gain amplifier can perform the phase shift of the output signal even when the gain of the seamless amplifier is changed. Can be suppressed. At this time, there is no problem of increase in power consumption, gain error, or distortion deterioration.
 なお、制御回路30が利得設定信号SC1によって増幅器10の利得を上げたときは、位相調整信号SC2によって位相補正回路20の対接地の可変容量の容量値Cvarを小さくすることにより、可変利得増幅器の位相シフトを抑えることができる。 When the control circuit 30 increases the gain of the amplifier 10 by the gain setting signal SC1, the capacitance value Cvar of the variable capacitance of the phase correction circuit 20 with respect to the ground is reduced by the phase adjustment signal SC2, so that the variable gain amplifier Phase shift can be suppressed.
 ここで、「利得を下げたとき」、または「利得を上げたとき」の「とき」とは、例えば、同時が好ましい。また、例えば、増幅器10の利得を切り替えた後、±3°の位相シフトが発生するまでの期間内であることが好ましい。換言すると、上記の例の場合、利得設定信号SC1によって利得を下げた後、±3°の位相シフトが発生するまでの期間内に位相調整信号SC2によって位相補正回路20の調整をするのが好ましい。ただし、この「とき」の期間は、上記に限られるものではなく、位相シフトが抑制できる範囲で設定すればよい。 Here, “when” is “when the gain is lowered” or “when the gain is raised” is preferably, for example, simultaneous. In addition, for example, it is preferable to be within a period until a phase shift of ± 3 ° occurs after the gain of the amplifier 10 is switched. In other words, in the case of the above example, it is preferable that the phase correction circuit 20 is adjusted by the phase adjustment signal SC2 within a period until the phase shift of ± 3 ° occurs after the gain is reduced by the gain setting signal SC1. . However, the “time” period is not limited to the above, and may be set within a range in which the phase shift can be suppressed.
 なお、位相補正回路20の対接地に設けられた可変容量の容量値Cvarが変更された場合、式(3)で算出される可変利得増幅器の利得も変化するが、容量値Cvarの変化による利得への影響は小さい。したがって、容量値Cvarの変更による可変利得増幅器の利得への影響は小さい。 When the capacitance value Cvar of the variable capacitor provided on the ground of the phase correction circuit 20 is changed, the gain of the variable gain amplifier calculated by the equation (3) also changes, but the gain due to the change of the capacitance value Cvar. The impact on is small. Therefore, the influence on the gain of the variable gain amplifier due to the change of the capacitance value Cvar is small.
 図11は、図6に示す可変利得増幅器において、増幅器10の利得を変更する際に、可変負荷抵抗12のみを制御して利得を変更したときの位相シフト量(without cal)と、可変負荷抵抗12および位相補正回路20の両方を制御して利得を変更したときの位相シフト量(with cal)とを比較した結果を示している。図11において、横軸(図ではAGCMODEと表記)はオートゲインコントローラのモード(利得制御の設定モード)を示しており、縦軸(図ではΔPhaseと表記)は位相シフト量を示している。例えば、AGCMODE5の時の位相シフト量は、AGCMODE4からAGCMODE5へ切り替えた時の位相シフト量を表している。図11に示すように、可変負荷抵抗12のみを制御して利得を変更したときの位相シフト量(without cal)は、オートゲインコントローラのモードが大きくなるにしたがって(特に、AGCMODE8~10において)、大きくなっている。一方で、可変負荷抵抗12と位相補正回路20との両方を制御して利得を変更したときの位相シフト量(with cal)は、可変負荷抵抗12のみを制御した場合と比較して、利得が大きくなっても出力信号の位相シフト量を小さく抑えることができており、位相シフトは±3°以内になっている。また、位相補正回路は利得の微調整ができるため、より細かい利得設定も可能である。 FIG. 11 shows the phase shift amount (without cal) and the variable load resistance when the gain is changed by controlling only the variable load resistor 12 when the gain of the amplifier 10 is changed in the variable gain amplifier shown in FIG. 12 shows a result of comparison between the phase shift amount (with cal) when the gain is changed by controlling both of the phase shifter 12 and the phase correction circuit 20. In FIG. 11, the horizontal axis (indicated as AGCMODE in the figure) represents the auto gain controller mode (gain control setting mode), and the vertical axis (indicated as ΔPhase in the figure) represents the phase shift amount. For example, the phase shift amount at the time of AGCMODE5 represents the phase shift amount at the time of switching from AGCMODE4 to AGCMODE5. As shown in FIG. 11, the phase shift amount (without cal) when the gain is changed by controlling only the variable load resistor 12 increases as the mode of the auto gain controller increases (particularly in AGCMODEs 8 to 10). It is getting bigger. On the other hand, the phase shift amount (with cal) when the gain is changed by controlling both the variable load resistor 12 and the phase correction circuit 20 is larger than that when only the variable load resistor 12 is controlled. Even if it increases, the phase shift amount of the output signal can be kept small, and the phase shift is within ± 3 °. Further, since the phase correction circuit can finely adjust the gain, finer gain setting is possible.
 (その他の構成例)
 図12,13は、第1の実施形態に係る可変利得増幅器の他の構成例を示す回路図である。より具体的には、図12,13は、増幅器10の他の構成例を示す図である。
(Other configuration examples)
12 and 13 are circuit diagrams illustrating other configuration examples of the variable gain amplifier according to the first embodiment. More specifically, FIGS. 12 and 13 are diagrams illustrating other configuration examples of the amplifier 10.
 図12は、図6における増幅器10のトランジスタ11に代えて、可変トランスコンダクタンス機能を有するソース接地のトランジスタ13を備えており、可変負荷抵抗12に代えて負荷14を備えている。制御回路30は、利得設定信号SC1によって、トランジスタ13のトランスコンダクタンスを切り替えることにより、利得の変更を行う。そして、制御回路30は、利得設定信号SC1によって増幅器10の利得を変更するとき、位相調整信号SC2によって位相補正回路20による位相の調整を行う。これにより、図12に示す可変利得増幅器は、シームレスな増幅器10の利得の変更においても、増幅器10の利得の変更による位相シフト量を小さく抑えることができる。また、位相補正回路は利得の微調整ができるため、より細かい利得設定も可能となる。 12 includes a source-grounded transistor 13 having a variable transconductance function instead of the transistor 11 of the amplifier 10 in FIG. 6, and includes a load 14 instead of the variable load resistor 12. The control circuit 30 changes the gain by switching the transconductance of the transistor 13 according to the gain setting signal SC1. When the gain of the amplifier 10 is changed by the gain setting signal SC1, the control circuit 30 adjusts the phase by the phase correction circuit 20 by the phase adjustment signal SC2. Thus, the variable gain amplifier shown in FIG. 12 can suppress the phase shift amount due to the change in the gain of the amplifier 10 even when the gain of the amplifier 10 is changed seamlessly. Further, since the phase correction circuit can finely adjust the gain, finer gain setting is possible.
 なお、トランジスタ13のトランスコンダクタンスの切り替えは、例えば、トランジスタ13の並列数の切り替えや、トランジスタ13に流れる電流量の制御によって行うことができるし、例えばトランジスタ13のソースとグランドとの間に接続した可変ソース抵抗(図示しない)の抵抗値を制御することによって行うこともできる。 Note that the transconductance of the transistor 13 can be switched, for example, by switching the number of transistors 13 in parallel or by controlling the amount of current flowing through the transistor 13. For example, the transistor 13 is connected between the source of the transistor 13 and the ground. It can also be performed by controlling the resistance value of a variable source resistor (not shown).
 図13は、増幅器10として、ソースデジェネレーション型の増幅器を用いた例を示している。図12と比較すると、増幅器10は、可変トランスコンダクタンス機能を有するトランジスタ13に代えて、トランジスタ15を備えている。また、増幅器10はトランジスタ15のソースとグランドとの間に、可変ソース抵抗16を備えている。 FIG. 13 shows an example in which a source degeneration type amplifier is used as the amplifier 10. Compared to FIG. 12, the amplifier 10 includes a transistor 15 instead of the transistor 13 having a variable transconductance function. The amplifier 10 includes a variable source resistor 16 between the source of the transistor 15 and the ground.
 増幅器10は、制御回路30からの利得設定信号SC1を受け、利得設定信号SC1に基づいて可変ソース抵抗16の抵抗値を変更することにより、利得を変更する。また、制御回路30は、利得設定信号SC1によって増幅器10の利得を変更するとき、位相調整信号SC2によって位相補正回路20による位相の調整を行う。これにより、図13に示す可変利得増幅器は、シームレスな増幅器10の利得の変更においても、増幅器10の利得の変更による出力信号の位相シフト量を小さく抑えることができる。また、位相補正回路は利得の微調整ができるため、より細かい利得設定も可能となる。 The amplifier 10 receives the gain setting signal SC1 from the control circuit 30, and changes the gain by changing the resistance value of the variable source resistor 16 based on the gain setting signal SC1. Further, when the gain of the amplifier 10 is changed by the gain setting signal SC1, the control circuit 30 adjusts the phase by the phase correction circuit 20 by the phase adjustment signal SC2. As a result, the variable gain amplifier shown in FIG. 13 can suppress the phase shift amount of the output signal due to the change in the gain of the amplifier 10 even when the gain of the amplifier 10 is changed seamlessly. Further, since the phase correction circuit can finely adjust the gain, finer gain setting is possible.
 図14に示す可変利得増幅器は、図1における可変利得増幅器に加えて、入力端子INと位相補正回路20との間に減衰量の可変機能を有する可変減衰器40(図14ではATTと表記)を備えている。制御回路30は、減衰量を調整する減衰量調整信号としての制御信号SC3によって可変減衰器40を制御する。 The variable gain amplifier shown in FIG. 14 has a variable attenuator 40 having a variable attenuation function between the input terminal IN and the phase correction circuit 20 in addition to the variable gain amplifier in FIG. 1 (denoted as ATT in FIG. 14). It has. The control circuit 30 controls the variable attenuator 40 with a control signal SC3 as an attenuation adjustment signal for adjusting the attenuation.
 図14の可変利得増幅器において、制御回路30は、利得設定信号SC1によって増幅器10の利得を変更するとき、制御信号SC3によって可変減衰器40による減衰量の調整を行い、かつ位相調整信号SC2によって位相補正回路20による位相の調整を行う。これにより、図14に示す可変利得増幅器は、上述の実施形態と同様に、シームレスな増幅器10の利得の変更においても、増幅器10の利得の変更による出力信号の位相シフト量を小さく抑えることができる。また、位相補正回路は利得の微調整ができるため、より細かい利得設定も可能となる。 In the variable gain amplifier of FIG. 14, when the gain of the amplifier 10 is changed by the gain setting signal SC1, the control circuit 30 adjusts the amount of attenuation by the variable attenuator 40 by the control signal SC3 and the phase by the phase adjustment signal SC2. The phase is adjusted by the correction circuit 20. Accordingly, the variable gain amplifier shown in FIG. 14 can suppress the phase shift amount of the output signal due to the change in the gain of the amplifier 10 even when the gain of the amplifier 10 is changed seamlessly as in the above-described embodiment. . Further, since the phase correction circuit can finely adjust the gain, finer gain setting is possible.
 なお、図14では、可変減衰器40は、入力端子INと位相補正回路20との間に接続されるものとしたが、位相補正回路20の出力部と増幅器10の入力部との間に接続されてもよい。この場合においても、制御回路30は、利得設定信号SC1によって増幅器10の利得を変更するとき、制御信号SC3によって可変減衰器40による減衰量の調整を行い、かつ位相調整信号SC2によって位相補正回路20による位相の調整を行う。 In FIG. 14, the variable attenuator 40 is connected between the input terminal IN and the phase correction circuit 20, but is connected between the output unit of the phase correction circuit 20 and the input unit of the amplifier 10. May be. Also in this case, when the gain of the amplifier 10 is changed by the gain setting signal SC1, the control circuit 30 adjusts the amount of attenuation by the variable attenuator 40 by the control signal SC3, and the phase correction circuit 20 by the phase adjustment signal SC2. Adjust the phase with.
 図15に示す可変利得増幅器は、図1における可変利得増幅器に加えて、増幅器10の入出力端子間(入出力部間)に可変フィードバック回路50を備えている。制御回路30は、制御信号SC4によって可変フィードバック回路50を制御する。 The variable gain amplifier shown in FIG. 15 includes a variable feedback circuit 50 between the input and output terminals (between the input and output units) of the amplifier 10 in addition to the variable gain amplifier in FIG. The control circuit 30 controls the variable feedback circuit 50 by the control signal SC4.
 図15の可変利得増幅器において、制御回路30は、利得設定信号SC1によって増幅器10の利得を変更するとき、制御信号SC4によって可変フィードバック回路50の制御を行い、かつ位相調整信号SC2によって位相補正回路20による位相の調整を行う。これにより、図15に示す可変利得増幅器は、上述の実施形態と同様に、シームレスな増幅器10の利得の変更においても、増幅器10の利得の変更による出力信号の位相シフト量を小さく抑えることができる。また、位相補正回路は利得の微調整ができるため、より細かい利得設定も可能となる。 In the variable gain amplifier of FIG. 15, when the gain of the amplifier 10 is changed by the gain setting signal SC1, the control circuit 30 controls the variable feedback circuit 50 by the control signal SC4 and the phase correction circuit 20 by the phase adjustment signal SC2. Adjust the phase with. As a result, the variable gain amplifier shown in FIG. 15 can suppress the phase shift amount of the output signal due to the change in the gain of the amplifier 10 even when the gain of the amplifier 10 is changed seamlessly as in the above-described embodiment. . Further, since the phase correction circuit can finely adjust the gain, finer gain setting is possible.
 図16に示す可変利得増幅器は、図1における可変利得増幅器に加えて、増幅器10の出力信号を受けて、その出力信号のレベルを検出する検波回路51を備えている。検波回路51は、検出した出力信号のレベルを示す検波信号SD1を制御回路30に出力する。制御回路30は、検波信号SD1に基づいて、利得設定信号SC1による増幅器10の利得の設定、および位相調整信号SC2による位相補正回路20の制御を行う。これにより、制御回路30は、増幅器10の出力信号レベルに応じた利得の変更および位相の調整が可能になる。 The variable gain amplifier shown in FIG. 16 includes a detection circuit 51 that receives the output signal of the amplifier 10 and detects the level of the output signal in addition to the variable gain amplifier shown in FIG. The detection circuit 51 outputs a detection signal SD1 indicating the level of the detected output signal to the control circuit 30. Based on the detection signal SD1, the control circuit 30 sets the gain of the amplifier 10 using the gain setting signal SC1 and controls the phase correction circuit 20 using the phase adjustment signal SC2. As a result, the control circuit 30 can change the gain and adjust the phase according to the output signal level of the amplifier 10.
 <第2の実施形態>
 図17は第2の実施形態に係る可変利得増幅器の構成例を示す回路図である。図17に示す可変利得増幅器は、図1と比較して、入力端子INと出力端子OUTとの間に接続された第2の増幅器としての増幅器52をさらに備えている。すなわち、増幅器52と、位相補正回路20および増幅器10とが入力端子INと出力端子OUTとの間に並列に接続されている。制御回路30は、制御信号SC5によって増幅器52の動作をオンオフ制御する。なお、本実施形態では、増幅器52は利得の変更ができないものとし、可変利得増幅器は、動作させる回路を増幅器52から増幅器10に切り替えること、および利得設定信号SC1による増幅器10の利得の変更によって、可変利得増幅器の利得の変更を行うものとする。動作させる回路の切り替えは、例えば制御信号SC5と利得設定信号SC1とによって行うことができる。なお、増幅器52は利得の変更ができないものとしたがこれに限定されず、利得が可変可能に構成された増幅器を用いてもかまわない。
<Second Embodiment>
FIG. 17 is a circuit diagram showing a configuration example of a variable gain amplifier according to the second embodiment. The variable gain amplifier shown in FIG. 17 further includes an amplifier 52 as a second amplifier connected between the input terminal IN and the output terminal OUT, as compared with FIG. That is, the amplifier 52, the phase correction circuit 20, and the amplifier 10 are connected in parallel between the input terminal IN and the output terminal OUT. The control circuit 30 performs on / off control of the operation of the amplifier 52 by the control signal SC5. In the present embodiment, it is assumed that the gain of the amplifier 52 cannot be changed, and the variable gain amplifier switches the circuit to be operated from the amplifier 52 to the amplifier 10 and changes the gain of the amplifier 10 by the gain setting signal SC1. It is assumed that the gain of the variable gain amplifier is changed. The circuit to be operated can be switched by, for example, the control signal SC5 and the gain setting signal SC1. Note that the gain of the amplifier 52 cannot be changed. However, the present invention is not limited to this, and an amplifier configured so that the gain can be changed may be used.
 図18に示す可変利得増幅器は、図17に示す可変利得増幅器に加えて、入力端子INと位相補正回路20との間に可変減衰器40(図18ではATTと表記)を備えている。したがって、増幅器52と、可変減衰器40、位相補正回路20および増幅器10とが入力端子INと出力端子OUTとの間に並列に接続されている。 The variable gain amplifier shown in FIG. 18 includes a variable attenuator 40 (indicated as ATT in FIG. 18) between the input terminal IN and the phase correction circuit 20 in addition to the variable gain amplifier shown in FIG. Therefore, the amplifier 52, the variable attenuator 40, the phase correction circuit 20, and the amplifier 10 are connected in parallel between the input terminal IN and the output terminal OUT.
 図18の可変利得増幅器において、動作させる回路を増幅器52から増幅器10に切り替えて利得を変更するとき、制御回路30は、制御信号SC3によって可変減衰器40の制御を行い、かつ位相調整信号SC2によって位相補正回路20による位相の調整を行う。これにより、図18に示す可変利得増幅器は、図17に示す可変利得増幅器と同様に、シームレスな利得の変更においても、増幅器10の利得の変更による出力信号の位相シフト量を小さく抑えることができる。動作させる回路の切り替えは、例えば制御信号SC5と利得設定信号SC1とによって行うことができる。なお、増幅器52は利得の変更ができないものとしたがこれに限定されず、利得が可変可能に構成された増幅器を用いてもかまわない。 In the variable gain amplifier of FIG. 18, when the circuit to be operated is switched from the amplifier 52 to the amplifier 10 to change the gain, the control circuit 30 controls the variable attenuator 40 by the control signal SC3, and by the phase adjustment signal SC2. The phase is adjusted by the phase correction circuit 20. As a result, the variable gain amplifier shown in FIG. 18 can suppress the phase shift amount of the output signal due to the change of the gain of the amplifier 10 even when the gain is seamlessly changed, similarly to the variable gain amplifier shown in FIG. . The circuit to be operated can be switched by, for example, the control signal SC5 and the gain setting signal SC1. Note that the gain of the amplifier 52 cannot be changed. However, the present invention is not limited to this, and an amplifier configured so that the gain can be changed may be used.
 (可変利得増幅器の利得変更に係る位相の調整)
 第2の実施形態に係る位相調整の動作について、図19および図20を用いて説明する。
(Adjusting the phase for changing the gain of the variable gain amplifier)
The phase adjustment operation according to the second embodiment will be described with reference to FIGS. 19 and 20.
 図19は、図18の可変利得増幅器において、位相補正回路20および可変減衰器40の構成例を詳細に示した図である。図19に示すように、可変減衰器40は可変抵抗アテネータ27を有している。位相補正回路20は、可変減衰器40の出力端子と増幅器10の入力端子との間に接続された第1の可変容量としての可変容量25と、増幅器10の入力端子とグランドとの間に接続された第2の可変容量としての可変容量26とを備えている。それ以外の構成については図17の可変利得増幅器と同様であり、ここではその詳細な説明を省略する。なお、可変容量25および可変容量26は、位相補正回路20としての動作と、可変減衰器40の可変容量アテネータとしての動作とをかねることができる。 FIG. 19 is a diagram showing a detailed configuration example of the phase correction circuit 20 and the variable attenuator 40 in the variable gain amplifier of FIG. As shown in FIG. 19, the variable attenuator 40 has a variable resistance attenuator 27. The phase correction circuit 20 is connected between a variable capacitor 25 as a first variable capacitor connected between the output terminal of the variable attenuator 40 and the input terminal of the amplifier 10, and between the input terminal of the amplifier 10 and the ground. And a variable capacitor 26 as a second variable capacitor. The rest of the configuration is the same as that of the variable gain amplifier of FIG. 17, and detailed description thereof is omitted here. The variable capacitor 25 and the variable capacitor 26 can also operate as the phase correction circuit 20 and the variable attenuator 40 of the variable attenuator 40.
 図20は、図19において、動作させる回路を増幅器52から増幅器10に切り替えることによって利得を変更する場合における回路の切り替え前後の可変利得増幅器の位相シフト量を示している。図20は入力周波数が600MHzのときの例を示している。図20において、“AGCMODE”はオートゲインコントローラのモード(利得制御の設定モード)を示しており、“with cal”は動作させる回路を切り替えるときに位相補正回路20による位相の調整を行ったときの位相シフト量を示しており、“without cal”は動作させる回路を切り替えるときに位相補正回路20による位相の調整を行なわなかった場合の位相シフト量を示している。 FIG. 20 shows the phase shift amount of the variable gain amplifier before and after switching the circuit when the gain is changed by switching the circuit to be operated from the amplifier 52 to the amplifier 10 in FIG. FIG. 20 shows an example when the input frequency is 600 MHz. In FIG. 20, “AGCMODE” indicates the mode of the auto gain controller (gain control setting mode), and “with cal” indicates when the phase is adjusted by the phase correction circuit 20 when the circuit to be operated is switched. The phase shift amount is indicated, and “without cal” indicates the phase shift amount when the phase is not adjusted by the phase correction circuit 20 when the circuit to be operated is switched.
 まず、図20の期間Aは、動作させる回路が増幅器52であり、増幅器10は動作していない。具体的には、期間Aでは増幅器52の可変負荷抵抗のスイッチを制御して利得を切り替えている。この期間Aにおいて、可変負荷抵抗のみを制御して利得を変更したときの位相シフト量(without cal)は、図20の様にAGCMODEが大きくなるにしたがって(とくにAGCMODE6~7)、大きくなっている。一方、増幅器52の可変負荷抵抗と位相補正回路20との両方を制御して利得を変更したときの位相シフト量(with cal)は、図11での説明と同様に、位相シフトは±3°以内になっている。 First, in the period A in FIG. 20, the circuit to be operated is the amplifier 52, and the amplifier 10 is not operating. Specifically, in period A, the gain is switched by controlling the switch of the variable load resistance of the amplifier 52. In this period A, the phase shift amount (without cal) when the gain is changed by controlling only the variable load resistor increases as AGCMODE increases (particularly AGCMODEs 6 to 7) as shown in FIG. . On the other hand, the phase shift amount (with cal) when the gain is changed by controlling both the variable load resistor of the amplifier 52 and the phase correction circuit 20 is the same as the description in FIG. Is within.
 次に、AGCMODE8において、制御回路30は、動作させる回路を増幅器52から増幅器10に切り替える。したがって、図20の期間Bは、動作させる回路が増幅器10であり、増幅器52は動作していない。この期間Bでは、位相補正回路20による位相の調整を行わなかった場合(without cal)、増幅器52から増幅器10への切り替え時(AGCMODE7から8への切り替え時)において、可変利得増幅器の位相シフト量が大きくなっている。一方で、位相補正回路20による位相の調整を行った場合(with cal)、この切り替え時における可変利得増幅器の位相シフト量の増大を抑制することができる。具体的には、位相シフトを±3°以内に小さく抑えることができる。 Next, in AGCMODE 8, the control circuit 30 switches the circuit to be operated from the amplifier 52 to the amplifier 10. Therefore, in the period B in FIG. 20, the circuit to be operated is the amplifier 10 and the amplifier 52 is not operating. In this period B, when the phase is not adjusted by the phase correction circuit 20 (without cal), the phase shift amount of the variable gain amplifier at the time of switching from the amplifier 52 to the amplifier 10 (at the time of switching from AGCMODE 7 to 8). Is getting bigger. On the other hand, when the phase is adjusted by the phase correction circuit 20 (with cal), an increase in the phase shift amount of the variable gain amplifier at the time of switching can be suppressed. Specifically, the phase shift can be kept small within ± 3 °.
 以上のように、並列に接続された増幅器を切り替えることによって可変利得増幅器の利得を変更する場合においても、切り替え後の増幅器10に入力される信号に対して位相補正回路20による位相の調整を行うことにより、利得の変更による出力信号の位相シフト量を小さく抑えることができる。また、動作させる回路を増幅器52から増幅器10に切り替えたときに位相調整信号SC2によって位相補正回路20の調整をしているため、シームレスな増幅器の利得の変更においても、出力信号の位相シフトを小さく抑えることができる。また、このとき消費電力の増大、および利得誤差の発生や歪み劣化の発生の問題は生じない。また、位相補正回路は利得の微調整ができるため、より細かい利得設定も可能となる。 As described above, even when the gain of the variable gain amplifier is changed by switching the amplifiers connected in parallel, the phase correction circuit 20 adjusts the phase of the signal input to the amplifier 10 after the switching. As a result, the amount of phase shift of the output signal due to the gain change can be kept small. Further, since the phase correction circuit 20 is adjusted by the phase adjustment signal SC2 when the circuit to be operated is switched from the amplifier 52 to the amplifier 10, the phase shift of the output signal is reduced even when the gain of the amplifier is seamlessly changed. Can be suppressed. At this time, there is no problem of increase in power consumption, gain error, or distortion deterioration. Further, since the phase correction circuit can finely adjust the gain, finer gain setting is possible.
 なお、増幅器10,52の周波数帯域は、特に40MHz以上であり、かつ1GHz以下である場合において、出力信号の位相シフトを有効に小さく抑えることができる。ただし、上記の周波数帯域は40MHz以上であり、かつ1GHz以下に限定されない。 Note that the frequency band of the amplifiers 10 and 52 is particularly 40 MHz or more and 1 GHz or less, so that the phase shift of the output signal can be effectively suppressed. However, the frequency band is 40 MHz or more and is not limited to 1 GHz or less.
 また、第2の実施形態では、2個の増幅器10,52が並列に接続される例について説明したが、増幅器が3個以上並列に接続された場合においても、同様の構成により可変利得増幅器の利得の変更による出力信号の位相シフト量を小さく抑えることができる。より具体的には、並列に接続する各増幅器の前段に位相補正回路を設けて、動作させる回路を切り替えるときに、制御回路から増幅器の前段に設けた位相補正回路に位相調整信号を送信して位相を調整すればよい。 Further, in the second embodiment, the example in which the two amplifiers 10 and 52 are connected in parallel has been described. However, even when three or more amplifiers are connected in parallel, the variable gain amplifier is configured in the same manner. The phase shift amount of the output signal due to the gain change can be suppressed small. More specifically, when a phase correction circuit is provided in front of each amplifier connected in parallel and the circuit to be operated is switched, a phase adjustment signal is transmitted from the control circuit to the phase correction circuit provided in front of the amplifier. What is necessary is just to adjust a phase.
 また、第2の実施形態では、増幅器52の動作の制御は制御信号SC5によって行うものとしたが、利得設定信号SC1を用いて、増幅器10と増幅器52の両方を制御するようにしてもよい。 In the second embodiment, the operation of the amplifier 52 is controlled by the control signal SC5. However, both the amplifier 10 and the amplifier 52 may be controlled by using the gain setting signal SC1.
 また、第1および第2の実施形態において、制御回路30から出力される信号はまとめることが可能であり、制御回路30が1つの信号を用いて各回路を制御するようにしてもかまわない。 In the first and second embodiments, the signals output from the control circuit 30 can be combined, and the control circuit 30 may control each circuit using one signal.
 <適用例>
 図21は上記の各実施形態に係る可変利得増幅器をチューナシステムに適用した例を示す図である。
<Application example>
FIG. 21 is a diagram showing an example in which the variable gain amplifier according to each of the above embodiments is applied to a tuner system.
 図21に示すように、アンテナ90はRF信号を受信し、受信した信号を上述の各実施形態に係る可変利得増幅器を有するRF信号処理回路91に出力する。RF信号処理回路91は、アンテナ90から受けたRF信号の信号強度を調整する。ミキサ92は、PLL(Phase Locked Loop)93から受けた局部発振信号と、RF信号処理回路91によって信号強度が調整されたRF信号とを受け、このRF信号をベースバンド信号に変換して、出力する。ローパスフィルタ(以下LPFと称する)は、ミキサ92から出力されたベースバンド信号の不要な高周波成分を取り除く。アナログデジタル変換器(以下ADCと称する)95は、LPF94の出力信号を受け、デジタル信号に変換して、DSP(Digital Signal Processor)96に出力する。DSP96は、ADC95から受けたデジタル信号に基づいて、復調処理などを行う。 As shown in FIG. 21, the antenna 90 receives an RF signal, and outputs the received signal to the RF signal processing circuit 91 having the variable gain amplifier according to each of the above embodiments. The RF signal processing circuit 91 adjusts the signal strength of the RF signal received from the antenna 90. The mixer 92 receives the local oscillation signal received from the PLL (Phase Locked Loop) 93 and the RF signal whose signal intensity is adjusted by the RF signal processing circuit 91, converts this RF signal into a baseband signal, and outputs it. To do. The low-pass filter (hereinafter referred to as LPF) removes unnecessary high-frequency components from the baseband signal output from the mixer 92. An analog-to-digital converter (hereinafter referred to as ADC) 95 receives the output signal of the LPF 94, converts it to a digital signal, and outputs it to a DSP (Digital Signal Processor) 96. The DSP 96 performs demodulation processing and the like based on the digital signal received from the ADC 95.
 例えば、RF信号処理回路91が図14の可変利得増幅器を有する場合、アンテナ90からRF信号処理回路91に入力された信号を可変減衰器40が受け、増幅器10から出力された信号がRF信号処理回路91からミキサ92に出力される。なお、上記のRF信号処理回路91が図14の可変利得増幅器を有する例において、アンテナ90と可変減衰器40との間や増幅器10とミキサ92との間に別の回路を有していてもよい。また、RF信号処理回路91は、図14以外の可変利得増幅器を有していてもよい。 For example, when the RF signal processing circuit 91 has the variable gain amplifier of FIG. 14, the variable attenuator 40 receives a signal input from the antenna 90 to the RF signal processing circuit 91, and the signal output from the amplifier 10 is the RF signal processing. The signal is output from the circuit 91 to the mixer 92. In the example in which the RF signal processing circuit 91 includes the variable gain amplifier shown in FIG. 14, another circuit may be provided between the antenna 90 and the variable attenuator 40 or between the amplifier 10 and the mixer 92. Good. Further, the RF signal processing circuit 91 may have a variable gain amplifier other than that shown in FIG.
 なお、各実施形態に係る可変利得増幅器において、制御回路30に代えて、DSP96が増幅器10の利得の変更および位相補正回路20の制御を行うようにしてもかまわない。また、DSP96では、ADC95から受けたデジタル信号に基づいてRF信号の入力信号レベルを検出することが可能であり、DSP96または各実施形態に係る可変利得増幅器の制御回路30がDSP96によって検出された入力信号レベルに基づいて、増幅器10の利得を制御するようにしてもよい。 In the variable gain amplifier according to each embodiment, the DSP 96 may change the gain of the amplifier 10 and control the phase correction circuit 20 instead of the control circuit 30. Further, the DSP 96 can detect the input signal level of the RF signal based on the digital signal received from the ADC 95, and the input detected by the DSP 96 or the control circuit 30 of the variable gain amplifier according to each embodiment is detected by the DSP 96. The gain of the amplifier 10 may be controlled based on the signal level.
 また、上記の各実施形態は組み合わせて使用することが可能である。例えば、図16の検波回路51を図14や図17に示す可変利得増幅器に適用してもよい。 Also, the above embodiments can be used in combination. For example, the detection circuit 51 of FIG. 16 may be applied to the variable gain amplifier shown in FIGS.
 本発明では、広い可変利得レンジが必要な可変利得増幅器において、シームレスな利得の変更を行った場合においても、利得の切り替え前と切り替え後の位相誤差を小さく抑えることができ、良好な搬送波対雑音比を得ることができる。したがって、例えば無線通信の受信システム、TVチューナ、携帯電話の端末等として有用である。 According to the present invention, in a variable gain amplifier that requires a wide variable gain range, even when seamless gain change is performed, the phase error before and after the gain switching can be suppressed to a small level, and a good carrier-to-noise can be achieved. A ratio can be obtained. Therefore, it is useful, for example, as a wireless communication receiving system, a TV tuner, a mobile phone terminal, or the like.
10 増幅器
11 トランジスタ
12 可変負荷抵抗(可変抵抗)
13 トランジスタ
15 トランジスタ
16 可変ソース抵抗(可変抵抗)
20 位相補正回路
21,22 可変容量
23 可変容量(第1の可変容量)
24 可変容量(第2の可変容量)
25 可変容量(第1の可変容量)
26 可変容量(第2の可変容量)
27 可変抵抗アテネータ
30 制御回路
40 可変減衰器
50 可変フィードバック回路
51 検波回路
52 増幅器(第2の増幅器)
81-1~81-n トランジスタスイッチ(第2のスイッチ)
83-1~83-m トランジスタスイッチ(第1のスイッチ)
90 アンテナ
91 RF信号処理回路
92 ミキサ
95 ADC(アナログデジタル変換器)
SC1 利得設定信号
SC2 位相調整信号
SC3 制御信号(減衰量調整信号)
SC5 制御信号(利得設定信号)
10 Amplifier 11 Transistor 12 Variable load resistance (variable resistance)
13 Transistor 15 Transistor 16 Variable source resistance (variable resistance)
20 Phase correction circuit 21, 22 Variable capacitor 23 Variable capacitor (first variable capacitor)
24 variable capacity (second variable capacity)
25 Variable capacity (first variable capacity)
26 Variable capacity (second variable capacity)
27 variable resistance attenuator 30 control circuit 40 variable attenuator 50 variable feedback circuit 51 detection circuit 52 amplifier (second amplifier)
81-1 to 81-n Transistor switch (second switch)
83-1 to 83-m Transistor switch (first switch)
90 antenna 91 RF signal processing circuit 92 mixer 95 ADC (analog-digital converter)
SC1 gain setting signal SC2 phase adjustment signal SC3 control signal (attenuation amount adjustment signal)
SC5 Control signal (gain setting signal)

Claims (18)

  1.  入力信号の位相を調整する位相補正回路と、
     可変利得機能を有し、前記位相補正回路によって位相調整された信号を増幅する増幅器と、
     利得の変更のとき、利得を設定する利得設定信号によって前記増幅器の利得を設定し、かつ当該設定する利得に応じた位相調整信号によって前記位相補正回路による位相調整量を制御する制御回路とを備えている
    ことを特徴とする可変利得増幅器。
    A phase correction circuit for adjusting the phase of the input signal;
    An amplifier having a variable gain function and amplifying the signal phase-adjusted by the phase correction circuit;
    A control circuit for setting a gain of the amplifier by a gain setting signal for setting a gain and controlling a phase adjustment amount by the phase correction circuit by a phase adjustment signal corresponding to the set gain when changing the gain; A variable gain amplifier.
  2.  請求項1記載の可変利得増幅器において、
     前記位相補正回路は、前記増幅器の入力部と、グランドとの間に接続された可変容量を有しており、
     前記制御回路は、前記位相調整信号によって前記可変容量の容量値を変えることによって、前記位相補正回路による位相調整量を制御する
    ことを特徴とする可変利得増幅器。
    The variable gain amplifier of claim 1, wherein
    The phase correction circuit has a variable capacitor connected between the input of the amplifier and the ground,
    The variable gain amplifier, wherein the control circuit controls a phase adjustment amount by the phase correction circuit by changing a capacitance value of the variable capacitor according to the phase adjustment signal.
  3.  請求項1記載の可変利得増幅器において、
     前記位相補正回路は、一端に前記入力信号を受け、他端が前記増幅器の入力部に接続された可変容量を有しており、
     前記制御回路は、前記位相調整信号によって前記可変容量の容量値を変えることによって、前記位相補正回路による位相調整量を制御する
    ことを特徴とする可変利得増幅器。
    The variable gain amplifier of claim 1, wherein
    The phase correction circuit has a variable capacitor that receives the input signal at one end and is connected to the input portion of the amplifier at the other end.
    The variable gain amplifier, wherein the control circuit controls a phase adjustment amount by the phase correction circuit by changing a capacitance value of the variable capacitor according to the phase adjustment signal.
  4.  請求項1記載の可変利得増幅器において、
     前記位相補正回路は、
     一端に前記入力信号を受け、他端が前記増幅器の入力部に接続された第1の可変容量と、
     前記増幅器の入力部と、グランドとの間に接続された第2の可変容量とを有しており、
     前記制御回路は、前記位相調整信号によって前記第1および第2の可変容量のうちの少なくともいずれか一方の容量値を変えて、前記位相補正回路による位相調整を制御する
    ことを特徴とする可変利得増幅器。
    The variable gain amplifier of claim 1, wherein
    The phase correction circuit includes:
    A first variable capacitor having one end receiving the input signal and the other end connected to the input of the amplifier;
    A second variable capacitor connected between the input of the amplifier and the ground;
    The control circuit controls a phase adjustment by the phase correction circuit by changing a capacitance value of at least one of the first and second variable capacitors according to the phase adjustment signal. amplifier.
  5.  請求項1記載の可変利得増幅器において、
     前記増幅器は、前記位相調整された信号を受けるトランジスタと、当該トランジスタの出力に設けられた可変負荷抵抗を有しており、
     前記制御回路は、前記利得設定信号によって前記可変負荷抵抗の抵抗値を変えることによって、前記増幅器の利得を変更する
    ことを特徴とする可変利得増幅器。
    The variable gain amplifier of claim 1, wherein
    The amplifier includes a transistor that receives the phase-adjusted signal, and a variable load resistor provided at the output of the transistor,
    The control circuit changes the gain of the amplifier by changing a resistance value of the variable load resistor according to the gain setting signal.
  6.  請求項1記載の可変利得増幅器において、
     前記増幅器は、前記位相調整された信号を受け、トランスコンダクタンスを可変可能に構成されたトランジスタを有しており、
     前記制御回路は、前記利得設定信号によって前記トランジスタのトランスコンダクタンスを変えることによって、前記増幅器の利得を変更する
    ことを特徴とする可変利得増幅器。
    The variable gain amplifier of claim 1, wherein
    The amplifier includes a transistor configured to receive the phase-adjusted signal and change transconductance.
    The variable gain amplifier, wherein the control circuit changes a gain of the amplifier by changing a transconductance of the transistor according to the gain setting signal.
  7.  請求項1記載の可変利得増幅器において、
     前記増幅器は、前記位相調整された信号を受けるトランジスタと、当該トランジスタのソースに設けられた可変抵抗を有しており、
     前記制御回路は、前記利得設定信号によって前記可変抵抗の抵抗値を変えることによって、前記増幅器の利得を変更する
    ことを特徴とする可変利得増幅器。
    The variable gain amplifier of claim 1, wherein
    The amplifier includes a transistor that receives the phase-adjusted signal, and a variable resistor provided at a source of the transistor,
    The variable gain amplifier, wherein the control circuit changes a gain of the amplifier by changing a resistance value of the variable resistor according to the gain setting signal.
  8.  請求項1記載の可変利得増幅器において、
     減衰量の可変機能を有し、前記入力信号を減衰する可変減衰器を備えており、
     前記位相補正回路は、前記可変減衰器の入力又は出力信号の位相を調整するものであり、
     前記制御回路は、利得の変更のとき、前記増幅器の利得の設定、および前記位相補正回路による位相調整量の制御に加えて、減衰量を調整する減衰量調整信号によって前記可変減衰器の減衰量を制御する
    ことを特徴とする可変利得増幅器。
    The variable gain amplifier of claim 1, wherein
    A variable attenuator that has a variable attenuation function and attenuates the input signal,
    The phase correction circuit adjusts the phase of the input or output signal of the variable attenuator,
    When the gain is changed, the control circuit sets the gain of the amplifier and controls the phase adjustment amount by the phase correction circuit, and in addition to the attenuation amount of the variable attenuator by an attenuation amount adjustment signal for adjusting the attenuation amount And a variable gain amplifier.
  9.  請求項1記載の可変利得増幅器において、
     前記増幅器の出力部と前記増幅器の入力部との間に接続されたフィードバック回路を備えており、
     前記制御回路は、前記利得の変更のとき、前記増幅器の利得の設定、および前記位相補正回路による位相調整量の制御に加えて、前記フィードバック回路の制御を行う
    ことを特徴とする可変利得増幅器。
    The variable gain amplifier of claim 1, wherein
    A feedback circuit connected between the output of the amplifier and the input of the amplifier;
    The control circuit controls the feedback circuit in addition to setting the gain of the amplifier and controlling the phase adjustment amount by the phase correction circuit when the gain is changed.
  10.  請求項1記載の可変利得増幅器において、
     前記位相補正回路の入力部と、前記増幅器の出力部との間に、1つの、または並列に接続されたk個(kは2以上の整数)の第2の増幅器又は可変増幅器を備えており、
     前記制御回路は、利得の変更のとき、前記増幅器と前記第2の増幅器の中のいずれかを動作させるかを制御可能に構成されている
    ことを特徴とする可変利得増幅器。
    The variable gain amplifier of claim 1, wherein
    Between the input part of the phase correction circuit and the output part of the amplifier, one or k (k is an integer of 2 or more) second amplifiers or variable amplifiers connected in parallel are provided. ,
    The variable gain amplifier, wherein the control circuit is configured to be able to control which of the amplifier and the second amplifier is operated when a gain is changed.
  11.  請求項8記載の可変利得増幅器において、
     前記可変減衰器の入力部と、前記増幅器の出力部との間に、1つの、または並列に接続されたk個(kは2以上の整数)の第2の増幅器又は可変増幅器を備えており、
     前記制御回路は、前記利得の変更のとき、前記増幅器と前記第2の増幅器の中のいずれかを動作させるかを制御可能に構成されている
    ことを特徴とする可変利得増幅器。
    The variable gain amplifier according to claim 8.
    Between the input unit of the variable attenuator and the output unit of the amplifier, one or k (k is an integer of 2 or more) second amplifiers or variable amplifiers connected in parallel are provided. ,
    The variable gain amplifier, wherein the control circuit is configured to be able to control which of the amplifier and the second amplifier is operated when the gain is changed.
  12.  請求項8記載の可変利得増幅器において、
     前記可変減衰器は、可変抵抗アテネータおよび可変容量アテネータのうちの少なくともいずれか一方を備えている
    ことを特徴とする可変利得増幅器。
    The variable gain amplifier according to claim 8.
    The variable attenuator includes at least one of a variable resistance attenuator and a variable capacitance attenuator.
  13.  請求項1記載の可変利得増幅器において、
     前記増幅器は、離散的に利得が設定できるように構成されており、かつ当該離散的な利得をオンオフ制御により切り替える第1のスイッチを備えており、
     前記位相補正回路は、離散的な位相調整値が設定できるように構成されており、かつ当該離散的な位相調整値をオンオフ制御により切り替える第2のスイッチを備えており、
     前記制御回路は、前記利得の変更のとき、前記利得設定信号によって前記第1のスイッチをオンオフ制御して前記増幅器の利得を変更し、かつ前記位相調整信号によって前記第2のスイッチをオンオフ制御して、前記位相補正回路による位相調整を制御する
    ことを特徴とする可変利得増幅器。
    The variable gain amplifier of claim 1, wherein
    The amplifier is configured to be able to set gain discretely, and includes a first switch that switches the discrete gain by on / off control,
    The phase correction circuit is configured to be able to set a discrete phase adjustment value, and includes a second switch that switches the discrete phase adjustment value by on / off control,
    When the gain is changed, the control circuit changes the gain of the amplifier by turning on and off the first switch by the gain setting signal, and turns on and off the second switch by the phase adjustment signal. A variable gain amplifier that controls phase adjustment by the phase correction circuit.
  14.  請求項1記載の可変利得増幅器において、
     前記増幅器の入力信号はデジタルテレビ放送サービスの信号であり、OFDM変調方式で多値化され、周波数帯域は、40MHz以上であり、かつ1GHz以下である
    ことを特徴とする可変利得増幅器。
    The variable gain amplifier of claim 1, wherein
    A variable gain amplifier characterized in that an input signal of the amplifier is a signal of a digital television broadcasting service, multi-valued by an OFDM modulation method, and a frequency band is 40 MHz or more and 1 GHz or less.
  15.  請求項1記載の可変利得増幅器において、
     MOSトランジスタによって構成されている
    ことを特徴とする可変利得増幅器。
    The variable gain amplifier of claim 1, wherein
    A variable gain amplifier comprising a MOS transistor.
  16.  請求項1記載の可変利得増幅器において、
     前記可変利得増幅器の出力信号レベルを検出する検波回路を備えており、
     前記制御回路は、前記検波回路によって検出された出力信号レベルに応じて、前記増幅器の利得を設定する
    ことを特徴とする可変利得増幅器。
    The variable gain amplifier of claim 1, wherein
    A detection circuit for detecting an output signal level of the variable gain amplifier;
    The variable gain amplifier, wherein the control circuit sets a gain of the amplifier according to an output signal level detected by the detection circuit.
  17.  請求項1記載の可変利得増幅器を備えている
    ことを特徴とするチューナシステム。
    A tuner system comprising the variable gain amplifier according to claim 1.
  18.  請求項17記載のチューナシステムにおいて、
     RF信号を受けるアンテナと、
     請求項1記載の可変利得増幅器を有しており、前記アンテナから受けたRF信号の信号強度を調整するRF信号処理回路と、
     前記RF信号処理回路から出力されたRF出力信号を受け、当該RF出力信号をベースバンド信号に変換するミキサと、
     前記ミキサから出力されたベースバンド信号を受け、デジタル変換するアナログデジタル変換器とを備えており、
     前記制御回路は、前記アナログデジタル変換器のデジタル変換後の信号に基づいて、前記可変利得増幅器の利得を変更する
    ことを特徴とするチューナシステム。
     
     
     
     
     
    The tuner system according to claim 17, wherein
    An antenna for receiving an RF signal;
    An RF signal processing circuit comprising the variable gain amplifier according to claim 1, wherein the RF signal processing circuit adjusts the signal strength of the RF signal received from the antenna;
    A mixer that receives an RF output signal output from the RF signal processing circuit and converts the RF output signal into a baseband signal;
    An analog-to-digital converter that receives and converts the baseband signal output from the mixer;
    The tuner system, wherein the control circuit changes the gain of the variable gain amplifier based on a signal after digital conversion of the analog-digital converter.




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