WO2014041165A1 - Verfahren zur fixierung einer matrixfreien elektrophoretisch abgeschiedenen schicht auf einem halbleiterchip für die herstellung eines strahlungsemittierenden halbleiterbauelements und strahlungsemittierendes halbleiterbauelement - Google Patents
Verfahren zur fixierung einer matrixfreien elektrophoretisch abgeschiedenen schicht auf einem halbleiterchip für die herstellung eines strahlungsemittierenden halbleiterbauelements und strahlungsemittierendes halbleiterbauelement Download PDFInfo
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
- H01L33/46—Reflective coating, e.g. dielectric Bragg reflector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/50—Wavelength conversion elements
- H01L33/501—Wavelength conversion elements characterised by the materials, e.g. binder
- H01L33/502—Wavelength conversion materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/50—Wavelength conversion elements
- H01L33/505—Wavelength conversion elements characterised by the shape, e.g. plate or foil
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85909—Post-treatment of the connector or wire bonding area
- H01L2224/8592—Applying permanent coating, e.g. protective coating
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0025—Processes relating to coatings
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- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
- H01L2933/0041—Processes relating to semiconductor body packages relating to wavelength conversion elements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
- H01L2933/0058—Processes relating to semiconductor body packages relating to optical field-shaping elements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0008—Processes
- H01L2933/0033—Processes relating to semiconductor body packages
- H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
- H01L2933/0091—Scattering means in or on the semiconductor body or semiconductor body package
Definitions
- the method comprises the following steps:
- the semiconductor wafer has at least one semiconductor chip.
- the semiconductor wafer has a multiplicity of semiconductor chips, for example at least five or at least ten semiconductor chips.
- semiconductor wafers can be up to 200,000
- the respective semiconductor chip is
- the semiconductor chip preferably around a semiconductor chip based on a III-V semiconductor material.
- the III-V semiconductor material preferably, the
- LED light emitting diode
- Semiconductor chip is electromagnetic for emission
- Semiconductor chip preferably radiates colored light.
- the semiconductor chip can also radiate ultraviolet (UV) radiation.
- the semiconductor chip has an active zone for generating the electromagnetic radiation.
- All semiconductor chips can be identical. Alternatively, it is possible that various, in particular on
- Emission are formed in different spectral ranges.
- the semiconductor wafer is then one
- the semiconductor wafer further comprises a carrier substrate.
- the semiconductor chip or the multiplicity of semiconductor chips are arranged on the carrier substrate.
- the carrier substrate serves for mechanical stabilization of the semiconductor chips.
- the carrier substrate can be a growth substrate for the layers of the semiconductor chips.
- the carrier substrate then has, for example, silicon or sapphire.
- Carrier substrate and materials such as glass, plastic or metal include.
- the carrier substrate preferably has separating trenches or
- the dividing trenches are on a
- the dividing trenches make depressions or
- the individual semiconductor chips are spatially separated from each other by the separation trenches.
- the dividing trenches are used to
- the respective semiconductor chip has at least one
- Contact point for example, a so-called bond pad on.
- the contact point is used for electrical contacting of the
- the contact point is at a the
- the semiconductor chip can be contacted, for example, by means of a contact wire, for example via wire bonding.
- a material is deposited on the
- Electrophoretic deposited semiconductor chips to form the electrophoretic layer can For example, particles of a phosphor or particles of a reflective material or from particles of a phosphor or particles of a reflective
- titanium oxide or aluminum oxide is preferably used as the reflective material.
- the material preferably serves to at least partially convert the primary radiation emitted by the semiconductor chip into an electromagnetic secondary radiation.
- the material has phosphor particles.
- the material is preferably a
- electrophoretic layer preferably one
- Wavelength conversion or phosphor layer Wavelength conversion or phosphor layer.
- the electrophoretic layer is matrix-free. That is, the particles of the electrophoretic layer are not embedded in a matrix material such as plastic, glass or ceramic. Rather, the electrophoretic layer is formed solely by the particles.
- electrophoretic layer may, due to the production but also have deposited salts from a suspension, as further described below.
- the process of electrophoretic deposition of the material is described, for example, in German patent application with the file reference DE 10 2012 105 691.9, the
- electrophoretic deposition occurs in the following steps: On the carrier substrate is at least partially a
- the electrically conductive layer may comprise or consist of one of the following materials: lithium, sodium, potassium, rubidium, cesium, beryllium, calcium, magnesium, strontium, barium, scandium, titanium, aluminum, silicon, gallium, tin, Zirconium,
- Zinc oxide, zinc sulfide, zinc selenide, zinc telluride, tin oxide Zinc oxide, zinc sulfide, zinc selenide, zinc telluride, tin oxide.
- the electrically conductive layer is suitable for at least partially forming a salt with a protic reactant.
- the protic reactant may be contained in a liquid or a gas or as
- the protic reactant is water, an alcohol, a
- Electrophoresis bath deposited may contain as organic solvent one of the following substances: alcohol, ketone, aromatic, aldehyde. These materials usually react with advantage not or only to a very limited extent with a metal, a metal alloy, a semi-metal or a semiconductor material, ie the
- Electrophoretic layer is then at least the
- Reactant introduced so that the electrically conductive layer at least partially forms a salt with a component of the protic reactant.
- the salt formed is at least partially washed out with a solvent
- the electrically conductive layer is formed from the electrically conductive layer.
- the regions of the carrier substrate which are not to be provided with the electrically conductive layer can, for example, by means of the deposition of the electrically conductive layer
- Shadow masks or a photoresist layer are protected.
- the structuring of the electrically conductive layer can also be done by means of scratches or by a laser.
- the contact point as well as others
- the lacquer is dissolved out again below the electrically conductive layer, so that the electrically conductive layer is preferably present only on the surface of the semiconductor chip facing away from the carrier substrate and, in particular, the contact point has no electrically conductive layer.
- the electrically conductive layer may be removed together with the paint and thereby
- the contact point can be kept potential-free during the electrophoretic deposition. In other words, the contact point in the electrophoretic deposition
- Carrier substrate is in this way the
- Electrophoretic layer selectively only on portions of the carrier substrate, namely on those which are provided with the electrically conductive layer, deposited.
- an electrically conductive layer can be applied to the separating trenches which is thinner than the electrically conductive layer on the surface of the substrate facing away from the carrier substrate
- the electrophoretic deposition takes place such that the contact region of the semiconductor chip remains free of the material or of the electrophoretic layer.
- the separation trenches remain at least predominantly free of the material.
- a matrix material is applied to at least one subregion of the carrier substrate
- the matrix material is applied at least on the surface of the semiconductor chip facing away from the carrier substrate. In other words, the matrix material is applied at least on the electrophoretically deposited layer as well as on the contact point. The matrix material surrounds the material of the electrophoretic layer
- the matrix material is applied to the entire surface of the semiconductor wafer facing away from the carrier substrate.
- the surface of the semiconductor wafer facing away from the carrier substrate is preferably completely covered with the matrix material or the layer of matrix material.
- the matrix material can also penetrate i: interspaces between the particles of the electrophoretically deposited layer.
- the matrix material is inorganic. For example, by using an inorganic material required follow-up processes in production lines with a ban on silicone-based materials continue
- the matrix material serves to fix or stabilize the electrophoretically deposited material or the electrophoretic layer on the semiconductor chip.
- the matrix material serves to fix or stabilize the electrophoretically deposited material or the electrophoretic layer on the semiconductor chip.
- the particles of the electrophoretic layer are effectively shaped and thus stabilized or fixed.
- the layer of matrix material is formed around the electrophoretic layer. As a result, a high mechanical stability of the electrophoretic layer is achieved.
- the electrophoretic layer and thus also the
- the application of the matrix material takes place by triggering at least one
- the at least one chemical reaction is triggered at least in the partial region of the surface of the semiconductor wafer which faces away from the carrier substrate.
- the chemical reaction takes place on the
- the inorganic matrix material is at least on a part of the
- a metal oxide layer at least on
- Subregion of the carrier substrate remote from the surface of the semiconductor wafer formed as a matrix material.
- the metal oxide layer may include silicon dioxide (SiO 2 ), aluminum dioxide (Al 2 O 3), titanium dioxide (TiO 2 ), zirconia (ZrO 2 ), or hafnium dioxide (HfO 2 ).
- SiO 2 silicon dioxide
- Al 2 O 3 aluminum dioxide
- TiO 2 titanium dioxide
- ZrO 2 zirconia
- HfO 2 hafnium dioxide
- a metal oxide layer is particularly characterized by its strength. This can effectively stabilize the
- electrophoretic layer can be achieved.
- the metal oxide layer may be plasma assisted
- Gas phase deposition process plasma enhanced chemical vapor deposition, PECVD
- PECVD plasma enhanced chemical vapor deposition
- the surface of the semiconductor wafer facing away from the carrier substrate that is to say the surface to be coated
- at least one starting material preferably a gaseous starting material, is provided, from which the metal oxide layer is deposited on the surface by the above-described chemical reaction.
- a tetraethyl orthosilicate is preferably used
- At least one second gaseous starting material is located in the volume, for example
- Oxygen (0 2 ), nitrogen (N 2 ), water (H 2 0) and / or
- Layer chemically reacts on the surface.
- more than two starting materials can also be used.
- the surface to be coated has the reaction temperature at which the chemical reaction takes place to form the solid metal oxide layer.
- a plasma is usually ignited in the volume during the chemical deposition for this purpose.
- the particles of the electrophoretic layer are optimally transformed by the matrix material, in particular the metal oxide layer.
- Shadow mask can be used so that the metal oxide
- the metal oxide layer is not deposited on the pads and the carrier substrate.
- the metal oxide layer is not deposited on the pads and the carrier substrate.
- Metal oxide layer are deposited on the entire surface of the semiconductor wafer facing away from the carrier substrate, ie on the semiconductor chip, the contact point, the separation trenches and the remaining parts of the surface of the carrier substrate. In this case, the use of a mask is unnecessary.
- Matrix material preferably has a thickness between 50 nm and 500 nm, for example 200 nm.
- the thickness of the layer is 200 nm or less, bonding of the at least one semiconductor chip through the metal oxide layer to the contact region can then take place in a subsequent step.
- a bonding wire may be connected to the contact region through the metal oxide layer.
- a further step which can be carried out before or after singulation of the semiconductor wafer, removal of the matrix material, in particular of the metal oxide layer, in the range of at least one
- Matrix material not removed, leaving on the surface applied electrophoretic layer is still covered by the matrix material.
- Plasma etching After removal of the metal oxide layer in the region of the contact region can then be a bonding of the
- Matrix material can be removed in the region of the separation trenches of the carrier substrate to a later separation of the
- Matrix material in particular the metal oxide layer, but also in a cyclic vapor deposition process
- the matrix material can be deposited in an atomic layer deposition process (ALD) on at least the partial area of the surface of the semiconductor wafer facing away from the carrier substrate, preferably on the complete surface.
- ALD atomic layer deposition process
- remote surface of the semiconductor wafer ie, the surface to be coated
- a volume In the volume is at least a first gaseous
- Feedstock such as trimethylaluminum (TMAT, C 3 H 9 Al) or tantalum pentachloride (TaCls) fed so that the first gaseous starting material to be coated on the
- Semiconductor wafer with the first starting material is the part of the first starting material, which is still present in gaseous or not adsorbed on the surface, usually removed from the volume again. Thereafter, a second starting material, for example 0 2 , is supplied.
- the second starting material is intended to be used with the at
- the deposited by the ALD method layer preferably has a thickness between 50 nm and 200 nm. This layer is not even because of its small thickness, but takes on the contours of the particles arranged underneath the electrophoretic layer.
- matrix material is preferably deposited not only on the surface of the electrophoretic layer. Rather, by the ALD procedure also under and between the particles of the electrophoretic
- Layer introduced matrix material. This results in a particularly efficient fixation or stabilization of the electrophoretic layer. In addition, this results in a particularly good thermal conductivity also between the particles of the electrophoretic layer.
- a bonding of the at least one semiconductor chip for example, through the metal oxide layer on the contact area.
- the matrix material in particular the metal oxide layer, at least partially, preferably in the region of the contact region, again
- This step can take place before or after the singulation of the semiconductor wafer.
- the removal takes place, for example, in an anisotropic
- Matrix material can be removed in the region of the separation trenches of the carrier substrate to a later separation of the
- the contact region After removal of the metal oxide layer in the contact region, the contact region can be connected to a bonding wire for electrical contacting of the semiconductor chip.
- the bonding wire is soldered to the contact area.
- the matrix material that has been formed on the surface of the electrophoretic layer is also at least partially removed.
- the surface of the electrophoretic layer facing away from the semiconductor chip is preferably free of matrix material. In this way, the matrix material remains only within the
- electrophoretic layer i. between and under the particles of the electrophoretic layer and to the
- the semiconductor chip facing away from the surface of the electrophoretic Layer can be traces of the removal process to remove the matrix material, so for example traces of
- Dry etching process exhibit.
- the surface may be roughened or feared.
- the matrix material may be applied by spin-coating or spin-coating on at least the portion of the surface of the semiconductor wafer facing away from the carrier substrate.
- the matrix material comprises a spin-on glass or a spin-on silicone.
- the spin-on glass will be described in detail below.
- sol-gel material in the dissolved state on the carrier substrate remote from the surface of the carrier substrate For example, as a sol-gel material in the dissolved state on the carrier substrate remote from the surface of the
- Matrix material obtains.
- the matrix material is then removed at least in the region of the at least one contact region. A subsequent bonding of the semiconductor chip is thus facilitated and an effective fixation of the
- the removal of the matrix material can be carried out, for example, by wet-chemical etching.
- the matrix material in the area of the separation trenches of Carrier substrate are removed to facilitate a later dicing of the semiconductor wafer.
- matrix material Preferably remains after this step matrix material only on the
- electrophoretic layer so that the electrophoretic layer is completely enveloped by the matrix material.
- the remaining matrix material is cured or dried. This can be done, for example, by exposing the matrix material. Drying removes volatiles from spin-on glass or spin-on silicones. For example, the sol-gel material turns into a gel-like state upon drying. Furthermore, the freed from the matrix material
- a separation of the semiconductor wafer takes place in a further step.
- Separation takes place for example by means of laser separation of the carrier substrate at the position of the separation trenches. But even sawing, breaking or scribing can be used to singulate the semiconductor wafer. By separating the semiconductor wafer creates a variety of
- a radiation-emitting semiconductor component in short a component, is specified.
- Component emits electromagnetic radiation
- the device is preferably using the above
- the component has at least one carrier substrate,
- the component further has at least one semiconductor chip, preferably the semiconductor chip described above.
- the semiconductor chip has an active zone for generating electromagnetic radiation, preferably colored light.
- the semiconductor chip is arranged on the carrier substrate.
- the semiconductor chip is mounted on the carrier substrate. The attachment of the semiconductor chip can be carried out, for example, by soldering, silver sintering, in a direct bonding process or by contacting by contact bumps.
- the carrier substrate serves the mechanical
- Semiconductor chips is at least one contact area
- a bond pad formed.
- the device further comprises an electrophoretically
- the material may comprise, for example, particles of a phosphor, for example phosphor particles, or particles of a reflective material, or of particles of a phosphor or particles of a reflective material
- the material preferably serves to at least partially convert the primary radiation emitted by the semiconductor chip into an electromagnetic secondary radiation.
- the material is on the carrier substrate facing away
- the contact point is however free of the material.
- the material is in the form of a layer, in particular an electrophoretic
- Layer covers the surface of the semiconductor chip facing away from the carrier substrate with the exception of the contact point.
- the device further comprises a matrix material.
- Matrix material preferably comprises a metal oxide.
- the matrix material locally adjoins the electrophoretically deposited material. The electrophoretically
- deposited material is on the semiconductor chip
- electrophoretically deposited material ie between and under the individual particles of the electrophoretic
- electrophoretically deposited material has traces of a Abtragerakes. For example, the surface is roughened or ridged. In the removal process was
- deposited material formed matrix material is a particularly efficient fixation or stabilization of the electrophoretically deposited layer ensured.
- the fixation is effected by the interaction of the individual particles within the electrophoretic layer with the matrix material.
- the component is therefore particularly stable.
- FIG. 1 shows a plan view of a semiconductor wafer before the application of the electrophoretic layer
- FIG. 2 shows a section of the semiconductor wafer
- FIG. 1 after the application of the electrophoretic layer
- FIG. 3 shows a cross section of the semiconductor wafer
- Figure 2 after the application of the matrix material, Figure 4 shows a cross section of a
- FIG. 5A shows a cross section of a part of the FIG.
- FIG. 5B shows the cross section from FIG. 5A after a further process step.
- FIG. 6 shows a cross section of the semiconductor wafer
- FIG. 2 after the application of the matrix material according to a further exemplary embodiment
- Figures 7A and 7B show an embodiment of a
- FIG. 1 shows a semiconductor wafer 1
- Semiconductor wafer 1 has a carrier substrate 5 and nine
- the semiconductor wafer 1 in short wafer 1, can also have more than nine semiconductor chips 2.
- the wafer 1 may also have fewer than nine semiconductor chips 2, for example 6 semiconductor chips or a semiconductor chip 2.
- the semiconductor chips 2 are for emitting radiation
- the semiconductor chips 2 are on the carrier substrate 5
- the carrier substrate 5 serves for the mechanical stabilization of the semiconductor chips 2.
- the carrier substrate 5 has separating trenches 6.
- the separation trenches represent recesses or recesses of the surface of the carrier substrate 5, which faces the semiconductor chip 2.
- the semiconductor chips 2 are separated from each other by the separation trenches 6.
- the separation trenches 6 are used for
- the semiconductor chips 2 have a surface 4 facing away from the carrier substrate 5. On the surface 4, the respective semiconductor chip 2 has a contact point 3 or bonding pad for electrical contacting of the semiconductor chip 2.
- a material 7 in the form of an electrophoretic layer is first deposited on the surface 4 of the respective semiconductor chip 2 facing away from the carrier substrate 5 (see FIG. 2).
- the material 7 may be particles of a phosphor, e.g.
- the material 7 serves at least partially to emit the primary radiation emitted by the respective semiconductor chip 2 into an electromagnetic field
- the material 7 is in
- Wavelength conversion material The application of the wavelength conversion material is carried out by electrophoresis.
- electrophoresis a layer of the wavelength conversion material, that is, a wavelength conversion layer, on a part of the surface 4 of the semiconductor chip 2, which faces away from the carrier substrate 5, applied or electrophoretically
- Wavelength conversion material can also be the area of the separation trenches 6 at least partially recessed,
- Separating trenches 6 is applied (see, for example, Figures 2 and 3).
- the wavelength conversion layer is free of one
- Matrix material e.g. Glass or ceramics.
- the wavelength conversion layer is in this
- Embodiment exclusively of the particles of the phosphor.
- a matrix material 8 is applied at least on a part of the surface of the wafer 1 which is remote from the carrier substrate 5 (see, for example, FIG. 3) in order to fix or mechanically stabilize the wavelength conversion layer.
- the application of the matrix material 8 can take place in various ways, which are explained in more detail below:
- a PECVD method With the aid of TEOS as the starting material, in this method a metal oxide layer (eg SiO 2 ) is deposited on the surface of the wafer 1 facing away from the carrier substrate 5.
- a metal oxide layer eg SiO 2
- the S1O 2 on the surface of the wafer 1 grows reactive and transforms the
- the layer of matrix material 8 covers the entire surface of the wafer 1 (see, for example, FIG. 3).
- the matrix material 8 can also be deposited only on the wavelength conversion layer, so that the wavelength conversion layer
- the layer of matrix material 8 deposited by the PECVD method has a thickness of 50 nm to 500 nm, for example 200 nm. Depending on the thickness of the
- Layer for example, for a thickness of more than 200 nm, takes place in a further step, an ablation of
- Matrix material 8 in the contact area 3 (not explicitly
- Matrix material 8 can take place before or after the singulation of the semiconductor wafer 1, which will be described in detail later.
- the removal takes place, for example, by reactive sputtering or by a plasma process. This can also be
- Matrix material 8 are removed in the region of the separation trenches 6, provided that the separation of the wafer 1 takes place at a later time (not explicitly shown). After ablation, the wavelength conversion layer is still completely enveloped by the matrix material 8.
- the layer of matrix material 8 is very thin, the thickness is 200 nm or less, for example
- the bonding of the semiconductor chip 2 through the layer of matrix material 8 to the contact region 3 can take place, as will be described later (see FIG. 7B). A removal of matrix material 8 is not required in this case.
- the application of the matrix material 8 takes place by means of an ALD method.
- a thin metal oxide layer for example Si0 2, A1 2 0 3, Ti0 2, Zr0 2, Hf0 2 on the supporting substrate 5 facing away from surface of the wafer 1 is deposited in this process.
- the metal oxide transforms the wavelength conversion material and in particular the individual particles of the
- Process is the matrix material 8 therefore also between and under the individual particles of the
- Wavelength conversion layer introduced. Further, the surface of the wavelength conversion layer becomes with the
- Metal oxide layer transforms (see for example Figure 5A).
- the layer deposited by the ALD method is a layer deposited by the ALD method.
- Matrix material 8 has a thickness of 50 nm to 200 nm, for example 150 nm.
- the layer of matrix material 8 deposited by the ALD method is in FIG.
- the layer of matrix material 8 is not flat due to its only small thickness, but takes on the contours of the particles arranged underneath the wavelength conversion layer (see Figure 5A).
- the layer of matrix material 8 is not flat due to its only small thickness, but takes on the contours of the particles arranged underneath the wavelength conversion layer (see Figure 5A).
- Matrix material 8 are removed in the contact area 3 (see Figure 5B).
- the removal can be done before or after the separation of the wafer 1.
- the removal takes place, for example, in an anisotropic structuring method,
- the matrix material 8 in the region of the separation trenches 6 can be removed (not explicitly shown).
- the matrix material 8 is removed, which by the ALD method on the
- Wavelength conversion layer has been deposited.
- matrix material 8 remains between and among the particles of the wavelength conversion layer, i.
- matrix material 8 is disposed on the side surfaces of the wavelength conversion layer.
- the component available at the end of the process has a wavelength conversion layer whose surface facing away from the semiconductor chip 2 is free of matrix material 8. The semiconductor chip facing away from the surface of the
- Wavelength conversion layer has traces of
- Anisotropic patterning process for example, the dry etching process on.
- the surface is roughened or feared (not explicitly shown).
- the matrix material 8 by spin coating or
- Matrix material may comprise a spin-on glass or a spin-on silicone.
- Carrier substrate 5 facing away from the surface
- Matrix material 8 is covered (not explicitly shown).
- only the semiconductor chip 2 can be covered by the matrix material 8, as indicated in FIG.
- Matrix material 8 is then in the contact area 3 of the
- the removal can for example by
- Carrier substrate 5 are removed, if no mask
- matrix material 8 is preferably only on the surface 4 of the substrate 5 applied to the carrier substrate 5
- Wavelength conversion layer further completely enveloped by the matrix material 8.
- the matrix material 8 remaining on the surface 4 of the semiconductor chip 2 is hardened, for example by exposure of the matrix material 8.
- the dicing of the wafer 1 (see, for example, Figure 4).
- the carrier substrate 5 is severed, for example by means of a laser, at the location of the separation trenches 6. This gives a variety of components, each component is a piece of
- Carrier substrate 5 and a semiconductor chip 2 with the above-described wavelength conversion layer and the
- Matrix material 8 has. In a further step, the component and
- the respective semiconductor chip 2 electrically contacted.
- a bonding wire 10 (see FIG. 7B) is connected to the contact point 3 of the semiconductor chip 2.
- the bonding wire 10 is soldered to the pad 3, for example.
- the contacting can take place through the matrix material 8, as shown in FIG. 7B.
- the respective component is introduced into a housing 9 (see FIG. 7A) and, in particular, fastened, for example soldered, to a base of the housing 9.
- the housing 9 can also be filled with a potting material 11, for example silicone, (see FIG. 7B).
- the potting material 11 serves to protect the device.
- Wavelength conversion layer with the matrix material 8 deposited thereon in particular in the case of the first
- Embodiment spin casting or spin coating
- Wavelength conversion layer can be prevented with the potting material 11. Thus, optimal heat exchange between the particles of the wavelength conversion layer is ensured.
- beam-shaping element e.g. a lens
Abstract
Description
Claims
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
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DE112013004509.5T DE112013004509B4 (de) | 2012-09-17 | 2013-09-16 | Verfahren zur Fixierung einer matrixfreien elektrophoretisch abgeschiedenen Schicht auf einem Halbleiterchip und strahlungsemittierendes Halbleiterbauelement |
US14/428,896 US9831390B2 (en) | 2012-09-17 | 2013-09-16 | Method for fixing a matrix-free electrophoretically deposited layer on a semiconductor chip for the production of a radiation-emitting semiconductor component, and radiation-emitting semiconductor component |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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DE102012108704.0A DE102012108704A1 (de) | 2012-09-17 | 2012-09-17 | Verfahren zur Fixierung einer matrixfreien elektrophoretisch abgeschiedenen Schicht auf einem Halbleiterchip und strahlungsemittierendes Halbleiterbauelement |
DE102012108704.0 | 2012-09-17 |
Publications (1)
Publication Number | Publication Date |
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WO2014041165A1 true WO2014041165A1 (de) | 2014-03-20 |
Family
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PCT/EP2013/069151 WO2014041165A1 (de) | 2012-09-17 | 2013-09-16 | Verfahren zur fixierung einer matrixfreien elektrophoretisch abgeschiedenen schicht auf einem halbleiterchip für die herstellung eines strahlungsemittierenden halbleiterbauelements und strahlungsemittierendes halbleiterbauelement |
Country Status (3)
Country | Link |
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US (1) | US9831390B2 (de) |
DE (2) | DE102012108704A1 (de) |
WO (1) | WO2014041165A1 (de) |
Cited By (1)
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---|---|---|---|---|
WO2021156324A1 (de) * | 2020-02-05 | 2021-08-12 | Osram Opto Semiconductors Gmbh | Verfahren zur herstellung einer konversionsschicht auf einer halbleiterschichtenfolge und optoelektronisches bauelement |
Families Citing this family (7)
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DE102013109031B4 (de) * | 2013-08-21 | 2021-11-04 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Verfahren zur Herstellung eines optoelektronischen Halbleiterchips |
DE102014112769A1 (de) * | 2014-09-04 | 2016-03-10 | Osram Opto Semiconductors Gmbh | Verfahren zur Herstellung eines optoelektronischen Halbleiterbauelements |
JP6361722B2 (ja) * | 2015-12-08 | 2018-07-25 | 日亜化学工業株式会社 | 発光装置の製造方法 |
US10886437B2 (en) | 2016-11-03 | 2021-01-05 | Lumileds Llc | Devices and structures bonded by inorganic coating |
EP3991209A1 (de) | 2019-06-25 | 2022-05-04 | Lumileds LLC | Phosphorschicht für mikro-led-anwendungen |
US11362243B2 (en) | 2019-10-09 | 2022-06-14 | Lumileds Llc | Optical coupling layer to improve output flux in LEDs |
US11411146B2 (en) | 2020-10-08 | 2022-08-09 | Lumileds Llc | Protection layer for a light emitting diode |
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DE102012105691B4 (de) | 2012-06-28 | 2018-10-25 | Osram Opto Semiconductors Gmbh | Verfahren zur Abscheidung einer elektrophoretisch abgeschiedenen partikulären Schicht, strahlungsemittierendes Halbleiterbauelement und optisches Element |
-
2012
- 2012-09-17 DE DE102012108704.0A patent/DE102012108704A1/de not_active Withdrawn
-
2013
- 2013-09-16 US US14/428,896 patent/US9831390B2/en active Active
- 2013-09-16 WO PCT/EP2013/069151 patent/WO2014041165A1/de active Application Filing
- 2013-09-16 DE DE112013004509.5T patent/DE112013004509B4/de active Active
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Also Published As
Publication number | Publication date |
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DE112013004509A5 (de) | 2015-06-03 |
DE102012108704A1 (de) | 2014-03-20 |
US20150255683A1 (en) | 2015-09-10 |
US9831390B2 (en) | 2017-11-28 |
DE112013004509B4 (de) | 2021-10-07 |
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