WO2014038132A1

WO2014038132A1 - Method of manufacturing semiconductor device, semiconductor device, and electronic apparatus

Info

Publication number: WO2014038132A1
Application number: PCT/JP2013/004807
Authority: WO
Inventors: Mao Katsuhara; Iwao Yagi
Original assignee: Sony Corporation
Priority date: 2012-09-10
Filing date: 2013-08-09
Publication date: 2014-03-13
Also published as: JP2014053555A

Abstract

There is provided a method of manufacturing a semiconductor device, the method including: applying a solution in which organic semiconductor material and insulating layer material are mixed; and forming an organic semiconductor layer (40) and an insulating layer (50) utilizing phase separation, the insulating layer being in contact with a top surface of the organic semiconductor layer.

Description

METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SEMICONDUCTOR DEVICE, AND ELECTRONIC APPARATUS

The present disclosure relates to a method of manufacturing a semiconductor device such as an organic thin film transistor (an organic TFT), to a semiconductor device, and to an electronic apparatus using the semiconductor device.

Since an organic semiconductor material is dissolved in a solvent, the organic semiconductor material may be used for forming a thin film by coating or printing in a state of ink. In addition thereto, a manufacturing technology in which a vacuum apparatus is not used and environmental load is low due to high material use efficiency is applicable to the organic semiconductor material. In terms thereof, the organic semiconductor material attracts the attention (for example, see NPL 1).

C. D. Dimitrakopoulos et al., "Organic Thin Film Transistors for Large Area Electronics," Advanced Materials, January 16, 2002, Volume 14,

Summary

In contrast, due to the foregoing characteristics of the organic semiconductor, the organic semiconductor material is damaged by a solvent and/or the like used for a semiconductor process. In particular, it is difficult to perform a process thereof directly above an organic semiconductor layer, and a coating material that is allowed to be formed on the organic semiconductor layer is generally limited to a water-soluble solvent or a fluorinated solvent. It is often the case that the foregoing coating materials do not have favorable material physicality and favorable processability, and desired characteristics are not allowed to be obtained in some cases.

It is desirable to provide a method of manufacturing a semiconductor device and a semiconductor device that are capable of forming an insulating layer with high functionality on an organic semiconductor layer by expanding material choices, and an electronic apparatus using the semiconductor device.

According to an embodiment of the present disclosure, there is provided a method of manufacturing a semiconductor device, the method including: applying a solution in which organic semiconductor material and insulating layer material are mixed; and forming an organic semiconductor layer and an insulating layer utilizing phase separation, the insulating layer being in contact with a top surface of the organic semiconductor layer.

In the method of manufacturing the semiconductor device according to the abpve embodiment of the present disclosure, the organic semiconductor layer and the insulating layer in contact with the top surface of the organic semiconductor layer are formed by utilizing phase separation. Therefore, it is not necessary to apply a solution of an insulating layer material to the top surface of an organic semiconductor layer after the organic semiconductor layer is formed. Accordingly, a material of the insulating layer is not limited to a water-soluble solvent or a fluorinated solvent, and material choices of the insulating layer are allowed to be expanded to an insulating layer material having favorable material physicality and favorable processability.

According to an embodiment of the present disclosure, there is provided a semiconductor device including: an organic semiconductor layer; and an insulating layer in contact with a top surface of the organic semiconductor layer. The organic semiconductor layer and the insulating layer are formed utilizing phase separation.

In the semiconductor device according to the above embodiment of the present disclosure, the organic semiconductor layer and the insulating layer in contact with the top surface of the organic semiconductor layer are formed by utilizing phase separation. Therefore, a material of the insulating layer is not limited to a water-soluble solvent or a fluorinated solvent, and the insulating layer is made of a material having favorable material physicality, favorable processability, and the like. Therefore, the insulating layer has high functionality.

According to an embodiment of the present disclosure, there is provided an electronic apparatus with a semiconductor device, the semiconductor device including: an organic semiconductor layer; and an insulating layer in contact with a top surface of the organic semiconductor layer. The organic semiconductor layer and the insulating layer are formed utilizing phase separation.

In the electronic apparatus according to the above embodiment of the present disclosure, a desirable operation is performed by the semiconductor device according to the above embodiment of the present disclosure.

According to the method of manufacturing the semiconductor device, the semiconductor device, and the electronic apparatus according to the above embodiments of the present disclosure, the organic semiconductor layer and the insulating layer in contact with the top surface of the organic semiconductor layer are formed by utilizing phase separation. Therefore, choices of the insulating layer material are expanded, and the insulating layer having high functionality is allowed to be formed on the organic semiconductor layer.

It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the technology as claimed.

The accompanying drawings are included to provide a further understanding of the disclosure, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments and, together with the specification, serve to explain the principles of the technology.

Fig. 1 is a cross-sectional view illustrating a configuration of a thin film transistor according to a first embodiment of the present disclosure. Fig. 2 is a cross-sectional view illustrating a method of manufacturing the thin film transistor illustrated in Fig. 1 in order of steps. Fig. 3 is a cross-sectional view illustrating a step following a step of Fig. 2. Fig. 4 is a cross-sectional view illustrating a step following the step of Fig. 3. Fig. 5 is a cross-sectional view illustrating a step following the step of Fig. 4. Fig. 6 is a cross-sectional view illustrating a step following the step of Fig. 5. Fig. 7 is a cross-sectional view illustrating a configuration of a thin film transistor according to Example 1 of the embodiment of the present disclosure. Fig. 8 is a cross-sectional view illustrating a method of manufacturing the thin film transistor illustrated in Fig. 7 in order of steps. Fig. 9 is a cross-sectional view illustrating a step following a step of Fig. 8. Fig. 10 is a cross-sectional view illustrating a step following the step of Fig. 9. Fig. 11 is a cross-sectional view illustrating a step following the step of Fig. 10. Fig. 12 is a cross-sectional view illustrating a step following the step of Fig. 11. Fig. 13 is a cross-sectional view illustrating a step following the step of Fig. 12. Fig. 14 is a cross-sectional view illustrating a step following the step of Fig. 13. Fig. 15 is a cross-sectional view illustrating a step following the step of Fig. 14. Fig. 16 is a cross-sectional view illustrating a configuration of a thin film transistor according to Example 2 of the embodiment of the present disclosure. Fig. 17 is a cross-sectional view illustrating a method of manufacturing the thin film transistor illustrated in Fig. 16 in order of steps. Fig. 18 is a cross-sectional view illustrating a step following a step of Fig. 17. Fig. 19 is a cross-sectional view illustrating a step following the step of Fig. 18. Fig. 20 is a cross-sectional view illustrating a step following the step of Fig. 19. Fig. 21 is a cross-sectional view illustrating a step following the step of Fig. 20. Fig. 22 is a cross-sectional view illustrating a step following the step of Fig. 21. Fig. 23 is a cross-sectional view illustrating a step following the step of Fig. 22. Fig. 24 is a cross-sectional view illustrating a configuration of a thin film transistor according to Modification 1 of the embodiment of the present disclosure. Fig. 25 is a cross-sectional view illustrating a method of manufacturing the thin film transistor illustrated in Fig. 24 in order of steps. Fig. 26 is a cross-sectional view illustrating a step following a step of Fig. 25. Fig. 27 is a cross-sectional view illustrating a step following the step of Fig. 26. Fig. 28 is a cross-sectional view illustrating a step following the step of Fig. 27. Fig. 29 is a cross-sectional view illustrating a step following the step of Fig. 28. Fig. 30 is a cross-sectional view illustrating another method of manufacturing the thin film transistor illustrated in Fig. 24 in order of steps. Fig. 31 is a cross-sectional view illustrating a step following a step of Fig. 30. Fig. 32 is a cross-sectional view illustrating a step following the step of Fig. 31. Fig. 33 is a cross-sectional view illustrating a step following the step of Fig. 32. Fig. 34 is a cross-sectional view illustrating a step following the step of Fig. 33. Fig. 35 is a cross-sectional view illustrating a configuration of a thin film transistor according to Modification 2 of the embodiment of the present disclosure. Fig. 36 is a cross-sectional view illustrating a method of manufacturing the thin film transistor illustrated in Fig. 35 in order of steps. Fig. 37 is a cross-sectional view illustrating a step following a step of Fig. 36. Fig. 38 is a cross-sectional view illustrating a step following the step of Fig. 37. Fig. 39 is a cross-sectional view illustrating a step following the step of Fig. 38. Fig. 40 is a cross-sectional view illustrating a step following the step of Fig. 39. Fig. 41 is a cross-sectional view illustrating a step following the step of Fig. 40. Fig. 42 is a cross-sectional view illustrating a step following the step of Fig. 41. Fig. 43 is a cross-sectional view illustrating a step following the step of Fig. 42. Fig. 44 is a cross-sectional view illustrating another method of manufacturing the thin film transistor illustrated in Fig. 35 in order of steps. Fig. 45 is a cross-sectional view illustrating a step following a step of Fig. 44. Fig. 46 is a cross-sectional view illustrating a step following the step of Fig. 45. Fig. 47 is a cross-sectional view illustrating a step following the step of Fig. 46. Fig. 48 is a cross-sectional view illustrating a configuration of a thin film transistor according to Modification 3 of the embodiment of the present disclosure. Fig. 49 is a cross-sectional view illustrating a step of a method of manufacturing the thin film transistor illustrated in Fig. 48. Fig. 50 is a cross-sectional view illustrating a configuration of a thin film transistor according to Modification 4 of the embodiment of the present disclosure. Fig. 51 is a cross-sectional view illustrating a configuration of an electronic paper display unit according to a second embodiment of the present disclosure. Fig. 52 is a cross-sectional view illustrating a configuration of an organic EL display unit according to a third embodiment of the present disclosure. Fig. 53 is a cross-sectional view illustrating a configuration of a liquid crystal display unit according to a fourth embodiment of the present disclosure. Fig. 54 is a plan view illustrating a schematic configuration of a module including any of the display units according to the foregoing embodiments. Fig. 55 is a perspective view illustrating an appearance viewed from the front side of Application example 1 of any of the display units according to the foregoing embodiments. Fig. 56 is a perspective view illustrating an appearance of Application example 1 viewed from the rear side thereof. Fig. 57 is a perspective view illustrating an appearance of Application example 2 viewed from the front side thereof. Fig. 58 is a perspective view illustrating an appearance of Application example 2 viewed from the rear side thereof. Fig. 59 is a perspective view illustrating an appearance of Application example 3. Fig. 60 is a perspective view illustrating an appearance Application example 4 viewed from the front side thereof. Fig. 61 is a perspective view illustrating an appearance of Application example 4 viewed from the rear side thereof. Fig. 62 is a perspective view illustrating an appearance of Application example 5. Fig. 63 is a perspective view illustrating an appearance of Application example 6. Fig. 64 is a front view illustrating an appearance of Application example 7 in a closed state. Fig. 65 is a front view illustrating an appearance of Application example 7 in an open state.

Some embodiments of the present disclosure will be described in detail below with reference to the drawings. The description will be given in the following order.
1. First Embodiment (a thin film transistor: an example in which a two-layer structure including an organic semiconductor layer and an insulating layer in order is formed by phase separation)
2. Example 1 (a thin film transistor: an example in which a three-layer structure including a lower organic semiconductor layer, an insulating layer, and an upper organic semiconductor layer in order is formed by phase separation)
3. Example 2 (a thin film transistor: an example in which a reversed two-layer structure including an insulating layer and an organic semiconductor layer in order is formed on a blanket by phase separation, and the reversed two-layer structure is transferred to a base material)
4. Modifications 1 to 4
5. Second Embodiment (an electronic paper display unit)
6. Third Embodiment (an organic EL display unit)
7. Fourth Embodiment (a liquid crystal display unit)
8. Application Examples
(1. First Embodiment)

Fig. 1 illustrates a cross-sectional configuration and a plane configuration of a thin film transistor (an organic TFT) 100 according to a first embodiment of the present disclosure. The organic TFT 100 may be an organic field-effect transistor having a bottom-gate and top-contact structure that is used for, for example, an active-matrix circuit of a display unit, a sensor array, or the like. The organic TFT 100 may have, for example, a gate electrode 20, a gate insulating film 30, and an organic semiconductor layer 40 in order on a substrate 11. On a channel layer 41 in the middle portion of the organic semiconductor layer 40, a channel protective film 50 is provided being in contact with the top surface of the organic semiconductor layer 40. Both ends of the organic semiconductor layer 40 are contact sections 42 exposed from the channel protective film 50. A source electrode 60S and a drain electrode 60D are connected to the contact sections 42.

The substrate 11 may be formed of glass; a plastic substrate made of polyether sulfone, polycarbonate, polyimides, polyamides, polyacetals, polyethylene terephthalate, polyethylene naphthalate, polyethyl ether ketone, polyolefins, or the like; a metal foil substrate made of aluminum (Al), nickel (Ni), stainless steel, or the like; paper; or the like. Further, on the substrate 11, a functional film such as a buffer layer to improve adhesibility and flatness and a barrier film to improve gas barrier characteristics may be provided.

The gate electrode 20 may be made of gold (Au), platinum (Pt), palladium (Pd), silver (Ag), tungsten (W), tantalum (Ta), molybdenum (Mo), aluminum (Al), chromium (Cr), titanium (Ti), copper (Cu), nickel (Ni), indium (In), tin (Sn), manganese (Mn), ruthenium (Rh), rubidium (Rb), a compound thereof, or an organic metal material such as PEDOT-PSS(polyethylene dioxythiophene-polystyrene sulfonate) and TTF-TCNQ(tetrathiafulvalene-tetracyano-quinodimethane). It is to be noted that the gate electrode 20 may have a laminated structure in which two or more layers each made of any of the foregoing various materials are laminated.

The gate insulating film 30 is configured of an inorganic insulating film or an organic insulating film. Examples of the inorganic insulating film may include inorganic materials such as silicon oxide, silicon nitride, aluminum oxide, titanium oxide, and hafnium oxide. Examples of the organic insulating film may include polymer materials such as polyvinyl phenol, a polyimide resin, a novolak resin, a cinnamate resin, an acryl resin, an epoxy resin, a styrene resin, and a polyparaxylene. It is to be noted that the gate insulating film 30 may have a laminated structure in which two or more of the foregoing inorganic insulating films and the foregoing organic insulating films are laminated.

Examples of the materials of the organic semiconductor layer 40 may include the following materials.

That is, examples of the materials of the organic semiconductor layer 40 may include polymers such as polypyrrole and a polypyrrole substitution product; polythiophene and a polythiophene substitution product; isothianaphthenes such as polyisothianaphthene; thienylenevinylenes such as polythienylenevinylenes, poly(p-phenylenevinylene)s such as poly(p-phenylenevinylene); polyaniline and a polyaniline substitution product; polyacetylenes; polydiacetylenes; polyazulenes; polypyrenes; polycarbazoles; polyselenophenes; polyfurans, poly(p-phenylene)s; polyindoles; polypyridazines; polyvinylcarbazole, polyphenylenesulfide, and polyvinylenesulfide; and polycondensed bodies thereof. Examples of the materials of the organic semiconductor layer 40 may further include: oligomers having the same repeating unit as that of each polymer in the foregoing materials; acenes such as naphthacene, pentacene, hexacene, heptacene, dibenzopentacene, tetrabenzopentacene, pyrene, dibenzopyrene, chrysene, perylene, coronene, terylene, ovalene, quaterylene, and circumanthracene, a derivative (triphenodioxazine, triphenodithiazine, hexacene-6,15-quinone, perixanthenoxanthene, or the like) obtained by substituting an atom such as N, S, and O or a functional group such as a carbonyl group for part of carbon in any of the foregoing acenes, and a derivative obtained by substituting other functional group for hydrogen thereof; metal phthalocyanines; tetrathiafulvalene and tetrathiafulvalene derivatives; tetrathiapentalene and tetrathiapentalene derivatives; naphthalene tetracarboxylic acid diimides such as naphthalene 1,4,5,8-tetracarboxylic acid diimide, N,N'-bis(4-trifluoromethylbenzil)naphthalene 1,4,5,8-tetracarboxylic acid diimide, N,N'-bis(1H,1H-perfluorooctyl), N,N'-bis(1H,1H-perfluorobutyl), an N,N'-dioctylnaphthalene 1,4,5,8-tetracarboxylic acid diimide derivative, and naphthalene 2,3,6,7 tetracarboxylic acid diimide; condensed-ring tetracarboxylic acid diimides such as anthracene tetracarboxylic acid diimides such as anthracene 2,3,6,7-tetracarboxylic acid diimide; fullerenes such as C60, C70, C76, C78, and C84 and derivatives thereof; carbon nanotube such as SWNT (single-walled nanotube); and a dye such as merocyanine dyes and hemi cyanine dyes and a derivative thereof.

Examples of materials of the channel protective film 50 may include polystyrene, polymethyl methacrylate, polyethylene, polypropylene, polybutadiene, polyisoprene, polyolefin, polycarbonate, polyimide, polyamide, poly(alpha-methylstyrene), poly(alpha-ethylstyrene), poly(alpha-propylstyrene), poly(alpha-butylstyrene), poly(4-methylstyrene), polyacrylonitrile, polyvinylcarbazole, polyvinylidene fluoride, polyvinylbutylal, polyvinyltoluene, poly(4-vinylbiphenyl), a halide of any of the foregoing polymers such as polytetrafluoroethylene, and a copolymer thereof.

Constituent materials of the source electrode 60S and the drain electrode 60D are similar to that of the gate electrode 20.

The organic semiconductor layer 40 and the channel protective film 50 are formed by utilizing phase separation. Thereby, in the organic TFT 100, the channel protective film 50 with high functionality is allowed to be formed on the organic semiconductor layer 40 by expanding material choices of the channel protective film 50.

The organic semiconductor layer 40 corresponds to a specific but not limitative example of "organic semiconductor layer" in an embodiment of the present disclosure. The channel protective film 50 corresponds to a specific but not limitative example of "insulating layer" in an embodiment of the present disclosure.

The organic TFT 100 may be manufactured, for example, as follows.

Fig. 2 to Fig. 6 illustrate a method of manufacturing the organic TFT 100 illustrated in Fig. 1 in order of steps. First, as illustrated in Fig. 2, the substrate 11 made of the foregoing material is prepared. A base material 10 in which the gate electrode 20 and the gate insulating film 30 are formed on the substrate 11 is formed.

That is, a gate electrode material film (not illustrated) made of the foregoing material is formed on the substrate 11. The gate electrode material film may be formed, for example, by a vacuum evaporation method such as resistance heating evaporation and sputtering, or a coating method with the use of ink paste. Examples of the coating method may include a spin coat method, an air doctor coater method, a blade coater method, a rod coater method, a knife coater method, a squeeze coater method, a reverse roll coater method, a transfer roll coater method, a gravure coater method, a kiss coater method, a cast coater method, a spray coater method, a slit orifice coater method, a calendar coater method, and a dipping method. Further, the gate electrode material film may be formed by a plating method such as electrolytic plating and a non-electrolytic plating.

Next, a mask (not illustrated) such as a resist pattern is formed on the gate electrode material film. Subsequently, after the gate electrode material film is etched with the use of the mask, the mask is removed by an ashing method, an etching method, or the like. Thereby, as illustrated in Fig. 2, the gate electrode 20 is formed on the substrate 11.

Subsequently, as illustrated in Fig. 2 again, the gate insulating film 30 is formed to cover the gate electrode 20. A procedure of forming the gate insulating film 30 may vary, for example, depending on the formation material. The inorganic insulating film is formed by a vacuum process such as a sputtering method, a resistance heating evaporation method, a physical vapor-phase deposition method (PVD), and a chemical vapor-phase deposition method (CVD). Further, the inorganic insulating film may be also formed by a sol-gel method of a solution in which a raw material is dissolved. The organic insulating film may be formed by a coating method such as a spin coat method, an air doctor coater method, a blade coater method, a rod coater method, a knife coater method, a squeeze coater method, a reverse roll coater method, a transfer roll coater method, a gravure coater method, a kiss coater method, a cast coater method, a spray coater method, a slit orifice coater method, a calendar coater method, and a dipping method. In addition thereto, the organic insulating film may be formed by a vacuum process such as a chemical vapor-phase deposition method and an evaporation polymerization method.

Thereafter, as illustrated in Fig. 3, the base material 10 is coated with a mixed solution of an organic semiconductor material and an insulating layer material, and thereby, a coating film 70 is formed.

Examples of the organic semiconductor material may be similar to the foregoing materials listed above as the materials of the organic semiconductor layer 40.

Examples of the insulating layer material may be similar to the foregoing materials listed as the materials of the channel protective film 50. A film of any of these materials is not allowed to be formed on the organic semiconductor layer 40 in the case of using a method of coating the top surface of an organic semiconductor layer with a solution of the insulating layer material after forming the organic semiconductor layer.

The coating film 70 may be formed by a vacuum evaporation method such as resistance heating evaporation and sputtering. In addition thereto, the coating film 70 may be formed by a coating method such as a spin coat method, an air doctor coater method, a blade coater method, a rod coater method, a knife coater method, a squeeze coater method, a reverse roll coater method, a transfer roll coater method, a gravure coater method, a kiss coater method, a cast coater method, a spray coater method, a slit orifice coater method, a calendar coater method, and a dipping method.

When the coating film 70 is dried, as illustrated in Fig. 4, a two-layer structure 71 having the organic semiconductor layer 40 on a the base material 10 side and the channel protective film 50 thereon is created by spontaneous phase separation. A clean interface P with few traps is formed between the organic semiconductor layer 40 and the channel protective film 50 by the phase separation.

In this case, the organic semiconductor layer 40 and the channel protective film 50 in contact with the top surface of the organic semiconductor layer 40 are formed by utilizing phase separation. Therefore, it is not necessary to coat the top surface of the organic semiconductor layer with a solution of the insulating layer material after the organic semiconductor layer is formed. Accordingly, a material of the channel protective film 50 is not limited to a water-soluble solvent or a fluorinated solvent, and material choices of the channel protective film 50 are allowed to be expanded to an insulating layer material having favorable material physicality and favorable processability.

Subsequently, as illustrated in Fig. 5, the organic semiconductor layer 40 is singulated as necessary. Further, an unnecessary portion of the channel protective film 50 (a portion on the contact section 42) is removed.

Thereafter, a source-drain electrode material film (not illustrated) made of the foregoing material is formed on the surfaces of the organic semiconductor layer 40, the channel protective film 50, and the base material 10. A method of forming the source-drain electrode material film may be similar to that of the foregoing gate electrode material film.

Subsequently, the source-drain electrode material film (not illustrated) is patterned by photolithography to form the source electrode 60S and the drain electrode 60D as illustrated in Fig. 6.

In the previous steps, the clean interface P with few traps that is formed by phase separation is retained between the organic semiconductor layer 40 and the channel protective film 50. Therefore, an upper end 41A of the channel layer 41 of the organic semiconductor layer 40 is protected from a solution, a chemical solution, etc. used in the process, and unnecessary carrier induction and/or the like does not occur. Accordingly, reliability is improved.

Accordingly, the organic TFT 100 illustrated in Fig. 1 is completed.

In the organic TFT 100, the organic semiconductor layer 40 and the channel protective film 50 are formed by utilizing phase separation. Therefore, the material of the channel protective film 50 is not limited to a water-soluble solvent or a fluorinated solvent. The channel protective film 50 is made of a material having favorable material physicality, favorable processability, and the like. Therefore, the channel protective film 50 has high functionality. Therefore, desirable TFT characteristics are obtained. Further, the clean interface P with few traps that is formed by phase separation is retained between the organic semiconductor layer 40 and the channel protective film 50. Therefore, the upper end 41A of the channel layer 41 of the organic semiconductor layer 40 is protected from a solution, a chemical solution, etc. used in the process, and unnecessary carrier induction and/or the like does not occur. Accordingly, reliability is improved.

As described above, in this embodiment, the organic semiconductor layer 40 and the channel protective film 50 are formed by utilizing phase separation. Therefore, material choices of the channel protective film 50 are expanded, and thereby, the channel protective film 50 with high functionality is allowed to be formed on the organic semiconductor layer 40.

Further, specific examples according to the embodiment of the present disclosure will be described.
(Example 1)

An organic TFT 100A having a bottom-gate and top-contact structure as illustrated in Fig. 7 was fabricated. At this time, on the substrate 11, the gate electrode 20, the gate insulating film 30, and the organic semiconductor layer 40 were formed in order from the substrate 11. On the channel layer 41 of the organic semiconductor layer 40, the channel protective film 50 was provided being in contact with the top surface of the organic semiconductor layer 40. On the channel protective film 50, an etching mask 80 made of a photoresist was laminated. Both ends of the organic semiconductor layer 40 were configured to be the contact sections 42 exposed from the channel protective film 50. The source electrode 60S and the drain electrode 60D were connected to the contact sections 42. An injection layer 61 made of a conducive polymer was provided between the contact section 42 and the source electrode 60S, and between the contact section 42 and the drain electrode 60D. The gate electrode 20 had a laminated configuration of an aluminum layer and a titanium layer. The gate insulating film 30 was an organic insulating film containing PVP as a base compound. The organic semiconductor layer 40 was configured of TIPS pentacene. The channel protective film 50 was configured of poly alpha-methylstyrene (PaMS) (0.5 wt%). The source electrode 60S and the drain electrode 60D were configured of copper (Cu).

In the present example, the organic semiconductor layer 40 corresponds to a specific but not limitative example of the "organic semiconductor layer" in the embodiment of the present disclosure. The channel protective film 50 corresponds to a specific but not limitative example of the "insulating layer" in the embodiment of the present disclosure.

First, as illustrated in Fig. 8, the base material 10 in which the gate electrode 20 and the gate insulating film 30 were formed on the substrate 11 was formed.

That is, a gate electrode material film (not illustrated) having a laminated structure configured of an aluminum layer being 50 nm thick and a titanium layer being 10 nm thick was formed on the substrate 11 by sputtering. The gate electrode material film was patterned by photolithography to form the gate electrode 20. Next, on the substrate 11 on which the gate electrode 20 was formed, the gate insulating film 30 made of an organic insulating film having PVP as a base compound was formed by a spin coat method.

Subsequently, as illustrated in Fig. 9, the base material 10 was coated with a solution obtained by mixing TIPS pentacene (0.5 wt%) as an organic semiconductor material and PaMS (0.5 wt%) as an insulating layer material in xylene as a solvent by a slit coat method to form the coating film 70.

Thereafter, the coating film 70 was dried at 140 deg C. Accordingly, as illustrated in Fig. 10, a three-layer structure 72 including a lower organic semiconductor layer 40A, the channel protective film 50, and an upper organic semiconductor layer 40B in order from the base material 10 was obtained by spontaneous phase separation. The lower organic semiconductor layer 40A and the upper organic semiconductor layer 40B were made of TIPS pentacene. The central channel protective film was made of PaMS. The clean interface P with few traps was formed between the lower organic semiconductor layer 40A and the channel protective film 50, and between the upper organic semiconductor layer 40B and the channel protective film 50 by phase separation.

It is to be noted that the laminated structure formed by spontaneous phase separation varies depending on the specific weight of a material, material affinity with a base, and/or the like. Therefore, depending on a selection of a material and a combination of a material and a base, the two-layer structure 71 having the organic semiconductor layer 40 on the base material 10 side and a channel protective film 50 thereon is allowed to be formed as in the first embodiment.

After the three-layer structure 72 was formed, as illustrated in Fig. 11, the upper organic semiconductor layer 40B as the uppermost layer was removed by etching with the use of a gamma-butyllactone solution. Thereby, the organic semiconductor layer 40 on the base material 10 side and the channel protective film 50 thereon remained.

Subsequently, as illustrated in Fig. 12, the etching mask 80 was formed on the channel protective film 50 with the use of a photoresist containing gamma-butyllactone as a main component. Thereafter, as also illustrated in Fig. 12, an unnecessary portion of the channel protective film 50 was removed by dry etching with the use of the etching mask 80.

Thereafter, as illustrated in Fig. 13, the injection layer 61 made of a conductive polymer was formed by coating.

After the injection layer 61 was formed, a source-drain electrode material film (not illustrated) made of copper having a thickness of 100 nm was formed on the injection layer 61 by sputtering. Subsequently, the source-drain electrode material film was patterned by photolithography to form the source electrode 60S and the drain electrode 60D as illustrated in Fig. 14.

After the source electrode 60S and the drain electrode 60D were formed, as illustrated in Fig. 15, an unnecessary portion of the injection layer 61 was removed by dry etching with the use of the source electrode 60S and the drain electrode 60D as masks. Accordingly, the organic TFT 100A having a bottom-gate and top-contact structure as illustrated in Fig. 7 was completed.

In the foregoing steps, the clean interface P with few traps that was formed by phase separation was retained between the organic semiconductor layer 40 and the channel protective film 50. Therefore, the upper end 41A of the channel layer 41 of the organic semiconductor layer 40 was protected from a solution, a chemical solution, etc. used in the process, and unnecessary carrier induction did not occur. Accordingly, reliability was improved.
(Example 2)

An organic TFT 100B having a top-gate and bottom-contact structure as illustrated in Fig. 16 was fabricated. At this time, on the substrate 11, the source electrode 60S, the drain electrode 60D, the organic semiconductor layer 40, a first gate insulating film 50, a second gate insulating film 30, and the gate electrode 20 were formed in order from the substrate 11. The source electrode 60S and the drain electrode 60D were made of gold (Au). The organic semiconductor layer 40 was made of a PXX derivative. The first gate insulating film 50 was made of a cycloolefin copolymer (TOPAS) (0.5 wt%). The second gate insulating film 30 was an organic insulating film containing PVP as a base compound. The gate electrode 20 had a laminated configuration of an aluminum layer and a titanium layer.

In this example, the organic semiconductor layer 40 corresponds to a specific but not limitative example of the "organic semiconductor layer" in the embodiment of the present disclosure. The first gate insulating film 50 corresponds to a specific but not limitative example of the "insulating layer" in the embodiment of the present disclosure.

First, as illustrated in Fig. 17, a blanket 90 was prepared. The blanket 90 was coated with a solution obtained by mixing the PXX derivative (0.5 wt%) as an organic semiconductor material and the TOPAS (0.5 wt%) as an insulating layer material in xylene as a solvent by a slit coat method to form the coating film 70.

Thereafter, the coating film 70 was dried at room temperature. Accordingly, as illustrated in Fig. 18, a reversed two-layer structure 73 including the first gate insulating film 50 and the organic semiconductor layer 40 in order from the base material 10 was obtained by spontaneous phase separation. The first gate insulating film 50 was configured of the TOPAS. The organic semiconductor layer 40 was configured of the PXX derivative. The clean interface P with few traps was formed between the organic semiconductor layer 40 and the first gate insulating film 50 by phase separation.

It is to be noted that the laminated structure formed by spontaneous phase separation varies depending on the specific weight of a material, material affinity with a base, and/or the like. Therefore, according to a selection of a material or a combination of a material and a base, a laminated structure different from the foregoing structure is allowed to be formed.

After the reversed two-layer structure 73 was formed, as illustrated in Fig. 19, an unnecessary portion of the film was removed with the use of a removal plate (not illustrated) from the blanket 90.

In contrast, as illustrated in Fig. 20, the base material 10 having the source electrode 60S and the drain electrode 60D on the substrate 11 was formed.

Subsequently, as illustrated in Fig. 21, the reversed two-layer structure 73 was transferred from the blanket 90 to the base material 10. In this step, on the base material 10, the organic semiconductor layer 40became a lower layer, and the first gate insulating film 50 became an upper layer, in reverse. Thereby, a forward two-layer structure 74 including the organic semiconductor layer 40 and the first gate insulating film 50 in order from the base material 10 was formed on the base material 10.

After the forward two-layer structure 74 was formed, as illustrated in Fig. 22, the second gate insulating film 30 containing PVP as a base compound was formed by coating by a slit coat method.

Subsequently, as illustrated in Fig. 23, a gate electrode material film (not illustrated) having a laminated structure configured of an aluminum layer and a titanium layer (being 70 nm thick in total) was formed on the second gate insulating film 30. The gate electrode material film was patterned by photolithography to form the gate electrode 20. Accordingly, the organic TFT 100B having a top-gate and bottom-contact structure illustrated in Fig. 16 was completed.

In the foregoing steps, the interface P between the organic semiconductor layer 40 and the channel protective film 50 was formed by phase separation, was protected from a solution, a chemical solution, etc. used in the process, and was maintained clean. Therefore, reliability was improved.

A description will be given of modifications of the foregoing first embodiment.
(Modification 1)

In the foregoing first embodiment, the description has been given of the organic TFT 100 having a bottom-gate and top-contact structure as illustrated in Fig. 1 as an example. However, the present disclosure is also applicable to an organic TFT 100C having a bottom-gate and bottom-contact structure as illustrated in Fig. 24. The organic TFT 100C has the gate electrode 20, the gate insulating film 30, the source electrode 60S and the drain electrode 60D, the organic semiconductor layer 40, and the channel protective film 50 in order from the substrate 11 on the substrate 11. The source electrode 60S and the drain electrode 60D are connected to the bottom surface of the organic semiconductor layer 40. The channel protective film 50 is provided being in contact with the top surface of the organic semiconductor layer 40.

In this modification, the organic semiconductor layer 40 corresponds to a specific but not limitative example of the "organic semiconductor layer" in the embodiment of the present disclosure. The channel protective film 50 corresponds to a specific but not limitative example of the "insulating layer" in the embodiment of the present disclosure.

The organic TFT 100C may be manufactured, for example, as follows.

Fig. 25 to Fig. 29 illustrate a method of manufacturing the organic TFT 100C in order of steps. In the manufacturing method thereof, for example, as in Example 1, after the coating film 70 is formed, the three-layer structure 72 is formed by spontaneous phase separation, and the uppermost layer is removed.

First, as illustrated in Fig. 25, the base material 10 in which the gate electrode 20, the gate insulating film 30, and the source electrode 60S and the drain electrode 60D were formed on the substrate 11 was formed.

That is, as in Example 1 or the first embodiment, the gate electrode 20 and the gate insulating film 30 are formed in order on the substrate 11. Next, as in Example 1 or the first embodiment, the source electrode 60S and the drain electrode 60D are formed on the gate insulating film 30.

Subsequently, as illustrated in Fig. 26, as in Example 1, the base material 10 is coated with a solution obtained by mixing TIPS pentacene (0.5 wt%) as an organic semiconductor material and PaMS (0.5 wt%) as an insulating layer material in xylene as a solvent by a slit coat method to form the coating film 70.

Thereafter, the coating film 70 is dried at 140 deg C. Accordingly, as illustrated in Fig. 27, the three-layer structure 72 including the lower organic semiconductor layer 40A, the channel protective film 50, and the upper organic semiconductor layer 40B in order from the base material 10 is obtained by spontaneous phase separation. The lower organic semiconductor layer 40A and the upper organic semiconductor layer 40B are configured of the TIPS pentacene. The channel protective film 50 in the middle is configured of the PaMS. The clean interface P with few traps is formed between the lower organic semiconductor layer 40A and the channel protective film 50, and between the upper organic semiconductor layer 40B and the channel protective film 50 by phase separation.

It is to be noted that the laminated structure formed by spontaneous phase separation varies depending on the specific weight of a material, material affinity with a base, and/or the like. Therefore, depending on a selection of a material or a combination of a material and a base, the two-layer structure 71 having the organic semiconductor layer 40 on the base material 10 side and the first gate insulating film 50 thereon is allowed to be formed as in the first embodiment.

After the three-layer structure 72 is formed, as illustrated in Fig. 28, the upper organic semiconductor layer 40B as the uppermost layer is removed by etching with the use of a gamma-butyllactone solution. Thereby, the organic semiconductor layer 40 on the base material 10 side and the channel protective film 50 thereon remain.

Subsequently, as illustrated in Fig. 29, unnecessary portions of the channel protective film 50 and the organic semiconductor layer 40 are removed by dry etching or wet etching. Accordingly, the organic TFT 100C having a bottom-gate and bottom-contact structure illustrated in Fig. 24 is completed.

In the foregoing steps, the interface P between the organic semiconductor layer 40 and the channel protective film 50 is formed by phase separation, is protected from a solution, a chemical solution, etc. used in the process, and is maintained clean. Therefore, reliability is improved.

Alternatively, the organic TFT 100C may be manufactured, for example, as follows.

Fig. 30 to Fig. 34 illustrate another method of manufacturing the organic TFT 100C in order of steps. In the manufacturing method thereof, for example, as in Example 2, the reversed two-layer structure 73 is formed on the blanket 90 by spontaneous phase separation, the reversed two-layer structure 73 is transferred to the base material 10, and the forward two-layer structure 74 is formed thereby.

First, as illustrated in Fig. 30, the blanket 90 is coated with a solution obtained by mixing a PXX derivative (0.5 wt%) as an organic semiconductor material and a TOPAS (0.5 wt%) as an insulating layer material in xylene as a solvent by a slit coat method to form the coating film 70.

Thereafter, the coating film 70 is dried at room temperature. Accordingly, as illustrated in Fig. 31, the reversed two-layer structure 73 including the first gate insulating film 50 and the organic semiconductor layer 40 in order from the blanket 90 is obtained by spontaneous phase separation. The first gate insulating film 50 is configured of the TOPAS. The organic semiconductor layer 40 is configured of the PXX derivative. The clean interface P with few traps is formed between the organic semiconductor layer 40 and the first gate insulating film 50 by phase separation.

It is to be noted that the laminated structure formed by spontaneous phase separation varies depending on the specific weight of a material, material affinity with a base, and/or the like. Therefore, depending on a selection of a material and a combination of a material and a base, a laminated structure different from the foregoing structure is allowed to be formed.

After the reversed two-layer structure 73 is formed, as illustrated in Fig. 32, an unnecessary portion of the film is removed from the blanket 90 with the use of a removal plate (not illustrated).

In contrast, as illustrated in Fig. 33, the base material 10 having the gate electrode 20, the gate insulating film 30, and the source electrode 60S and the drain electrode 60D on the substrate 11 is formed.

Subsequently, as illustrated in Fig. 34, the reversed two-layer structure 73 is transferred from the blanket 90 to the base material 10. In this step, on the base material 10, the organic semiconductor layer 40 becomes a lower layer, and the first gate insulating film 50 becomes an upper layer, in reverse. Thereby, the forward two-layer structure 74 including the organic semiconductor layer 40 and the first gate insulating film 50 in order from the base material 10 is formed on the base material 10. Accordingly, the organic TFT 100C having a bottom-gate and bottom-contact structure illustrated in Fig. 24 is completed.

In the foregoing steps, the interface P between the organic semiconductor layer 40 and the channel protective film 50 is formed by phase separation, is protected from a solution, a chemical solution, etc. used in the process, and is maintained clean. Therefore, reliability is improved.
(Modification 2)

Further, the present disclosure is also applicable to an organic TFT 100D having a top-gate and top-contact structure as illustrated in Fig. 35. The organic TFT 100D has the organic semiconductor layer 40, the first gate insulating film 50, the source electrode 60S and the drain electrode 60D, the second gate insulating film 30, and the gate electrode 20 in order from the substrate 11 on the substrate 11.

In this modification, the organic semiconductor layer 40 corresponds to a specific but not limitative example of the "organic semiconductor layer" in the embodiment of the present disclosure. The first gate insulating film 50 corresponds to a specific but not limitative example of the "insulating layer" in the embodiment of the present disclosure.

The organic TFT 100D may be manufactured, for example, as follows.

Fig. 36 to Fig. 43 illustrate a method of manufacturing the organic TFT 100D in order of steps. In the manufacturing method thereof, for example, as in Example 1, after the coating film 70 is formed, the three-layer structure 72 is formed by spontaneous phase separation, and the uppermost layer is removed.

First, as illustrated in Fig. 36, the substrate 11 is prepared as the base material 10. Subsequently, as illustrated in Fig. 37, as in Example 1, the base material 10 is coated with a solution obtained by mixing TIPS pentacene (0.5 wt%) as an organic semiconductor material and PaMS (0.5 wt%) as an insulating layer material in xylene as a solvent by a slit coat method to form the coating film 70.

Thereafter, the coating film 70 is dried at 140 deg C. Accordingly, as illustrated in Fig. 38, the three-layer structure 72 including the lower organic semiconductor layer 40A, the first gate insulating film 50, and the upper organic semiconductor layer 40B in order from the base material 10 is obtained by spontaneous phase separation. The lower organic semiconductor layer 40A and the upper organic semiconductor layer 40B are configured of the TIPS pentacene. The first gate insulating film 50 in the middle is configured of the PaMS. The clean interface P with few traps is formed between the lower organic semiconductor layer 40A and the first gate insulating film 50, and between the upper organic semiconductor layer 40B and the first gate insulating film 50 by phase separation.

After the three-layer structure 72 is formed, as illustrated in Fig. 39, the upper organic semiconductor layer 40B as the uppermost layer is removed by etching with the use of a gamma-butyllactone solution. Thereby, the organic semiconductor layer 40 on the base material 10 side and the first gate insulating film 50 thereon remain.

Subsequently, an etching mask (not illustrated) is formed on the first gate insulating film 50 with the use of a photoresist containing gamma-butyllactone as a main component. Thereafter, as illustrated in Fig. 40, an unnecessary portion of the first gate insulating film 50 is removed by dry etching with the use of the etching mask.

After the unnecessary portion of first gate insulating film 50 is removed, a source-drain electrode material film (not illustrated) made of copper having a thickness of 100 nm is formed on the surfaces of the organic semiconductor layer 40 and the first gate insulating film 50 by sputtering. Subsequently, the source-drain electrode material film is patterned by photolithography to form the source electrode 60S and the drain electrode 60D as illustrated in Fig. 41.

After the source electrode 60S and the drain electrode 60D are formed, as illustrated in Fig. 42, the second gate insulating film 30 is formed as in Example 1 or the first embodiment.

Subsequently, as illustrated in Fig. 43, the gate electrode 20 is formed on the gate insulating film 30 as in Example 1 or the first embodiment. Accordingly, the organic TFT 100D having a top-gate and top-contact structure illustrated in Fig. 35 is completed.

Alternatively, the organic TFT 100D may be manufactured, for example, as follows.

Fig. 44 to Fig. 47 illustrate another method of manufacturing the organic TFT 100D in order of steps. In this manufacturing method, for example, as in Example 2, the reversed two-layer structure 73 is formed on the blanket 90 by spontaneous phase separation, the reversed two-layer structure 73 is transferred to the base material 10, and the forward two-layer structure 74 is formed thereby.

First, as illustrated in Fig. 44, the blanket 90 is prepared, and the blanket 90 is coated with a solution obtained by mixing a PXX derivative (0.5 wt%) as an organic semiconductor material and a TOPAS (0.5 wt%) as an insulating layer material in xylene as a solvent by a slit coat method to form the coating film 70.

Thereafter, the coating film 70 is dried at room temperature. Accordingly, as illustrated in Fig. 45, the reversed two-layer structure 73 including the first gate insulating film 50 configured of the TOPAS and the organic semiconductor layer 40 configured of the PXX derivative in order from the blanket 90 is obtained by spontaneous phase separation. The clean interface P with few traps is formed between the organic semiconductor layer 40 and the first gate insulating film 50 by phase separation.

In contrast, as illustrated in Fig. 46, the substrate 11 is prepared as the base material 10. As illustrated in Fig. 47, the reversed two-layer structure 73 is transferred from the blanket 90 to the base material 10. In this step, on the base material 10, the organic semiconductor layer 40 becomes a lower layer, and the first gate insulating film 50 becomes an upper layer, in reverse. Thereby, the forward two-layer structure 74 including the organic semiconductor layer 40 and the first gate insulating film 50 in order from the base material 10 is formed on the base material 10.

After the forward two-layer structure 74 is transferred to the base material 10, as in the foregoing manufacturing method, an unnecessary portion of the first gate insulating film 50 is removed to form the source electrode 60S and the drain electrode 60D by the steps illustrated in Fig. 40 and Fig. 41. Subsequently, as in the foregoing manufacturing method, the second gate insulating film 30 and the gate electrode 20 are formed by the steps illustrated in Fig. 42 and Fig. 43. Accordingly, the organic TFT 100D having a top-gate and top-contact structure illustrated in Fig. 35 is completed.

In the foregoing steps, the interface P between the organic semiconductor layer 40 and the channel protective film 50 is formed by phase separation, is protected from a solution, a chemical solution, etc. used in the process, and is maintained clean. Therefore, reliability is improved.
(Modification 3)

Fig. 48 illustrates a cross-sectional configuration of an organic TFT 100E having a bottom-gate and top-contact structure according to Modification 3 of the embodiment of the present disclosure. This modification has a configuration, functions, and effects similar to those of the foregoing first embodiment, except that a doping region 42A is provided in part of the contact section 42 in a thickness direction from the top surface thereof in the organic semiconductor layer 40.

In the case where the organic semiconductor layer 40 is of a p-type, an acceptor-property material is used as a doping material. In the case where the organic semiconductor layer 40 is of an n-type, a donor-property material is used as a doping material.

Specific examples of the acceptor-property material are as follows.

That is, specific examples of the acceptor-property material may include metal oxides such as MoO_x, ReO₃, V₂O₅, WO₃, TiO₂, AuO, Al₂O₃, CuO, and SO₃; metallic halides such as CuI, SbCl₅, SbF₅, FeCl₃, LiF, BaF₂, CaF₂, and MgF₂; halides such as AsF₅, BF₃, BCl₃, BBr₃, and PF₅; and carbonates such as CaCO₃, BaCO₃, and Li₂CO₃.

Further, the following organic molecules and the following organic complexes may be used.

Specific examples of the acceptor-property material may include p-benzoquinones, diphenoquinones, TCNQs and analogs thereof, fluorenes, benzocyanos and analogs thereof, and transition metal complexes. Examples of p-benzoquinones may include 2,3,5,6-tetracyano-(p-cyanyl), 2,3-dibromo-5,6-dicyano-p-benzoquinone, 2,3-dichrolo-5,6-dicyano-p-benzoquinone, 2,3-diiodo-5,6-dicyano-p-benzoquinone, 2,3-dicyano-p-benzoquinone, p-bromanil, p-chloranil, p-iodenil, p-fluoranil, 2,5-dichloro-p-benzoquinone, 2,6-dichloro-p-benzoquinone, chloranilic acid, bromanilic acid, 2,5-dihydroxy-p-benzoquinone, 2,5-dichrolo-3,6-dimethyl-p-benzoquinone, 2,5-dibromo-3,6 dimethyl-p-benzoquinone, BTDAQ, p-benzoquinone, 2,5-dimethyl-p-benzoquinone, 2,6-dimethyl-p-benzoquinone, duro-(tetramethyl), o-benzoquinones, o-bromanil, o-chloranil, 1,4-naphthoquinones, 2,3-dicyano-5-nitro-1,4-naphthoquinone, 2,3-dicyano-1,4-naphthoquinone, 2,3-dichloro-5-nitro-1,4-naphthoquinone, 2,3-dichloro-1,4-naphthoquinone, and 1,4-naphthoquinone. Examples of diphenoquinones may include 3,3',5,5'-tetrabromo-diphenoquinone, 3,3',5,5'-tetrachloro-diphenoquinone, and diphenoquinone. Further, examples of TCNQs and analogs thereof may include tetracyano-quinodimethane (TCNQ), tetrafluoro-tetracyano-quinodimethane (F4-TCNQ), trifluoromethyl-TCNQ, 2,5-difluoro-TCNQ, monofluoro-TCNQ, TNAP, decyl-TCNQ, methyl-TCNQ, dehydrovalereno-TCNQ, tetrahydrovalereno-TCNQ, dimethyl-TCNQ, diethyl-TCNQ, benzo-TCNQ, dimethoxy-TCNQ, BTDA-TCNQ, diethoxy-TCNQ, tetramethyl-TCNQ, tetracyanoanthraquinodimethane, a polynitro compound, tetranitrobiphenol, dinitrobiphenyl, picric acid, trnitorobenzene, 2,6-dinitrophenol, and 2,4-dinitrophenol. Examples of fluorenes may include 9-dicyanomethylene-2,4,5,7-tetranitro-fluorene, 9-dicyanomethylene-2,4,7-trinitro-fluorene, 2,4,5,7-tetranitro-fluorenone, and 2,4,7-tetranitro-fluorenone. Examples of benzocyanos and analogs thereof may include (TBA)2HCTMM, (TBA)2HCDAHD, K-CF, TBA-PCA, TBA-MeOTCA, TBA-EtOTCA, TBA-PrOTCA, (TBA)2HCP, hexacyanobutadienetetracyanoethylene, and 1,2,4,5-tetracyanobenzene. Examples of transition metal complexes may include (TPP)2Pd(dto)2, (TPP)2Pt(dto)2, (TPP)2Ni(dto)2, (TPP)2Cu(dto)2, and (TBA)2Cu(ox)2.

Further, specific examples of the donor-property material are as follows.

That is, examples of the donor-property material may include alkali metals, metal carboxylates, aromatic hydro carbons and analogs thereof, TTFs and analogs thereof, TTTs, azines, monoamines, diamines, and others. Examples of alkali metals may include Li, Na, and Cs. Examples of metal carboxylates may include Cs₂O₃ and Rb₂CO₃. Examples of aromatic hydrocarbon and analogs thereof may include organic materials such as tetracene, perylene, anthracene, coronene, pentacene, chrysene, phenanthrene, naphthalene, p-dimethoxybenzene, rubrene, and hexamethoxytriphenylene. Further, examples of TTFs and analogs thereof may include HMTTF, OMTTF, TMTTF, BEDO-TTF, TTeCn-TTF, TMTSF, EDO-TTF, HMTSF, TTF, EOET-TTF, EDT-TTF, (EDO)2DBTTF, TSCn-TTF, HMTTeF, BEDT-TTF, CnTET-TTF, TTCn-TTF, TSF, and DBTTF. Examples of TTTs may include tetrathiotetracene, tetraselenotetracene, and tetratellurotetracene. Examples of azines may include dibenzo[c,d]-phenothiazine, benzo[c]-phenothiazine, phenothiazine, N-methyl-phenothiazine, dibenzo[c,d]-phenoselenazine, N,N-dimethylphenazine, and phenazine. Examples of monoamines may include N,N-diethyl-m-toluidine, N,N-diethylaniline, N-ethyl-o-toluidine, diphenylamine, skatole, indole, N,N-dimethyl-o-toluidine, o-toluidine, m-toluidine, aniline, o-chloroaniline, o-bromoaniline, and p-nitroaniline. Examples of diamines may include N,N,N',N'-tetramethyl-p-phenylenediamine, 2,3,5,6-tetramethyl-(durenediamine), p-phenyldiamine, N,N,N',N'-tetramethylbenzidine, 3,3',5,5'-tetramethylbenzidine, 3,3'-dimethylbenzidine, 3,3'-dimethoxybenzidine, benzidine, 3,3'-dibromo-5,5'-dimethylbenzidine, 3,3'-dichloro-5,5'-dimethylbenzidine, and 1,6-diaminopyrene. In addition thereto, examples of the donor-property material may include 4,4',4''-tris(N-3-methylphenyl-N-phenylamino)-triphenylamine(m-MTDATA), 4,4',4''-tris(N-(2-Naphtyl)-N-phenylamino)-triphenylamine(2-TNATA),
alpha-NDP, copper phthalocyanine, 1,4,6,8-tetrakisdimethylaminopyrene, 1,6-dithiopyrene, decamethylferrocene, and ferrocene.

The organic TFT 100E may be manufactured as in the first embodiment, except that doping DP is performed on the contact section 42 with the use of an etching mask (not illustrated) provided on or above the channel protective film 50 or a layer thereon as illustrated in Fig. 49. As a doping method, for example, a method in which an MoOx film having a thickness of 2 nm is formed by resistance heating evaporation may be used.
(Modification 4)

Fig. 50 illustrates a cross-sectional configuration of an organic TFT 100F having a top-gate and top-contact structure according to Modification 4 of the embodiment of the present disclosure. This modification has a configuration, functions, and effects similar to those of the foregoing Modification 2, except that the doping region 42A is provided in part of the contact section 42 in a thickness direction from the top surface thereof in the organic semiconductor layer 40.

The organic TFT 100F may be manufactured as in Modification 2, except that doping DP is performed on the contact section 42 with the use of an etching mask (not illustrated) provided on or above the first gate insulating film 50 by a step illustrated in Fig. 49 as in Modification 3. As a doping method, for example, a method in which an MoOx film having a thickness of 2 nm is formed by resistance heating evaporation may be used.

A description will be given of some embodiments of electronic apparatuses (display units) using the organic TFT 100.
(Second Embodiment)

Fig. 51 illustrates a cross-sectional configuration of a display unit (an electronic paper display unit 1) according to a second embodiment of the present disclosure. The electronic paper display unit 1 has the organic TFT 100 according to the first embodiment illustrated in Fig. 1 on the substrate 11. On the organic TFT 100, an electrophoretic display device 110 is provided as a display device.

It is to be noted that Fig. 51 illustrates a case that the electronic paper display unit 1 has the organic TFT 100 according to the first embodiment illustrated in Fig. 1. However, it goes without saying that the electronic paper display unit 1 may have any of the organic TFTs 100A to 100F according to Examples 1 and 2 and Modifications 1 to 4, instead of the organic TFT 100 according to the first embodiment.

The substrate 11 and the organic TFT 100 may be, for example, configured as in the foregoing first embodiment. The source electrode 60S of the organic TFT 100 may be, for example, connected to a wiring layer 63 through a connection hole H1 provided in an interlayer insulating film 62.

In the electrophoretic display device 110, for example, a display layer 113 made of an electrophoretic display element is sealed between a pixel electrode 111 and a common electrode 112. The pixel electrode 111 is arranged for every pixel, and may be, for example, connected to the wiring layer 63 through a connection hole H2 provided in a planarizing film 114. The common electrode 112 is provided as an electrode common to a plurality of pixels on an opposed substrate 115.
(Third Embodiment)

Fig. 52 illustrates a cross-sectional configuration of a display unit (an organic EL display unit 2) according to a third embodiment of the present disclosure. The organic EL display unit 2 has the organic TFT 100 according to the first embodiment illustrated in Fig. 1 on the substrate 11. Above the organic TFT 100, an organic EL device 120 is provided as a display device. The light emission type of the organic EL display unit 2 may be a so-called top emission type (top surface light emission type) or a bottom emission type (bottom surface light emission type).

It is to be noted that Fig. 52 illustrates a case that the organic EL display unit 2 has the organic TFT 100 according to the first embodiment illustrated in Fig. 1. However, it goes without saying that the organic EL display unit 2 may have any of the organic TFTs 100A to 100F according to Examples 1 and 2 and Modifications 1 to 4, instead of the organic TFT 100 according to the first embodiment.

The substrate 11 and the organic TFT 100 may be, for example, configured as in the foregoing first embodiment. The source electrode 60S of the organic TFT 100 may be, for example, connected to the wiring layer 63 through the connection hole H1 provided in the interlayer insulating film 62.

The organic EL device 120 may have, for example, a pixel separation film 122 having an opening for every pixel on a first electrode 121. In the opening section of the pixel separation film 122, an organic layer 123 and a second electrode 124 are laminated. The first electrode 121 may be, for example, connected to the wiring layer 63 through the connection hole H2 provided in a planarizing film 125. The organic EL device 120 may be, for example, sealed by a protective insulating film 126. A sealing substrate 128 is adhered onto the protective insulating film 126 with an adhesive layer 127 made of a thermoset resin, an ultraviolet cured resin, or the like in between.
(Fourth Embodiment)

Fig. 53 illustrates a cross-sectional configuration of a display unit (a liquid crystal display unit 3) according to a fourth embodiment of the present disclosure. The liquid crystal display unit 3 has the organic TFT 100 according to the first embodiment illustrated in Fig. 1 on the substrate 11. On the upper side of the organic TFT 100, a liquid crystal display device 130 is provided as a display device.

It is to be noted that Fig. 53 illustrates a case that the liquid crystal display unit 3 has the organic TFT 100 according to the first embodiment illustrated in Fig. 1. However, it goes without saying that the liquid crystal display unit 3 may have any of the organic TFTs 100A to 100F according to Examples 1 and 2 and Modifications 1 to 4, instead of the organic TFT 100 according to the first embodiment.

The substrate 11 and the organic TFT 100 may be, for example configured as in the foregoing first embodiment. The source electrode 60S of the organic TFT 100 may be connected to, for example, the wiring layer 63 through the connection hole H1 provided in the interlayer insulating film 62.

In the liquid crystal display device 130, for example, a liquid crystal layer 133 is sealed between a pixel electrode 131 and an opposed electrode 132.

Alignment films

134A and 134B are formed on the respective surfaces on the liquid crystal layer 133 side of the pixel electrode 131 and the opposed electrode 132. The pixel electrode 131 is arranged for every pixel, and may be, for example, connected to the wiring layer 63 through the connection hole H2 provided in a planarizing film 135. The opposed electrode 132 is provided as an electrode common to a plurality of pixels on an opposed substrate 136, and the electric potential thereof may be, for example, retained at a common electric potential. The liquid crystal layer 133 may be made of liquid crystal driven by, for example, VA (Vertical Alignment) mode, TN (Twisted Nematic) mode, IPS (In Plane Switching) mode, or the like.

Further, a backlight 137 is provided under a drive-side substrate 10.

Polarizers

138A and 138B are adhered to the backlight 137 side of the substrate 11 and to the opposed substrate 136, respectively.
(Application Examples)

Subsequently, a description will be given of application examples of the display units according to the foregoing embodiments referring to Fig. 54 to Fig. 65. Any of the display units according to the foregoing embodiments is applicable to an electronic apparatus in any field such as a television, a digital camera, a notebook personal computer, a portable terminal device such as a mobile phone and a smartphone, and a video camcorder. In other words, any of the display units according to the foregoing embodiments is applicable to an electronic apparatus in any field for displaying a video signal inputted from outside or a video signal generated inside as an image or a video.
(Module)

Any of the display units according to the foregoing embodiments may be incorporated in various electronic apparatuses such as after-mentioned Application examples 1 to 7 as a module as illustrated in Fig. 54, for example. In the module, for example, an external connection terminal (not illustrated) is formed in a bezel region 11B around a display region 11A of a substrate 11 by extending a wiring. The external connection terminal may be provided with a Flexible Printed Circuit (FPC) 150 to input and output a signal.
(Application Example 1)

Fig. 55 and 56 each illustrate an appearance of an electronic book 210 to which any of the display units according to the foregoing embodiments is applied. The electronic book 210 may have, for example, a display section 211 and a non-display section 212, and the display section 211 is configured of any of the display units according to the foregoing embodiments.
(Application Example 2)
Fig. 57 and 58 respectively illustrate appearances of a smartphone 220 to which any of the display units according to the foregoing embodiments is applied. The smartphone 220 may have, for example, a display section 221 and an operation section 222 on the front side, and a camera 223 on the rear side. The display section 221 is configured of any of the display units according to the foregoing embodiments.
(Application Example 3)

Fig. 59 illustrates an appearance of a television 230 to which any of the display units according to the foregoing embodiments is applied. The television 230 may have, for example, an image display screen section 233 including a front panel 231 and a filter glass 232. The image display screen section 233 is configured of any of the display units according to the foregoing embodiments.
(Application Example 4)

Fig. 60 and 61 each illustrate an appearance of a digital camera 240 to which any of the display units according to the foregoing embodiments is applied. The digital camera 240 may have, for example, a light emitting section 241 for a flash, a display section 242, a menu switch 243, and a shutter button 244. The display section 242 is configured of any of the display units according to the foregoing embodiments.
(Application Example 5)

Fig. 62 illustrates an appearance of a notebook personal computer 250 to which any of the display units according to the foregoing embodiments is applied. The notebook personal computer 250 may have, for example, a main body 251, a keyboard 252 for operation of inputting characters and the like, and a display section 253 for displaying an image. The display section 253 is configured of any of the display units according to the foregoing embodiments.
(Application Example 6)

Fig. 63 illustrates an appearance of a video camcorder 260 to which any of the display units according to the foregoing embodiments is applied. The video camcorder may have, for example, a main body 261, a lens 262 for shooting a subject provided on the front side surface of the main body 261, a start-stop switch 263 for shooting, and a display section 264. The display section 264 is configured of any of the display units according to the foregoing embodiments.
(Application Example 7)

Figs. 64 and 65 each illustrate an appearance of a mobile phone 270 to which any of the display units according to the foregoing embodiments is applied. In the mobile phone 270, for example, an upper package 271 and a lower package 272 may be jointed by a joint section (hinge section) 273. The mobile phone 270 may have a display 274, a sub-display 275, a picture light 276, and a camera 277. Either one or both of the display 274 and the sub-display 275 are each configured of any of the display units according to the foregoing embodiments.

While the present disclosure has been described with reference to some embodiments and the examples, the present disclosure is not limited to the foregoing embodiments, and various modifications may be made.

For example, the material, the thickness, the film-forming method, the film-forming conditions, and the like of each layer are not limited to those described in the foregoing embodiments, and other material, other thickness, other film-forming method, and other film-forming conditions may be adopted.

Further, in the foregoing embodiments and the foregoing examples, the description has been given of the configurations of the organic TFT100 and 110A to 110F with specific examples. However, all layers are not necessarily included, and other layer may be further included.

Further, the embodiments of the present disclosure are also applicable to other electronic apparatuses such as a sensor array in addition to the display unit.

It is possible to achieve at least the following configurations from the above-described example embodiments and the modifications of the disclosure.

(1)
A method of manufacturing a semiconductor device, the method including:
applying a solution in which organic semiconductor material and insulating layer material are mixed; and
forming an organic semiconductor layer and an insulating layer utilizing phase separation, the insulating layer being in contact with a top surface of the organic semiconductor layer.
(2)
The method according to (1), wherein
the solution is applied to a base material, and
a two-layer structure is formed by the phase separation, the two-layer structure including the organic semiconductor layer and the insulating layer in order from the base material.
(3)
The method according to (1), wherein
the solution is applied to a base material,
a three-layer structure is formed by the phase separation, the three-layer structure including a lower organic semiconductor layer, the insulating layer, and an upper organic semiconductor layer in order from the base material, and
thereafter, the upper organic semiconductor layer is removed.
(4)
The method according to (1), wherein
the solution is applied to a blanket,
a reversed two-layer structure is formed by the phase separation, the reversed two-layer structure including the insulating layer and the organic semiconductor layer in order from the blanket, and
the reversed two-layer structure is transferred from the blanket to a base material, and thereby, a forward two-layer structure is formed on the base material, the forward two-layer structure including the organic semiconductor layer and the insulating layer in order from the base material.
(5)
The method according to any one of (1) to (4), wherein a bottom-gate thin film transistor is formed, the bottom-gate thin film transistor including the insulating layer that serves as a channel protective film.
(6)
The method according to any one of (1) to (4), wherein a top-gate thin film transistor is formed, the top-gate thin film transistor including the insulating layer that serves as a gate insulating film or is included in part of the gate insulating film.
(7)
The method according to (5) or (6), wherein doping is performed on the organic semiconductor layer with use of the insulating layer as a mask, and thereby, a top-contact thin film transistor is formed.
(8)
The method according to any one of (1) to (7), wherein, as the insulating layer material, one or more of of polymers including polystyrene, polymethyl methacrylate, polyethylene, polypropylene, polybutadiene, polyisoprene, polyolefin, polycarbonate, polyimide, polyamide, poly(alpha-methylstyrene), poly(alpha-ethylstyrene), poly(alpha-propylstyrene), poly(alpha-butylstyrene), poly(4-methylstyrene), polyacrylonitrile, polyvinylcarbazole, polyvinylidene fluoride, polyvinylbutyral, polyvinyltoluene, poly(4-vinylbiphenyl), halides of the foregoing polymers, and copolymers of two or more of the foregoing polymers and the halides thereof are used.
(9)
A semiconductor device including:
an organic semiconductor layer; and
an insulating layer in contact with a top surface of the organic semiconductor layer, wherein
the organic semiconductor layer and the insulating layer are formed utilizing phase separation.
(10)
The semiconductor device according to (9), wherein the semiconductor device is a bottom-gate thin film transistor including the insulating layer that serves as a channel protective film.
(11)
The semiconductor device according to (9), wherein the semiconductor device is a top-gate thin film transistor, the top-gate thin film transistor including the insulating layer that serves as a gate insulating film or is included in part of the gate insulating film.
(12)
The semiconductor device according to (10) or (11), wherein the semiconductor device is a top-contact thin film transistor in which doping is performed on a region, of the organic semiconductor layer, exposed from the insulating layer.
(13)
An electronic apparatus with a semiconductor device, the semiconductor device including:
an organic semiconductor layer; and
an insulating layer in contact with a top surface of the organic semiconductor layer, wherein
the organic semiconductor layer and the insulating layer are formed utilizing phase separation.

The present disclosure contains subject matter related to that disclosed in Japanese Priority Patent Application JP 2012-198596 filed in the Japan Patent Office on September 10, 2012, the entire contents of which is hereby incorporated by reference.

It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and alternations may occur depending on design requirements and other factors insofar as they are within the scope of the appended claims or the equivalents thereof.

10 Base material
11 Substrate
20 Gate electrode
30 Gate insulating film (second gate insulating film)
40 Organic semiconductor layer
41 Channel layer
41A Upper end of the channel layer
42 Contact section
50 Channel protective film (first gate insulating film)
60S Source electrode
60D Drain electrode
61 Injection layer
62 Interlayer insulating film
63 Wiring layer
70 Coating film
71 Two-layer structure
72 Three-layer structure
73 Reversed two-layer structure
74 Forward two-layer structure
80 Etching mask
90 Blanket
P Interface

Claims

A method of manufacturing a semiconductor device, the method comprising:
applying a solution in which organic semiconductor material and insulating layer material are mixed; and
forming an organic semiconductor layer and an insulating layer utilizing phase separation, the insulating layer being in contact with a top surface of the organic semiconductor layer.
The method according to claim 1, wherein
the solution is applied to a base material, and
a two-layer structure is formed by the phase separation, the two-layer structure including the organic semiconductor layer and the insulating layer in order from the base material.
The method according to claim 1, wherein
the solution is applied to a base material,
a three-layer structure is formed by the phase separation, the three-layer structure including a lower organic semiconductor layer, the insulating layer, and an upper organic semiconductor layer in order from the base material, and
thereafter, the upper organic semiconductor layer is removed.
The method according to claim 1, wherein
the solution is applied to a blanket,
a reversed two-layer structure is formed by the phase separation, the reversed two-layer structure including the insulating layer and the organic semiconductor layer in order from the blanket, and
the reversed two-layer structure is transferred from the blanket to a base material, and thereby, a forward two-layer structure is formed on the base material, the forward two-layer structure including the organic semiconductor layer and the insulating layer in order from the base material.
The method according to claim 1, wherein a bottom-gate thin film transistor is formed, the bottom-gate thin film transistor including the insulating layer that serves as a channel protective film.
The method according to claim 1, wherein a top-gate thin film transistor is formed, the top-gate thin film transistor including the insulating layer that serves as a gate insulating film or is included in part of the gate insulating film.
The method according to claim 5, wherein doping is performed on the organic semiconductor layer with use of the insulating layer as a mask, and thereby, a top-contact thin film transistor is formed.
The method according to claim 1, wherein, as the insulating layer material, one or more of of polymers including polystyrene, polymethyl methacrylate, polyethylene, polypropylene, polybutadiene, polyisoprene, polyolefin, polycarbonate, polyimide, polyamide, poly(alpha-methylstyrene), poly(alpha-ethylstyrene), poly(alpha-propylstyrene), poly(alpha-butylstyrene), poly(4-methylstyrene), polyacrylonitrile, polyvinylcarbazole, polyvinylidene fluoride, polyvinylbutyral, polyvinyltoluene, poly(4-vinylbiphenyl), halides of the foregoing polymers, and copolymers of two or more of the foregoing polymers and the halides thereof are used.
A semiconductor device comprising:
an organic semiconductor layer; and
an insulating layer in contact with a top surface of the organic semiconductor layer, wherein
the organic semiconductor layer and the insulating layer are formed utilizing phase separation.
The semiconductor device according to claim 9, wherein the semiconductor device is a bottom-gate thin film transistor including the insulating layer that serves as a channel protective film.
The semiconductor device according to claim 9, wherein the semiconductor device is a top-gate thin film transistor, the top-gate thin film transistor including the insulating layer that serves as a gate insulating film or is included in part of the gate insulating film.
The semiconductor device according to claim 10, wherein the semiconductor device is a top-contact thin film transistor in which doping is performed on a region, of the organic semiconductor layer, exposed from the insulating layer.
An electronic apparatus with a semiconductor device, the semiconductor device comprising:
an organic semiconductor layer; and
an insulating layer in contact with a top surface of the organic semiconductor layer, wherein
the organic semiconductor layer and the insulating layer are formed utilizing phase separation.