WO2014007806A1 - Convertisseur de puissance cl à hystérésis - Google Patents

Convertisseur de puissance cl à hystérésis Download PDF

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Publication number
WO2014007806A1
WO2014007806A1 PCT/US2012/045391 US2012045391W WO2014007806A1 WO 2014007806 A1 WO2014007806 A1 WO 2014007806A1 US 2012045391 W US2012045391 W US 2012045391W WO 2014007806 A1 WO2014007806 A1 WO 2014007806A1
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Prior art keywords
switching
converter
coupled
power converter
power
Prior art date
Application number
PCT/US2012/045391
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English (en)
Inventor
Paolo Menegoli
Fabio Alessio Marino
Original Assignee
Paolo Menegoli
Fabio Alessio Marino
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Publication date
Application filed by Paolo Menegoli, Fabio Alessio Marino filed Critical Paolo Menegoli
Priority to PCT/US2012/045391 priority Critical patent/WO2014007806A1/fr
Publication of WO2014007806A1 publication Critical patent/WO2014007806A1/fr

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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/06—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider
    • H02M3/07—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps

Definitions

  • the present invention is in the field of power converters.
  • the present invention is further in the field of semiconductor switching power converters.
  • the present invention further relates to the field of integrated hysteretic non isolated control methods for switching power converters and circuits.
  • the implementation is not limited to a specific technology, and applies to either the invention as an individual component or to inclusion of the present invention within larger systems which may be combined into larger integrated circuits.
  • the switching power converters comprise isolated and non isolated topologies.
  • the galvanic isolation is generally provided by the utilization of transformers.
  • the subject invention refers to non isolated power converters.
  • step down power converters also commonly known as “buck converters” and step up power converters commonly known as “boost converters”.
  • boost converters step up power converters
  • Boost converters can be implemented by storing and releasing energy in a passive component and more precisely in a capacitor or in an inductor.
  • capacitive charging is also known as charge pump converter while, when the inductor is used, the converter is generally known as inductive boost converter.
  • Inductive boost converters are very important to generate well regulated voltage rails at voltages higher than the input voltage available. Typically, this is obtained by first charging the inductor with energy by applying a current through it and thereafter switching off a terminal of the inductor so as to discharge the current into a load at higher voltage.
  • the most known and used prior art for a switching non isolated inductive boost converter topology is shown in FIG. l .
  • CCM Continuous Conduction Mode
  • the second mode of operation is the Discontinuous Conduction Mode (DCM) characterized by the fact that when the inductor current reaches zero value, it is kept at zero for part of the period.
  • DCM Discontinuous Conduction Mode
  • This second mode is generally entered to when the load current is small. If the load current is not very large the output capacitor can provide enough energy to the load for part of the switching period so that during that time interval the inductor energy can be null. Typically, in DCM the output voltage ripple is more pronounced since the energy is stored also in the output capacitor so as to allow lower switching frequency.
  • boost converters are controlled with PID (proportional-integral-derivative) type of control method.
  • PID proportional-integral-derivative
  • current mode controls are quite common because they include two nested loops: one for the control of the output voltage and one for the control of the output current.
  • these types of control methods do not present high bandwidth and require the adoption of large output capacitors to obtain acceptable load transient responses.
  • High frequency switching power converters are increasingly more popular due to the advantage of using low value inductors and capacitors reducing significantly the cost and board space of the power management section.
  • Buck converters can successfully be operated at high frequency by using hysteretic and pseudo-hysteretic approaches.
  • the control loop of pseudo-hysteretic converters is simple and the output voltage is summed to a ramp signal to generate a synthetic ripple.
  • a prior art example of pseudo hysteretic switching buck converter is provided in Klein (US 7,457,140).
  • This signal is fed to a fast comparator that determines the charge and discharge timing of the inductor.
  • a fast comparator that determines the charge and discharge timing of the inductor.
  • the implementation of a pseudo hysteretic control is relatively simple because the output stage of the buck, along with the inductor and the output capacitor, forms the integrating section of the converter that can be seen as a delta sigma converter.
  • the buck converter charges the inductor while supplying current to the load.
  • boost converter could be obtained by cascading a capacitor charge pump converter with an inductive buck converter. In that case the buck can be regulated with simpler and faster control loops to obtain high frequency operation and faster load transient responses.
  • FIG.2 The mentioned approach for the case in which the output voltage is smaller than twice the input voltage is illustrated in FIG.2.
  • the block 1 is the charge pump converter while the block 2 represents the inductive buck converter.
  • the charge pump is not regulated but simply operated to multiply the input voltage in an uncontrolled way as long as the provided output current is at least equal to the output load current.
  • the switches S4 and S5 of FIG.2 can be omitted and if the inductor L2. is coupled between the output capacitor C4 and the boosting capacitor C2, as shown in FIG.3, the output voltage of the overall circuit can be regulated approximately between 2*Vin and Vin by modulating the duty cycle of the switches S2 and S3.
  • CCM Continuous Conduction Mode
  • DCM Continuous Conduction Mode
  • the present invention describes an inductive switching boost converter that combines the components for a capacitive charge pump boosting circuit with the ones for an inductive buck converter.
  • the combination of the two circuit topologies allows a reduction of the total number of components and it comprises the function of a relatively uncontrolled boost operation cascaded with a regulated step down converter.
  • the present invention further describes a boost power converter that can operate at high switching frequencies by incorporating a pseudo hysteretic approach.
  • the circuit proposed is relatively simple even though the detailed characteristics of the power converter such as its efficiency at different load conditions, the output voltage ripple in different load conditions, and the response to the load transient depend on the overall implementation and on the value of the output capacitor, output inductor, input voltage, output voltage and switching frequency.
  • the present invention in one of its embodiments, shown in FIG.4, further describes a passive or active feedback network 6 to generate a signal 10 that is fed to a fast comparator 4 whose output signal is used by a control logic and an output stage pre-driver block 5 to determine the converter duty cycle and ultimately its output (node 7 in FIG.4) voltage regulation.
  • the fast comparator 4 compares the signal 10 generated by the feedback network 6 with a voltage reference 3 or similar voltage.
  • the comparator can include hysteresis or not.
  • the output of the comparator provides a signal in a digital form to be processed by a logic circuit 5 to drive the output switching stage of the boost converter, indicated in FIG.4 with the switches S6, S7 and S8.
  • the switches S6 and S8 are switched with the same frequency and phase ⁇ .
  • the switch S7 is toggled.
  • the capacitor C5 is charged approximately at the voltage V2 and the inductor L3 is discharged.
  • the voltage at the node 8 is boosted and the inductor is charged.
  • the inductor current is re-circulated partially in the switch S6 and partially in the capacitor C5 through the switch S8.
  • the feedback network 6 can have a few input signals among which the output regulated voltage 7 of the boost converter and the voltage of the switching node 8.
  • the output 10 of the feedback network 6 is a signal that creates the synthesis of a ripple voltage applied to the output 7 by the charging and discharging of the inductor energy.
  • the signal 10 at the output of the feedback network assumes the shape of a voltage ramp providing adequate overdrive to the stages of the comparator 4.
  • This ramp signal 10 has two contributions: a DC contribution that controls the output voltage to be regulated at the desired value and an AC contribution that governs the switching frequency and contributes to a fast load transient response.
  • the topology and values of the components in the feedback network define the self oscillating switching frequency, the stability, and the load transient response performance of the whole converter.
  • the switching frequency has a direct impact on the output voltage ripple and on the converter efficiency.
  • the switching frequency can be regulated and imposed by a separate frequency control loop that can be implemented in various ways.
  • PLL Phase Lock Loop
  • the study of the loop becomes more complex and an accurate analysis can be performed by periodic state analysis to guarantee the circuit stability in all conditions.
  • the methods and means for regulating the switching frequency are beyond the scope of the present invention and do not affect its novelty.
  • the several methods and techniques to regulate the switching frequency are well known to anyone skilled in the art.
  • the feedback network 6 is typically composed of passive components but, more in general, it could include active components and have different functions depending on the load conditions and on whether the converter is in CCM or DCM mode of operation.
  • the feedback network may include a resistor divider to scale down the output voltage to a desired voltage or, in alternative the scaling divider may be external to the feedback network block.
  • the switching node 8 is an input to the feedback network, but a different signal could be used as well, such as the signal 9 at the other terminal of the capacitor C5.
  • FIG.4 utilizes the switch S6 to achieve higher efficiency but the same general considerations are valid if the switch S6 is replaced by a simple diode as in FIG .2 and FIG.3.
  • the proposed circuit topology is amenable to operate at high switching frequency because the loop does not comprise complex stability networks that introduce delays.
  • the two main blocks in the loop are the fast comparator and the feedback network.
  • the switching frequencies for the proposed topology can be in the order of many tens of MHz allowing much smaller inductor and capacitors values.
  • the inductor current When the load current is low enough, the inductor current reaches the zero value. If the control loop operates in CCM the inductor current becomes negative impacting adversely the converter's efficiency. It is therefore advantageous to monitor the inductor current, turn off all the switches when the inductor current reaches zero and resume switching when the ramp signal at the output of the feedback network toggles the fast comparator. The inductor charging phase can then be kept active for a predetermined amount of time seeking the optimum trade-off between the switching frequency and the output voltage ripple with the purpose of maximizing the overall converter efficiency. This mode is the DCM mode of operation and it is characterized by a lower switching frequency.
  • the re-circulating inductor current is partially flowing in the switch S6 and partially in the switch S8 through the capacitor C5. However the largest portion of the inductor current is flowing in the switch S6, therefore the inductor current is monitored by sensing the current in S6 since it is accurate enough to assume that when the current in the switch S6 is approaching zero, so is the inductor current.
  • FIG.5 shows the boost converter with the DCM control block 1 1 that monitors the inductor current by sensing the voltage of the node 8 when the switch S6 is on and whose output feeds the control logic and pre-drivers block 5.
  • the supply voltage V2 is provided as well to the block 1 1 so that the differential voltage drop across the switch S6 can be measured and, by knowing its on-resistance, an estimate of the flowing current could be made. If and when the switch S6 is replaced by a diode the sensing of the current flowing through it may be more problematic and a small sense resistor in series to the inductor may provide the required information to operate in DCM with accurate result.
  • the circuit could be left in CCM for a few clock cycles even after a zero inductor current has been detected so that by inverting the inductor current for the first few cycles after the load transient occurrence, the transient response could be improved and optimized by minimizing the amplitude of the output voltage spikes and glitches without negatively impacting the overall efficiency.
  • the inductor current cannot be reversed to large values because the capacitor C5 prevents a DC current flow from occurring. This leads to the consideration that large values of the capacitor C5, although not desirable in terms of size and cost, may contribute to reduce the output voltage spikes when the output load current is abruptly decreased.
  • the adoption of the switch S6 in place of the diode may provide the initial surge current control at start up which is very important for battery supplied power converters. This feature is impossible to obtain with the diode.
  • the initial phase of operation of the boost converter has to be set by means of open loop forced switching (for example by means of maximum on time of the high side switch) or by the implementation of a separate loop distinct from the hysteretic loop. This is desirable until the output voltage has reached the regulation value, after which the hysteretic loop can be phased in.
  • the size of the section of the boost converter under the lower voltage V2 can be significantly smaller in silicon area and lower in cost. This may offset the increased cost and size of the extra capacitor and switch.
  • the capacitor C5 is still required and, in fact the reduction of the voltage of a section of the boost may impose an increase of the size of the boosting capacitor C5 in order to transfer the same energy to the load, but possibly a smaller capacitor value may be utilized if the converter is operated at high frequency.
  • the rest of the circuit shown in FIG.6 is identical to the one shown in FIG.5, and all the other considerations still apply.
  • the switch S6 is operated in synchronism with the low side switch S8, however if the switch S6 is toggling in phase with the high side switch S7, as shown in FIG.8, the converter operates as a buck providing an output voltage lower than its input voltage. In that case the boosting capacitor C5 is no longer acting as a boosting capacitor. It simply stores a portion of the inductor energy during recirculation, and gets discharged during the inductor energy charging phase.
  • the voltage of the node 8 is modulated between the supply voltage V2 and the voltage at which the capacitor is discharged, therefore the Vout/Vin transfer function is equal to D, where D is the duty cycle of the converter.
  • D is the duty cycle of the converter.
  • the switching power converter in buck mode can operate at the same high frequency used for the converter in boost mode and its efficiency is also very high.
  • the converter may implement a buck boost operation by monitoring the input voltage versus the output voltage and by toggling the phase of the switch S6 to operate as a boost or as a buck power converter.
  • This effective advantage makes this circuit topology very attractive for some applications.
  • the value of the capacitor C5 can be quite small and easily be integrated in an IC (integrated circuit) but the value of the capacitor C5 affects directly the free oscillating switching frequency of the converter, since it is related to the voltage swing for the input of the feedback network. At lower capacitor values the switching frequency tends to be lower resulting in higher output voltage ripple, but a separate switching frequency control loop can be implemented to overcome this difficulty.
  • the DCM mode can be easily implemented by turning off all the switches, when the inductor current reaches the zero value, for a portion of the resulting switching cycle.
  • the re-circulation inductor current is flowing in the low side switch S8 and, therefore, a simple monitoring of the voltage of the node 9 is sufficient to indicate when the inductor current reaches the null value to start the DCM mode of operation.
  • FIG. l shows a general inductive boost switching power converter core circuit topology (prior art).
  • FIG.2 shows a schematic of a combination of a capacitive charge pump and an inductive step down converter.
  • FIG.3 shows a schematic of a combination of a capacitive charge pump and an inductive step down converter obtained by reducing the number of components of FIG.2.
  • FIG.4 shows a schematic of the hysteretic boost converter according to one of the embodiments of the present invention.
  • FIG.5 shows a schematic of the hysteretic boost converter with DCM mode according to the preferred embodiment of the present invention.
  • FIG.6 shows the schematic of the hysteretic boost converter with DCM mode according to an alternative embodiment of the present invention.
  • FIG.7 shows the main voltage and current waveforms for the simulation of the circuit of FIG.5.
  • FIG.8 shows the schematic of the hysteretic converter in its buck configuration according to a further embodiment of the present invention.
  • FIG.9 shows the main voltage and current waveforms for the simulation of the circuit of FIG.8.
  • FIG.4 is showing the first general embodiment of the invention.
  • FIG.4 shows the schematic of the block diagram of the pseudo-hysteretic switching boost converter.
  • FIG.4 describes a novel approach in which a capacitive charge pump circuit boosts the voltage to a value higher than the desired output voltage and a successive inductive step down converter regulates the voltage to the desired value with high efficiency.
  • FIG.4 some of the components of the two mentioned blocks are merged or eliminated to form a novel circuit topology.
  • the circuit has two nodes, (8 and 9) that are switching.
  • the node 9 is toggled between the input voltage V2 and ground.
  • the node 8 is switching between the input voltage V2 and potentially approximately 2 (two) times V2. Therefore appropriate modulation of the duty cycle can result in a regulated output voltage of the converter with any value between the input voltage and twice the input voltage.
  • FIG.4 describes a passive or active feedback network 6 to generate a signal 10 that is fed to a fast comparator 4 whose output signal is used by a control logic and an output stage pre-driver block 5 to determine the converter duty cycle and ultimately obtain its output (node 7) voltage regulation.
  • the fast comparator 4 compares the signal 10 generated by the feedback network 6 with a voltage reference 3 or similar voltage.
  • the comparator can include hysteresis or not.
  • the output of the comparator provides a signal in a digital form to be processed by a logic circuit 5 to drive the output switching stage of the boost converter, indicated in FIG.4 with the switches S6, S7 and S8.
  • the switches S6 and S8 are switched with the same frequency and phase ⁇ .
  • the switch S7 is toggled.
  • the capacitor C5 is charged approximately at the voltage V2 and the inductor L3 is discharged.
  • the voltage at the node 8 is boosted and the inductor is charged.
  • the inductor current is re-circulated partially in the switch S6 and partially in the capacitor C5 through the switch S8.
  • the feedback network 6 can have a few input signals among which the output regulated voltage 7 of the boost converter and a switching node 8.
  • the voltage of the output node 10 of the feedback network 6 is a signal that creates the synthesis of a ripple voltage applied to the converter's output 7 by the charging and discharging of the inductor energy.
  • the signal of the node 10 at the output of the feedback network 6 assumes the shape of a voltage ramp providing adequate overdrive to the stages of the comparator. This ramp signal has two contributions: a dc contribution that controls the output voltage of the node 7 to be at the desired value and an ac contribution that governs the switching frequency of the whole converter.
  • the topology and values of the components in the feedback network define the self oscillating switching frequency, the stability, and the load transient response performance of the whole converter.
  • the switching frequency has a direct impact on the output voltage ripple and on the converter efficiency.
  • the switching frequency can be regulated and imposed by a separate frequency control loop that can be implemented in various ways.
  • PLL Phase Lock Loop
  • the study of the hysteretic control loop becomes more complex and an accurate analysis can be performed by periodic state analysis to guarantee the circuit stability in all conditions.
  • the feedback network 6 is typically composed of passive components but more in general it could include active components and have different functions depending on the load conditions and on whether the converter is in CCM or DCM mode of operation. Furthermore the feedback network may include a resistor divider to scale down the output voltage to a desired voltage value or, in alternative, the scaling divider may be external to the feedback network block. As mentioned, the switching node 8 is an input to the feedback network, but a different signal could be used as well, such as the signal at the node 9 at the other terminal of the capacitor C5.
  • FIG.4 utilizes the switch S6 to achieve higher efficiency but the same general considerations are valid if the switch S6 is replaced by a simple diode as in FIG.2 and FIG.3.
  • the proposed circuit topology is amenable to operate at high switching frequency because the loop does not comprise complex stability networks that introduce delays.
  • the two main blocks in the loop are the fast comparator and the feedback network.
  • the switching frequencies for the proposed topology can be in the order of many tens of MHz allowing much smaller inductor and capacitors values.
  • FIG.5 is showing the schematic of the block diagram of the pseudo-hysteretic switching boost converter according to the preferred embodiment of the invention.
  • FIG.5 is very similar to FIG.4, but it adds the block 1 1 to allow the operation of the switching power converter in DCM (Discontinuous Conduction Mode) of operation. This mode is essential to guarantee high efficiency of the converter in the case of light loads.
  • DCM Continuous Conduction Mode
  • the inductor current When the load current is low enough, the inductor current reaches the zero value. If the control loop operates in CCM the inductor current becomes negative impacting adversely the converter's efficiency. It is therefore advantageous to monitor the inductor current, turn off all the switches when the inductor current reaches zero, and resume switching when the ramp signal at the output of the feedback network 6 toggles the fast comparator 4.
  • the inductor charging phase can then be kept active for a predetermined amount of time seeking the optimum trade-off between the switching frequency and the output voltage ripple with the purpose of maximizing the overall converter efficiency. This mode constitutes the DCM mode of operation and it is characterized by a lower switching frequency.
  • the re-circulating inductor current when the inductor is discharging its energy, is partially flowing in the switch S6 and partially in the switch S8 through the capacitor C5. However the largest portion of the inductor current is flowing in the switch S6, therefore the inductor current is monitored by sensing the current in S6 since it is accurate enough to assume that when the current in the switch S6 is approaching zero, so is the inductor current.
  • FIG.5 shows the boost converter with the DCM control block 11 that monitors the inductor current by sensing the voltage of the node 8 when the switch S6 is on and whose output feeds the control logic and pre-drivers block 5.
  • the supply voltage V2 is provided as well to the block 1 1 so that differentially the voltage drop across the switch S6 can be measured and, by knowing its on resistance, an estimate of the flowing current could be made. If and when the switch S6 is replaced by a diode the sensing of the current flowing through it may be more problematic and a small sense resistor in series to the inductor may provide the required information to operate in CCM with accurate result.
  • the circuit could be left in CCM for a few clock cycles even after a zero inductor current has been detected so that inverting the inductor current for the first few cycles after the load transient, the transient response could be improved and optimized by minimizing the amplitude of the output voltage spikes and glitches.
  • the inductor current cannot be reversed to large values because the capacitor C5 prevents a DC current flow from occurring. This leads to the consideration that large values of the capacitor C5, although not desirable in terms of size and cost, may contribute to reduce the output voltage spikes when the output load current is abruptly decreased.
  • the adoption of the switch S6 in place of the diode may provide the initial surge current control at start up which is very important for battery supplied power converters. This feature is impossible to obtain with the diode.
  • the initial phase of operation of the boost converter has to be set by means of open loop forced switching (for example by means of maximum on time of the high side switch) or by the implementation of a separate control loop distinct from the hysteretic loop. This is desirable until the output voltage has reached the target value, after which the hysteretic control loop can be phased in.
  • FIG.6 shows the schematic of the pseudo-hysteretic boost converter with DCM mode according to an alternative embodiment of the present invention.
  • FIG.6 is very similar to FIG.5 with the exception of the fact that the switch S6 has one terminal connected to a separate supply (V3).
  • the topology of FIG.6 allows the separation of the boost switching power converter in two sections: the first one under the supply voltage V2 and the second one under the supply voltage V3. This overcomes, at least partially the largest disadvantage of the proposed switching power converter topology of FIG .4 and FIG.5. In fact in the described schematics of FIG.4 and FIG.5 there are two extra components (an extra switch and an extra capacitor) with respect to a conventional inductive boost, adding to its cost and size.
  • the converter can be operated at lower voltage V2 and boost the voltage of the second supply V3 to the voltage V2.
  • V2 is 1.8V
  • V3 is a battery voltage varying between 2.5V and 4.0V
  • the switches S7 and S8 may be implemented in a smaller lithography process technology and switched at high frequency with high efficiency.
  • the size of the section of the boost converter under the lower voltage V2 can be significantly smaller in silicon area and lower in cost. This may offset the increased cost and size of the extra capacitor and switch.
  • the capacitor C5 is still required and, in fact the reduction of the voltage of a section of the boost may impose an increase of the size of the boosting capacitor C5 in order to transfer the same energy to the load, but possibly a smaller capacitor value may be utilized if the converter is operated at high frequency.
  • FIG.7 shows the main voltage and current waveforms of the simulation of the circuit of FIG.5.
  • the output capacitor C6 value was 500nF
  • the inductor L3 value was 150nH
  • the capacitor C5 value was ! OnF.
  • the input voltage was 3.6V.
  • the load current was switched in Ins from 350mA to 10mA and back to 350mA as reported in the middle waveform 13.
  • the waveforms 12 and 14, respectively the inductor current and the output voltage waveforms clearly show the change of mode of operation when the load transient occurs.
  • the load current is 350mA
  • the converter operates in CCM and the current ripple switches approximately from 200mA to 500mA.
  • the switching frequency in CCM is 20MHz.
  • the load becomes much lighter the converter switches to DCM and the inductor current has peaks of almost 200mA at much lower frequency (about 4MHz).
  • the current reaches the zero value it is kept at such for some time until the output voltage falls below a predetermined threshold.
  • the output voltage ripple in DCM is not much higher in amplitude than in CCM.
  • the lowering of the switching frequency in DCM allows lower switching losses and high conversion efficiency with light loads.
  • FIG.8 shows the schematic of the hysteretic converter when operates as a buck converter according to a further embodiment of the present invention.
  • the circuit of FIG.8 is the same of that of FIG.4 with the exception of the phase of the switch S6.
  • the switch S6 operates with the same frequency and phase of the switch S8, while in FIG.8 it operates with the same phase ⁇ 2 of the switch S7.
  • the power converter operates as a buck providing an output voltage lower than its input voltage.
  • the boosting capacitor C5 is no longer acting as a boosting capacitor. It simply stores a portion of the inductor energy during re-circulation, and gets discharged during the inductor energy charging phase.
  • the voltage of the node 8 is modulated between the supply voltage V2 and the voltage at which the capacitor is discharged, therefore the Vout/Vin transfer function is equal to D, where D is the duty cycle of the converter.
  • D is the duty cycle of the converter.
  • This transfer function is typical of the buck switching converters.
  • the analytic study of the converter during the re-circulating phase is not trivial because the circuit operates as a resonatin g one.
  • the rest of the circuit, including the feedback circuit is exactly the same as the one shown for the boost configuration.
  • the switching power converter in buck mode can operate at the same high frequency used for the converter in boost mode and its efficiency is also very high.
  • the converter may implement a buck boost operation by monitoring the input voltage versus the output voltage and by toggling the phase of the switch S6 to operate as a boost or as a buck power converter. This effective advantage makes this circuit topology very attractive for some applications.
  • the value of the capacitor C5 can be quite small and easily be integrated in an IC (integrated circuit) but the value of the capacitor C5 affects directly the free switching frequency of the converter, since it is related to the voltage swing for the input of the feedback network. At lower capacitor values the switching frequency tends to be lower resulting in higher output voltage ripple, but a separate switching frequency control loop can be implemented to overcome this difficulty. Furthermore the switching frequency should be quite different from the self resonating frequency of the LC network during re-circulation.
  • the DCM mode can be easily implemented by turning off all the switches when the inductor current reaches the zero value.
  • the re-circulation inductor current is flowing in the low side switch S8 therefore a simple monitoring of the voltage of the node 9 is sufficient to indicate when the inductor current reaches the null value to start the DCM mode of operation.
  • FIG.9 shows the main voltage and current waveforms of the simulation of the circuit of FIG.8.
  • the output voltage is regulated at about 2.15V while the input voltage was 3.6V to confirm the step down operation of the converter.
  • the output capacitor C6 value was luF
  • the inductor L3 value was 150nH
  • the capacitor C5 value was luF.
  • the load current was switched in Ins from 350mA to 10mA and back to 350mA as reported in the middle waveform 16.
  • the waveforms 15 and 17, respectively the inductor current and the output voltage waveforms clear!)' show the change of mode of operation when the load transient occurs.
  • the load current is 350mA
  • the converter operates in CCM and the current ripple switches approximately from 200mA to 600mA.
  • the switching frequency was 15MHz in CCM.
  • the load becomes much lighter the converter switches to DCM and the inductor current has peaks of about 350mA at much lower frequency (about 1 MHz).
  • the current reaches the zero value it is kept at such for some time until the output voltage falls below a predetermined threshold.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

Cette invention se rapporte à un convertisseur de puissance à hystérésis à découpage original. Le convertisseur de puissance combine la fonction d'une pompe de charge capacitive et la fonction d'un convertisseur abaisseur inductif de façon à obtenir un convertisseur élévateur à découpage avec un procédé de commande bien plus simple par rapport à des convertisseurs de puissance élévateurs inductifs conventionnels. La commande par hystérésis fournit un fonctionnement stable dans toutes les conditions avec une excellente réponse à une variation brusque de la charge. En outre, la commande par hystérésis fait que la commutation à haute fréquence permet de réduire la taille et le coût des composants passifs. Le mode de fonctionnement à conduction discontinue fournit un rendement très élevé même pour de faibles charges. Le convertisseur de puissance présenté peut être actionné en tant que convertisseur élévateur ou en tant que convertisseur abaisseur en changeant simplement la phase de commutation d'un commutateur. Dans les deux types de fonctionnement, le rendement du convertisseur de puissance par hystérésis peut être très élevé même à de hautes fréquences de commutation.
PCT/US2012/045391 2012-07-03 2012-07-03 Convertisseur de puissance cl à hystérésis WO2014007806A1 (fr)

Priority Applications (1)

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PCT/US2012/045391 WO2014007806A1 (fr) 2012-07-03 2012-07-03 Convertisseur de puissance cl à hystérésis

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Application Number Priority Date Filing Date Title
PCT/US2012/045391 WO2014007806A1 (fr) 2012-07-03 2012-07-03 Convertisseur de puissance cl à hystérésis

Publications (1)

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WO2014007806A1 true WO2014007806A1 (fr) 2014-01-09

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102015212331A1 (de) * 2015-07-01 2017-01-05 Dialog Semiconductor (Uk) Limited Hochleistungsschaltaufwärtswandler mit reduzierter Induktorstromwelligkeit
CN109196775A (zh) * 2016-02-16 2019-01-11 Ｎｖｆ科技有限公司 开关放大器和功率转换器

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
RU2239225C2 (ru) * 2003-01-08 2004-10-27 Государственное учреждение Научно-исследовательский институт информатики и процессов управления Красноярского государственного технического университета Способ управления импульсным стабилизатором напряжения
JP2006141183A (ja) * 2004-11-15 2006-06-01 Matsushita Electric Ind Co Ltd 昇降圧コンバータ
US7626370B1 (en) * 2007-09-21 2009-12-01 National Semiconductor Corporation Apparatus and method for hysteretic boost DC-DC converter

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
RU2239225C2 (ru) * 2003-01-08 2004-10-27 Государственное учреждение Научно-исследовательский институт информатики и процессов управления Красноярского государственного технического университета Способ управления импульсным стабилизатором напряжения
JP2006141183A (ja) * 2004-11-15 2006-06-01 Matsushita Electric Ind Co Ltd 昇降圧コンバータ
US7626370B1 (en) * 2007-09-21 2009-12-01 National Semiconductor Corporation Apparatus and method for hysteretic boost DC-DC converter

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102015212331A1 (de) * 2015-07-01 2017-01-05 Dialog Semiconductor (Uk) Limited Hochleistungsschaltaufwärtswandler mit reduzierter Induktorstromwelligkeit
US9559589B2 (en) 2015-07-01 2017-01-31 Dialog Semiconductor (Uk) Limited High efficiency switching boost converter with reduced inductor current ripple
US10230302B2 (en) 2015-07-01 2019-03-12 Dialog Semiconductor (Uk) Limited High efficiency switching boost converter with reduced inductor current ripple
CN109196775A (zh) * 2016-02-16 2019-01-11 Ｎｖｆ科技有限公司 开关放大器和功率转换器
CN109196775B (zh) * 2016-02-16 2022-08-02 谷歌有限责任公司 开关放大器和功率转换器

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