WO2013165127A1 - Elément à diode électroluminescente et son procédé de fabrication - Google Patents

Elément à diode électroluminescente et son procédé de fabrication Download PDF

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Publication number
WO2013165127A1
WO2013165127A1 PCT/KR2013/003621 KR2013003621W WO2013165127A1 WO 2013165127 A1 WO2013165127 A1 WO 2013165127A1 KR 2013003621 W KR2013003621 W KR 2013003621W WO 2013165127 A1 WO2013165127 A1 WO 2013165127A1
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Prior art keywords
layer
conductive
active layer
conductivity type
light emitting
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PCT/KR2013/003621
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English (en)
Korean (ko)
Inventor
백정민
예병욱
유철종
김범준
이종람
Original Assignee
포항공과대학교 산학협력단
서울옵토디바이스주식회사
주식회사 포스코엘이디
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Publication of WO2013165127A1 publication Critical patent/WO2013165127A1/fr

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/24Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate of the light emitting region, e.g. non-planar junction
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/22Roughened surfaces, e.g. at the interface between epitaxial layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26Materials of the light emitting region
    • H01L33/30Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen

Definitions

  • the present invention relates to a light emitting diode device and a method of manufacturing the same.
  • the light emitting diode is basically a PN junction diode which is a junction between a P-type semiconductor and an N-type semiconductor.
  • the light emitting diode is bonded to a P-type semiconductor and an N-type semiconductor, and a current is applied by applying a voltage to the P-type semiconductor and the N-type semiconductor.
  • the electrons of the N-type semiconductor move toward the P-type semiconductor, and the electrons and holes move to the PN junction.
  • the electrons moved to the PN junction are combined with holes as they fall from the conduction band to the valence band.
  • the energy difference corresponding to the height difference that is, the energy difference of the conduction band and the home appliance, is emitted, the energy is emitted in the form of light.
  • These light emitting diodes have high energy conversion efficiency, long life, high light directivity, low voltage driving, no preheating time, no complicated driving circuit, and strong shock and vibration. It is expected to be used as a light source for solid-state lighting to replace existing light sources such as incandescent, fluorescent and mercury lamps in the near future.
  • the light emitting diode In order to use such a light emitting diode as a white light source to replace a mercury lamp or a fluorescent lamp, the light emitting diode must not only have excellent thermal stability but also be able to emit high output light even at low power consumption.
  • Horizontal light emitting diodes which are widely used as white light sources, are manufactured by coating yellow phosphors on a diode chip emitting blue light. This method has a problem in that light is lost by the phosphors, thereby reducing luminous efficiency.
  • a plurality of light emitting diodes emitting a plurality of colors may be connected to a complex circuit to be driven simultaneously to emit white light.
  • the white light is implemented in this manner, there is a problem in that the light emitting diode emitting light having a long wavelength has lower luminous efficiency than the light emitting diode emitting short wavelength and thus the overall luminous efficiency is low.
  • An object of the present invention is to provide a light emitting diode that emits multiple wavelengths and a method of manufacturing the same.
  • Another object of the present invention is to provide a light emitting diode and a method of manufacturing the same, which emit light of multiple wavelengths by providing patterns of various shapes and sizes in one chip.
  • a substrate In order to achieve the above object, according to an aspect of the present invention, a substrate; A first conductive type base layer provided on the substrate; A mask layer provided on the first conductivity type base layer, the mask layer including a plurality of openings and openings having at least two kinds of sizes; A plurality of first conductivity type structures disposed on the mask layer and grown through the openings; An active layer provided on a surface of the first conductivity type structure; And a second conductivity-type semiconductor layer covering the mask layer and the active layer.
  • Each of the openings may have a circular shape having a diameter of 200 nm to 6 ⁇ m, and the openings may be spaced apart from 200 nm to 10 ⁇ m.
  • the light emitting diode device a first electrode provided on the first conductive base layer; A transparent electrode provided on the second conductive semiconductor layer; And a second electrode provided on the transparent electrode.
  • the first conductive structures may be in the form of at least one of a hexagonal pyramid, a truncated hexagonal pyramid, or a polyhedron having a predetermined thickness.
  • the first conductive structures may be inclined at an angle of 60 to 65 degrees with respect to the first conductive base layer.
  • the active layer may include a nitride semiconductor layer including In, and certain regions of the active layer positioned on vertices, corners, or surfaces of the first conductive structures may have different mole fractions of In.
  • the mole fraction of In is higher than the constant area of the active layer located on the corners of the first conductivity type structures, and the corners of the first conductivity type structures are located on the vertices of the first conductivity type structures.
  • the mole fraction of In may be higher than a predetermined area of the active layer positioned on the surfaces of the first conductivity type structures.
  • Certain areas of the active layer located on the vertices of the first conductivity type structures emit longer wavelengths than areas of the active layer located on the corners of the first conductivity type structures, and on the edges of the first conductivity type structures.
  • the predetermined region of the active layer positioned may emit longer wavelengths than the predetermined region of the active layer positioned on the surfaces of the first conductivity type structures.
  • the method comprising the steps of preparing a substrate having a first conductivity type base layer; Forming a mask layer having a plurality of openings provided in at least two kinds of sizes on the first conductive base layer; Growing a plurality of first conductivity type structures from surfaces of the first conductivity type base layer exposed through the openings; Growing an active layer on a surface of the first conductivity type structure; And growing a second conductive semiconductor layer covering the mask layer and the active layer.
  • the method of manufacturing a light emitting diode device may include forming a transparent electrode on the second conductive semiconductor layer; Etching at least a portion of the transparent electrode, the second conductive semiconductor layer, and the mask layer to expose a portion of the first conductive base layer; And forming a first electrode on a portion of the exposed first conductive base layer and a second electrode on the transparent electrode.
  • At least one of the first conductivity type structure, the active layer, and the second conductivity type semiconductor layer may be formed using a metal organic chemical vapor deposition apparatus.
  • FIG. 1 is a conceptual diagram of a light emitting diode device according to an embodiment of the present invention.
  • FIG. 2 is a cross-sectional view taken along line AA ′ of FIG. 1.
  • 3A and 3B are photographs and conceptual views of a hexagonal pyramid shape or truncated hexagonal pyramid shape of the first conductive structure.
  • 4 to 9 are cross-sectional views illustrating a method of manufacturing a light emitting diode device according to an embodiment of the present invention.
  • FIG. 1 is a conceptual diagram of a light emitting diode device according to an embodiment of the present invention.
  • FIG. 2 is a cross-sectional view taken along line AA ′ of FIG. 1
  • FIGS. 3A and 3B are photographs and conceptual views of a hexagonal pyramid shape or a truncated hexagonal pyramid shape of the first conductivity type structure.
  • a light emitting diode device 100 may include a substrate 110, a first conductive base layer 120, a mask layer 130, and a first conductive type.
  • the structure 140 may include the active layer 150, the second conductive semiconductor layer 160, the transparent electrode 170, the first electrode 180, and the second electrode 190.
  • the substrate 110 may be a growth substrate, and the substrate 110 may be a sapphire substrate, a glass substrate, a silicon carbide substrate, a silicon substrate, or a GaN substrate, and the substrate 110 is not limited thereto.
  • the first conductive base layer 120 may be provided on one surface of the substrate 110.
  • the first conductive base layer 120 is formed by a mesa sacche where a portion of the mask layer 130, the active layer 150, the second conductive semiconductor layer 160, and the transparent electrode 170 are etched.
  • the predetermined area may be provided in an exposed form.
  • the first conductive base layer 120 may include a III-N-based compound semiconductor doped with a first-type impurity, for example, an N-type impurity, for example, an (Al, In, Ga) N-based Group III nitride semiconductor. Can be.
  • the first conductive base layer 120 may be a GaN layer doped with N-type impurities, that is, an N-GaN layer.
  • the first conductivity type base layer 120 may be formed of a single layer or multiple layers.
  • the first conductivity type base layer 120 may have a superlattice structure.
  • the mask layer 130 may be provided on the first conductivity type base layer 120.
  • the mask layer 130 may include an insulating material such as a silicon oxide film or a silicon nitride film.
  • the mask layer 130 may be provided to a thickness of 10 to 100nm, preferably about 50nm.
  • the mask layer 130 may include a plurality of openings 132.
  • the openings 132 may be provided in different shapes or different sizes.
  • the openings 132 of the mask layer 130 serve to determine the shape of the first conductivity type structure 140 which will be described later, the size and shape are appropriate according to the desired shape of the first conductivity type structure 140. It may be provided by selecting.
  • the openings 132 include a first opening 132a, a second opening 132b, and a third opening 132c.
  • the openings 132 may be provided as two types of openings without being limited thereto, or may include four or more types of openings.
  • the first opening 132a has a smaller diameter than the second opening 132b and the third opening 132c, and the third opening 132c has the first opening 132a and the second opening 132b. Its diameter can be large.
  • the spacing between the first openings 132a is relatively narrow, the spacing between the third openings 132c is relatively wide, and the spacing between the second openings 132b is
  • the first openings 132a and the second openings 132b may be spaced at an interval about the middle of the separation interval.
  • the spaced intervals of the openings 132 may be appropriately spaced so that the first conductive structures 140 described later do not contact each other.
  • the first openings 132a, the second openings 132b, and the third openings 132c of the mask layer 130 may include the first conductive structures 140, which will be described later, respectively.
  • the structure 142, the first conductive structure 144 having a truncated hexagonal pyramid shape, or the first conductive structure 146 having a polyhedral shape having a predetermined thickness serves to be provided.
  • the openings 132 may each have a circular or polygonal shape having a diameter or width of 200 nm to 6 ⁇ m, and the spaces between each of the openings 132, that is, the spaced intervals may be 200 nm to 10 ⁇ m. Can be.
  • the first conductive structures 140 may be provided on the substrate 110 on which the mask layer 130 is formed.
  • the first conductive structures 140 may be a III-N based compound semiconductor doped with a first type impurity, for example, an N type impurity, for example, (Al, In, Ga) N-based group III nitride semiconductor may be included.
  • a first type impurity for example, an N type impurity, for example, (Al, In, Ga) N-based group III nitride semiconductor may be included.
  • the first conductive structures 140 may be grown from the surface of the first conductive base layer 120 exposed through the openings 132 of the mask layer 130.
  • the first conductive structure 140 grown through the first opening 132a may be a first conductive structure 142 having a hexagonal pyramid shape, and the first conductive structure 140 may be grown through the second opening 132b.
  • the first conductive structure 140 may be a first conductive structure 144 having a truncated hexagonal pyramid shape, and the first conductive structure 140 grown through the third opening 132c may have a predetermined thickness. It may be a polyhedral first conductive structure 146.
  • the first conductivity-type structures 140 are selectively formed according to the width or diameter of the openings 132 so that the width or diameter of the openings 132 is appropriately selected, and the width or diameter is selected.
  • the openings 132 may be appropriately arranged and formed.
  • first conductive structures 140 are the same shape, they are arranged to be adjacent to each other, but the first conductive structures 140 having different shapes may be provided in a mixed form.
  • the number of each form can also be selected suitably and provided.
  • the first conductive structures 140 may be formed such that side surfaces thereof are inclined by about 60 to 65 degrees with respect to the surface of the first conductive base layer 120 or the mask layer 130. This is because the first conductivity type structures 140 grow from the openings 132 and laterally grow on the mask layer 130.
  • the active layer 150 may be provided on the surfaces of the first conductive structures 140.
  • the active layer 150 may be an inclined surface or a plane of the first conductive structures 140, wherein the plane is a surface parallel to the surface of the first conductive base layer 120 or the mask layer 130. It grows in the direction perpendicular to).
  • the active layer 150 may be formed of a III-N series compound semiconductor, for example, an (Al, Ga, In) N semiconductor layer, and the active layer 150 may be formed of a nitride semiconductor layer including at least In.
  • the active layer 150 may be a single quantum well structure including one well layer (not shown), or a multiple quantum well having a structure in which a well layer (not shown) and a barrier layer (not shown) are alternately stacked. It may be a structure.
  • the well layer (not shown) or the barrier layer (not shown) may be formed of a superlattice structure, respectively or both.
  • the active layer 150 may be provided in each of the first conductive structures 140 to be separated from each other. That is, on the surface of the first conductivity type structure 142 of the hexagonal pyramid shape, the first conductivity type structure 144 of the truncated hexagonal pyramid shape or the polyhedral shape of the first conductivity type structure 146 having a predetermined thickness Each active layer 150 is formed, these active layer 150 may be provided in a form separated from each other.
  • the active layer 150 may be provided to expose some regions of the mask layer 130, preferably central regions between the openings 132. That is, the active layer 150 may not be provided on the surface of the mask layer 140 exposed between the first conductive structures 140.
  • FIG. 3A shows a real picture of the first conductivity-type structure 142 having a hexagonal shape and a conceptual diagram below it
  • FIG. 3B shows a real picture of the first conductivity-type structure 144 having a truncated hexagonal shape.
  • Mole fractions of In of different regions of the active layer 150 provided on the areas corresponding to the vertices 148a, the corners 148b, and the surface 148c of the first conductive structures 142 and 144 are respectively different. May have
  • the plane 148c means a crystal plane or plane as shown in FIGS. 3A and 3B
  • the edge 148b means a boundary of the crystal plane or plane
  • the vertex 148a is shown in FIGS. 3A and 3B. As shown in FIG. 3B, it may mean that at least two corners 148b meet.
  • the predetermined area of the active layer 150 located on the area corresponding to the vertex 148a has a higher molar fraction of In than the predetermined area of the active layer 150 located on the area corresponding to the corner 148b.
  • a certain area of the active layer 150 located on the area corresponding to the edge 148b may have a higher molar fraction of In than a certain area of the active layer 150 located on the area corresponding to the surface 148c.
  • This difference in mole fraction of In of the active layer 150 causes a difference in wavelength of light emitted from the regions of the active layer 150. In the region where the mole fraction of In is relatively high, light having a relatively long wavelength is emitted. In the region where the mole fraction of In is relatively, the light having a relatively short wavelength is emitted.
  • a predetermined region of the active layer 150 located on the region corresponding to the vertex 148a is relatively long wavelength light compared to a predetermined region of the active layer 150 located on the region corresponding to the corner 148b. Emit light, and a predetermined region of the active layer 150 positioned on the region corresponding to the edge 148b is relatively longer than a predetermined region of the active layer 150 positioned on the region corresponding to the surface 148c. Emits light.
  • a predetermined region of the active layer 150 located on the region corresponding to the vertex 148a, a predetermined region of the active layer 150 located on the region corresponding to the edge 148b, and the surface 148c In a certain region of the active layer 150 positioned on the corresponding region, light may be generated when a current having a predetermined density or more is injected. In this case, the minimum current density at which light may be generated in each region of the active layer 150 may be different.
  • a certain area of the active layer 150 located on the area corresponding to the vertex 148a has a mole fraction of In compared to a certain area of the active layer 150 located on the area corresponding to the edge 148b. Since the light is emitted at a relatively low current density, the light emitting device is located on the area corresponding to the vertex 148a even at a current density that does not emit light in a certain area of the active layer 150 located on the area corresponding to the edge 148b. Light may be emitted in a predetermined region of the active layer 150.
  • a predetermined area of the active layer 150 located on the area corresponding to the edge 148b is molar fraction of In compared to a predetermined area of the active layer 150 located on the area corresponding to the surface 148c. Since it emits light at a relatively high current density, it is located on the area corresponding to the corner 148b even at a current density that does not emit light in a certain area of the active layer 150 located on the area corresponding to the surface 148c. Light may be emitted in a predetermined region of the active layer 150.
  • a long wavelength of light emission (a predetermined region of the active layer 150 located on the area corresponding to the vertex 148a) Can be applied at a current density that can emit light.
  • long wavelengths and intermediate wavelengths shorter than the longer wavelengths and longer than the shorter wavelengths may emit light (e.g., emit light in predetermined regions of the active layer 150 positioned on the regions corresponding to the corners 148b as well as the vertex 148a).
  • the active layer 150 corresponding to all regions including the vertices 148a, the corners 148b, and the surface 148c. Can be applied at a current density that can emit light in all regions.
  • the second conductive semiconductor layer 160 is the substrate 110 provided with the active layer 150, preferably the mask layer 130 exposed without forming the active layer 150 and the active layer 150. It may be provided on a certain surface of the).
  • the second conductivity-type semiconductor layer 160 may cover an irregular morphology of the first conductivity-type structures 140 and the active layer 150 to substantially flatten the surface thereof.
  • the second conductive semiconductor layer 160 includes a III-N-based compound semiconductor doped with a second-type impurity, eg, a P-type impurity, such as a (Al, Ga, In) N-based Group III nitride semiconductor layer. can do.
  • a second-type impurity eg, a P-type impurity, such as a (Al, Ga, In) N-based Group III nitride semiconductor layer.
  • the second conductivity type semiconductor layer 160 may be a GaN layer doped with P-type impurities, that is, a P-GaN layer.
  • the second conductive semiconductor layer 160 may have a superlattice structure.
  • the light emitting diode device 100 may further include a buffer layer (not shown), a superlattice layer (not shown), or an electron barrier layer (not shown).
  • the buffer layer may be provided to mitigate lattice mismatch between the substrate 110 and the first type conductive semiconductor layer 120.
  • the buffer layer (not shown) may be formed of a single layer or a plurality of layers, when formed of a plurality of layers, it may be made of a low temperature buffer layer and a high temperature buffer layer.
  • the buffer layer (not shown) may be made of AlN.
  • the superlattice layer may be provided between the first conductivity type structure 140 and the active layer 150, and may be a III-N-based compound semiconductor, for example, an (Al, Ga, In) N semiconductor layer.
  • the layer stacked in multiple layers, for example, an InN layer and an InGaN layer, may be repeatedly stacked.
  • the superlattice layer (not shown) may be provided at a position formed before the active layer 124 to prevent dislocations or defects from being transferred to the active layer 150. Accordingly, it may serve to mitigate the formation of dislocations or defects of the active layer 150 and to improve the crystallinity of the active layer 150.
  • the electron barrier layer may be provided between the active layer 150 and the second type conductive semiconductor layer 160, and may be provided to increase recombination efficiency of electrons and holes, and have a relatively wide bandgap. It may be provided with a material having a.
  • the electron barrier layer may be formed of a (Al, In, Ga) N-based group III nitride semiconductor, and may be formed of a P-AlGaN layer doped with Mg.
  • the transparent electrode 170 may be provided on the second conductivity type semiconductor layer 160.
  • the transparent electrode 170 may be formed of a material making ohmic contact with the second conductivity-type semiconductor layer 160, and may be formed of a light-transmitting material that may transmit light emitted from the active layer 150. Can be.
  • the transparent electrode 170 may include at least one of indium tin oxide (ITO), zinc oxide (ZnO), aluminum zinc oxide (AZO), or indium-zinc oxide (IZO).
  • ITO indium tin oxide
  • ZnO zinc oxide
  • AZO aluminum zinc oxide
  • IZO indium-zinc oxide
  • the first electrode 180 may be provided on a portion of the exposed first conductive base layer 120.
  • the first electrode 180 may be formed of one layer or a plurality of layers including at least one of Ni, Cr, Ti, Al, Ag, or Au.
  • the second electrode 190 may be provided on the transparent electrode 170.
  • the second electrode 189 may be formed of one layer or a plurality of layers including at least one of Ni, Cr, Ti, Al, Ag, or Au.
  • 4 to 9 are cross-sectional views illustrating a method of manufacturing a light emitting diode device according to an embodiment of the present invention. 4 to 9 may be based on a cross-sectional view taken along the line AA ′ of FIG. 1.
  • a substrate 110 having a first conductivity type base layer 120 is prepared.
  • the substrate 110 may be a growth substrate
  • the first conductive base layer 120 may be grown by epitaxial growth using a chemical vapor deposition apparatus, for example, a metalorganic chemical vapor deposition apparatus. It can be provided.
  • a mask layer 130 may be formed on the first conductivity type base layer 120.
  • the mask layer 130 may include openings 132 in predetermined regions.
  • the openings 132 may be formed in various shapes and sizes including a first opening 132a, a second opening 132b, and a third opening 132c.
  • the openings 132 may be formed of a circular shape having a diameter of 200 nm to 6 ⁇ m or a polygon having a width of 200 nm to 6 ⁇ m.
  • the openings 132 may be formed to be spaced apart between the openings 132 at intervals of 200 nm to 10 ⁇ m.
  • the mask layer 130 may include an insulating material such as silicon oxide or silicon nitride.
  • the mask layer 130 may be formed to have a thickness of 20 to 100 nm, preferably 50 nm by using a sputtering device, and then pattern the silicon oxide 130 to form the openings 130.
  • a plurality of first conductive structures 140 are formed from surfaces of the first conductive base layer 120 exposed through the openings 132 of the mask layer 130. do.
  • the hexagonal pyramidal first conductive structure 142 is epitaxially grown from the surfaces of the first conductive base layer 120 exposed by the first openings 132a, and the second conductive structure 142 is epitaxially grown.
  • the first conductive structure 144 in the form of a truncated hexagonal pyramid is epitaxially formed from the surfaces of the first conductive base layer 120 exposed by the openings 132b, and the third opening 132c.
  • the first conductive type structure 146 having a predetermined thickness may be epitaxially grown from surfaces of the first conductive type base layer 120 exposed by the plurality of layers. In this case, although not shown in FIG. 6, other types of conductor structures may be epitaxially grown by openings of different shapes or sizes.
  • the first conductivity-type structures 140 may be formed by epitaxial growth by a metal organic chemical vapor deposition apparatus, at least 1000 °C temperature, preferably at a temperature of about 1050 °C and at a pressure of about 100 torr,
  • the first conductive structures 140 may be formed using gases including a material constituting the first conductive structures 140, and may be formed by growing at a rate of 1 to 2 ⁇ m / hr.
  • the active layer 150 may be grown on the surfaces of the first conductive structures 140.
  • the active layer 150 may be a nitride semiconductor layer including In, and may be grown in a direction perpendicular to the surfaces of the first conductive structures 140.
  • the active layer 150 may be grown differently in the content of In according to the growth position. That is, the first conductive structure 142 in the form of a hexagonal pyramid, the first conductive structure 144 in the form of a truncated hexagonal pyramid, or the first conductive structure 146 in the form of a polyhedron having a predetermined thickness.
  • the active layer 150 formed on a region of the first conductive structures 140 corresponding to the vertex 148a, the corner 148b, or the plane 148c shown and described with reference to FIGS. 3A and 3B. Certain regions of may be formed of different In contents.
  • the active layer 150 may be formed by epitaxial growth by a metal organic chemical vapor deposition apparatus like the first conductive structures 140, and the active layer 150 may be a well layer (not shown) and a barrier layer (not shown). ), The well layer (not shown) is epitaxially grown under a temperature of about 760 ° C. and about 300 torr, and the barrier layer (not shown) is epitaxially grown under a temperature of about 850 ° C. and about 200 tor Can be.
  • the second conductivity-type semiconductor layer 160 is formed on the substrate 110 on which the active layer 150 is formed.
  • the second conductivity-type semiconductor layer 160 may not be formed so that the active layer 150 is formed so as to cover a portion of the exposed mask layer 130.
  • the second conductivity type semiconductor layer 160 may be grown to planarize irregular morphologies by growth of the first conductivity type structure 140 and the active layer 150.
  • the surface of the second conductivity-type semiconductor layer 160 may have an irregular surface due to irregular morphology due to the growth of the first conductivity-type structure 140 and the active layer 150.
  • the irregular surface may be planarized using a planarization process to form a flat surface.
  • a transparent electrode 170 is formed on the second conductivity type semiconductor layer 160.
  • the transparent electrode 170 may be formed using a physical vapor deposition apparatus such as a sputtering apparatus.
  • At least a portion of the transparent electrode 170, the second conductive semiconductor layer 160, and the mask layer 130 are etched to expose a portion of the first conductive base layer 120. Let's do it.

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Abstract

La présente invention concerne un élément à diode électroluminescente et son procédé de fabrication. Selon la présente invention, celle-ci concerne l'élément à diode électroluminescente, comprenant : un substrat ; une première couche de base conductrice qui est disposée sur le substrat ; des couches de masque, lesquelles sont disposées en haut de la première couche de base conductrice en une pluralité, et comprennent des ouvertures qui présentent au moins deux tailles ; une pluralité de premières structures conductrices, lesquelles sont disposées sur les couches de masque et croissent depuis les ouvertures ; une couche active qui est disposée sur la surface de la première structure conductrice ; et une seconde couche semi-conductrice conductrice qui couvre les couches de masque et la couche active.
PCT/KR2013/003621 2012-05-03 2013-04-26 Elément à diode électroluminescente et son procédé de fabrication WO2013165127A1 (fr)

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KR1020120046769A KR101322927B1 (ko) 2012-05-03 2012-05-03 발광 다이오드 소자 및 그의 제조 방법
KR10-2012-0046769 2012-05-03

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KR101668622B1 (ko) * 2015-02-10 2016-10-26 울산과학기술원 선택적 전극형성을 이용한 피라미드형 발광 다이오드 제조 방법
CN105355743B (zh) * 2015-12-14 2018-04-17 厦门市三安光电科技有限公司 发光二极管及其制作方法
US11005004B2 (en) 2017-10-20 2021-05-11 Korea Advanced Institute Of Science And Technology Micro light emitting diode (LED) structure, method for manufacturing the same and display including the same
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