WO2013160369A1 - Method for manufacturing a semiconductor thin film - Google Patents

Method for manufacturing a semiconductor thin film Download PDF

Info

Publication number
WO2013160369A1
WO2013160369A1 PCT/EP2013/058534 EP2013058534W WO2013160369A1 WO 2013160369 A1 WO2013160369 A1 WO 2013160369A1 EP 2013058534 W EP2013058534 W EP 2013058534W WO 2013160369 A1 WO2013160369 A1 WO 2013160369A1
Authority
WO
WIPO (PCT)
Prior art keywords
thin film
layer
annealing
accordance
temperature
Prior art date
Application number
PCT/EP2013/058534
Other languages
French (fr)
Inventor
Marina MOUSEL
Alex Redinger
Susanne Siebentritt
Original Assignee
Université Du Luxembourg
Tdk Corporation
Robert Bosch Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Université Du Luxembourg, Tdk Corporation, Robert Bosch Gmbh filed Critical Université Du Luxembourg
Publication of WO2013160369A1 publication Critical patent/WO2013160369A1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02422Non-crystalline insulating materials, e.g. glass, polymers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02425Conductive materials, e.g. metallic silicides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02469Group 12/16 materials
    • H01L21/02474Sulfides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02469Group 12/16 materials
    • H01L21/02477Selenides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02469Group 12/16 materials
    • H01L21/0248Tellurides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02485Other chalcogenide semiconducting materials not being oxides, e.g. ternary compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02491Conductive materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02551Group 12/16 materials
    • H01L21/02557Sulfides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02551Group 12/16 materials
    • H01L21/0256Selenides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02551Group 12/16 materials
    • H01L21/02562Tellurides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02568Chalcogenide semiconducting materials not being oxides, e.g. ternary compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0256Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
    • H01L31/0264Inorganic materials
    • H01L31/032Inorganic materials including, apart from doping materials or other impurities, only compounds not provided for in groups H01L31/0272 - H01L31/0312
    • H01L31/0326Inorganic materials including, apart from doping materials or other impurities, only compounds not provided for in groups H01L31/0272 - H01L31/0312 comprising AIBIICIVDVI kesterite compounds, e.g. Cu2ZnSnSe4, Cu2ZnSnS4
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/072Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type
    • H01L31/0749Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type including a AIBIIICVI compound, e.g. CdS/CulnSe2 [CIS] heterojunction solar cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/541CuInSe2 material PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention relates to a method for manufacturing semiconductor thin films.
  • it relates to the manufacturing of (Ag x Cui_ x ) 2 ZnZ(SySei_ y )4 thin films, wherein x and y can be selected between 0 and 1 , and wherein Z can be selected from Sn, Ge, Si, Pb.
  • a Cu 2 ZnSn(SySei_ y )4 absorber layer is considered the leading candidate to replace a Cu(ln,Ga)(S,Se) 2 absorber layer in thin films solar cells because it only contains cheap and abundant elements.
  • Cu 2 ZnSn(SySei_y) 4 solar cells have reached power conversion efficiencies of 10.1 %, clearly showing the potential of the material (Aaron et al., Prog. Photovolt. Res. Appl., 201 1. DOI: 10.1002/pip.1 160).
  • Cu 2 ZnSn(SySei_ y )4 thin films for solar cell applications can be produced by a variety of different techniques.
  • deposition techniques e.g. evaporation techniques, sputtering, E-beam, electro deposition, spray pyrolysis, photo-chemical deposition, spin coating, the iodine transport method, printing, pulsed laser deposition etc.
  • a first possibility is to deposit all elements or binary compounds at elevated temperatures such that the absorber is formed in one step.
  • a further technique involves all elements or binary compounds being deposited at once (at room or elevated temperature) and then heated to re-crystallize. Finally, all elements or binary compounds may be deposited sequentially, and then heated to intermix and crystallize.
  • the Cu 2 ZnSn(S y Sei_ y ) 4 semiconductor compound is spontaneously formed on a heated substrate (e.g. co-evaporation, sputtering technique) in a single step.
  • the metals or binaries are first deposited near room temperature and are then, in a further step, annealed in a furnace in an S/Se atmosphere in order to form Cu 2 ZnSn(SySei_ y ) 4 .
  • Annealing in furnaces is typically performed in an S/Se vapour together with different gases: Ar, N 2 , H 2 , H 2 /N 2 .
  • Annealing in N 2 gas plus elemental sulphur vapour has been described by Araki et al., Thin Solid Films, 517 (2008) 1457-1460.
  • Annealing in N 2 and 5wt% H 2 S gas is disclosed in Katagiri et al., Solar Energy Materials and Solar Cells, 49 (1997) 407-414.
  • Annealing in N 2 and 20wt% H 2 S gas is described in Katagiri et al., Applied Physics Express, 1 (2008) 041201 .
  • WO 2010/138636 discloses a method of manufacturing a thin film which involves depositing two layers of particles on a substrate, wherein each layer may be comprised of multiple Cu2SnZnSe 4 particles.
  • a method for manufacturing a (Ag x Cui_ x ) 2 ZnZ(S y Se-i_ y ) 4 thin film wherein both x and y are selected in between 0 and 1 , and wherein Z is selected from Sn, Ge, Si, Pb.
  • the method comprises the following steps: - providing a thin film comprising Ag and/or Cu, the thin film further comprising Zn and Z, the thin film further comprising S and/or Se;
  • said layer (30) is a layer of Z(S/Se) n , 1 ⁇ n ⁇ 2.
  • the thin film and/or the layer may preferably be produced at a temperature which is lower than the annealing temperature.
  • the covering layer may preferably cover said thin film surface integrally.
  • the covering layer may further have a substantially uniform thickness (31 ).
  • the method may preferably comprise the further step of etching the annealed thin film.
  • the step of annealing may further comprise the step of enclosing the thin film and the covering layer in an inert enclosure.
  • At least one opening may preferably be provided in the enclosure, through which S and/or Se is supplied.
  • the thin film may further be provided on a substrate, which may be a molybdenum substrate.
  • the thin film may comprise at least one layer comprising Zn.
  • the thin film may further comprise at least one layer comprising Ag and/or Cu.
  • the thin film may preferably further comprise at least one layer comprising S and/or Se.
  • the thin film may comprise at least one layer comprising Z.
  • a semiconductor thin film produced using the method described above there is provided a device comprising a semiconductor thin film produced using the method described above.
  • the device may preferably be a photovoltaic cell, even more preferably having an efficiency of at least 5 %.
  • the method according to the present invention provides an efficient way of producing (Ag x Cui_ x ) 2 ZnSn(SySei_y)4 semiconductor thin films, which avoids tin loss during the annealing phase.
  • the thin film is protected by a layer of Sn(S/Se) n , 1 ⁇ n ⁇ 2, which evaporates and acts as a source of SnSe and Se for the underlying (Ag x Cui_ x ) 2 ZnSn(SySei_ y )4 thin film.
  • the annealing step may be performed in various atmospheres and under various pressure conditions, while the (Ag x Cui_ x ) 2 ZnSn(SySei_y)4 thin film will not tend to decompose during.
  • the resulting semiconductor material is of a high quality. It may be used to produce photovoltaic cells of high efficiency and exhibiting a series resistance whose value does not depend on temperature.
  • the layer (30) is a layer of Z(S/Se) n , 1 ⁇ n ⁇ 2 and therefore, the layer consists of Z(S/Se) n , 1 ⁇ n ⁇ 2.
  • Figure 1 a, 1 b, 1 c and 1 d are schematic illustrations of different steps of a preferred embodiment of the method according to the present invention.
  • Figure 2 is a flow chart illustrating a preferred embodiment of the method according to the present invention.
  • Figure 3 is a flow chart illustrating a preferred embodiment of the method according to the present invention.
  • Figure 4 illustrates a specific aspect of a preferred embodiment of the method according to the present invention.
  • Figure 5 shows experimental results of a device produced according to a preferred embodiment of the method according to the present invention.
  • Figure 6 shows experimental results of a device produced according to a preferred embodiment of the method according to the present invention.
  • Figure 7 shows experimental results of a photovoltaic device produced according to a preferred embodiment of the method according to the present invention.
  • Figure 8 shows experimental results of a photovoltaic device produced according to a preferred embodiment of the method according to the present invention.
  • Figure 9 shows experimental results of a photovoltaic device produced according to a preferred embodiment of the method according to the present invention.
  • Figure 10 shows an Laser Light Scattering signal recorded while a preferred embodiment of the method according to the present invention was executed.
  • Figure 1 1 shows experimental results of a photovoltaic device produced according to a preferred embodiment of the method according to the present invention.
  • a method for manufacturing a (Ag x Cui_ x ) 2 ZnSn(S y Sei_ y )4 thin film A precursor thin film 20 comprising Ag and/or Cu is provided, as shown in Fig 1 a.
  • the thin film 20 provides a free surface 21 and further comprises Zn and Sn, as well as S and/or Se.
  • the free surface 21 of the thin film 20 is covered by a layer 30 comprising Sn.
  • the layer 30 further comprises S and/or Se.
  • the precursor thin film 20 is annealed together with the covering layer 30 at a high temperature as shown in Fig 1 c.
  • the covering layer 30 evaporates.
  • the thickness 31 of the initial covering layer 30 is chosen as a function of the annealing temperature and the duration of the annealing phase, so that the layer 30 completely evaporates during the annealing phase.
  • This method produces an annealed (Ag x Cui_ x ) 2 ZnSn(SySei_y) 4 thin film 20, as shown in Fig 1 d.
  • Fig 2 illustrates the sequence of steps according to a preferred embodiment of the proposed method.
  • the precursor thin film 20 is grown at a low temperature of about 300 °C. At this temperature the precursor (Ag x Cui_ x ) 2 ZnSn(SySei_y) 4 film does not decompose.
  • the film is grown using any technique known in the art, such as coevaporation of Cu/Ag, Zn, Sn and S/Se, or sputtering from metal or binary targets.
  • the covering layer comprising Sn as well as S and/or Se, and preferably comprising Sn(S/Se) n , 1 ⁇ n ⁇ 2, is deposited on top of the surface of the precursor thin film 20.
  • the covering layer is evaporated on the thin film at a low temperature of about 150 °C. This is achieved by physical vapour deposition of Sn and S/Se or Sn(S/Se) and S/Se.
  • the layer may alternatively be deposited by chemical or electro-chemical methods, by sputtering or any other deposition methods known in the art. Both steps 100 and 200 may be performed in the same deposition device.
  • the film 20 is heated together with the covering layer 30 up to a high temperature in the range of 500°C to 600°C.
  • the layer 30 starts to evaporate and provides a source of Sn(S/Se) and S/Se for the underlying layer 20 of (Ag x Cui_ x ) 2 ZnSn(SySei_y) 4. This prevents the Sn loss that would occur in the underlying layer, according to equation (1 ), if the covering layer 30 were not present.
  • the thickness 31 of the layer 30 is chosen so that the layer 30 evaporates completely during the annealing phase.
  • the surface 21 of the annealed thin film 20 of (Ag x Cui_ x ) 2 ZnSn(SySei_y) 4 is exposed and the manufacturing process is finished.
  • the thickness of the layer 31 is chosen so that the layer 30 does not evaporate completely during the annealing phase.
  • the remaining covering layer is removed by chemical etching 400.
  • the etching solution comprises HCI, which efficiently removes the excess Sn(S/Se) n and leaves the annealed thin film 20 of (Ag x Cui_ x ) 2 ZnSn(SySei_y) 4 intact.
  • extra S and/or Se is supplied to the atmosphere in the enclosure 40 during the annealing phase.
  • the evaporation of Sn(S/Se) n can be described by the following chemical equilibrium equation (Zocchi and Piacente 1995), which is given for the example of SnSe 2 : SnSe 2 ⁇ SnSe(s)+ Se(g) (2)
  • the overpressure is set by an appropriate supply of S/Se. This allows to control the evaporation rate of the covering layer 30 during annealing.
  • the annealing takes place in a tube furnace, advantageously inside an inert enclosure, preferably a graphite box.
  • the chalcogen (S/Se) is preferably provided through at least one opening.
  • the annealing may also be performed in a vacuum chamber. This increases the speed of evaporation of the covering Iayer30, as the evaporating molecules do not collide with any molecules in the annealing atmosphere.
  • a precursor thin film 20' comprising at least one layer 22 comprising Zn, at least one layer 23 comprising Ag and/or Cu, at least one layer 24 comprising S and/or Se, and at least one layer 25 comprising Sn, as shown).
  • the layers 22, 23, 24, 25 may be combined as required, and any one or more of these layers may be repeated in the thin film 20' with or without intermediate layers.
  • Sn may be replaced by either of Ge, Si, or Pb without loss of generality.
  • the covering layer 30 advantageously comprises Ge(S/Se) n , Si(S/Se) n , or Pb(S/Se) n , 1 ⁇ n ⁇ 2, respectively.
  • a CZTSe precursor film is first produced in a molecular beam epitaxy system with Cu, Zn, Sn evaporation sources and Se is supplied via a valved source.
  • the deposition temperature is set to 320 °C and all four elements are coevaporated on a molybdenum coated soda lime glass substrate. At this temperature, the CZTSe material does not tend to decompose.
  • the produced thin film is cooled down to 150°C and Sn and Se are coevaporated on the CZTSe thin film.
  • This step forms a thick SnSe 2 covering layer on top of the CTZSe.
  • Sn and Se are deposited during a period of 30 minutes. This corresponds to a thickness of about 200nm.
  • the thin film with the covering layer is transferred into a tube furnace and annealed to 500°C for a period of 30 minutes, in the presence of 1 mbar H 2 /N 2 .
  • 20 mg of Se in form of powder are introduced into the hot-zone.
  • the covering layer desorbs and forms a high partial pressure of SnSe and Se above the surface of the CTZSe thin film, which is thereby protected. Since the desorption of the SnSe and Se proceeds exclusively from the surface of the covering layer, the underlying CZTSe thin film is confined and its decomposition is inhibited.
  • the resulting absorber thin film may still be covered with a certain amount of SnSe n if the covering layer has not completely evaporated.
  • the thin film is etched in concentrated HCI for 10 minutes, 400.
  • the thin film that has been produced according to this preferred embodiment has been characterized at different stages of the production method with scanning electron microscopy, SEM, equipped with an energy dispersive X-Ray analyser and with Raman spectroscopy in order to analyse the near surface region of the absorber layer.
  • Fig 5a shows the results of Raman spectroscopy after the deposition of the covering layer.
  • the surface of the CZTSe thin film is almost entirely covered with SnSe 2 .
  • the Raman modes at 1 16 cm “1 and 185.5 cm “1 corroborate this finding.
  • Fig 5b shows the results of the Raman scattering analysis after the annealing treatment.
  • the material that is left behind is almost exclusively SnSe with Raman modes at 1 13 cm “1 , 132 cm “1 , and 152 cm “1 .
  • the high asymmetric background of the Raman signal has also been identified in commercially available SnSe powder.
  • Fig 5c shows the corresponding results after the thin film has been etched in concentrated HCI for 10 minutes.
  • the etching has removed the SnSe.
  • the Raman modes after etching can be assigned exclusively to CZTSe modes at 170 cm “1 , 194 cm “1 , 234 cm “1 and 244 cm “1 .
  • Fig 6 shows secondary ion mass spectrometry, SIMS, analysis of the absorber layer after HCI etching.
  • the sputtering time on the x-axis corresponds to different depths of the layer from the surface of the thin film (left) to the molybdenum substrate (right).
  • the intensities have been normalized at 1250s sputtering time, i.e. in the middle of the layer.
  • the solar cell absorber layers show an Sn increase towards the Mo back-contact, which can be attributed to an SnSe n phase.
  • Solar cells have been built as follows using the semiconductor thin film resulting from the above production method. The thin film is etched in KCN for 30 seconds in order to remove any remaining Cu x Se or Se impurities. This step is followed by chemical bath deposition of CdS. Finally, the n-type window layer is sputtered via RF-magnetron sputtering from intrinsic and Al-doped ZnO, followed by e-beam evaporation of Aluminium grids. The resulting solar cells have been characterised with current-voltage, IV, measurements and quantum efficiency, QE, measurements, as usual in the art. The current-voltage measurements have been performed with a halogen lamp, which has been adjusted to 100 mW/cm 2
  • Table I solar cell parameters Photoluminescence at room temperature is used to determine the bandgap of the resulting absorber layer in the near surface region. Photoluminescence is performed with an Ar-lon Laser with a spotsize of 1 ⁇ . For SIMS analysis, an area with a diameter of 250 ⁇ has been analysed and 8 keV Cs + ions have been used. The solar cell results are shown in Fig 7a on a linear scale, and in Fig 7b on a logarithmic scale. The solar cell parameters are given in Table I. A maximum solar cell efficiency of 5.1 % has been achieved. A maximum open circuit voltage of 340 mV has been achieved. The series resistance is low and well below 1 Qcrm 2 in the dark and under illumination. The diode quality factor in both cases is smaller than 2, which shows that the solar cell is dominated by recombination.
  • Fig 8a shows the temperature dependence of the solar cell efficiency.
  • Fig 8b shows the series resistance as a function of temperatures.
  • Fig 8c illustrates the external quantum efficiency measurements and
  • Fig 8d shows the open circuit voltage as a function of temperature, whereby E a is the activation energy.
  • the solar cell efficiency increases linearly with decreasing temperature, which is the usual behaviour for well-behaved solar cells.
  • the series resistance is roughly 0.6 Qcrm 2 in the complete temperature range. This result shows that the high series resistance seen in known CZTSe devices are not related to the material properties, but rather to the synthesis route or method of production.
  • a common way to investigate which recombination pathway in the solar cell is dominant is to investigate the temperature dependence of the open-circuit voltage, which is described by the following equation:
  • V oc — — In—
  • the energy E a describes the activation energy of the saturation current density
  • A is the diode quality factor
  • k the Boltzmann constant
  • T the temperature
  • J 0 o the prefactor of the saturation current density
  • Fig 9 the IV curves of the solar cell in the dark (Fig 9a), under illumination with white light (Fig 9b), under illumination with light higher than 590 nm (Fig 9c) and higher than 495 nm (Fig 9d) are shown. Arrows point towards lower temperatures wherein the temperature T varies from 100 K to 300 K. In the 590 nm case, no carriers are generated in the CdS buffer layer (bandgap: 2.5 eV), whereas the 498 nm filter cuts off slightly above the CdS bandgap. In order to reduce effects due to different illumination intensities, the solar cells have been illuminated such that they exhibit the same short circuit current density at room temperature.
  • both the CZTSe precursor film and the covering layer are produced using physical vapour deposition in a vacuum chamber, corresponding to steps 100 and 200.
  • the evaporation of the covering layer comprising SnSe n is monitored via Laser Light scattering, LLS.
  • the observed signal can also be used to control the evaporation process in situ.
  • This technique is commonly used in CIGS manufacturing as a tool for endpoint detection.
  • the diffuse scattered light which originates from a Laserdiode is measured.
  • the Laserdiode emits a modulated beam at 2kHz and a photodiode measures the scattered light via Lock-In Technique.
  • Lock-In Technique At the time where the capping layer evaporates a sharp decrease of the LLS signal is observed. This signal can be used to tune the capping layer thickness, the ramping times and the dwell times during the heating process.
  • Fig 10 depicts an LLS signal (top) as well as a pyrometer temperature signal (bottom) recorded during a physical vapour deposition process in a vacuum chamber, during which both the precursor CZTSe thin film and the covering layer were produced, followed by the evaporation of the latter during an annealing phase.
  • the vacuum chamber comprises shuttered inlets for the controlled introduction of Cu, Zn, Sn and Se.
  • the shutters can be closed or opened. If closed, the flux of elements is blocked and the flux onto the surface is zero. On opening a shutter, the flux is high.
  • the flux can be tuned by tuning the temperature of the effusion cells.
  • the laser light reflects on the bare Mo coated glass.
  • phase II Cu, Zn, Sn and Se are grown at about 320 °C.
  • the amplitude of the LLS signal increases as the roughness of the surface increases.
  • phase III all shutters for the introduction of Cu, Zn, Sn and Se into the chamber are closed, and the film is cooled down.
  • phase IV the covering layer is grown as Sn and Se are introduced at a low temperature.
  • the changes in the LLS signal are due to thickness changes.
  • phase V an SnSe source is opened.
  • Phase VI corresponds to the annealing step. The heating is performed with a ramp of 50°C per minutes.
  • the LLS signal increases due to an increase of surface roughness.
  • phase VII a sharp drop of the LLS signal is observed. This corresponds to the disappearance of the covering layer, which has evaporated in the preceding annealing phase.
  • phase VIII all shutters are closed and the chamber is cooled down, before the process ends in phase IX.
  • the resulting annealed semiconductor thin film is etched with HCI during 10 minutes in order to remove all remaining SnSe x phases.
  • a solar cell is built using the resulting semiconductor thin film, as described for the previously outlined embodiment.
  • the corresponding solar cell results are shown in Fig 1 1 on a linear scale, and solar cell parameters are given in Table II.
  • a method for manufacturing a (Ag x Cui_ x ) 2 ZnZ(S y Sei_ y )4 thin film, wherein Z is selected from Sn, Ge, Si, Pb, is provided.
  • the production method inhibits the decomposition of the (Ag x Cui_ x ) 2 ZnZ(SySei_ y )4 precursor film during annealing.
  • a solar cell with efficiency exceeding 5% can be produced.
  • the resulting solar cells show a low series resistance.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Electromagnetism (AREA)
  • Inorganic Chemistry (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Sustainable Energy (AREA)
  • Photovoltaic Devices (AREA)

Abstract

The present invention relates to a method for manufacturing semiconductor thin films. In particular, it relates to the manufacturing of (AgxCu1-x)2ZnZ (SySe1-y)4 thin films, wherein x and y can be selected between 0 and 1 and wherein Z can be selected from Sn, Ge, Si, Pb. The method avoids the loss of Z during annealing, resulting in semiconductor material of a high quality.

Description

METHOD FOR MANUFACTURING A SEMICONDUCTOR THIN FILM
Field of the invention The present invention relates to a method for manufacturing semiconductor thin films. In particular, it relates to the manufacturing of (AgxCui_x)2ZnZ(SySei_y)4 thin films, wherein x and y can be selected between 0 and 1 , and wherein Z can be selected from Sn, Ge, Si, Pb. Technical Background of the invention
A Cu2ZnSn(SySei_y)4 absorber layer is considered the leading candidate to replace a Cu(ln,Ga)(S,Se)2 absorber layer in thin films solar cells because it only contains cheap and abundant elements. Cu2ZnSn(SySei_y)4 solar cells have reached power conversion efficiencies of 10.1 %, clearly showing the potential of the material (Aaron et al., Prog. Photovolt. Res. Appl., 201 1. DOI: 10.1002/pip.1 160).
Cu2ZnSn(SySei_y)4 thin films for solar cell applications can be produced by a variety of different techniques. For the production of thin films a large number of different deposition techniques are used (e.g. evaporation techniques, sputtering, E-beam, electro deposition, spray pyrolysis, photo-chemical deposition, spin coating, the iodine transport method, printing, pulsed laser deposition etc.). A first possibility is to deposit all elements or binary compounds at elevated temperatures such that the absorber is formed in one step. A further technique involves all elements or binary compounds being deposited at once (at room or elevated temperature) and then heated to re-crystallize. Finally, all elements or binary compounds may be deposited sequentially, and then heated to intermix and crystallize.
In some cases the Cu2ZnSn(SySei_y)4 semiconductor compound is spontaneously formed on a heated substrate (e.g. co-evaporation, sputtering technique) in a single step. In other cases the metals or binaries are first deposited near room temperature and are then, in a further step, annealed in a furnace in an S/Se atmosphere in order to form Cu2ZnSn(SySei_y)4. In state of the art (AgxCui_x)2ZnSn(SySei_y)4 (x, y = 0...1 ) absorber layer fabrication, a precursor film containing the metals or the metals together with selenium and/or sulphur is annealed, or heat-treated in an S/Se atmosphere according to the proposal by Katagiri et al., Solar Energy Materials and Solar Cells 49 (1997) 407-414. High quality material is typically achieved through heating the precursor film at high temperatures of 500°C to 600°C. However, despite such an annealing/heat treatment, tin losses have been observed and reported throughout the literature: e.g. Weber et al., JOURNAL OF APPLIED PHYSICS Vol. 107, pp. 013516 (2010) have proposed using inert gas in order to reduce the tin loss. Similar observations have been made in Weber et al., Thin Solid Films Vol. 517 (2009) pp. 2524-2526; Friedlmeier et al., 14th European Photovoltaic Solar Cell Conference Barcelona, Spain 1997; Redinger et al. et al., APPLIED PHYSICS LETTERS, Vol. 97, pp. 0921 1 1 (2010); Scragg, PhD Thesis, University of Bath (England) (2010); Weber, PhD thesis, Helmholtz Zentrum Berlin (Germany) (2009).
Katagiri et al. in Solar Energy Materials and Solar Cells, 49, (1997), 407-414, have proposed addressing this problem by using an S/Se atmosphere during annealing; however, whilst this proposal achieves a reduction in tin loss, the loss cannot be completely avoided.
Annealing in furnaces is typically performed in an S/Se vapour together with different gases: Ar, N2, H2, H2/N2. Annealing in N2 gas plus elemental sulphur vapour has been described by Araki et al., Thin Solid Films, 517 (2008) 1457-1460. Annealing in N2 and 5wt% H2S gas is disclosed in Katagiri et al., Solar Energy Materials and Solar Cells, 49 (1997) 407-414. Annealing in N2 and 20wt% H2S gas is described in Katagiri et al., Applied Physics Express, 1 (2008) 041201 . Annealing in Ar and elemental S vapor and, alternatively, annealing in Ar and 5wt% H2S gas has been suggested by Scragg et al., Thin Solid Films, 517 (2009) 2481 -2484. Annealing in N2 + 10wt%H2 and elemental S vapor has been disclosed in Scragg et al., Journal of Electroanalytical Chemistry, 646 (2010) 52-59. Some annealing experiments have also been carried out under vacuum. (AgxCui_x)2ZnSn(SySei_y)4 thin films are known to decompose at temperatures higher than 350°C. The decomposition can be described with the following chemical equilibrium reaction:
Cu2ZnSnSe4(s) ^→ Cu2Se(s)+ ZnSe(s)+ SnSe(g)+ ½ Se2(g) (1 ) The equation applies for selenium, sulphur or mixed selenium/sulphur thin films. This reaction takes place during annealing, when the thin film is heated to high temperatures above 350°C. In order to avoid the above decomposition during annealing, it has been proposed to supply, during the annealing step, SnSe and Se in the gas phase. If the partial pressures of SnSe(g) and Se(g) in the annealing atmosphere are high enough, there is no driving force for the compound to decompose and the Cu2ZnSnSe4(s) is in a dynamic equilibrium with its vapour, see A. Redinger, D. M. Berg, P. J. Dale and S. Siebentritt, J. Am. Chem. Soc, 133 (10), 3320-3323 (201 1 ). While this method has been shown to alleviate the described tin loss during annealing, the corresponding procedure is demanding. It requires the partial pressures in the annealing atmosphere to be controlled thoroughly throughout the annealing phase. When the equilibrium is not given, the Cu2ZnSnSe4(s) compound will start to decompose.
Redinger et al., IEE Journal of Photovoltaics, Vol. 1 No. 2, pp 200 - 206, "Route Towards High Efficiency Single-Phase Cu2ZnSn(S, SE)4 Thin-Film Solar Cells: Model Experiments and Literature Review" discloses the addition of metallic Sn or Sn(S, SE)2 by supplying this as excess powder during heat treatment. There is no disclosure of providing a layer comprising Z on a free surface of a (AgxCUi_x)2ZnZ(SySei_y)4 thin film, wherein both x and y are selected in between 0 and 1 , and where Z is selected from Sn, Ge, Si, Pb.
WO 2010/138636 discloses a method of manufacturing a thin film which involves depositing two layers of particles on a substrate, wherein each layer may be comprised of multiple Cu2SnZnSe4 particles.
It is therefore an object of the present invention to overcome or alleviate at least some of the disadvantages of the known methods of manufacturing (AgxCui_x)2ZnSn(SySei_y)4 semiconductor thin films.
Summary of the invention
According to a first aspect of the present invention, there is provided a method for manufacturing a (AgxCui_x)2ZnZ(SySe-i_y)4 thin film, wherein both x and y are selected in between 0 and 1 , and wherein Z is selected from Sn, Ge, Si, Pb. The method comprises the following steps: - providing a thin film comprising Ag and/or Cu, the thin film further comprising Zn and Z, the thin film further comprising S and/or Se;
- providing a layer comprising Z on a free surface of said thin film, the layer further comprising S and/or Se;
- annealing the thin film together with said layer; and
wherein said layer covers at least a part of said thin film surface
and wherein said layer (30) is a layer of Z(S/Se)n, 1 < n < 2.
The thin film and/or the layer may preferably be produced at a temperature which is lower than the annealing temperature.
The covering layer may preferably cover said thin film surface integrally.
The covering layer may further have a substantially uniform thickness (31 ).
The method may preferably comprise the further step of etching the annealed thin film.
Preferably, the step of annealing may further comprise the step of enclosing the thin film and the covering layer in an inert enclosure.
At least one opening may preferably be provided in the enclosure, through which S and/or Se is supplied.
The thin film may further be provided on a substrate, which may be a molybdenum substrate.
Furthermore, the thin film may comprise at least one layer comprising Zn. The thin film may further comprise at least one layer comprising Ag and/or Cu.
The thin film may preferably further comprise at least one layer comprising S and/or Se.
Preferably, the thin film may comprise at least one layer comprising Z. According to a further aspect according to the present invention, there is provided a semiconductor thin film produced using the method described above. According to a third aspect according to the present invention, there is provided a device comprising a semiconductor thin film produced using the method described above. The device may preferably be a photovoltaic cell, even more preferably having an efficiency of at least 5 %.
The method according to the present invention provides an efficient way of producing (AgxCui_x)2ZnSn(SySei_y)4 semiconductor thin films, which avoids tin loss during the annealing phase. During the high temperature heat treatment, the thin film is protected by a layer of Sn(S/Se)n, 1 < n < 2, which evaporates and acts as a source of SnSe and Se for the underlying (AgxCui_x)2ZnSn(SySei_y)4 thin film. The annealing step may be performed in various atmospheres and under various pressure conditions, while the (AgxCui_x)2ZnSn(SySei_y)4 thin film will not tend to decompose during. As the Sn loss during annealing is avoided, the resulting semiconductor material is of a high quality. It may be used to produce photovoltaic cells of high efficiency and exhibiting a series resistance whose value does not depend on temperature.
In embodiments of the invention, the layer (30) is a layer of Z(S/Se)n, 1 < n < 2 and therefore, the layer consists of Z(S/Se)n, 1 < n < 2.
Brief description of the drawings
These and other aspects of the invention will now be further described, by way of example only, with reference to the accompanying figures.
Figure 1 a, 1 b, 1 c and 1 d are schematic illustrations of different steps of a preferred embodiment of the method according to the present invention. Figure 2 is a flow chart illustrating a preferred embodiment of the method according to the present invention.
Figure 3 is a flow chart illustrating a preferred embodiment of the method according to the present invention.
Figure 4 illustrates a specific aspect of a preferred embodiment of the method according to the present invention. Figure 5 shows experimental results of a device produced according to a preferred embodiment of the method according to the present invention. Figure 6 shows experimental results of a device produced according to a preferred embodiment of the method according to the present invention.
Figure 7 shows experimental results of a photovoltaic device produced according to a preferred embodiment of the method according to the present invention.
Figure 8 shows experimental results of a photovoltaic device produced according to a preferred embodiment of the method according to the present invention.
Figure 9 shows experimental results of a photovoltaic device produced according to a preferred embodiment of the method according to the present invention.
Figure 10 shows an Laser Light Scattering signal recorded while a preferred embodiment of the method according to the present invention was executed. Figure 1 1 shows experimental results of a photovoltaic device produced according to a preferred embodiment of the method according to the present invention.
Detailed Description According to the present invention, there is provided a method for manufacturing a (AgxCui_x)2ZnSn(SySei_y)4 thin film. A precursor thin film 20 comprising Ag and/or Cu is provided, as shown in Fig 1 a. The thin film 20 provides a free surface 21 and further comprises Zn and Sn, as well as S and/or Se. As shown in Fig 1 b, the free surface 21 of the thin film 20 is covered by a layer 30 comprising Sn. The layer 30 further comprises S and/or Se.
The precursor thin film 20 is annealed together with the covering layer 30 at a high temperature as shown in Fig 1 c. During the annealing, the covering layer 30 evaporates. In a preferred embodiment, the thickness 31 of the initial covering layer 30 is chosen as a function of the annealing temperature and the duration of the annealing phase, so that the layer 30 completely evaporates during the annealing phase. This method produces an annealed (AgxCui_x)2ZnSn(SySei_y)4 thin film 20, as shown in Fig 1 d.
Fig 2 illustrates the sequence of steps according to a preferred embodiment of the proposed method. First, 100, the precursor thin film 20 is grown at a low temperature of about 300 °C. At this temperature the precursor (AgxCui_x)2ZnSn(SySei_y)4 film does not decompose. The film is grown using any technique known in the art, such as coevaporation of Cu/Ag, Zn, Sn and S/Se, or sputtering from metal or binary targets. During the next step, 200, the covering layer comprising Sn as well as S and/or Se, and preferably comprising Sn(S/Se)n, 1 < n < 2, is deposited on top of the surface of the precursor thin film 20. The covering layer is evaporated on the thin film at a low temperature of about 150 °C. This is achieved by physical vapour deposition of Sn and S/Se or Sn(S/Se) and S/Se. The layer may alternatively be deposited by chemical or electro-chemical methods, by sputtering or any other deposition methods known in the art. Both steps 100 and 200 may be performed in the same deposition device.
During the annealing step, 300, the film 20 is heated together with the covering layer 30 up to a high temperature in the range of 500°C to 600°C. During this step, the layer 30 starts to evaporate and provides a source of Sn(S/Se) and S/Se for the underlying layer 20 of (AgxCui_x)2ZnSn(SySei_y)4. This prevents the Sn loss that would occur in the underlying layer, according to equation (1 ), if the covering layer 30 were not present. In the preferred embodiment of Fig 1 and Fig 2, the thickness 31 of the layer 30 is chosen so that the layer 30 evaporates completely during the annealing phase. After annealing, the surface 21 of the annealed thin film 20 of (AgxCui_x)2ZnSn(SySei_y)4 is exposed and the manufacturing process is finished.
In an alternative embodiment, shown in Fig 3, the thickness of the layer 31 is chosen so that the layer 30 does not evaporate completely during the annealing phase. After annealing 300, the remaining covering layer is removed by chemical etching 400. Preferably the etching solution comprises HCI, which efficiently removes the excess Sn(S/Se)n and leaves the annealed thin film 20 of (AgxCui_x)2ZnSn(SySei_y)4 intact.
In a further embodiment of the present invention, extra S and/or Se is supplied to the atmosphere in the enclosure 40 during the annealing phase. The evaporation of Sn(S/Se)n can be described by the following chemical equilibrium equation (Zocchi and Piacente 1995), which is given for the example of SnSe2: SnSe2 ^→ SnSe(s)+ Se(g) (2)
SnSe(s) ^→ SnSe (g) Therefore the evaporation rate of Sn(S/Se) is governed essentially by the overpressure of Se/S and Sn(Se/S) in the annealing atmosphere. The overpressure is set by an appropriate supply of S/Se. This allows to control the evaporation rate of the covering layer 30 during annealing. The annealing takes place in a tube furnace, advantageously inside an inert enclosure, preferably a graphite box. The chalcogen (S/Se) is preferably provided through at least one opening.
The annealing may also be performed in a vacuum chamber. This increases the speed of evaporation of the covering Iayer30, as the evaporating molecules do not collide with any molecules in the annealing atmosphere.
As shown in Fig 4, in some cases, it may be advantageous to use a precursor thin film 20' comprising at least one layer 22 comprising Zn, at least one layer 23 comprising Ag and/or Cu, at least one layer 24 comprising S and/or Se, and at least one layer 25 comprising Sn, as shown). The skilled person will understand that the layers 22, 23, 24, 25 may be combined as required, and any one or more of these layers may be repeated in the thin film 20' with or without intermediate layers.
In all of the above embodiments, Sn may be replaced by either of Ge, Si, or Pb without loss of generality. In those cases, the covering layer 30 advantageously comprises Ge(S/Se)n, Si(S/Se)n , or Pb(S/Se)n, 1 < n < 2, respectively.
This outlines the underlying principle of the present invention in general terms. Further specific embodiments according to the present invention are described here below on the example of Cu2ZnSnSe4 (CZTSe), without further limiting the scope of the invention.
In a preferred embodiment, a CZTSe precursor film is first produced in a molecular beam epitaxy system with Cu, Zn, Sn evaporation sources and Se is supplied via a valved source. The deposition temperature is set to 320 °C and all four elements are coevaporated on a molybdenum coated soda lime glass substrate. At this temperature, the CZTSe material does not tend to decompose. The stoichiometry is set to Cu/(Zn+Sn) = 0.8 and Zn/Sn = 1 .2. This corresponds to step 100. In a next step, 200, the produced thin film is cooled down to 150°C and Sn and Se are coevaporated on the CZTSe thin film. This step forms a thick SnSe2 covering layer on top of the CTZSe. In order to ensure that enough SnSen and Se is present at all times during the final heating process, Sn and Se are deposited during a period of 30 minutes. This corresponds to a thickness of about 200nm.
In a further step, 300, the thin film with the covering layer is transferred into a tube furnace and annealed to 500°C for a period of 30 minutes, in the presence of 1 mbar H2/N2. Moreover, 20 mg of Se in form of powder are introduced into the hot-zone. Upon heating, the covering layer desorbs and forms a high partial pressure of SnSe and Se above the surface of the CTZSe thin film, which is thereby protected. Since the desorption of the SnSe and Se proceeds exclusively from the surface of the covering layer, the underlying CZTSe thin film is confined and its decomposition is inhibited. After this final annealing step, the resulting absorber thin film may still be covered with a certain amount of SnSen if the covering layer has not completely evaporated. In order to remove this detrimental secondary phase, the thin film is etched in concentrated HCI for 10 minutes, 400.
The thin film that has been produced according to this preferred embodiment has been characterized at different stages of the production method with scanning electron microscopy, SEM, equipped with an energy dispersive X-Ray analyser and with Raman spectroscopy in order to analyse the near surface region of the absorber layer.
Fig 5a shows the results of Raman spectroscopy after the deposition of the covering layer. The surface of the CZTSe thin film is almost entirely covered with SnSe2. The Raman modes at 1 16 cm"1 and 185.5 cm"1 corroborate this finding.
Fig 5b shows the results of the Raman scattering analysis after the annealing treatment. The material that is left behind is almost exclusively SnSe with Raman modes at 1 13 cm"1, 132 cm"1, and 152 cm"1. The high asymmetric background of the Raman signal has also been identified in commercially available SnSe powder. There is no clear signal from the CZTSe layer in these Raman measurements. This is due to the finite penetration depth of the 514.5 nm Laser-line, which is only probing the first 100nm of the analysed sample. Solar cells produced from the thin films at this production state, without removing the SnSe film, did not result in working devices as the covering layer had not evaporated completely. Fig 5c shows the corresponding results after the thin film has been etched in concentrated HCI for 10 minutes. The etching has removed the SnSe. The Raman modes after etching can be assigned exclusively to CZTSe modes at 170 cm"1, 194 cm"1, 234 cm"1 and 244 cm"1.
Fig 6 shows secondary ion mass spectrometry, SIMS, analysis of the absorber layer after HCI etching. The sputtering time on the x-axis corresponds to different depths of the layer from the surface of the thin film (left) to the molybdenum substrate (right). The intensities have been normalized at 1250s sputtering time, i.e. in the middle of the layer.
It can be seen that the near surface region does not exhibit strong deviations from the bulk stoichiometry. The solar cell absorber layers show an Sn increase towards the Mo back-contact, which can be attributed to an SnSen phase. Solar cells have been built as follows using the semiconductor thin film resulting from the above production method. The thin film is etched in KCN for 30 seconds in order to remove any remaining CuxSe or Se impurities. This step is followed by chemical bath deposition of CdS. Finally, the n-type window layer is sputtered via RF-magnetron sputtering from intrinsic and Al-doped ZnO, followed by e-beam evaporation of Aluminium grids. The resulting solar cells have been characterised with current-voltage, IV, measurements and quantum efficiency, QE, measurements, as usual in the art. The current-voltage measurements have been performed with a halogen lamp, which has been adjusted to 100 mW/cm2
Figure imgf000012_0001
Table I: solar cell parameters Photoluminescence at room temperature is used to determine the bandgap of the resulting absorber layer in the near surface region. Photoluminescence is performed with an Ar-lon Laser with a spotsize of 1 μηη. For SIMS analysis, an area with a diameter of 250 μηη has been analysed and 8 keV Cs+ ions have been used. The solar cell results are shown in Fig 7a on a linear scale, and in Fig 7b on a logarithmic scale. The solar cell parameters are given in Table I. A maximum solar cell efficiency of 5.1 % has been achieved. A maximum open circuit voltage of 340 mV has been achieved. The series resistance is low and well below 1 Qcrm2 in the dark and under illumination. The diode quality factor in both cases is smaller than 2, which shows that the solar cell is dominated by recombination.
Some samples of the solar cell have been analysed in a temperature dependent current- voltage, IVT, setup. Fig 8a shows the temperature dependence of the solar cell efficiency. Fig 8b shows the series resistance as a function of temperatures. Fig 8c illustrates the external quantum efficiency measurements and Fig 8d shows the open circuit voltage as a function of temperature, whereby Ea is the activation energy. The main observation is that the solar cell efficiency increases linearly with decreasing temperature, which is the usual behaviour for well-behaved solar cells. As seen in Fig 8b, the series resistance is roughly 0.6 Qcrm2 in the complete temperature range. This result shows that the high series resistance seen in known CZTSe devices are not related to the material properties, but rather to the synthesis route or method of production. A common way to investigate which recombination pathway in the solar cell is dominant is to investigate the temperature dependence of the open-circuit voltage, which is described by the following equation:
Ea AkT Joo
Voc =— — In—
a Jph
The energy Ea describes the activation energy of the saturation current density, A is the diode quality factor, k the Boltzmann constant, T the temperature, J0o the prefactor of the saturation current density and Jph the photocurrent density. From this equation, it follows that Voc extrapolates to Ea at T = 0. If Ea is equal to the fundamental bandgap Eg of the absorber, then the dominant recombination pathway is situated in the bulk of the absorber. If however Ea is smaller than Eg, then the dominant recombination pathway is situated at the interface of the heterojunction. The bandgap in this case is deduced with external quantum efficiency, QE, measurements and with photoluminescence. The results are shown in Fig 8c. The evolution of the open-circuit voltage with temperature is shown in Fig 8d. Since the QE measurement and the extrapolation of V0c with temperature (0.94 eV compared to 0.95 eV) are identical within the experimental uncertainties, it is concluded that the dominant recombination pathway is not situated at the interface of the heterojunction.
The temperature dependence of the solar cell parameters has also been investigated under different illumination conditions. In Fig 9, the IV curves of the solar cell in the dark (Fig 9a), under illumination with white light (Fig 9b), under illumination with light higher than 590 nm (Fig 9c) and higher than 495 nm (Fig 9d) are shown. Arrows point towards lower temperatures wherein the temperature T varies from 100 K to 300 K. In the 590 nm case, no carriers are generated in the CdS buffer layer (bandgap: 2.5 eV), whereas the 498 nm filter cuts off slightly above the CdS bandgap. In order to reduce effects due to different illumination intensities, the solar cells have been illuminated such that they exhibit the same short circuit current density at room temperature. The dark and illuminated curves do not exhibit any severe distortions as compared to the diode behaviour. However, when the solar cell is illuminated with red light, the IV curves differ substantially. This phenomenon is known as red-kink effect and is only visible if light with a wavelength smaller than the CdS bandgap is used. The same effect has been observed in CIGS solar cells.
In an alternative embodiment, both the CZTSe precursor film and the covering layer are produced using physical vapour deposition in a vacuum chamber, corresponding to steps 100 and 200. The evaporation of the covering layer comprising SnSen is monitored via Laser Light scattering, LLS. The observed signal can also be used to control the evaporation process in situ. This technique is commonly used in CIGS manufacturing as a tool for endpoint detection. The diffuse scattered light which originates from a Laserdiode is measured. The Laserdiode emits a modulated beam at 2kHz and a photodiode measures the scattered light via Lock-In Technique. At the time where the capping layer evaporates a sharp decrease of the LLS signal is observed. This signal can be used to tune the capping layer thickness, the ramping times and the dwell times during the heating process.
Fig 10 depicts an LLS signal (top) as well as a pyrometer temperature signal (bottom) recorded during a physical vapour deposition process in a vacuum chamber, during which both the precursor CZTSe thin film and the covering layer were produced, followed by the evaporation of the latter during an annealing phase. The vacuum chamber comprises shuttered inlets for the controlled introduction of Cu, Zn, Sn and Se. The shutters can be closed or opened. If closed, the flux of elements is blocked and the flux onto the surface is zero. On opening a shutter, the flux is high. The flux can be tuned by tuning the temperature of the effusion cells. In a first phase I, the laser light reflects on the bare Mo coated glass. During phase II, Cu, Zn, Sn and Se are grown at about 320 °C. The amplitude of the LLS signal increases as the roughness of the surface increases. During phase III, all shutters for the introduction of Cu, Zn, Sn and Se into the chamber are closed, and the film is cooled down. During phase IV, the covering layer is grown as Sn and Se are introduced at a low temperature. The changes in the LLS signal are due to thickness changes. In phase V an SnSe source is opened. Phase VI corresponds to the annealing step. The heating is performed with a ramp of 50°C per minutes. The LLS signal increases due to an increase of surface roughness. In phase VII, a sharp drop of the LLS signal is observed. This corresponds to the disappearance of the covering layer, which has evaporated in the preceding annealing phase.
In phase VIII all shutters are closed and the chamber is cooled down, before the process ends in phase IX. The resulting annealed semiconductor thin film is etched with HCI during 10 minutes in order to remove all remaining SnSex phases.
Figure imgf000015_0001
Table II: solar cell parameters
A solar cell is built using the resulting semiconductor thin film, as described for the previously outlined embodiment. The corresponding solar cell results are shown in Fig 1 1 on a linear scale, and solar cell parameters are given in Table II.
According to the present invention, a method for manufacturing a (AgxCui_x)2ZnZ(SySei_y)4 thin film, wherein Z is selected from Sn, Ge, Si, Pb, is provided. The production method inhibits the decomposition of the (AgxCui_x)2ZnZ(SySei_y)4 precursor film during annealing. Using the resulting semiconductor thin film, a solar cell with efficiency exceeding 5% can be produced. Moreover, the resulting solar cells show a low series resistance.
No doubt many other effective alternatives will occur to the skilled person. It will be understood that the invention is not limited to the embodiments described herein and encompasses modifications apparent to those skilled in the art lying within the spirit and scope of the claims appended hereto.
References
[1 ] Todorov, T. K., Reuter, K. B. & Mitzi, D. B. High-Efficiency Solar Cell with Earth- Abundant Liquid-Processed Absorber Adv. Mater. 22, 1-4 (2010).
[2] Friedlmeier, T., Wieser, N., Walter, T., Dittrich, H. & Schock, H. Heterojunctions based on Cu2ZnSnS4 and Cu2ZnSnSe4 thin films Proceedings of the 14th European Photovotlaic Specialists Conference, Barcelona, 1242-1245 (1997).
[3] Ahn, S. et al. Determination of band gap energy (Eg) of Cu2ZnSnSe4 thin films: On the discrepancies of reported band gap values Appl. Phys. Lett. 97, 021905 (2010).
[4] Weber, A., Mainz, R. & Schock, H. W. On the Sn loss from thin films of the material system Cu-Zn-Sn-S in high vacuum J. Appl. Phys. 107, 013516 (2010).
[5] Redinger, A. & Siebentritt, S. Coevaporation of Cu2ZnSnSe4 thin films Appl. Phys. Lett. 97, 0921 1 1 (2010).
[6] Lewis, N. Toward Cost-Effective Solar Energy Use Science 315, 798 (2007).
[7] Wang, K. et al. Thermally evaporated Cu2ZnSnS4 solar cells Appl. Phys. Lett. 97, 143508 (2010).
[8] Schubert, B.-A. et al. Cu2ZnSnS4 thin film solar cells by fast coevaporation Prog. Photovolt: Res. Appl. (2010).
[9] Katagiri, H. et al. Enhanced Conversion Efficiencies of Cu2ZnSnS4-Based Thin Film Solar Cells by Using Preferential Etching Technique Applied Physics Express 1 , 041201 (2008).
[10] Probst, V. et al. New developments in Cu(ln,Ga)(S,Se)2 thin film modules formed by rapid thermal processing of stacked elemental layers Solar Energy Materials and Solar Cells 90, 31 15-3123 (2006).
[1 1 ] Piacente, V., Foglia, S. & Scardala, P. Sublimation study of the tin sulphides SnS2, Sn2S3 and SnS Journal of Alloys and Compounds 177, 17 (1991 ).
[12] Zocchi F, & Piacente V. Sublimation enthalpy of tin monoselenide J. Mater. Sci. Lett. 14, 235 (1995).
[13] Aaron et al., Prog. Photovolt. Res. Appl., 201 1 . DOI: 10.1002/pip.1 160.
[14] A. Redinger, D. M. Berg, P. J. Dale and S. Siebentritt, J. Am. Chem.
Soc, 133 (10), 3320-3323 (201 1 )

Claims

A method for manufacturing a (AgxCui_x)2ZnZ(SySei_y)4 thin film, wherein 0 < x,y < 1 , and wherein Z is selected from Sn, Ge, Si, Pb, the method comprising providing a thin film (20) comprising Ag and/or Cu, the thin film further comprising Zn and Z, the thin film further comprising S and/or Se (100);
providing a layer (30) comprising Z on a free surface (21 ) of said thin film (20), the layer further comprising S and/or Se (200);
annealing the thin film (20) together with said layer (30), (300);
wherein said layer (30) covers at least a part of said thin film surface (21 ), and wherein said layer (30) is a layer of Z(S/Se)n, 1 < n < 2.
The method according to claim 1 , wherein the thin film (20) and/or the layer (30) are produced at a temperature which is lower than the annealing temperature.
The method according to any of the previous claims, wherein said layer integrally covers said thin film surface.
The method according to any of the preceding claims, wherein said layer (30) has a substantially uniform thickness (31 ).
The method according to any of the preceding claims, wherein the method further comprises the step of etching said annealed thin film (400).
6. The method in accordance with any one of the previous claims, wherein the step of annealing (300) further comprises enclosing the thin film (20) and covering layer (30) in an inert enclosure (40).
7. The method in accordance with claim 6, wherein at least one opening is provided in the enclosure, through which S and/or Se is supplied.
8. The method in accordance any one of the preceding claims, wherein the thin film (20) is provided on a substrate (10).
The method in accordance with claim 8, wherein the substrate
(10) is molybdenum.
The method in accordance with any one of the preceding claims, wherein the thin film (20) comprises at least one layer (22) comprising Zn.
1 1 . The method in accordance with any one of the preceding claims, wherein the thin film (20) comprises at least one layer (23) comprising Ag and/or Cu.
12. The method in accordance with any one of the preceding claims, wherein the thin film (20) comprises at least one layer (24) comprising S and/or Se.
13. The method in accordance with any one of the preceding claims, wherein the thin film (20) comprises at least one layer (25) comprising Z.
A semiconductor thin film produced using the method according to any of the preceding claims.
A device comprising a semiconductor thin film produced using the method according to any of claims 1 to 13.
A device according to claim 15 wherein said device is a photovoltaic cell.
17. The device according to claim 16, wherein the photovoltaic cell has an efficiency of at least 5%.
PCT/EP2013/058534 2012-04-26 2013-04-24 Method for manufacturing a semiconductor thin film WO2013160369A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
LU91986 2012-04-26
LU91986A LU91986B1 (en) 2012-04-26 2012-04-26 Method for manufacturing a semiconductor thin film

Publications (1)

Publication Number Publication Date
WO2013160369A1 true WO2013160369A1 (en) 2013-10-31

Family

ID=48236913

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/EP2013/058534 WO2013160369A1 (en) 2012-04-26 2013-04-24 Method for manufacturing a semiconductor thin film

Country Status (2)

Country Link
LU (1) LU91986B1 (en)
WO (1) WO2013160369A1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2993701A1 (en) * 2014-09-04 2016-03-09 IMEC vzw Method for forming thin film chalcogenide layers
CN113278948A (en) * 2021-04-16 2021-08-20 中国计量大学 Tin sulfide/tin disulfide heterojunction material and preparation method thereof

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010138636A2 (en) 2009-05-26 2010-12-02 Purdue Research Foundation Synthesis of multinary chalcogenide nanoparticles comprising cu, zn, sn, s, and se
US20110027940A1 (en) * 2009-07-30 2011-02-03 Oladeji Isaiah O Method for fabricating copper-containing ternary and quaternary chalcogenide thin films
US20120070936A1 (en) * 2010-09-20 2012-03-22 International Business Machines Corporation Annealing thin films

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010138636A2 (en) 2009-05-26 2010-12-02 Purdue Research Foundation Synthesis of multinary chalcogenide nanoparticles comprising cu, zn, sn, s, and se
US20110027940A1 (en) * 2009-07-30 2011-02-03 Oladeji Isaiah O Method for fabricating copper-containing ternary and quaternary chalcogenide thin films
US20120070936A1 (en) * 2010-09-20 2012-03-22 International Business Machines Corporation Annealing thin films

Non-Patent Citations (27)

* Cited by examiner, † Cited by third party
Title
A. REDINGER; D. M. BERG; P. J. DALE; S. SIEBENTRITT, J. AM. CHEM. SOC., vol. 133, no. 10, 2011, pages 3320 - 3323
AARON ET AL., PROG. PHOTOVOLT. RES. APPL., 2011
AHN, S. ET AL.: "Determination of band gap energy (Eg) of Cu2ZnSnSe4 thin films: On the discrepancies of reported band gap values", APPL. PHYS. LETT., vol. 97, 2010, pages 021905
ALEX REDINGER ET AL: "Route Toward High-Efficiency Single-Phase Cu $_{\bf 2}$ ZnSn(S,Se) $_{\bf 4}$ Thin-Film Solar Cells: Model Experiments and Literature Review", IEEE JOURNAL OF PHOTOVOLTAICS, I E E E, US, vol. 1, no. 2, 14 October 2011 (2011-10-14), pages 200 - 206, XP011390836, ISSN: 2156-3381, DOI: 10.1109/JPHOTOV.2011.2168811 *
ARAKI ET AL., THIN SOLID FILMS, vol. 517, 2008, pages 1457 - 1460
FRIEDLMEIER ET AL., 14TH EUROPEAN PHOTOVOLTAIC SOLAR CELL CONFERENCE BARCELONA, 1997
FRIEDLMEIER, T.; WIESER, N.; WALTER, T.; DITTRICH, H.; SCHOCK, H.: "Heterojunctions based on Cu2ZnSnS4 and Cu2ZnSnSe4 thin films", PROCEEDINGS OF THE 14TH EUROPEAN PHOTOVOTLAIC SPECIALISTS CONFERENCE, 1997, pages 1242 - 1245, XP001136286
KATAGIRI ET AL., APPLIED PHYSICS EXPRESS, vol. 1, 2008, pages 041201
KATAGIRI ET AL., SOLAR ENERGY MATERIALS AND SOLAR CELLS, vol. 49, 1997, pages 407 - 414
KATAGIRI, H. ET AL.: "Enhanced Conversion Efficiencies of Cu2ZnSnS4-Based Thin Film Solar Cells by Using Preferential Etching Technique", APPLIED PHYSICS EXPRESS, vol. 1, 2008, pages 041201
LEWIS, N. TOWARD: "Cost-Effective Solar Energy Use", SCIENCE, vol. 315, 2007, pages 798, XP055226891
PIACENTE, V.; FOGLIA, S.; SCARDALA, P.: "Sublimation study of the tin sulphides SnS2, Sn2S3 and SnS", JOURNAL OF ALLOYS AND COMPOUNDS, vol. 177, 1991, pages 17, XP024176019, DOI: doi:10.1016/0925-8388(91)90053-X
PROBST, V. ET AL.: "New developments in Cu(In,Ga)(S,Se)2 thin film modules formed by rapid thermal processing of stacked elemental layers", SOLAR ENERGY MATERIALS AND SOLAR CELLS, vol. 90, 2006, pages 3115 - 3123, XP028002285, DOI: doi:10.1016/j.solmat.2006.06.031
REDINGER ET AL., APPLIED PHYSICS LETTERS, vol. 97, 2010, pages 092111
REDINGER ET AL.: "Route Towards High Efficiency Single-Phase Cu2ZnSn(S, SE)4 Thin-Film Solar Cells: Model Experiments and Literature Review", IEE JOURNAL OF PHOTOVOLTAICS, vol. 1, no. 2, pages 200 - 206
REDINGER, A.; SIEBENTRITT, S.: "Coevaporation of Cu2ZnSnSe4 thin films", APPL. PHYS. LETT., vol. 97, 2010, pages 092111
SCHUBERT, B.-A. ET AL.: "Cu2ZnSnS4 thin film solar cells by fast coevaporation", PROG. PHOTOVOLT: RES. APPL., 2010
SCRAGG ET AL., JOURNAL OF ELECTROANALYTICAL CHEMISTRY, vol. 646, 2010, pages 52 - 59
SCRAGG ET AL., THIN SOLID FILMS, vol. 517, 2009, pages 2481 - 2484
SCRAGG, PHD THESIS, 2010
TODOROV, T. K.; REUTER, K. B.; MITZI, D. B.: "High-Efficiency Solar Cell with Earth-Abundant Liquid-Processed Absorber", ADV. MATER., vol. 22, 2010, pages 1 - 4
WANG, K. ET AL.: "Thermally evaporated Cu2ZnSnS4 solar cells", APPL. PHYS. LETT., vol. 97, 2010, pages 143508, XP012137203, DOI: doi:10.1063/1.3499284
WEBER ET AL., JOURNAL OF APPLIED PHYSICS, vol. 107, 2010, pages 013516
WEBER ET AL., THIN SOLID FILMS, vol. 517, 2009, pages 2524 - 2526
WEBER, A.; MAINZ, R.; SCHOCK, H. W.: "On the Sn loss from thin films of the material system Cu-Zn-Sn-S in high vacuum", J. APPL. PHYS., vol. 107, 2010, pages 013516
WEBER, PHD THESIS, 2009
ZOCCHI F; PIACENTE V: "Sublimation enthalpy of tin monoselenide", J. MATER. SCI. LETT., vol. 14, 1995, pages 235

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2993701A1 (en) * 2014-09-04 2016-03-09 IMEC vzw Method for forming thin film chalcogenide layers
US9647153B2 (en) 2014-09-04 2017-05-09 Imec Vzw Method for forming thin film chalcogenide layers
CN113278948A (en) * 2021-04-16 2021-08-20 中国计量大学 Tin sulfide/tin disulfide heterojunction material and preparation method thereof

Also Published As

Publication number Publication date
LU91986B1 (en) 2013-10-28

Similar Documents

Publication Publication Date Title
Cazzaniga et al. Ultra-thin Cu2ZnSnS4 solar cell by pulsed laser deposition
Son et al. Effect of solid-H 2 S gas reactions on CZTSSe thin film growth and photovoltaic properties of a 12.62% efficiency device
Tao et al. Co-electrodeposited Cu 2 ZnSnS 4 thin-film solar cells with over 7% efficiency fabricated via fine-tuning of the Zn content in absorber layers
Yang et al. A band-gap-graded CZTSSe solar cell with 12.3% efficiency
López-Marino et al. Inhibiting the absorber/Mo-back contact decomposition reaction in Cu 2 ZnSnSe 4 solar cells: the role of a ZnO intermediate nanolayer
Giraldo et al. Cu2ZnSnSe4 solar cells with 10.6% efficiency through innovative absorber engineering with Ge superficial nanolayer
Moholkar et al. Studies of compositional dependent CZTS thin film solar cells by pulsed laser deposition technique: An attempt to improve the efficiency
Ilari et al. Cu2ZnSnSe4 solar cell absorbers spin-coated from amine-containing ether solutions
Romeo et al. Low substrate temperature CdTe solar cells: A review
Sousa et al. Effect of rapid thermal processing conditions on the properties of Cu2ZnSnS4 thin films and solar cell performance
Vauche et al. 8.2% pure selenide kesterite thin‐film solar cells from large‐area electrodeposited precursors
Yang et al. Effects of the compositional ratio distribution with sulfurization temperatures in the absorber layer on the defect and surface electrical characteristics of Cu2ZnSnS4 solar cells
Fairbrother et al. Single‐Step Sulfo‐Selenization Method to Synthesize Cu2ZnSn (SySe1− y) 4 Absorbers from Metallic Stack Precursors
Olgar et al. Cu2ZnSnS4-based thin films and solar cells by rapid thermal annealing processing
Rampino et al. CuSbSe2 thin film solar cells with~ 4% conversion efficiency grown by low-temperature pulsed electron deposition
Yin et al. Sequential coevaporation and deposition of antimony selenosulfide thin film for efficient solar cells
Feng et al. A low-temperature formation path toward highly efficient Se-free Cu 2 ZnSnS 4 solar cells fabricated through sputtering and sulfurization
EP1255305A2 (en) Method of producing Cu (In, Ga) (Se,S)2 semiconductor film
Zhang et al. An 8.7% efficiency co-electrodeposited Cu 2 ZnSnS 4 photovoltaic device fabricated via a pressurized post-sulfurization process
Jung et al. Cu2ZnSnSe4 thin film solar cells based on a single-step co-evaporation process
Shin et al. Phase segregations and thickness of the Mo (S, Se) 2 layer in Cu2ZnSn (S, Se) 4 solar cells at different sulfurization temperatures
JP2014505993A (en) Method for manufacturing a semiconductor thin film
Gansukh et al. Oxide route for production of Cu2ZnSnS4 solar cells by pulsed laser deposition
Hwang et al. Effects of a pre-annealing treatment (PAT) on Cu2ZnSn (S, Se) 4 thin films prepared by rapid thermal processing (RTP) selenization
Pawar et al. Fabrication of Cu2ZnSn (SxSe1− x) 4 thin film solar cell by single step sulfo-selenization of stacked metallic precursors

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 13719802

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 13719802

Country of ref document: EP

Kind code of ref document: A1