WO2013151675A1 - Dispositifs en couche mince non volatils à commutation de résistance - Google Patents

Dispositifs en couche mince non volatils à commutation de résistance Download PDF

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Publication number
WO2013151675A1
WO2013151675A1 PCT/US2013/030178 US2013030178W WO2013151675A1 WO 2013151675 A1 WO2013151675 A1 WO 2013151675A1 US 2013030178 W US2013030178 W US 2013030178W WO 2013151675 A1 WO2013151675 A1 WO 2013151675A1
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Prior art keywords
amorphous layer
percent
resistive device
electrodes
composition
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PCT/US2013/030178
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English (en)
Inventor
I-Wei Chen
Xiang YANG
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The Trustees Of The University Of Pennsylvania
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Publication of WO2013151675A1 publication Critical patent/WO2013151675A1/fr
Priority to US14/506,177 priority Critical patent/US9425393B2/en
Priority to US15/181,761 priority patent/US9905760B2/en

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5685—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using storage elements comprising metal oxide memory material, e.g. perovskites
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0007—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements comprising metal oxide memory material, e.g. perovskites
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20—Multistable switching devices, e.g. memristors
    • H10N70/25—Multistable switching devices, e.g. memristors based on bulk electronic defects, e.g. trapping of electrons
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/821—Device geometry
    • H10N70/823—Device geometry adapted for essentially horizontal current flow, e.g. bridge type devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/821—Device geometry
    • H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00—Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801—Constructional details of multistable switching devices
    • H10N70/881—Switching materials
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2213/00—Indexing scheme relating to G11C13/00 for features not covered by this group
    • G11C2213/10—Resistive cells; Technology aspects
    • G11C2213/15—Current-voltage curve

Definitions

  • Resistance-switching behavior is well known in the art and has been observed and studied in some metal-insulator mixtures since the mid 1970's.
  • Reversible resistance- switching devices are currently one of the main contenders for replacing flash memory devices in future non-volatile memory applications.
  • Such future non-volatile memory devices need to be increasingly scalable (to length scales lower than about 22 nanometer (“nm”)), at low energy operation and fabrication cost, and exhibit complementary metal-oxide-semiconductor
  • CMOS complementary metal-oxide-semiconductor
  • EPIR semiconductor devices are disclosed in U.S. Pat. No. 3,886,577 (Buckley).
  • a sufficiently high first voltage (50V) is generally applied to a semiconductor thin film in which an approximately 10 micron portion, or filament, of the film is set to a low resistivity state.
  • the device is then typically reset to a high resistance state by the action of a second high voltage pulse.
  • the number of switching cycles performed strongly affects set voltage.
  • these devices generally exhibit high power consumption and poor cycle fatigue performance.
  • Metal oxides and other perovskite like materials have also been proposed for resistive switching memory devices. These metal oxide devices, however, suffer from incompatibility with silicon based semiconductor industry, and may also suffer from a lack of scalability.
  • CMOS devices indicating a particular need for aluminum-based and silicon-based nanoscale non-volatile resistance-switching devices.
  • passive devices including resistors and conductors using these same CMOS compatible compositions.
  • resistive devices comprise at least one amorphous layer comprising a composition of an electrically conducting composition and an electrically insulating aluminum-containing or silicon-containing composition.
  • the electrically conducting composition of the amorphous layer comprises from about 1% to 40% by molar percentage of the amorphous layer and at least two electrodes in contact with the amorphous layer.
  • circuits comprise a plurality of resistive devices, each of which comprises at least one amorphous layer, the amorphous layer comprising a composition of an electrically conducting composition and an electrically insulating aluminum-containing or silicon-containing composition.
  • the electrically conducting composition of the amorphous layer comprises from about 1% to 40% by molar percentage of the amorphous layer and at least two electrodes in contact with the amorphous layer.
  • compositions of matter comprise an amorphous composition of an electrically conducting composition and an electrically insulating aluminum- containing or silicon-containing composition.
  • the electrically conducting composition of the amorphous layer comprises from about 1% to 40% by molar percentage of the amorphous layer and at least two electrodes in electrical contact with the amorphous layer.
  • the electrically conducting composition can comprise one or more of Pt, Pd, Ni, W, Au, Ag, Cu, Al, Rh, Re, Ir, Os, Ru, Nb, Ti, Zr, Hf, V, Ta, Cr, Mo, Mn, Tc Fe, Co, Zn, Ga, In, Cd, Hg, Tl, Sn, Pb, Sb, Bi, Be, Mg, Ca, Sr, Ba, Li, Na, K, Rb, Cs, a conducting metal (Me) nitride, MeN x , a conducting metal (Me) silicide, MeSi x , or any combination thereof, wherein x is in the range of from about 0.5 to about 3.
  • memory devices comprise at least one amorphous layer, the amorphous layer comprising a composition of an electrically conducting composition, and an electrically insulating aluminum-containing or silicon-containing composition.
  • the electrically conducting composition of the amorphous layer comprises from about 1% to about 40% by molar percentage of the amorphous layer, and at least two electrodes in electrical contact with the amorphous layer.
  • methods for switching a resistive device comprise providing at least one amorphous layer, the amorphous layer comprising a composition of an electrically conducting composition, and an electrically insulating aluminum-containing or silicon-containing composition.
  • the electrically conducting composition of the amorphous layer comprises from about 1% to about 40% by molar percentage of the amorphous layer, and at least two electrodes in electrical contact with the amorphous layer, and providing a set voltage or current to the amorphous layer.
  • Aluminum-containing and silicon-containing non-volatile resistive switching devices present a class of materials capable of operation as stable, non- volatile resistance switches in the nanoscale range that may be used in various non-volatile memory applications such as a switch or a logic device.
  • the general structure of the device is a layered thin film set between at least two electrodes and capable of switching between two resistance states, one state having a relatively larger resistance compared to a second state.
  • an electrically conducting electrode may be deposited on a silicon substrate.
  • a thin film of an insulating aluminum-containing or silicon-containing material and a conducting material can be co-deposited on the electrode to create an amorphous resistance-switching layer, such that the conducting constituent is lower than the (bulk) percolation limit.
  • the concentration of the conducting layer should be sufficiently high, however, such that below certain thicknesses, the film is conducting along the thickness direction due to the existence of short conducting paths.
  • a second electrode is deposited on top of the substrate to create a two terminal resistance-switching device. These electrodes may deliver a current or voltage to the amorphous resistance-switching layer.
  • electrodes may deliver a voltage, which may be known as the set voltage to the amorphous resistance-switching layer, which switches the device from a first resistance state to a second resistance state.
  • the device may stay in the second resistance state until the application of a negative set voltage, which switches the device from the second resistance state back to the first resistance state.
  • the device may stay in the first resistance state until another application of the set voltage.
  • the electrodes may also deliver a voltage to the device, which voltage's absolute value is smaller than the absolute value of the set voltages. This smaller voltage may be used to read the resistance state of the amorphous resistance-switching layer without altering the resistance state of the device. This voltage may be known as the read voltage.
  • resistive switching may be non-volatile and thus may not require the continuous application of either voltage or current to maintain resistance states.
  • the device may be capable of switching between a low and high resistance state repeatedly without a loss of switching time or stability.
  • the present disclosure provides, inter alia, methods for fabricating incorporating a metal in a minute amount into a film that includes an insulating material.
  • Dielectrics including high dielectric constant (high-K) ones, such as HfO x , are useful in such applications because these materials may prevent current leakage.
  • high-K dielectric constant (high-K) ones such as HfO x
  • the present disclosure provides the use of amorphous dielectrics (e.g., high K dielectrics) for non-volatile resistance memory applications.
  • This disclosure describes how insulating amorphous thin films used as nonvolatile memory after addition of conducting compositions. Further information is found in, e.g., United States application 13/060,514, "Non-Volatile Resistance-Switching Thin Film Devices (filed July 8, 2011), which application is incorporated herein by reference in its entirety for all purposes.
  • the present disclosure presents the utility of a variety of amorphous insulators, e.g., (a) yttrium oxide, hafnium oxide and tantalum oxide, which cover transition metal oxides and rare earth oxides, and (b) magnesium oxide, aluminum oxide and aluminum nitride, which cover main group II and main group III metal oxides and nitrides.
  • the present disclosure provides resistive devices that comprise at least one amorphous resistance-switching layers that comprises (a) an electrically insulating composition; and (b) an electrically conducting composition, wherein from about 1 percent to about 40 percent by molar percentage of the amorphous resistance-switching layer comprises the electrically conducting composition; and at least two electrodes capable of electrical contact with the amorphous resistance-switching layer.
  • the present disclosure also provides memory devices that include a resistive switching device according to the present disclosure.
  • Also provided are methods comprising disposing, on a substrate, at least one or more amorphous resistance-switching layers according to the present disclosure.
  • FIG. 1 depicts an embodiment of a resistive switching device according to certain embodiments of the present disclosure.
  • FIG. 2 depicts an embodiment of a resistive switching device according to certain embodiments of the present disclosure.
  • FIG. 3 depicts a change in a conducting path of one embodiment of the present disclosure when the substrate evolves from a state of high resistance-switching to a state of low resistance-switching.
  • FIG. 4 shows the typical I-V and R-V curves of one embodiment of the present invention using an amorphous A10 3 /2-Pt, with the combination of Mo and Pt electrodes.
  • FIG. 5 depicts 30 consecutive R-V curves of one embodiment of the present disclosure using A10 3 Q-Pt, with the combination of Mo and Pt electrodes.
  • FIGS. 6(a)-(d) depicts the energy dispersive X-ray spectroscopy (XPS) of AIO 3 /2, and various concentrations of Pt for A10 3 Q-Pt.
  • XPS energy dispersive X-ray spectroscopy
  • FIG. 8(a)-(d) depict example I-V and R-V curves with various bottom electrodes, Ta, Cu and TiN, in combination with Pt top electrode.
  • FIGS. 9(a)-(b) depict an example of a UV reset of the resistance state.
  • FIG. 10 depicts the thickness-Cr composition map of amorphous SiN 4 /3-Cr layer, which may be a conductor (C), an insulator (I), or a switchable resistor (S).
  • C conductor
  • I insulator
  • S switchable resistor
  • FIG. 1 1 depicts the energy dispersive X-ray spectroscopy (XPS) of SiN 4 /3, and various concentrations of Cr for SiN 4 /3-Cr.
  • XPS energy dispersive X-ray spectroscopy
  • FIG. 12 shows exemplary I-V and R-V curves of one embodiment of the present invention using Hf0 2 -Pt, with the combination of Mo and Pt electrodes.
  • FIG. 13 shows exemplary I-V and R-V curves of one embodiment of the present invention using Y0 3/2 -Pt, with the combination of Mo and Pt electrodes.
  • FIG. 14 shows exemplary I-V and R-V curves of one embodiment of the present invention using MgO-Pt, with the combination of Mo and Pt electrodes.
  • FIG. 15 shows exemplary I-V and R-V curves of one embodiment of the present invention using TaOs /2 -Pt, with the combination of Mo and Pt electrodes.
  • FIG. 16 shows exemplary I-V and R-V curves of one embodiment of the present invention using ⁇ -Pt, with the combination of Mo and Pt electrodes.
  • FIG. 17 shows exemplary I-V and R-V curves of one embodiment of the present invention using AI0 3/2 -Pt, with the combination of Mo and Pt electrodes.
  • FIG. 18 shows 50 consecutive R-V curves of one embodiment of the present invention using HfC -Pt, with the combination of Mo and Pt electrodes.
  • FIG. 19(a) shows multiple resistance states (0 to 5) achieved by varying voltage using Hf0 2 -Pt and FIG. 19(b) shows each state is stable and non-volatile for data storage.
  • FIG. 20 shows a cycling test with 10 ⁇ $ pulses ( + 7 V, -6 V). Resistance check was made using 0.2 V read voltage. No noticeable degradation after 4x 10 5 cycles.
  • FIG. 21 depicts exemplary thickness-metal composition combinations for a switching device using an amorphous MgO-Pt mixture layer.
  • FIG. 22 depicts the energy dispersive X-ray spectroscopy (EDX) of each layer in a device stack of Mo/MgO-PVPt.
  • FIG. 23 depicts the energy dispersive X-ray spectroscopy (EDX) of pure MgO, MgO-Pt of two compositions, and pure Pt films.
  • EDX energy dispersive X-ray spectroscopy
  • Resistive switching may comprise a composition of matter, a device, a circuit, a system, or any combination thereof capable of switching a resistance state (hereinafter generally referred to interchangeably as “resistance-switching” and “resistance-switching device”).
  • resistive switching devices may comprise means for resistance-switching.
  • An electrically insulating aluminum-containing or silicon-containing layer and a conducting layer may be configured as an amorphous layer, which may be capable of resistance-switching.
  • resistance-switching may comprise switching from a first state of resistance to a second state of resistance.
  • resistance-switching may comprise switching from a first state in a set of states to a second state in a set of states.
  • the set of states may comprise a plurality of states and resistance-switching may be configured to apply one or more of a set voltage, set current, read voltage and/or read current to the resistance switched device.
  • resistance-switching may comprise any number of states and switching between the any number of states.
  • a set voltage or current may comprise a voltage or current that when applied to a resistive switching device causes a resistance-switching device to switch from a first resistive state to a second resistive state.
  • Resistance-switching devices may comprise one or more set voltages and/or set currents. As such, a resistance-switching device may be put into any number of states by any number of set voltages.
  • resistance-switching devices may comprise means for a set voltage and/or means for a set current. Resistance- switching may also comprise a means for applying a set voltage or a set current.
  • a read voltage or current may comprise a voltage or current that when applied to a resistive switching device does not cause a change in the resistive state of the device; however, it may be configured to determine the resistive switching state, which, as noted above may be a first state, a second state, or any state in a set of states.
  • Resistance- switching devices may be read by any number of read voltages and/or currents.
  • the embodiments described herein may comprise means for applying a set voltage or current.
  • resistance-switching may comprise one or more electrodes.
  • Electrodes may comprise one or more conducting materials electrically contacted with the resistance-switching material.
  • electrodes may be comprised of a conducting material, a semiconducting material, or any combination thereof.
  • conducting materials include all noble metals, all transition metals, all main group metals, all rare earth metals, all conduction transition metal nitrides and carbides, all conducting metal silicides, all p-type or n-type doped silicon and other semiconductors, all conducting oxides including those that are transparent to visible light, all organic conducting materials, any other conducting materials and any combinations thereof.
  • electrodes may comprise one or more of Pt, Pd, Ni, W, Au, Ag, Cu, Al, Rh, Re, Ir, Os, Ru, Nb, Ti, Zr, Hf, V, Ta, Cr, Mo, Mn, Tc, Fe, Co, Zn, Ga, In, Cd, Hg, Tl, Sn, Pb, Sb, Bi, Be, Mg, Ca, Sr, Ba, Li, Na, K, Rb, Cs.
  • Nitrides MeN x include TiN, ZrN, Hf N, NbN or TaN.
  • Silicide s MeSi x include PtSi2, TiSi2, C0S12, NiSi 2 , NbSi2, TaSi2, M0S12 or WS12, and x is in the range of from about 0.5 to about 3, and/or any combination thereof.
  • a resistance-switching device may comprise a plurality of electrodes, which may be capable of or configured to apply a read voltage, a read current, a set voltage and/or a set current to a resistance-switching device.
  • an "amorphous resistance-switching layer” comprises one or more amorphous layers of insulating aluminum containing material and electrically conducting material; the electrically conducting composition comprising from about 1 percent to about 40 percent by molar percentage of the material or from about 1.5 percent to about 35 percent by molar percentage of the material, or from about 2 percent to about 30 percent by molar percentage of the material, or even from about 3 percent to about 25 percent by molar percentage of the material and, in electrical contact with the amorphous layer, at least two electrodes, the one or more amorphous layers adding to a combined thickness of between about 1 nm and about 60 nm, or from about 2 nm to about 50 nm, or from about 3 nm to about 45 nm, or from about 4 nm to about 35 nm or even from about 5 nm to about 30 nm as measured between one or more pairs of electrodes.
  • the amorphous layer is capable of switching between at least two resistive states, a first
  • %a refers to percent a, and a can be M, Me, Al.
  • x is in the range of from about 0.5 to about 3
  • y is in the range of about 0.5 to about 3
  • w is in the range of from about 0 to about 1.5
  • z is in the range of from about 0 to about 1.
  • Fig. 1 illustrates an example geometry of a layered two terminal resistance- switching device, wherein an amorphous resistance-switching layer 11 is deposited between two electrodes 10, 13.
  • the amorphous layer 11 may be switched between two different resistance states. These resistance states are set by applying a current or voltage via the electrodes 10 and 13.
  • the current or voltage used for setting the resistance state may be the "set current” or "set voltage” of the device.
  • the resistance of the amorphous layer is read by the application of a current or voltage that is lower than the set current or voltage. This lower current or voltage may be a "read current” or a "read voltage".
  • the read current or read voltage may not affect the resistance state of the device, but may be configured to determine the present resistive state of the switching device.
  • the resistive switching device may comprise means for applying a set voltage and/or a set current to a resistive switching layer.
  • the resistive switching device may comprise means for applying a read voltage and/or a read current to the amorphous layer.
  • Fig. 2 illustrates another possible geometry of a two terminal resistance- switching device, wherein an amorphous resistance-switching layer 21 is deposited on a silicon substrate 23 between two electrodes 20, 22 that are also deposited on the substrate 23.
  • the amorphous layer 21 may be switched between two different resistance states. These resistance states may be set by applying a set current or voltage via the electrodes 20 and 22.
  • the resistance of the amorphous layer is read by the application of a read current or voltage via electrodes 20 and 22, where the absolute value of the read current is lower than the set current or voltage.
  • the read current or voltage may not affect the resistance state of the device.
  • the geometries depicted in Figs. 1 and 2 do not limit the possible geometries for these devices but merely provide useful examples of possible geometries.
  • the geometry of the switching layer as used herein may be a rectangle, square, ribbon, tube, rod, cylinder, hemisphere, dot, sphere, trapezoid or any other shape compatible with the one or more layers set between at least one pair of electrodes.
  • the geometry of the electrodes includes any shape that is compatible with electrically contacting the resistance- switching layer. These electrodes may be circular, rectangular, cylindrical, square, straight, curved, hemispheric or any other suitable geometry.
  • Figs. 3(a)-(b) depict an embodiment of an amorphous resistance-switching device where the conduction path between two electrodes 702 changes.
  • the layer 701 may evolve from a state of high resistance-switching to a state of low resistance-switching causing a change in the conduction path of the device.
  • an amorphous layer comprised of one or more conductive materials and insulating aluminum-containing or silicon-containing materials is described herein.
  • a certain embodiment of the present invention utilizes co-sputtering techniques to obtain the amorphous layer of an insulating aluminum-containing or silicon-containing material and one or more conducting materials.
  • Other suitable techniques for preparing amorphous layers include, without limitation, direct-current sputtering, radio-frequency sputtering, pulsed laser deposition, physical vapor deposition, atomic layer deposition, chemical vapor deposition, ion-assisted deposition, wet chemistry, co-evaporation techniques and any other method, present or future for constructing an amorphous resistance-switching layer.
  • the conducting composition may also be deposited into an amorphous layer by ion implantation or any other method of introduction.
  • Fig. 4 depicts the typical I-V and R-V curves of one embodiment of the present invention using an amorphous A10 3 /2-Pt, with the combination of Mo and Pt electrodes.
  • a typical room temperature I-V curve is shown in Fig. 4 for a voltage sweep of 0 V to - 5 V to 0 V to 5 V to 0 V to - 5 V to 0 V.
  • the mixture shows a low initial resistance ⁇ 300 ⁇ and this low resistance state is stable under a negative bias. Under a positive bias, it is still stable below 4.5 V, but the resistance suddenly increases to a larger value around approximately 400 ⁇ when the bias exceeded 4.5 V.
  • the high resistance state is kept until a negative bias of from about -1 to - 1.5 V is applied, which switches the resistance back to the low resistance state.
  • Fig. 5 depicts 30 consecutive R-V curves of one embodiment of the present disclosure using A10 3 /2-Pt, with the combination of Mo and Pt electrodes.
  • aluminum-based resistance-switching devices may comprise repeatable resistance- switching behavior.
  • Figs. 6(a)-(d) depicts the energy dispersive X-ray spectroscopy (XPS) of AIO3/2, and various concentrations of Pt for A10 3 /2-Pt.
  • XPS energy dispersive X-ray spectroscopy
  • Fig. 8(a)-(d) depicts an example of I-V and R-V curves of yet another embodiment of the present invention using other bottom electrodes, Ta, Cu and TiN, in combination with Pt top electrode.
  • Figs. 9(a)-(b) depicts UV resets the resistance state. Since UV can stimulate electron movement but may not stimulate ion or atom movement, Fig. 9 illustrates that electron movement may be the only requirement in the resistance switching device of the present disclosure. In general, switching speed requiring only electron movement may be faster.
  • Fig. 10 depicts the thickness-Cr composition map of amorphous SiN 4 /3-Cr layer in an embodiment, which provides both a conductor and an insulator in addition to a switchable resistor using the same composition. Since only thickness adjustment is required, compositions of the present invention can provide resistive elements of vastly different electric properties.
  • Fig. 1 1 depicts the energy dispersive X-ray spectroscopy (XPS) of SiN 4 /3, and various concentrations of Cr for SiN 4 /3-Cr.
  • XPS energy dispersive X-ray spectroscopy
  • certain embodiments of the present invention may have at least one pair of electrodes situated as a top and bottom electrode.
  • Devices may also include a substrate, a first electrode layer disposed on the substrate, at least one amorphous resistance-switching layer as described herein disposed on the first electrode, and a second electrode layer disposed on the amorphous layer.
  • the first and second electrode layers may respectively serve as bottom and top electrodes.
  • at least one of the electrodes may also comprise a conductive material.
  • Electrodes may be grown or deposited in any manner known in the art present or future capable of disposing electrodes on thin films.
  • Resistance switches may also have at least one pair of electrodes configured in any other geometry suitable for electrically contacting the resistance-switching layer. It is desirable that the electrodes be selected based on the composition of the mixture layer.
  • the desired compositions of the mixture layers take into consideration the class of electrically insulating compositions (e.g., oxides, nitrides or oxynitrides), the class of electrically conducting compositions (e.g., metals, metal nitrides or metal silicides), the work function of the electrically conducting compositions, and the electron affinity of the electrically insulating compositions.
  • Suitable substrates may be any material that is compatible with the CMOS industry, such as silicon (Si).
  • the Si substrate may be doped as either an M-type or as a p-type Si.
  • Other substrates such as sapphire, glass, ceramics and polymers may also be used.
  • Devices may be particularly suited for random access memory and other memory applications.
  • simple two terminal resistance-switching devices may be produced to read and write binary information.
  • the application of a first set voltage would set the device to a first resistance state.
  • the application of a second set voltage would set the device to a second resistance state.
  • information may be written to the device upon application of a voltage having the appropriate magnitude and polarity.
  • the device may be read by applying a smaller read voltage to the device through the same electrodes.
  • a resistance- switching memory device may be non-volatile in its operation.
  • Circuits having one or more resistance-switching devices are also included in a sample embodiment.
  • Each resistance-switching device may have an amorphous layer as described above between two electrodes as described above.
  • Circuits having resistance- switching devices may also include, for example other circuit elements such as resistive devices, capacitive devices, field effect transistor devices, or any other electronic elements known in the art. Such circuits may be used for any purpose known in the art.
  • the electrons usually will need to overcome an energy barrier between the conducting paths and the trap sites.
  • the size of this energy barrier depends on the energy level difference between the conduction band of the aluminum-containing or silicon-containing insulator and the conductive material.
  • the switching voltage is dependent on the same barrier.
  • the set voltage should be positive, referring to the bias that causes electrons flowing from bottom to top, or electrical current from top to bottom.
  • the set voltage favors trapping when the electrons flow from the electrode with a lower energy barrier.
  • the set voltage is positive, switching the state of lower resistance to the state of higher resistance.
  • the work function of the bottom electrode is higher than that of the top electrode, the set voltage is negative.
  • the work function can depend on the electrode material and its state, which may be either crystalline or amorphous. It may also depend on the orientation of the electrode material when the material is crystalline. In addition, it may depend on the interface of the electrode material in contact with the amorphous layer. Therefore, it is possible to alter the sign of the set voltage by redesigning the electrodes and the interfaces.
  • the reset voltage should be lower than the set voltage because the trapped electron at the sites occupies a higher energy state due to localization, making it easier to tunnel back to the bottom electrode, requiring lower voltage.
  • the isolated paths with trapped electrons appear to work like a floating gate that regulates the conduction on the remaining metallic paths.
  • the trapped electrons are isolated from the electrodes by the insulating barrier which makes it difficult for them to leak out, thus providing the non-volatile character of the memory.
  • the trapped electrons are believed to raise the energy level of the site to the next available state.
  • the trapping event also increases the energy of the nearby conductive material sites due to the electrostatic interaction energy, acting as an isolated floating gate that prevents the electron from passing through the nearby region. This spreads out the originally aligned energy levels of the conductive material sites to a characteristic distribution width (W). If the aligned energy level width W is larger than the bandwidth B, the electron wave at each site becomes localized as in the case of Anderson localization in amorphous solids.
  • a resistance-switching memory device is described using thermal oxide coated singe crystal n-type or p-type silicon with 100 or 11 1 orientations as the substrate, polycrystalline Mo as the bottom electrode, Pt as the top electrode and Al 2 0 3 -Pt as the amorphous mixture layer.
  • the various materials listed above do not share a common structure, and indeed the electrodes and the amorphous mixture layers may be deposited on heated or unheated substrates.
  • test cell may have a diameter of about 100 microns.
  • the Pt top electrode may provide superior scratch resistance and may therefore be more convenient for electrical testing, however, other common electrodes may be used. Materials for common electrodes are referred to above in regard to common electrodes.
  • the bottom electrode of Mo was deposited by DC-sputtering. Film thickness, orientation and crystallinity were determined by a theta-2 theta diffractometer and a four circle x-ray diffractometer, both using a Cu Ka source. The surface morphology was observed by atomic force microscopy.
  • RF sputtering was used to deposit an amorphous Al 2 0 3 -Pt layer and the top electrode of Pt, the electrode being deposited through a shadow ask. Electrical properties were measured several ways. The amorphous layer was verified using a theta-2-theta diffractometer.
  • the example heterostructure thin film devices showed excellent resistance- switching between an initial low-resistance and a set high resistance, as shown by the current- voltage (I-V) and the resistance- voltage (R-V) curves in Fig. 4
  • the on-off ratio of the resistance in the test devices typically exceeds 100: 1.
  • the device was tested repeatedly and showed little change in memory of either high or low resistance, as evidenced by the 30 overlapping R-V loops shown in Fig. 5.
  • I-V current-voltage
  • R-V resistance-voltage
  • the I-V and R-V curves were recorded in the voltage-control mode and were the same for both continuous and the pulsed mode.
  • the resistance defined as the ratio of V/I is plotted along with a schematic circle indicating the rotational direction of the R-V hysteresis.
  • the mixture shows a low initial resistance 300 ⁇ and this low resistance state is stable under a negative bias. Under a positive bias, it is still stable below 4 V, but the resistance suddenly increases to a larger value, 400 ⁇ when the bias exceeded 4 V.
  • the high resistance state is highly non-linear with a resistance value that decreases with voltage: at 0 V, the high resistance state has a resistance value of 40,000 ⁇ in Fig. 4, which is 130 times that of the value of the low resistance state.
  • the high resistance state is kept at zero voltage indicating the memory is non-volatile: this zero-voltage resistance is typically higher than 20 kilo ohm.
  • the high resistance state is further kept until a negative bias of about -1.0 to -1.5 V is applied, which switches the resistance back to low resistance state.
  • the device also allowed a read voltage between -0.5 V and +1 V without disturbing the high and low resistance states.
  • switching was also determined using voltage pulses.
  • the voltage pulse required to switch the device was measured using repeated pulses of a certain pulse width, with the magnitude of their pulse voltage systematically increased until switching was complete. After each pulse, the resistance was measured at a fixed low voltage of about 0.2 V to determine whether switching had occurred or not. The process was next repeated using pulses of different widths.
  • the resistance states can be kept in a non- volatile manner as verified by certain retention experiments.
  • the devices stored in air for several months experience no memory lapse.
  • SiO x N y -Pt amorphous layer were deposited using RF sputtering.
  • Mo bottom electrode and Pt top electrode were deposited using DC sputtering.
  • the fabricated switching devices have similar I-V and R-V curves as shown in Fig. 7a-f.
  • bottom electrodes of Ta As an example of electrodes made of different metals and metal nitrides, bottom electrodes of Ta. Cu and TiN were used to fabricate amorphous silicon-based resistance- switching devices with similar I-V and R-V curves as shown in Figs. 8a-d.
  • Fig 8a also illustrates that the conducting composition in the amorphous layer and the bottom electrode can be the same, both made of Ta.
  • Fig. 8d illustrates that they can be both Cu.
  • UV irradiating a resistance-switching device may cause the device to reset from high resistance state to low resistance state, but not to set (Fig. 9b).
  • This device used a two-side-polished fused silica as substrate which is transparent to UV. Since UV irradiation generates only photoelectons but no electric voltage, it only stimulates electron movement but not ion or atom movement. Therefore, this example illustrated that resistance- switching in the present device requires only electron movement but not ion or atom movement. Not requiring the slower movement of ions or atoms, such device has an intrinsically faster switching rate.
  • Such switchable devices were fabricated using a broad range of M composition and mixture layer thickness.
  • One example is shown in Fig. 10 for devices made of amorphous SiN 4 /3-Cr mixture layer in which S stands for switchable devices.
  • S stands for switchable devices.
  • C stands for conducting device with always low resistance
  • I stands for insulating device with always high resistance. Both C and I devices do not show resistance-switching.
  • This example also illustrated that the same composition can be used to provide a conductor, a switchable resistor, and an insulator by adjusting the thickness of the amorphous layer.
  • Fig. 10 The composition shown in Fig. 10 was determined using energy dispersive X- ray spectroscopy of amorphous layers. To facilitate the measurement, the amorphous layers were deposited on carbon coated copper TEM grids. Examples of amorphous layers with different Cr compositions are shown in Fig. 1 1.
  • the amorphous insulating compositions may be based on aluminum-containing or silicon-containing oxides, nitrides and oxynitrides.
  • the electrodes may be made of a metal, e.g., Cu, or a metal nitride, e.g., TiN, and the conducting composition may be a transition metal, e.g., Cr, a main group metal, e.g., Al, and it can be made of the same composition as those of the electrodes.
  • the conducting composition may be a transition metal, e.g., Cr, a main group metal, e.g., Al, and it can be made of the same composition as those of the electrodes.
  • the present disclosure provides resistive devices.
  • the disclosed devices suitably include at least one amorphous resistance-switching layers that comprises an electrically insulating composition; and an electrically conducting composition, wherein from about 1 percent to about 40 percent by molar percentage of the amorphous resistance-switching layer comprises the electrically conducting composition; and at least two electrodes capable of electrical contact with the amorphous resistance-switching layer.
  • from about 0.5 percent to about 90 percent by molar percentage of the amorphous resistance-switching layer comprises the electrically conducting composition.
  • Embodiments in which from about 1 percent to about 40 percent or about 50 percent by molar percentage of the amorphous layer comprises the electrically conducting composition are considered especially suitable.
  • the amorphous resistance-switching layer may suitably have a thickness in the range of from about 1 nm to about 60 nm, to about 100 nm, to about 200 nm, or even about 500 nm, as well as all intermediate ranges.
  • the layer may be patterned into any shape that the user may desire, e.g., square, oval, rectangular, and the like.
  • a device includes one, two, three, four, or even more layers of amorphous material as described herein. In devices that feature multiple layers, there is no requirement that any two layers be identical to one another in terms of composition, shape, or characteristics. It should also be understood that a device may include two or more layers that are individually
  • addressable This may be accomplished by physically placing a layer into contact with an electrode (or physically disrupting electrical contact between a layer and an electrode. It may also be accomplished by addressing electrodes individually via a controller or other device.
  • Insulating compositions may include, e.g., an insulating oxide, an insulating nitride, an insulating oxynitride, or any combination thereof.
  • An insulating oxide suitably has the formula AO x .
  • X may have a value in the range from about 0.2 to about 4.50 or from about 0.4 to about 3.8.
  • A may suitably have a valence in the range of from +1 to +7, +8, or even +9.
  • a (of ⁇ ) may be a metal.
  • suitable metals includes, e.g., Be, Mg, Ca, Sr, Ba, Sc, Y, Ti, Zr, Hf, V, Nb, Ta, Cr, Mo, W, Mn, Tc, Re, Fe, Ru, Os, Co, Rh, Ir, Ni, Pd, Pt, Cu, Ag, Au, Zn, Cd, B, Al, Ga, In, Si, Ge, Sn, Pb, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb, Lu, or any combination thereof.
  • An insulating nitride may have a formula of AN X .
  • X may suitably have a value between 0.9 to 1.5;
  • A may have a valence of 3 to 4 in some embodiments.
  • A may be, e.g., B, Al, Ga, In, C, Si, Ge, Sn, or any combination thereof.
  • An insulating oxynitride may have the formula AO x N y .
  • A may be B, Al, Ga, In, C, Si, Ge, Sn, or any combination thereof.
  • X may have a value in the range of about 1.3 to about 2.2; y may have a value of between about 0.9 and about 1.5.
  • the conducting composition suitably includes a metal.
  • exemplary metals include, e.g., Pt, Pd, Ni, Au, Ag, Cu, Zn, Cd, Hg, Al, Ga, In, TI, Ge, Sn, Pb, Sb, Bi, Ir, Os, Re, W, Ta, Hf, La, Rh, Ru, Tc, Mo, Nb, Zr, Y, Co, Fe, Mn, Cr, V, Ti, Sc, Be, Mg, Ca, Sr, Ba, Li, Na, K, Rb, Cs or any combination thereof.
  • the electrically conducting composition may also comprise a metal nitride. Suitable metal nitrides include, e.g., TiN, ZrN, HfN, NbN, TaN, or any combination thereof.
  • a conducting composition may also include a metal silicide.
  • Suitable metal silicides include, e.g., PtSi2, TiSi2, C0S12, NiSi 2 , NbSi2, TaSi2, M0S12, WSi 2 , or any combination thereof.
  • An amorphous layer may suitably have a relative dielectric constant between about 1 and about 5000, or between about 10 and about 1000, or between about 50 and about 500, or even about 100.
  • a memory device may include at least two stable resistance states.
  • the resistance states may be adapted for multi-bit non-volatile data storage.
  • the present disclosure also provides methods. These methods include contacting an electrically insulating composition with an electrically conducting composition so as to form an admixture wherein from about, e.g. , 1 percent to about 40 percent by molar percentage of the admixture comprises the electrically conducting composition.
  • the admixture may be such that the resultant material is essentially (or entirely) single phase.
  • the methods may also include placing at least one electrode into electrical communication with the at least one amorphous resistance-switching layer.
  • a resistance-switching memory device is described using thermal oxide coated single crystal n-type or p-type silicon with 100 or 1 11 orientations as the substrate, polycrystalline Mo as the bottom electrode, Pt as the top electrode, and 1 -Pt (I stands for an insulator selected from the group of Hf0 2 , YO 3 /2, MgO, TaOs/2, ⁇ , AIO 3 /2) as the amorphous mixture layer.
  • Materials suitable for the disclosed devices need not share a common structure, other than being amorphous. Indeed, crystalline Hf0 2 , Y2O 3 , MgO, Ta 2 05, A1N, AI2O 3 all have distinct and different structures.
  • the amorphous mixture layers can be deposited on unheated substrates; on the same unheated substrate, the deposited electrodes are usually polycrystalline.
  • the exemplary test cells described herein had a diameter in the range of about 100 micrometers.
  • a Pt-top electrode provides superior scratch resistance and thus convenient for laboratory electrical testing using a test probe, but other common electrodes can also be used.
  • a Mo bottom electrode in provides a smooth sputtered interface thus convenient for subsequent mixture layer deposition, but other common electrodes can also be used.
  • Common electrodes include but are not limited to Mo, W, Cu, Ta, TaN and TiN.
  • the above thin film devices show excellent resistance-switching between an initial low-resistance and a set high resistance, as shown by the current-voltage (I-V) and the resistance-voltage (R-V) curves in FIGS. 12-17.
  • the on-off ratio of the resistance in the test devices typically exceeds I 00: 1.
  • the device was tested repeatedly and showed little change in memory of either high or low resistance, as evidenced by the 50 overlapping R-V loops shown in FIG. 7.
  • I-V and R-V curves were measured in both continuous and pulsed voltage-sweep modes. As used in the following tests, positive bias is the one causing a current to flow from the top electrode to the bottom electrode.
  • a typical room temperature I-V and R-V curves of a device with an amorphous resistance-switching layer of 7-Pt and Pt/Mo top/bottom electrodes as shown in FIG. 12 has a switching voltage of 3 V for low resistance to high resistance, and a switching voltage of - 1 V for high resistance to low resistance.
  • the I-V and R-V curves were recorded in the voltage-control mode and were the same for both continuous and the pulsed mode.
  • the resistance defined as the ratio of V/I is plotted along with a schematic circle indicating the rotational direction of the R-V hysteresis.
  • the mixture shows a low initial resistance 280 ⁇ and this low resistance state is stable under a negative bias. Under a positive bias, it is still stable below 3 V, but the resistance suddenly increases to a larger value, 600 ⁇ when the bias exceeded 3 V.
  • the high resistance state is nonlinear with a resistance value that decreases with voltage.
  • the high resistance state is kept at zero voltage indicating the memory is non-volatile: this zero-voltage resistance is typically higher than 20 kilo-ohm.
  • the high resistance state is further kept until a negative bias of about -1.0 to - 1.5 V is applied, which switches the resistance back to low resistance state.
  • the device also allowed a read voltage between -0.5 V and+ 1 V without disturbing
  • the voltage pulse required to switch the device was measured using repeated pulses of a certain pulse width, with the magnitude of their pulse voltage systematically increased until switching was complete. After each pulse, the resistance was measured at a fixed low voltage of about 0.2 V to determine whether switching had occurred or not. The process was next repeated using pulses of different widths. [0116]
  • the resistance states can be kept in a non-volatile manner as verified by certain retention experiments. The devices stored in air for several months experience no memory lapse. Generally, there is no need for an electrical source to maintain the resistance states.
  • Switchable devices exhibit multilevel resistance states that are suitable for multi-bit data storage within a single cell.
  • FIG. 19 Six distinct resistance states achieved by varying the stress voltage are labeled as “0”, “ 1 ", “2”, “3”, “4" and “5" in FIG. 19(a). Each state is stable and non-volatile, in the sense that their resistance values are kept without the need of applying any voltage to maintain them, as shown in FIG. 19(b).
  • Such multi-bit cells can increase the storage density of nonvolatile memory.
  • FIG. 20 shows a cycling test with 10 ⁇ $ pulses (+7 V, -6 V). Periodic resistance check was made using 0.2 V read voltage. There is no noticeable degradation after 4 x 10 5 cycles.
  • Such switchable devices were fabricated using a range of metal composition (fp t ) and mixture layer thickness.
  • metal composition fp t
  • mixture layer thickness One example is shown in FIG.21 for exemplary devices made of amorphous MgO-Pt mixture layer.
  • S labels signify for switchable film devices
  • C labels signify for conducting film devices with consistently low resistance
  • I labels signify insulating film devices with consistently high resistance. Both C and I devices do not show resistance switching.
  • the metal composition in atomic % follows the definition of 100x(mole of Pt/[mole of Pt+mole of AO x N y V), where AO x N y is the insulator / and Pt is the electrical conducting composition in the amorphous mixture film.
  • switching behavior is attained at certain film thicknesses that are between the thicknesses that yield conducting and insulating structures.
  • the composition described above was determined using energy dispersive X-ray spectroscopy. As shown in FIG. 22, the analysis confirms the three distinct layers in a device stack: a Pt top electrode, an intermediate, mixed layer containing Pt, Mg and O, and a Mo bottom electrode. (In FIG. 22, the Si peak is due to the stray signal from the Si substrate.) Another example of comparing mixture layers with different Pt compositions and a pure MgO film as well as a pure Pt film is shown in FIG. 23. Here, the above three layers were separately deposited onto graphite substrates, which substrate provided the C peaks in the figure.

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Abstract

L'invention concerne des dispositifs de commutation résistifs ayant, par exemple, une couche amorphe composée d'un matériau isolant à base d'aluminium ou à base de silicium et un matériau conducteur. La couche amorphe peut être disposée entre au moins deux électrodes et être capable de commuter entre au moins deux états de résistance. L'invention concerne également des circuits et des dispositifs mémoire comprenant les dispositifs de commutation résistifs, et une composition de matière impliquant un matériau isolant à base d'aluminium ou à base de silicium et un matériau conducteur. L'invention concerne également des procédés de commutation de la résistance d'un matériau amorphe.
PCT/US2013/030178 2008-12-19 2013-03-11 Dispositifs en couche mince non volatils à commutation de résistance WO2013151675A1 (fr)

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US9905760B2 (en) 2008-12-19 2018-02-27 The Trustees Of The University Of Pennsylvania Non-volatile resistance-switching thin film devices
US10224481B2 (en) 2014-10-07 2019-03-05 The Trustees Of The University Of Pennsylvania Mechanical forming of resistive memory devices

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