WO2013097568A1 - 存储芯片及存储芯片的充电控制方法、耗材容器及成像设备 - Google Patents

存储芯片及存储芯片的充电控制方法、耗材容器及成像设备 Download PDF

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Publication number
WO2013097568A1
WO2013097568A1 PCT/CN2012/085301 CN2012085301W WO2013097568A1 WO 2013097568 A1 WO2013097568 A1 WO 2013097568A1 CN 2012085301 W CN2012085301 W CN 2012085301W WO 2013097568 A1 WO2013097568 A1 WO 2013097568A1
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WIPO (PCT)
Prior art keywords
storage unit
power storage
power
unit
power supply
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PCT/CN2012/085301
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English (en)
French (fr)
Inventor
秦正南
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珠海天威技术开发有限公司
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Publication of WO2013097568A1 publication Critical patent/WO2013097568A1/zh

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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J29/00Details of, or accessories for, typewriters or selective printing mechanisms not otherwise provided for
    • B41J29/38Drives, motors, controls or automatic cut-off devices for the entire printing mechanism
    • B41J29/393Devices for controlling or analysing the entire machine ; Controlling or analysing mechanical parameters involving printing of test patterns
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01Ink jet
    • B41J2/17Ink jet characterised by ink handling
    • B41J2/175Ink supply systems ; Circuit parts therefor
    • B41J2/17503Ink cartridges
    • B41J2/17543Cartridge presence detection or type identification
    • B41J2/17546Cartridge presence detection or type identification electronically
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J29/00Details of, or accessories for, typewriters or selective printing mechanisms not otherwise provided for
    • B41J29/02Framework
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J29/00Details of, or accessories for, typewriters or selective printing mechanisms not otherwise provided for
    • B41J29/12Guards, shields or dust excluders
    • B41J29/13Cases or covers
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J9/00Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting
    • H02J9/002Circuit arrangements for emergency or stand-by power supply, e.g. for emergency lighting in which a reserve is maintained in an energy source by disconnecting non-critical loads, e.g. maintaining a reserve of charge in a vehicle battery for starting an engine
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/30Systems integrating technologies related to power network operation and communication or information technologies for improving the carbon footprint of the management of residential or tertiary loads, i.e. smart grids as climate change mitigation technology in the buildings sector, including also the last stages of power distribution and the control, monitoring or operating management systems at local level
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y04INFORMATION OR COMMUNICATION TECHNOLOGIES HAVING AN IMPACT ON OTHER TECHNOLOGY AREAS
    • Y04SSYSTEMS INTEGRATING TECHNOLOGIES RELATED TO POWER NETWORK OPERATION, COMMUNICATION OR INFORMATION TECHNOLOGIES FOR IMPROVING THE ELECTRICAL POWER GENERATION, TRANSMISSION, DISTRIBUTION, MANAGEMENT OR USAGE, i.e. SMART GRIDS
    • Y04S20/00Management or operation of end-user stationary applications or the last stages of power distribution; Controlling, monitoring or operating thereof
    • Y04S20/20End-user application control systems

Definitions

  • the present invention relates to the field of electronic imaging, and in particular to a memory chip for a consumable container and a charging control method for the same, and the present invention also relates to the above memory chip Consumable containers, imaging equipment.
  • the present invention is based on a Chinese invention patent application filed on December 28, 2011, and the application number is 201110448949.4, the content of which is incorporated herein by reference. Text.
  • the image forming apparatus refers to a device that converts electrical signals such as characters and patterns into a visible image on a medium such as paper, such as an inkjet or laser printer, a copying machine, a facsimile machine, and an all-in-one.
  • the two commonly used printers are inkjet printers and laser printers that use ink cartridges containing ink as a consumable container to provide printing ink to the printer to form text or graphics to be printed on the paper; laser printers are used to accommodate A toner cartridge with toner is used as a consumable container to supply printing toner to the printer to form words or patterns to be printed on the medium, imaging principles of copiers, fax machines, and all-in-ones, use of consumable containers, etc. basically the same.
  • the consumables referred to in the present invention mean ink or carbon powder.
  • a conventional color ink jet printer has a casing 11, and the ink jet printer shown in Fig. 1 omits the pallet of the casing 11.
  • the casing 11 is provided with a movement 12 of the ink jet printer, and a slide bar is provided.
  • the print carriage 14 reciprocates along the slide bar under the driving of the motor (not visible in Fig. 1).
  • An adapter plate (not visible in FIG. 1) is disposed in the carriage 14 and the adapter plate is electrically connected to the movement 12 via the cable 13.
  • a plurality of ink cartridges 15 are detachably mounted on the print carriage 14, and different ink cartridges 15 contain ink of different colors.
  • the structure of the ink cartridge 15 is as shown in FIG.
  • the ink cartridge 15 has a casing 16 enclosing a cavity for accommodating ink, and a lower end of the cavity is provided with an ink outlet port 17, and ink in the cavity flows out through the ink outlet port 17 and supplies ink to the printing carriage 14 Ink supply.
  • a chip 18 is mounted on the outer wall of the housing 16 of the ink cartridge 15.
  • the chip 18 has a substrate, and one side of the substrate is provided with a plurality of electrical contacts 19 for electrical connection with the adapter plate.
  • the other side of the substrate is provided with an electronic module (not visible in Figure 2) that is electrically connected to the electrical contacts 19.
  • the conventional toner cartridge has a housing 21 that encloses a cavity for accommodating toner, and a chip mounting position 22 is provided on the outer wall of the housing, and the chip 23 is mounted on the chip mounting position 22.
  • the chip 23 of the toner cartridge also has a substrate on which the electrical contacts 24 are provided as communication modules for data exchange with the laser printer. Also, the other side of the substrate is provided with an electronic module (not visible in Figure 3) that is electrically connected to the electrical contacts 24.
  • the chip 18 on the ink cartridge or the chip 23 on the toner cartridge its electronic modules are used to store data required for communication with the imaging device, and to realize communication operations with the imaging device.
  • the chip of the consumable container comprises a communication part and an integrated circuit part for receiving signals and electric energy of the imaging device
  • the communication part is generally an electrical contact or an induction coil
  • the integrated circuit part comprises a storage unit and a control unit.
  • the chip is provided with a power control unit 31, a power storage unit 32, and an integrated circuit portion 30, a communication portion 38.
  • the integrated circuit portion 30 includes a storage unit 34 and a control unit 37.
  • the storage unit 34 includes a nonvolatile memory 35 and Volatile memory 36.
  • the storage unit 34 stores data related to the consumable container and data generated during the printing process, including: consumable container manufacturer code, consumable container production date, consumable container model, total print quantity, consumed printed pages, and consumables in the consumable container.
  • the amount, the initial printing time of the consumable container, the last printing operation time, and the like, the control unit 37 is connected to the storage unit 34 for controlling the data access operation of the storage unit 34.
  • the image forming apparatus When the consumable container is mounted on the image forming apparatus, the image forming apparatus reads the data in the storage unit 34 of the chip and compares it with the data stored by the image forming apparatus itself, and determines whether the consumable container is suitable for the image forming apparatus; The imaging device also reads or writes print related data of the storage unit 34 in the chip in real time. When the consumables are exhausted, the image forming apparatus prompts to replace the consumable container to prevent the image forming apparatus from performing printing work in the absence of consumables. When the imaging device is turned off or during the operation of the imaging device, the power supply to the chip is stopped. Therefore, the chip must have the function of saving the data and completing the data storage when the power supply is stopped.
  • a nonvolatile memory 35 such as an EEPROM is used as the storage unit in the memory unit 34 of most of the chips.
  • the EEPROM write speed is slow, and the address to be written must be erased before data writing can be performed.
  • the memory unit 34 of the chip often includes a nonvolatile memory 35 (EEPROM) and a volatile memory 36 (SRAM), and the power control unit 31 and the power storage unit are disposed in the electronic module. 32.
  • the conventional power storage unit 32 is a capacitor. As shown in FIG. 5, the conventional chip uses the capacitor C1 as the first power storage unit.
  • the power control unit 31 switches the power supply of the chip to the capacitor C1, and the capacitor C1 continues to supply power to the volatile memory 36.
  • the external imaging device performs the gap power supply, that is, the time of each power supply (test) is between several tens and hundreds of microseconds, and then the power is turned off for a short time between several tens of microseconds or several tens of milliseconds. After that, the next round of data communication is started. Since the capacity of the capacitor C1 is large to meet the demand for power supply to the chip, and a limited current resistance is generally provided from the imaging device to the chip to prevent the current from being excessively damaged, so short. Capacitor C1 cannot be fully charged during the time. When the imaging device stops supplying power, since the capacitor C1 is not fully charged, the power demand in the volatile memory 36 for performing the data read/write operation cannot be satisfied.
  • a second capacitor having a smaller capacitance is added to the output port VCC of the power supply control unit 31 of the chip.
  • the electric unit that is, the capacitor C2 and the charging control portion are included as a component of the power control unit.
  • the charging control unit is set to control VDD to charge the capacitor C1 in one direction, and the two PMOS transistors Q1 and Q2 are set as the capacitor C1 and
  • the switch of the capacitor C2 compares the voltage of the imaging device power supply terminal VDD and the capacitor C1 terminal V_BAT by the comparator U1.
  • the integrated circuit portion of the chip is powered by the capacitor C2.
  • the above solution can alternately use the capacitor C1 and the capacitor C2 to supply power to the chip when the imaging device VDD is used for gap power supply, however, when the imaging device VDD is powered down, the comparator U1 outputs a high level, and the PMOS transistor Q1 is turned off. The inverter U0 outputs a low-level signal, the PMOS transistor Q2 is turned on, and the VDD is powered for a short time. Since the capacitor C1 is not fully charged, the capacitor C2 is fully charged. At this time, the capacitor C2 is discharged to the capacitor C1 through the PMOS transistor Q2, so that the VCC is The power supply drops very quickly to a low level, still causing data loss in the volatile memory 36 in the memory unit 34.
  • a first object of the present invention is to provide a memory chip that ensures that data in a volatile memory is not lost when power is supplied from an external gap to compensate for the above-mentioned deficiencies of the prior art.
  • a second object of the present invention is to provide a charging control method of the above memory chip.
  • a third object of the present invention is to provide a consumable container having the above-described memory chip.
  • a fourth object of the present invention is to provide an image forming apparatus having the above consumable container.
  • a memory chip provided by the present invention includes an electronic module including a communication portion, an integrated circuit portion connected to the communication portion, a power control portion connected to the integrated circuit portion, and a first storage connected to the power control portion.
  • the power control unit includes a charging control unit, a second power storage unit, a switch switching unit, and a backup power control unit.
  • the switch switching unit is configured to be connected to the external power supply and the second power storage unit
  • the charging control unit is configured to The external power supply and the first power storage unit are connected, and the standby power control unit is connected to the switch switching unit.
  • the backup power control unit includes an interconnecting comparison portion and a control portion
  • the comparison portion includes a first comparator and a second comparator
  • the first comparator is configured to compare the voltage value of the external power supply with the first power storage a voltage value of the unit
  • the second comparator is configured to compare the voltage value of the first power storage unit and the voltage value of the second power storage unit
  • the control part includes a power-down delay unit and a logic gate unit
  • the power-down delay unit is used for external power supply
  • the power supply and the logic gate unit are connected, and the logic gate unit receives the signal output by the first comparison unit, the signal output by the second comparator, and the signal output by the power-down delay unit.
  • the charging control method is: when the external power supply is powered on: the backup power control unit controls the switch switching unit to open the path between the external power supply and the second power storage unit. And shutting off the path between the first power storage unit and the second power storage unit; when the external power supply is powered down: the backup power control unit determines whether the power down time is shorter than the third power storage unit power supply time First, and comparing the voltage levels of the first power storage unit and the second power storage unit, if the power down time is shorter than one third of the power supply time, or the voltage of the first power storage unit is less than the second power storage unit, the standby The power control unit controls the switch switching unit to turn off the path between the external power supply and the second power storage unit, and between the first power storage unit and the second power storage unit; when the power failure time is longer than or equal to three third of the power supply time When the voltage of the first power storage unit is greater than or equal to the second power storage unit, the backup power control unit controls the switch switching
  • the consumable container provided by the present invention comprises a casing enclosing a cavity for accommodating the consumable, and the outer wall of the casing is mounted with the storage chip as described above.
  • the present invention provides an image forming apparatus including an image forming unit and a consumable container on which a memory chip as described above is mounted.
  • the standby power control unit Since the standby power control unit is disposed in the electronic module of the memory chip, when the external power supply of the imaging device supplies power to the memory chip, the backup power control unit controls to turn off between the first power storage unit and the second power storage unit.
  • the passage causes the external power supply of the image forming apparatus to charge the first power storage unit and the second power storage unit, and the first fully charged power storage unit cannot discharge to the other power storage unit through the path between the two; when the external portion of the imaging device
  • the backup power control unit determines whether the power-down time is shorter than the second power storage unit maintains one third of the power supply time of the memory chip, and compares the first power storage unit and the second power storage unit.
  • the voltage magnitude if the power-down time is shorter than one third of the power supply time of the second power storage unit or the voltage of the first power storage unit is less than the voltage of the second power storage unit, the control turns off the first power storage unit and the second
  • the path between the power storage units and the second power storage unit and the external power supply source causes the external power supply to be powered down for a short period of time, or when the first power storage unit fails to be fully charged,
  • the second power storage unit supplies power to the memory chip; otherwise, the power is stored by the first power storage unit; thus, when the external power supply of the imaging device performs gap power supply to the memory chip,
  • the stability of the memory chip power supply ensures that the data in its memory cells is not lost.
  • the comparison power is used in the backup power control unit, and the voltages of the first power storage unit and the second power storage unit can be compared, and the voltages of the first power storage unit and the external power supply source can be compared to determine whether to turn off Breaking the path between the first power storage unit and the second power storage unit, the control portion can make a control command to turn off or open the path between the first power storage unit and the second power storage unit according to the result of the comparison portion; In this way, it is ensured that stable power supply to the memory chip is ensured in the case of intermittent power supply of the imaging device, and data loss in the memory unit is prevented.
  • the switching unit is controlled by the standby power source control unit, and the path between the first power storage unit and the second power storage unit and between the external power supply and the second power storage unit Turning on or off, so that when the external power supply of the image forming apparatus supplies power to the memory chip gap, the first power storage unit and the second power storage unit are charged, and the power storage unit does not discharge to the low voltage position after the full charge occurs.
  • the power storage unit is used to supply power to the memory chip, thereby ensuring stable power supply to the memory chip and ensuring that data in the memory unit is not lost.
  • the present invention provides the consumable container with the above-mentioned memory chip, it is possible to ensure stable power supply to the memory chip while the imaging device is in the power supply gap-type power supply, and the data in the storage unit is not guaranteed. And lost.
  • the consumable container on the image forming apparatus provided by the present invention is provided with a memory chip as described above, and when the imaging device supplies power to the memory chip gap, the data in the memory chip is not lost.
  • FIG. 1 is a structural view of a conventional ink jet printer.
  • FIG. 2 is an enlarged view showing the structure of a conventional ink cartridge.
  • Fig. 3 is a structural view of a conventional toner cartridge.
  • FIG. 4 is an electrical block diagram of a conventional memory chip.
  • FIG. 5 is a schematic diagram of connection of a power control unit, an electric storage unit, and an image forming apparatus in a conventional memory chip.
  • FIG. 6 is an electrical block diagram of an embodiment of a memory chip of the present invention.
  • FIG. 7 is a schematic diagram showing the connection of a power control unit, a power storage unit, and an imaging device according to an embodiment of the memory chip of the present invention.
  • Figure 8 is an electrical schematic diagram of a backup power control unit of an embodiment of the memory chip of the present invention.
  • the memory chip provided by the present invention is used for a toner cartridge, and the memory chip includes a substrate and an electronic module mounted on the substrate.
  • the electronic module includes a communication portion 48 and an integrated circuit portion 40 connected to the communication portion 48.
  • a power supply control unit 41 connected to the integrated circuit portion 40, and a power storage unit 42 connected to the power supply control unit 41, the power storage unit 42 having a capacitance C11 as a first power storage unit.
  • the electrical contact is used as a communication portion for receiving laser printer signals and electrical energy.
  • the integrated circuit portion 40 includes a control unit 47 and a storage unit 44 for storing data required for data communication with the laser printer.
  • the parameter information of the toner, the use status information of the printing process, etc. can be read and written by the control unit, so that the laser printer can record the toner cartridge and record the state of the process.
  • the control unit 47 is connected to the storage unit 44.
  • the control unit 47 is a control core for communicating the memory chip with the laser printer for controlling the read and write operations of the storage unit 44.
  • the control unit 47 includes a communication protocol with a laser printer, a coding and decoding protocol, and even a key authentication protocol.
  • the above structure is similar to the structure of the existing memory chip, except that the power supply control unit 41 in this example includes a charge control unit, a capacitor C12 as a second power storage unit, a switch switching unit, and a backup power control unit 50.
  • the switch switching unit includes two PMOS transistors Q11 and Q12 for connecting with an external power supply VDD and a capacitor C12.
  • the charging control unit is a diode D11 for connecting with an external power supply VDD and a capacitor C11, and the backup power control unit 50 and The switch switching unit is connected.
  • the PMOS transistor Q11 and the PMOS transistor Q12 are used as the switch switching unit, which is the same as the existing switch switching unit.
  • the backup power control unit 50 includes the interconnected comparison portion and the control portion, and the comparison portion.
  • the first comparator U11 is connected to the external power supply VDD and the capacitor C11 of the laser printer, and the second comparator U12 is connected to the capacitor C11 and the capacitor C12.
  • the control part includes a power-down delay unit and a logic gate unit.
  • the power-down delay unit is connected to the external power supply VDD and the logic gate unit of the laser printer, and the logic gate unit is connected with the comparison unit.
  • the logic NAND gate U14 is used.
  • the logic gate unit, the power-down delay unit includes a field effect transistor Q13, a capacitor C13 as a third power storage unit, a resistor R11, and a Schmitt inverter U13, and the gate and the source of the field effect transistor Q13 are connected, and Connected to the external power supply VDD of the laser printer, the drain of the FET Q13 is connected to one end of the capacitor C13, one end of the resistor R11 and the input end of the Schmitt inverter U13, the other end of the capacitor C13 and the resistor R11.
  • the output of the Schmitt inverter U13 is connected to the input end of the logic NAND gate U14; the gate of the PMOS transistor Q11 is connected to the output end of the first comparator U11, and the source of the PMOS transistor Q11 is connected to the capacitor C11.
  • the drain of the memory chip VCC and the PMOS transistor Q12, the drain of the PMOS transistor Q11 is connected to the external power supply VDD, the gate of the PMOS transistor Q12 is connected to the output of the logic NAND gate U14, and the source of the PMOS transistor Q12 is connected to the capacitor.
  • One end of C12, the first The other end of the cells C11 and the other end of the capacitor C12 are grounded.
  • the charging control unit charges the capacitor C12 when the external power supply VDD of the laser printer is powered.
  • the PMOS transistor Q11 is turned off to prevent the charge stored by the capacitor C12 from passing through the PMOS transistor Q11 to VDD. Discharge.
  • the comparison part is composed of a first comparator U11 and a second comparator U12.
  • VDD is powered on
  • the VDD voltage is higher than the positive voltage VCC of the capacitor C12
  • the first comparator U11 outputs a low level
  • the PMOS transistor Q11 is turned on.
  • the logic NAND gate U14 outputs a high level, and the PMOS transistor Q12 is turned off.
  • capacitor C13 is charged by FET Q13.
  • the resistance of resistor R11 in the circuit should be larger, the capacity of capacitor C13 is smaller, when the capacitor C13 is charged.
  • the Schmidt inverter U13 When charging to more than half of the VCC voltage, the Schmidt inverter U13 outputs a low level, so the PMOS transistor Q12 is turned off.
  • VDD is powered down, capacitor C13 is discharged through resistor R11. Since the Schmitt inverter U13 can make the low level flip voltage very low, when the positive voltage of the capacitor C13 drops to about 0.8V, the Schmitt counter The phaser U13 outputs a high level, the discharge time coefficient is R11 ⁇ C13 ⁇ K, and K is a discharge proportional coefficient, such as 70%.
  • the discharge time required from the VDD power-down to the Schmitt inverter U13 flipping can be obtained, and the discharge time is set to the maximum value of the power-down time in the VDD gap power-down. More than 2 times. Therefore, when the VDD power-down time is less than the discharge time, the Schmitt inverter U13 outputs a low level, and the logic NAND gate U14 outputs a high level, and the PMOS transistor Q12 does not conduct. When the external power-down time exceeds the discharge time, the Schmitt inverter U13 outputs a high level.
  • the second comparator U12 When the external power supply VDD is powered off, when the output of the first comparator U11 and the Schmitt inverter U13 are both high, the second comparator U12 also supplies the positive terminal voltage V_BAT of the capacitor C11 and the memory chip. The voltage VCC of the terminal is compared. When the voltage V_BAT of the capacitor C11 is less than the voltage VCC of the positive terminal of the memory chip, the second comparator U12 outputs a low level, and the logic NAND gate U14 outputs a high level, and the PMOS transistor Q12 is turned off.
  • the logic NAND gate U14 When the voltage V_BAT of C11 is greater than the voltage VCC of the positive terminal of the memory chip, the logic NAND gate U14 outputs a low level, the PMOS transistor Q12 is turned on, and the capacitor C11 supplies the backup power to the memory chip via Q12.
  • the memory chip After the VDD is powered off, the memory chip is no longer in communication with the laser printer.
  • the internal logic circuit of the memory chip is in a static working state, and its quiescent current is very small, and the power is continuously stored by the capacitor C12 in a short time.
  • control unit 47 can adopt other controllers (such as MCUs) to implement its functions by using software design; and can also adopt programmable logic devices (such as CPLD, FPGA).
  • controllers such as MCUs
  • CPLD programmable logic devices
  • the above transformation can be achieved by hardware programming, and the above transformation can achieve the object of the present invention.
  • control unit 47 may include an interface unit that provides a protocol or interface for data communication, or the interface unit is disposed outside the control unit 47, within the electronic module, and the interface unit. In connection with the control unit 47, the above-described transformation can also achieve the object of the present invention.
  • the first power storage unit, the second power storage unit, and the third power storage unit may use a rechargeable battery or other rechargeable power storage device, and the capacitor may be a large capacity. Capacitance, electrolytic capacitor or super capacitor or farad capacitor, the above transformation can achieve the object of the present invention.
  • the field effect transistor Q13 can be replaced by a diode or other electronic switching transistor, and the above transformation can achieve the object of the present invention.
  • the embodiment of the memory chip of the present invention can also be used for a cartridge storage chip.
  • the storage unit stores data related to the ink cartridge, and its structure and working principle are similar to the embodiment, and the transformation can also be performed.
  • the object of the invention is achieved.
  • the structure of the memory chip in this embodiment is as described in the above embodiment of the memory chip, and the charging control method when the gap is powered:
  • the control portion of the backup power control unit 50 controls the switch switching unit to open the path between the external power supply VDD and the capacitor C12, and turns off the path between the capacitor C11 and the capacitor C12. ;
  • the control portion of the standby power control unit 50 determines whether the power-down time is shorter than one third of the power supply time of the capacitor C12, and compares the voltages of the capacitor C11 and the capacitor C12.
  • the control portion of the standby power control unit 50 controls the switch switching unit to turn off the external power supply VDD and the capacitor C12. And the path between the capacitor C11 and the capacitor C12;
  • the control portion of the standby power control unit 50 controls the switch switching unit to turn off the path between the external power supply VDD and the capacitor C12. And open the path between the capacitor C11 and the capacitor C12.
  • the working principle is similar to that described in the above embodiment of the memory chip: when the external power supply VDD of the laser printer is powered, the capacitor C12 is charged. When the VDD is powered down, the standby power control unit turns off the PMOS transistor Q11 to prevent the capacitor C12 from being stored. The charge is discharged through PMOS transistor Q11 to VDD.
  • the control portion of the standby power control unit 50 controls the switch switching unit such that the PMOS transistor Q11 is turned on and the PMOS transistor Q12 is turned off; when VDD is powered down and the VDD power-down time is less than the capacitor C12 maintains the When one third of the power supply time of the memory chip is used, the PMOS transistor Q12 is not turned on; when the external power supply VDD is powered down, the comparison portion of the standby power supply control unit also needs the positive terminal voltage V_BAT of the capacitor C11 and the voltage VCC of the power supply terminal of the memory chip. For comparison, when the voltage V_BAT of the capacitor C11 is less than the voltage VCC at the positive terminal of the memory chip, The PMOS transistor Q12 is turned off.
  • the capacitor C11 When the voltage V_BAT of the capacitor C11 is greater than the voltage VCC at the positive terminal of the memory chip, The PMOS transistor Q12 is turned on, and the capacitor C11 supplies backup power to the memory chip via the PMOS transistor Q12. Since the memory chip enters static when the external power supply VDD is powered off, the current loss is very small. At this time, the time required for the power supply to be maintained by the capacitor C12 must be greater than three times the instantaneous power-off time of the external power supply VDD to ensure the data therein. Will not be lost.
  • the method provided by the present invention can also be directed to an ink cartridge chip mounted on an inkjet printer, the specific working process of which is the same as the above method embodiment.
  • the toner cartridge of this embodiment includes a housing that encloses a cavity for accommodating toner, and a memory chip as described in the above embodiment is mounted on an outer wall of the housing.
  • the toner cartridge of the present invention may be an ink cartridge to which the memory chip described in the above embodiment is mounted.
  • the laser printer includes an image forming unit and a toner cartridge, and the toner cartridge has a casing, and the casing encloses a cavity for accommodating the toner, and the cavity is provided with a powder discharging port. Further, a memory chip as described above is mounted on the outer wall of the casing of the toner cartridge.
  • the printer of the present invention may also be another image forming apparatus such as a copying machine or a facsimile machine or an all-in-one machine, and the above-described transformation can also achieve the object of the present invention.
  • the memory chip of the present invention controls the path between the first power storage unit and the second power storage unit to be turned off when the external power supply of the image forming apparatus supplies power to the memory chip by the standby power supply control unit.
  • the external power supply of the image forming apparatus charges the first power storage unit and the second power storage unit, and the first fully charged power storage unit cannot discharge to the other power storage unit through the path between the two; when the external power supply of the image forming device
  • the backup power control unit determines whether the power-down time is shorter than the second power storage unit maintains one third of the power supply time of the memory chip, and compares the voltages of the first power storage unit and the second power storage unit.
  • the second power storage list is used when the external power supply source is powered off for a short period of time or the first power storage unit fails to be fully charged. Power is supplied to the memory chip, otherwise, the control of the memory chip is powered by the first power storage unit.
  • the stability of the power supply to the memory chip is ensured, thereby ensuring that the data in the memory unit is not lost.
  • the charging control method of the memory chip of the present invention can ensure that the memory chip realizes the above charging mode and avoids data loss of the memory chip.

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Abstract

本发明涉及电子成像领域,并且提供一种存储芯片,包括电子模块,该电子模块包括通讯部分、与通讯部分连接的集成电路部分、与集成电路部分连接的电源控制部分及与电源控制部分连接的第一蓄电单元,电源控制部分包括充电控制单元、第二蓄电单元及开关切换单元,开关切换单元用于与外部供电电源及第二蓄电单元连接;充电控制单元用于与外部供电电源及第一蓄电单元连接;电源控制部分还包括与开关切换单元连接的备用电源控制单元。本发明还提供了一种上述存储芯片的充电控制方法,设置有上述存储芯片的耗材容器及成像设备。

Description

存储芯片及存储芯片的充电控制方法、耗材容器及成像设备 技术领域
本发明涉及电子成像领域,具体地说,涉及一种用于耗材容器的存储芯片以及这种存储芯片的充电控制方法,本发明还涉及具有上述存储芯片 的耗材容器、成像设备。本发明基于申请日为2011年12月28日、申请号为201110448949.4的中国发明专利申请,该申请的内容作为参考引入本 文。
背景技术
本发明所说的成像设备是指将文字、图案等电信号转换为在纸张等介质上形成可视图像的设备,例如喷墨类或激光类的打印机、复印机、传真机及多功能一体机。
常用的两种打印机是喷墨打印机和激光打印机,喷墨打印机使用容纳有墨水的墨盒作为耗材容器向打印机提供打印用的墨水,以在纸张上形成需要打印的文字或图案;激光打印机则使用容纳有碳粉的碳粉盒作为耗材容器向打印机提供打印用的碳粉,以在介质上形成需要打印的文字或图案,复印机、传真机及多功能一体机的成像原理、使用耗材容器等与打印机基本相同。本发明所说的耗材是指墨水或碳粉。
参见图1,现有一种彩色喷墨打印机具有机壳11,图1所示的喷墨打印机省略了机壳11的托板。机壳11内设有喷墨打印机的机芯12,并设有一根滑杆,打印字车14在电机(图1中不可见)的带动下沿着滑杆往复运动。打印字车14内设有转接板(图1中不可见),转接板通过排线13与机芯12电连接。
打印字车14上可拆卸地安装有多个墨盒15,不同墨盒15内容纳有不同颜色的墨水,墨盒15的结构如图2所示。墨盒15具有壳体16,壳体16围成容纳墨水的腔体,腔体的下端设有出墨口17,腔体内的墨水通过出墨口17流出,并向打印字车14的供墨针供墨。
墨盒15壳体16的外壁上安装有一块芯片18,芯片18具有基板,基板的一侧设有多个电触点19,用于与转接板电连接。基板的另一侧设有与电触点19电连接的电子模块(图2中不可见)。
参见图3,现有碳粉盒具有壳体21,壳体21围成容纳碳粉的腔体,壳体的外壁上设有一个芯片安装位22,芯片23安装于芯片安装位22上。与墨盒的芯片类似,碳粉盒的芯片23也具有基板,基板上设有作为通信模块的电触点24,用于与激光打印机进行数据交换。并且,基板的另一侧设有与电触点24电连接的电子模块(图3中不可见)。
不管是墨盒上的芯片18还是碳粉盒上的芯片23,其电子模块均用于存储与成像设备通讯所需的数据、实现与成像设备之间的通讯操作。可见,耗材容器的芯片包括接收成像设备信号及电能的通讯部分和集成电路部分,通讯部分一般是电触点或感应线圈,集成电路部分中包括有一个存储单元和一个控制单元。
参见图4,芯片设置有电源控制单元31、蓄电单元32以及集成电路部分30、通讯部分38,集成电路部分30包括存储单元34以及控制单元37,存储单元34包括非易失性存储器35以及易失性存储器36。存储单元34中存储与耗材容器相关的数据和打印过程中产生的数据,包括:耗材容器厂家代码、耗材容器生产日期、耗材容器型号、总打印量、已消耗打印页数、耗材容器内耗材余量、耗材容器的初始打印时间、上一打印操作时间等,控制单元37与存储单元34连接,用于控制存储单元34的数据存取操作。
当耗材容器安装到成像设备上时,成像设备会读取芯片的存储单元34中的数据并与成像设备自身存储的数据进行比较,判断该耗材容器是否适用于该台成像设备;在工作过程中,成像设备还会实时读取或写入芯片中存储单元34的打印相关数据。当耗材耗尽时,成像设备提示更换耗材容器,防止成像设备在缺少耗材的情形下进行打印工作。成像设备关机或在成像设备的工作过程中,均会出现对芯片停止供电的情况,因此,芯片必须具备在停止供电的情况下仍能继续保存数据,完成数据存储的功能。因此,大部分的芯片的存储单元34中都采用非易失性存储器35,如EEPROM作为存储单元。然而EEPROM的写入速度较慢,必须将待写入地址擦除,然后才能进行数据写入操作。为了提高芯片的写入速度,芯片的存储单元34常常同时包括有非易失性存储器35(EEPROM)和易失性存储器36(SRAM),并在电子模块中设置电源控制单元31和蓄电单元32。常用的蓄电单元32是电容,如图5所示,现有的芯片采用电容C1作为第一蓄电单元。当成像设备给芯片供电时,将非易失性存储器35中的数据传送到易失性存储器36中,成像设备对非易失性存储器35的读写操作实际转化为对易失性存储器36的读写操作。当成像设备停止供电时,电源控制单元31将芯片的供电电源切换到电容C1,由电容C1继续给易失性存储器36供电。
技术问题
然而,若外部的成像设备进行间隙式供电,即:每次供电(检验)的时间在几十至几百微秒之间,接着在几十微秒或几十毫秒之间短时间掉电,之后又开始下一轮的数据通讯,由于电容C1容量较大以满足给芯片供电的需求,且从成像设备到芯片之间一般都设置有限流电阻,以防止电流过大损坏芯片,因此,短时间内不能将电容C1充满电。当成像设备停止供电时,由于电容C1没有充满电,不能满足易失性存储器36中将数据读写操作执行完毕的电量需求。
为了解决上述作为蓄电单元的电容C1在成像设备采用间隙式供电时不能在间隙供电期间被充满电的问题,在芯片的电源控制单元31的输出端口VCC增加一个电容量较小的第二蓄电单元,即电容C2及充电控制部分作为电源控制单元的组成部分,如图5所示,设置充电控制单元控制VDD给电容C1单向充电,其设置两个PMOS管Q1和Q2作为电容C1和电容C2的切换开关,利用比较器U1比较成像设备供电端VDD与电容C1端V_BAT的电压。当成像设备VDD对芯片停止供电时,芯片的集成电路部分由电容C2供电。
上述方案虽然能在成像设备VDD采用间隙式供电时,交替采用电容C1和电容C2给芯片供电,然而,当成像设备VDD掉电时,比较器U1输出高电平,此时PMOS管Q1关闭,反相器U0输出低电平信号,PMOS管Q2导通,VDD短时间供电,由于电容C1未充满电,电容C2已充满,此时,电容C2经过PMOS管Q2向电容C1放电,使得VCC的电源很快下降到很低,仍然造成了存储单元34中易失性存储器36的数据丢失。
技术解决方案
本发明的第一目的是提供一种在外部间隙供电时确保易失性存储器中数据不被丢失的存储芯片,以弥补上述现有技术的不足。
本发明的第二目的是提供上述存储芯片的充电控制方法。
本发明的第三目的是提供具有上述存储芯片的耗材容器。
本发明的第四目的是提供具有上述耗材容器的成像设备。
为实现上述目的,本发明提供的存储芯片包括电子模块,该电子模块包括通讯部分、与通讯部分连接的集成电路部分、与集成电路部分连接的电源控制部分及与电源控制部分连接的第一蓄电单元,该电源控制部分包括充电控制单元、第二蓄电单元、开关切换单元及备用电源控制单元,开关切换单元用于与外部供电电源及第二蓄电单元连接,充电控制单元用于与外部供电电源及第一蓄电单元连接,备用电源控制单元与开关切换单元连接。
其进一步技术方案是,备用电源控制单元包括互连的比较部分和控制部分,比较部分包括第一比较器和第二比较器,第一比较器用于比较外部供电电源的电压值与第一蓄电单元的电压值,第二比较器用于比较第一蓄电单元的电压值及第二蓄电单元的电压值,控制部分包括掉电延迟单元和逻辑门单元,掉电延迟单元用于与外部供电电源及逻辑门单元连接,逻辑门单元接收第一比较单元器输出的信号、所述第二比较器输出的信号以及所述掉电延迟单元输出的信号。
本发明提供的存储芯片的结构如上方案所述,该充电控制方法是:在外部供电电源上电时:备用电源控制单元控制开关切换单元来打开外部供电电源及第二蓄电单元之间的通路、并关断第一蓄电单元与第二蓄电单元之间的通路;在外部供电电源掉电时:备用电源控制单元判断掉电时间是否短于第二蓄电单元供电时间的三分之一,并比较第一蓄电单元及第二蓄电单元的电压大小,若掉电时间短于供电时间的三分之一,或第一蓄电单元的电压小于第二蓄电单元时,备用电源控制单元控制开关切换单元关断外部供电电源及第二蓄电单元之间、以及第一蓄电单元及第二蓄电单元之间的通路;当掉电时间长于等于供电时间的三分之一且第一蓄电单元的电压大于等于第二蓄电单元时,备用电源控制单元控制开关切换单元来关断外部供电电源及第二蓄电单元之间的通路、并打开第一蓄电单元及第二蓄电单元之间的通路。
本发明提供的耗材容器包括壳体,壳体围成容纳耗材的腔体,壳体的外壁上安装有如上所述的存储芯片。
本发明提供成像设备包括成像单元和耗材容器,耗材容器上安装有如上所述的存储芯片。
有益效果
由于存储芯片的电子模块内设置有备用电源控制单元,当成像设备的外部供电电源对存储芯片供电时,备用电源控制单元控制关断所述第一蓄电单元和第二蓄电单元之间的通路,使得成像设备的外部供电电源对第一蓄电单元和第二蓄电单元充电,先充满电的蓄电单元不能通过二者间的通路向另一蓄电单元放电;当成像设备的外部供电电源对存储芯片掉电时,备用电源控制单元判断掉电时间是否短于第二蓄电单元维持该存储芯片供电时间的三分之一、并比较第一蓄电单元和第二蓄电单元的电压大小,若掉电时间短于第二蓄电单元供电时间的三分之一或第一蓄电单元的电压小于第二蓄电单元的电压,控制关断第一蓄电单元和第二蓄电单元之间、以及第二蓄电单元及外部供电电源的通路,使得外部供电电源短时间掉电、或第一蓄电单元的未能充满时,利用第二蓄电单元对该存储芯片进行供电,否则,控制利用第一蓄电单元对存储芯片进行供电;如此,可在成像设备的外部供电电源对存储芯片进行间隙式供电的情况下,保证给存储芯片供电的稳定性,进而确保其存储单元中的数据不被丢失。
并且,备用电源控制单元中采用比较部分,可以对第一蓄电单元及第二蓄电单元的电压进行比较,还可以对第一蓄电单元及外部供电电源的电压进行比较,以判断是否关断第一蓄电单元与第二蓄电单元之间的通路,控制部分能够根据比较部分的结果,作出关断或打开第一蓄电单元和第二蓄电单元之间通路的控制命令;由此,确保在成像设备间隙式供电的情况下,仍旧保证对存储芯片的稳定供电,防止存储单元中的数据丢失。
根据本发明的存储芯片的充电控制方法,通过备用电源控制单元控制开关切换单元,对第一蓄电单元和第二蓄电单元之间、以及外部供电电源及第二蓄电单元之间的通路打开或关断,使得成像设备的外部供电电源对存储芯片间隙式供电时,对第一蓄电单元和第二蓄电单元进行充电,不会发生充满电后蓄电单元向低电压位置放电的情况,当成像设备的外部供电电源短时间掉电时,采用充满电的蓄电单元对存储芯片供电,因此,保证对存储芯片的稳定供电,确保其存储单元中的数据不被丢失。
另外,由于本发明提供耗材容器由于安装有如上存储芯片,因此,可以在成像设备处于供电电源间隙式供电的情况下,仍能确保对存储芯片的稳定供电,保证存储单元中的数据不会因此而丢失。
最后,本发明提供的成像设备上的耗材容器上设置有如上所述的存储芯片,成像设备对该存储芯片间隙式供电时,存储芯片中的数据不会丢失。
附图说明
图1是现有一种喷墨打印机的结构图。
图2是现有墨盒的结构放大图。
图3是现有一种碳粉盒的结构图。
图4是现有存储芯片的电原理框图。
图5是现有存储芯片中电源控制单元、蓄电单元及成像设备的连接示意图。
图6是本发明存储芯片实施例的电原理框图。
图7是本发明存储芯片实施例的电源控制单元、蓄电单元及成像设备的连接示意图。
图8是本发明存储芯片实施例的备用电源控制单元的电原理图。
以下结合附图及实施例对本发明作进一步说明。
本发明的实施方式
存储芯片实施例
本发明提供的存储芯片用于碳粉盒,该存储芯片包括基板、安装于基板上的电子模块,参见图6与图7,电子模块包括通讯部分48、与通讯部分48连接的集成电路部分40、与集成电路部分40连接的电源控制单元41,以及与电源控制单元41连接的蓄电单元42,蓄电单元42具有作为第一蓄电单元的电容C11。本例中,电触点作为通讯部分用于接收激光打印机信号及电能,集成电路部分40包括:控制单元47和存储单元44,存储单元44用于存储与激光打印机进行数据通讯所需的数据,其中包括碳粉的参数信息、打印过程的使用状态信息等,上述信息可被控制单元进行读访问和写访问,从而可以实现激光打印机对碳粉盒的识别和使用过程状态的记录。控制单元47与存储单元44连接,控制单元47是该存储芯片与激光打印机通讯的控制核心,用于控制存储单元44的读写操作。控制单元47中包括和激光打印机的通讯协议、编码和解码协议,甚至密钥认证协议等。上述结构与现有存储芯片的结构相类似,区别在于,本例中的电源控制单元41包括充电控制单元、作为第二蓄电单元的电容C12、开关切换单元及备用电源控制单元50。开关切换单元包括两个PMOS管Q11、Q12,其用于与外部供电电源VDD及电容C12连接,充电控制单元为二极管D11,用于与外部供电电源VDD及电容C11连接,备用电源控制单元50与开关切换单元连接。
本实施例中采用PMOS管Q11和PMOS管Q12作为开关切换单元,与现有的开关切换单元结构相同,如图8所示,备用电源控制单元50包括互连的比较部分和控制部分,比较部分包括第一比较器U11和第二比较器U12,第一比较器U11用于与激光打印机的外部供电电源VDD及电容C11连接,第二比较器U12与电容C11及电容C12连接。
控制部分包括掉电延迟单元和逻辑门单元,掉电延迟单元用于与激光打印机的外部供电电源VDD及逻辑门单元连接,逻辑门单元与比较单元连接,本例中采用逻辑与非门U14作为逻辑门单元,掉电延迟单元包括场效应管Q13、作为第三蓄电单元的电容C13、电阻R11和斯密特反相器U13,场效应管Q13的栅极和源极相连接,且用于与激光打印机的外部供电电源VDD连接,场效应管Q13的漏极与电容C13的一端、电阻R11的一端及斯密特反相器U13的输入端连接,电容C13的另一端及电阻R11的另一端接地,斯密特反相器U13的输出端连接到逻辑与非门U14的输入端;PMOS管Q11的栅极接第一比较器U11的输出端,PMOS管Q11的源极接电容C11、存储芯片供电端VCC及PMOS管Q12的漏极、PMOS管Q11的漏极接外部供电电源VDD,PMOS管Q12的栅极接逻辑与非门U14的输出端,PMOS管Q12的源极接电容C12的一端,第一蓄电单元C11的另一端及电容C12的另一端均接地。
本实施例的工作原理如下:充电控制单元在激光打印机的外部供电电源VDD供电时给电容C12充电,当VDD掉电时,将PMOS管Q11关闭,防止电容C12储存的电荷经PMOS管Q11到VDD放电。比较部分是由第一比较器U11及第二比较器U12组成,当VDD上电时,VDD电压高于电容C12正端电压VCC,第一比较器U11输出低电平,PMOS管Q11导通,而逻辑与非门U14输出高电平,PMOS管Q12关断。在VDD上电后,电容C13经场效应管Q13充电,为了更快的对电容C13充满电,电路中电阻R11的阻值应取得大些,电容C13的容量小些,当电容C13的充电电压充到大于VCC电压的一半时,斯密特反向器U13输出低电平,因此PMOS管Q12关断。当VDD掉电时,电容C13经电阻R11放电,由于斯密特反相器U13可以将低电平翻转电压做得很低,当电容C13正端电压降到0.8V左右时,斯密特反相器U13输出高电平,放电时间系数为R11×C13×K,K为放电比例系数,如70%。因此通过选择恰当的电容C13容量及电阻R11的阻值,可得到从VDD掉电到斯密特反相器U13翻转所需放电时间,放电时间设为VDD间隙掉电中掉电时间最大值的2倍以上。因此当VDD掉电时间小于放电时间时,斯密特反相器U13输出低电平,则逻辑与非门U14输出高电平,PMOS管Q12不导通。当外部掉电时间超过放电时间后,斯密特反相器U13输出高电平。当外部电源VDD掉电后,当第一比较器U11及斯密特反相器U13输出均为高电平情况下,第二比较器U12还要将电容C11的正端电压V_BAT与存储芯片供电端的电压VCC进行比较,当电容C11的电压V_BAT小于存储芯片正端的电压VCC时,第二比较器U12输出低电平,则逻辑与非门U14输出高电平,PMOS管Q12关断,当电容C11的电压V_BAT大于存储芯片正端的电压VCC时,逻辑与非门U14输出低电平,PMOS管Q12导通,电容C11经由Q12给存储芯片提供备用电源。
由于VDD掉电后,存储芯片不再与激光打印机通信,存储芯片内部逻辑电路处于静止工作状态,其静态电流非常微小,在短时间内完全由电容C12蓄电维持供电。
作为本发明存储芯片实施例的一种变换,控制单元47可以采用其他控制器(如MCU),采用其软件设计实现其功能;也可采用可编程逻辑器件(如CPLD,FPGA 等)通过硬件编程来实现,上述变换均可实现本发明的目的。
作为本发明存储芯片实施例的另一种变换,控制单元47中可以包括有为数据通讯提供协议或接口的接口单元,或者将接口单元设置在控制单元47之外、电子模块之内,接口单元与控制单元47连接,上述变换同样可以实现本发明的目的。
作为本发明存储芯片实施例的又一种变换,第一蓄电单元、第二蓄电单元及第三蓄电单元可以采用可充电电池或其它可充电的蓄电装置,电容可以是大容量钽电容、电解电容或超级电容或法拉电容,上述变换均可实现本发明的目的。
作为本发明存储芯片实施例的又一种变换,场效应管Q13可以替换为二极管或其他电子开关管,上述变换均可实现本发明的目的。
作为本发明存储芯片实施例的又一种变换,还可以用于墨盒存储芯片,此时,存储单元存放的是与墨盒相关的数据,其结构和工作原理与本实施例相似,该变换同样可以实现本发明的目的。
存储芯片在间隙供电时的充电控制方法实施例
本实施例中存储芯片的结构如上述存储芯片实施例所述,其在间隙供电时的充电控制方法是:
在激光打印机的外部供电电源VDD上电时:备用电源控制单元50的控制部分控制开关切换单元来打开外部供电电源VDD及电容C12之间的通路、并关断电容C11与电容C12之间的通路;
在激光打印机的外部供电电源VDD掉电时:备用电源控制单元50的控制部分判断掉电时间是否短于电容C12供电时间的三分之一,并比较电容C11及电容C12的电压大小,
若掉电时间短于供电时间的三分之一,或电容C11的电压小于所述电容C12的电压时,备用电源控制单元50的控制部分控制开关切换单元关断外部供电电源VDD及电容C12之间、以及电容C11及电容C12之间的通路;
当掉电时间长于等于供电时间的三分之一且电容C11的电压大于等于电容C12时,备用电源控制单元50的控制部分控制开关切换单元来关断外部供电电源VDD及电容C12之间的通路、并打开电容C11及电容C12之间的通路。
其工作原理与上存储芯片实施例中所述类似:在激光打印机的外部供电电源VDD供电时给电容C12充电,当VDD掉电时,备用电源控制单元将PMOS管Q11关闭,防止电容C12储存的电荷经PMOS管Q11到VDD放电。当VDD上电时,备用电源控制单元50的控制部分对开关切换单元进行控制,使得其中的PMOS管Q11导通,PMOS管Q12关断;当VDD掉电且VDD掉电时间小于电容C12维持该存储芯片供电时间的三分之一时,PMOS管Q12不导通;当外部电源VDD掉电时,备用电源控制单元的比较部分还要将电容C11的正端电压V_BAT与存储芯片供电端的电压VCC进行比较,当电容C11的电压V_BAT小于存储芯片正端的电压VCC时, PMOS管Q12关断,当电容C11的电压V_BAT大于存储芯片正端的电压VCC时, PMOS管Q12导通,电容C11经由PMOS管Q12给存储芯片提供备用电源。由于在外部供电电源VDD掉电时,该存储芯片进入静态,其电流损耗非常小,此时由电容C12维持供电的时间必须大于外部供电电源VDD瞬间掉电时间的3倍,以保证其中的数据不会被丢失。
作为本发明存储芯片数据显示方法实施例的又一种变换,本发明所提供的方法还可以针对安装在喷墨打印机上墨盒芯片,其具体工作过程与上述方法实施例相同。
碳粉盒实施例
本实施例的碳粉盒包括壳体,该壳体围成容纳碳粉的腔体,壳体的外壁上安装有如上实施例所述的存储芯片。
作为本发明碳粉盒实施例的一种变换,可以是安装有上述实施例所述存储芯片的墨盒。
打印机实施例
激光打印机包括成像单元和碳粉盒,该碳粉盒具有壳体,且壳体围成容纳碳粉的腔体,腔体上设置有出粉口。并且,碳粉盒的壳体外壁上安装有如上所述的存储芯片。
作为本发明打印机实施例的一种变换,还可以是复印机或传真机或多功能一体机等其他成像设备,上述变换同样可以实现本发明的目的。
本发明不限于上述各实施例及变换,其他基于本发明技术方案且不违背本发明目的的方法及其组合变化也应该包括在本发明权利要求的保护范围内。
工业实用性
本发明的存储芯片因备用电源控制单元,当成像设备的外部供电电源对存储芯片供电时,备用电源控制单元控制关断所述第一蓄电单元和第二蓄电单元之间的通路,使得成像设备的外部供电电源对第一蓄电单元和第二蓄电单元充电,先充满电的蓄电单元不能通过二者间的通路向另一蓄电单元放电;当成像设备的外部供电电源对存储芯片掉电时,备用电源控制单元判断掉电时间是否短于第二蓄电单元维持该存储芯片供电时间的三分之一、并比较第一蓄电单元和第二蓄电单元的电压大小,若掉电时间短于第二蓄电单元供电时间的三分之一或第一蓄电单元的电压小于第二蓄电单元的电压,控制关断第一蓄电单元和第二蓄电单元之间、以及第二蓄电单元及外部供电电源的通路,使得外部供电电源短时间掉电、或第一蓄电单元的未能充满时,利用第二蓄电单元对该存储芯片进行供电,否则,控制利用第一蓄电单元对存储芯片进行供电。
如此,可在成像设备的外部供电电源对存储芯片进行间隙式供电的情况下,保证给存储芯片供电的稳定性,进而确保其存储单元中的数据不被丢失。
本发明的存储芯片的充电控制方法能够确保存储芯片实现上述的充电方式,避免存储芯片的数据丢失。

Claims (10)

  1. 存储芯片,包括电子模块;
    所述电子模块包括
    通讯部分;
    与所述通讯部分连接的集成电路部分;
    与所述集成电路部分连接的电源控制部分;
    与所述电源控制部分连接的第一蓄电单元;
    所述电源控制部分包括
    充电控制单元;
    第二蓄电单元;
    开关切换单元;
    所述开关切换单元用于与外部供电电源及所述第二蓄电单元连接,所述充电控制单元用于与所述外部供电电源及所述第一蓄电单元连接;
    其特征在于:
    所述电源控制部分还包括与所述开关切换单元连接的备用电源控制单元。
  2. 如权利要求1所述的存储芯片,其特征在于:
    所述备用电源控制单元包括互连的比较部分和控制部分;
    所述比较部分包括第一比较器和第二比较器,所述第一比较器用于比较所述外部供电电源的电压值及所述第一蓄电单元的电压值,所述第二比较器用于比较所述第一蓄电单元的电压值及所述第二蓄电单元的电压值;
    所述控制部分包括掉电延迟单元和逻辑门单元,所述掉电延迟单元用于与所述外部供电电源及所述逻辑门单元连接,所述逻辑门单元接收所述第一比较器输出的信号、所述第二比较器输出的信号以及所述掉电延迟单元输出的信号。
  3. 如权利要求2所述的存储芯片,其特征在于:
    所述掉电延迟单元包括场效应管、第三蓄电单元、电阻和反相器,所述场效应管用于与所述外部供电电源、所述第三蓄电单元的一端、所述电阻的一端及所述反相器的输入端连接,所述第三蓄电单元的另一端及所述电阻的另一端接地,所述反相器的输出端连接到所述逻辑门单元的输入端。
  4. 如权利要求3所述的存储芯片,其特征在于:
    所述逻辑门单元是逻辑与非门。
  5. 如权利要求1至4中任意一项所述的存储芯片,其特征在于:
    所述第一蓄电单元、所述第二蓄电单元及所述第三蓄电单元均是电容。
  6. 存储芯片的充电控制方法,该存储芯片包括电子模块;所述电子模块包括
    通讯部分;
    与所述通讯部分连接的集成电路部分;
    与所述集成电路部分连接的电源控制部分;
    与所述电源控制部分连接的第一蓄电单元;
    所述电源控制部分包括
    充电控制单元;
    第二蓄电单元;
    开关切换单元;
    备用电源控制单元;
    所述开关切换单元用于与所述外部供电电源及所述第二蓄电单元连接;所述充电控制单元用于与所述外部供电电源及所述第一蓄电单元连接,所述备用电源控制单元与所述开关切换单元连接;
    其特征在于:该方法包括
    在外部供电电源上电时,所述备用电源控制单元控制所述开关切换单元来打开所述外部供电电源及所述第二蓄电单元之间的通路、并关断所述第一蓄电单元与所述第二蓄电单元之间的通路;
    在所述外部供电电源掉电时,所述备用电源控制单元判断掉电时间是否短于所述第二蓄电单元供电时间的三分之一,并比较所述第一蓄电单元及所述第二蓄电单元的电压大小,
    若所述掉电时间短于所述供电时间的三分之一或所述第一蓄电单元的电压小于所述第二蓄电单元时,所述备用电源控制单元控制所述开关切换单元关断所述外部供电电源及所述第二蓄电单元之间以及所述第一蓄电单元及所述第二蓄电单元之间的通路;
    当所述掉电时间长于等于所述供电时间的三分之一且所述第一蓄电单元的电压大于等于所述第二蓄电单元时,所述备用电源控制单元控制所述开关切换单元来关断所述外部供电电源及所述第二蓄电单元之间的通路,并打开所述第一蓄电单元及所述第二蓄电单元之间的通路。
  7. 如利要求6所述存储芯片的充电控制方法,其特征在于:
    所述备用电源控制单元包括互连的比较部分和控制部分;
    所述比较部分比较所述第一蓄电单元与所述第二蓄电单元之间的电压大小,以及比较所述第一蓄电单元与所述外部供电电源的电压大小;
    所述控制部分判断外部供电电源的上电时间与掉电时间长短,根据所述判断结果及所述比较部分的比较结果,控制所述开关切换单元以打开或关断所述第一蓄电单元及所述第二蓄电单元之间的通路。
  8. 如权利要求6或7所述存储芯片的充电控制方法,其特征在于:
    所述第一蓄电单元、所述第二蓄电单元及所述第三蓄电单元均是电容。
  9. 耗材容器,包括壳体,所述壳体围成容纳耗材的腔体,
    其特征在于:
    所述壳体的外壁上安装有如权利要求1至5任一项所述的存储芯片。
  10. 成像设备,包括成像单元和耗材容器,
    其特征在于:
    所述耗材容器上安装有如权利要求1至5任一项所述的存储芯片。
PCT/CN2012/085301 2011-12-28 2012-11-27 存储芯片及存储芯片的充电控制方法、耗材容器及成像设备 WO2013097568A1 (zh)

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