WO2013075504A1 - Pfc电路、负载驱动电路以及信号控制方法 - Google Patents

Pfc电路、负载驱动电路以及信号控制方法 Download PDF

Info

Publication number
WO2013075504A1
WO2013075504A1 PCT/CN2012/078153 CN2012078153W WO2013075504A1 WO 2013075504 A1 WO2013075504 A1 WO 2013075504A1 CN 2012078153 W CN2012078153 W CN 2012078153W WO 2013075504 A1 WO2013075504 A1 WO 2013075504A1
Authority
WO
WIPO (PCT)
Prior art keywords
signal
subunit
chopping
control unit
resistor
Prior art date
Application number
PCT/CN2012/078153
Other languages
English (en)
French (fr)
Inventor
葛良安
姚晓莉
任丽君
Original Assignee
英飞特电子（杭州）股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 英飞特电子（杭州）股份有限公司 filed Critical 英飞特电子（杭州）股份有限公司
Publication of WO2013075504A1 publication Critical patent/WO2013075504A1/zh

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
    • H05B45/30—Driver circuits
    • H05B45/37—Converter circuits
    • H05B45/3725—Switched mode power supply [SMPS]
    • H05B45/385—Switched mode power supply [SMPS] using flyback topology
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B20/00—Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
    • Y02B20/30—Semiconductor lamps, e.g. solid state lamps [SSL] light emitting diodes [LED] or organic LED [OLED]

Definitions

  • the chopper dimming technology is more commonly used.
  • the dotted line is an implementation structure of the existing chopper dimmer.
  • the grid voltage Vac is applied by the chopper dimmer, the light source is loaded on the RL.
  • the voltage is the chopping voltage as shown in FIG. 2, and the phase angle ⁇ corresponding to the on-time of the transistor TRIAC in the chopper dimmer is the chopping angle of the chopping voltage.
  • the internal resistance R11 of the chopper dimmer is a variable resistor.
  • Adjusting the resistance of the variable resistor R11 can change the crest angle ⁇ . Specifically, the smaller the resistance of the variable resistor R11, the triggering on time of the transistor TRIAC The shorter, the smaller the chop angle ⁇ ; the larger the resistance of the variable resistor R11, the longer the trigger on-time of the transistor TRIAC, and the larger the chop angle ⁇ .
  • the corresponding chopping angle ⁇ is called the maximum chopping angle.
  • the corresponding chopping angle ⁇ is called the minimum chopping angle. Since the light source load RL is a resistive load, as the chopping angle ⁇ of the chopping voltage on the RL changes, the power on the load RL also changes, thereby achieving the purpose of dimming.
  • the dimming driving circuit is when the light source is an LED.
  • the load driving circuit includes: a first rectifier and a PFC circuit. After the grid voltage Vac is passed through the chopper dimmer and the first rectifier, a chopping voltage is obtained. The input voltage Vin of the PFC circuit, the input current of the PFC circuit is Iin, and the output current Io of the PFC circuit is used to drive the load.
  • the PFC circuit further includes: a current control unit, a ton control unit, and a drive control unit; wherein
  • the current control unit samples the output current Io of the PFC circuit, compares the sampling signal with the reference signal, and outputs a control signal Vr after closed loop adjustment, the change of the control signal Vr and the output current
  • the change of Io is inversely related, that is, when the output current Io decreases, the control signal Vr increases, and conversely, when the output current Io increases, the control signal Vr decreases.
  • the control signal Vr has a maximum value Vrmax, that is, when Vr is equal to Vrmax, when the output current Io continues to decrease, Vr does not increase any more.
  • the ton control unit compares the control signal Vr with a comparison signal Vp to determine the on-time ton of the main switch S1, and the drive control unit outputs the drive signal Vd according to the on-time to control the main switch S1.
  • the comparison signal Vp is a triangular wave or a sawtooth wave
  • the time at which the comparison signal Vp starts to increase is the start time of the on-time Ton of the main switch S1
  • the peak value of the comparison signal Vp is equal to the control signal.
  • the timing of the amplitude of Vr is the off time of the on-time Ton of the main switch S1, that is, when Vr is equal to Vrmax, the on-time Ton of the main switch S1 is the maximum value Ton-max.
  • the current control unit When the chopping angle ⁇ of the chopping voltage output from the chopper dimmer is zero, the current control unit operates in a closed loop state, and the output current Io of the PFC circuit is substantially constant; when the chopping angle ⁇ increases from zero, chopping The average value of the voltage is decreased, the output current Io of the PFC circuit is decreased, the sampling signal of the output current Io received by the current control unit is decreased, and the output control signal Vr is increased, and the lead of the main switch S1 is controlled by the Ton control unit.
  • the on-time Ton becomes longer, and the output current Io of the PFC circuit is kept substantially constant; when the chop angle ⁇ is increased to ax, and the control signal Vr outputted by the current control unit is increased to Vrmax, the current control unit is in the closed-loop open-loop criticality. State, ie: When the chopping angle ⁇ continues to increase from the current value ax, the average value of the chopping voltage continues to decrease, and the output current Io of the PFC circuit decreases. Since Vr is equal to Vrmax, Vr no longer increases, the main switch S1 The on-time Ton is equal to the maximum value Ton-max, and does not increase any more.
  • the current control unit is in an open-loop state, that is, the output current Io of the PFC circuit is lowered, and the current control unit cannot be made.
  • a control signal Vr output changes, and therefore, can not be changed by the main switch S1 is turned time adjustment circuit PFC output current Io. It can be seen that since the state of the current control unit corresponding to Vrmax is the closed-loop open-loop critical state, the larger the Vr is, the closer it is to the critical state.
  • the on-time Ton of the main switch S1 is constant and equal to the maximum value Ton-max, that is, when the chopper angle ⁇ continues to increase from the critical value ⁇ ⁇ , the input voltage of the PFC circuit The average value of Vin is reduced accordingly. Therefore, the output current Io of the PFC circuit is reduced, thereby achieving: In the range larger than the critical value ax, when the chopping angle ⁇ is increased, the output current Io of the PFC circuit is decreased. Small, when the chopping angle ⁇ decreases, the output current Io of the PFC circuit increases, thereby achieving dimming.
  • the chopper dimmer can achieve the dimming function only when the current control unit is in the open loop state.
  • the chopper dimmer adjusts the chopping angle ⁇ of the chopping voltage from zero to In the process of the critical value ⁇ ⁇ , the output current Io of the PFC circuit remains unchanged, which is meaningless for dimming.
  • the adjustment process at this stage is an invalid adjustment process.
  • the technical problem to be solved by the present invention is to provide a PFC circuit, a load driving circuit, and a signal control method, which can shorten the invalid adjustment process in the dimming process.
  • the embodiment of the present invention adopts the following technical solutions:
  • An embodiment of the present invention provides a PFC circuit, where an input end of the PFC circuit receives a chopping voltage, and the PFC circuit includes: a main switch tube and a Ton control unit; and the control signal of the Ton control unit is less than or equal to a maximum Within the range of values, positively correlated with the chopping angle of the chopping voltage;
  • the PFC circuit further includes:
  • a detecting compensation unit configured to detect a chopping angle of the chopping voltage, and generate a compensation signal whose amplitude is positively correlated with the chopping angle; and the comparison signal of the Ton control unit is controlled according to the compensation signal, so that the control signal is smaller than Within or equal to the maximum value, the control signal corresponding to the equal chop angle rises.
  • the detection compensation unit includes:
  • a detecting subunit for detecting a chopping angle of a chopping voltage
  • control subunit configured to control the comparison signal of the Ton control unit according to the compensation signal.
  • the control subunit is specifically configured to: superimpose the compensation signal on the comparison signal of the Ton control unit.
  • the compensation signal is a current signal;
  • the comparison signal is a sawtooth wave signal;
  • the Ton control unit includes: the constant current source is grounded through the first capacitor and the second switch tube, respectively, the first end of the first capacitor ungrounded is connected to the inverting input end of the first operational amplifier; the positive input terminal of the first operational amplifier is used Receiving a control signal;
  • the control subunit includes: two output ends of the generating subunit are respectively connected to both ends of the first capacitor.
  • the compensation signal is a voltage signal;
  • the comparison signal is a sawtooth wave signal, and the compensation signal is a level signal;
  • the Ton control unit includes: a non-inverting input of the first operational amplifier for receiving the control signal; and the control subunit includes:
  • the first input end is configured to receive the comparison signal, and the first input end is further connected to the inverting input end of the first operational amplifier through the first resistor; the output end of the compensation signal generating the subunit is connected to the inversion of the first operational amplifier through the second resistor Input.
  • the detecting subunit includes:
  • the first input terminal is grounded through the third resistor and the fourth resistor in sequence, and the second input terminal is grounded; the connection point of the third resistor and the fourth resistor is connected to the base of the first triode, and the emitter of the first triode is grounded a collector connection detecting a first output end of the subunit, and a second output end of the detecting subunit being grounded;
  • Generating subunits includes:
  • a first input end of the generating subunit is connected to the first output end of the detecting subunit, and a second input end of the generating subunit is connected to the second output end of the detecting subunit;
  • the first input end of the generating subunit is connected to the power supply voltage through the fifth resistor, and is also grounded through the second capacitor; the first input end of the generating subunit is grounded through the first diode and the third capacitor in sequence; the first diode The cathode is connected to the base of the second triode, the emitter of the second triode is grounded through the sixth resistor, the collector of the second triode is connected to the power supply voltage; and the emitter of the second triode is sequentially passed through the second The pole tube and the seventh resistor are connected to generate a compensation signal output terminal of the subunit.
  • the detecting subunit includes: the first input end is grounded through the third resistor and the fourth resistor in sequence, and the second input end is grounded; the connection point of the third resistor and the fourth resistor is connected to the base of the first triode, first The emitter of the triode is grounded, the collector is connected to the first output end of the detection subunit, and the second output end of the detection subunit is grounded;
  • Generating subunits includes:
  • a first input end of the generating subunit is connected to the first output end of the detecting subunit, and a second input end of the generating subunit is connected to the second output end of the detecting subunit;
  • the first input end of the generating subunit is connected to the power supply voltage through the fifth resistor, and is also grounded through the second capacitor; the first input end of the generating subunit is grounded through the first diode and the third capacitor in sequence; the first diode
  • the cathode is connected to the base of the second triode, the emitter of the second triode is grounded through the sixth resistor, the collector of the second triode is connected to the power supply voltage; and the emitter of the second triode is used as the generating subunit Compensation signal output.
  • the embodiment of the present invention further provides a signal control method, which is applied to a PFC circuit, where an input end of the PFC circuit receives a chopping voltage;
  • the PFC circuit includes: a main switch tube and a Ton control unit; and the Ton control unit
  • the control signal in the range of less than or equal to the maximum value, is positively correlated with the chopping angle of the chopping voltage;
  • the method includes:
  • the comparison signal of the Ton control unit is controlled according to the compensation signal such that the control signal corresponding to the equal chop angle rises within a range in which the control signal is less than or equal to the maximum value.
  • Controlling the comparison signal of the Ton control unit according to the compensation signal includes:
  • the compensation signal is superimposed on the comparison signal of the Ton control unit.
  • Embodiments of the present invention also provide a load driving circuit including the above PFC circuit.
  • the detection compensation unit detecting a chopping angle of the chopping voltage, generating a compensation signal whose amplitude is positively correlated with the chopping angle; and controlling the comparison signal of the Ton control unit according to the compensation signal; Therefore, the comparison signal in the Ton control unit is changed into a new comparison signal, so that the on-time Ton of the main switch tube is temporarily reduced, and the current control unit maintains the on-time Ton and the output current of the PFC circuit through closed-loop adjustment.
  • the control signal corresponding to the same chopping angle is raised, and the value of the control signal is raised in the closed loop state of the current control unit, that is, the invalid adjustment process in the dimming process is shortened.
  • FIG. 1 is a schematic structural diagram of an implementation of a prior art chopper dimmer
  • FIG. 2 is a schematic diagram of a chopping voltage in the prior art
  • FIG. 3 is a schematic structural view of a prior art light source load driving circuit
  • FIG. 5 is a schematic structural diagram of a circuit of a PFC circuit according to an embodiment of the present invention.
  • FIG. 6 is a schematic structural diagram of an implementation of a detection and compensation unit according to an embodiment of the present invention.
  • FIG. 7 is a schematic diagram of a specific embodiment of a first PFC circuit of the present invention.
  • FIG. 8 is a schematic diagram of a signal relationship according to an embodiment of the present invention
  • 9 is a schematic diagram of a specific embodiment of a second PFC circuit according to the present invention.
  • FIG. 10 is a schematic diagram of a signal relationship according to an embodiment of the present invention.
  • FIG. 11 is a schematic structural diagram of a circuit for detecting a subunit and a generating subunit according to an embodiment of the present invention
  • FIG. 12 is a schematic flowchart of a signal control method according to an embodiment of the present invention.
  • the chopping dimmer can only achieve the dimming function when the current control unit is in the open loop state. While the chopper dimmer adjusts the chopping angle ⁇ of the chopping voltage from zero to the critical value ax, the PFC circuit output current ⁇ remains unchanged, which is meaningless for dimming, for the user, The adjustment process at this stage is an invalid adjustment process.
  • the inventors have found through a large number of studies that reducing the critical value a x , that is, reducing the maximum chopping angle of the closed-loop state, can shorten the time that the current control unit is in the closed-loop state, thereby shortening the ineffective adjustment process. And decreasing the critical value ax, that is, reducing the maximum chopping angle of the closed-loop state, it is necessary to raise the value of the control signal Vr under the condition of equal chopping angle (because the higher the Vr, the closer to the critical state), however, due to the current The control unit works in the closed loop state.
  • an embodiment of the present invention provides a PFC circuit, a load driving circuit, and a signal control method, which can enable a control signal corresponding to an equal Chop angle in a closed loop process, that is, the control signal is less than or equal to a maximum value range. High, thereby reducing the critical value ax, achieves the object of shortening the ineffective adjustment process in the dimming process.
  • FIG. 5 it is a schematic structural diagram of a PFC circuit according to an embodiment of the present invention, where:
  • the input end of the PFC circuit 500 receives the rectified chopping voltage, that is, the input voltage
  • the PFC circuit 500 includes: a main switch S1 (not shown in FIG. 5) and a Ton control unit 510; the control signal Vr output by the Ton control unit 510 is within a range of less than or equal to a maximum value, The chopping angle of the chopping voltage is positively correlated; (wherein the positive correlation means that the larger the chopping angle ⁇ is, the larger the control signal Vr is, and the smaller the chopping angle ⁇ is, the control signal Vr is also The smaller.)
  • the PFC circuit 500 further includes:
  • the detection compensation unit 520 is configured to detect a chopping angle of the chopping voltage, generate a compensation signal whose amplitude is positively correlated with the chopping angle, and control the comparison signal of the Ton control unit according to the compensation signal to enable the control signal Within a range less than or equal to the maximum value, the control signal corresponding to the equal chop angle increases. That is, the control signal output from the current control circuit rises while the chopping angle is constant.
  • Ton control unit compares the new comparison signal with the control signal according to the new comparison signal to determine the conduction of the main switch S1. Time Ton.
  • the positive correlation means: the larger the chopping angle, the larger the parameter of the compensation signal, for example, the larger the amplitude of the compensation signal; the smaller the chopping angle, the smaller the parameter of the compensation signal, for example, the amplitude of the compensation signal is larger. small.
  • the PFC circuit 500 and the first rectifier 501 may constitute a load driving circuit, and the first rectifier 501 is configured to rectify the chopping voltage outputted by the chopper dimmer, thereby obtaining the PFC circuit 500. Input voltage Vin.
  • the two input ends of the detection and compensation unit 520 can be connected to the two output ends of the first rectifier 501 to detect the chopping angle of the chopping voltage outputted by the first rectifier 501; or
  • a second rectifier is provided, and the second rectifier rectifies the chopping voltage outputted by the chopper dimmer; and the two input ends of the detecting and compensating unit 520 are connected to the two output ends of the second rectifier, and the output of the second rectifier is The wave voltage is detected by the chopping angle.
  • the chopping voltage outputted by the chopper dimmer may be a leading edge chopping voltage, a trailing edge chopping voltage, or a front and rear chopping voltage, etc., and is not limited herein.
  • the detection and compensation unit 520 can be implemented by the following structure:
  • a detecting subunit 610 configured to detect a chopping angle of the chopping voltage
  • Generating subunit 620 configured to generate a compensation signal whose amplitude is positively correlated with the chopping angle
  • the control subunit 630 is configured to control the comparison signal of the Ton control unit according to the compensation signal.
  • control subunit 630 is specifically configured to: superimpose the compensation signal on the comparison signal of the Ton control unit.
  • the load driving circuit shown in FIG. 3 as an example, the PFC circuit and the load driving circuit of the embodiment of the present invention will be more specifically described.
  • the compensation signal may be a current signal; the comparison signal may be a sawtooth signal; at this time, as shown in FIG. 7:
  • the Ton control unit 510 includes: an output terminal of the constant current source Id is grounded through the first capacitor C1 and the second switch tube S2, and an ungrounded end of the first capacitor C1 serves as a comparison signal output terminal, and outputs a comparison signal Vp, the first capacitor C1.
  • the ungrounded end is connected to the inverting input terminal of the first operational amplifier A1; the non-inverting input terminal of the first operational amplifier A1 is used for receiving the control signal Vr, that is, connecting the output end of the current control unit;
  • the operation principle of the Ton control unit 510 is: when the second switch S2 is turned on, the voltage on the first capacitor C1 is zero, that is, the comparison signal Vp is zero, when the first When the two switch S2 is turned off, the constant current source Id is charged by the first capacitor C1, and the voltage on the first capacitor C1 increases from zero, that is, the comparison signal Vp increases from zero, when the comparison signal Vp increases to When the control signal Vr is equal to the second switching transistor S2, the comparison signal Vp outputted from the ungrounded end of the first capacitor C1 is a sawtooth wave.
  • the control subunit 630 includes: two output ends of the generating subunit 620 are respectively connected to two ends of the first capacitor C1.
  • the compensation signal generated by the generating sub-unit 620 is converted into a sawtooth wave signal in the Ton control unit 510 and is in phase with the comparison signal, specifically: by connecting the two output terminals of the generating sub-unit 620 in parallel with the first capacitor
  • the two ends of C1 are such that the generated signal generated by the generating sub-unit 620 generates the same voltage at both ends of the first capacitor C1 as the comparison signal Vp, that is, is controlled by the second switching tube S2, so that the compensation signal is first.
  • the voltage signal generated on the capacitor C1 is in phase with the comparison signal Vp, and the voltage on the first capacitor C1 is a superposition of the two, and the slope of the superimposed voltage Vp is greater than the slope of the comparison signal Vp, see FIG.
  • the compensation signal ⁇ (not shown) is converted into a voltage signal as a sawtooth wave signal Vo on the first capacitor C1 of the Ton control unit 510.
  • the signal Vp is input to the inverting input terminal of the first operational amplifier instead of the original comparison signal Vp.
  • the new comparison signal Vp compared with the current control signal Vr, obtains the on-time Ton',
  • the on-time Ton' is smaller than the on-time Ton corresponding to the comparison signal Vp.
  • the output current Io of the PFC circuit that is, the load driving circuit
  • the current control unit The sampling signal obtained by sampling the output current Io becomes smaller, and the control signal Vr outputted by the current control unit rises, thereby increasing the on-time Ton of the main switching transistor S1, maintaining the conduction time of the main switching transistor unchanged, and maintaining The output current Io of the PFC circuit (ie, the load drive circuit) does not change.
  • the dynamic adjustment of the current control unit finally causes the on-time of the main switch S1. Ton does not change, the output current Io of the PFC circuit does not change, and the control signal Vr rises. As the chopping angle increases, the control signal Vr also increases. When Vr increases to Vr-max (the corresponding chopping angle is a x ), the current control unit is about to enter the open loop state.
  • the control signal Vr in the range where the control signal Vr is less than or equal to the maximum value Vr-max, the control signal Vr corresponding to the equal chop angle ⁇ is raised, so that the crest angle is unchanged, closer to the closed-loop open-loop criticality. a state, thereby reducing the threshold (XX, shortening the ineffective adjustment process in the dimming process.
  • the compensation signal Vo may be a voltage signal; the comparison signal
  • Vp can be a sawtooth signal
  • the compensation signal V o can be a level signal
  • the Ton control unit 510 includes: a non-inverting input of the first operational amplifier A1 for receiving a control signal;
  • Control subunit 630 includes:
  • the first input terminal is configured to receive the comparison signal Vp, and the first input terminal is further connected to the inverting input end of the first operational amplifier A1 through the first resistor R1; the compensation signal output end of the generating subunit 620 is connected to the first through the second resistor R2. Inverting input of operational amplifier A1.
  • the comparison signal Vp can be obtained by the comparison signal generation subunit as shown in FIG. 7.
  • the comparison signal generation subunit includes: the output end of the constant current source Id passes through the first capacitor C1 and the second The switch tube S2 is grounded, and the ungrounded end of the first capacitor C1 serves as a comparison signal output terminal of the comparison signal generation subunit, and outputs a comparison signal Vp.
  • the compensation signal V o in the form of a voltage signal and the comparison signal Vp are superposed by the first resistor R1 and the second resistor R2 to obtain a superimposed new comparison signal Vp, which is input to the Ton control unit 510.
  • the new comparison signal Vp, DC bias The set voltage is higher than the DC bias voltage of the original comparison signal Vp, as shown in FIG.
  • the compensation signal V o is a level signal, and the broken line is a comparison signal Vp.
  • the first operational amplifier compares the new comparison signal Vp with the current control signal Vr, and the obtained on-time Ton of the main switch tube is smaller than the on-time Ton corresponding to the original comparison signal Vp, at this time, due to the current The on-time Ton' of the main switch tube becomes smaller. Therefore, the output current Io of the PFC circuit becomes smaller, the sampling signal obtained by sampling the output current Io by the current control unit becomes smaller, and the output control signal Vr rises. The pass time Ton' is increased to maintain the output current Io of the PFC circuit unchanged.
  • the dynamic adjustment of the current control unit finally makes the on-time Ton of the main switching transistor unchanged, and the output current Io of the PFC circuit does not
  • the control signal Vr is raised.
  • the control signal Vr also increases.
  • Vr increases to Vr-max the current control unit is about to enter the open loop state. That is, in the range where the control signal Vr is less than or equal to the maximum value Vr-max, the control signal Vr corresponding to the equal chop angle ⁇ is raised, so that the crest angle is unchanged, closer to the closed-loop open-loop criticality.
  • the compensation signal in the embodiment of the present invention can be obtained by the circuit structure shown in FIG. 11, that is, the detecting sub-unit 610 and the generating sub-unit 620 in the detecting and compensating unit 520 can be obtained through the circuit structure shown in FIG. .
  • FIG. 11 Refer to Figure 11:
  • Detection subunit 610 includes:
  • the first input end of the detecting subunit 610 is grounded through the third resistor R3 and the fourth resistor R4 in sequence, and the second input end of the detecting subunit is grounded, wherein the "ground” referred to herein is the output negative end of the rectifier bridge, or The input negative terminal of the PFC circuit; the connection point of the third resistor R3 and the fourth resistor R4 is connected to the base of the first transistor Q1, the emitter of the first transistor Q1 is grounded, and the collector is connected to the first of the detection subunits At the output end, the second output end of the detecting subunit is grounded;
  • the generating subunit 620 includes:
  • the first input end of the generating subunit 620 is connected to the first output end of the detecting subunit 610, and generates a sub
  • the second input end of the unit 620 is connected to the second output end of the detecting subunit 610;
  • the first input end of the generating sub-unit 620 is connected to the power supply voltage Vcc through the fifth resistor R5, and is also grounded through the second capacitor C2.
  • the first input end of the generating sub-unit 620 is grounded through the first diode D1 and the third capacitor C3 in sequence.
  • the cathode of the first diode D1 is connected to the base of the second transistor Q2, the emitter of the second transistor Q2 is grounded through the sixth resistor R6, and the collector of the second transistor Q2 is connected to the power supply voltage Vcc;
  • the two ends of the sixth resistor R6 in the subunit are generated as the two output ends of the generating subunit 620, and the output compensation signal is a voltage signal;
  • the emitter of the second transistor Q2 may be connected to one end of the series branch, and the series branch is the second diode D2 and the seventh resistor R7, at this time, the other of the series branches
  • the ground terminal of one end and the sixth resistor R6 can also serve as two output terminals of the generating subunit, and the output compensation signal is a current signal.
  • the third resistor R3 and the fourth resistor R4 are voltage dividing resistors, and the input, rectified chopping voltage is sampled, and the low voltage in the chopping voltage is passed through the first transistor Q1.
  • the flat signal is detected, and the sawtooth wave voltage is output, that is, the voltage on the second capacitor C2.
  • the peak value of the sawtooth wave voltage increases as the chopping angle increases, and the first diode D1 and the third capacitor C3 pass through.
  • the peak value is maintained, and a level signal is obtained on the third capacitor C3.
  • the value of the level signal increases with the increase of the chopping angle, and the following circuit of the second transistor Q2 is used on the sixth resistor R6.
  • the voltage signal also increases as the chop angle increases.
  • the value of the current signal output through the second diode D2 and the seventh resistor R7 also increases as the chopping angle increases.
  • the PFC circuit of the embodiment of the present invention described above may be directly used as a load driving circuit, or may be combined with a circuit such as a first rectifier to form a load driving circuit.
  • the embodiment of the present invention provides a signal control method, which can be applied to a PFC circuit, where an input end of the PFC circuit receives a chopping voltage;
  • the PFC circuit includes : a main switch tube and a ton control unit;
  • the control signal of the Ton control unit is positively correlated with a chopping angle of the chopping voltage within a range less than or equal to a maximum value;
  • the positive correlation means that the larger the chopping angle is, the larger the control signal Vr is, and the smaller the chopping angle is, the smaller the control signal Vr is.
  • the method includes:
  • Step 1201 detecting a chopping angle of a chopping voltage
  • Step 1202 Generate a compensation signal whose amplitude is positively correlated with the chopping angle
  • Step 1203 Control the comparison signal of the Ton control unit according to the compensation signal, so that the control signal corresponding to the equal chop angle is raised within the range where the control signal is less than or equal to the maximum value.
  • the controlling the comparison signal of the Ton control unit according to the compensation signal may include: superimposing the compensation signal on a comparison signal of the Ton control unit.
  • a new comparison signal is obtained by the control; after that, the Ton control unit compares the new comparison signal with the control signal according to the new comparison signal to determine the on-time Ton of the main switch S1. .
  • the chopping angle of the chopping voltage is detected, and a compensation signal having a positive correlation between the amplitude and the chopping angle is generated; and the comparison signal of the Ton control unit is controlled according to the compensation signal.
  • the comparison signal in the Ton control unit is changed into a new comparison signal, and the Ton control unit uses the new comparison signal to compare with the control signal to determine the on-time Ton of the main switch tube, and the main switch tube is caused by the rise of the comparison signal.
  • the on-time Ton temporarily becomes smaller, and the current control unit maintains the on-time Ton and the output current of the PFC circuit by closed-loop adjustment, so that the control signal corresponding to the same chopping angle rises, and the closed-loop state of the current control unit is realized.
  • the value of the control signal is raised downward, thereby reducing the threshold value ax, thereby achieving the object of shortening the ineffective adjustment process in the dimming process.

Landscapes

  • Dc-Dc Converters (AREA)

Abstract

一种PFC电路、负载驱动电路及信号控制方法。PFC电路（500）的输入端接收斩波电压，其包括主开关管（S1）、Ton控制单元（510）和检测补偿单元（520）。Ton控制单元的控制信号在小于或等于最大值范围内，与斩波电压的斩波角正相关。检测补偿单元用于检测斩波电压的斩波角，生成幅值与斩波角正相关的补偿信号，根据补偿信号对Ton控制单元的比较信号进行控制，使在控制信号小于或等于最大值范围内，相等斩波角对应的控制信号升高，从而缩短调光过程中的无效调节过程。

Description

PFC电路、 负载驱动电路以及信号控制方法 本申请要求于 2011 年 11 月 23 日提交中国专利局、 申请号为 201110376593.8、 发明名称为" PFC电路、 负载驱动电路以及信号控制方法"的 中国专利申请的优先权， 其全部内容通过引用结合在本申请中。 技术领域 本发明涉及电路领域， 尤其涉及一种 PFC 电路、 负载驱动电路及信号控 制方法。 背景技术
在照明领域，很多场合需要调节光源的亮度或颜色， 这就要求照明系统具 有调节功能。 目前较为常用的是斩波调光技术， 如图 1所示， 虚线部分为现有 的斩波调光器的一种实现结构， 电网电压 Vac经斩波调光器作用后， 光源负载 RL上的电压为如图 2所示的斩波电压，斩波调光器内晶体管 TRIAC触发导通 时间对应的相位角 α为斩波电压的斩波角。 斩波调光器内电阻 R11 为一可变 电阻， 调整可变电阻 R11 的阻值可改变斩波角 α的大小， 具体的： 可变电阻 R11 阻值越小， 晶体管 TRIAC的触发导通时间越短， 斩波角 α越小； 可变电 阻 R11阻值越大， 晶体管 TRIAC的触发导通时间越长， 斩波角 α越大。 当可 变电阻 R11调节到最大阻值时，对应的斩波角 α称为最大斩波角， 当可变电阻 R11调节到最小阻值时， 对应的斩波角 α称为最小斩波角。 由于光源负载 RL 为阻性负载， 因此随着 RL上的斩波电压的斩波角 α的变化， 负载 RL上的功 率也随之变化， 从而达到调光的目的。
但当光源负载为非电阻性光源， 需要驱动电路驱动时， 其调光原理不同于 上述原理。 如图 3所示为光源负载为 LED时的可调光驱动电路， 负载驱动电 路包括： 第一整流器和 PFC电路， 电网电压 Vac经斩波调光器、 第一整流器 后， 得到斩波电压作为 PFC电路的输入电压 Vin, PFC电路的输入电流为 Iin, PFC电路的输出电流 Io用于驱动负载。 PFC电路还包括： 电流控制单元、 ton 控制单元以及驱动控制单元； 其中，
电流控制单元对 PFC电路的输出电流 Io进行采样， 并将采样信号与基准 信号比较， 经闭环调节后输出控制信号 Vr, 该控制信号 Vr的变化与输出电流 Io的变化反相关， 即当输出电流 Io减小时， 该控制信号 Vr增大， 反之， 当输 出电流 Io增大时，该控制信号 Vr减小。且，该控制信号 Vr具有最大值 Vrmax, 即当 Vr等于 Vrmax时， 当输出电流 Io继续减小时， Vr不再增大。
ton控制单元将控制信号 Vr与一比较信号 Vp比较， 决定主开关管 S1的 导通时间 ton, 驱动控制单元根据该导通时间输出驱动信号 Vd以对主开关管 S1进行控制。 具体的， 如图 4所示， 比较信号 Vp为三角波或锯齿波， 以比较 信号 Vp开始增大的时刻为主开关管 S1导通时间 Ton的起始时刻， 以比较信 号 Vp的峰值等于控制信号 Vr的幅值的时刻为主开关管 S1导通时间 Ton的截 止时刻，即当 Vr等于 Vrmax时，主开关管 S 1的导通时间 Ton为最大值 Ton-max。
当斩波调光器输出的斩波电压的斩波角 α为零时，电流控制单元工作在闭 环状态， PFC电路的输出电流 Io基本恒定； 当斩波角 α从零增大时， 斩波电 压平均值减小， 使 PFC电路的输出电流 Io减小， 电流控制单元接收的输出电 流 Io的采样信号减小， 其输出的控制信号 Vr增大， 通过 Ton控制单元使主开 关管 S1的导通时间 Ton变长， 维持 PFC电路的输出电流 Io基本恒定； 当斩 波角 α增大到 a x, 使电流控制单元输出的控制信号 Vr增大为 Vrmax时， 电 流控制单元处于闭环开环的临界状态， 即： 当斩波角 α从当前值 a x继续增大 时， 斩波电压平均值继续减小， PFC电路的输出电流 Io降低， 由于 Vr等于 Vrmax, Vr不再增大， 主开关管 S1的导通时间 Ton等于最大值 Ton-max, 也 不再增大， 电流控制单元处于开环状态， 即 PFC电路的输出电流 Io的降低， 不能使电流控制单元输出的控制信号 Vr变化， 因此， 也不能通过改变主开关 管 S1的导通时间调节 PFC电路的输出电流 Io。 可以看出， 由于 Vrmax对应 的电流控制单元的状态为闭环开环临界状态， 所以 Vr越大越接近临界状态。
当电流控制单元处于开环状态时， 主开关管 S1的导通时间 Ton不变且等 于最大值 Ton-max, 即当斩波角 α从临界值 α χ继续增大时， PFC电路的输入 电压 Vin的平均值随之减小， 因此， PFC电路的输出电流 Io随之减小， 从而 实现： 在大于临界值 a x的范围内， 当斩波角 α增大时， PFC电路的输出电流 Io减小， 当斩波角 α减小时， PFC电路的输出电流 Io增大， 从而实现调光。
因此， 在斩波角 α变化过程中， 只有在电流控制单元处于开环状态时， 斩 波调光器才能实现调光功能。而斩波调光器将斩波电压的斩波角 α从零调节到 临界值 α χ的过程， PFC电路输出电流 Io保持不变，对于调光而言是毫无意义 的， 对于用户来讲， 此阶段的调节过程是无效调节过程。
因此， 如何缩短调光过程中的无效调节过程是需要解决的问题。 发明内容
有鉴于此， 本发明要解决的技术问题是， 提供一种 PFC 电路、 负载驱动 电路及信号控制方法， 能够缩短调光过程中的无效调节过程。 为此， 本发明实施例采用如下技术方案：
本发明实施例提供一种 PFC电路，所述 PFC电路的输入端接收斩波电压， 所述 PFC电路包括： 主开关管和 Ton控制单元； 所述 Ton控制单元的控制信 号， 在小于或等于最大值范围内， 与所述斩波电压的斩波角正相关；
所述 PFC电路还包括：
检测补偿单元， 用于检测斩波电压的斩波角， 生成幅值与斩波角正相关的 补偿信号；根据所述补偿信号对 Ton控制单元的比较信号进行控制，使在所述 控制信号小于或等于最大值范围内， 相等斩波角对应的控制信号升高。
其中， 检测补偿单元包括：
检测子单元， 用于检测斩波电压的斩波角；
生成子单元， 用于生成幅值与斩波角正相关的补偿信号；
控制子单元， 用于根据所述补偿信号对 Ton控制单元的比较信号进行控 制。
控制子单元具体用于： 将所述补偿信号叠加到 Ton控制单元的比较信号 上。
所述补偿信号为电流信号； 所述比较信号为锯齿波信号；
Ton控制单元包括： 恒流源分别通过第一电容和第二开关管接地， 第一电 容未接地的第一端连接第一运算放大器的反相输入端；第一运算放大器的正相 输入端用于接收控制信号；
控制子单元包括： 生成子单元的两个输出端分别连接第一电容的两端。 所述补偿信号为电压信号； 所述比较信号为锯齿波信号， 补偿信号为电平 信号； Ton控制单元包括： 第一运算放大器的正相输入端用于接收控制信号； 控制子单元包括：
第一输入端用于接收比较信号，第一输入端还通过第一电阻连接第一运算 放大器的反相输入端；生成子单元的补偿信号输出端通过第二电阻连接第一运 算放大器的反相输入端。
所述检测子单元包括：
第一输入端依次通过第三电阻和第四电阻接地， 第二输入端接地； 第三电 阻和第四电阻的连接点连接第一三极管的基极， 第一三极管的射极接地， 集电 极连接检测子单元的第一输出端， 检测子单元的第二输出端接地；
生成子单元包括：
生成子单元的第一输入端连接检测子单元的第一输出端，生成子单元的第 二输入端连接检测子单元的第二输出端；
生成子单元的第一输入端通过第五电阻连接电源电压，还通过第二电容接 地； 生成子单元的第一输入端依次通过第一二极管和第三电容接地； 第一二极 管的阴极连接第二三极管的基极， 第二三极管的射极通过第六电阻接地， 第二 三极管的集电极连接电源电压；第二三极管的射极依次通过第二二极管和第七 电阻连接生成子单元的补偿信号输出端。
所述检测子单元包括： 第一输入端依次通过第三电阻和第四电阻接地， 第 二输入端接地； 第三电阻和第四电阻的连接点连接第一三极管的基极，第一三 极管的射极接地， 集电极连接检测子单元的第一输出端，检测子单元的第二输 出端接地；
生成子单元包括：
生成子单元的第一输入端连接检测子单元的第一输出端，生成子单元的第 二输入端连接检测子单元的第二输出端；
生成子单元的第一输入端通过第五电阻连接电源电压，还通过第二电容接 地； 生成子单元的第一输入端依次通过第一二极管和第三电容接地； 第一二极 管的阴极连接第二三极管的基极， 第二三极管的射极通过第六电阻接地， 第二 三极管的集电极连接电源电压；第二三极管的射极作为生成子单元的补偿信号 输出端。 本发明实施例还提供一种信号控制方法， 该方法应用于 PFC电路， 所述 PFC电路的输入端接收斩波电压； 所述 PFC电路包括： 主开关管和 Ton控制 单元； 所述 Ton控制单元的控制信号， 在小于或等于最大值范围内， 与所述斩 波电压的斩波角正相关；
该方法包括：
检测斩波电压的斩波角；
生成幅值与斩波角正相关的补偿信号；
根据所述补偿信号对 Ton控制单元的比较信号进行控制，使在所述控制信 号小于或等于最大值范围内， 相等斩波角对应的控制信号升高。
根据所述补偿信号对 Ton控制单元的比较信号进行控制包括：
将所述补偿信号叠加到 Ton控制单元的比较信号上。
本发明实施例还提供一种负载驱动电路， 包括上述的 PFC电路。
对于上述技术方案的技术效果分析如下：
在 PFC电路中增加检测补偿单元， 该检测补偿单元检测斩波电压的斩波 角，生成幅值与斩波角正相关的补偿信号；根据所述补偿信号对 Ton控制单元 的比较信号进行控制； 从而将 Ton控制单元中的比较信号变为新的比较信号， 使得主开关管的导通时间 Ton暂时变小，进而电流控制单元通过闭环调节维持 导通时间 Ton和 PFC电路的输出电流不变， 使得相同斩波角对应的控制信号 升高， 实现了在电流控制单元的闭环状态下升高控制信号的值，也即缩短了调 光过程中的无效调节过程。 附图说明
图 1为现有技术斩波调光器的一种实现结构示意图；
图 2为现有技术一种斩波电压示意图；
图 3为现有技术光源负载驱动电路结构示意图；
图 4为现有技术信号关系示意图；
图 5为本发明实施例 PFC电路的电路结构示意图；
图 6为本发明实施例检测补偿单元的实现结构示意图；
图 7为本发明第一种 PFC电路的具体实施例示意图；
图 8为本发明实施例信号关系示意图； 图 9为本发明第二种 PFC电路的具体实施例示意图；
图 10为本发明实施例信号关系示意图；
图 11为本发明实施例检测子单元和生成子单元的电路实现结构示意图； 图 12为本发明实施例信号控制方法流程示意图。 具体实施方式
在斩波角 α变化过程中， 只有在电流控制单元处于开环状态时， 斩波调光 器才能实现调光功能。而斩波调光器将斩波电压的斩波角 α从零调节到临界值 a x的过程， PFC电路输出电流 Ιο保持不变， 对于调光而言是毫无意义的， 对 于用户来讲， 此阶段的调节过程是无效调节过程。
发明人经过大量研究发现， 减小临界值 a x, 即减小闭环状态的最大斩波 角即可以缩短电流控制单元处于闭环状态的时间， 进而缩短无效调节过程。 而 减小临界值 a x, 即减小闭环状态的最大斩波角， 需要在相等的斩波角条件下， 升高控制信号 Vr的值（因为 Vr越高越接近临界状态）， 但是， 由于电流控制 单元工作在闭环状态， 因此， 直接升高控制信号 Vr 的值， 会使主开关管 S1 的导通时间 Ton也暂时升高， PFC电路的输出电流 Io升高， 电流控制单元的 输出电流采样值升高， 使其输出的控制信号 Vr降低， 因此， 直接升高控制信 号 Vr不能使在较小的斩波角 a x下进入临界状态。
因此， 本发明实施例提供一种 PFC电路、 负载驱动电路及信号控制方法， 能够使得在闭环过程中，也即所述控制信号小于或等于最大值范围内，相等斩 波角对应的控制信号升高， 从而减小临界值 a x, 实现缩短调光过程中的无效 调节过程的发明目的。
以下， 结合附图详细说明本发明实施例 PFC 电路、 负载驱动电路及电流 控制方法的实现。
参见图 5, 为本发明实施例一种 PFC电路结构示意图， 其中：
所述 PFC电路 500的输入端接收整流后的斩波电压， 也即所述输入电压
Vin; 所述 PFC电路 500包括： 主开关管 S1 (图 5中未示出 )和 Ton控制单元 510;所述 Ton控制单元 510输出的控制信号 Vr,在小于或等于最大值范围内， 与所述斩波电压的斩波角正相关； （其中， 所述正相关是指： 斩波角 α越大， 所述控制信号 Vr也越大， 斩波角 α越小， 所述控制信号 Vr也越小。） 所述 PFC电路 500还包括：
检测补偿单元 520, 用于检测斩波电压的斩波角， 生成幅值与斩波角正相 关的补偿信号；根据所述补偿信号对 Ton控制单元的比较信号进行控制，使在 所述控制信号小于或等于最大值范围内，相等斩波角对应的控制信号升高。也 即， 使得在斩波角不变下， 电流控制电路输出的控制信号升高。
进而， 通过检测补偿单元 520对比较信号的控制， 将得到新的比较信号， 而 Ton控制单元将根据新的比较信号， 对新的比较信号与控制信号进行比较， 确定主开关管 S1的导通时间 Ton。
这里， 所述正相关是指： 斩波角越大， 补偿信号的参数越大， 例如补偿信 号幅值越大； 斩波角越小， 则补偿信号的参数越小， 例如补偿信号幅值越小。
优选的，如图 5所示， PFC电路 500和第一整流器 501可以构成负载驱动 电路， 该第一整流器 501用于对斩波调光器输出的斩波电压进行整流，从而得 到 PFC电路 500的输入电压 Vin。
其中，如图 5所示，检测补偿单元 520的两个输入端可以连接第一整流器 501的两个输出端， 对第一整流器 501输出的斩波电压进行斩波角的检测； 或者，也可以另外设置第二整流器， 第二整流器对斩波调光器输出的斩波 电压进行整流；而检测补偿单元 520的两个输入端连接第二整流器的两个输出 端， 对第二整流器输出的斩波电压进行斩波角的检测。
本发明实施例中， 斩波调光器输出的斩波电压可以为前沿斩波电压、后沿 斩波电压或者前后沿斩波电压等， 这里不限制。 如图 6所示， 所述检测补偿单元 520可以通过以下结构实现：
检测子单元 610, 用于检测斩波电压的斩波角；
生成子单元 620, 用于生成幅值与斩波角正相关的补偿信号；
控制子单元 630, 用于根据所述补偿信号对 Ton控制单元的比较信号进行 控制。
优选地，控制子单元 630具体可以用于： 将所述补偿信号叠加到 Ton控制 单元的比较信号上。 以图 3所示的负载驱动电路为例， 对本发明实施例的 PFC电路和负载驱 动电路进行更为具体的说明。
在一种具体实施例中， 所述补偿信号可以为电流信号； 比较信号可以为锯 齿波信号； 此时， 如图 7所示：
Ton控制单元 510包括： 恒流源 Id的输出端分别通过第一电容 C1和第二 开关管 S2接地， 第一电容 C1未接地的一端作为比较信号输出端， 输出比较 信号 Vp, 第一电容 C1未接地的一端连接第一运算放大器 A1的反相输入端； 第一运算放大器 A1的正相输入端用于接收控制信号 Vr,也即连接电流控制单 元的输出端；
其中， 在不包含控制子单元 630时， Ton控制单元 510的工作原理为： 当 第二开关管 S2导通时， 第一电容 C1上的电压为零， 也即比较信号 Vp为零， 当第二开关管 S2关断时， 恒流源 Id为第一电容 C1充电， 第一电容 C1上的 电压从零开始增大， 也即比较信号 Vp从零开始增大， 当比较信号 Vp增大到 与控制信号 Vr相等时， 第二开关管 S2导通， 因此， 第一电容 C1未接地的一 端输出的比较信号 Vp为锯齿波。
如图 7所示，控制子单元 630包括： 生成子单元 620的两个输出端分别连 接第一电容 C1的两端。 从而， 生成子单元 620生成的补偿信号在 Ton控制单 元 510中转换为锯齿波信号， 且与所述比较信号同相位， 具体的： 通过将生成 子单元 620的两个输出端并联在第一电容 C1的两端， 使得生成子单元 620输 出的补偿信号在第一电容 C1的两端产生的电压与比较信号 Vp的产生原理相 同， 即都由第二开关管 S2控制， 使得补偿信号在第一电容 C1上产生的电压 信号与比较信号 Vp同相位， 并且在第一电容 C1上的电压为二者的叠加， 且 叠加后的电压 Vp，的斜率大于比较信号 Vp的斜率， 参照图 8。
在图 7所示的电路结构下， 如图 8所示， 补偿信号 Ι α (图中未示出）在 Ton控制单元 510的第一电容 C1上转换为一个电压信号为锯齿波信号 V o , 虚线为比较信号 Vp, 补偿信号 Ι α产生的锯齿波信号 V o与比较信号 Vp叠加 后， 得到新的比较信号 Vp，=Vp+V o , 波形如图中实线所示， 而新的比较信号 Vp，将代替原来的比较信号 Vp输入到第一运算放大器的反相输入端。
新的比较信号 Vp，， 与当前的控制信号 Vr比较后， 得到导通时间 Ton' , 该导通时间 Ton'小于比较信号 Vp对应的导通时间 Ton,此时，由于当前的 Ton' 变小， 因此， PFC电路（也即负载驱动电路） 的输出电流 Io会变小， 电流控 制单元对输出电流 Io采样得到的采样信号变小， 电流控制单元输出的控制信 号 Vr升高， 进而使主开关管 S1的导通时间 Ton，增大， 维持主开关管的导通 时间不变， 维持 PFC电路（也即负载驱动电路） 的输出电流 Io不变。
因此， 在斩波角 α不变的情况下， 当比较信号从 Vp 变为新的比较信号 Vp' , 输入 Ton控制单元 510后， 电流控制单元的动态调节最终使主开关管 S1 的导通时间 Ton不变， PFC电路的输出电流 Io不变， 而使控制信号 Vr升高。 随着斩波角 的增大，控制信号 Vr也会随之增大， 当 Vr增大至 Vr-max时（对 应的斩波角为 a x ), 电流控制单元即将进入开环状态。 也即， 使在所述控制信 号 Vr小于或等于最大值 Vr-max的范围内， 相等斩波角 α对应的控制信号 Vr 升高， 使得在斩波角不变下， 更接近闭环开环临界状态， 从而减小临界值 (X X , 缩短了调光过程中的无效调节过程。 在另一种实施例中， 所述补偿信号 V o可以为电压信号； 所述比较信号
Vp可以为锯齿波信号， 补偿信号 V o可以为电平信号； 此时， 如图 9所示：
Ton控制单元 510包括： 第一运算放大器 A1的正相输入端用于接收控制 信号；
控制子单元 630包括：
第一输入端用于接收比较信号 Vp, 第一输入端还通过第一电阻 R1 连接 第一运算放大器 A1的反相输入端； 生成子单元 620的补偿信号输出端通过第 二电阻 R2连接第一运算放大器 A1的反相输入端。
其中， 所述比较信号 Vp可以通过如图 7中所示的比较信号生成子单元获 得， 具体的， 该比较信号生成子单元包括： 恒流源 Id的输出端分别通过第一 电容 C1和第二开关管 S2接地，第一电容 C1未接地的一端作为比较信号生成 子单元的比较信号输出端， 输出比较信号 Vp。
在图 9中， 将电压信号形式的补偿信号 V o与比较信号 Vp, 通过第一电 阻 R1和第二电阻 R2叠加， 得到叠加后的新的比较信号 Vp，， 输入到 Ton控 制单元 510中第一运算放大器的反相输入端。 且， 新的比较信号 Vp，的直流偏 置电压高于原来的比较信号 Vp的直流偏置电压， 参照图 10。
在图 10中， 补偿信号 V o为电平信号， 虚线为比较信号 Vp, 补偿信号 V α与比较信号 Vp叠加后， 得到新的比较信号 Vp，=Vp+V α , 波形如图中实线 所示， 其直流偏置电压升高。
第一运算放大器将新的比较信号 Vp，与当前的控制信号 Vr比较， 得出的 主开关管的导通时间 Ton，小于原来的比较信号 Vp对应的导通时间 Ton,此时， 由于当前的主开关管的导通时间 Ton'变小， 因此， PFC电路的输出电流 Io会 变小， 电流控制单元对输出电流 Io采样得到的采样信号变小， 其输出的控制 信号 Vr升高， 使导通时间 Ton'增大， 从而维持 PFC电路的输出电流 Io不变。
因此， 在斩波角 α不变的情况下， 当比较信号从 Vp变为 Vp，后， 电流控 制单元的动态调节最终使主开关管的导通时间 Ton不变， PFC电路的输出电流 Io不变， 而使控制信号 Vr升高。 随着斩波角 α的增大， 控制信号 Vr也会随之 增大， 当 Vr增大至 Vr-max时， 电流控制单元即将进入开环状态。 也即， 使在 所述控制信号 Vr小于或等于最大值 Vr-max的范围内，相等斩波角 α对应的控 制信号 Vr升高， 使得在斩波角不变下， 更接近闭环开环临界状态， 从而减小 临界值 (X X , 缩短了调光过程中的无效调节过程。
其中，本发明实施例中的补偿信号可以通过如图 11所示的电路结构获得， 也即检测补偿单元 520中的检测子单元 610和生成子单元 620可以通过如图 11所示的电路结构获得。 参照图 11 :
检测子单元 610包括：
检测子单元 610的第一输入端依次通过第三电阻 R3和第四电阻 R4接地， 检测子单元的第二输入端接地，其中，这里所指的 "地"为整流桥的输出负端， 或 PFC电路的输入负端； 第三电阻 R3和第四电阻 R4的连接点连接第一三极 管 Q1的基极， 第一三极管 Q1的射极接地， 集电极连接检测子单元的第一输 出端， 检测子单元的第二输出端接地；
生成子单元 620包括：
生成子单元 620的第一输入端连接检测子单元 610的第一输出端，生成子 单元 620的第二输入端连接检测子单元 610的第二输出端；
生成子单元 620的第一输入端通过第五电阻 R5连接电源电压 Vcc, 还通 过第二电容 C2接地； 生成子单元 620的第一输入端依次通过第一二极管 D1 和第三电容 C3接地； 第一二极管 D1的阴极连接第二三极管 Q2的基极，第二 三极管 Q2的射极通过第六电阻 R6接地，第二三极管 Q2的集电极连接电源电 压 Vcc;
此时，生成子单元中第六电阻 R6两端作为生成子单元 620的两个输出端， 输出的补偿信号为电压信号；
或者， 如图 11所示， 第二三极管 Q2的射极可以连接串联支路的一端， 该串联支路为第二二极管 D2和第七电阻 R7, 此时， 串联支路的另一端以及 第六电阻 R6的接地端也可以作为生成子单元的两个输出端， 此时输出的补偿 信号为电流信号。
图 11所示的电路中，第三电阻 R3和第四电阻 R4为分压电阻，对输入的、 整流后的斩波电压进行采样， 通过第一三极管 Q1将斩波电压中的低电平信号 检测出来， 输出锯齿波电压， 即第二电容 C2上的电压， 该锯齿波电压的峰值 随着斩波角的增大而增大， 通过第一二极管 D1和第三电容 C3的峰值保持， 在第三电容 C3上得到一个电平信号， 该电平信号的值随着斩波角的增大而增 大， 通过第二三极管 Q2的跟随电路， 在第六电阻 R6上的电压信号， 也随着 斩波角的增大而增大。 通过第二二极管 D2和第七电阻 R7输出的电流信号的 值也随着斩波角的增大而增大。 上述的本发明实施例 PFC 电路可以直接作为负载驱动电路， 或者， 也可 以与第一整流器等电路组合， 共同构成负载驱动电路。 与上述的 PFC电路和负载驱动电路相对应的， 本发明实施例提供一种信 号控制方法， 该方法可以应用于 PFC电路中， 所述 PFC电路的输入端接收斩 波电压； 所述 PFC电路包括： 主开关管和 ton控制单元； 所述 Ton控制单元的 控制信号，在小于或等于最大值范围内，与所述斩波电压的斩波角正相关；（其 中， 所述正相关是指： 斩波角越大， 所述控制信号 Vr也越大， 斩波角越小， 所述控制信号 Vr也越小。 )
如图 12所示， 该方法包括：
步骤 1201 : 检测斩波电压的斩波角；
步骤 1202: 生成幅值与斩波角正相关的补偿信号；
步骤 1203: 根据所述补偿信号对 Ton控制单元的比较信号进行控制， 使 在所述控制信号小于或等于最大值范围内， 相等斩波角对应的控制信号升高。
优选地，所述根据所述补偿信号对 Ton控制单元的比较信号进行控制可以 包括： 将所述补偿信号叠加到 Ton控制单元的比较信号上。
进而， 步骤 1203中， 通过所述控制将得到新的比较信号； 之后， Ton控 制单元将根据新的比较信号，将新的比较信号与控制信号进行比较，确定主开 关管 S1的导通时间 Ton。
基于以上实施例，检测斩波电压的斩波角， 生成幅值与斩波角正相关的补 偿信号； 根据所述补偿信号对 Ton控制单元的比较信号进行控制。 从而将 Ton 控制单元中的比较信号变为新的比较信号， Ton控制单元使用新的比较信号与 控制信号比较， 确定主开关管的导通时间 Ton, 由于比较信号的升高使得主开 关管的导通时间 Ton暂时变小，进而电流控制单元通过闭环调节维持导通时间 Ton和 PFC电路的输出电流不变，使得相同斩波角对应的控制信号升高， 实现 了在电流控制单元的闭环状态下升高控制信号的值， 从而减小临界值 a x, 实 现缩短调光过程中的无效调节过程的发明目的。
以上所述仅是本发明的优选实施方式，应当指出，对于本技术领域的普通 技术人员来说， 在不脱离本发明原理的前提下， 还可以做出若干改进和润饰， 这些改进和润饰也应视为本发明的保护范围。

Claims

权 利 要 求
1、 一种 PFC电路， 其特征在于， 所述 PFC电路的输入端接收斩波电压， 所述 PFC电路包括： 主开关管和 Ton控制单元； 所述 Ton控制单元的控制信 号， 在小于或等于最大值范围内， 与所述斩波电压的斩波角正相关；
所述 PFC电路还包括：
检测补偿单元， 用于检测斩波电压的斩波角， 生成幅值与斩波角正相关的 补偿信号；根据所述补偿信号对 Ton控制单元的比较信号进行控制，使在所述 控制信号小于或等于最大值范围内， 相等斩波角对应的控制信号升高。
2、 根据权利要求 1所述的电路， 其特征在于， 检测补偿单元包括： 检测子单元， 用于检测斩波电压的斩波角；
生成子单元， 用于生成幅值与斩波角正相关的补偿信号；
控制子单元， 用于根据所述补偿信号对 Ton控制单元的比较信号进行控 制。
3、 根据权利要求 2所述的电路， 其特征在于， 控制子单元具体用于： 将 所述补偿信号叠加到 Ton控制单元的比较信号上。
4、根据权利要求 3所述的电路， 其特征在于， 所述补偿信号为电流信号； 所述比较信号为锯齿波信号；
Ton控制单元包括： 恒流源分别通过第一电容和第二开关管接地， 第一电 容未接地的第一端连接第一运算放大器的反相输入端；第一运算放大器的正相 输入端用于接收控制信号；
控制子单元包括： 生成子单元的两个输出端分别连接第一电容的两端。
5、 根据权利要求 3所述的电路， 其特征在于， 所述补偿信号为电压信号； 所述比较信号为锯齿波信号， 补偿信号为电平信号；
Ton控制单元包括： 第一运算放大器的正相输入端用于接收控制信号； 控制子单元包括：
第一输入端用于接收比较信号，第一输入端还通过第一电阻连接第一运算 放大器的反相输入端；生成子单元的补偿信号输出端通过第二电阻连接第一运 算放大器的反相输入端。
6、 根据权利要求 4所述的电路， 其特征在于， 所述检测子单元包括： 第一输入端依次通过第三电阻和第四电阻接地， 第二输入端接地； 第三电 阻和第四电阻的连接点连接第一三极管的基极， 第一三极管的射极接地， 集电 极连接检测子单元的第一输出端， 检测子单元的第二输出端接地；
生成子单元包括：
生成子单元的第一输入端连接检测子单元的第一输出端，生成子单元的第 二输入端连接检测子单元的第二输出端；
生成子单元的第一输入端通过第五电阻连接电源电压，还通过第二电容接 地； 生成子单元的第一输入端依次通过第一二极管和第三电容接地； 第一二极 管的阴极连接第二三极管的基极， 第二三极管的射极通过第六电阻接地， 第二 三极管的集电极连接电源电压；第二三极管的射极依次通过第二二极管和第七 电阻连接生成子单元的补偿信号输出端。
7、 根据权利要求 5所述的电路， 其特征在于， 所述检测子单元包括： 第 一输入端依次通过第三电阻和第四电阻接地， 第二输入端接地； 第三电阻和第 四电阻的连接点连接第一三极管的基极， 第一三极管的射极接地， 集电极连接 检测子单元的第一输出端， 检测子单元的第二输出端接地；
生成子单元包括：
生成子单元的第一输入端连接检测子单元的第一输出端，生成子单元的第 二输入端连接检测子单元的第二输出端；
生成子单元的第一输入端通过第五电阻连接电源电压，还通过第二电容接 地； 生成子单元的第一输入端依次通过第一二极管和第三电容接地； 第一二极 管的阴极连接第二三极管的基极， 第二三极管的射极通过第六电阻接地， 第二 三极管的集电极连接电源电压；第二三极管的射极作为生成子单元的补偿信号 输出端。
8、 一种信号控制方法， 其特征在于， 该方法应用于 PFC电路， 所述 PFC 电路的输入端接收斩波电压； 所述 PFC电路包括： 主开关管和 Ton控制单元； 所述 Ton控制单元的控制信号，在小于或等于最大值范围内， 与所述斩波电压 的斩波角正相关；
该方法包括： 检测斩波电压的斩波角；
生成幅值与斩波角正相关的补偿信号；
根据所述补偿信号对 Ton控制单元的比较信号进行控制，使在所述控制信 号小于或等于最大值范围内， 相等斩波角对应的控制信号升高。
9、 根据权利要求 8所述的方法， 其特征在于， 根据所述补偿信号对 Ton 控制单元的比较信号进行控制包括：
将所述补偿信号叠加到 Ton控制单元的比较信号上。
10、 一种负载驱动电路， 其特征在于， 包括权利要求 1至 7任一项所述的 PFC电路。
PCT/CN2012/078153 2011-11-23 2012-07-04 Pfc电路、负载驱动电路以及信号控制方法 WO2013075504A1 (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201110376593.8 2011-11-23
CN201110376593.8A CN103138556B (zh) 2011-11-23 2011-11-23 Pfc电路、负载驱动电路以及信号控制方法

Publications (1)

Publication Number Publication Date
WO2013075504A1 true WO2013075504A1 (zh) 2013-05-30

Family

ID=48469077

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2012/078153 WO2013075504A1 (zh) 2011-11-23 2012-07-04 Pfc电路、负载驱动电路以及信号控制方法

Country Status (2)

Country Link
CN (1) CN103138556B (zh)
WO (1) WO2013075504A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104219855A (zh) * 2014-09-28 2014-12-17 广东工业大学 基于apfc的无频闪led恒流驱动控制电路

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104780670A (zh) * 2015-03-30 2015-07-15 成都颉隆科技有限公司 一种智能电网变频节能控制系统
CN104797041A (zh) * 2015-03-30 2015-07-22 成都颉隆科技有限公司 一种自举触发式智能电网变频节能控制系统

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101686587A (zh) * 2008-09-25 2010-03-31 皇家飞利浦电子股份有限公司 用于向led阵列提供可变功率的驱动器
US20110037399A1 (en) * 2009-08-13 2011-02-17 Novatek Microelectronics Corp. Dimmer circuit of light emitting diode and isolated voltage generator and dimmer method thereof
CN102143638A (zh) * 2011-04-08 2011-08-03 杭州矽力杰半导体技术有限公司 一种可控硅调光电路、调光方法以及应用其的一种led驱动器
CN201995174U (zh) * 2011-01-28 2011-09-28 英飞特电子（杭州）有限公司 一种后沿小相角调光电路
CN102238777A (zh) * 2010-05-07 2011-11-09 惠州元晖光电有限公司 用于led的三端双向可控硅可调光电源单元

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2791273B2 (ja) * 1993-09-07 1998-08-27 株式会社東芝 電力変換装置
US8242766B2 (en) * 2010-04-20 2012-08-14 Power Integrations, Inc. Dimming control for a switching power supply

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101686587A (zh) * 2008-09-25 2010-03-31 皇家飞利浦电子股份有限公司 用于向led阵列提供可变功率的驱动器
US20110037399A1 (en) * 2009-08-13 2011-02-17 Novatek Microelectronics Corp. Dimmer circuit of light emitting diode and isolated voltage generator and dimmer method thereof
CN102238777A (zh) * 2010-05-07 2011-11-09 惠州元晖光电有限公司 用于led的三端双向可控硅可调光电源单元
CN201995174U (zh) * 2011-01-28 2011-09-28 英飞特电子（杭州）有限公司 一种后沿小相角调光电路
CN102143638A (zh) * 2011-04-08 2011-08-03 杭州矽力杰半导体技术有限公司 一种可控硅调光电路、调光方法以及应用其的一种led驱动器

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104219855A (zh) * 2014-09-28 2014-12-17 广东工业大学 基于apfc的无频闪led恒流驱动控制电路
CN104219855B (zh) * 2014-09-28 2017-03-29 广东工业大学 基于apfc的无频闪led恒流驱动控制电路

Also Published As

Publication number Publication date
CN103138556A (zh) 2013-06-05
CN103138556B (zh) 2015-08-19

Similar Documents

Publication Publication Date Title
US11317483B2 (en) Apparatus, dimmable light emitting diode drive circuit and control method
US11316421B2 (en) Apparatus, dimmable light emitting diode driver and control method
US9055629B2 (en) SCR dimming circuit and method
TWI630842B (zh) System for LED switch control
EP2387294B1 (en) Method and device for obtaining conduction angle, method and device for driving LED
TWI524818B (zh) Use the TRIAC dimmer dimming control system and method
US7265498B2 (en) Dimmer control system and controlling method thereof
CN110545605B (zh) 集成电路、可调光led驱动电路及其驱动方法
EP3675603A1 (en) Driving circuit and driving method for driving light emitting diode load
TW201521514A (zh) 半導體發光器件組的驅動裝置及方法
WO2013075504A1 (zh) Pfc电路、负载驱动电路以及信号控制方法
WO2012024383A2 (en) Method of controlling an operating frequency of an inverter circuit in an electronic dimming ballast
WO2019233489A1 (zh) 一种可调光led驱动电路及控制方法
US9449546B2 (en) LED driver, LED driving method and controller for LED driver
CN110602822A (zh) Led驱动电路及其调光控制方法
TWI501514B (zh) A system and method for enhancing the dynamic response of a power conversion system
US20150163874A1 (en) Multi-mode controller circuit
CN110035579B (zh) 兼容可控硅调光器的高功率因数无频闪线性控制方法及所用控制装置
WO2013075503A1 (zh) Pfc电路、负载驱动电路及电流控制方法
CN210725418U (zh) Led驱动电路
WO2012113201A1 (zh) 一种辅助源电路
US11805581B2 (en) Buffer circuit for light emitting diode (LED) drive circuit, and LED drive circuit and control method thereof
CN215420105U (zh) 自适应检火电压产生电路及检火设备
TW201251512A (en) Ballast with control device for controlling the open-circuit voltage
TWI704771B (zh) 暫態增強電路與使用該暫態增強電路的恆定導通時間轉換器

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 12851096

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: NOTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC (EPO FORM 1205A DATED 05/11/2014)

122 Ep: pct application non-entry in european phase

Ref document number: 12851096

Country of ref document: EP

Kind code of ref document: A1