WO2013057456A3 - Procede de realisation d'un reseau organise de nanofils semi - conducteurs en zno - Google Patents

Procede de realisation d'un reseau organise de nanofils semi - conducteurs en zno Download PDF

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Publication number
WO2013057456A3
WO2013057456A3 PCT/FR2012/052404 FR2012052404W WO2013057456A3 WO 2013057456 A3 WO2013057456 A3 WO 2013057456A3 FR 2012052404 W FR2012052404 W FR 2012052404W WO 2013057456 A3 WO2013057456 A3 WO 2013057456A3
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WO
WIPO (PCT)
Prior art keywords
zno
producing
semiconductor nanowires
nanowires made
organised network
Prior art date
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PCT/FR2012/052404
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English (en)
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WO2013057456A2 (fr
Inventor
Robin THIERRY
Pierre Ferret
Matthieu LAFOSSAS
Guillaume PERILLAT-MERCEROZ
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Commissariat A L'energie Atomique Et Aux Energies Alternatives
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Application filed by Commissariat A L'energie Atomique Et Aux Energies Alternatives filed Critical Commissariat A L'energie Atomique Et Aux Energies Alternatives
Priority to EP12787788.4A priority Critical patent/EP2769416A2/fr
Publication of WO2013057456A2 publication Critical patent/WO2013057456A2/fr
Publication of WO2013057456A3 publication Critical patent/WO2013057456A3/fr
Priority to US14/225,854 priority patent/US20140202378A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639—Preparation of substrate for selective deposition
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y30/00—Nanotechnology for materials or surface science, e.g. nanocomposites
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y40/00—Manufacture or treatment of nanostructures
    • H—ELECTRICITY
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/0242—Crystalline insulating materials
    • H—ELECTRICITY
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02469—Group 12/16 materials
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    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02502—Layer structure consisting of two layers
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    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
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    • H01L21/02587—Structure
    • H01L21/0259—Microstructure
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    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
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    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
    • H01L29/0665—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body the shape of the body defining a nanostructure
    • H01L29/0669—Nanowires or nanotubes
    • H01L29/0676—Nanowires or nanotubes oriented perpendicular or at an angle to a substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/22—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIBVI compounds
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    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0083—Processes for devices with an active region comprising only II-VI compounds
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S977/00—Nanotechnology
    • Y10S977/84—Manufacture, treatment, or detection of nanostructure
    • Y10S977/89—Deposition of materials, e.g. coating, cvd, or ald
    • Y10S977/891—Vapor phase deposition

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Nanotechnology (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Composite Materials (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Inorganic Compounds Of Heavy Metals (AREA)

Abstract

Ce procédé de réalisation d'un réseau organisé de nanofïls en ZnO comprend les étapes suivantes : obtention, sur un substrat (5), d'une couche (1) en ZnO de polarité Zn, par croissance épitaxiale à basse température, avantageusement comprise entre 400°C et 650°C, et avantageusement en présence de dioxygène (O2); formation, sur cette couche, d'un masque (2) doté d'ouvertures (3) pour la croissance ultérieure des nanofïls; croissance épitaxiale des nanofïls en ZnO (4).
PCT/FR2012/052404 2011-10-21 2012-10-19 PROCEDE DE REALISATION D'UN RESEAU ORGANISE DE NANOFILS SEMI-CONDUCTEURS, EN PARTICULIER EN ZnO WO2013057456A2 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
EP12787788.4A EP2769416A2 (fr) 2011-10-21 2012-10-19 Procede de realisation d'un reseau organise de nanofils semi-conducteurs en zno
US14/225,854 US20140202378A1 (en) 2011-10-21 2014-03-26 METHOD FOR PRODUCING AN ORGANISED NETWORK OF SEMICONDUCTOR NANOWIRES, IN PARTICULAR MADE OF ZnO

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1159540 2011-10-21
FR1159540A FR2981794B1 (fr) 2011-10-21 2011-10-21 Procede de realisation d'un reseau organise de nanofils semiconducteurs, en particulier en zno

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US14/225,854 Continuation US20140202378A1 (en) 2011-10-21 2014-03-26 METHOD FOR PRODUCING AN ORGANISED NETWORK OF SEMICONDUCTOR NANOWIRES, IN PARTICULAR MADE OF ZnO

Publications (2)

Publication Number Publication Date
WO2013057456A2 WO2013057456A2 (fr) 2013-04-25
WO2013057456A3 true WO2013057456A3 (fr) 2013-10-24

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PCT/FR2012/052404 WO2013057456A2 (fr) 2011-10-21 2012-10-19 PROCEDE DE REALISATION D'UN RESEAU ORGANISE DE NANOFILS SEMI-CONDUCTEURS, EN PARTICULIER EN ZnO

Country Status (4)

Country Link
US (1) US20140202378A1 (fr)
EP (1) EP2769416A2 (fr)
FR (1) FR2981794B1 (fr)
WO (1) WO2013057456A2 (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9653288B1 (en) * 2015-11-16 2017-05-16 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming ultra-thin nanowires
US10319553B2 (en) 2016-03-16 2019-06-11 Lightlab Sweden Ab Method for controllably growing ZnO Nanowires

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007032598A1 (fr) * 2005-07-20 2007-03-22 Postech Foundation Procedes pour fabriquer une nanostructure d'oxyde de zinc et dispositifs associes
US20090068411A1 (en) * 2007-09-11 2009-03-12 Postech Academy-Industry Foundation Nanodevice Comprising a Nanorod and Method for Manufacturing the Same

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011521477A (ja) * 2008-05-21 2011-07-21 ルーメンズ， インコーポレイテッド 酸化亜鉛系エピタキシャルの層およびデバイス
US7960292B2 (en) * 2009-05-02 2011-06-14 Atomic Energy Council-Institute Of Nuclear Energy Research Method of fabricating zinc oxide film having matching crystal orientation to silicon substrate

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007032598A1 (fr) * 2005-07-20 2007-03-22 Postech Foundation Procedes pour fabriquer une nanostructure d'oxyde de zinc et dispositifs associes
US20090068411A1 (en) * 2007-09-11 2009-03-12 Postech Academy-Industry Foundation Nanodevice Comprising a Nanorod and Method for Manufacturing the Same

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
LAI Y ET AL: "One-step synthesis, characterizations and mechanistic study of nanosheets-constructed fluffy ZnO and Ag/ZnO spheres used for Rhodamine B photodegradation", APPLIED CATALYSIS B: ENVIRONMENTAL, ELSEVIER, AMSTERDAM, NL, vol. 100, no. 3-4, 20 October 2010 (2010-10-20), pages 491 - 501, XP027409626, ISSN: 0926-3373, [retrieved on 20100927] *
SANG HYUN LEE ET AL: "Ordered Arrays of ZnO Nanorods Grown on Periodically Polarity-Inverted Surfaces", NANO LETTERS, vol. 8, no. 8, 1 August 2008 (2008-08-01), pages 2419 - 2422, XP055031027, ISSN: 1530-6984, DOI: 10.1021/nl801344s *
SHENG XU ET AL: "Patterned Growth of Vertically Aligned ZnO Nanowire Arrays on Inorganic Substrates at Low Temperature without Catalyst", JOURNAL OF THE AMERICAN CHEMICAL SOCIETY, vol. 130, no. 45, 12 November 2008 (2008-11-12), pages 14958 - 14959, XP055031028, ISSN: 0002-7863, DOI: 10.1021/ja806952j *
WANG D ET AL: "Novel diode-shaped ZnO nanocrystals", MATERIALS LETTERS, NORTH HOLLAND PUBLISHING COMPANY. AMSTERDAM, NL, vol. 63, no. 3-4, 15 February 2009 (2009-02-15), pages 370 - 372, XP025814851, ISSN: 0167-577X, [retrieved on 20081029], DOI: 10.1016/J.MATLET.2008.10.039 *

Also Published As

Publication number Publication date
EP2769416A2 (fr) 2014-08-27
FR2981794B1 (fr) 2013-11-01
WO2013057456A2 (fr) 2013-04-25
US20140202378A1 (en) 2014-07-24
FR2981794A1 (fr) 2013-04-26

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