Classifications

• • G—PHYSICS
  • G06—COMPUTING OR CALCULATING; COUNTING
  • G06F—ELECTRIC DIGITAL DATA PROCESSING
  • G06F9/00—Arrangements for program control, e.g. control units
  • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
  • G06F9/46—Multiprogramming arrangements
  • G06F9/52—Program synchronisation; Mutual exclusion, e.g. by means of semaphores
  • G06F9/526—Mutual exclusion algorithms
• • G—PHYSICS
  • G06—COMPUTING OR CALCULATING; COUNTING
  • G06F—ELECTRIC DIGITAL DATA PROCESSING
  • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
  • G06F12/14—Protection against unauthorised use of memory or access to memory
  • G06F12/1458—Protection against unauthorised use of memory or access to memory by checking the subject access rights
  • G06F12/1466—Key-lock mechanism

Definitions

• the present invention is generally related to computer systems and software such as middleware, and is particularly related to supporting a transactional middleware machine environment. Background:
• a transactional middleware system or a transaction oriented middleware, includes enterprise application servers that can process various transactions within an organization.
• enterprise application servers that can process various transactions within an organization.
• the transactional middleware machine environment includes an operating system running on a plurality of processors, each of which operates to access data in a shared memory.
• the transactional middleware machine environment also comprises a semaphore that is provided by the operating system, and a test-and-set (TAS) assembly component that is associated with one or more processes.
• TAS test-and-set
• Each process can use the TAS assembly component to perform one or more TAS operations in order to obtain a lock for data in the shared memory.
• a process can block the semaphore and wait for a release of a lock on data in the shared memory, after the TAS component has failed to obtain the lock after performing a specified number of TAS operations.
• Figure 1 shows an illustration of a transactional middleware machine environment that supports a self-tuning lock mechanism, in accordance with an embodiment of the invention.
• Figure 2 illustrates an exemplary flow chart for supporting a self-tuning lock mechanism in a transactional middleware machine environment, in accordance with an embodiment of the invention.
• Figure 3 is a functional block diagram of a system for supporting a locking mechanism in a transactional middleware machine environment, in accordance with an embodiment of the invention.
• Described herein is a system and method for supporting a transactional middleware system, such as Tuxedo, that can take advantage of fast machines with multiple processors, and a high performance network connection.
• a lock mechanism can be supported in a transactional middleware system to protect transaction data in a shared memory when there are concurrent transactions.
• the transactional middleware machine environment comprises a semaphore provided by an operating system running on a plurality of processors. The plurality of processors can access data in the shared memory.
• the transactional middleware machine environment also comprises a test-and-set (TAS) assembly component that is associated with one or more processes. Each said process operates to use the TAS assembly component to perform one or more TAS operations in order to obtain a lock for data in the shared memory. Additionally, a process operates to be blocked on the semaphore and wait for a release of a lock on data in the shared memory, after the TAS component has performed a number of TAS operations and failed to obtain the lock.
• TAS test-and-
• the system comprises a combination of high performance hardware, e.g. 64-bit processor technology, high performance large memory, and redundant InfiniBand and Ethernet networking, together with an application server or middleware environment, such as WebLogic Suite, to provide a complete Java EE application server complex which includes a massively parallel in-memory grid, that can be provisioned quickly, and can scale on demand.
• an application server or middleware environment such as WebLogic Suite
• the system can be deployed as a full, half, or quarter rack, or other configuration, that provides an application server grid, storage area network, and InfiniBand (IB) network.
• the middleware machine software can provide application server, middleware and other functionality such as, for example, WebLogic Server, JRockit or Hotspot JVM, Oracle Linux or Solaris, and Oracle VM.
• the system can include a plurality of compute nodes, IB switch gateway, and storage nodes or units, communicating with one another via an IB network. When implemented as a rack configuration, unused portions of the rack can be left empty or occupied by fillers.
• the system is an easy-to-deploy solution for hosting middleware or application server software, such as the Oracle Middleware SW suite, or Weblogic.
• middleware or application server software such as the Oracle Middleware SW suite, or Weblogic.
• the system is a "grid in a box" that comprises one or more servers, storage units, an IB fabric for storage networking, and all the other components required to host a middleware application.
• Significant performance can be delivered for all types of middleware applications by leveraging a massively parallel grid architecture using, e.g. Real Application Clusters and Exalogic Open storage.
• the system delivers improved performance with linear I/O scalability, is simple to use and manage, and delivers mission-critical availability and reliability.
• Tuxedo is a set of software modules that enables the construction, execution, and administration of high performance, distributed business applications and has been used as transactional middleware by a number of multi-tier application development tools.
• Tuxedo is a middleware platform that can be used to manage distributed transaction processing in distributed computing environments. It is a proven platform for unlocking enterprise legacy applications and extending them to a services oriented architecture, while delivering unlimited scalability and standards-based interoperability.
• a transactional middleware system such as a Tuxedo system
• IB Infiniband
• a self-tuning lock mechanism can be supported in a transactional middleware system to protect transaction data in a shared memory when there are concurrent transactions.
• the transactional middleware machine environment can achieve significant throughput improvement in transactional application scenarios such as applications with massive concurrent transactions.
• FIG. 1 shows an illustration of a transactional middleware machine environment that supports a self-tuning lock mechanism, in accordance with an embodiment of the invention.
• a transactional middleware machine comprises multiple CPUs 131-134 that support an operating system (OS) 104, and a shared memory 103 that includes various transactional data 121 -123.
• a transactional application 101 with multiple concurrent transactions 1 1 1 -1 12 can run on a plurality of processes 1 13-1 15 in a transactional server 102, each of which can use an atomic TAS (Test-And-Set) assembly 107 to implement an effective locking mechanism.
• the locking mechanism can protect the transaction data in the shared memory when there are concurrent transactions.
• a process in the transactional application can use a semaphore mechanism 106 provided by the OS to obtain a lock on data 122 if necessary.
• the process when a process wants to get a lock on data 122, the process can perform a TAS operation for a number of rounds.
• the system can specify a target spin count, which is the number of rounds of TAS operation that are allowed.
• the target spin count can be either preconfigured or dynamically determined.
• the process can obtain the lock with much less cost than the semaphore mechanism provided by the OS. On the other hand, if the lock is not available during this period, then the process can be configured to block the semaphore, and wait until the lock owner wakes up and releases the lock.
• the target spin count value can be decided in the context of the hardware configuration and the application scenario. Users can fine tune the spin count value manually in order to find an optimized value. The decision may not be obvious in some situations, since there is a trade-off between the CPU usage and the time to get a lock. For example, users may have to spend more CPU power to perform more TAS operations in order to get the lock in a shorter time frame. Hence, there may not be an optimized target spin count value that is obvious for every case.
• One drawback of user level semaphore implementation is that the transactional application may not be able to dynamically adjust the target spin count in real time depending on the specific machine type.
• the user level semaphore only uses a statically configured target spin count value, and users can adjust the target spin count value manually only by experimental practices. Since the optimal spin count value is machine dependent, and there is no one-fit-in-all value for all platforms, a more suitable approach is to employ a mechanism to calculate the target spin count value dynamically and in real time.
• the target spin count value can be stored in a shared memory.
• a special process such as a Tuxedo daemon process, can periodically change the spin count value according to operation information collected in the previous period.
• the Tuxedo daemon can update the target spin count value once per 5 seconds by default.
• an algorithm can be used to configure the target spin count value.
• the algorithm can increase the target spin count value, if the CPU idle ratio is low, or too many TAS operations have failed to obtain the lock and the system switched to the semaphore. Furthermore, the algorithm can decrease the target spin count value if the CPU idle ratio is too high.
• FIG. 2 illustrates an exemplary flow chart for supporting a self- tuning lock mechanism in a transactional middleware machine environment, in accordance with an embodiment of the invention.
• the system can provide a semaphore associated with an operating system running on a plurality of processors, wherein the plurality of processors operate to access data in a shared memory .
• a process of one or more processes can use a test-and-set (TAS) assembly component to perform one or more TAS operations in order to obtain a lock for data in the shared memory.
• TAS test-and-set
• the process can be blocked on the semaphore and wait for a release of a lock on data in the shared memory, after the TAS component has performed a specified number of TAS operations and failed to obtain the lock.
• TAS test-and-set
• metadata such as a SPINCOUNT parameter in the Tuxedo configuration file, can be used to specify the target spin count.
• SPINCOUNT can be either a static configured value, or a dynamic one.
• Tuxedo can use a statically set value of SPINCOUNT to determine how many times the bulletin board lock waits are spinning before getting blocked on system level semaphore.
• the drawback of this algorithm is that the value set by user is not the optimal value of SPINCOUNT on the specific platform, because the optimal value of SPINCOUNT is dependent upon many dynamic factors such as the CPU amounts, workload, number of waits for the Bulletin Board (BB) lock etc..
• Tuxedo can dynamically tune the value of SPINCOUNT while taking the runtime environment into consideration.
• An algorithm can be used to determine an appropriate value for the SPINCOUNT parameter.
• the system can increase the SPINCOUNT, if too many TAS operations have failed in the previous period and the system switched to the semaphore, and there was an enough CPU idle ratio.
• the system can decrease the SPINCOUNT, if the CPU idle ratio was too high.
• the above algorithm is based on the CPU usage, e.g. CPU idle rate, and the ratio of SPIN failure, e.g. a ratio of SPIN failure in every 10000 operations to obtain a lock.
• the ratio of SPIN failure can indicate how many times locks are obtained via the semaphore instead of via the TAS operation.
• a process can be in a SPIN mode, when the process is in an active status.
• the process can be blocked on the semaphore, if the process fails to obtain the lock after trying to perform the TAS operations for a number of times, which is referred to as a SPIN failure.
• the process can try to perform a TAS operation again and again in order to get the lock before a SPIN failure happens.
• a configurable parameter e.g. SPINCOUNT, can be used to specify the number of rounds of TAS operation to be invoked and performed.
• the minimum idle CPU rate and the SPIN failed rate can be defined using metadata in a configuration file.
• a MINIDLECPU parameter for defining the minimum idle CPU rate, the value of which has a range of 1-100 with 20 as default.
• a FACTOR parameter for defining the SPIN failed rate, the value of which has a range of 1 - 10000 with 1000 as default.
• the system can tune the SPINCOUNT in each scan unit. Then, the system can increase the SPINCOUNT if the SPIN failure rate is too high (e.g.
• the * MACHINES section of the configuration file includes an attribute "SPI NTUN I NG_TARGET" that is used for configure tuning target.
• the value of "SPINTUNING_TARGET” is numeric, which can be greater than or equal to "0" and less than or equal to e.g. "10000". A value of 0 indicates that the value built into the binary is used. The built-in value is 1000. The default value of "SPINTUNING TARGET" is 0. [00032]
• the value of SPINTUNING_TARGET means that there is at most one time for the bulletin board to be locked via system semaphore per every thousand locks. The system can increase the value of SPINCOUNT with more CPU spent to meet a larger value of SPINTUNING_TARGET.
• the attribute can be set with a nonzero value only if the option SPINTUNING is specified.
• the * MACHINES section of the configuration file includes an attribute "SPINTUNING_MINIDLECPU" " that is used for specifying idle CPU rate.
• the idle CPU rate can be used by the system to find a proper SPINCOUNT dynamically.
• User can set the minimum idle CPU rate via "SPINTUNING_MINIDLECPU" to avoid spending too much CPU.
• the value of "SPINTUNING_ MINIDLECPU” is numeric and in percentages. It can be greater than or equal to "0" and less than or equal to "100". A value of 0 indicates that the value built into the delivered binary should be used. For example, in Tuxedo, the built-in value can be set as 20, and the default value of "SPINTUNING_ MINIDLECPU" is 0. The attribute can be set with a nonzero value only if the option SPINTUNING is specified.
• Figure 3 shows a functional block diagram of a system 1000 for supporting a locking mechanism in a transactional middleware machine environment configured in accordance with the principles of the invention as described above.
• the functional blocks of the system 1000 may be implemented by hardware, software, or a combination of hardware and software to carry out the principles of the invention. It is understood by persons of skill in the art that the functional blocks described in Figure 3 may be combined or separated into sub-blocks to implement the principles of the invention as described above. Therefore, the description herein may support any possible combination or separation or further definition of the functional blocks described herein.
• the system 1000 for supporting a locking mechanism in a transactional middleware machine environment comprises a providing unit 1100 and a TAS assembly component 1200.
• the providing unit 1100 provides a semaphore associated with an operating system running on a plurality of processors, wherein the plurality of processors operate to access data in a shared memory.
• the TAS assembly component 1200 is associated with one or more processes, wherein each said process operates to use the TAS assembly component 1200 to perform one or more TAS operations in order to obtain a lock for data in the shared memory.
• a process operates to be blocked on the semaphore and waits for a release of a lock on data in the shared memory, after the TAS component 1200 has performed a specified number of TAS operations and failed to obtain the lock.
• the system 1000 further comprises a protecting unit 1300 for protecting transaction data in the shared memory when there are multiple concurrent transactions.
• the system 1000 further comprises an allowing unit 1400 for allowing the lock mechanism to use a spin count, which is the specified number of maximum rounds of TAS operations allowed.
• the system 1000 further comprises a preconfiguring unit 1500 for preconfiguring the spin count in metadata.
• the system 1000 further comprises a dynamically determining unit 1600 for dynamically determining the spin count based on both a hardware configuration and an application scenario.
• the system 1000 further comprises a periodically determining unit 1700 for periodically determining the spin count using a special process.
• the spin count is dynamically determined using an algorithm, wherein the algorithm specifies that the spin count is increased from the spin count of a previous period, if a number of spin failures in the previous period exceeds a spin failure limit and a CPU idle ratio in the previous period is below a CPU idle ratio limit, and the spin count is decreased from the spin count of a previous period, if the CPU idle ratio exceeds a CPU idle ratio limit.
• a spin failure happens when a process fails to obtain a lock on data after attempting the TAS operation for a specified number of times.
• the system 1000 further comprises a using unit 1800 for using the semaphore to obtain the lock when a lock owner wakes up and releases the lock.
• the system 1000 further comprises a fine tuning unit 1900 for fine tuning the spin count manually to find an optimized value.
• the apparatus further comprises means for protecting transaction data in the shared memory when there are multiple concurrent transactions.
• the apparatus further comprising means for allowing the lock mechanism to use a spin count, which is the specified number of maximum rounds of TAS operations allowed.
• the apparatus further comprises means for preconfiguring the spin count in metadata.
• the apparatus further comprises means for dynamically determining the spin count based on both a hardware configuration and an application scenario.
• the apparatus further comprises means for periodically determining the spin count using a special process.
• the spin count is dynamically determined using an algorithm, wherein the algorithm specifies that the spin count is increased from the spin count of a previous period, if a number of spin failures in the previous period exceeds a spin failure limit and a CPU idle ratio in the previous period is below a CPU idle ratio limit, and the spin count is decreased from the spin count of a previous period, if the CPU idle ratio exceeds a CPU idle ratio limit.
• the apparatus wherein a spin failure happens when a process fails to obtain a lock on data after attempting the TAS operation for a specified number of times.
• the apparatus further comprising means for using the semaphore to obtain the lock when a lock owner wakes up and releases the lock.
• the apparatus further comprises means for fine tuning the spin count manually to find an optimized value.
• yet another embodiment includes a system for supporting a locking mechanism in a transactional middleware machine environment, comprising a unit for providing a semaphore associated with an operating system running on a plurality of processors, wherein the plurality of processors operate to access data in a shared memory; a test-and-set (TAS) assembly component that is associated with one or more processes, wherein each said process operates to use the TAS assembly component to perform one or more TAS operations in order to obtain a lock for data in the shared memory, wherein a process operates to be blocked on the semaphore and waits for a release of a lock on data in the shared memory, after the TAS component has performed a specified number of TAS operations and failed to obtain the lock;
• TAS test-and-set
• system further comprises a unit for protecting transaction data in the shared memory when there are multiple concurrent transactions.
• system further comprises a unit for allowing the lock mechanism to use a spin count, which is the specified number of maximum rounds of TAS operations allowed.
• system further comprises a unit for preconfiguring the spin count in metadata.
• system further comprises a unit for dynamically determining the spin count based on both a hardware configuration and an application scenario.
• the system further comprises a unit for periodically determining the spin count using a special process.
• the spin count is dynamically determined using an algorithm, wherein the algorithm specifies that the spin count is increased from the spin count of a previous period, if a number of spin failures in the previous period exceeds a spin failure limit and a CPU idle ratio in the previous period is below a CPU idle ratio limit, and the spin count is decreased from the spin count of a previous period, if the CPU idle ratio exceeds a CPU idle ratio limit.
• Another embodiment includes a system wherein a spin failure happens when a process fails to obtain a lock on data after attempting the TAS operation for a specified number of times.
• Another embodiment includes a system further comprising a unit for using the semaphore to obtain the lock when a lock owner wakes up and releases the lock.
• yet another embodiment includes a system further comprising a unit for fine tuning the spin count manually to find an optimized value.
• the present invention may be conveniently implemented using one or more conventional general purpose or specialized digital computer, computing device, machine, or microprocessor, including one or more processors, memory and/or computer readable storage media programmed according to the teachings of the present disclosure.
• Appropriate software coding can readily be prepared by skilled programmers based on the teachings of the present disclosure, as will be apparent to those skilled in the software art.
• the present invention includes a computer program product which is a storage medium or computer readable medium (media) having instructions stored thereon/in which can be used to program a computer to perform any of the processes of the present invention.
• the storage medium can include, but is not limited to, any type of disk including floppy disks, optical discs, DVD, CD-ROMs, microdrive, and magneto-optical disks, ROMs, RAMs, EPROMs, EEPROMs, DRAMs, VRAMs, flash memory devices, magnetic or optical cards, nanosystems (including molecular memory ICs), or any type of media or device suitable for storing instructions and/or data.

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