WO2013026307A1

WO2013026307A1 - Clock protection method and device

Info

Publication number: WO2013026307A1
Application number: PCT/CN2012/076823
Authority: WO
Inventors: 严婕
Original assignee: 中兴通讯股份有限公司
Priority date: 2011-08-23
Filing date: 2012-06-13
Publication date: 2013-02-28
Also published as: CN102957552A; CN102957552B

Abstract

Disclosed are a clock protection method and device. The method comprises: determining an active/standby state of a current board; when the board is a standby board, determining whether a phase locked loop of the board is locked; when the phase locked loop of the board is unlocked, determining whether an unlocking time exceeds a preset threshold; when the unlocking time does not exceed the preset threshold, determining whether a phase locked loop of an active board is locked, and if the phase locked loop of the active board is unlocked, switching the standby board into an active board and clearing the unlocking time. The technical solution provided by the present invention solves the problem in the prior art that it is difficult to determine, only according to a running state of the phase locked loop, whether the clock needs to be switched and whether a new apparatus needs to be introduced for phase locked loop detection, avoids determining whether a fault point is a phase locked loop circuit or a clock source, and implements protection switching when the clock is asynchronous and the service is damaged without adding an external apparatus.

Description

TECHNICAL FIELD The present invention relates to the field of communications, and in particular to a clock protection method and apparatus. BACKGROUND OF THE INVENTION For a synchronous communication system, it is important to implement clock synchronization between devices. Currently, a device usually adopts an interlock clock scheme of 1+1 or 1:1 hot backup, and the purpose is to use when the primary clock is abnormal and the standby clock output is normal. The device can switch to the alternate clock to ensure clock synchronization and reduce business impairments. The general device uses a phase-locked loop circuit to track and synchronize the external clock. However, the aging rate of the first analog phase-locked loop or the semi-analog half-digital phase-locked loop is high, and the fault caused by the phase-locked loop circuit device problem often occurs; second, whether the phase-locked loop circuit can realize synchronization and the lock The phase loop circuit and the clock source are related, it is difficult to judge whether the clock needs to be switched from the operating state of the phase locked loop. Thirdly, the performance detection of the phase locked loop circuit device generally needs to introduce a new detection circuit, which increases the cost of the device and New point of failure. In response to these problems, no effective solution has been proposed yet. SUMMARY OF THE INVENTION The present invention provides a clock protection method and apparatus to solve at least one of the above problems. According to an aspect of the present invention, a clock protection method is provided, including: determining the active/standby state of the current board; when the board is a standby board, determining whether the phase locked loop of the board is locked; When the ring is out of lock, it is judged whether the lockout timing exceeds the preset threshold. When the lockout timing does not exceed the threshold, it is judged whether the phase locked loop of the main board is locked. If the lock is lost, the board is switched to the main board. , clear the lockout timing. After determining whether the phase locked loop of the single board is locked, the method further includes: when the phase locked loop of the single board is locked, clearing the lost lock flag of the phase locked loop and clearing the lost lock timing; determining whether the lost lock timing exceeds the preset After the threshold, it also includes: When the loss of lock timing exceeds the threshold, continue to count. Before determining whether the lockout timing exceeds the preset threshold, the method further includes: determining whether the lockout flag has been set, if not set, then setting the lockout flag and starting to count the lockout timing, if it is set, determining the lockout Whether the timing exceeds the preset threshold. If the board is switched to the main board, the board is replaced with the default threshold. If the number of the master/slave switchovers is less than the predetermined threshold, the board is switched to the main board. Lock timing. After determining the active/standby status of the current board, the method further includes: When the board is the main board, determine whether the phase locked loop of the board is locked, and notify the standby board of the judgment result. Determine whether the phase-locked ring of the board is locked, and notify the backup board of the result of the judgment. The method includes: determining whether the phase-locked loop of the board of the main board is locked; if it is locked, determining whether the network management is mandatory, and when there is no network management, If the fault persists, the board is forcibly forced. If there is no fault, the board is forcibly determined. If the lock is lost, it is determined whether there is a network management force. If there is no network management force, cancel the pair. The mandatory of the board. According to another aspect of the present invention, a clock protection apparatus is provided, including: an active/standby determination module, configured to determine an active/standby state of a current board; and a standby board determination module, configured to determine when a board is a standby board Whether the phase-locked loop of the board is locked; the timing judgment module is set to determine whether the lockout timing exceeds the preset threshold when the phase-locked loop of the board is lost; the master-slave switchover module is set to not exceed the lockout timing. When the threshold is determined, it is determined whether the phase locked loop of the main board is locked, and when the phase locked loop of the main board loses lock, the board is switched to the main board, and the lockout timing board judgment module is cleared, and is also set to be in the single When the phase locked loop of the board is locked, the lockout flag of the phase locked loop is cleared and the lockout timing is cleared; the timing judgment module is also used to continue timing when the lockout timing exceeds the threshold. The device further includes: a setting judgment module, configured to determine whether the loss of lock flag has been set, and when the loss of lock flag is not set, the lock flag is lost and the statistics of the lockout timing is started, when the lockout flag is set. , activate the timing judgment module. The device further includes: a switching determination module, configured to determine, after the active/standby switching module determines that the phase locked loop of the main board is out of lock, determine whether the number of active/standby switching in the predetermined time period is less than a predetermined threshold, and when less than Activate the active/standby switchover module to switch the board to the main board and clear the lockout timing. The device further includes: a main board judging module, configured to determine whether the phase locked loop of the single board is locked when the board is the main board, and notify the standby board of the judgment result. The motherboard judging module includes: a state judging unit, configured to determine whether the phase locked loop of the board of the main board is locked; and the locking judging unit is configured to determine whether the network management is forced when the phase locked loop of the board is locked, If the board is faulty, the board is forcibly determined. If the board is faulty, the board is forcibly disabled. If there is no fault on the board, the board is forced. The lock loss judgment unit is set to be on the board. When the PLL is out of lock, it is determined whether there is a network management force. If there is no network management force, the board is forcibly disabled. The present invention is used to determine the state of the current board. When the current board is the standby board, according to whether the phase locked loop of the board is locked, whether the lockout timing exceeds the threshold threshold, and the lock of the current main board is used. If the phase loop is locked or not, it is determined whether the active/standby switchover is implemented. It is difficult to determine whether it is necessary to switch the clock from the operating state of the phase-locked loop and the need to introduce a new device for the phase-locked loop detection. Whether the fault point is the phase-locked loop circuit or the clock source, the protection switching when the clock is out of synchronization and the service is damaged due to the loss of the phase-locked loop is realized without adding an external device. BRIEF DESCRIPTION OF THE DRAWINGS The accompanying drawings, which are set to illustrate,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, 1 is a flowchart of a clock protection method according to an embodiment of the present invention; FIG. 2 is a flow of a backup board side of a clock protection method according to a preferred embodiment of the present invention; FIG. 3 is a flowchart according to a preferred embodiment of the present invention. FIG. 4 is a schematic diagram showing the functional structure of the active and standby boards according to an example of the present invention; FIG. 5 is a flow of the standby board side of the clock protection method according to an example of the present invention; Clock Protection Method Main Board Side Flow; FIG. 7 is a block diagram showing the structure of a clock protection apparatus according to an embodiment of the present invention. BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, the present invention will be described in detail with reference to the accompanying drawings. It should be noted that the embodiments in the present application and the features in the embodiments may be combined with each other without conflict. 1 is a flow chart of a clock protection method in accordance with an embodiment of the present invention. As shown in FIG. 1 , the clock protection method according to the embodiment of the present invention includes: Step S102: determining the active/standby state of the current board; Step S104: When the board is a standby board, determining whether the phase locked loop of the board is locked; Step S106: When the phase locked loop of the board is out of lock, determine whether the lost lock timing exceeds a preset threshold; In step S108, when the lockout timing does not exceed the threshold, it is determined whether the phase locked loop of the main board is locked. If the lock is lost, the board is switched to the main board, and the lockout timing is cleared. The clock protection method provided in this embodiment further sets the lockout timing on the basis of the state of the phase-locked loop of the active and standby boards, and fully utilizes these parameters and their mutual relations to determine the master/slave switchover, so that the clockless control can be judged. The fault point is to realize the clock protection under the premise of the phase-locked loop circuit or the judgment of the clock source, and it is not necessary to add a new device. The foregoing embodiment provides a general clock protection method, which corresponds to an active/standby switchover in a normal situation. However, in reality, if the previous master/slave switchover fails or does not actually require special conditions such as active/standby switchover, the next master/slave switchover will be affected, so when this happens, the above parameters It needs to be adjusted accordingly. Preferably, after determining whether the phase locked loop of the single board is locked, the method further includes: when the phase locked loop of the single board is locked, clearing the unlocking flag of the phase locked loop and clearing the lost lock timing; After exceeding the preset threshold, the method may further include: when the loss of lock timing exceeds the threshold, continue to time. The preferred embodiment provides an adjustment method for the loss of lock flag (used to identify the current state of the phase locked loop) and the lockout timing in the above special case, which ensures the clock protection process in the loop, each time Clock protection can be successfully completed. Preferably, before determining whether the loss of lock timing exceeds a preset threshold, the method further includes: determining whether the loss of lock flag has been set, if not set, then setting the lockout flag and starting to count the loss of lock timing, if set Then, determine if the lockout timing exceeds the preset threshold. Since the clock protection method provided by the present invention is a cyclic execution method, in most cases, the lockout flag is set, but it is not excluded that the protection needs to be viewed at the beginning of the protection or the failure occurs. When the lock flag is displayed, the lock loss flag is not set. This preferred embodiment can solve this problem and ensure smooth clock protection. Preferably, the board is switched to the main board, and before the timing of the lockout is cleared, the method further includes: determining whether the number of active/standby switching times in the predetermined time period is less than a predetermined threshold, and if the value is smaller than Board, clear the lockout timing. The preferred embodiment further adds a parameter for whether to perform the active/standby switchover, that is, whether the number of active/standby switchovers in the predetermined time period is less than a predetermined threshold, and the above-mentioned judgment can prevent the occurrence of frequent switching, thereby further improving system stability. . The above preferred embodiment mainly provides a clock protection method on the standby board side, and the preferred embodiment provides a preferred main board side clock protection operation corresponding to the above preferred embodiment. Preferably, after determining the active/standby state of the current board, the method further includes: when the board is the main board, determining whether the phase locked loop of the board is locked, and notifying the standby board of the determination result. The main function of the main board in clock protection or active/standby switching is to provide its own various status parameters as the basis for judging whether to perform the active/standby switching. The most important one is whether the phase locked loop is locked. The manner in which the status of the main board phase locked loop is notified to the spare board is varied, either in a direct manner or in an indirect manner. The preferred embodiment provides a preferred embodiment. Preferably, determining whether the phase locked loop of the board of the main board is locked, and notifying the standby board of the judgment result may include: (1) determining whether the phase locked loop of the board of the main board is locked;

(2) If it is locked, it is determined whether there is a network management force. If there is no network management force, it is determined whether the board is faulty. If there is a fault, the board is forcibly disabled. If there is no fault, the board is forced.

(3) If the lock is lost, it is judged whether there is a network management force. If there is no network management force, the board is forcibly cancelled. The network management is a basis for determining whether the board is the primary board or the standby board in the existing switching mechanism. The mandatory board itself has an attribute that is mandatory. The preferred embodiment uses this existing attribute. Use this attribute to inform the standby board of the current state of the phase-locked loop of the board, and set the forced phase-locked loop lock, and cancel the forcing, that is, the phase-locked loop loses lock. In summary, the foregoing preferred embodiments can be summarized as follows: The process of the backup board side of the clock protection method according to the above-mentioned preferred embodiment, as shown in FIG. 2, includes: Step S202, determining the active/standby state, the current board is a standby board; S204, determining the state of the single-phase locked loop, if it is locked, go to step S206, if it is lost, go to step S208; step S206, clear the lost lock flag, the lockout timing is cleared, and the end; step S208, determine Whether there is a lockout flag, if not, go to step S210, if yes, go to step S212; step S210, lose the lock flag, and the lockout timing starts; Step S212, determining whether the lost lock timing exceeds the threshold, and if so, ending, if no, go to step S214; step S214, determine whether the main board is out of lock, if not, end, if yes, go to step S216; step S216 And determining whether it is frequent switching, if yes, ending, if no, go to step S218; step S218, the board grabs the main use; step S220, clear the lost lock flag, and ends. The process of the main board side of the clock protection method according to the above preferred embodiment, as shown in FIG. 3, includes: Step S302: The active/standby state determines that the current board is the main board; Step S304, the phase locked loop lock state is judged; Step S306, the status of the master/slave determination condition is updated; in step S308, the result of the determination is sent to the standby board. The above preferred embodiments will be described in detail below with reference to examples. The environment of the application, as shown in Figure 4, includes: the main board and the standby board. Each board includes: phase-locked loop, phase-locked loop status detection, anti-frequent switching, clock active/standby status detection, active/standby Switch functions and other functional entities. First, introduce the existing switching mechanism. In the existing switching mechanism, several status lines are sent between the active clock board and the standby clock board. The in-position, the network management force, the local clock READY, and the primary standby state are arranged in priority order. The clock board determines whether the board is active or standby based on these four signals. Then, in this example, the "phase-locked loop lost lock" is added to the original switching mechanism. The principle is that the priority of the phase-locked loop loss is lower than the original switching condition, and the original clock protection switching mechanism is not affected. At the same time, the active/standby clock protection switching is performed when the service is damaged due to the loss of the lock of the phase locked loop. The flow of the backup board side of the clock protection method according to the example of the present invention, as shown in FIG. 5, includes: Step S502: determining that the current board is a standby board; Step S504, determining whether the phase locked loop of the board is out of lock, if not, turning Go to step S506, if yes, go to step S508; step S506, clear the lockout flag, clear the lockout timing, and end; Step S508, determining whether there is a loss of lock flag, if not, proceeding to step S510, if yes, proceeding to step S512; step S510, setting the lockout flag, the lockout timing begins; step S512, determining whether the lockout timing is less than 30 minutes If no, the end, that is, the standby board phase lock loop loss time is longer than the main board, it is judged that the spare board is damaged, and no switching is performed. If yes, go to step S514; Step S514, determine whether the board is mandatory and If yes, go to step S516; step S516, determine whether the number of times of switching within 1 hour is less than 2 times, if no, end, prevent frequent switching, if yes, go to step S518; step S518, The board grabs the main use and becomes the main use state; in step S520, the lost lock flag is cleared, and the end is completed. The process of the main board side of the clock protection method according to the example of the present invention, as shown in FIG. 6, includes: Step S602, determining that the board is the main board; Step S604, judging the state of the main board phase locked loop, if it is the locked state Go to step S606, if it is in an unlocked state, go to step S614, if it is a state other than the locked and unlocked state, end; step S606, determine whether there is a network management mandatory active/standby, if yes, end, if no, Go to step S608; Step S608, determine whether the board is faulty and cause noready, if yes, go to step S610, if no, go to step S612; step S610, the board cancels forcing, ends; step S612, the board is forced, That is, the meaning of the "phase locked loop lock" is expressed by using the active forced state line, and the priority of the lock of the phase locked loop is lower than the original switching condition, and the process ends; step S614, determining whether the network management force the board is the main use, if If yes, go to step S616; in step S616, the board cancels the forcing, that is, the meaning of the "phase-locked loop lost lock" is expressed by the active state line, and the phase-locked loop loses lock. Lower priority than the original switching conditions, the end. FIG. 7 is a block diagram showing the structure of a clock protection apparatus according to an embodiment of the present invention. As shown in FIG. 7, the clock protection apparatus according to the embodiment of the present invention includes: an active/standby determination module 72, configured to determine the active/standby state of the current board; the standby board determination module 74 is connected to the active/standby determination module 72, and is set to When the board is a standby board, it is determined whether the phase locked loop of the board is locked. The timing determining module 76 is connected to the standby board determining module 74, and is configured to determine whether the lost lock timing exceeds when the phase locked loop of the board is lost. The preset threshold; the active/standby switching module 78 is connected to the timing determining module 76, and is set to determine whether the phase locked loop of the main board is locked when the loss of lock timing does not exceed the threshold, and the phase locked loop of the main board is lost. When the lock is locked, the board is switched to the main board, and the lost lock timing is cleared. The clock protection device provided in this embodiment further sets the lockout timing on the basis of the state of the phase-locked loop of the main and standby boards, and fully utilizes these parameters and their mutual relations to determine the master/slave switchover, which can be judged without failure. The clock protection is implemented on the premise of the phase-locked loop circuit or the clock source. The clock protection device provided in this embodiment can be established on the original board without adding new equipment. Preferably, in the clock protection device according to the preferred embodiment of the present invention, the standby board judging module is further configured to clear the lockout flag of the phase locked loop and clear the lockout timing when the phase locked loop of the single board is locked; The judging module is also set to continue counting when the lockout timing exceeds the threshold. In the preferred embodiment, the module may lose the lock flag (used to identify the current state of the phase locked loop) when a previous failure occurs in the active/standby switchover or when the active/standby switchover is not actually required. And the lockout timing is adjusted accordingly, ensuring that every clock protection can be successfully completed during the cyclic clock protection process. Preferably, the clock protection apparatus according to the preferred embodiment of the present invention may further include: a setting judgment module configured to determine whether the loss of lock flag has been set, and when the loss of lock flag is not set, the lock flag is lost and statistics are started. Loss of lock timing, activates the timing determination module when the loss of lock flag is set. In the specific implementation process, the reason that the protection start or the failure occurs may cause the lockout flag to be unset when the lockout flag needs to be viewed, and the added module of the preferred embodiment can solve the problem. Ensure that the clock protection goes smoothly. Preferably, the clock protection apparatus according to the preferred embodiment of the present invention may further include: a switching determination module, configured to determine, after the active/standby switching module determines that the phase locked loop of the main board is out of lock, determine the active/standby switching in the predetermined time period If the number of times is less than the predetermined threshold, the active/standby switchover module is activated to switch the board to the active board and the lockout timing is cleared. The added module of the preferred embodiment can prevent the occurrence of frequent switching and further improve the stability of the system. Preferably, the clock protection device according to the preferred embodiment of the present invention may further include: a mainboard judging module configured to determine whether the phase locked loop of the single board is locked when the board is the main board, and notifying the standby board of the determination result. The main function of the main board in clock protection or active/standby switching is to provide its own various status parameters as the basis for judging whether to perform the active/standby switching. The most important one is whether the phase locked loop is locked. The function of the additional module of the preferred embodiment is to obtain this parameter and provide it to the spare board. Preferably, the motherboard determining module may include: a state determining unit configured to determine whether a phase locked loop of the board of the main board is locked; a locking determining unit connected to the state determining unit, configured to be locked in the board When the ring is locked, it is determined whether the network management is mandatory. If there is no network management force, the board is faulty. If the board is faulty, the board is forcibly disabled. The lock-off judgment unit is connected to the state judgment unit, and is set to determine whether the network management is forcible when the phase-locked loop of the board is out of lock, and the board is forcibly disabled when there is no network management force. The network management is a basis for determining whether the board is the primary board or the standby board in the existing switching mechanism. The mandatory board itself has an attribute that is mandatory. The preferred embodiment uses this existing attribute. Use this attribute to inform the standby board of the current state of the phase-locked loop of the board, and set the forced phase-locked loop lock, and cancel the forcing, that is, the phase-locked loop loses lock. From the above description, it can be seen that the technical solution provided by the present invention avoids the judgment of whether the fault point is a phase-locked loop (circuit) or a clock source, and the phase-locked loop can be realized without adding an external detecting device (circuit). Loss of lock causes protection of the clock when the clock is not synchronized and the service is damaged. Obviously, those skilled in the art should understand that the above modules or steps of the present invention can be implemented by a general-purpose computing device, which can be concentrated on a single computing device or distributed over a network composed of multiple computing devices. Alternatively, they may be implemented by program code executable by the computing device, such that they may be stored in the storage device by the computing device and, in some cases, may be different from the order herein. The steps shown or described are performed, or they are separately fabricated into individual integrated circuit modules, or a plurality of modules or steps are fabricated as a single integrated circuit module. Thus, the invention is not limited to any specific combination of hardware and software. The above is only the preferred embodiment of the present invention, and is not intended to limit the present invention, and various modifications and changes can be made to the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and scope of the present invention are intended to be included within the scope of the present invention.

Claims

1. A method of clock protection, comprising:

Determine the active/standby status of the current board.

When the board is a standby board, determining whether the phase locked loop of the board is locked; when the phase locked loop of the board is out of lock, determining whether the lockout timing exceeds a preset threshold; If the lock timing does not exceed the threshold, it is determined whether the phase locked loop of the main board is locked. If the lock is lost, the board is switched to the main board, and the lost lock timing is cleared.

2. The method according to claim 1, wherein

After determining whether the phase locked loop of the board is locked, the method further includes:

When the phase locked loop of the single board is locked, the lost lock flag of the phase locked loop is cleared and the lost lock timing is cleared;

After determining whether the loss of lock timing exceeds a preset threshold, the method further includes:

When the lost lock timing exceeds the threshold, the timing is continued.

3. The method according to claim 1, wherein before determining whether the loss of lock timing exceeds a preset threshold, the method further comprises:

Determining whether the loss of lock flag has been set, if not set, setting the loss of lock flag and starting to count the lockout timing, if it is set, determining whether the lockout timing exceeds a preset threshold .

The method according to claim 1, wherein before the board is switched to the main board, before the timing of the lockout is cleared, the method further includes:

It is determined whether the number of active/standby switchovers in the predetermined time period is less than a predetermined threshold. If the value is less than, the board is switched to the main board, and the lockout timing is cleared.

The method according to any one of claims 1 to 4, further comprising: after determining the active/standby state of the current board:

When the board is the main board, it is determined whether the phase locked loop of the board is locked, and the judgment result is notified to the standby board. The method according to claim 5, wherein determining whether the phase locked loop of the board is locked, and notifying the result of the determination to the standby board includes:

Determining whether the phase locked loop of the single board of the main board is locked;

If it is locked, it is determined whether there is a network management force. If there is no network management force, the board is determined to be faulty. If there is a fault, the board is forcibly disabled. Forced

If the lock is lost, it is determined whether there is a network management force. If there is no network management force, the card is forcibly cancelled. A clock protection device includes:

The master/slave judgment module is configured to determine the active/standby status of the current board.

The standby board determining module is configured to determine whether the phase locked loop of the single board is locked when the board is a standby board;

The timing judging module is configured to determine whether the lockout timing exceeds a preset threshold when the phase locked loop of the board is out of lock;

The master/slave switching module is configured to determine whether the phase locked loop of the main board is locked when the lockout timing does not exceed the threshold, and when the phase locked loop of the main board loses lock, the single The board is switched to the main board, and the lost lock timing is cleared. The apparatus according to claim 7, wherein the standby board determining module is further configured to clear the lockout flag of the phase locked loop and clear the lockout timing when the phase locked loop of the single board is locked;

The timing determination module is further configured to continue counting when the loss of lock timing exceeds the threshold. The apparatus according to claim 7, further comprising: a setting judgment module configured to determine whether the loss of lock flag has been set, and setting the lockout flag when the loss of lock flag is not set And starting to count the loss of lock timing, when the loss of lock flag has been set, the timing determination module is activated. The apparatus according to claim 7, further comprising: a switching determination module, configured to determine an active/standby switchover within a predetermined time period after the active/standby switchover module determines that the phase locked loop of the main board is out of lock The number of times is less than a predetermined threshold, and when the number is less than, the active/standby switching module is activated to switch the board to the main board, and the lost lock timing is cleared.

The apparatus according to any one of claims 7 to 10, further comprising: a main board judging module, configured to determine whether the phase locked loop of the single board is locked when the board is a main board The result of the judgment is notified to the standby board.

The device according to claim 11, wherein the motherboard determining module comprises:

The state judging unit is configured to determine whether the phase locked loop of the board of the main board is locked. The lock judging unit is configured to determine whether the network management is forced when the phase locked loop of the board is locked, and there is no network management If the board is faulty, the card is forcibly determined. If the board is faulty, the board is forcibly disabled.

The lockout determination unit is configured to determine whether the network management is forcible when the phase-locked loop of the board is out of lock, and the forcing of the board is cancelled when there is no network management force.