WO2013002061A1

WO2013002061A1 - Wafer for solar cell, solar cell, and production method therefor

Info

Publication number: WO2013002061A1
Application number: PCT/JP2012/065575
Authority: WO
Inventors: 明英高木; 昌次中村; 北條　義之; 熊田　浩; 涌田　順三; 林　哲也
Original assignee: シャープ株式会社
Priority date: 2011-06-30
Filing date: 2012-06-19
Publication date: 2013-01-03
Also published as: JP2013012668A; TW201306112A

Abstract

A production method for a silicon wafer (1) for a solar cell, including: a step in which a silicon crystal ingot (50) is sliced by a resin bond wire (53) comprising abrasive grains (22) having an average particle diameter of 10-20 µm; and a step in which a crystal silicon wafer (11) obtained by said slicing of the silicon crystal ingot (50) is etched so as to have a facet (62) having a width of 10-150 µm in the surface of said crystal silicon wafer (11).

Description

Wafer for solar cell, solar cell and method for manufacturing the same

The present invention relates to a method for manufacturing a silicon wafer for solar cells, a silicon wafer for solar cells, a method for manufacturing a semiconductor device, and a semiconductor device.

In recent years, development of clean energy has been demanded due to problems of depletion of energy resources and global environmental problems such as an increase in CO _{2 in} the atmosphere. In particular, solar power generation using solar cells is a new energy source. It has been developed, put into practical use, and is on the path of development.

Conventionally, a solar cell has formed a pn junction by diffusing an impurity having a conductivity type opposite to that of a silicon wafer into a light receiving surface of a monocrystalline or polycrystalline silicon wafer, for example, Double-sided electrode type solar cells manufactured by forming electrodes on the back surface opposite to the light receiving surface are mainly used. In a double-sided electrode type solar cell, it is also common to increase the output by the back surface field effect by diffusing impurities of the same conductivity type as the silicon wafer at a high concentration on the back surface of the silicon wafer. .

Further, research and development is also underway for a back electrode type solar cell in which an electrode is not formed on the light receiving surface of a silicon wafer but an electrode is formed only on the back surface (see, for example, Patent Document 1).

Hereinafter, an example of a conventional method for manufacturing a back electrode type solar cell will be described with reference to schematic cross-sectional views of FIGS. 26 (a) to 26 (f).

First, as shown in FIG. 26A, the masking paste 102 is screen-printed on the entire light-receiving surface side of the silicon wafer 101 having n-type or p-type conductivity and dried, and then the back surface of the silicon wafer 101 is formed. An opening 114 is partially provided on the side, and the masking paste 102 is screen-printed.

Next, as shown in FIG. 26B, the n-type dopant diffusion region 103 is formed by diffusing the n-type dopant 104 from the opening 114 on the back surface of the silicon wafer 101.

Thereafter, all of the masking paste 102 on the light receiving surface side and the back surface side of the silicon wafer 101 is removed, and the masking paste 102 is screen printed again on the entire surface of the silicon wafer 101 on the light receiving surface side, as shown in FIG. After being dried, the opening 115 is partially provided on the back side of the silicon wafer 101 and the masking paste 102 is screen-printed.

Next, as shown in FIG. 26D, the p-type dopant diffusion region 105 is formed by diffusing the p-type dopant 106 from the opening 115 on the back surface of the silicon wafer 101.

Next, as shown in FIG. 26 (e), after the texture structure 108 is formed by texture etching the surface on the light receiving surface side of the silicon wafer 101, an antireflection film 109 is formed on the texture structure 108, and A passivation film 107 is formed on the back side of the silicon wafer 101.

Thereafter, as shown in FIG. 26 (f), after providing openings for exposing the respective surfaces of the n-type dopant diffusion region 103 and the p-type dopant diffusion region 105 in the passivation film 107 on the back surface of the silicon wafer 101, Through the opening, an n-type electrode 112 in contact with the n-type dopant diffusion region 103 is formed, and a p-type electrode 113 in contact with the p-type dopant diffusion region 105 is formed. Thus, a conventional back electrode type solar battery cell is manufactured.

Non-Patent Document 1 describes that 2 inches of silicon after an alkali solution of 51.9%, 48.0%, 35.0%, 10.0% is placed in a cylindrical container and set at 65 ° C. It describes that the wafer is immersed and etched for 20 minutes and 30 minutes.

Further, in Non-Patent Document 1, as a result of etching the silicon wafer at 65 ° C. for 20 minutes with 48.0% NaOH and for 30 minutes with 51.9% NaOH, the surface roughness was measured. The 48.0% etched product is 0.354 μm, the 51.9% etched product is 0.216 μm, the 51.9% etched product is in a better etching state, and the higher concentration alkali is etched. It also states that the condition is good.

In the field of electronic devices using crystalline silicon (particularly LSI), a technique for improving the smoothness of the surface of a silicon wafer by mechanical polishing is common, but in the technical field of solar cells, high throughput and low cost are achieved. For this reason, it has become the mainstream to use chemical etching as described in Non-Patent Document 1.

JP 2007-49079 A

In order to stably produce a back electrode type solar cell having good characteristics using a silicon wafer, the contact resistance with the electrode can be reduced as much as possible, and the carrier at the interface between the surface of the silicon wafer and the electrode can be reduced. It is effective to smooth the surface of the silicon wafer so that recombination can be prevented. It is also effective to improve the printing accuracy of the masking paste.

It is well known that the smoothing of the surface of a silicon wafer by chemical etching as described in the background art can easily improve the smoothness of the surface of the silicon wafer by increasing the etching amount.

On the other hand, in order to achieve high throughput and low cost, thinning of the silicon wafer of the back electrode type solar cell is required, and the thickness of the silicon wafer immediately after slicing is becoming thinner year by year. Under such circumstances, increasing the etching amount has a problem in that the mechanical strength and the conversion efficiency of the back electrode type solar cell are reduced.

Such a problem is not only a problem of the back electrode type solar battery cell but also a problem of the entire solar battery including a solar battery cell such as a double-sided electrode type solar battery cell.

In view of the above circumstances, an object of the present invention is to stably manufacture a solar cell silicon wafer that can stably manufacture a solar cell having good characteristics, and a solar cell having good characteristics. Another object of the present invention is to provide a silicon wafer for solar cells used for manufacturing. Moreover, the objective of this invention is providing the manufacturing method of the semiconductor device using such a manufacturing method of the silicon wafer for solar cells, and the semiconductor device using the silicon wafer for solar cells.

The present invention provides a step of slicing a silicon crystal ingot with a resin bond wire having abrasive grains having an average grain size of 10 μm or more and 20 μm or less, and a crystalline silicon wafer obtained by slicing the silicon crystal ingot. And a step of etching so as to have a facet with a width of 10 μm or more and 150 μm or less on the surface of the wafer.

Here, in the method for producing a silicon wafer for solar cells of the present invention, in the etching step, the crystalline silicon wafer is formed so that the surface of the crystalline silicon wafer has a facet with a depth of 0.1 μm or more and 10 μm or less. Etching is preferred.

In the method for producing a silicon wafer for solar cells of the present invention, in the etching step, the etching amount of the crystalline silicon wafer is preferably 5 μm or more and 25 μm or less per one surface of the crystalline silicon wafer.

Moreover, in the method for producing a silicon wafer for solar cells of the present invention, it is preferable to use an aqueous sodium hydroxide solution having a concentration of 20% by mass to 35% by mass in the etching step.

In the method for producing a silicon wafer for solar cells of the present invention, the silicon crystal ingot is preferably single crystal silicon.

Moreover, in the method for producing a silicon wafer for solar cells of the present invention, in the slicing step, the silicon crystal ingot is preferably sliced so that the {100} plane is exposed.

In the method for producing a silicon wafer for solar cells of the present invention, it is preferable that in the slicing step, the area ratio of scratches occupying the surface of the crystalline silicon wafer is 0.1% or less.

Further, the present invention is obtained by a manufacturing method including a step of slicing a silicon crystal ingot with a resin bond wire having abrasive grains having an average particle size of 10 μm or more and 20 μm or less, and obtained by the slicing of the silicon crystal ingot. The present invention also relates to a silicon wafer for solar cells in which the area ratio of scratches occupying the surface of the crystalline silicon wafer is 0.1% or less.

The present invention also includes a step of slicing a single crystal silicon crystal ingot with the resin bond wire so that the {100} plane is exposed, and a single crystal silicon wafer obtained by slicing the single crystal silicon crystal ingot with water. The present invention also relates to a silicon wafer for solar cells obtained by a manufacturing method including a step of etching using sodium oxide and having a thickness of 200 μm or less.

Here, in the silicon wafer for solar cell of the present invention, in the etching step, the single crystal silicon wafer is etched so as to have a facet having a width of 10 μm or more and 150 μm or less on the surface of the single crystal silicon wafer. preferable.

In the silicon wafer for solar cell of the present invention, in the etching step, the single crystal silicon wafer is etched so that the surface of the single crystal silicon wafer has a facet with a depth of 0.1 μm or more and 10 μm or less. It is preferable.

The present invention also includes a step of slicing a silicon crystal ingot with a resin bond wire provided with abrasive grains having an average grain size of 10 μm or more and 20 μm or less, and a crystalline silicon wafer obtained by slicing the silicon crystal ingot. An etching process comprising: etching the surface of the crystalline silicon wafer to have a facet having a width of 10 μm or more and 150 μm or less; and forming an electrode on the surface of the crystalline silicon wafer having the facet. The etching amount of the crystalline silicon wafer is 5 μm or more and 25 μm or less per one surface of the crystalline silicon wafer. In the etching step, the concentration of the aqueous solution of sodium hydroxide is 20% by mass or more and 35% by mass or less. Of semiconductor device using Also it relates to.

The present invention also relates to a semiconductor device including the above-described solar cell silicon wafer and the electrode provided on the surface having the facet of the crystalline silicon wafer.

ADVANTAGE OF THE INVENTION According to this invention, it is used in order to stably manufacture the solar cell which has a favorable characteristic, and the manufacturing method of the silicon wafer for solar cells which can stably manufacture the solar cell which has a favorable characteristic. A silicon wafer for solar cells can be provided. Moreover, the manufacturing method of the semiconductor device using such a manufacturing method of the silicon wafer for solar cells, and the semiconductor device using the silicon wafer for solar cells can be provided.

In the manufacturing method of the silicon wafer for solar cells of an embodiment, it is a typical perspective view illustrating an example of a process of slicing a silicon crystal ingot with a resin bond wire. It is a typical perspective view illustrating an example of the process in which a crystalline silicon wafer is formed in the manufacturing method of the silicon wafer for solar cells of an embodiment. It is a typical expanded sectional view of an example of the resin bond wire shown in FIG. It is typical sectional drawing of an example of the crystalline silicon wafer obtained by slicing a silicon crystal ingot with a resin bond wire. It is a typical expanded sectional view of an example of a part of surface of the crystalline silicon wafer shown in FIG. (A) is a schematic enlarged plan view of an example of the surface of the crystalline silicon wafer shown in FIG. 4, and (b) is a schematic enlarged sectional view along VIb-VIb of (a). It is typical sectional drawing of an example of the silicon wafer for solar cells formed by etching the surface of the crystalline silicon wafer shown in FIG. 4 as mentioned above. It is a typical expanded sectional view of an example of the surface of the silicon wafer for solar cells shown in FIG. It is a typical expanded sectional view of an example of the facet of the silicon wafer for solar cells of an embodiment. It is a typical expanded sectional view of an example of the facet of the silicon wafer for solar cells obtained by etching the surface of a crystalline silicon wafer with the sodium hydroxide aqueous solution whose sodium hydroxide concentration is larger than 35 mass%. It is a typical expanded sectional view of an example of the facet of the silicon wafer for solar cells obtained by etching the surface of a crystalline silicon wafer with the sodium hydroxide aqueous solution whose sodium hydroxide concentration is less than 20 mass%. (A) is typical sectional drawing which illustrates an example of the process of installing a masking paste on the surface of the silicon wafer for solar cells of embodiment, (b) is the back surface of the silicon wafer for solar cells. It is a typical top view when it sees from the side. (A) is typical sectional drawing illustrating an example of the process of forming an n-type dopant diffusion area | region in the back surface of the silicon wafer for solar cells of embodiment, (b) is (a) silicon for solar cells It is a typical top view when it sees from the back surface side of a wafer. (A) is typical sectional drawing which illustrates an example of the process of installing a masking paste on the surface of the silicon wafer for solar cells of embodiment, (b) is the back surface of the silicon wafer for solar cells. It is a typical top view when it sees from the side. (A) is typical sectional drawing illustrating an example of the process of forming a p-type dopant diffusion area | region in the back surface of the silicon wafer for solar cells of embodiment, (b) is silicon for solar cells. It is a typical top view when it sees from the back surface side of a wafer. (A) is typical sectional drawing illustrating an example of the process of exposing the n-type dopant diffusion area | region and p-type dopant diffusion area | region of the back surface of the silicon wafer for solar cells of embodiment, (b) is (a). It is a typical top view when seeing from the back surface side of the silicon wafer for solar cells. (A) is typical sectional drawing illustrating an example of the process of forming a passivation film in the back surface of the silicon wafer for solar cells of embodiment, (b) is the back surface of the silicon wafer for solar cells. It is a typical top view when it sees from the side. (A) is typical sectional drawing illustrating an example of the process of forming a texture structure in the light-receiving surface of the silicon wafer for solar cells of embodiment, (b) is (a) of the silicon wafer for solar cells. It is a typical top view when it sees from the back side. (A) is typical sectional drawing illustrating an example of the process of forming an anti-reflective film on the texture structure of the silicon wafer for solar cells of embodiment, (b) is silicon for solar cells. It is a typical top view when it sees from the back surface side of a wafer. (A) is typical sectional drawing illustrating an example of the process of forming a contact hole in the passivation film of the back surface of the silicon wafer for solar cells of embodiment, (b) is (a) silicon for solar cells It is a typical top view when it sees from the back surface side of a wafer. (A) is typical sectional drawing illustrating an example of the process of forming the electrode for n-types, and the electrode for p-types in the back surface of the silicon wafer for solar cells of embodiment, (b) is (a). It is a typical top view when it sees from the back surface side of the silicon wafer for solar cells. (A) is the microscope picture of the surface of the n-type single crystal silicon wafer of an Example, (b) is the measurement result of the unevenness | corrugation by the laser microscope of the surface of the n-type single crystal silicon wafer of an Example. (A) is the microscope picture of the surface of the n-type single crystal silicon wafer of an Example, (b) is the measurement result of the unevenness | corrugation by the laser microscope of the surface of the n-type single crystal silicon wafer of an Example. (A) is the microscope picture of the surface of the n-type single crystal silicon wafer of an Example, (b) is the measurement result of the unevenness | corrugation by the laser microscope of the surface of the n-type single crystal silicon wafer of an Example. (A) is the microscope picture of the surface of the n-type single crystal silicon wafer of a comparative example, (b) is the measurement result of the unevenness | corrugation by the laser microscope of the surface of the n-type single crystal silicon wafer of a comparative example. (A)-(f) is typical sectional drawing illustrated about an example of the manufacturing method of the conventional back electrode type photovoltaic cell.

Hereinafter, embodiments of the present invention will be described. In the drawings of the present invention, the same reference numerals represent the same or corresponding parts.

<Slicing process with electrodeposited wire>
FIG. 1 is a schematic perspective view illustrating an example of a step of slicing a silicon crystal ingot with a resin bond wire in the method for manufacturing a silicon wafer for solar cells of the present embodiment. Here, the silicon crystal ingot 50 is sliced by the resin bond wire 53.

As shown in FIG. 1, the resin bond wire 53 is wound between

guide rollers

51 and 52 arranged at a predetermined interval. As a result, the resin bond wire 53 is stretched at a plurality of locations at predetermined intervals along the longitudinal direction of the

guide rollers

51 and 52 in the

respective guide rollers

51 and 52. In this state, when the

guide rollers

51 and 52 repeat normal rotation and reverse rotation, the resin bond wire 53 reciprocates in the direction of the arrow 55.

In the state where the resin bond wire 53 is reciprocating in the direction of the arrow 55, the silicon crystal ingot 50 is moved in the direction of the arrow 54. Then, by pressing the silicon crystal ingot 50 against the resin bond wire 53 that is traveling reciprocally, the silicon crystal ingot 50 is sliced at a plurality of locations, for example, as shown in a schematic perspective view of FIG. A plate-like crystalline silicon wafer 11 is formed. Note that when the silicon crystal ingot 50 is sliced, a coolant such as cooling water is applied to the surface of the silicon crystal ingot 50 and sliced, so that generation of heat to the resin bond wire 53 can be suppressed during slicing.

The silicon crystal ingot 50 is preferably sliced so that the {100} plane is exposed. In this case, the light-receiving surface of the solar cell silicon wafer obtained by the present invention can be a {100} surface, and it becomes easy to form a texture structure by alkali etching. It tends to be able to be manufactured stably.

FIG. 3 shows a schematic cross-sectional view of an example of the resin bond wire 53 shown in FIG. Here, the resin bond wire 53 includes the core wire 20 and the abrasive grains 22 fixed to the outer peripheral surface of the core wire 20 with the resin bond material 21.

For example, a piano wire can be used as the core wire 20. The diameter of the core wire 20 can be about 115 micrometers, for example. For example, diamond abrasive grains can be used as the abrasive grains 22. As the resin bond material 21, for example, a resin on the outer surface of the core wire 20 can be used. The thickness of the resin bond material 21 can be about 3 to 5 μm, for example.

In the method for producing a silicon wafer for solar cell of the present embodiment, as the abrasive grains 22 of the resin bond wire 53, abrasive grains 22 having an average particle diameter of 10 μm or more and 20 μm or less are used. Conventionally, a lot of scratches are formed on the surface of the crystalline silicon wafer 11, and the patterning property of the masking paste printed on the surface of the crystalline silicon wafer 11 during the production of the solar cell is lowered, and the carrier just below the electrode of the solar cell. The characteristics of the solar cell may deteriorate due to the occurrence of recombination. Accordingly, as a result of intensive studies by the present inventors, the silicon crystal ingot 50 is sliced using a resin bond wire 53 having an abrasive grain 22 having an average particle diameter of 10 μm or more and 20 μm or less, whereby the surface of the crystalline silicon wafer 11 is It has been found that the formation of scratches can be suppressed, and a solar cell having good characteristics can be stably produced.

In this specification, the average grain size of the abrasive grains 22 is 10 μm or more and 20 μm or less. The grain diameter of the abrasive grains 22 calculated from the major axis “a” and the minor axis “b” of the abrasive grains 22 by the following formula (i). It means that 90% or more is included in the range of 10 μm or more and 20 μm or less.

Particle size of abrasive grains 22 = (major axis a + minor axis b) / 2 (i)
As the silicon crystal ingot 50, for example, a single crystal silicon ingot or a polycrystalline silicon ingot produced by the Czochralski method or a casting method is used, and a single crystal silicon ingot is preferable. When the silicon crystal ingot 50 is a single crystal silicon ingot, the characteristics of a solar cell manufactured using the silicon wafer for solar cell obtained by the present invention tend to be good. The silicon crystal ingot 50 may have an n-type or p-type conductivity type by being doped with an n-type or p-type dopant.

FIG. 4 shows a schematic cross-sectional view of an example of the crystalline silicon wafer 11 obtained by slicing the silicon crystal ingot 50 with the resin bond wire 53. Here, slice damage 1 a is generated on the surface of the crystalline silicon wafer 11 due to the slicing of the silicon crystal ingot 50 using the resin bond wire 53.

FIG. 5 shows a schematic enlarged cross-sectional view of an example of a part of the surface of the crystalline silicon wafer 11 shown in FIG. As shown in FIG. 5, large undulations (hereinafter referred to as “saw marks”) 61 are formed on the surface of the crystalline silicon wafer 11. A scratch 71 is formed on the surface of the crystalline silicon wafer 11.

The saw mark 61 is formed due to the cutting of the silicon crystal ingot 50 using the resin bond wire 53. That is, as shown in FIG. 1, the crystalline silicon wafer 11 is obtained by pressing and cutting the silicon crystal ingot 50 against the reciprocating resin bond wire 53, but every time the travel direction 55 of the resin bond wire 53 is switched. The resin bond wire 53 stops temporarily and the linear velocity falls. As a result, the depth of cut into the silicon crystal ingot 50 by the resin bond wire 53 varies along the moving direction of the silicon crystal ingot 50 relative to the resin bond wire 53 (the direction of the arrow 54). Appears on the surface of the crystalline silicon wafer 11.

FIG. 6A shows a schematic enlarged plan view of an example of the surface of the crystalline silicon wafer 11 shown in FIG. 4, and FIG. 6B shows an enlarged cross section along VIb-VIb of FIG. 6A. The figure is shown. On the surface of the crystalline silicon wafer 11, the abrasive grain marks 72 are formed linearly by the abrasive grains 22 of the resin bond wire 53, and the scratches 71 that are concave scratches larger than the abrasive grain marks 72 are formed. Yes.

In the present specification, the scratch 71 means a scratch having a width W of 1 μm or more, a length L of 1 μm or more, and a depth H of 1 μm or more. Here, the width W is the length of the scratch in the direction perpendicular to the extending direction of the abrasive grain trace 72, and the length L is the length of the scratch in a direction parallel to the extending direction of the abrasive grain trace 72, The depth H is the deepest length in the direction perpendicular to the surface of the crystalline silicon wafer 11.

The width W, the length L, and the depth H of the scratch 71 can be measured using, for example, a laser microscope. As the laser microscope, for example, OLS3000 manufactured by Olympus Corporation can be used.

Here, the area ratio of the scratch occupying the surface of the crystalline silicon wafer 11 is preferably 0.1% or less. In this case, the patterning property of the masking paste printed on the surface of the crystalline silicon wafer 11 during the production of the solar cell is degraded, and the recombination of carriers occurs directly under the electrode of the solar cell. The tendency to be able to suppress the decrease is increased.

In addition, the area ratio (%) of the scratch can be calculated by the following equation (ii).

Scratch area ratio (%) = 100 × (total of scratch areas existing on the surface of the crystalline silicon wafer 11) / (area of the surface of the crystalline silicon wafer 11) (ii)
<Process for etching a crystalline silicon wafer>
Next, a step of etching the surface of the crystalline silicon wafer 11 is performed. Thereby, the slice damage 1a on the surface of the crystalline silicon wafer 11 shown in FIG. 4 can be removed, and a crater-like depression (facet) can be formed on the surface of the crystalline silicon wafer 11.

The step of etching the surface of the crystalline silicon wafer 11 is not particularly limited as long as the surface of the crystalline silicon wafer 11 can be etched, but the sodium hydroxide concentration is 20% by mass or more and 35% by mass or less, preferably Preferably, the etching is performed by etching the surface of one side of the crystalline silicon wafer 11 with a thickness of 5 μm or more and 25 μm or less with a sodium hydroxide aqueous solution of 24% by mass or more and 32% by mass or less.

As a result of intensive studies by the present inventors, the surface of the crystalline silicon wafer 11 is etched with an aqueous sodium hydroxide solution having a sodium hydroxide concentration of 20% by mass to 35% by mass, preferably 24% by mass to 32% by mass. In such a case, if the surface of one side of the crystalline silicon wafer 11 is etched by a thickness of 5 μm or more and 25 μm or less, the etching is performed by the same thickness with an aqueous sodium hydroxide solution having a sodium hydroxide concentration higher than 35 mass%. This is because it has been found that the smoothness of the surface of the crystalline silicon wafer 11 can be improved.

For example, when etching is performed to a thickness of 13 μm on one surface of the crystalline silicon wafer 11 with an aqueous solution of sodium hydroxide having a sodium hydroxide concentration of 30% by mass, sodium hydroxide having a sodium hydroxide concentration of 48% by mass is obtained. The smoothness of the surface of the crystalline silicon wafer 11 equal to or higher than that of the conventional etching in which the etching amount is about 30 μm per one surface of the crystalline silicon wafer 11 with the aqueous solution can be achieved.

Thus, the contact area between the surface of the crystalline silicon wafer 11 and the electrode with improved smoothness and the electrode is increased, so that the contact resistance between the surface of the crystalline silicon wafer 11 and the electrode and the interface between the surface of the crystalline silicon wafer 11 and the electrode are increased. Carrier recombination can be reduced, and by improving the printing accuracy of the masking paste printed on the surface of the crystalline silicon wafer 11 with improved smoothness, the shunt resistance is improved and the reverse saturation current is reduced. can do.

Further, by suppressing the etching amount, it is possible to suppress the mechanical strength of the crystalline silicon wafer 11 and the decrease in conversion efficiency of the solar battery cell manufactured using the crystalline silicon wafer 11. Thereby, it becomes possible to manufacture the silicon wafer for solar cells which can manufacture stably the solar cell which has a favorable characteristic.

Here, the etching amount (etching depth) on one surface of the crystalline silicon wafer 11 is preferably 5 μm or more and 20 μm or less, and more preferably 5 μm or more and 15 μm or less. When the etching amount on one surface of the crystalline silicon wafer 11 is 5 μm or more and 20 μm or less, particularly when the etching amount is 5 μm or more and 15 μm or less, the etching amount on one surface of the crystalline silicon wafer 11 is further suppressed while suppressing the etching amount on one side. There is a greater tendency to improve the surface smoothness.

It should be noted that the etching amount of the surface of the crystalline silicon wafer 11 means a reduction amount (μm) in the thickness direction of the crystalline silicon wafer 11 on one surface of the crystalline silicon wafer 11 by the etching.

<Silicon wafer silicon wafer>
FIG. 7 shows a schematic cross-sectional view of an example of a silicon wafer for a solar cell formed by etching the surface of the crystalline silicon wafer shown in FIG. 4 as described above, and FIG. 8 shows the solar cell shown in FIG. The typical expanded sectional view of an example of the surface of the silicon wafer for manufacture is shown.

As shown in FIG. 7, the slice damage no longer exists on the surface of the silicon wafer 1 for solar cells, but the facet formed due to the etching of the sodium hydroxide aqueous solution having the above concentration as shown in FIG. 62 is formed.

FIG. 9 shows a schematic enlarged sectional view of an example of the facet 62 shown in FIG. An aqueous sodium hydroxide solution having a sodium hydroxide concentration of 20% by mass to 35% by mass, preferably 24% by mass to 32% by mass, with a surface of one side of the crystalline silicon wafer 11 of 5 μm to 25 μm, preferably 5 μm to 20 μm. More preferably, the width of the facet 62 formed on the surface of the solar cell silicon wafer 1 by etching to a thickness of 5 μm to 15 μm is 10 μm to 150 μm, preferably 20 μm to 60 μm. The depth is not less than 0.1 μm and not more than 10 μm.

For example, the width of the facet 62 on the surface of the silicon wafer 1 for solar cells obtained by etching the surface of one side of the crystalline silicon wafer 11 by 13 μm with a sodium hydroxide aqueous solution having a sodium hydroxide concentration of 30% by mass is shown in FIG. As shown in FIG. 9, the thickness is 20 to 60 μm.

On the other hand, as shown in the schematic enlarged cross-sectional view of FIG. 10, for a solar cell etched by 5 μm or more and 25 μm or less per one surface of a crystalline silicon wafer with a sodium hydroxide aqueous solution having a sodium hydroxide concentration higher than 35 mass%. The width of the facet 63 formed on the surface of the silicon wafer is much narrower than the case where the same amount of etching is performed with a sodium hydroxide aqueous solution having a sodium hydroxide concentration of 20% by mass to 35% by mass. The depth is not less than 0.1 μm and not more than 10 μm.

For example, the width of the facet 63 on the surface of the silicon wafer for solar cells obtained by etching the surface of one side of the crystalline silicon wafer by 13 μm with a sodium hydroxide aqueous solution having a sodium hydroxide concentration of 48% by mass is shown in FIG. As shown, it is 3 μm or more and 15 μm or less.

Furthermore, as shown in the schematic enlarged sectional view of FIG. 11, silicon for solar cells etched by 5 μm or more and 25 μm or less per one side surface of a crystalline silicon wafer with a sodium hydroxide aqueous solution having a sodium hydroxide concentration of less than 20% by mass. A pyramidal projection 65 is formed inside the facet 64 formed on the surface of the wafer.

Thus, sodium hydroxide aqueous solution having a sodium hydroxide concentration of 20% by mass to 35% by mass, preferably 24% by mass to 32% by mass, 5 μm to 25 μm, preferably 5 μm to 20 μm, more preferably 5 μm. The surface of the silicon wafer for solar cells 1 having a facet 62 having a width of 10 μm or more and 150 μm or less and a depth of 0.1 μm or more and 10 μm or less formed by etching to a thickness of 15 μm or less. Has a smooth surface compared to the other cases.

When the electrode is formed on such a gentle surface, the protrusion 65 is formed on the surface where the width of the facet 63 is not narrow as shown in FIG. 10 and inside the facet 64 as shown in FIG. Compared with the case where an electrode is formed on a non-smooth surface, the contact resistance between the silicon wafer for solar cell 1 and the electrode and the recombination of carriers at the interface between the surface of the silicon wafer for solar cell 1 and the electrode can be reduced. It is clear.

Further, when the masking paste is printed on such a gentle surface, the protrusion 65 is formed on the surface where the width of the facet 63 is narrow as shown in FIG. 10 and on the inside of the facet 64 as shown in FIG. It is clear that the printing accuracy of the masking paste is improved as compared with the case where the masking paste is printed on the surface which is formed and is not gentle. Therefore, a sodium hydroxide aqueous solution having a sodium hydroxide concentration of 20% by mass to 35% by mass, preferably 24% by mass to 32% by mass, is 5 μm to 25 μm, preferably 5 μm to 20 μm, more preferably 5 μm to 15 μm. When the solar cell silicon wafer 1 formed by etching the following thickness is used, a solar cell having good characteristics can be stably manufactured.

90% or more of the facets 62 formed on the surface of the silicon wafer 1 for solar cells are facets 62 having a width of 10 μm to 150 μm, preferably 20 μm to 150 μm and a depth of 0.1 μm to 10 μm. Is preferred. In this case, the surface of the solar cell silicon wafer 1 becomes smoother, and the tendency to stably manufacture solar cells having good characteristics increases.

<Method for Manufacturing Back Electrode Solar Cell>
Hereinafter, with reference to FIG. 12 to FIG. 21, a method of manufacturing the back electrode type solar cell according to the embodiment will be described.

First, as shown in the schematic cross-sectional view of FIG. 12A and the schematic plan view of FIG. 12B, an n-type or p-type solar device manufactured to have a wide facet 62 by the etching described above. The masking paste 2 is provided on the entire surface of the light-receiving surface side (light-receiving surface) of the battery silicon wafer 1 and the opening 14 is provided on the surface (back surface) on the back surface side of the silicon wafer 1 for solar cells. 2 is installed in a strip shape. FIG. 12B is a schematic plan view when FIG. 12A is viewed from the back surface side of the solar cell silicon wafer 1.

The above etching is performed using an aqueous sodium hydroxide solution having a sodium hydroxide concentration of 20% by mass to 35% by mass, preferably 24% by mass to 32% by mass, preferably 5 μm to 25 μm per surface on one side, preferably The etching is performed by etching to a thickness of 5 μm or more and 20 μm or less, more preferably 5 μm or more and 15 μm or less. The etching is performed on each of the light receiving surface and the back surface of the silicon wafer 1 for solar cells.

As the masking paste 2, for example, a solvent, a thickener, and a material containing a silicon oxide precursor and / or a titanium oxide precursor can be used. Moreover, as the masking paste 2, a paste containing no thickener can be used.

Examples of the solvent include ethylene glycol, methyl cellosolve, methyl cellosolve acetate, ethyl cellosolve, diethyl cellosolve, cellosolve acetate, ethylene glycol monophenyl ether, methoxyethanol, ethylene glycol monoacetate, ethylene glycol diacetate, diethylene glycol, diethylene glycol monomethyl ether, Diethylene glycol monoethyl ether acetate, diethylene glycol monobutyl ether, diethylene glycol monobutyl ether acetate, diethylene glycol dimethyl ether, diethylene glycol methyl ethyl ether, diethylene glycol diethyl ether, diethylene glycol acetate, triethyl glycol, triethylene glycol Cole monomethyl ether, triethylene glycol monoethyl ether, tetraethylene glycol, liquid polyethylene glycol, propylene glycol, propylene glycol monomethyl ether, propylene glycol monoethyl ether, propylene glycol monobutyl ether, 1-butoxyethoxypropanol, dipropyl glycol, dipropylene Glycol monomethyl ether, dipropylene glycol monoethyl ether, tripropylene glycol monomethyl ether, polypropylene glycol, trimethylene glycol, butane dial, 1,5-pentane dial, hexylene glycol, glycerin, glyceryl acetate, glyceryl diacetate, glyceryl triacetate, Trimethylol Pro 1,2,6-hexanetriol, 1,2-propanediol, 1,5-pentanediol, octanediol, 1,2-butanediol, 1,4-butanediol, 1,3-butanediol, dioxane , Trioxane, tetrahydrofuran, tetrahydropyran, methylal, diethyl acetal, methyl ethyl ketone, methyl isobutyl ketone, diethyl ketone, acetonyl acetone, diacetone alcohol, methyl formate, ethyl formate, propyl formate, methyl acetate, ethyl acetate alone or two These can be used in combination.

As a thickener, it is desirable to use ethyl cellulose, polyvinyl pyrrolidone or a mixture of both, but various quality and properties of bentonite, generally inorganic rheological additives for various polar solvent mixtures, nitrocellulose and other cellulose compounds , Starch, gelatin, alginic acid, highly dispersible amorphous silicic acid (Aerosil®), polyvinyl butyral (Mowital®), sodium carboxymethylcellulose (vivistar), thermoplastic polyamide resin (Eurelon®) ), Organic castor oil derivative (Thixin R (registered trademark)), diamide wax (Thixatrol plus (registered trademark)), swollen polyacrylate (Rheolate (registered trademark)), polyether Urea - polyurethane, polyether - polyol like can also be used.

Examples of the silicon oxide precursor include a general formula R ¹ ' _n Si (OR ¹ ) _4-n such as TEOS (tetraethyl orthosilicate) (R ¹ ' represents methyl, ethyl or phenyl, R ¹ represents methyl, A substance represented by ethyl, n-propyl or i-propyl, wherein n represents 0, 1 or 2) can be used.

Examples of the titanium oxide precursor include, in addition to Ti (OH) ₄ , a substance represented by R ² ' _n Ti (OR ² ) _4-n such as TPT (tetraisopropoxy titanium) (R ² ' is methyl, Represents ethyl or phenyl, R ² represents methyl, ethyl, n-propyl or i-propyl, n represents 0, 1 or 2), and also includes TiCl ₄ , TiF ₄ and TiOSO ₄ It is.

When a thickener is used, examples of the thickener include castor oil, bentonite, nitrocellulose, ethylcellulose, polyvinylpyrrolidone, starch, gelatin, alginic acid, amorphous silicic acid, polyvinyl butyral, sodium carboxymethylcellulose, polyamide Resin, organic castor oil derivative, diamide / wax, swollen polyacrylate, polyether urea-polyurethane, polyether-polyol and the like can be used alone or in combination of two or more.

The installation method of the masking paste 2 is not particularly limited, and for example, a conventionally known coating method can be used.

Thereafter, the masking paste 2 installed on the light receiving surface and the back surface of the silicon wafer 1 for solar cells is dried.

As a drying method of the masking paste 2, for example, the solar cell silicon wafer 1 after the masking paste 2 is installed is placed in an oven, and the masking paste 2 is heated at a temperature of about 300 ° C. for a period of several tens of minutes, for example. Can be done.

Then, the masking paste 2 after being dried as described above is baked to solidify the masking paste 2. The baking of the masking paste 2 can be performed, for example, by heating the masking paste 2 at a temperature of 800 ° C. or higher and 1000 ° C. or lower for a time of 10 minutes or longer and 60 minutes or shorter.

Next, as shown in the schematic cross-sectional view of FIG. 13A and the schematic plan view of FIG. 13B, the n-type dopant-containing gas 4 is allowed to flow so that the back surface side of the silicon wafer 1 for solar cells is flown. The n-type dopant is diffused on the back surface of the solar cell silicon wafer 1 exposed from the opening 14 to form the n-type dopant diffusion region 3 in a strip shape.

As the n-type dopant-containing gas 4, for example, POCl ₃ containing phosphorus which is an n-type dopant can be used. The n-type dopant diffusion region 3 is a region having a higher n-type dopant concentration than the solar cell silicon wafer 1. Moreover, FIG.13 (b) is a typical top view when Fig.13 (a) is seen from the back surface side of the silicon wafer 1 for solar cells.

Thereafter, all the masking pastes 2 on the light receiving surface and the back surface of the solar cell silicon wafer 1 are once removed. The removal of the masking paste 2 can be performed, for example, by immersing the solar cell silicon wafer 1 on which the masking paste 2 is installed in an aqueous hydrofluoric acid solution.

Next, as shown in the schematic cross-sectional view of FIG. 14A and the schematic plan view of FIG. 14B, a masking paste is applied to the entire surface (light-receiving surface) on the light-receiving surface side of the silicon wafer 1 for solar cells. 2 and the masking paste 2 is installed so that the opening 15 is provided on the front surface (back surface) of the solar cell silicon wafer 1. The opening 15 is formed at a location different from the opening 14. FIG. 14B is a schematic plan view when FIG. 14A is viewed from the back surface side of the solar cell silicon wafer 1.

Then, after the masking paste 2 applied to the light receiving surface and the back surface of the silicon wafer 1 for solar cells is dried, the masking paste 2 is baked to solidify the masking paste 2.

Next, as shown in the schematic cross-sectional view of FIG. 15A and the schematic plan view of FIG. 15B, the p-type dopant-containing gas 6 is allowed to flow so that the back surface side of the silicon wafer 1 for solar cells is flown. A p-type dopant is diffused on the back surface of the solar cell silicon wafer 1 exposed from the opening 15 to form a p-type dopant diffusion region 5 in a strip shape. As the p-type dopant-containing gas 6, for example, BBr ₃ containing boron as a p-type dopant can be used. The p-type dopant diffusion region 5 is a region having a higher p-type dopant concentration than the solar cell silicon wafer 1. FIG. 15B is a schematic plan view when FIG. 15A is viewed from the back surface side of the solar cell silicon wafer 1.

Next, as shown in the schematic cross-sectional view of FIG. 16A and the schematic plan view of FIG. 16B, all the masking pastes 2 on the light-receiving surface and the back surface of the solar cell silicon wafer 1 are removed. . As a result, the entire light-receiving surface and the entire back surface of the solar cell silicon wafer 1 are exposed, and the strip-shaped n-type dopant diffusion region 3 and the strip-shaped p-type dopant diffusion region 5 can be exposed. In addition, FIG.16 (b) is a typical top view when Fig.16 (a) is seen from the back surface side of the silicon wafer 1 for solar cells.

Next, as shown in the schematic cross-sectional view of FIG. 17A and the schematic plan view of FIG. 17B, a passivation film 7 is formed on the back surface of the silicon wafer 1 for solar cells. As the passivation film 7, for example, a silicon oxide film, a silicon nitride film, or a stacked body of a silicon oxide film and a silicon nitride film can be used. The passivation film 7 can be formed by, for example, a plasma CVD method. FIG. 17B is a schematic plan view when FIG. 17A is viewed from the back surface side of the solar cell silicon wafer 1.

Next, as shown in the schematic cross-sectional view of FIG. 18A and the schematic plan view of FIG. 18B, the solar cell silicon wafer 1 is on the side opposite to the side on which the passivation film 7 is formed. The texture structure 8 is formed by texture-etching the light receiving surface. Texture etching for forming the texture structure 8 can be performed by using the passivation film 7 formed on the back surface of the solar cell silicon wafer 1 as an etching mask. In the texture etching, for example, a light-receiving surface of the silicon wafer 1 for solar cells using an etching solution obtained by heating a solution obtained by adding isopropyl alcohol to an alkaline aqueous solution such as sodium hydroxide or potassium hydroxide to 70 ° C. or more and 80 ° C. or less. Can be performed by etching.

Next, as shown in the schematic cross-sectional view of FIG. 19A and the schematic plan view of FIG. 19B, an antireflection film 9 is formed on the texture structure 8 of the silicon wafer 1 for solar cells. As the antireflection film 9, for example, a silicon oxide film, a silicon nitride film, or a laminate of a silicon oxide film and a silicon nitride film can be used. The antireflection film 9 can be formed by, for example, a plasma CVD method or the like. FIG. 19B is a schematic plan view when FIG. 19A is viewed from the back surface side of the solar cell silicon wafer 1.

Next, as shown in the schematic cross-sectional view of FIG. 20A and the schematic plan view of FIG. 20B,

contact holes

10a and 10b are formed by removing part of the passivation film 7, A part of the n-type dopant diffusion region 3 is exposed from the contact hole 10a, and a part of the p-type dopant diffusion region 5 is exposed from the contact hole 10b. FIG. 20B is a schematic plan view when FIG. 20A is viewed from the back surface side of the solar cell silicon wafer 1.

The contact holes 10a and 10b are formed by, for example, forming a resist pattern having openings at portions corresponding to the formation positions of the

contact holes

10a and 10b on the passivation film 7 using a photolithography technique. The passivation film 7 can be formed by etching or the like from the portion.

Next, as shown in the schematic cross-sectional view of FIG. 21A and the schematic plan view of FIG. 21B, an n-type electrode electrically connected to the n-type dopant diffusion region 3 through the contact hole 10a. 12 and the p-type electrode 13 electrically connected to the p-type dopant diffusion region 5 through the contact hole 10b. Here, as the n-type electrode 12 and the p-type electrode 13, for example, an electrode made of a metal such as silver can be used. By the above, a back electrode type solar cell can be produced.

In the back electrode type solar cell produced as described above, the n-type electrode 12 and the p-type electrode 13 are respectively formed on the gentle back surface of the solar cell silicon wafer 1 having a wide facet 62. Since the contact area between the back surface of the silicon wafer 1 for solar cells and each of the n-type electrode 12 and the p-type electrode 13 can be increased, the solar cell silicon wafer 1 and the electrode (n-type electrode 12) , Contact resistance with the p-type electrode 13) and recombination of carriers at the interface between the surface of the silicon wafer 1 for solar cells and the electrode can be reduced.

Further, since the printing pattern of the masking paste 2 is less likely to be disturbed due to the unevenness of the back surface of the silicon wafer 1 for solar cells, the printing accuracy of the masking paste 2 can be improved. Furthermore, since the silicon wafer 1 for solar cells is formed with a smaller etching amount than before, the reduction in mechanical strength of the silicon wafer 1 for solar cells and the conversion efficiency of the back electrode type solar cells are suppressed. Can do. Therefore, in the back electrode type solar cell produced as described above, a back electrode type solar cell having good characteristics can be stably manufactured.

In addition, in the above, although the case where a back surface electrode type solar cell was manufactured using the silicon wafer 1 for solar cells of this Embodiment was not limited to this, a double-sided electrode type solar cell A solar battery cell other than the back electrode type solar battery cell may be manufactured.

<Production and evaluation of crystalline silicon wafer>
First, an n-type single crystal silicon ingot formed by the Czochralski method was pressed against a resin bond wire that was reciprocating and sliced so that the {100} plane was exposed. As a result, a plurality of plate-shaped n-type single crystal silicon wafers (n-type single crystal silicon wafers of the example) having a pseudo square-shaped light receiving surface and back surface with an area of 239.7 cm ² and a thickness of 200 μm are manufactured. It was done.

Here, as the resin bond wire, a diamond wire having an average particle diameter of 8 μm or more and 11 μm or less fixed to the outer peripheral surface of a piano wire having a cross-sectional diameter of 110 μm with a resin bond having a thickness of 3 to 5 μm was used.

FIGS. 22 (a) to 24 (a) show micrographs of the surface of the n-type single crystal silicon wafer of the example after the slicing, respectively, and FIGS. 22 (b) to 24 (b) respectively show the micrographs. 22 shows the measurement results of unevenness of the surface of the n-type single crystal silicon wafer of the examples of FIGS. 22 (a) to 24 (a) using a laser microscope.

As shown in FIGS. 22 to 24, it was confirmed that the surface of the n-type single crystal silicon wafer of the example was gentle.

Further, the area ratio of the scratch occupying the surface of the n-type single crystal silicon wafer of the example shown in FIGS. 22 to 24 was measured. Here, the area ratio of the scratch is such that the surface of the n-type single crystal silicon wafer of the example is irradiated with laser light having a spot diameter of 0.4 μm using a laser microscope (“OLS3000” manufactured by Olympus Corporation). Was done. Specifically, the following (I) to (III) were performed.
(I) The surface of the n-type single crystal silicon wafer of the example is irradiated with laser light having the spot diameter from the above laser microscope, and the presence or absence of scratches is confirmed at 100 locations per n-type single crystal silicon wafer. (The total inspection area is 100 μm × 100 μm × 100 = 1 mm ² ).
(II) The respective areas of the scratches discovered by (I) are calculated, and the sum of the areas is obtained.
(III) As shown by the following equation, the scratch area ratio (%) is calculated by dividing the sum of the areas of scratches obtained in (II) by the sum of the inspection areas.

Scratch area ratio (%) = 100 × (sum of scratch areas) / (sum of inspection areas)
As a result, it was confirmed that the scratch area ratio (%) of the n-type single crystal silicon wafer of the example was 0.1% or less. It was also confirmed that the maximum scratch depth of the n-type single crystal silicon wafer of the example was 5 μm.

For comparison, instead of the resin bond wire, the diamond wire having an average particle diameter of 10 μm or more and 20 μm or less (90% or more of the particle diameter of the diamond abrasive grains is included in the range of 10 μm or more and 20 μm or less on the outer peripheral surface of the piano wire. An n-type single crystal silicon wafer (an n-type single crystal silicon wafer of a comparative example) was prepared in the same manner as described above except that an electrodeposited wire fixed with nickel plating was used.

FIG. 25A shows a micrograph of the surface of the n-type single crystal silicon wafer of the comparative example, and FIG. 25B shows a surface of the n-type single crystal silicon wafer of the comparative example of FIG. The measurement result of unevenness is shown.

As shown in FIG. 25, it was confirmed that the surface of the n-type single crystal silicon wafer of the comparative example was not gentle compared to the surface of the n-type single crystal silicon wafer of the example.

In the same manner as described above, the area ratio of scratches occupying the surface of the n-type single crystal silicon wafer of the comparative example was measured. As a result, it was confirmed that the scratch area ratio (%) of the n-type single crystal silicon wafer of the comparative example was 0.5% or more. It was also confirmed that the maximum scratch depth of the n-type single crystal silicon wafer of the comparative example was 10 μm.

<Production of silicon wafer for solar cell>
Next, the surface of each of the n-type single crystal silicon wafers of Examples and Comparative Examples formed as described above was etched with a sodium hydroxide aqueous solution having a sodium hydroxide concentration of 30 mass% and the etching amount on one surface was 13 μm ( Etching was performed so that the total etching amount of both surfaces was 26 μm, and the thickness of the n-type single crystal silicon wafer after etching was 174 μm. Thus, a plurality of silicon wafers for solar cells of the example were produced from the n-type single crystal silicon wafer of the example, and a silicon wafer for solar cell of the comparative example was produced from the n-type single crystal silicon wafer of the comparative example.

When the surface of the silicon wafer for solar cell of the example and the surface of the silicon wafer for solar cell of the comparative example were respectively observed using the laser microscope, facets formed on the surface of the silicon wafer for solar cell of the example It was confirmed that 90% of the facets had a width of 20 μm or more and 60 μm or less and a depth of 0.1 μm or more and 10 μm or less.

<Production and Evaluation of Back Electrode Solar Cell>
Using the silicon wafer for solar cell of the example and the silicon wafer for solar cell of the comparative example, a back electrode type solar cell of the example and a back electrode type solar cell of the comparative example were produced, respectively.

Specifically, first, a masking paste is printed on the entire surface of one surface of each of the silicon wafer for solar cell of the example and the silicon wafer for solar cell of the comparative example, and a plurality of openings are provided on the opposite surface. A strip-shaped masking paste was printed as follows.

Next, the masking paste was dried by placing each solar cell silicon wafer after printing the masking paste in an oven and heating.

Next, the masking paste was solidified by heating and baking the masking paste after drying as described above.

Next, by pouring POCl ₃ to each solar cell silicon wafer after the masking paste is solidified, phosphorus is diffused into the opening of each solar cell silicon wafer to form an n-type dopant diffusion region. did.

Next, all the masking paste of each silicon wafer for solar cells was removed by immersing each silicon wafer for solar cells in a hydrofluoric acid aqueous solution.

Next, a masking paste was printed so as to have a plurality of openings exposed in a strip shape parallel to the n-type dopant diffusion region on the surface on the n-type dopant diffusion region formation side of each silicon wafer for solar cells. Here, the masking paste was printed such that a region different from the n-type dopant diffusion region was exposed from the opening.

Also, a masking paste was placed on the entire surface of the silicon wafer for each solar cell opposite to the n-type dopant diffusion region forming side.

Then, the masking paste was dried by placing and heating each silicon wafer for solar cell in an oven, and then the masking paste was solidified by heating and baking the masking paste.

Next, by flowing BBr ₃ through each solar cell silicon wafer, boron was diffused into the opening of each solar cell silicon wafer to form a p-type dopant diffusion region.

Next, a passivation film made of a silicon nitride film was formed by plasma CVD on the entire surface on the formation side of the n-type dopant diffusion region and the p-type dopant diffusion region of each silicon wafer for solar cells.

Next, a texture structure was formed by texture-etching the surface opposite to the passivation film forming side of each silicon wafer for solar cells. Here, the texture etching was performed using an etching solution at 70 ° C. to 80 ° C. obtained by adding isopropyl alcohol to a sodium hydroxide aqueous solution having a sodium hydroxide concentration of 3% by volume.

Next, an antireflection film made of a silicon nitride film was formed on the texture structure of each solar cell silicon wafer by plasma CVD.

Next, by removing a part of the passivation film of each solar cell silicon wafer in a strip shape, a contact hole was formed, and a part of each of the n-type dopant diffusion region and the p-type dopant diffusion region was exposed. .

Thereafter, a commercially available silver paste is applied so as to fill the contact holes of the silicon wafers for solar cells, dried, and heated to baked the silver paste to form an n-type dopant diffusion region and a p-type dopant diffusion region. Silver electrodes in contact with each other were formed.

By the above, while producing the back electrode type solar cell of the example from the silicon wafer for solar cell of the example, the back electrode type solar cell of the comparative example was produced from the silicon wafer for solar cell of the comparative example.

Then, the back electrode type solar battery cell of the example and the back electrode type solar battery cell of the comparative example were irradiated with pseudo-sunlight using a solar simulator, current-voltage (IV) characteristics were measured, and the short-circuit current density was measured. (MA / cm ² ), open circuit voltage (V), F.R. F. (Fill Factor) and photoelectric conversion efficiency (%) were measured.

As a result, the short-circuit current density, open-circuit voltage, F.V. F. The relative value of the short circuit current density of the back electrode type solar cell of the comparative example is 100, the relative value of the open circuit voltage is 99, and the photoelectric conversion efficiency is 100, respectively. F. The relative value was 97, and the relative value of photoelectric conversion efficiency was 96.

From the above, it was confirmed that the back electrode type solar battery cell of the example can stably obtain good characteristics as compared with the back electrode type solar battery cell of the comparative example.

This is because, in the back electrode type solar battery cell of the example, the surface of the silicon wafer for solar cell of the example was formed by forming the silver electrode on the gentle surface of the silicon wafer for solar cell of the example with few scratches. The contact area between the silver electrode and the surface of the silicon wafer for the solar cell of the example and the contact resistance between the silver electrode and the surface of the silicon wafer for the solar cell of the example and silver was increased. This is probably because the recombination of carriers at the interface with the electrode could be reduced.

It should be considered that the embodiments and examples disclosed herein are illustrative and non-restrictive in every respect. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

The present invention can be used in a method for slicing a silicon crystal ingot and a method for producing a silicon wafer for solar cells.

1 solar cell silicon wafer, 1a slice damage, 2 masking paste, 3 n-type dopant diffusion region, 4 n-type dopant-containing gas, 5 p-type dopant diffusion region, 6 p-type dopant-containing gas, 7 passivation film, 8 texture structure , 9 Antireflection film, 10a, 10b contact hole, 11 crystalline silicon wafer, 12 n-type electrode, 13 p-type electrode, 14, 15 opening, 20 core wire, 21 resin bond material, 22 abrasive grains, 50 silicon crystal Ingot, 51, 52 guide roller, 53 resin bond wire, 54, 55 arrow, 61 saw mark, 62, 63, 64 facet, 65 protrusion, 71 scratch, 72 abrasive grain trace, 101 silicon wafer, 102 masking paste, 103 n-type dopant diffusion region, 104 n-type dopant, 105 p-type dopant diffusion region, 106 p-type dopant, 107 passivation film, 108 texture structure, 109 antireflection film, 112 n-type electrode, 113 p-type electrode, 114, 115 opening.

Claims

Slicing the silicon crystal ingot (50) with a resin bond wire (53) provided with abrasive grains (22) having an average particle size of 10 μm or more and 20 μm or less;
The crystalline silicon wafer (11) obtained by the slicing of the silicon crystal ingot (50) is etched so as to have a facet (62) having a width of 10 μm or more and 150 μm or less on the surface of the crystalline silicon wafer (11). A process for producing a silicon wafer for solar cells (1).
In the etching step, the crystalline silicon wafer (11) is etched so that a facet (62) having a depth of 0.1 μm or more and 10 μm or less is formed on the surface of the crystalline silicon wafer (11). The manufacturing method of the silicon wafer (1) for solar cells of description.
3. The solar cell silicon according to claim 1, wherein in the etching step, the etching amount of the crystalline silicon wafer (11) is 5 μm or more and 25 μm or less per one surface of the crystalline silicon wafer (11). Manufacturing method of wafer (1).
The method for producing a silicon wafer for solar cells (1) according to any one of claims 1 to 3, wherein an aqueous sodium hydroxide solution having a concentration of 20% by mass to 35% by mass is used in the etching step.
The method for producing a silicon wafer for solar cells (1) according to any one of claims 1 to 4, wherein the silicon crystal ingot (50) is single crystal silicon.
The method for producing a silicon wafer for solar cells (1) according to claim 5, wherein, in the slicing step, the silicon crystal ingot (50) is sliced so that a {100} plane is exposed.
The silicon wafer for solar cells (1) according to any one of claims 1 to 6, wherein in the slicing step, the area ratio of scratches occupying the surface of the crystalline silicon wafer (11) is 0.1% or less. Production method.
Obtained by a production method comprising a step of slicing a silicon crystal ingot (50) with a resin bond wire (53) provided with abrasive grains (22) having an average particle size of 10 μm or more and 20 μm or less,
The silicon wafer for solar cells (1), wherein the area ratio of scratches occupying the surface of the crystalline silicon wafer (11) obtained by the slicing of the silicon crystal ingot (50) is 0.1% or less.
Slicing the single crystal silicon crystal ingot (50) with the resin bond wire (53) so that the {100} plane is exposed;
Etching the single crystal silicon wafer (11) obtained by the slicing of the single crystal silicon crystal ingot (50) using sodium hydroxide, and
A silicon wafer for solar cells (1) having a thickness of 200 μm or less.
The said single crystal silicon wafer (11) is etched so that it may have a facet (62) of the width of 10 micrometers or more and 150 micrometers or less on the surface of the said single crystal silicon wafer (11) in the said process to etch. Silicon wafer for solar cell (1).
In the etching step, the single crystal silicon wafer (11) is etched so that a facet (62) having a depth of 0.1 μm or more and 10 μm or less is formed on a surface of the single crystal silicon wafer (11). The silicon wafer (1) for solar cells according to 9 or 10.
Slicing the silicon crystal ingot (50) with a resin bond wire (53) provided with abrasive grains (22) having an average particle size of 10 μm or more and 20 μm or less;
The crystalline silicon wafer (11) obtained by the slicing of the silicon crystal ingot (50) is etched so as to have a facet (62) having a width of 10 μm or more and 150 μm or less on the surface of the crystalline silicon wafer (11). Process,
Forming electrodes (12, 13) on the surface having the facets (62) of the crystalline silicon wafer (11),
In the etching step, the etching amount of the crystalline silicon wafer (11) is 5 μm or more and 25 μm or less per one surface of the crystalline silicon wafer (11),
A method of manufacturing a semiconductor device, wherein in the etching step, a sodium hydroxide aqueous solution having a concentration of 20% by mass to 35% by mass is used.
A solar cell silicon wafer (11) according to claim 10 or 11, and an electrode (12, 13) provided on the surface having the facet (62) of the crystalline silicon wafer (11). , Semiconductor devices.