WO2012177954A2

WO2012177954A2 - Bi-metallic actuators

Info

Publication number: WO2012177954A2
Application number: PCT/US2012/043654
Authority: WO
Inventors: Arturo A. Ayon; Justin FICKLEN; Conglin CHEN
Original assignee: University of Texas System; University of Texas at Austin
Current assignee: University of Texas System; University of Texas at Austin
Priority date: 2011-06-21
Filing date: 2012-06-21
Publication date: 2012-12-27
Anticipated expiration: 2013-12-21
Also published as: WO2012177954A3

Abstract

A method of fabricating thermal bimorph actuators using high permittivity ferroelectric thin films is disclosed. The device is a thermal can¬ tilever actuator employing barium titanate (BaTiO3) for RF applications. Com¬ pared to electrostatic actuators, this MEMS structure is designed to handle high RF transmitted power while maintaining a high capacitance ratio due to the high permittivity of the ferroelectric thin film employed and without the stiction problems normally associated with other MEMS actuators.

Description

BI-METALLIC ACTUATORS

CROSS REFERENCE TO RELATED APPLICATIONS

[ 0001] This application claims priority to and incorporates by reference the following:

1. U.S. Provisional Application 61/499,275, titled "Bimetallic Actuators for RF Applications," filed June 21, 2011.

BACKGROUND OF THE INVENTION

[ 0002] This specification relates to the field of microelectromechanical systems (MEMS) and more particularly to a bimetallic microelectromechanical actuator.

[ 0003] Systems for manufacturing electrostatic MEMS actuators are known in the art. As shown in FIG. 1, in the conventional approach, a MEMS actuator 110 is mounted on a transmission line 130, with an underlying substrate 120. Conventional MEMS actuators may tolerate high transmitted RF power and have large capacitance ratios, but will also require high operating voltages. Conversely, MEMS actuators may be fabricated with lower capacitance ratios and work at lower operating voltages, but will be able to tolerate only low transmission power.

SUMMARY OF THE INVENTION

[ 0004] A method of fabricating thermal bimorph actuators using high permittivity ferroelectric thin films is disclosed. The device is a thermal cantilever actuator employing barium titanate (BaTi0₃) for RF applications. Compared to electrostatic actuators, this MEMS structure is designed to handle high RF transmitted power while maintaining a high capacitance ratio due to the high permittivity of the ferroelectric thin film employed and without the stiction problems normally associated with other MEMS actuators.

BRIEF DESCRIPTION OF THE DRAWINGS

[ 0005] FIG. 1 is a side view of a prior art electromechanical actuator.

[ 0006] FIG. 2 is a side view of a bimorph actuator.

[ 0007] FIG. 3 is a sequence of matching top and side views of a bimorph actuator in various stages of fabrication, showing the microfabrication method.

[ 0008] FIG. 4 is a top view of a wafer showing measurement points for verifying silicon nitride uniformity.

[ 0009] FIG. 5 is a scanning electron microscope image of a coplanar waveguide (CPW) after metal liftoff, used for verification of a bimorph actuator.

[ 0010] FIG. 6 is a side view of an exemplary BTO beam.

[ 0011] FIG. 7 is a sequence showing a characteristic method of patterning BTO.

[ 0012] FIG. 8 is a diagram of a BTO beam disclosing the longest underetch.

[ 0013] FIG. 9 is a diagram of a sequence for Si0₂ masking for releasing a device without ferroelectric.

[ 0014] FIG. 10 is a diagram of a sequence for Si0₂ masking for releasing a device with ferroelectric.

DETAILED DESCRIPTION OF THE

EMBODIMENTS

[ 0015] In general, MEMS technologists have focused on producing faster, smaller and cheaper microfabricated structures that can offer additional or enhanced capabilities per unit volume. However, MEMS electrostatic actuators employed for RF applications are generally considered ill-suited for handling transmitted RF power in the 5 - 10W range. Among other things, this demands additional circuitry to segregate the MEMS structures from the power handling circuitry. Thus, the demonstration of MEMS devices able to tolerate such power levels would permit an additional stage of miniaturization for existing communication equipment or the introduction of additional electronic features within the same unit volume. MEMS alternatives have been part of the solutions to pressing communication needs, mostly because MEMS actuators, switches and varactors are frequently described as having a better performance compared to their solid-state counterparts including low- losses in the 8 to 120 GHz range. Furthermore, their linearity, and low parasitics are anticipated to enable smaller and lighter devices making them attractive for commercial, space and military communication systems. Due to the aforementioned reasons, they have been studied in monolithically integrated phase-shifters as well as in cas- cadable designs utilizing the MEMS actuators for switching schemes and as variable capacitors. However, state of the art microwave switches for RF applications employing MEMS technology are ill-suited for handling power levels of the order of 5 - 10 Watts.

[ 0016] The main reason for this situation is the predominant utilization of electrostatic actuators for which the spring constant has to be increased significantly to tolerate such power levels and that as a consequence demand operating voltages that exceed those levels normally associated with CMOS circuits and structures or that demand dedicated areas in excess of 1mm² in addition to the actuator itself. A significant improvement could be obtained by fabricating MEMS structures able to handle 5 - 10 Watts of transmitted RF-power without placing additional real estate requirements. The research approach described herein was intended to demonstrate MEMS-based components that would fulfill such requirements.

[ 0017] Thin film MEMS-based RF structures have been fabricated for a number of years, including by Charles Goldsmith from Raytheon and Jason Yao from Honeywell. Their work has included both RF switches and relays. However, the utilization of materials with a relatively high modulus of Young, such as silicon nitride for which E = 270Gpa, or silicon dioxide for which E = 73Gpa, and silicon for which E = 190Gpa, creates the need for high actuation voltages. Specifically, the Honeywell relay requires the application of 60 Volts for actuation (although in a subsequent publication, the Raytheon team reported an actuating voltage of 50 volts) . Another variable of interest is the gap between the actuator and the underlying film. The pull-in voltage scales with the gap according to:

V_pa(g³) z (1)

[ 0018] Thus, smaller gaps are preferred. However, it has been observed that when materials with a large modulus of Young are employed, even a gap as small as ΙΟΟθΑ still demands voltages of the order of 20 Volts to operate. On the other hand, the transmitted power generates an attractive force that promotes self- actuation. This force scales according to

F_RFa(g ²) (2)

[ 0019] Thus, larger gaps need to be prescribed to minimize self actuation effects. Additionally, the capacitance ratio which is considered relevant for microwave applications also demands larger gaps. Therefore, MEMS technologists are forced to choose between actuators that either tolerate higher transmitted RF-power and have larger capacitance ratios but require relatively high voltages to operate; or structures that can tolerate low transmitted RF-power with lower capacitance ratios but that can be operated with relatively low applied voltages.

1. Bi-Morph Actuators

[ 0020] According to the present disclosure, a bi-metallic or "bimorph" actuator is disclosed that is able to produce a prescribed capacitance ratio and to tolerate 5 - 10 Watts of transmitted RF-power.

[ 0021] As shown in FIG. 1, the bimorph actuator 200 includes a substrate 240 and a coplanar waveguide 230 (CPW) mounted thereon. A cantilever 210 is mounted above the CPW 230 and is mechanically biased away from the CPW 230. In the presence of an operative electrical signal, cantilever 210 operably moves toward CPW 230. Bump 250 is provided to limit the mechanical excursion of cantilever downward. Ferroelectric membranes with an anticipated high dielectric constant and low-insertion loss are not required to be in intimate contact with the underlying substrate, precluding failure by stiction. Advantageously, cantilever 210 deflects only in the presence of an operative electrical signal. Also advantageously, the disclosed bimorph actuator 200 does not place additional real estate requirements compared to prior art electrostatic RF MEMS designs.

2. Microfabrication Approach

A microfabrication approach for bimorph actuator 200 is described below.

2.1. Summary of Microfabrication Approach

[ 0022] The microfabrication approach is illustrated in FIG. 3. The process begins with the deposition of a thin insulating layer of silicon nitride (310), followed by the deposition and patterning of the coplanar waveguide (320) employing gold. Subsequently a sacrificial PECVD polysilicon layer is deposited and patterned (330) . The wafer is then coated with a second layer of silicon nitride which upon pattern transfer defines the maximum capacitance the actuator can produce (340) . A thin dielectric film is deposited and patterned employing an Argon plasma that constitutes the first layer for the bimorph actuator (350) ; this is followed by the deposition, doping and patterning of a polysilicon layer (360) that constitutes the second layer of the bimorph actuator. The ferroelectric film is subsequently deposited (370) and an isotropic plasma etch (380) is employed to release the structure shown in 390. The completed bimorph actuator is shown in 394.

2.2. Oetailed Oescription of Microfahrication Approach

2.2.1. Introduction

2.2.2. Procure lightly doped N/P type Silicon Wafer

[ 0023] The first step in fabricating the RF MEMS cantilever is to obtain a silicon substrate. The substrate can be doped p-type (for instance B) , or n-type (for instance P) since the circuitry will be electrically isolated from the substrate. An exemplary device was fabricated using 3-inch and 4-inch p- type single crystal silicon substrates. The silicon crystal orientation was not a primary consideration because no bulk micromachining techniques were used during this process. Nevertheless, wafers were used in this exercise.

[ 0024] Before processing, the wafers must first be cleaned using an exothermic piranha bath which is a mixture of sulfuric acid (H₂S0₄) and hydrogen peroxide (H₂0₂) with a ratio [2:1] . This ensures that all organic materials and metals are removed from the substrate surface.

2.2.3. Deposition of Silicon Nitride

[ 0025] In 310, a relatively thick dielectric film is deposited on the substrate to electrically isolate the silicon wafer from the rest of the device/circuit (e.g. CPW) . For this process Si₃N₄ was chosen as the dielectric and 500θΑ as the targeted thickness (although other dielectrics can be used such as silicon dioxide; alternatively, the device can be built on a dielectric wafer) .

[ 0026] Si₃N₄ is deposited at moderately high temperatures (^800°C) and low pressure (250 mtorr), using dichlorosilane (SiCl₂H₂) and ammonia (NH₃) . Before processing samples, the film had to be characterized. After deposition the substrate is measured using a nine-point method, for example using the nine points specified on FIG. 4. The average thickness is given by Equation (3) and the uniformity by Equation (4) . In an exemplary embodiment, the desired average thickness of 5003A and a nonuniformity of 3.5% were demonstrated.

, _{Γλ λ} P1 + P2 + P3 + P4 + P5 + P6 + P7 + P8 + P9 Avg(A) = (3)

Maximum Thickness— Minimum Thickness , .

Uniformity(%) = * 100 (4)

2 * Aug

[ 0027] In the exemplary embodiment, the film thickness was measured using an ellipsometer as well as an interferometer. The ellipsometer verified that the index of refraction was in = 2.01) . Using the index of refraction calculated using the ellipsometer, the thickness may be verified by taking measurements, for example at positions 1 - 9 specified on FIG. 4. The measured thicknesses of the exemplary embodiment are shown in Table 1 and 2.

Table 1 : Without Using Dummy Wafers

Table 2: With Using Dummy Wafers

[ 0028] After measuring the thickness of the Si₃N₄, a backside etch was performed using reactive-ion etching (RIE) which is known in the art. After RIE the residual stress of 1.23 GPa (tensile) was measured using the Tencor stress measurement tool. (In production the backside removal would be avoided since at that point the film will be considered fully characterized.)

2.2.4. Metal Lift-off for Coplanar Waveguide (CPW)

[ 0029] The coplanar waveguide (CPW) is the actual transmission line which will be carrying the RF signal. It may be fabricated using gold, which has excellent conductivity and resistance to oxide formation. Because gold also has poor adhesion to Si₃N₄, a thin layer (~ 30nm) of titanium was deposited before the gold deposition as an adhesion enhancer (chromium can also be used as an adhesion layer) .

[ 0030] Lift-off requires the use of the AZ 5214 image-reversal photolithography approach. In an exemplary embodiment, by using the 5214 lift-off process the coplanar waveguides were successfully fabricated.

2.2.5. Silicon Deposition (Sacrificial)

[ 0031] In many MEMS devices, sacrificial layers are needed to release the desired moving three dimensional structures. In the present invention, the sacrificial layer is silicon. This layer forms a foundation on which to build the structure,

The conditions for silicon deposition in Table ?? were used.

Table 3: Silicon Process Conditions

[ 0032] The desired thickness of Ιμπι of silicon was achieved and verified with the ellipsometer as well as the index of refraction which was ~ 4.3.

2.2.6. Chlorine/ Argon Reactive Ion Etching of silicon (Mask 2)

[ 0033] Two of the seven masks in the process are dedicated to fabricating a bump 250 that will protect the cantilever from making direct contact with the CPW due to the electrostatic attraction from the high power signal. This is accomplished by etching bump 250 s into the first layer of sacrificial silicon and then encapsulating it with a non-sacrificial material such as Si0₂ or Si₃N₄.

[ 0034] For mask 2, an anisotropic etch is preferred since the size of the bump 250 is 8μπι wide and the film is Ιμπι thick. If an isotropic etch is used, the bump 250 may be only approximately 6μπι wide. A dry plasma etcher in the laboratory with a chlorine (Cl₂) and Ar chemistry may be employed for this step.

2.2.7. Silicon Dioxide Plasma Enhanced Chemical Vapor Deposition and Reactive Ion Etching for Encapsulation (Mask 3)

[ 0035] Once the bump 250 is patterned, it must be protected from the etchants that will remove the silicon sacrificial layer. This can be done by deposition and patterning of a conformal dielectric over the newly fabricated bump 250. First, the deposition rate of Si0₂ must be characterized to obtain a suggestion of how long the deposition should be to acquire the desired film thickness. Table 4 show all of the parameters of the Si0₂ deposition conditions used in this step. In an exemplary embodiment, silicon samples were placed in the reactor and the measured thickness was 1422A which corresponds with a deposition rate of 142A/min. The desired film thickness is approximately 300θΑ and a film thickness of 3167A was measured.

Table 4: Silicon Dioxide Process Conditions

[ 0036] Now using Mask =#=3 the Si0₂ needs to be etched to encapsulate the polysilicon bump 250. The masking material will be the AZ 5209 photoresist employing a clear field mask. Before any photolithography, the etch rates of the Si0₂ and the photoresist, have to be characterized. For this characterization in an exemplary embodiment, two samples containing Si02 and two coated with AZ 5209 photoresist were etched for 10 minutes in a Si02 etch recipe containing trifluoromethane (CHF₃)/Ar plasma (see Table 5) . The resultant average etch rate for Si0₂ and photo-resist were 170 A/ min and 55A/min respectively. Thus, in order to etch 300θΑ of Si0₂, ΙΟΟθΑ of photoresist is needed. In this exercise, the photoresist thickness is Ιμπι thick which was considered appropriate. Also included in the table is the etching rate of silicon information that will be needed in the final step of fabrication.

Table 5: RIE of Silicon Dioxide Process Conditions

2.2.8. Silicon Deposition 2 (Sacrificial)

[ 0037] The remainder of the device is fabricated on top of the sacrificial layer in order for it to be fully released. Following the dry etching of the PECVD Si0₂ another layer of sacrificial polysilicon is added so that the remainder of the device is not fabricated on top of the non-sacrificial Si0₂. Once again, a silicon deposition is performed to obtain another micron of silicon between the bump 250 protecting Si0₂ and the rest of the device.

2.2.9. Deposition of Alumina (Mask 4)

[ 0038] The first layer of the thermal bimorph is aluminum oxide or Alumina (A1₂0₃) . Alumina was chosen due to its high coefficient of thermal expansion (« 5 - 8) . A1₂0₃ is not easily patterned using any traditional wet or dry etching chemistry since it is mostly chemically inert, but it is possible to employ a lift-off process by maintaining a film thickness under 200θΑ.

[ 0039] Since the A1₂0₃ will be the first layer of the bimorph cantilever actuator, it is necessary to characterize the stress of the film. First, a pre-deposition measurement is made on the wafer to set a reference. After A1₂0₃ deposition the thickness is measured using the ellipsometer. Stress measurements may be made made using, for example, a Tencor FLX-2320 stress measurement system. The results from two different runs in an exemplary embodiment are shown in Table 2.2.9. Table 6: Stress Test Results

[ 0040] The film may vary even when the deposition parameters are kept constant. In an exemplary embodiment, the first deposition resulted in a film with a compressive stress of 43 MPa and the second deposition resulted in a tensile stress of 42 MPa. While the stress is important at room temperature (20°C), it is even more important at higher temperatures since a thermal bimorph will be used as the source of actuation.

[ 0041] For sample 1, a thermal stress measurement was taken from 20°C to 150°C in order to observe the stress evolution as a function of temperature. The stress changed from approximately 45 MPa (compressive) to 280 MPa (tensile) with an increase in temperature. Over this temperature range, there is a total change of 325 MPa.

[ 0042] To collect additional information, sample 2 was measured to 250°C and measurements were also taken during the cooling down stage. In that case, the stress initially increases from 42 MPa to 350 MPa which is a change in stress of 308 MPa. When the substrate cools down the stress continues to increase form 350 MPa to approximately 400 MPa.

[ 0043] An additional measurement was performed approximately one week after the first run on sample 2. The initial stress measurement was 365 MPa, which is comparable to the final stress measurement collected the week before. As the temperature increased the stress reduced, as expected, and reached 230 MPa. As the substrate cooled, the stress followed the heating stress with little or no hysteresis effect. If this effect was exhibited it could lead to device unreliability for the anticipated operating conditions. 2.2.10. Silicon doping for Heater Fabrication (Mask 5)

[ 0044] When fabricating a bimorph actuator there must be two materials with different thermal expansion coefficients to achieve mechanical movement. In the exemplary embodiment, A1₂0₃ and silicon were used. Their respective coefficients of their expansion differ by a factor of three. Since this bimorph actuation relies on Joules heating due to an electrical current, one of the materials used in the bimorph must be conductive. Therefore, the polysilicon must be doped using ion implantation to bring its conductivity to the rage of interest.

[ 0045] After doping a sheet resistance of approximately 27Ω/Π was measured

[ 0046] In order to successfully fabricate this doped silicon into conductive resistors, they must be patterned using mask 5. Once again the AZ 5209 photoresist could be used and the previously described photolithography processing conditions to perform a chlorine and Ar plasma etch. After this etch, the photoresist must be removed. Next resistive heaters are fabricated on top of the deposited A1₂0₃.

[ 0047] Now that the dimensions of these resistors are known, as well as the sheet resistance of the phosphorous doped film, the actual resistance of the device can now be calculated and measured. Using the traditional resistance equation (Equation (5)) and the sheet resistance, an equation characteristic of nine devices in the exemplary embodiment was derived.

[ 0048] An exemplary device is shown in FIG. 6, with length 620, width 610 and leg width 630. On each die there are a total of 18 devices with nine on each side. These 9 devices ranged in length from 67μπι to 275μπι in increments of 26μπι. Equation (5) shows resistance, where Rs is the sheet resistance, I is the length, and w is the width. Those measurements, along with the dimensions of the 9 devices, were used to derive Equation (6) . In Equation (6), n is the device number, ranging from 1 to 9, and R_s is the sheet resistance. In the exemplary embodiment, a resistance of 28 Ω/D was used. Calculated versus measured resistance values are shown in Table 2.2.10. R— R_s—

w

Table 7: Calculated vs. Measured Resistance for R_s = 28Ω/Π

[ 0049] Using both an optical microscope and a scanning electron microscope (SEM), images may be obtained to verify that the fabrication is, in fact, going as planned. The device may be viewed under varying degrees of magnification to ensure that fabrication is proceeding as intended. Properly formed ground 520 and signal 510 nodes are shown in FIG. 5.

2.2.11. Barium Titanate Deposition and Patterning (Mask 6)

[ 0050] At this point the unreleased bimorph has been fabricated. In order to achieve the high capacitance ratio, a high permittivity dielectric such as barium titanate (BaTi0₃) , barium zirconate titanate (Ba(Zr, Ti)0₃), or lead strontium titanate ((Pb, Sr)Ti0₃) has to be deposited and patterned. The pulsed-laser-deposition (PLD) method, among other suitable methods known in the art, may be used.

[ 0051] Before the film can be used on the device, it must be fully characterized. It is important to know generally the deposition rate, etch rate, and uniformity. For characterization purposes, samples deposited at different temperatures and at different times on bare silicon can be used. This method simplifies the characterization process and reduces the number of destroyed devices. In an exemplary embodiment, a total of six samples were provided before performing the PLD for the actual devices. This characterization step provides a good idea of the deposition rate and etch rate of the desired film.

[ 0052] Upon receiving the samples, the thickness is measured. In an exemplary embodiment, The first measurement was performed using a surface profiler. The PLD machine requires the sample to be clamped down inside of the chamber. Since the BaTi0₃ (BTO) film does not deposit on the area of the substrate under the clamp, the profile of that area can provide the thickness of that film. The film thickness may then be measured using the spectroscopic ellipsometer. In the exemplary embodiment, the film model was formulated initially using a Cauchy random variable model fitting all of the optical parameters. Finally, an interferometer thickness measurement can be made if the index of refraction is known. Using the index of refraction obtained using the ellipsometer, the thickness of the film can now be measured relatively accurately. In the exemplary embodiment, the first four films provided were deposited at 400°C for deposition times varying from 5 minutes to 45 minutes. The resulting thicknesses and deposition rates can be seen in Table 2.2.11.. The resultant index of refraction was between 1.7 and 1.9, depending on wavelength.

Table 8: Measurements of BTO Films Deposited at 400 °C

[ 0053] The x-ray diffraction pattern from an exemplary sample deposited at 400°Cshows only one peak at 2Θ = 69.16° which is known to be silicon. Unfortunately, the lack of peaks in this diffraction pattern also shows a lack of crystalline BaTi0₃.

[ 0054] Two more exemplary samples were deposited at 700°C for 15 minutes and 30 minutes. Once again, the samples were measured using the same three metrology tools used to measure the previous films deposited at 400°C . For the films deposited at 700°C, the index of refraction was 2.1 - 2.3, depending on wavelength of light. For the two samples provided, it can be observed that the deposition rate is relatively the same with a difference of less than 3A/min. The various film thickness measurements and deposition rates can be seen in Table 2.2.11.

Table 9: BTO Films Deposited at 700°C

[ 0055] When x-ray diffraction was performed on the exemplary samples, there appeared to be a number of other peaks beside the silicon peak. These were verified to be BTO peaks.

[ 0056] Accurate 2Θ measurements of the BTO peaks yielded approximately 31.56°, representing the 110 crystal plane of BaTi0₃ for the first peak. The second peak has a value of 44.64°, which corresponds to the 200 BTO crystal plane. The last prominent BTO peak had a value of 56.2°, which represents the 211 crystalline plane.

[ 0057] Because the permittivity of the film is strongly dependent on the crystallinity, the films deposited at 400°C were not employed in the exemplary embodiment. Since the desired thickness of the dielectric is between 300θΑ and 5000A, the corresponding deposition time is between 15 and 25 minutes. Samples were therefore deposited at 700°C with a desired film thickness of approximately 5000A.

[ 0058] Characterization of dry and wet etching of the BaTi0₃ thin films may be carried out using a reactive ion etcher and buffered oxide etch, respectively. CHF₃ is employed in the reactive ion etching. Higher power increases the ion-induced etching, which dramatically increases the etch rate. In the exemplary embodiment, the gas flow remained a constant 20 sccm/min for both Ar and CF₄ while the power was varied.

[ 0059] The role of physical Ar ion sputtering also plays a big role in the removal rate of BaTi0₃. In the exemplary embodiment, the flow rate of CF₄ and Ar were varied using the Equation (7) .

CF₄ + Ar ^v '

[ 0060] The value is equal to zero when there is only Ar gas, and equal to one when there is only CF₄ gas.

[ 0061] The highest etch rate is achievable employing a strictly Ar plasma, but argon's effect of physically sputtering the material could lead to the re-deposition of the material elsewhere on the substrate.

[ 0062] The etch rates observed in the exemplary embodiment are shown in Table 2.2.11..

Table 10: Observed Etch Rates

[ 0063] The fastest etch rate in the exemplary embodiment was approximately 5 nm/min. This recipe used 50 seems of Ar, which physically sputters the material away.

[ 0064] Next, a masking material is needed. The selectivity of the masking material must be high enough that enough will remain when etching is complete. Traditional masks for RIE are photoresist and Si0₂. In the exemplary embodiment, a 10-minute Ar etch was performed on six samples, three employing films of AZ 5209 photoresist, and three with films of Si0₂. The average etch rate was then calculated using recipe 4 from Table 2.2.11.. From these etch rates, their selectivity to BaTi0₃ was determined. Both the average etch rate of these two materials and their selectivity to BaTi0₃ can be seen in Table 2.2.11.. A hard mask of Si0₂ will have to be used since 5 to 7 microns of photoresist would have to be used to successfully mask the device since the selectivity of BaTi0₃ to photoresist is 0.082. Silicon dioxide, on the other hand, has a BaTi0₃/Si0₂ selectivity of 1.083 which means that only 4000 A of Si0₂ will be needed to mask the same amount of BaTi0₃.

Table 11 : Effects of Ar Plasma on Photoresist and Oxide Masks

[ 0065] Masking with Si0₂ requires a total of 8 steps as seen in FIG. 7. Starting with the substrate in 710, first the hard masking material is deposited in 720. Si0₂ may be employed and the thickness may be slightly thicker than the BaTi0₃ film to be etched. When depositing the Si0₂ mask, small pieces of silicon wafer are placed next to the sample so that the approximate thickness can be determined. The oxide process is the same recipe used in Mask #3. Next, the Si0₂ is patterned using the RIE recipe specified for Mask #3. The sample is first spin-coated with photoresist in 730, which is then exposed and developed in 740. The substrate is then placed into the dry etching reactor for a CHF₃/Ar etch in 750, after which the photoresist is removed using an oxygen plasma in 760.

[ 0066] One of the wafer pieces with the Si0₂ deposited on it is placed in the reactor to verify complete etching of the oxide masking material. Now there is a hard mask of Si0₂. Next the BaTi0₃ can be etched using the characterized Ar etch recipe. Once again, another piece of wafer with the Si0₂ film is deposited in the final release of the device. It is placed in the reactor with the sample to verify that the mask remains throughout the release of the device. This sample will also tell the amount of oxide to remove after the etch. Once the film has been completely etched in 770, the remainder of the oxide can be removed in 780 using the CHF₃/Ar oxide etch used in previous processing steps.

2.2.12. Device Release utilizing Sulfur Hexafluoride Plasma

[ 0067] The final step in the fabrication process is the releasing of the device employing SF₆ dry etching. This method of dry etching is used to isotropically etch silicon to release certain structures in MEMS processing. This dry method of releasing the structure eliminates the possibility of stiction destroying the device. Preferably, an SF₆ gas employing traditional RIE is used. The remaining etches employ the maximum amount of SF₆, which is seem, to provide the silicon with the most fluorine possible.

[ 0068] In the exemplary embodiment, the power was initially set to 30 W and the pressure was set at a low 10 mTorr. This resulted in relatively poor selectivity of 1.1. By increasing the power 10 W, the selectivity increased to 4. Varying the pressure-distance product can tailor the selectivity. This is done by increasing or decreasing the pressure until an increase in selectivity is observed. In the exemplary embodiment, the pressure was increased to 20 mTorr and the power was set back to the original 30 W resulting in a selectivity of 4.78.

[ 0069] After further varying parameters a selectivity of approximately 10 was achieved in the exemplary embodiment. Because the bottom electrode of the RIE is covered by an eight inch silicon wafer, and the spontaneous etch of silicon is mass transport limited, the fluorinated chemistry should not be exposed to too much silicon. Reducing the amount of unnecessary silicon being etched will greatly increase the selectivity.

[ 0070] Preferably, the eight inch silicon wafer is covered with polyimide film ( "Kapton" ) tape, which is known in the art. This increases the etch rate of the polysilicon to approximately 2780A/min and the etch rate of Si₃N₄ on the order of 65A/min. Thus, the Si/Si₃N₄ has selectivity on the order of 44. Several recipes and their resultant selectivity can bee seen in Table 12.

[ 0071] The preferred SF₆ recipe in the exemplary embodiment is recipe 7 from Table 12 The longest under-etch 810 that needs to be performed is 40μπι as shown in FIG. 8, which is 20μπι in each direction. With an isotropic etch rate of 278θΑ per minute it will take a total of 2^ hours to completely release the structure. Table 12: Selectivity of Silicon to Si₃N₄ in SF₆ Plasma

[ 0072] Now two more questions arise:

• Which materials exposed to the SF₆ plasma will survive the etch?

• How will the materials be masked that will not survive the SF₆ etch?

[ 0073] Regarding the first question, three materials will be exposed to the plasma: A1₂0₃, BaTi0₃, and silicon. The silicon will be removed after 3 minutes, but it was not known whether A1₂0₃ and BaTi0₃ would survive the etch. In the exemplary embodiment, the etch rate of both BaTi0₃ and A1₂0₃ in the SF₆ plasma was determined experimentally. Two samples containing evaporated A1₂0₃, and the two BaTi0₃ samples, used in the Ar etch characterization, were subjected to a 40 minute SF₆ etch and the resultant etch rate was determined.

[ 0074] The BaTi0₃ and A1₂0₃ samples were placed in the plasma reactor for a total etch time of 30 minutes. The thicknesses of the films were measured using an ellipsometer both before and after the 30 min etch. It was found that the films are capable of surviving the 2^ hour SF₆ plasma etch. Results are shown in Table 13. Table 13: Barium Titanate and Alumina SF₆ Etch Rate (30 min)

[ 0075] Given a maximum etch time of 210 minutes the maximum amount of the films etched will be less than 21θΑ.

[ 0076] In the exemplary embodiment, a thermal analysis was performed for a bimorph without the ferroelectric thin film, and thus two separate devices were released: one bimorph without the ferroelectric (see FIG. 9) and one with the ferroelectric film (see FIG. 10) .

[ 0077] DC probe pads 1032 must be fashioned out of polysilicon, and based on the results, Si0₂ in a suitable thickness is preferred. The area to be masked, as seen in 1030, just covers the DC probe pads.

[ 0078] The Si0₂ is again masked using the AZ 5209 photoresist and etched using the Si0₂ etch recipe shown in Table 5. For every 170A of Si0₂ the photoresist will be etched 55 A. Therefore, a photoresist with thickness of Ιμπι is capable of etching a Si0₂ film of 3μπι in thickness. Since the masking oxide is slightly thicker than 2μπι, this photoresist thickness suffices.

[ 0079] Approximately 2 hours and 20 minutes are required to etch the oxide film. Once this film is successfully etched, the remainder of the photoresist is removed using oxygen plasma.

[ 0080] Finally, the structure can be released in the SF₆ plasma. After the 3^ hour SF₆ etch, there was still some masking oxide left on the polysilicon DC probe pads in the exemplary embodiment. This was removed using the Si0₂ RIE recipe specified in Table 5. This film must be overetched to ensure proper removal of the oxide while not damaging the DC polysilicon probe pads. Once again, referring to Table 5, the etch rate of polysilicon is a mere 4lA/ min. A 5 - 10 minute over-etch would remove between 205A and 41θΑ, which would still leave over 200θΑ of doped polysilicon behind.

3. Results and Conclusions

3.1. Measured Performance

[ 0081] For the doping concentration employed in the exemplary embodiment, relatively low voltages (~ 12V) are sufficient to produce deflections capable of withstanding RF transmitted power levels in the 5 - 10W change.

3.2. Angular Oeffection of Bimorph

Upon completion of the device the angular deflection was measured for five different voltages. The deflection was measured for voltages of 4, 6, 8, 10, and 12 volts. The predicted values values are compared to measured values in FIG.

Claims

CLAIMS WHAT IS CLAIMED IS:

1. A bi-metallic actuator comprising: a substrate; a coplanar waveguide mounted on the substrate; a cantilever actuator mounted above the substrate, wherein the actuator is mechanically biased upward away from the substrate, and wherein the cantilever is configured to operably move toward the coplanar waveguide in the presence of an operative electrical signal; and a bump mounted on the coplanar waveguide and disposed to limit the downward excursion of the cantilever.

2. The bi-metallic actuator of claim 1 wherein the bump is at least about 8 microns wide.

3. The bi-metallic actuator of claim 1 wherein the bump is at least about 6 microns wide.

4. The bi-metallic actuator of claim 1 wherein the coplanar waveguide is fabricated of gold.

5. The bi-metallic actuator of claim 4 wherein an adhesion enhancer is disposed between the coplanar waveguide and the substrate.

6. The bi-metallic actuator of claim 5 wherein the adhesion enhancer comprises titanium.

7. The bi-metallic actuator of claim 5 wherein the adhesion enhancer comprises chromium.

8. The bi-metallic actuator of claim 6 or 7 wherein the adhesion layer is approximately 30 nm thick.

9. A method of manufacturing a bi-metallic microelectromechanical actuator, the method comprising the steps of: depositing a thin insulating layer of silicon nitride on a non-conductive substrate wafer; depositing a coplanar waveguide on the insulating layer; patterning the coplanar waveguide; depositing a sacrificial layer of plasma-enhanced chemical vapor deposition (PECVD) polysilicon on the coplanar waveguide; patterning the PECVD polysilicon layer; depositing a thin dielectric film on the PECVD polysilicon layer; employing an argon plasma to pattern the thin dielectric film; depositing a second polysilicon layer; doping the second polysilicon layer; and patterning the second polysilicon layer; whereby the thin dielectric film forms a first layer of the actuator and the second polysilicon layer forms the second layer of the actuator.

10. The method of claim 9 further comprising the step of releasing the bi-metallic microelectromechanical actuator using SF₆ dry etching.

11. The method of claim 10 wherein the releasing step comprises the

operating materials and conditions of a sulfur hexafluoride flow rate of approximately 100 standard cubic centimeters per minute, a power of approximately 60 watts, and a pressure of approximately 100 mTorr.

12. The method of claim 10 wherein the releasing step further comprises covering the substrate waver with a polyimide film tape.

13. The metohd of claim 9 wherein operating materials and conditions for depositing the PECVD layer comprise a temperature of approximately 250°C, a SiH₄ flow rate of approximately 40 standard cubic centimeters per minute, a N₂0 flow rate of approximately 60 standard cubic centimeters per minute, a pressure of approximately 150 mTorr, an RF power of approximately 150 W, and a deposition rate of approximately 142 A/minute.