WO2012169513A1

WO2012169513A1 - Data reproduction device and receiver

Info

Publication number: WO2012169513A1
Application number: PCT/JP2012/064524
Authority: WO
Inventors: 徹宮園
Original assignee: オリンパスメディカルシステムズ株式会社
Priority date: 2011-06-10
Filing date: 2012-06-06
Publication date: 2012-12-13

Abstract

This data reproduction device is equipped with the following: a counter error margin acquisition unit that acquires the counter error margin, i.e. the disparity between the counter number that corresponds to the stated time of the standard clock that is used when reproducing data and the clock rate that states the time the data was sent by the transmitter; a data variation phase acquisition unit that acquires the data variation phase, i.e. the phase of the point of variation in the data from the statistical information that expresses the relationship between the phase of data and the point of variation in the data; a symbol synchronizing phase determining device that determines the symbol synchronizing phase, a phase which imparts the optimal timing of the data reading on the basis of the counter error margin, the data variation phase, and the time required for the acquisition of said data variation phase; and a numerically controlled oscillator that generates the recovery clock by adjusting phase frequency on the basis of the counter error margin and the symbol synchronizing phase.

Description

Data reproducing apparatus and receiving apparatus

The present invention relates to a data reproducing apparatus and a receiving apparatus for reproducing data received by wireless communication.

In wireless communication, in order to reproduce received data, the receiving device generates a reproduction clock that is synchronized with the data. As a technique for generating such a recovered clock, when synchronizing with the received data, a histogram of the change point of the data is generated, and the phase corresponding to the maximum frequency of the generated histogram is symbol-synchronized. A technique for extracting as a phase is known (see, for example, Patent Document 1).

JP-A-10-215289

In the above-described technique, when the amount of received data is small, the shape of the histogram is not close to the normal distribution, and an appropriate symbol synchronization phase cannot be obtained even if the histogram is used. In order to solve this problem and generate a histogram closer to a normal distribution, it is only necessary to increase the amount of data received by taking a longer data reception period. However, if the data reception period is lengthened, the difference between the phase of the maximum value of the frequency of the histogram and the last phase of the data reception period becomes large, so that accurate synchronization cannot be achieved.

The present invention has been made in view of the above, and provides a data reproducing apparatus and a receiving apparatus that can accurately synchronize with received data regardless of the length of a period in which the data is received. With the goal.

In order to solve the above-described problems and achieve the object, a data reproduction device according to the present invention reproduces data by receiving data transmitted by a transmission device and generating a reproduction clock synchronized with the data. A data reproduction device for obtaining a count error, which is a difference between a clock number of a predetermined period in the data and a count number corresponding to the predetermined period of a reference clock used when reproducing the data A data change phase acquisition unit that acquires a data change phase that is a phase of the data change point from statistical information indicating a relationship between the data change point and the data phase, the count error, Based on the data change phase and the time required to obtain the data change phase, the optimum timing for reading the data is given. A symbol synchronization phase determination unit that determines a symbol synchronization phase; and a numerically controlled oscillator that generates the recovered clock by adjusting a frequency and a phase based on the count error and the symbol synchronization phase. To do.

Further, in the data reproducing device according to the present invention, in the above invention, the data change phase acquisition unit creates a histogram indicating the relationship between the data change point and the data phase as the statistical information. A phase corresponding to the maximum frequency of the histogram is acquired as the data change phase.

The receiving device according to the present invention is a receiving device that receives data transmitted by a capsule endoscope that is introduced into a subject and images the inside of the subject, and is capable of receiving the data. Receiving antenna, a switching unit that selectively switches the connection to any one of the plurality of receiving antennas, and a switching unit that sequentially switches connections to the plurality of receiving antennas to receive signals having the maximum reception strength. A control unit that selects an antenna; and a signal processing unit that performs signal processing on data received via the reception antenna selected by the control unit, wherein the signal processing unit includes a number of clocks in a predetermined period of the data A count error acquisition unit that acquires a count error that is a difference from a count number corresponding to the predetermined period of a reference clock used when reproducing the data; and A data change phase acquisition unit that acquires a data change phase that is a phase of the change point of the data from statistical information indicating a relationship between the conversion point and the phase of the data, the count error, the data change phase, and the data A symbol synchronization phase determination unit that determines a symbol synchronization phase that gives an optimal timing for reading the data based on a time required to acquire a change phase; and a frequency and a phase based on the count error and the symbol synchronization phase And a numerically controlled oscillator that generates the recovered clock by performing adjustment.

In the receiving apparatus according to the present invention as set forth in the invention described above, the data change phase acquisition unit creates a histogram indicating the relationship between the data change point and the data phase as the statistical information. The phase corresponding to the maximum value of the frequency is acquired as the data change phase.

According to the present invention, a count error that is a difference between the number of clocks in a predetermined period in data received by communication and a count number corresponding to a predetermined period of a reference clock used when reproducing the data is acquired, and the data The data change phase, which is the phase of the data change point, is obtained from statistical information indicating the relationship between the data change point and the data phase, and it is necessary to obtain the count error, the data change phase, and the data change phase. Based on the time, the symbol synchronization phase that gives the optimum timing for data reading is determined, and the recovered clock is generated by adjusting the frequency and phase based on the count error and the symbol synchronization phase. Also, the phase can be adjusted. Therefore, accurate synchronization with the received data can be achieved regardless of the length of the period for receiving the data.

FIG. 1 is a block diagram showing a configuration of a communication system including a receiving apparatus according to Embodiment 1 of the present invention. FIG. 2 is a diagram schematically illustrating a configuration of transmission data transmitted by the transmission apparatus. FIG. 3 is a diagram schematically showing a detailed configuration of one frame of transmission data. FIG. 4 is a block diagram showing the configuration of the clock recovery circuit. FIG. 5A is a diagram illustrating an example (when there is no error) of count errors acquired by the count error acquisition unit. FIG. 5B is a diagram illustrating an example of the count error acquired by the count error acquisition unit (when the transmission rate is faster). FIG. 5C is a diagram illustrating an example of the count error acquired by the count error acquisition unit (when the transmission rate is slower). FIG. 6 is a block diagram illustrating a configuration of the data change phase acquisition unit. FIG. 7 is a schematic diagram showing a schematic configuration of a capsule endoscope system according to the second embodiment of the present invention. FIG. 8 is a block diagram showing a schematic configuration of the receiving apparatus according to Embodiment 2 of the present invention.

DETAILED DESCRIPTION Hereinafter, modes for carrying out the present invention (hereinafter referred to as “embodiments”) will be described with reference to the accompanying drawings.

(Embodiment 1)
FIG. 1 is a block diagram showing a schematic configuration of a communication system including a data reproducing apparatus according to Embodiment 1 of the present invention. A communication system 1 shown in FIG. 1 includes a transmission device 2 having a function of wirelessly transmitting data in frame units, and a data reproduction device 3 having a function of receiving and reproducing data transmitted by the transmission device 2.

The transmission device 2 has a photographing function, and wirelessly transmits data including image data acquired by photographing or the like (hereinafter referred to as “transmission data”) to the data reproduction device 3. The transmission device 2 transmits only transmission data and does not transmit a clock.

FIG. 2 is a diagram schematically showing a configuration of transmission data transmitted by the transmission device 2. The transmission data 50 shown in the figure is serial data having a preamble 51 that starts communication and stabilizes the operation of the high-frequency processing circuit, and image data 52 that is main data following the preamble 51. . The transmission data 50 is transmitted at a predetermined transmission cycle T (frame rate 1 / T). Although FIG. 2 shows a case where a blank (no signal state) exists between two adjacent transmission data 50, more generally, there may not be a blank. As described above, the difference between the transmission cycle T of the transmission data 50 and the transmission time of the transmission data 50 can be appropriately set according to the type of the transmission data 50 or the like.

FIG. 3 is a diagram schematically showing a detailed configuration of one frame of the transmission data 50. As shown in FIG. 3, a vertical synchronizing signal (VS) 53-0 indicating the start of the image data is embedded in the head portion of the image data 52. In the image data 52, the data 54-0 of the first line is embedded following the vertical synchronizing signal 53-0. After the data 54-0, a horizontal synchronizing signal (HS) 53-1 which means the head of the second line is followed, and data 54-1 of the second line is further continued. Similarly, the horizontal synchronizing signal and data of each line are sequentially continued. In the case shown in FIG. 3, the horizontal synchronization signal 53-n and the data 54-n for the (n + 1) th line are embedded as data relating to the last line. The vertical synchronization signal 53-0 and the horizontal synchronization signals 53-1, 53-n are, for example, pulse signals and have a pattern (unique word) different from the image data. In FIG. 3, the number of bits between temporally adjacent horizontal synchronization signals is P bits.

Next, the configuration of the data reproducing device 3 will be described. The data reproduction device 3 includes an RF circuit 4 that performs demodulation processing and binarization processing on transmission data, a sampling circuit 5 that samples transmission data to create reproduction data, and the sampling circuit 5 samples transmission data. A clock recovery circuit 6 for generating a reproduction clock at the time, and a data processing circuit for performing data processing such as image reconstruction and file formation using the reproduction data output from the sampling circuit 5 and the reproduction clock generated by the clock reproduction circuit 6 7.

FIG. 4 is a block diagram showing the configuration of the clock recovery circuit 6. The clock recovery circuit 6 shown in the figure includes an oscillator 61, a count error acquisition unit 62, a data change phase acquisition unit 63, a symbol synchronization phase determination unit 64, a frequency determination unit 65, a phase adjustment unit 66, and a drive. A frequency generator 67 and a numerically controlled oscillator (NCO) 68 are provided.

The oscillator 61 generates a reference clock by oscillating at a frequency corresponding to the transmission rate. Specifically, when the number of clocks per bit is m clocks and the transmission rate is R, the oscillator 61 generates a reference clock having a frequency F = mR.

The count error acquisition unit 62 acquires a count error that is a difference between the number of clocks in a predetermined period of transmission data and the number of counts corresponding to a predetermined period of a reference clock used when reproducing the transmission data. The count error acquisition unit 62 outputs the acquired count error to the symbol synchronization phase determination unit 64 and the frequency determination unit 65.

5A to 5C are diagrams illustrating examples of count errors acquired by the count error acquisition unit 62. FIG. 5A to 5C, the transmission rate R of transmission data is R = 0.25 (Mbps), and the number of clocks per bit is m = 4. That is, the oscillator 61 oscillates a reference clock having a frequency F = 0.25 × 4 = 1 (MHz). In FIGS. 5A to 5C, the number of bits P between horizontal synchronization signals (HS) is set to 250,000 (bit) = 0.25 (Mbit). Therefore, the data between the horizontal synchronization signals is transmitted in 1 s. In other words, the number of bits between the horizontal synchronization signals has a value equal to the transmission rate.

FIG. 5A shows a case where the count error ΔN = N _H −N _S = 0 given by the difference between the clock number N _H between the horizontal synchronization signals and the reference clock count number N _S (N _H = N _S = 1000000).

FIG. 5B shows a case where the clock number H between the horizontal synchronizing signals is larger than the reference clock count number S. This corresponds to a case where the actual transmission rate of transmission data is larger than the value calculated by counting the reference clock. Specifically, FIG. 5B shows a case where the count error ΔN = + 10 (ppm) (N _H = 1000000, N _S = 999990).

FIG. 5C shows a case where the clock number H between the horizontal synchronizing signals is smaller than the reference clock count number S. This corresponds to the case where the actual transmission rate of transmission data is smaller than the value calculated by counting the reference clock. Specifically, FIG. 5C shows a case where the count error ΔN = −10 (ppm) (N _H = 1000000, N _S = 1000010).

In addition, although the example which measures a frequency difference using the detection interval of a horizontal synchronizing signal here was shown, you may measure a frequency difference using the frame interval of the transmission data based on a vertical synchronizing signal.

The data change phase acquisition unit 63 acquires the data change phase that is the phase of the change point of the transmission data from the statistical information indicating the relationship between the change point of the transmission data and the phase of the transmission data. Here, the change point of the transmission data is a position where the transmission data has a rising edge on the time axis. FIG. 6 is a block diagram illustrating a configuration of the data change phase acquisition unit 63. The data change phase acquisition unit 63 includes a data change point pulse output unit 631, a selector 632, a phase number output unit 633, a counter block 634, a count control unit 635, and a histogram calculation unit 636.

The data change point pulse output unit 631 has a circuit that performs, for example, an exclusive OR (XOR) of the previous transmission data and the latest transmission data, and the selector 632 only when the preceding and following transmission data changes. Output a pulse.

The selector 632 is provided between the data change point pulse output unit 631 and the counter block 634, and individually selects a plurality of (hereinafter, n) counters included in the data change point pulse output unit 631 and the counter block 634. It has a channel to connect.

The phase number output unit 633 outputs a signal instructing the selector 632 to switch the channel corresponding to the counter number (phase number) of the counter block 634. This signal is output nR (= nF / m) per s, where R is the transmission rate of transmission data, and n is the number of counters included in the counter block 634.

The counter block 634 has n counters. Of the n counters, the counter connected to the selector 632 when the data change point pulse output unit 631 outputs a pulse receives the pulse signal and outputs it to the histogram calculation unit 636.

The count control unit 635 controls the start and stop of the operation of the counter block 634, and resets the operation of the counter block 634.

The histogram calculation unit 636 creates a histogram indicating the signal output frequency of each counter by accumulating the signal output from each counter of the counter block 634 for each counter. The counter of the counter block 634 corresponds to the phase of the data change point position in the data embedded between the horizontal synchronization signals. Therefore, the histogram is information indicating the statistical distribution of the phase where the data change point is located. The histogram calculation unit 636 outputs the phase corresponding to the counter indicating the maximum frequency of the created histogram to the symbol synchronization phase determination unit 64 as the data change phase. Instead of setting the maximum value of the histogram frequency as the data change phase, for example, a weighted average may be associated with the data change phase. If the median value of the histogram is equal to or greater than a predetermined value, the median value may be used as the data change phase.

As the histogram calculation unit 636, for example, a phase number detector described in Patent Document 1 may be applied, or a histogram calculation circuit described in Japanese Patent Application Laid-Open No. 2009-206594 may be applied.

Subsequently, the configuration of the clock recovery circuit 6 will be described with reference to FIG. The symbol synchronization phase determination unit 64 determines the symbol synchronization phase based on the count error output from the count error acquisition unit 62, the data change phase output from the data change phase acquisition unit 63, and the counter operation time of the counter block 634. To the phase adjustment unit 66. Here, the symbol synchronization phase is a phase that gives an optimum timing for accurately extracting a symbol, which is a basic unit of data transmission, when reading data. More specifically, the symbol synchronization phase determination unit 64 determines a symbol synchronization phase for adjusting a phase shift of the maximum frequency value of the histogram generated according to the count error and the counter operation time. In the first embodiment, the symbol synchronization phase is the phase at the center of two adjacent data change points. Note that the counter operation time is substantially the same as the time required for the histogram calculation unit 636 to create the histogram.

The frequency determination unit 65 determines a frequency adjustment value based on the count error output from the count error acquisition unit 62, and outputs the frequency adjustment value to the numerically controlled oscillator 68.

The phase adjustment unit 66 outputs to the numerical control oscillator 68 a phase adjustment value that shifts the phase state to the symbol synchronization phase output by the symbol synchronization phase determination unit 64.

The drive frequency generator 67 generates a drive frequency of the numerically controlled oscillator 68 by multiplying the frequency of the reference clock output from the oscillator 61 by a predetermined frequency, and outputs it to the numerically controlled oscillator 68.

The numerically controlled oscillator 68 generates a reproduction clock based on the frequency adjustment signal output from the frequency determination unit 65, the phase adjustment signal output from the phase adjustment unit 66, and the drive frequency generated by the drive frequency generation unit 67. Is output to the sampling circuit 5 and the data processing circuit 7.

Here, the frequency adjustment in the numerically controlled oscillator 68 will be described by taking the case of the specific count error described above as an example. In the following description, the frequency of the recovered clock (= reference clock frequency F) is 1 MHz, and the number of bits of the numerically controlled oscillator 68 is 32 bits. That is, in the numerically controlled

oscillator

68, 2 ³² corresponds to a phase of 360 °. Further, it is assumed that the drive frequency generated by the drive frequency generator 67 is 32 MHz. That is, if the predetermined multiplication number in this case is A, A = 32.
(1) In case there is no counting error numerically controlled oscillator 68, one clock per _{^{θ 1 = 2 n / A =}} 2 32/32 = 2 27 phase is added, the frequency is adjusted.
(2) When the count error is + Y (ppm) (Y> 0)
In the numerically controlled oscillator 68, the phase of θ ₂ = (2 ⁿ / A) · (1 + Y) = 2 ²⁷ (1 + Y) (> θ ₁ ) is added _per clock to adjust the frequency, thereby speeding up the recovered clock.
(3) When Count Error is -Y (ppm) In the numerically controlled oscillator 68, θ ₃ = (2 ⁿ / A) · (1-Y) = 2 ²⁷ (1-Y) (<θ ₁ ) per clock ) Phase is added to adjust the frequency to slow down the recovered clock.
As is clear from the above description, in general, the greater the phase addition amount, the greater the adjusted frequency.

It should be noted that a frequency divider may be provided at the subsequent stage of the numerically controlled oscillator 68 to output the divided signal as a reproduction clock. In this case, the frequency output from the numerically controlled oscillator 68 may be adjusted in anticipation of the frequency division.

According to the first embodiment of the present invention described above, the difference between the number of clocks in a predetermined period of data received by communication and the number of counts corresponding to the predetermined period of the reference clock used when reproducing the data. In addition to obtaining the count error, the data change phase, which is the phase of the data change point, is obtained from the statistical information indicating the relationship between the data change point and the data phase. Based on the time required to acquire the phase, the symbol synchronization phase that gives the optimum timing for data reading is determined, and the recovered clock is generated by adjusting the frequency and phase based on the count error and the symbol synchronization phase. Therefore, the phase can be adjusted even if the data reception period is long. Therefore, accurate synchronization with the received data can be achieved regardless of the length of the period for receiving the data.

Further, according to the first embodiment, even when the frequency difference between the clock on the transmission side and the clock on the reception side is large, the received data is accurately synchronized by adjusting the frequency difference. be able to.

(Embodiment 2)
FIG. 7 is a schematic diagram illustrating a schematic configuration of a capsule endoscope system including the receiving device according to the second embodiment of the present invention. The capsule endoscope system 100 shown in FIG. 1 is used as a transmission device 2 that wirelessly transmits transmission data including image data of an in-vivo image acquired by being introduced into the body of a subject (patient) 200 and performing imaging. A capsule endoscope 10, a receiving device 20 that receives transmission data wirelessly transmitted from the capsule endoscope 10, a cradle 30 that receives the transmission data from the receiving device 20 by inserting the receiving device 20, and A display device 40 that can transmit and receive data to and from the cradle 30 and can display information such as in-vivo images included in transmission data received from the receiving device 20 via the cradle 30 is provided.

In the capsule endoscope 10, various functional parts for acquiring an in-vivo image and wirelessly transmitting the in-vivo image are liquid-tightly sealed inside a capsule-type casing that can be introduced into the lumen of the subject 200. Built in. After being swallowed from the mouth of the subject 200, the capsule endoscope 10 moves in the digestive tract such as the esophagus, stomach, small intestine, and large intestine of the subject 200 by peristaltic movement of the organ. During this movement, the capsule endoscope 10 sequentially images the inside of the digestive tract at predetermined time intervals.

FIG. 8 is a block diagram showing a configuration of the receiving device 20. A receiving apparatus 20 shown in the figure is mounted on the body surface of the subject 200 or in the vicinity of the body surface, and receives the transmission data transmitted by the capsule endoscope 10 and is output from the antenna unit 21. And a main body device 22 for acquiring transmission data.

The antenna unit 21 has a plurality of receiving antennas 21a to 21h. The plurality of receiving antennas 21a to 21h are realized by using, for example, loop antennas, and are arranged at predetermined positions near the body surface of the subject 200 or near the body surface. This predetermined position is determined corresponding to each organ in the subject 200 that is a passage route of the capsule endoscope 10, for example. In the first embodiment, the case where the antenna unit 21 has eight reception antennas will be described as an example, but the number of reception antennas is not limited to this.

The main body device 22 includes a switching unit 221 that selectively switches connection to any one of the receiving antennas 21a to 21h, and an RF circuit, and is input via the receiving antenna 21 connected by the switching unit 221. A reception unit 222 that amplifies transmission data as a signal and performs demodulation, a signal processing unit 223 that performs predetermined signal processing on the transmission data received by the reception unit 222, and a radio signal amplified by the reception unit 222 An A / D converter 224 that performs A / D conversion of the electric field strength, an I / F unit 225 that forms a communication interface with an external device such as the cradle 30 that is electrically connected to the receiving device 20, and various types of information are stored. It has a storage unit 226 and a control unit 227 that controls the operation of the receiving device 20.

The signal processing unit 223 includes a sampling circuit 223a, a clock recovery circuit 223b, and a data processing circuit 223c. The configuration of the sampling circuit 223a is the same as the configuration of the sampling circuit 5 described above. The configuration of the clock recovery circuit 223b is the same as the configuration of the clock recovery circuit 6 described above. The configuration of the data processing circuit 223c is the same as the configuration of the data processing circuit 7 described above.

The storage unit 226 is configured using a ROM, a RAM, and the like, and stores various programs for executing operations in the receiving device 20, various setting data including a frame rate of transmission data, and the like. The receiving device 20 is provided with an interface to which a portable recording medium such as a USB memory or a compact flash (registered trademark) can be inserted, and the portable recording medium inserted into the interface functions as the storage unit 226. You may do it.

The control unit 227 is configured using a CPU or the like, and comprehensively controls the operation of the receiving device 20 by reading various programs stored in the storage unit 226 and performing calculations.

The display device 40 is realized by a workstation or a personal computer having a display screen such as a monitor. The display device 40 can be connected to the cradle 30 and acquires data received by the receiving device 20 via the cradle 30. The data received by the receiving device 20 may be recorded on the portable recording medium described above, and the data may be transferred by inserting the portable recording medium into the display device 40. Further, data may be transferred between the receiving device 20 and the display device 40 by wireless communication without using the cradle 30.

In the capsule endoscope system 100 having the above-described configuration, when the receiving device 20 receives transmission data transmitted by the capsule endoscope 10, the control unit 227 has the highest reception intensity among the reception antennas 21a to 21h. Choose a strong antenna. Specifically, the control unit 227 causes the switching unit 221 to sequentially switch the connection of the reception antennas 21a to 21h at a predetermined interval, and to receive the reception intensity signal of each reception antenna input via the A / D conversion unit 224. Originally, the antenna having the strongest reception strength among the reception antennas 21a to 21h is selected, and a signal instructing connection to the selected reception antenna is transmitted to the switching unit 221.

The processing of the signal processing unit 223 for transmission data input via the selected receiving antenna is the same as that of the first embodiment.

According to the second embodiment of the present invention described above, as in the first embodiment described above, regardless of the length of the period for receiving data by communication and the frequency difference between the clock on the transmission side and the clock on the reception side, Accurate synchronization with received data can be achieved.

Up to this point, the mode for carrying out the present invention has been described. However, the present invention should not be limited only by the two embodiments described above. That is, the present invention includes various embodiments that are not described herein.

DESCRIPTION OF SYMBOLS 1 Communication system 2 Transmitter 3 Data reproducing | regenerating apparatus 4

RF circuit

5,

223a Sampling circuit

6, 223b Clock reproducing circuit 7, 223c Data processing circuit 10 Capsule type endoscope 20 Receiving apparatus 21 Antenna unit 21a-21h Receiving antenna 22 Main body apparatus 30 Cradle 40 Display Device 50 Transmission Data 51 Preamble 52 Image Data 53-0 Vertical Sync Signal (VS)
53-1, 53-2, ..., 53-n Horizontal sync signal (HS)
54-0, 54-1,..., 54-n Data 61 Oscillator 62 Count error acquisition unit 63 Data change phase acquisition unit 64 Symbol synchronization phase determination unit 65 Frequency determination unit 66 Phase adjustment unit 67 Drive frequency generation unit 68 Numerical value Control oscillator 100 Capsule endoscope system 200 Subject 221 Switching unit 222 Reception unit 223 Signal processing unit 224 A / D conversion unit 225 I / F unit 226 Storage unit 227 Control unit 631 Data change point pulse output unit 632 Selector 633 Phase Number output unit 634 Counter block 635 Count control unit 636 Histogram calculation unit

Claims

A data reproduction device that receives data transmitted by a transmission device and reproduces the data by generating a reproduction clock synchronized with the data,
A count error acquisition unit that acquires a count error that is a difference between the number of clocks of the data in a predetermined period and a count number corresponding to the predetermined period of a reference clock used when reproducing the data;
A data change phase acquisition unit that acquires a data change phase that is a phase of the change point of the data from statistical information indicating a relationship between the change point of the data and the phase of the data;
A symbol synchronization phase determination unit that determines a symbol synchronization phase that gives an optimum timing for reading the data based on the count error, the data change phase, and a time required to acquire the data change phase;
A numerically controlled oscillator that generates the recovered clock by adjusting a frequency and a phase based on the count error and the symbol synchronization phase;
A data reproducing apparatus comprising:
The data change phase acquisition unit includes:
A histogram showing a relationship between the change point of the data and the phase of the data is created as the statistical information, and a phase corresponding to the maximum frequency of the histogram is acquired as the data change phase. The data reproducing apparatus according to claim 1.
A receiving device that receives data transmitted by a capsule endoscope that is introduced into a subject and images the inside of the subject,
A plurality of receiving antennas capable of receiving the data;
A switching unit that selectively switches connection to any one of the plurality of receiving antennas;
A controller that selects the receiving antenna having the maximum reception intensity by sequentially switching the connection with the plurality of receiving antennas to the switching unit;
A signal processing unit that performs signal processing on data received via the receiving antenna selected by the control unit;
With
The signal processing unit
A count error acquisition unit that acquires a count error that is a difference between the number of clocks of the data in a predetermined period and a count number corresponding to the predetermined period of a reference clock used when reproducing the data;
A data change phase acquisition unit that acquires a data change phase that is a phase of the change point of the data from statistical information indicating a relationship between the change point of the data and the phase of the data;
A symbol synchronization phase determination unit that determines a symbol synchronization phase that gives an optimum timing for reading the data based on the count error, the data change phase, and a time required to acquire the data change phase;
A numerically controlled oscillator that generates the recovered clock by adjusting a frequency and a phase based on the count error and the symbol synchronization phase;
A receiving apparatus comprising:
The data change phase acquisition unit includes:
A histogram showing a relationship between the change point of the data and the phase of the data is created as the statistical information, and a phase corresponding to the maximum frequency of the histogram is acquired as the data change phase. The receiving device according to claim 3.