WO2012157181A1 - Appareil d'inspection de tracé et procédé d'inspection de tracé - Google Patents

Appareil d'inspection de tracé et procédé d'inspection de tracé Download PDF

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Publication number
WO2012157181A1
WO2012157181A1 PCT/JP2012/002410 JP2012002410W WO2012157181A1 WO 2012157181 A1 WO2012157181 A1 WO 2012157181A1 JP 2012002410 W JP2012002410 W JP 2012002410W WO 2012157181 A1 WO2012157181 A1 WO 2012157181A1
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WO
WIPO (PCT)
Prior art keywords
sample
result
inspection apparatus
pattern
pattern inspection
Prior art date
Application number
PCT/JP2012/002410
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English (en)
Japanese (ja)
Inventor
野副　真理
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株式会社 日立ハイテクノロジーズ
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Publication of WO2012157181A1 publication Critical patent/WO2012157181A1/fr

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N23/00—Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups G01N3/00 – G01N17/00, G01N21/00 or G01N22/00
    • G01N23/22—Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups G01N3/00 – G01N17/00, G01N21/00 or G01N22/00 by measuring secondary emission from the material
    • G01N23/225—Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups G01N3/00 – G01N17/00, G01N21/00 or G01N22/00 by measuring secondary emission from the material using electron or ion
    • G01N23/2251—Investigating or analysing materials by the use of wave or particle radiation, e.g. X-rays or neutrons, not covered by groups G01N3/00 – G01N17/00, G01N21/00 or G01N22/00 by measuring secondary emission from the material using electron or ion using incident electron beams, e.g. scanning electron microscopy [SEM]
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/68—Preparation processes not covered by groups G03F1/20 - G03F1/50
    • G03F1/82—Auxiliary processes, e.g. cleaning or inspecting
    • G03F1/84—Inspecting
    • G03F1/86—Inspecting by charged particle beam [CPB]
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70605—Workpiece metrology
    • G03F7/70616—Monitoring the printed patterns
    • G03F7/7065—Defects, e.g. optical inspection of patterned layer for defects
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10—Measuring as part of the manufacturing process
    • H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N2223/00—Investigating materials by wave or particle radiation
    • G01N2223/60—Specific applications or type of materials
    • G01N2223/611—Specific applications or type of materials patterned objects; electronic devices
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N2223/00—Investigating materials by wave or particle radiation
    • G01N2223/60—Specific applications or type of materials
    • G01N2223/646—Specific applications or type of materials flaws, defects
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Definitions

  • the present invention relates to a method and apparatus for manufacturing a substrate having a fine pattern such as a semiconductor device, liquid crystal, photomask, or nanoimprint, and more particularly to a technique for inspecting a semiconductor device and a mask pattern using an electron beam.
  • Patent Document 1 Japanese Patent Application Laid-Open No. 2007-059176 discloses a technique for irradiating ultraviolet light for cleaning an observation portion when observing a mask with an electron microscope. Further, in Patent Document 2 (Japanese Patent Laid-Open No. 2007-220471), an on-mask circuit pattern image acquired in advance with a mask electron microscope is displayed simultaneously when an electron beam image is acquired with a wafer electron microscope. Technology is disclosed.
  • a pattern necessary for circuit formation is designed by CAD, and this design data is formed on a photomask (reticle). That is, the design pattern shape is formed as a light shielding film on a transparent substrate.
  • a circuit pattern is formed on a semiconductor wafer by loading the photomask into a reduction exposure apparatus and exposing and imaging light passing through the photomask on a wafer coated with a photoconductor. Since the reduction ratio of the reduction exposure apparatus is generally 1/4 to 1/5, the pattern on the mask is enlarged 4 to 5 times the pattern on the wafer.
  • the pattern formed on the wafer and the pattern formed on the mask are becoming smaller.
  • a phase shift method or an OPC technique is used in the mask.
  • the EUV lithography further eliminates the protective film of the mask, which may cause foreign matters and defects on the mask during use and handling.
  • the substrate is a multilayer film
  • defects existing on the mask may not be transferred to the wafer, or defects embedded in the multilayer film and difficult to detect by mask inspection may be transferred onto the wafer.
  • a semiconductor device is inspected by an inspection device dedicated to the wafer, and the inspection coordinate data for the wafer is used to observe and measure the dimensions with an electron microscope dedicated to the wafer.
  • the same applies to photomasks in which inspection is performed with a mask-dedicated inspection apparatus, and observation and dimensions are measured with a mask-dedicated electron microscope using mask coordinate data.
  • EUV lithography since the protective film of the mask is lost, there is a possibility that foreign matters and defects are generated on the mask during use and handling.
  • the substrate is a multilayer film
  • defects existing on the mask may not be transferred to the wafer, or defects embedded in the multilayer film and difficult to detect by mask inspection may be transferred onto the wafer. It is necessary to collate the mask inspection and the result transferred to the wafer. In the prior art, enormous time and effort are required for collation and review of such mask inspection results and wafer inspection results.
  • An object of the present invention is to solve the above-mentioned problems, and in a substrate on which a pattern such as a semiconductor device, a liquid crystal or a photomask is formed, an equivalent circuit pattern is formed, for example, a wafer and a mask, but the shapes are different.
  • An object of the present invention is to provide an inspection apparatus capable of inspecting a sample with one apparatus.
  • a plurality of load ports capable of transporting each of a plurality of sample shapes are provided.
  • a plurality of sample exchange chambers are provided in front of the sample chamber, and a holder for placing the sample is provided in each sample exchange chamber.
  • the shape, height, and sample holding method of the holder depend on each sample shape, and the sample is set at a height that can be observed by the electron optical system in the sample chamber.
  • a single stage can handle a plurality of holders. In this way, for example, a photomask and a semiconductor wafer are loaded into the same apparatus so that they can be observed or measured with an electron beam microscope.
  • a mask and wafer can be detected with a single inspection result. Both can be observed or measured with the same device (electron microscope).
  • the results of checking both the wafer and mask are collated, the function of classifying the defect type according to the collation result and the function of collating the dimensions to obtain the magnification ratio at the time of transfer are provided, and the classified code or magnification ratio at the time of transfer is provided. Is added to the inspection result, and the inspection result data can be output to the outside.
  • the quality of the photomask and the quality of the wafer transfer can be efficiently evaluated in a short time, and the quality of the semiconductor device can be improved by applying the mask whose quality is controlled by this technology. It is possible to increase the reliability of the apparatus and the like and contribute to shortening the period required to reduce the defect rate.
  • FIG. 2 is an apparatus configuration diagram for explaining the first embodiment.
  • the top view of the apparatus shown in FIG. The top view of the apparatus shown in FIG.
  • the top view of the apparatus shown in FIG. Sectional drawing at the time of mounting data on a sample holder.
  • Explanatory drawing of a mask coordinate system Explanatory drawing of a wafer coordinate system.
  • FIG. 1 is a block diagram showing the overall configuration of the inspection apparatus according to the first embodiment.
  • the inspection apparatus 100 of this embodiment is for transferring a sample 104 to a loader for placing a sample cassette 101, a transfer unit 102 for transferring a sample 104, and a sample chamber 106 that is a vacuum chamber.
  • Sample exchange chamber 103, sample chamber 106, operation unit 124, control unit 123 that controls each unit, column control unit 121 that controls the electron optical system according to a command from the control unit 123, and a stage that controls the stage A control unit 120 and a signal control unit 119 that images a signal from the detector 117 and stores the signal in the storage unit 122 are configured.
  • the sample chamber 106 there are an electron optical system and a stage, and an electron source 107, an extraction electrode 108, a lens 109, a diaphragm 110, a reflecting plate 111 for collecting secondary electrons, a deflector 112, an objective lens 113, and an electrode on the sample. 114, an X stage 115, a Y stage 116, a height sensor 117, and a detector 118.
  • the sample 104 is loaded from the sample cassette 101 in the loader onto the sample holder 105 in the sample exchange chamber 103 by the transport unit 102.
  • a vacuum is drawn when the sample 104 is placed, and the sample is transferred to the sample chamber 106 when a predetermined degree of vacuum is reached.
  • the stages 115 and 116 move near the sample exchange chamber 103, and the sample holder 105 is pushed and fixed onto the stage 115 with the sample 104 placed thereon, and the opening 127 of the sample exchange chamber 103 is closed. It is done.
  • the stages 115 and 116 move to predetermined coordinates to acquire an electron beam image.
  • the electron beam is emitted from the electron source 107, accelerated by the extraction electrode 108, narrowed by the lens 109, passes through the diaphragm 110, and is narrowed by the objective lens 113 to be focused on the sample 104.
  • This electron beam is scanned by the deflector 112, and in synchronization with this, a signal is sequentially detected by the detector 118, and the signal value is converted into a gray value to obtain an electron beam image.
  • a reflecting plate 111 is used.
  • a voltage can be applied to the sample stage 105, and the energy of the electron beam applied to the sample can be adjusted. Since a voltage is also applied to the electron source 107 and the extraction electrode 108, energy applied to the sample is controlled by a combination of these voltage adjustments.
  • the signal detected by the detector 118 is converted and imaged by the signal control unit 119 and stored in the storage unit 122 when stored. A series of these operations is executed when a command is input from the operation unit 124 and the control unit 123 gives a control command to each unit based on the command. Further, the control unit 123 is connected to the outside through network communication or the like, and can access the external database 125. For example, coordinate data inspected by another apparatus can be exchanged, or inspection result data and stored image data of the inspection apparatus of this embodiment can be output.
  • FIG. 2A shows a top view of the inspection apparatus of the present embodiment shown in FIG.
  • a sample cassette 101 containing a photomask as a first sample and a sample cassette 101 ′ containing a wafer as a second sample can be placed on the loader unit. If only one of them is inspected, one of them may be placed.
  • the transport system and the sample exchange chamber each have two types of sample holders.
  • the transport unit 102 takes out the sample 104 from the sample cassette 101, opens the sample exchange chamber 103 in vacuum, and opens the opening 126. Opens, the sample 104 is placed on the sample holder 105, the opening 126 shown in FIG. 1 is closed, and vacuuming is performed.
  • the opening 127 is opened, the stages 115 and 116 are moved to the vicinity of the sample exchange chamber 103, and the sample holder 105 is pushed out to the stage as shown in FIG. Once fixed. After the opening 127 is closed, the stage is moved to a predetermined coordinate, and an inspection with an electron beam image is performed. When the inspection is completed, the first sample 104 is returned to the original cassette 101 in the reverse procedure described above.
  • the second sample 104 ′ is similarly moved from the cassette 101 ′ to the sample holder 105 ′ in the sample exchange chamber 103 ′ by the transport unit 102 ′.
  • the stages 115 and 116 move to the vicinity of the sample exchange chamber 103 ', the opening 127' is opened, and as shown in FIG. 2C, the material holder 105 'on which the sample 104' is placed is pushed out to the stage and reaches a predetermined position.
  • FIG. 3 shows a schematic cross-sectional view when the sample is placed on the sample holder 105 shown in FIGS. 1 and 2 and transported to the sample chamber.
  • FIG. 3A shows the case of the first sample (photomask)
  • FIG. 3B shows the case of the second sample (wafer).
  • the first sample holder 105 has a holding configuration that matches the size and rectangle of the mask 104, and the height of the mask surface is set to a predetermined height with respect to the electron optical system.
  • the second sample holder 105 ′ has a holding configuration that matches the size and circle of the wafer 104 ′, and when the wafer is placed on the second sample holder 105 ′, the height of the wafer surface becomes an electron. It has a predetermined height with respect to the optical system.
  • the same bottom surface structure of each sample holder with respect to the stage makes it possible to share and move to the sample stage in common. After fixing, it is only necessary to move according to a movement command to a predetermined coordinate.
  • the holding method and thickness of the sample holder are different from the shape and thickness of each sample having different shapes so that the surface height is almost the same even for samples having different shapes.
  • an electron beam image can be acquired by the same electron optical system.
  • a quartz substrate that is an insulator may be used, a semiconductor substrate such as a silicon crystal may be used, or a conductive substrate such as a metal may be used.
  • irradiation is performed. It is necessary to optimize the electron beam conditions (irradiation energy, electron beam current). Since the means for changing the irradiation energy is as described above, it is omitted here.
  • Such optimum conditions can be applied by calling the optimum conditions registered in advance by inputting inspection conditions and recipe information from the operation unit 124. At that time, in order to control the charged state of the surface of the sample to be inspected, the condition of the voltage applied to the on-sample electrode 114 may be changed in addition to the electron beam irradiation condition.
  • FIG. 4 shows an example of a coordinate system of a mask that is a first sample.
  • the shape is rectangular, and the origin of the mask is the center of the mask, which is the intersection of the four corners of the mask. Since the pattern shape is inverted and transferred when transferred by the reduction exposure apparatus, the X coordinate 201 of the mask is in the mirror inverted direction, and the Y coordinate 202 is in the same direction as on the wafer. Further, since the pattern dimension is larger than the wafer according to the reduction ratio at the time of reduction exposure, the coordinates need to be converted at the same magnification. In this embodiment, a case where the reduction ratio is 1: 4 will be described.
  • FIG. 2 An example of a coordinate system on the wafer is shown in FIG.
  • the shot 203 is divided in units to be exposed and the die 209 is a repeating unit.
  • the lower left corner of the shot is the origin 204, and the coordinates are the shot X direction 205 and the shot Y direction 206.
  • the lower left corner of the die is the origin 208, which is the coordinates of the die X direction 209 and the die Y direction 210.
  • FIG. 6A shows a flow for converting mask coordinates into wafer coordinates.
  • the offset of the origin deviation amount unique to the apparatus is adjusted (301).
  • the origin 200 which is the center of the mask, is converted into the corner origin of the exposure pattern (302), and in order to match the coordinate magnification on the wafer, here the coordinate value is reduced to a quarter according to the reduction ratio ( 303).
  • the direction of the coordinate system is mirror-inverted (304), and further offset adjustment is performed in accordance with the shot origin of the wafer coordinates. If the coordinates are set to die coordinates, the origin position is further adjusted in accordance with die division and die size (306).
  • a flow for converting wafer coordinates into mask coordinates is shown in FIG. 6B.
  • the inspection is started by inputting necessary information from the operation unit 125 (400).
  • the type of sample to be inspected is selected (401).
  • a cassette and a sample holder are selected, and an optimum inspection recipe registration directory is also selected.
  • the electron beam irradiation conditions and the inspection recipe are loaded (402, 403).
  • the inspection recipe includes selection of coordinate data to be inspected and information selection of a pattern transferred to the wafer to be inspected.
  • coordinate conversion is performed by the method shown in FIG. 6 (404), and the inspection point in the coordinate system of the sample to be inspected is set. specify.
  • the designated first inspection sample is loaded (405).
  • the inspection of the first sample select whether to inspect the second sample subsequently.
  • the inspection is executed in the same flow from the selection of the sample type shown in the flow 401 of FIG.
  • the result is saved as a file in the same manner as the first sample (409).
  • the inspection result of the first sample and the second inspection result are collated (412), the defect type, factor, size ratio, etc. are classified (413), and the classification result is inspected for the first and second samples.
  • the result file is appended or changed, the result is output as necessary (414), and the inspection is terminated (415). Note that the sample unload timing does not have to follow the flow of FIG. If the second sample is not subsequently inspected, another past inspection result can be selected and collated with the selected result file (412). Furthermore, not only two types of test results but also three or more types of test results can be collated (412).
  • FIG. 8 shows an example of an image acquired at the time of inspection.
  • FIG. 8A is an electron beam image 500 of point 1 acquired at the time of mask inspection, and a linear pattern 501 is formed on the substrate 502.
  • a defect 503 exists on the substrate 502 between the lines.
  • a location (point 1) corresponding to the coordinates on the mask was inspected on the wafer.
  • the result is an electron beam image 504 on the wafer shown in FIG.
  • a pattern 505 formed of a material such as a photoresist exists on the film 506 formed in the lower layer.
  • the defect 507 was transferred to the point 1 point. Therefore, it was determined that the defect 503 at the point 1 on the mask is a fatal defect transferred to the wafer.
  • the coordinates of point 2 were similarly examined.
  • the figure is an electron beam image 508 at point 2 on the mask. The pattern and the substrate are formed in the same manner. At point 2, a defect 509 exists along a linear pattern. A portion corresponding to this point 2 was inspected with a wafer.
  • the figure is an electron beam image 510 on the wafer at point 2. As a result of inspecting the electron beam image 510, no defect was recognized on the wafer. Therefore, the mask-like defect at point 2 is a non-fatal defect that is not transferred to the wafer, but its presence on the mask has been confirmed, so it has been determined that it needs attention. Further, the point 3 was similarly examined. (5) The figure is an electron beam image 511 obtained by inspecting the point 3 on the mask.
  • FIG. 9 shows a table A of FIG. 9 that is collated and determined by the inspection results of FIG.
  • Table B in FIG. 9 is for the case where the collation inspection is performed based on the coordinates of the wafer inspection result.
  • Table C in FIG. 9 is an inspection in which the dimensions of the pattern coordinates registered in advance are measured with both the mask and the wafer, and the dimension ratio is obtained.
  • the inspection apparatus and the inspection method of this embodiment can load a plurality of shapes of samples into the same apparatus, and can inspect with an electron beam image based on the same coordinate data.
  • the transfer source and the transfer destination sample such as a mask and a wafer
  • the criticality of the defect is determined by verification. Can do.
  • the defect coordinate data on the wafer it can be determined whether the cause of the defect is a process or a mask. In this manner, since the defect and quality control of the mask can be performed, the reliability of manufacturing the semiconductor device can be improved.
  • the quality of the exposure process can be controlled, and the mask quality and the exposure process can be optimized. As a result, the semiconductor yield and productivity can be improved. Can contribute to the improvement.
  • the template has a circuit pattern formed in the same manner as the mask, but since it is not reduced at the time of transfer, magnification conversion at the time of coordinate conversion becomes unnecessary. In addition, the pattern irregularities are reversed between the template and the wafer.
  • the same effects as those of the first embodiment can be realized for a wafer on which a pattern is drawn by nanoimprinting, and it can contribute to the quality control of the template, thereby improving the productivity.
  • the inspection apparatus and inspection method described so far it is possible to load a plurality of samples into the same apparatus and to inspect with an electron beam image based on the same coordinate data.
  • the transfer source and the transfer destination sample such as a mask and a wafer
  • the criticality of the defect is determined by verification. Can do.
  • the defect coordinate data on the wafer it can be determined whether the cause of the defect is a process or a mask.
  • the defect and quality control of the mask can be performed, so that the reliability of semiconductor device manufacturing can be improved.
  • the quality of the exposure process can be controlled, and the mask quality and the exposure process can be optimized. As a result, the semiconductor yield and productivity can be improved. Can contribute to the improvement.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Biochemistry (AREA)
  • General Health & Medical Sciences (AREA)
  • Immunology (AREA)
  • Pathology (AREA)
  • Analysing Materials By The Use Of Radiation (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

La présente invention concerne un appareil d'inspection et un procédé d'inspection, grâce auxquels des échantillons, tels qu'une tranche et un masque, présentant des tracés de circuit équivalents mais différentes formes, peuvent être inspectés par un appareil. L'appareil d'inspection est capable d'inspecter différents échantillons dans une même chambre d'échantillon du fait qu'il est pourvu d'une pluralité de supports de transfert correspondant à une pluralité d'échantillons présentant différentes formes. De plus, l'appareil d'inspection est capable d'analyser facilement une relation entre un défaut et une cause du défaut du fait qu'il est pourvu d'une fonction de comparaison des résultats d'inspection des deux échantillons.
PCT/JP2012/002410 2011-05-17 2012-04-06 Appareil d'inspection de tracé et procédé d'inspection de tracé WO2012157181A1 (fr)

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JP2011110002A JP2012243831A (ja) 2011-05-17 2011-05-17 パターン検査装置および検査方法
JP2011-110002 2011-05-17

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JP6379937B2 (ja) * 2014-09-30 2018-08-29 大日本印刷株式会社 ステージ制御方法、修正テンプレートの製造方法、およびテンプレート観察修正装置
WO2018016062A1 (fr) 2016-07-22 2018-01-25 株式会社 日立ハイテクノロジーズ Dispositif d'évaluation de motif
JP7220126B2 (ja) * 2019-06-14 2023-02-09 株式会社ニューフレアテクノロジー 検査装置

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002001596A1 (fr) * 2000-06-27 2002-01-03 Ebara Corporation Appareil d'inspection d'un faisceau de particules charge et procede de production d'un dispositif utilisant cet appareil
JP2009036703A (ja) * 2007-08-03 2009-02-19 Toppan Printing Co Ltd パターン計測装置及びパターン計測方法

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002001596A1 (fr) * 2000-06-27 2002-01-03 Ebara Corporation Appareil d'inspection d'un faisceau de particules charge et procede de production d'un dispositif utilisant cet appareil
JP2009036703A (ja) * 2007-08-03 2009-02-19 Toppan Printing Co Ltd パターン計測装置及びパターン計測方法

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