WO2012127801A1 - Multiwavelength light emitting element and method for manufacturing same - Google Patents

Multiwavelength light emitting element and method for manufacturing same Download PDF

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Publication number
WO2012127801A1
WO2012127801A1 PCT/JP2012/001608 JP2012001608W WO2012127801A1 WO 2012127801 A1 WO2012127801 A1 WO 2012127801A1 JP 2012001608 W JP2012001608 W JP 2012001608W WO 2012127801 A1 WO2012127801 A1 WO 2012127801A1
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light emitting
semiconductor
layer
type semiconductor
emitting device
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PCT/JP2012/001608
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French (fr)
Japanese (ja)
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只友　一行
成仁 岡田
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国立大学法人山口大学
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate

Definitions

  • the present invention relates to a multi-wavelength light emitting device and a method of manufacturing the same.
  • Patent Document 1 At least one light emitting diode portion made of a GaP-based, AlGaAs-based or AlGaInP-based compound semiconductor is laminated on the same substrate, and light emission made of a GaN-based compound semiconductor is formed on the light emitting diode portion.
  • a multi-wavelength light emitting device in which one or more diode portions are stacked is disclosed.
  • Patent Document 2 At least two or more types of semiconductor light emitting devices are formed on one substrate material, and on each of the semiconductor light emitting devices, a plurality of types of phosphors responsive to the emission wavelength of each device are applied.
  • a multi-wavelength light emitting device is disclosed which emits visible light having a wide range of light emission wavelengths by simultaneously emitting the semiconductor light emitting elements of the above.
  • the multi-wavelength light emitting device of the present invention is configured of first and second light emitting regions having different light emitting wavelengths,
  • the first light emitting region is provided with a first semiconductor base layer and a first semiconductor light emitting layer stacked thereon.
  • a second semiconductor underlayer formed of a semiconductor having the same constituent elements as the first semiconductor underlayer disposed on the first semiconductor underlayer and different in elemental composition ratio in the second light emitting region; And a second semiconductor light emitting layer stacked thereon.
  • the first semiconductor underlayer is formed, and the second semiconductor underlayer is a semiconductor having the same constituent elements as the first semiconductor underlayer and different element composition ratios.
  • the first and second semiconductor light emitting layers are simultaneously formed on the exposed portion of the first semiconductor underlayer and on the second semiconductor underlayer, respectively. It forms.
  • FIG. 1 is a cross-sectional view of a multi-wavelength light emitting device according to Embodiment 1.
  • FIG. (A) And (b) is 1st explanatory drawing of the manufacturing method of the multiple wavelength light emitting element which concerns on Embodiment 1.
  • FIG. 7 is a second explanatory view of the method of manufacturing the multi-wavelength light emitting element according to Embodiment 1.
  • FIG. FIGS. 7A to 7C are third explanatory views of the method of manufacturing a multi-wavelength light emitting device according to Embodiment 1.
  • FIGS. FIGS. 7A to 7C are fourth explanatory views of the method of manufacturing a multi-wavelength light emitting device according to Embodiment 1.
  • FIGS. 7A to 7C are fifth explanatory views of the method of manufacturing a multi-wavelength light emitting device according to Embodiment 1.
  • FIGS. 7 is a sixth explanatory view of the method of manufacturing the multi-wavelength light emitting element according to Embodiment 1.
  • FIG. 5 is a cross-sectional view of a multi-wavelength light emitting device according to Embodiment 2.
  • FIGS. 7A to 7C are explanatory views of a method of manufacturing a multi-wavelength light emitting device according to Embodiment 2.
  • FIGS. FIG. 7 is a cross-sectional view of a multi-wavelength light emitting device according to Embodiment 3.
  • FIGS. 7A to 7C are explanatory diagrams of a method of manufacturing a multi-wavelength light emitting device according to Embodiment 3.
  • FIG. 1 shows a multi-wavelength light emitting device 10 according to the first embodiment.
  • the multiple wavelength light emitting device 10 includes a substrate 11 as a base.
  • Examples of the substrate 11 include a sapphire substrate and a SiC substrate.
  • a sapphire substrate which is a single crystal substrate of a corundum structure of Al 2 O 3 is preferable from the viewpoint of versatility.
  • the main surface of the substrate 11 (the thickness direction of the substrate 11 is the normal direction, and the surface perpendicular to it) is a-plane ⁇ 11-20 ⁇ surface> whose normal direction is a-axis, c-axis normal direction C plane ⁇ 0001 ⁇ plane> and m plane ⁇ 1-100 ⁇ plane> whose normal direction is the m axis, and r plane ⁇ 1 102 ⁇ plane> And other crystal planes such as n-plane ⁇ 11-23 ⁇ plane>.
  • the substrate 11 is a miscut surface in which the a-axis or the like is inclined at a predetermined angle (for example, 45 ° or 60 ° or a slight angle within several degrees) with respect to the normal direction of the main surface.
  • a predetermined angle for example, 45 ° or 60 ° or a slight angle within several degrees
  • the substrate 11 may be a miscut substrate.
  • the plane orientations of the a-plane, c-plane, and m-plane are orthogonal to each other.
  • the substrate 11 has a crystal growth surface 12 on the surface.
  • the crystal growth surface 12 of the substrate 11 may be the main surface of the substrate 11, or, as shown in FIG. 1, may be the side surface of the recessed groove 11 a formed in the substrate 11.
  • the recessed groove 11a may be a U-shaped groove, a V-shaped groove, or a trapezoidal groove as long as it has a side surface.
  • the groove 11a has, for example, a groove opening width of 0.5 to 10 ⁇ m, a groove depth of 0.75 to 100 ⁇ m, and an angle of 70 to 120 ° with respect to the main surface of the groove side surface. Only one groove may be formed, or a plurality of grooves may be formed parallel to each other at intervals. In the latter case, the groove spacing is, for example, 1 to 100 ⁇ m.
  • the crystal growth surface 12 may be comprised by the side surface of another recessed part, and the side surface of a convex part thru
  • the multi-wavelength light emitting device 10 includes the u-semiconductor layer 13 provided to be stacked on the substrate 11.
  • the u-semiconductor layer 13 is formed by crystal growth of an undoped semiconductor starting from the crystal growth surface 12.
  • Examples of the semiconductor for forming the u-semiconductor layer 13 include InGaN and AlGaN.
  • the thickness of the u-semiconductor layer 13 is, for example, 2 to 20 ⁇ m.
  • the main surface of the u-semiconductor layer 13 may be any of a-face ⁇ 11-20 ⁇ face>, c-face ⁇ 0001 ⁇ face>, and m-face ⁇ 1-100 ⁇ face>, and R plane ⁇ 1-102 ⁇ plane>, and other crystal planes such as (20-21), (11-22), and (1-101). Furthermore, the main surface of the u-semiconductor layer 13 is a surface in which the a-axis or the like is inclined at a predetermined angle (for example, 45 ° or 60 °, or a slight angle within several degrees) with respect to the normal direction of the main surface It is also good.
  • a predetermined angle for example, 45 ° or 60 °, or a slight angle within several degrees
  • the main surface of the u-semiconductor layer 13 is a nonpolar surface of a-plane ⁇ 11-20 ⁇ > or m-plane ⁇ 1-100 ⁇ > or (20 It is preferable that it is a semipolar surface such as -21), (11-22) and (1-101).
  • a low temperature buffer layer having a thickness of about 20 to 30 nm may be provided between the substrate 11 and the u-semiconductor layer 13.
  • the multi-wavelength light emitting device 10 includes the first n-type semiconductor layer 141 (first semiconductor underlayer) and the first n-type semiconductor layer 141 provided so as to be stacked on the u ⁇ semiconductor layer 13.
  • a 1p-type semiconductor layer 161 is provided.
  • the first n-type semiconductor layer 141 is formed by epitaxial crystal growth of a semiconductor doped with an n-type dopant starting from the main surface of the u ⁇ semiconductor layer 13.
  • the first semiconductor light emitting layer 151 is formed by epitaxial crystal growth of a semiconductor starting from the main surface of the first n-type semiconductor layer 141.
  • the first p-type semiconductor layer 161 is formed by epitaxial crystal growth of a semiconductor doped with a p-type dopant starting from the main surface of the first semiconductor light emitting layer 151. Therefore, the first n-type semiconductor layer 141, the first semiconductor light emitting layer 151, and the first p-type semiconductor layer 161 have the same crystal plane as the main surface of the u ⁇ semiconductor layer 13 as the main surface.
  • the multi-wavelength light emitting device 10 includes the second n-type semiconductor layer 142 (the first p-type semiconductor layer 161 except for a part of the surface of the first p-type semiconductor layer 161).
  • a second semiconductor base layer a second semiconductor light emitting layer 152 provided to be laminated on the second n-type semiconductor layer 142 by exposing a part of the surface of the second n-type semiconductor layer 142, and a second semiconductor
  • a second p-type semiconductor layer 162 provided to be stacked on the light emitting layer 152 is provided.
  • the second n-type semiconductor layer 142 is formed by epitaxial crystal growth of a semiconductor doped with an n-type dopant from the main surface of the first p-type semiconductor layer 161 as a starting point.
  • the second semiconductor light emitting layer 152 is formed by epitaxial crystal growth of a semiconductor starting from the main surface of the second n-type semiconductor layer 142.
  • the second p-type semiconductor layer 162 is formed by epitaxial crystal growth of a semiconductor doped with a p-type dopant starting from the main surface of the second semiconductor light emitting layer 152.
  • the second n-type semiconductor layer 142, the second semiconductor light emitting layer 152, and the second p-type semiconductor layer 162 have the same principal crystal plane as the main surface of the u- semiconductor layer 13 as the first p-type semiconductor layer 161. I assume.
  • the multi-wavelength light emitting device 10 includes the third n-type semiconductor layer 143 (provided to be stacked on the second p-type semiconductor layer 162 except a part of the surface of the second p-type semiconductor layer 162).
  • a third semiconductor base layer includes a third semiconductor light emitting layer 153 provided on the third n-type semiconductor layer 143 so as to expose a part of the surface of the third n-type semiconductor layer 143, and a third semiconductor
  • a third p-type semiconductor layer 163 provided to be stacked on the light emitting layer 153 is provided.
  • the third n-type semiconductor layer 143 is formed by epitaxial crystal growth of a semiconductor doped with an n-type dopant starting from the main surface of the second p-type semiconductor layer 162.
  • the third semiconductor light emitting layer 153 is formed by epitaxial crystal growth of a semiconductor with the main surface of the third n-type semiconductor layer 143 as a starting point.
  • the third p-type semiconductor layer 163 is formed by epitaxial crystal growth of a semiconductor doped with a p-type dopant from the main surface of the third semiconductor light emitting layer 153 as a starting point. Therefore, the third n-type semiconductor layer 143, the third semiconductor light-emitting layer 153, and the third p-type semiconductor layer 163 have the same main crystal plane as the main surface of the u- semiconductor layer 13 as the second p-type semiconductor layer 162. I assume.
  • the exposed portion of the first p-type semiconductor layer 161 is the first light emitting region A1
  • the exposed portion of the second p-type semiconductor layer 162 is the second light emitting region A2
  • the third p-type The stacked portion of the semiconductor layer 163 is formed in the third light emitting region A3.
  • the first to third n-type semiconductor layers 141 to 143 are formed of a semiconductor of the same constituent element.
  • Examples of the semiconductor for forming the first to third n-type semiconductor layers 141 to 143 include InGaN, AlGaN and the like.
  • the semiconductors forming the first to third n-type semiconductor layers 141 to 143 have the same constituent elements, but the element composition ratios are different from each other.
  • n-type dopants contained in the first to third n-type semiconductor layers 141 to 143 include Si and Ge.
  • the concentration of the n-type dopant is, for example, 1.0 ⁇ 10 17 to 20 ⁇ 10 17 / cm 3 .
  • the first to third n-type semiconductor layers 141 to 143 may be formed of a single layer, or may be formed of a plurality of layers having different types and concentrations of n-type dopants.
  • the thickness of the first to third n-type semiconductor layers 141 to 143 is, for example, 2 to 10 ⁇ m.
  • first to third n-type semiconductor layers 141 to 143 form an underlayer of first to third semiconductor light emitting layers 151 to 153 described later, and have defects such as InGaN / GaN super lattice structure, for example. May have a structure to prevent the propagation and generation of
  • the first to third semiconductor light emitting layers 151 to 153 may be formed of semiconductors having the same constituent element and different elemental composition ratios, or may be formed of semiconductors having constituent elements different from one another. Good.
  • the first to third semiconductor light emitting layers 151 to 153 may be formed of semiconductors of the same constituent element as each other, and the layer thicknesses may be different.
  • the first to third semiconductor light emitting layers 151 to 153 are configured to have different light emission wavelengths. Examples of the semiconductor forming the first to third semiconductor light emitting layers 151 to 153 include InGaN, AlGaN and the like.
  • the first to third semiconductor light emitting layers 151 to 153 are formed of InGaN having mutually different element compositional ratios, InGaN forming the second semiconductor light emitting layer 152 rather than InGaN forming the first semiconductor light emitting layer 151 It is preferable that the InN mixed crystal ratio is higher, and that the InGaN mixed crystal ratio to form the third semiconductor light emitting layer 153 is higher than the InGaN to form the second semiconductor light emitting layer 152.
  • the emission wavelength of InGaN depends on the InN mixed crystal ratio, and the higher the InN mixed crystal ratio, the longer the light emission wavelength.
  • first light emitting area A1 including only the first semiconductor light emitting layer 151
  • second light emitting area A2 including the first and second semiconductor light emitting layers 151 and 152
  • first to third semiconductor light emitting layers 151 to 153 The emission wavelengths of the third light emitting regions A3 are different from each other, and the InN mixed crystal ratio obtained by averaging the whole in this order becomes high, so that the emission wavelengths become longer in this order.
  • the first to third semiconductor light emitting layers 151 to 153 may be formed as a single layer, or may have a multiple quantum well layer structure in which well layers and barrier layers are alternately stacked.
  • the thickness of the first to third semiconductor light emitting layers 151 to 153 is, for example, 3 to 100 nm.
  • the first to third light emitting regions A1 to A3 may be configured to respectively emit light of, for example, R (red), G (green) and B (blue). Thereby, a white light emitting element (white LED) of one chip can be configured.
  • the first to third p-type semiconductor layers 161 to 163 may be formed of semiconductors of the same constituent element, or may be formed of semiconductors of different constituent elements. In the former case, the semiconductors forming the first to third p-type semiconductor layers 161 to 163 may have the same elemental composition ratio. Examples of the semiconductor for forming the first to third p-type semiconductor layers 161 to 163 include InGaN, AlGaN and the like.
  • Examples of p-type dopants contained in the first to third p-type semiconductor layers 161 to 163 include Mg and Cd.
  • the free hole concentration measured by Hall effect measurement is, for example, 2.0 ⁇ 10 17 to 10 ⁇ 10 17 / cm 3 .
  • the first to third p-type semiconductor layers 161 to 163 may be formed of a single layer, or may be formed of a plurality of layers having different types and concentrations of p-type dopants.
  • the thickness of the first to third p-type semiconductor layers 161 to 163 is, for example, 50 to 200 nm.
  • the multi-wavelength light emitting device 10 includes first to third n-type electrodes 171 to 173 and first to third n-type electrodes provided to be electrically connected to the first to third n-type semiconductor layers 141 to 143, respectively.
  • the first to third p-type electrodes 181 to 183 are provided so as to be electrically connected to the third p-type semiconductor layers 161 to 163, respectively.
  • Examples of constituent electrode materials of the first to third n-type electrodes 171 to 173 include a laminated structure of Ti / Al, Ti / Al / Mo / Au, Hf / Au or the like, an alloy or the like.
  • the thickness of the first to third n-type electrodes 171 to 173 is, for example, Ti / Al (10 nm / 500 nm).
  • the first to third p-type electrodes 181 to 183 for example, a laminated structure of Pd / Pt / Au, Ni / Au, Pd / Mo / Au or the like, an alloy or the like, or an oxide such as ITO (indium tin oxide) And transparent conductive materials.
  • pad electrodes for wire bonding are required on the first to third p-type electrodes 181 to 183, and in many cases, the same material system as the first to third n-type electrodes 171 to 173 is used.
  • the thickness of the first to third p-type electrodes 181 to 183 is, for example, 10 to 200 nm in the case of ITO.
  • FIGS. Manufacturing method of multi-wavelength light emitting device
  • u-InGaN as the u-semiconductor layer 13 crystal-grown from the side surface of the recessed groove 11 a formed on the wafer 11 ′ (substrate 11) Layer
  • a first n-type InGaN layer doped with Si as the first n-type semiconductor layer 141
  • the second n-type InGaN layer doped with Si as the second n-type semiconductor layer 142, the second InGaN layer as the second semiconductor light emitting layer 152, and the second p-type semiconductor layer 162.
  • the semiconductor layers of the second p-type InGaN layer doped with Mg are sequentially formed, and then, the third n-type I doped with Si as the third n-type semiconductor layer 143 is formed.
  • the semiconductor layers of the GaN layer, the third InGaN layer as the third semiconductor light emitting layer 153, and the Mg-doped third p-type InGaN layer as the third p-type semiconductor layer 163 are sequentially formed, and the first to third n-type After etching is performed to expose the semiconductor layers 141 to 143 and the first and second p-type semiconductor layers 161 and 162, first to third n-type semiconductor layers 141 to 143 and first to third p-type semiconductor layers are formed.
  • An example in which first to third n-type electrodes 171 to 173 and first to third p-type electrodes 181 to 183 are formed on 161 to 163 is taken as an example.
  • ⁇ Wafer (substrate) preparation process In the formation region of each multi-wavelength light emitting element 10 of the wafer 11 ′, as shown in FIG. 2A, patterning of the photoresist 20 is formed such that only the groove formation planned portion becomes an opening. As shown in b), after the recessed groove 11a is formed on the surface of the wafer 11 'by etching the photoresist 20 as an etching resist, the photoresist 20 is removed.
  • MOVPE metal organic vapor phase epitaxy
  • MBE molecular beam epitaxy
  • hydride vapor phase epitaxy Hydride Vapor Phase Epitaxy: And the like.
  • metal organic vapor phase epitaxy is the most common. Below, the formation method of each semiconductor layer using the metal organic chemical vapor deposition method is demonstrated.
  • the MOVPE apparatus used to form each semiconductor layer is composed of a wafer transfer system, a wafer heating system, a gas supply system, and a gas exhaust system, each of which is electronically controlled.
  • the wafer heating system is composed of a thermocouple and a resistance heater, and a susceptor made of carbon or SiC provided thereon. Then, in the wafer heating system, the MOVPE apparatus is configured to crystal-grow a semiconductor layer by the reaction gas on the wafer 11 ′ set on the susceptor of the quartz tray to be transported.
  • a wafer 11 'having a groove 11a formed and processed on the surface thereof is set on a quartz tray so that the surface is upward using the above-mentioned MOVPE apparatus, and then the wafer 11' is heated to 1050 to 1150 ° C.
  • the pressure of 10 k to 100 kPa, H 2 as a carrier gas is circulated in the flow channel provided in the reaction vessel, and the state is maintained for several minutes to thermally clean the wafer 11 ′.
  • the temperature of the wafer 11 ' is set to 900 to 1150 ° C.
  • the pressure in the reaction vessel is set to 10 k to 100 kPa
  • the carrier gas H 2 is circulated in the reaction vessel at a flow rate of about 10 L / min.
  • group V element source (NH 3 ), group III element source 1 (TMG), and group III element source 2 (TMI) the respective supply flow rates are 0.1 to 5 L / min, 5 It is flowed so as to be ⁇ 15 ⁇ mol / min and 2 ⁇ 30 ⁇ mol / min.
  • crystal growth is performed so that undoped InGaN is stacked on the substrate 11 starting from the side surface of the recessed groove 11 a which is the crystal growth surface 12 by selection of crystal growth conditions.
  • the u-semiconductor layer 13 is formed.
  • the temperature of the wafer 11 ′ may be 400 to 500 ° C., and the GaN may be crystal-grown.
  • the pressure in the reaction vessel is set to 10 k to 100 kPa, and carrier gas H 2 is circulated at a predetermined flow rate in the reaction vessel, and there is a group V element source (NH 3 ), a group III element source as a reaction gas. 1 (TMG) and III group element source 2 (TMI) and n-type doping element source (SiH 4 ) are flowed at appropriate supply flow rates respectively.
  • InGaN doped with Si which is an n-type dopant, is selected from the u-semiconductor layer 13 starting from the main surface of the u-semiconductor layer 13 by selection of crystal growth conditions.
  • the first n-type semiconductor layer 141 is formed by epitaxial crystal growth so as to be stacked thereon.
  • the temperature of the wafer 11 ' is set to about 800 ° C.
  • the pressure in the reaction vessel is set to 10 k to 100 kPa
  • the carrier gas N 2 is circulated in the reaction vessel at a flow rate of 5 to 15 L / min.
  • the group V element source (NH 3 ), group III element source 1 (TMG), and group III element source 2 (TMI) the respective supply flow rates are 0.1 to 5 L / min, 5 to 15 ⁇ mol. It flows so as to be / min and 2 to 30 ⁇ mol / min.
  • epitaxial growth is performed such that InGaN is stacked on the first n-type semiconductor layer 141 starting from the main surface of the first n-type semiconductor layer 141 by selection of crystal growth conditions.
  • the first semiconductor light emitting layer 151 is formed by crystal growth.
  • the temperature of the wafer 11 ′ is set to 1000 to 1100 ° C.
  • the pressure in the reaction vessel is set to 10 k to 100 kPa
  • H 2 of the carrier gas is circulated at a predetermined flow rate in the reaction vessel
  • Group element source (NH 3 ), group III element source 1 (TMG), and group III element source 2 (TMI), and p-type doping element source (Cp 2 Mg) respectively at appropriate supply flow rates Flow.
  • InGaN doped with Mg which is a p-type dopant, is selected from the main surface of the first semiconductor light emitting layer 151 as the first semiconductor light emitting layer by selection of crystal growth conditions.
  • the first p-type semiconductor layer 161 is formed by crystal growth so as to be stacked on the semiconductor layer 151.
  • the element composition ratio is the same as that of the first n-type semiconductor layer 141.
  • the second n-type semiconductor layer 142 is formed by epitaxial crystal growth so that different InGaN layers are stacked on the first p-type semiconductor layer 161. Since the InN mixed crystal ratio is determined by the molar flow rate of TMI / (molar flow rate of TMG + molar flow rate of TMI) and the growth temperature, the InN mixed crystal ratio is higher than that of the first n-type semiconductor layer 141. It is preferable to increase the supply flow rate of the group III element supply source 2 (TMI) more than the first n-type semiconductor layer forming step.
  • TMI group III element supply source 2
  • the semiconductor growth layer 151 is formed of a semiconductor whose element composition ratio is different from that of the first semiconductor light emitting layer 151 starting from the main surface of the second n-type semiconductor layer 142.
  • the second semiconductor light emitting layer 152 is formed by epitaxial crystal growth such that InGaN having a layer thickness different from that of the first semiconductor light emitting layer 151 is stacked on the first n-type semiconductor layer 141.
  • InGaN doped with Mg as a p-type dopant is selected as a second semiconductor light emitting layer starting from the main surface of the second semiconductor light emitting layer 152 by selection of crystal growth conditions.
  • the second p-type semiconductor layer 162 is formed by epitaxial crystal growth so as to be stacked on the semiconductor layer 152.
  • the same constituent elements as the first and second n-type semiconductor layers 141 and 142 are used.
  • epitaxial crystal growth is performed so that InGaN having different element composition ratios is stacked on the second p-type semiconductor layer 162, and the third n-type semiconductor layer 143 is formed. Since the InN mixed crystal ratio is determined by the molar flow rate of TMI / (molar flow rate of TMG + molar flow rate of TMI) and the growth temperature, the InN mixed crystal ratio is higher than that of the first and second n-type semiconductor layers 141 and 142. It is preferable to increase the supply flow rate of the group III element source 2 (TMI) rather than the first and second n-type semiconductor layer forming steps.
  • TMI group III element source 2
  • the element composition ratio of the first and second semiconductor light emitting layers 151 and 152 is set from the main surface of the third n-type semiconductor layer 143 as a starting point by selection of crystal growth conditions.
  • the epitaxial crystal growth is performed so that InGaN, which is formed of different semiconductors and / or has a layer thickness different from that of the first and second semiconductor light emitting layers 151 and 152, is stacked on the third n-type semiconductor layer 143.
  • a semiconductor light emitting layer 153 is formed.
  • InGaN doped with Mg which is a p-type dopant, is selected as the third semiconductor light emitting layer, with the main surface of the third semiconductor light emitting layer 153 as a starting point.
  • the third p-type semiconductor layer 163 is formed by epitaxial crystal growth so as to be stacked on the 153.
  • ⁇ Electrode formation and cleavage process> As shown in FIG. 7, reactive ion etching is performed so that the first to third n-type semiconductor layers 141 to 143 and the first and second p-type semiconductor layers 161 and 162 are exposed, and the exposed first to third n
  • the first to third n-type electrodes 171 to 173 and the first to third p-type semiconductor layers 161 to 163 and the first to third p-type semiconductor layers 161 to 163 are formed by vacuum evaporation, sputtering, chemical vapor deposition (CVD) or the like.
  • First to third p-type electrodes 181 to 183 are formed.
  • a portion consisting of the first n-type semiconductor layer 141, the first semiconductor light-emitting layer 151, and the first p-type semiconductor layer 161 and exposed to the first p-type semiconductor layer 161 is a first light emitting region A1, the first and second n-type semiconductor layers.
  • a portion including the first and second semiconductor light emitting layers 151 and 142, and the first and second p type semiconductor layers 161 and 162 and exposed to the second p type semiconductor layer 162 is a second light emitting region A2, and a second light emitting region A2.
  • the wafer 11 ′ is cleaved to be divided individually, and the multi-wavelength light emitting device 10 according to the first embodiment is manufactured.
  • FIG. 8 shows the multi-wavelength light emitting device 10 according to the second embodiment.
  • the part of the same name as Embodiment 1 is shown with the same code as Embodiment 1.
  • the multi-wavelength light emitting device 10 includes the surfaces of a first n-type semiconductor layer 141 (first semiconductor base layer) and a first n-type semiconductor layer 141 provided to be stacked on the u ⁇ semiconductor layer 13.
  • a first semiconductor light emitting layer 151 provided to be laminated on the first n-type semiconductor layer 141 by exposing a part of the first semiconductor light emitting layer 151 except for a portion of the surface of the first semiconductor light emitting layer 151
  • a portion of the surface of the second n-type semiconductor layer 142 (second semiconductor base layer) provided to be stacked on the semiconductor layer 151 and the second n-type semiconductor layer 142 exposed on the second n-type semiconductor layer 142;
  • a second semiconductor light emitting layer 152 provided to be stacked, a third n-type semiconductor provided to be stacked on the second semiconductor light emitting layer 152 except for a part of the surface of the second semiconductor light emitting layer 152 Layer 143 (below the third semiconductor)
  • the first n-type semiconductor layer 141 is formed by epitaxial crystal growth of a semiconductor doped with an n-type dopant starting from the main surface of the u ⁇ semiconductor layer 13.
  • the first semiconductor light emitting layer 151 is formed by epitaxial crystal growth of a semiconductor starting from the main surface of the first n-type semiconductor layer 141.
  • the second n-type semiconductor layer 142 is formed by epitaxial crystal growth of a semiconductor doped with an n-type dopant from the main surface of the first semiconductor light emitting layer 151 as a starting point.
  • the second semiconductor light emitting layer 152 is formed by epitaxial crystal growth of a semiconductor starting from the main surface of the second n-type semiconductor layer 142.
  • the third n-type semiconductor layer 143 is formed by epitaxial crystal growth of a semiconductor doped with an n-type dopant starting from the main surface of the second semiconductor light emitting layer 152.
  • the third semiconductor light emitting layer 153 is formed by epitaxial crystal growth of a semiconductor with the main surface of the third n-type semiconductor layer 143 as a starting point.
  • the semiconductors forming the first to third n-type semiconductor layers 141 to 143 have the same constituent elements, but the element composition ratios are different from each other.
  • the first to third n-type semiconductor layers 141 to 143 form an underlayer of the first to third semiconductor light emitting layers 151 to 153, and propagation of defects such as InGaN / GaN super lattice structure, for example. And you may have a structure which prevents generation
  • the portion of the first semiconductor light emitting layer 151 where the second n type semiconductor layer 142 is not stacked and the third n type semiconductor layer 143 of the second semiconductor light emitting layer 152 are not stacked.
  • the first to third p-type semiconductor layers 161 to 163 are provided so as to be stacked on the portion and the third semiconductor light emitting layer 153.
  • the first to third p-type semiconductor layers 161 to 163 are formed by epitaxial crystal growth of a semiconductor from the main surfaces of the first to third semiconductor light emitting layers 151 to 153, respectively.
  • the multi-wavelength light emitting device 10 includes first to third n-type electrodes 171 to 173 and first to third n-type electrodes provided to be electrically connected to the first to third n-type semiconductor layers 141 to 143, respectively.
  • the first to third p-type electrodes 181 to 183 are provided so as to be electrically connected to the third p-type semiconductor layers 161 to 163, respectively.
  • the exposed portion of the first p-type semiconductor layer 161 provided with the first p-type electrode 181 is the first light emitting region A1 and the second p-type semiconductor provided with the second p-type electrode 182.
  • the exposed portion of the layer 162 is configured as the second light emitting region A2
  • the stacked portion of the third p type semiconductor layer 163 provided with the third p type electrode 183 is configured as the third light emitting region A3.
  • the u-semiconductor layer is grown from the side surface of the recessed groove 11a formed on the wafer 11 '(substrate 11).
  • Second n-type InGaN layer, second InGaN layer as second semiconductor light-emitting layer 152, third n-type InGaN layer doped with Si as third n-type semiconductor layer 143, and third InGaN layer as third semiconductor light-emitting layer 153 in this order Then, as shown in FIG.
  • first to third n-type semiconductor layers 141 to 143 and the first and second semiconductor light emitting layers 151 and 152 are formed.
  • the first to third p-type InGaN layers are simultaneously formed on the exposed portions of the first to third semiconductor light emitting layers 151 to 153, respectively, as shown in FIG. 9C.
  • first to third n-type electrodes 171 to 173 and first to third p-type electrodes are respectively formed on the exposed portions of the first to third n-type semiconductor layers 141 to 143 and the first to third p-type semiconductor layers 161 to 163. Electrodes 181 to 183 are formed.
  • FIG. 10 shows the multi-wavelength light emitting device 10 according to the third embodiment.
  • the part of the same name as Embodiment 1 is shown with the same code as Embodiment 1.
  • the multi-wavelength light emitting device 10 includes the surfaces of a first n-type semiconductor layer 141 (first semiconductor underlayer) and a first n-type semiconductor layer 141 provided so as to be stacked on the u ⁇ semiconductor layer 13.
  • a second n-type semiconductor layer 142 (a second semiconductor base layer) provided to be laminated on the first n-type semiconductor layer 141 except for exposing a part of the surface and excluding the other part of the surface;
  • a third n-type semiconductor layer 143 (third semiconductor foundation layer) provided to be laminated on the second n-type semiconductor layer 142 except for exposing a part of the surface of the semiconductor layer 142 and excluding the other part of the surface Is equipped.
  • the first n-type semiconductor layer 141 is formed by epitaxial crystal growth of a semiconductor doped with an n-type dopant starting from the main surface of the u ⁇ semiconductor layer 13.
  • the second n-type semiconductor layer 142 is formed by epitaxial crystal growth of a semiconductor doped with an n-type dopant from the main surface of the first n-type semiconductor layer 141 as a starting point.
  • the third n-type semiconductor layer 143 is formed by epitaxial crystal growth of a semiconductor doped with an n-type dopant starting from the main surface of the second n-type semiconductor layer 142.
  • the semiconductors forming the first to third n-type semiconductor layers 141 to 143 have the same constituent elements, but the element composition ratios are different from each other.
  • the first to third n-type semiconductor layers 141 to 143 form an underlayer of the first to third semiconductor light emitting layers 151 to 153, and propagation of defects such as InGaN / GaN super lattice structure, for example. And you may have a structure which prevents generation
  • the third n-type semiconductor layer 143 of the second n-type semiconductor layer 142 is stacked, and the other part of the first n-type semiconductor layer 141 where the second n-type semiconductor layer 142 is not stacked.
  • the semiconductor light emitting layer 151 includes first to third semiconductor light emitting layers 151 to 153 provided on the third n-type semiconductor light emitting layer.
  • the first to third semiconductor light emitting layers 151 to 153 are formed by epitaxial crystal growth of a semiconductor from the main surfaces of the first to third n-type semiconductor layers 141 to 143 as starting points.
  • the multi-wavelength light emitting device 10 includes the first to third p-type semiconductor layers 161 to 163 provided to be stacked on the first to third semiconductor light emitting layers 151 to 153. There is.
  • the first to third p-type semiconductor layers 161 to 163 are formed by epitaxial crystal growth of a semiconductor from the main surfaces of the first to third semiconductor light emitting layers 151 to 153, respectively.
  • the multi-wavelength light emitting device 10 includes first to third n-type electrodes 171 to 173 and first to third n-type electrodes provided to be electrically connected to the first to third n-type semiconductor layers 141 to 143, respectively.
  • the first to third p-type electrodes 181 to 183 are provided so as to be electrically connected to the third p-type semiconductor layers 161 to 163, respectively.
  • the exposed portion of the first p-type semiconductor layer 161 provided with the first p-type electrode 181 is the first light emitting region A1 and the second p-type semiconductor provided with the second p-type electrode 182.
  • the exposed portion of the layer 162 is configured as the second light emitting region A2
  • the stacked portion of the third p type semiconductor layer 163 provided with the third p type electrode 183 is configured as the third light emitting region A3.
  • the u-semiconductor layer is formed by crystal growth from the side surface of the recessed groove 11a formed on the wafer 11 '(substrate 11).
  • a third n-type InGaN layer doped with Si is sequentially formed as 143, and then etching is performed so that each of the first and second n-type semiconductor layers 141 and 142 is exposed as shown in FIG.
  • first to third semiconductor light emitting layers 151 to 153 are simultaneously formed on exposed portions of the first to third n-type semiconductor layers 141 to 143, respectively.
  • the semiconductors forming the first to third n-type semiconductor layers 143 have the same constituent elements, but since the element composition ratios are different from each other, the first to third semiconductor light emitting layers 151 to 153 are It is formed of semiconductors which are the same constituent elements and have mutually different elemental composition ratios, and / or are formed to have different layer thicknesses from one another by the same constituent elements.
  • first to third p-type semiconductor layers 161 to 163 are simultaneously formed on the first to third semiconductor light emitting layers 151 to 153, respectively, and further, exposed portions of the first to third n-type semiconductor layers 141 to 143 and First to third n-type electrodes 171 to 173 and first to third p-type electrodes 181 to 183 are formed on the first to third p-type semiconductor layers 161 to 163, respectively.
  • the multi-wavelength light emitting device 10 has the first to third light emitting regions A1 to A3 in the above embodiment, the present invention is not particularly limited thereto, and has more than three light emitting regions. It is also good.
  • the present invention is useful for a multi-wavelength light emitting device and a method of manufacturing the same.
  • multi-wavelength light emitting device 11 substrate 11a recessed groove 11 'wafer 12 crystal growth surface 13 u-semiconductor layers 141 to 143 first to third n-type semiconductor layers (first to third semiconductor underlayers) 151 to 153 first to third semiconductor light emitting layers 161 to 163 first to third p-type semiconductor layers 171 to 173 first to third n-type electrodes 181 to 183 first to third p-type electrodes 20 photoresists A1 to A3 first ⁇ 3rd light emitting area

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Abstract

A multiwavelength light emitting element (10) comprises a first and second light emitting regions (A1, A2) having different emission wavelengths. In the first light emitting region (A1), a first semiconductor light emitting layer (151) is provided on a first semiconductor foundation layer (141). In the second light emitting region (A2), a second semiconductor light emitting layer (152) that is laminated onto a second semiconductor foundation layer (142) disposed on the first semiconductor foundation layer (141) is provided.

Description

多波長発光素子及びその製造方法Multi-wavelength light emitting device and method of manufacturing the same
　本発明は多波長発光素子及びその製造方法に関する。 The present invention relates to a multi-wavelength light emitting device and a method of manufacturing the same.
　発光波長が相互に異なる複数の半導体発光層を同一基板上に形成した多波長発光素子が種々提案されている。 Various multi-wavelength light emitting devices have been proposed in which a plurality of semiconductor light emitting layers having different light emission wavelengths are formed on the same substrate.
　例えば、特許文献１には、同一基板上に、ＧａＰ系、ＡｌＧａＡｓ系、またはＡｌＧａＩｎＰ系化合物半導体からなる発光ダイオード部を少なくとも１個積層し、その発光ダイオード部上に、ＧａＮ系化合物半導体からなる発光ダイオード部を１個以上積層した多波長発光素子が開示されている。 For example, in Patent Document 1, at least one light emitting diode portion made of a GaP-based, AlGaAs-based or AlGaInP-based compound semiconductor is laminated on the same substrate, and light emission made of a GaN-based compound semiconductor is formed on the light emitting diode portion. A multi-wavelength light emitting device in which one or more diode portions are stacked is disclosed.
　特許文献２には、１つの基板材料上に少なくとも２種類以上の半導体発光素子を形成し、各々の半導体発光素子上に、それぞれの素子の発光波長に反応する蛍光体を複数種類塗布し、各々の半導体発光素子を同時に発光させることにより、広範囲の発光波長を有する可視光を発光する多波長発光装置が開示されている。 In Patent Document 2, at least two or more types of semiconductor light emitting devices are formed on one substrate material, and on each of the semiconductor light emitting devices, a plurality of types of phosphors responsive to the emission wavelength of each device are applied. A multi-wavelength light emitting device is disclosed which emits visible light having a wide range of light emission wavelengths by simultaneously emitting the semiconductor light emitting elements of the above.
特開平９－５５５３８号公報JP-A-9-55538 特開２００８－７１８０５号公報JP, 2008-71805, A
　本発明の多波長発光素子は、発光波長が異なる第１及び第２発光領域が構成されたものであって、
　上記第１発光領域には、第１半導体下地層と、その上に積層された第１半導体発光層と、が設けられ、
　上記第２発光領域には、上記第１半導体下地層の上に配置された該第１半導体下地層と同一の構成元素で且つ元素組成比が異なる半導体で形成された第２半導体下地層と、その上に積層された第２半導体発光層と、が設けられている。 The multi-wavelength light emitting device of the present invention is configured of first and second light emitting regions having different light emitting wavelengths,
The first light emitting region is provided with a first semiconductor base layer and a first semiconductor light emitting layer stacked thereon.
A second semiconductor underlayer formed of a semiconductor having the same constituent elements as the first semiconductor underlayer disposed on the first semiconductor underlayer and different in elemental composition ratio in the second light emitting region; And a second semiconductor light emitting layer stacked thereon.
　本発明の多波長発光素子の製造方法は、第１半導体下地層を形成し、その上に、該第１半導体下地層と同一の構成元素で且つ元素組成比が異なる半導体で第２半導体下地層を、該第１半導体下地層の一部分が露出した状態に形成した後、露出した第１半導体下地層の一部分の上及び第２半導体下地層の上にそれぞれ第１及び第２半導体発光層を同時に形成するものである。 In the method of manufacturing a multi-wavelength light emitting device of the present invention, the first semiconductor underlayer is formed, and the second semiconductor underlayer is a semiconductor having the same constituent elements as the first semiconductor underlayer and different element composition ratios. After forming a portion of the first semiconductor underlayer exposed, the first and second semiconductor light emitting layers are simultaneously formed on the exposed portion of the first semiconductor underlayer and on the second semiconductor underlayer, respectively. It forms.
実施形態１に係る多波長発光素子の断面図である。1 is a cross-sectional view of a multi-wavelength light emitting device according to Embodiment 1. FIG. （ａ）及び（ｂ）は、実施形態１に係る多波長発光素子の製造方法の第１説明図である。(A) And (b) is 1st explanatory drawing of the manufacturing method of the multiple wavelength light emitting element which concerns on Embodiment 1. FIG. 実施形態１に係る多波長発光素子の製造方法の第２説明図である。7 is a second explanatory view of the method of manufacturing the multi-wavelength light emitting element according to Embodiment 1. FIG. （ａ）～（ｃ）は、実施形態１に係る多波長発光素子の製造方法の第３説明図である。FIGS. 7A to 7C are third explanatory views of the method of manufacturing a multi-wavelength light emitting device according to Embodiment 1. FIGS. （ａ）～（ｃ）は、実施形態１に係る多波長発光素子の製造方法の第４説明図である。FIGS. 7A to 7C are fourth explanatory views of the method of manufacturing a multi-wavelength light emitting device according to Embodiment 1. FIGS. （ａ）～（ｃ）は、実施形態１に係る多波長発光素子の製造方法の第５説明図である。FIGS. 7A to 7C are fifth explanatory views of the method of manufacturing a multi-wavelength light emitting device according to Embodiment 1. FIGS. 実施形態１に係る多波長発光素子の製造方法の第６説明図である。7 is a sixth explanatory view of the method of manufacturing the multi-wavelength light emitting element according to Embodiment 1. FIG. 実施形態２に係る多波長発光素子の断面図である。5 is a cross-sectional view of a multi-wavelength light emitting device according to Embodiment 2. FIG. （ａ）～（ｃ）は、実施形態２に係る多波長発光素子の製造方法の説明図である。FIGS. 7A to 7C are explanatory views of a method of manufacturing a multi-wavelength light emitting device according to Embodiment 2. FIGS. 実施形態３に係る多波長発光素子の断面図である。FIG. 7 is a cross-sectional view of a multi-wavelength light emitting device according to Embodiment 3. （ａ）～（ｃ）は、実施形態３に係る多波長発光素子の製造方法の説明図である。FIGS. 7A to 7C are explanatory diagrams of a method of manufacturing a multi-wavelength light emitting device according to Embodiment 3. FIGS.
　以下、実施形態について図面に基づいて説明する。 Hereinafter, embodiments will be described based on the drawings.
　［実施形態１］
　（多波長発光素子）
　図１は、実施形態１に係る多波長発光素子１０を示す。 Embodiment 1
(Multi-wavelength light emitting device)
FIG. 1 shows a multi-wavelength light emitting device 10 according to the first embodiment.
　＜基板＞
　実施形態１に係る多波長発光素子１０はベースとなる基板１１を備えている。 <Board>
The multiple wavelength light emitting device 10 according to the first embodiment includes a substrate 11 as a base.
　基板１１としては、例えば、サファイア基板、ＳｉＣ基板等が挙げられる。これらのうち汎用性の観点からＡｌ2Ｏ3のコランダム構造の単結晶基板であるサファイア基板が好ましい。 Examples of the substrate 11 include a sapphire substrate and a SiC substrate. Among them, a sapphire substrate which is a single crystal substrate of a corundum structure of Al 2 O 3 is preferable from the viewpoint of versatility.
　基板１１の主面（基板１１の厚さ方向を法線方向とし、それに直交する面）は、法線方向がａ軸であるａ面＜｛１１－２０｝面＞、法線方向がｃ軸であるｃ面＜｛０００１｝面＞、及び法線方向がｍ軸であるｍ面＜｛１－１００｝面＞のいずれであってもよく、また、ｒ面＜｛１－１０２｝面＞、ｎ面＜｛１１－２３｝面＞等の他の結晶面であってもよい。さらに、基板１１の主面は、ａ軸等が主面の法線方向に対して所定の角度（例えば４５°や６０°、あるいは数度以内の微少角）傾斜したミスカット面であってもよい。つまり、基板１１はミスカット基板であってもよい。なお、ａ面、ｃ面、及びｍ面は面方位が相互に直交する。 The main surface of the substrate 11 (the thickness direction of the substrate 11 is the normal direction, and the surface perpendicular to it) is a-plane <{11-20} surface> whose normal direction is a-axis, c-axis normal direction C plane <{0001} plane> and m plane <{1-100} plane> whose normal direction is the m axis, and r plane <{1 102} plane> And other crystal planes such as n-plane <{11-23} plane>. Furthermore, even if the main surface of the substrate 11 is a miscut surface in which the a-axis or the like is inclined at a predetermined angle (for example, 45 ° or 60 ° or a slight angle within several degrees) with respect to the normal direction of the main surface. Good. That is, the substrate 11 may be a miscut substrate. The plane orientations of the a-plane, c-plane, and m-plane are orthogonal to each other.
　基板１１は、表面に結晶成長面１２を有している。基板１１の結晶成長面１２は、基板１１の主面であってもよく、また、図１に示すように、基板１１に形成された凹溝１１ａの側面であってもよい。凹溝１１ａは、側面を有せば、コの字溝であってもよく、Ｖ字溝であってもよく、台形溝であってもよい。凹溝１１ａは、例えば、溝開口幅が０．５～１０μｍ、溝深さが０．７５～１００μｍ、及び溝側面の主面に対してなす角度が７０～１２０°である。凹溝１１ａは、１本だけが形成されていてもよく、また、複数本が相互に間隔をおいて並行に延びるように形成されていてもよい。後者の場合、溝間隔は例えば１～１００μｍである。なお、結晶成長面１２は、その他の凹部の側面や凸部乃至突条の側面で構成されていてもよい。 The substrate 11 has a crystal growth surface 12 on the surface. The crystal growth surface 12 of the substrate 11 may be the main surface of the substrate 11, or, as shown in FIG. 1, may be the side surface of the recessed groove 11 a formed in the substrate 11. The recessed groove 11a may be a U-shaped groove, a V-shaped groove, or a trapezoidal groove as long as it has a side surface. The groove 11a has, for example, a groove opening width of 0.5 to 10 μm, a groove depth of 0.75 to 100 μm, and an angle of 70 to 120 ° with respect to the main surface of the groove side surface. Only one groove may be formed, or a plurality of grooves may be formed parallel to each other at intervals. In the latter case, the groove spacing is, for example, 1 to 100 μm. In addition, the crystal growth surface 12 may be comprised by the side surface of another recessed part, and the side surface of a convex part thru | or a protrusion.
　＜ｕ-半導体層＞
　実施形態１に係る多波長発光素子１０は、基板１１上に積層されるように設けられたｕ-半導体層１３を備えている。このｕ-半導体層１３は、結晶成長面１２を起点として、アンドープの半導体が結晶成長して形成されたものである。 <U-semiconductor layer>
The multi-wavelength light emitting device 10 according to the first embodiment includes the u-semiconductor layer 13 provided to be stacked on the substrate 11. The u-semiconductor layer 13 is formed by crystal growth of an undoped semiconductor starting from the crystal growth surface 12.
　ｕ-半導体層１３を形成する半導体としては、例えば、ＩｎＧａＮ、ＡｌＧａＮ等が挙げられる。ｕ-半導体層１３の厚さは例えば２～２０μｍである。 Examples of the semiconductor for forming the u-semiconductor layer 13 include InGaN and AlGaN. The thickness of the u-semiconductor layer 13 is, for example, 2 to 20 μm.
　ｕ-半導体層１３の主面は、ａ面＜｛１１－２０｝面＞、ｃ面＜｛０００１｝面＞、及びｍ面＜｛１－１００｝面＞のいずれであってもよく、また、ｒ面＜｛１－１０２｝面＞や（２０－２１）、（１１－２２）、（１－１０１）等の他の結晶面であってもよい。さらに、ｕ-半導体層１３の主面は、ａ軸等が主面の法線方向に対して所定の角度（例えば４５°や６０°、あるいは数度以内の微少角）傾斜した面であってもよい。ｕ-半導体層１３の主面は、厚さ方向の分極を防止する観点からは、ａ面＜｛１１－２０｝面＞やｍ面＜｛１－１００｝面＞の無極性面又は（２０－２１）、（１１－２２）、（１－１０１）面等の半極性面であることが好ましい。 The main surface of the u-semiconductor layer 13 may be any of a-face <{11-20} face>, c-face <{0001} face>, and m-face <{1-100} face>, and R plane <{1-102} plane>, and other crystal planes such as (20-21), (11-22), and (1-101). Furthermore, the main surface of the u-semiconductor layer 13 is a surface in which the a-axis or the like is inclined at a predetermined angle (for example, 45 ° or 60 °, or a slight angle within several degrees) with respect to the normal direction of the main surface It is also good. From the viewpoint of preventing polarization in the thickness direction, the main surface of the u-semiconductor layer 13 is a nonpolar surface of a-plane <{11-20}> or m-plane <{1-100}> or (20 It is preferable that it is a semipolar surface such as -21), (11-22) and (1-101).
　なお、基板１１とｕ-半導体層１３との間には、厚さが２０～３０ｎｍ程度の低温バッファ層が設けられていてもよい。 A low temperature buffer layer having a thickness of about 20 to 30 nm may be provided between the substrate 11 and the u-semiconductor layer 13.
　＜ｎ型半導体層、半導体発光層、及びｐ型半導体層＞
　実施形態１に係る多波長発光素子１０は、ｕ-半導体層１３の上に積層されるように設けられた第１ｎ型半導体層１４１（第１半導体下地層）、第１ｎ型半導体層１４１の表面の一部分を露出させて、第１ｎ型半導体層１４１の上に積層されるように設けられた第１半導体発光層１５１、及び第１半導体発光層１５１の上に積層されるように設けられた第１ｐ型半導体層１６１を備えている。第１ｎ型半導体層１４１は、ｕ-半導体層１３の主面を起点として、ｎ型ドーパントがドープされた半導体がエピタキシャル結晶成長して形成されたものである。第１半導体発光層１５１は、第１ｎ型半導体層１４１の主面を起点として半導体がエピタキシャル結晶成長して形成されたものである。第１ｐ型半導体層１６１は、第１半導体発光層１５１の主面を起点として、ｐ型ドーパントがドープされた半導体がエピタキシャル結晶成長して形成されたものである。従って、第１ｎ型半導体層１４１、第１半導体発光層１５１、及び第１ｐ型半導体層１６１は、ｕ-半導体層１３の主面と同一の結晶面を主面とする。 <N-type semiconductor layer, semiconductor light emitting layer, and p-type semiconductor layer>
The multi-wavelength light emitting device 10 according to the first embodiment includes the first n-type semiconductor layer 141 (first semiconductor underlayer) and the first n-type semiconductor layer 141 provided so as to be stacked on the u− semiconductor layer 13. A first semiconductor light emitting layer 151 provided to be stacked on the first n-type semiconductor layer 141 by exposing a part of the first semiconductor light emitting layer 151 and a first semiconductor light emitting layer 151 provided on the first semiconductor light emitting layer 151; A 1p-type semiconductor layer 161 is provided. The first n-type semiconductor layer 141 is formed by epitaxial crystal growth of a semiconductor doped with an n-type dopant starting from the main surface of the u− semiconductor layer 13. The first semiconductor light emitting layer 151 is formed by epitaxial crystal growth of a semiconductor starting from the main surface of the first n-type semiconductor layer 141. The first p-type semiconductor layer 161 is formed by epitaxial crystal growth of a semiconductor doped with a p-type dopant starting from the main surface of the first semiconductor light emitting layer 151. Therefore, the first n-type semiconductor layer 141, the first semiconductor light emitting layer 151, and the first p-type semiconductor layer 161 have the same crystal plane as the main surface of the u− semiconductor layer 13 as the main surface.
　実施形態１に係る多波長発光素子１０は、第１ｐ型半導体層１６１の表面の一部分を除いて、第１ｐ型半導体層１６１の上に積層されるように設けられた第２ｎ型半導体層１４２（第２半導体下地層）、第２ｎ型半導体層１４２の表面の一部分を露出させて、第２ｎ型半導体層１４２の上に積層されるように設けられた第２半導体発光層１５２、及び第２半導体発光層１５２の上に積層されるように設けられた第２ｐ型半導体層１６２を備えている。第２ｎ型半導体層１４２は、第１ｐ型半導体層１６１の主面を起点として、ｎ型ドーパントがドープされた半導体がエピタキシャル結晶成長して形成されたものである。第２半導体発光層１５２は、第２ｎ型半導体層１４２の主面を起点として半導体がエピタキシャル結晶成長して形成されたものである。第２ｐ型半導体層１６２は、第２半導体発光層１５２の主面を起点として、ｐ型ドーパントがドープされた半導体がエピタキシャル結晶成長して形成されたものである。従って、第２ｎ型半導体層１４２、第２半導体発光層１５２、及び第２ｐ型半導体層１６２は、第１ｐ型半導体層１６１、よって、ｕ-半導体層１３の主面と同一の結晶面を主面とする。 The multi-wavelength light emitting device 10 according to the first embodiment includes the second n-type semiconductor layer 142 (the first p-type semiconductor layer 161 except for a part of the surface of the first p-type semiconductor layer 161). A second semiconductor base layer), a second semiconductor light emitting layer 152 provided to be laminated on the second n-type semiconductor layer 142 by exposing a part of the surface of the second n-type semiconductor layer 142, and a second semiconductor A second p-type semiconductor layer 162 provided to be stacked on the light emitting layer 152 is provided. The second n-type semiconductor layer 142 is formed by epitaxial crystal growth of a semiconductor doped with an n-type dopant from the main surface of the first p-type semiconductor layer 161 as a starting point. The second semiconductor light emitting layer 152 is formed by epitaxial crystal growth of a semiconductor starting from the main surface of the second n-type semiconductor layer 142. The second p-type semiconductor layer 162 is formed by epitaxial crystal growth of a semiconductor doped with a p-type dopant starting from the main surface of the second semiconductor light emitting layer 152. Therefore, the second n-type semiconductor layer 142, the second semiconductor light emitting layer 152, and the second p-type semiconductor layer 162 have the same principal crystal plane as the main surface of the u- semiconductor layer 13 as the first p-type semiconductor layer 161. I assume.
　実施形態１に係る多波長発光素子１０は、第２ｐ型半導体層１６２の表面の一部分を除いて、第２ｐ型半導体層１６２の上に積層されるように設けられた第３ｎ型半導体層１４３（第３半導体下地層）、第３ｎ型半導体層１４３の表面の一部分を露出させて、第３ｎ型半導体層１４３の上に積層されるように設けられた第３半導体発光層１５３、及び第３半導体発光層１５３の上に積層されるように設けられた第３ｐ型半導体層１６３を備えている。第３ｎ型半導体層１４３は、第２ｐ型半導体層１６２の主面を起点として、ｎ型ドーパントがドープされた半導体がエピタキシャル結晶成長して形成されたものである。第３半導体発光層１５３は、第３ｎ型半導体層１４３の主面を起点として半導体がエピタキシャル結晶成長して形成されたものである。第３ｐ型半導体層１６３は、第３半導体発光層１５３の主面を起点として、ｐ型ドーパントがドープされた半導体がエピタキシャル結晶成長して形成されたものである。従って、第３ｎ型半導体層１４３、第３半導体発光層１５３、及び第３ｐ型半導体層１６３は、第２ｐ型半導体層１６２、よって、ｕ-半導体層１３の主面と同一の結晶面を主面とする。 The multi-wavelength light emitting device 10 according to the first embodiment includes the third n-type semiconductor layer 143 (provided to be stacked on the second p-type semiconductor layer 162 except a part of the surface of the second p-type semiconductor layer 162). A third semiconductor base layer), a third semiconductor light emitting layer 153 provided on the third n-type semiconductor layer 143 so as to expose a part of the surface of the third n-type semiconductor layer 143, and a third semiconductor A third p-type semiconductor layer 163 provided to be stacked on the light emitting layer 153 is provided. The third n-type semiconductor layer 143 is formed by epitaxial crystal growth of a semiconductor doped with an n-type dopant starting from the main surface of the second p-type semiconductor layer 162. The third semiconductor light emitting layer 153 is formed by epitaxial crystal growth of a semiconductor with the main surface of the third n-type semiconductor layer 143 as a starting point. The third p-type semiconductor layer 163 is formed by epitaxial crystal growth of a semiconductor doped with a p-type dopant from the main surface of the third semiconductor light emitting layer 153 as a starting point. Therefore, the third n-type semiconductor layer 143, the third semiconductor light-emitting layer 153, and the third p-type semiconductor layer 163 have the same main crystal plane as the main surface of the u- semiconductor layer 13 as the second p-type semiconductor layer 162. I assume.
　そして、実施形態１に係る多波長発光素子１０では、第１ｐ型半導体層１６１の露出部分が第１発光領域Ａ１、第２ｐ型半導体層１６２の露出部分が第２発光領域Ａ２、及び第３ｐ型半導体層１６３の積層部分が第３発光領域Ａ３にそれぞれ構成されている。 In the multi-wavelength light emitting device 10 according to the first embodiment, the exposed portion of the first p-type semiconductor layer 161 is the first light emitting region A1, the exposed portion of the second p-type semiconductor layer 162 is the second light emitting region A2, and the third p-type The stacked portion of the semiconductor layer 163 is formed in the third light emitting region A3.
　－第１～第３ｎ型半導体層－
　第１～第３ｎ型半導体層１４１～１４３は、同一の構成元素の半導体で形成されている。第１～第３ｎ型半導体層１４１～１４３を形成する半導体としては、例えば、ＩｎＧａＮ、ＡｌＧａＮ等が挙げられる。 -First to third n-type semiconductor layers-
The first to third n-type semiconductor layers 141 to 143 are formed of a semiconductor of the same constituent element. Examples of the semiconductor for forming the first to third n-type semiconductor layers 141 to 143 include InGaN, AlGaN and the like.
　第１～第３ｎ型半導体層１４１～１４３を形成する半導体は、同一の構成元素を有するが、元素組成比が相互に異なっている。具体例としては、例えば、第１ｎ型半導体層１４１がＩｎ0.05ＧａＮ、第２ｎ型半導体層１４２がＩｎ0.2ＧａＮ、及び第３ｎ型半導体層１４３がＩｎ0.3ＧａＮでそれぞれ形成された構成が挙げられる。 The semiconductors forming the first to third n-type semiconductor layers 141 to 143 have the same constituent elements, but the element composition ratios are different from each other. As a specific example, for example, a configuration in which the first n-type semiconductor layer 141 is formed of In 0.05 GaN, the second n-type semiconductor layer 142 is formed of In 0.2 GaN, and the third n-type semiconductor layer 143 is formed of In 0.3 GaN.
　第１～第３ｎ型半導体層１４１～１４３に含まれるｎ型ドーパントとしては、例えば、Ｓｉ、Ｇｅ等が挙げられる。ｎ型ドーパントの濃度は例えば１．０×１０17～２０×１０17／ｃｍ3である。 Examples of n-type dopants contained in the first to third n-type semiconductor layers 141 to 143 include Si and Ge. The concentration of the n-type dopant is, for example, 1.0 × 10 17 to 20 × 10 17 / cm 3 .
　第１～第３ｎ型半導体層１４１～１４３は、単一層で構成されていてもよく、また、ｎ型ドーパントの種類や濃度の異なる複数の層で構成されていてもよい。第１～第３ｎ型半導体層１４１～１４３の厚さは例えば２～１０μｍである。 The first to third n-type semiconductor layers 141 to 143 may be formed of a single layer, or may be formed of a plurality of layers having different types and concentrations of n-type dopants. The thickness of the first to third n-type semiconductor layers 141 to 143 is, for example, 2 to 10 μm.
　これらの第１～第３ｎ型半導体層１４１～１４３は、後述の第１～第３半導体発光層１５１～１５３の下地層を構成するものであり、例えばＩｎＧａＮ/ＧａＮ超格子構造などのように欠陥の伝搬及び発生を防ぐ構造を有していてもよい。 These first to third n-type semiconductor layers 141 to 143 form an underlayer of first to third semiconductor light emitting layers 151 to 153 described later, and have defects such as InGaN / GaN super lattice structure, for example. May have a structure to prevent the propagation and generation of
　－第１～第３半導体発光層－
　第１～第３半導体発光層１５１～１５３は、相互に同一の構成元素で且つ元素組成比が異なる半導体で形成されていてもよく、また、相互に異なる構成元素の半導体で形成されていてもよい。第１～第３半導体発光層１５１～１５３は、相互に同一の構成元素の半導体で形成され、層厚が異なっていてもよい。これにより、第１～第３半導体発光層１５１～１５３は、発光波長が相互に異なるように構成されている。第１～第３半導体発光層１５１～１５３を形成する半導体としては、例えば、ＩｎＧａＮ、ＡｌＧａＮ等が挙げられる。 -First to third semiconductor light emitting layers-
The first to third semiconductor light emitting layers 151 to 153 may be formed of semiconductors having the same constituent element and different elemental composition ratios, or may be formed of semiconductors having constituent elements different from one another. Good. The first to third semiconductor light emitting layers 151 to 153 may be formed of semiconductors of the same constituent element as each other, and the layer thicknesses may be different. Thus, the first to third semiconductor light emitting layers 151 to 153 are configured to have different light emission wavelengths. Examples of the semiconductor forming the first to third semiconductor light emitting layers 151 to 153 include InGaN, AlGaN and the like.
　第１～第３半導体発光層１５１～１５３が相互に元素組成比が異なるＩｎＧａＮで形成されている場合、第１半導体発光層１５１を形成するＩｎＧａＮよりも第２半導体発光層１５２を形成するＩｎＧａＮの方がＩｎＮ混晶比が高く、また、第２半導体発光層１５２を形成するＩｎＧａＮよりも第３半導体発光層１５３を形成するＩｎＧａＮの方がＩｎＮ混晶比がさらに高いことが好ましい。ここで、ＩｎＧａＮの発光波長は、ＩｎＮ混晶比に依存し、ＩｎＮ混晶比が高いほど発光波長は長波長となる。従って、第１半導体発光層１５１のみを含む第１発光領域Ａ１、第１及び第２半導体発光層１５１，１５２を含む第２発光領域Ａ２、並びに第１～第３半導体発光層１５１～１５３を含む第３発光領域Ａ３は相互に発光波長が異なり、しかも、この順に全体を平均したＩｎＮ混晶比が高くなるので、発光波長もこの順に長くなる。 When the first to third semiconductor light emitting layers 151 to 153 are formed of InGaN having mutually different element compositional ratios, InGaN forming the second semiconductor light emitting layer 152 rather than InGaN forming the first semiconductor light emitting layer 151 It is preferable that the InN mixed crystal ratio is higher, and that the InGaN mixed crystal ratio to form the third semiconductor light emitting layer 153 is higher than the InGaN to form the second semiconductor light emitting layer 152. Here, the emission wavelength of InGaN depends on the InN mixed crystal ratio, and the higher the InN mixed crystal ratio, the longer the light emission wavelength. Therefore, it includes a first light emitting area A1 including only the first semiconductor light emitting layer 151, a second light emitting area A2 including the first and second semiconductor light emitting layers 151 and 152, and first to third semiconductor light emitting layers 151 to 153. The emission wavelengths of the third light emitting regions A3 are different from each other, and the InN mixed crystal ratio obtained by averaging the whole in this order becomes high, so that the emission wavelengths become longer in this order.
　第１～第３半導体発光層１５１～１５３は、　単一層で構成されていてもよく、また、井戸層と障壁層とが交互に積層された多重量子井戸層構造を有していてもよい。第１～第３半導体発光層１５１～１５３の厚さは例えば３～１００ｎｍである。 The first to third semiconductor light emitting layers 151 to 153 may be formed as a single layer, or may have a multiple quantum well layer structure in which well layers and barrier layers are alternately stacked. The thickness of the first to third semiconductor light emitting layers 151 to 153 is, for example, 3 to 100 nm.
　なお、第１～第３発光領域Ａ１～Ａ３は、例えば、Ｒ（赤）、Ｇ（緑）、及びＢ（青）の光を発光するようにそれぞれ構成されていてもよい。これによりワンチップの白色発光素子（白色ＬＥＤ）を構成することができる。 The first to third light emitting regions A1 to A3 may be configured to respectively emit light of, for example, R (red), G (green) and B (blue). Thereby, a white light emitting element (white LED) of one chip can be configured.
　－第１～第３ｐ型半導体層－
　第１～第３ｐ型半導体層１６１～１６３は、相互に同一の構成元素の半導体で形成されていてもよく、また、相互に異なる構成元素の半導体で形成されていてもよい。前者の場合、第１～第３ｐ型半導体層１６１～１６３を形成する半導体は同一の元素組成比を有していてもよい。第１～第３ｐ型半導体層１６１～１６３を形成する半導体としては、例えば、ＩｎＧａＮ、ＡｌＧａＮ等が挙げられる。 -First to third p-type semiconductor layers-
The first to third p-type semiconductor layers 161 to 163 may be formed of semiconductors of the same constituent element, or may be formed of semiconductors of different constituent elements. In the former case, the semiconductors forming the first to third p-type semiconductor layers 161 to 163 may have the same elemental composition ratio. Examples of the semiconductor for forming the first to third p-type semiconductor layers 161 to 163 include InGaN, AlGaN and the like.
　第１～第３ｐ型半導体層１６１～１６３に含まれるｐ型ドーパントとしては、例えば、Ｍｇ、Ｃｄ等が挙げられる。ホール効果測定で測定される自由正孔濃度は例えば２．０×１０17～１０×１０17／ｃｍ3である。 Examples of p-type dopants contained in the first to third p-type semiconductor layers 161 to 163 include Mg and Cd. The free hole concentration measured by Hall effect measurement is, for example, 2.0 × 10 17 to 10 × 10 17 / cm 3 .
　第１～第３ｐ型半導体層１６１～１６３は、単一層で構成されていてもよく、また、ｐ型ドーパントの種類や濃度の異なる複数の層で構成されていてもよい。第１～第３ｐ型半導体層１６１～１６３の厚さは例えば５０～２００ｎｍである。 The first to third p-type semiconductor layers 161 to 163 may be formed of a single layer, or may be formed of a plurality of layers having different types and concentrations of p-type dopants. The thickness of the first to third p-type semiconductor layers 161 to 163 is, for example, 50 to 200 nm.
　＜ｎ型電極及びｐ型電極＞
　実施形態１に係る多波長発光素子１０は、第１～第３ｎ型半導体層１４１～１４３に電気的に接続するようにそれぞれ設けられた第１～第３ｎ型電極１７１～１７３、及び第１～第３ｐ型半導体層１６１～１６３に電気的に接続するようにそれぞれ設けられた第１～第３ｐ型電極１８１～１８３を備えている。 <N-type electrode and p-type electrode>
The multi-wavelength light emitting device 10 according to the first embodiment includes first to third n-type electrodes 171 to 173 and first to third n-type electrodes provided to be electrically connected to the first to third n-type semiconductor layers 141 to 143, respectively. The first to third p-type electrodes 181 to 183 are provided so as to be electrically connected to the third p-type semiconductor layers 161 to 163, respectively.
　第１～第３ｎ型電極１７１～１７３の構成電極材料としては、例えば、Ｔｉ／Ａｌ、Ｔｉ／Ａｌ／Ｍｏ／Ａｕ、Ｈｆ／Ａｕ等の積層構造、或いは合金等が挙げられる。第１～第３ｎ型電極１７１～１７３の厚さは例えばＴｉ／Ａｌ（１０ｎｍ／５００ｎｍ）である。 Examples of constituent electrode materials of the first to third n-type electrodes 171 to 173 include a laminated structure of Ti / Al, Ti / Al / Mo / Au, Hf / Au or the like, an alloy or the like. The thickness of the first to third n-type electrodes 171 to 173 is, for example, Ti / Al (10 nm / 500 nm).
　第１～第３ｐ型電極１８１～１８３としては、例えば、Ｐｄ／Ｐｔ／Ａｕ、Ｎｉ／Ａｕ、Ｐｄ／Ｍｏ／Ａｕ等の積層構造、或いは合金等、又はＩＴＯ（酸化インジウム錫）などの酸化物系透明導電材料が挙げられる。なお、第１～第３ｐ型電極１８１～１８３の上にはワイヤーボンディング用のパッド電極が必要であり、多くの場合は第１～第３ｎ型電極１７１～１７３と同じ材料系が用いられる。第１～第３ｐ型電極１８１～１８３の厚さは例えばＩＴＯの場合１０～２００ｎｍである。 As the first to third p-type electrodes 181 to 183, for example, a laminated structure of Pd / Pt / Au, Ni / Au, Pd / Mo / Au or the like, an alloy or the like, or an oxide such as ITO (indium tin oxide) And transparent conductive materials. Note that pad electrodes for wire bonding are required on the first to third p-type electrodes 181 to 183, and in many cases, the same material system as the first to third n-type electrodes 171 to 173 is used. The thickness of the first to third p-type electrodes 181 to 183 is, for example, 10 to 200 nm in the case of ITO.
　（多波長発光素子の製造方法）
　実施形態１に係る多波長発光素子１０の製造方法について図２～７に基づいて説明する。なお、以下の実施形態１に係る多波長発光素子１０の製造方法では、ウエハ１１’（基板１１）上に形成した凹溝１１ａの側面から結晶成長させたｕ-半導体層１３としてのｕ-ＩｎＧａＮ層、第１ｎ型半導体層１４１としてのＳｉをドープした第１ｎ型ＩｎＧａＮ層、第１半導体発光層１５１としての第１ＩｎＧａＮ層、及び第１ｐ型半導体層１６１としてのＭｇをドープした第１ｐ型ＩｎＧａＮ層の各半導体層を順に形成し、次いで、第２ｎ型半導体層１４２としてのＳｉをドープした第２ｎ型ＩｎＧａＮ層、第２半導体発光層１５２としての第２ＩｎＧａＮ層、及び第２ｐ型半導体層１６２としてのＭｇをドープした第２ｐ型ＩｎＧａＮ層の各半導体層を順に形成し、続いて、第３ｎ型半導体層１４３としてのＳｉをドープした第３ｎ型ＩｎＧａＮ層、第３半導体発光層１５３としての第３ＩｎＧａＮ層、及び第３ｐ型半導体層１６３としてのＭｇをドープした第３ｐ型ＩｎＧａＮ層の各半導体層を順に形成し、そして、第１～第３ｎ型半導体層１４１～１４３並びに第１及び第２ｐ型半導体層１６１，１６２のそれぞれが露出するようにエッチングを行った後、第１～第３ｎ型半導体層１４１～１４３及び第１～第３ｐ型半導体層１６１～１６３の上に、それぞれ第１～第３ｎ型電極１７１～１７３及び第１～第３ｐ型電極１８１～１８３を形成するものを例とする。 (Manufacturing method of multi-wavelength light emitting device)
A method of manufacturing the multi-wavelength light emitting device 10 according to the first embodiment will be described based on FIGS. In the method of manufacturing the multi-wavelength light emitting device 10 according to the first embodiment, u-InGaN as the u-semiconductor layer 13 crystal-grown from the side surface of the recessed groove 11 a formed on the wafer 11 ′ (substrate 11) Layer, a first n-type InGaN layer doped with Si as the first n-type semiconductor layer 141, a first InGaN layer as the first semiconductor light emitting layer 151, and a first p-type InGaN layer doped with Mg as the first p-type semiconductor layer 161 The second n-type InGaN layer doped with Si as the second n-type semiconductor layer 142, the second InGaN layer as the second semiconductor light emitting layer 152, and the second p-type semiconductor layer 162. The semiconductor layers of the second p-type InGaN layer doped with Mg are sequentially formed, and then, the third n-type I doped with Si as the third n-type semiconductor layer 143 is formed. The semiconductor layers of the GaN layer, the third InGaN layer as the third semiconductor light emitting layer 153, and the Mg-doped third p-type InGaN layer as the third p-type semiconductor layer 163 are sequentially formed, and the first to third n-type After etching is performed to expose the semiconductor layers 141 to 143 and the first and second p-type semiconductor layers 161 and 162, first to third n-type semiconductor layers 141 to 143 and first to third p-type semiconductor layers are formed. An example in which first to third n-type electrodes 171 to 173 and first to third p-type electrodes 181 to 183 are formed on 161 to 163 is taken as an example.
　＜ウエハ（基板）準備工程＞
　ウエハ１１’の各多波長発光素子１０の形成領域において、図２（ａ）に示すように、凹溝形成予定部分だけが開口部となるようにフォトレジスト２０のパターニングを形成し、図２（ｂ）に示すように、フォトレジスト２０をエッチングレジストとしてエッチングすることにより、ウエハ１１’の表面に凹溝１１ａを形成した後、フォトレジスト２０を除去する。 <Wafer (substrate) preparation process>
In the formation region of each multi-wavelength light emitting element 10 of the wafer 11 ′, as shown in FIG. 2A, patterning of the photoresist 20 is formed such that only the groove formation planned portion becomes an opening. As shown in b), after the recessed groove 11a is formed on the surface of the wafer 11 'by etching the photoresist 20 as an etching resist, the photoresist 20 is removed.
　このとき、ウエハ１１’の各多波長発光素子１０の形成領域には、表面に結晶成長面１２を構成する凹溝１１ａの側面が露出する。 At this time, in the formation region of each multi-wavelength light emitting element 10 of the wafer 11 ′, the side surface of the recessed groove 11 a constituting the crystal growth surface 12 is exposed on the surface.
　＜半導体層形成工程＞
　以下の各半導体層の形成方法としては、有機金属気相成長法（Metal Organic Ｖapor Phase Epitaxy：ＭＯＶＰＥ）、分子線エピタキシ法（Molecular Beam Epitaxy：ＭＢＥ）、ハイドライド気相成長法（Hydride Vapor Phase Epitaxy：ＨＶＰＥ）等が挙げられ、これらのうち有機金属気相成長法が最も一般的である。以下では、有機金属気相成長法を利用した各半導体層の形成方法について説明する。 <Semiconductor layer formation process>
As a method of forming each of the following semiconductor layers, metal organic vapor phase epitaxy (MOVPE), molecular beam epitaxy (MBE), hydride vapor phase epitaxy (Hydride Vapor Phase Epitaxy: And the like. Among these, metal organic vapor phase epitaxy is the most common. Below, the formation method of each semiconductor layer using the metal organic chemical vapor deposition method is demonstrated.
　各半導体層の形成に用いるＭＯＶＰＥ装置は、各々、電子制御される、ウエハ搬送系、ウエハ加熱系、ガス供給系、及びガス排気系で構成されている。ウエハ加熱系は、熱電対及び抵抗加熱ヒータ、その上に設けられた炭素製或いはＳｉＣ製のサセプタで構成されている。そして、ＭＯＶＰＥ装置は、ウエハ加熱系において、搬送される石英トレイのサセプタの上にセットされたウエハ１１’上に反応ガスにより半導体層を結晶成長させるように構成されている。 The MOVPE apparatus used to form each semiconductor layer is composed of a wafer transfer system, a wafer heating system, a gas supply system, and a gas exhaust system, each of which is electronically controlled. The wafer heating system is composed of a thermocouple and a resistance heater, and a susceptor made of carbon or SiC provided thereon. Then, in the wafer heating system, the MOVPE apparatus is configured to crystal-grow a semiconductor layer by the reaction gas on the wafer 11 ′ set on the susceptor of the quartz tray to be transported.
　－ｕ-半導体層形成工程－
　上記ＭＯＶＰＥ装置を用い、表面に凹溝１１ａを形成加工したウエハ１１’を、表面が上向きになるように石英トレイ上にセットした後、ウエハ１１’を１０５０～１１５０℃に加熱すると共に反応容器内の圧力を１０ｋ～１００ｋＰａとし、また、反応容器内に設置したフローチャネル内にキャリアガスとしてＨ2を流通させ、その状態を数分間保持することによりウエハ１１’をサーマルクリーニングする。 -U-Semiconductor layer formation process-
A wafer 11 'having a groove 11a formed and processed on the surface thereof is set on a quartz tray so that the surface is upward using the above-mentioned MOVPE apparatus, and then the wafer 11' is heated to 1050 to 1150 ° C. The pressure of 10 k to 100 kPa, H 2 as a carrier gas is circulated in the flow channel provided in the reaction vessel, and the state is maintained for several minutes to thermally clean the wafer 11 ′.
　次いで、ウエハ１１’の温度を９００～１１５０℃とすると共に反応容器内の圧力を１０ｋ～１００ｋＰａとし、また、反応容器内にキャリアガスＨ2を１０Ｌ／ｍｉｎ程度の流量で流通させながら、そこに反応ガスとして、Ｖ族元素供給源（ＮＨ3）、III族元素供給源１（ＴＭＧ）、及びIII族元素供給源２（ＴＭＩ）を、それぞれの供給流量が０．１～５Ｌ／ｍｉｎ、５～１５μｍｏｌ／ｍｉｎ、及び２～３０μｍｏｌ／ｍｉｎとなるように流す。 Next, the temperature of the wafer 11 'is set to 900 to 1150 ° C., the pressure in the reaction vessel is set to 10 k to 100 kPa, and the carrier gas H 2 is circulated in the reaction vessel at a flow rate of about 10 L / min. As reaction gases, group V element source (NH 3 ), group III element source 1 (TMG), and group III element source 2 (TMI), the respective supply flow rates are 0.1 to 5 L / min, 5 It is flowed so as to be ̃15 μmol / min and 2 ̃30 μmol / min.
　このとき、図３に示すように、結晶成長条件の選択により、結晶成長面１２である凹溝１１ａの側面を起点として、アンドープのＩｎＧａＮが基板１１の上に積層されるように結晶成長してｕ-半導体層１３が形成される。 At this time, as shown in FIG. 3, crystal growth is performed so that undoped InGaN is stacked on the substrate 11 starting from the side surface of the recessed groove 11 a which is the crystal growth surface 12 by selection of crystal growth conditions. The u-semiconductor layer 13 is formed.
　なお、ｕ-半導体層１３を形成する前に低温バッファ層を形成する場合には、ウエハ１１’の温度を４００～５００℃としてＧａＮを結晶成長させればよい。 In the case where the low temperature buffer layer is formed before forming the u − semiconductor layer 13, the temperature of the wafer 11 ′ may be 400 to 500 ° C., and the GaN may be crystal-grown.
　－第１ｎ型半導体層形成工程－
　反応容器内の圧力を１０ｋ～１００ｋＰａとし、また、反応容器内にキャリアガスＨ2を所定流量で流通させながら、そこに反応ガスとして、Ｖ族元素供給源（ＮＨ3）、III族元素供給源１（ＴＭＧ）、及びIII族元素供給源２（ＴＭＩ）、並びにｎ型ドーピング元素供給源（ＳｉＨ4）を、それぞれ適量の供給流量で流す。 -Step of forming first n-type semiconductor layer-
The pressure in the reaction vessel is set to 10 k to 100 kPa, and carrier gas H 2 is circulated at a predetermined flow rate in the reaction vessel, and there is a group V element source (NH 3 ), a group III element source as a reaction gas. 1 (TMG) and III group element source 2 (TMI) and n-type doping element source (SiH 4 ) are flowed at appropriate supply flow rates respectively.
　このとき、図４（ａ）に示すように、結晶成長条件の選択により、ｕ-半導体層１３の主面を起点として、ｎ型ドーパントであるＳｉがドープされたＩｎＧａＮがｕ-半導体層１３の上に積層されるようにエピタキシャル結晶成長して第１ｎ型半導体層１４１が形成される。 At this time, as shown in FIG. 4A, InGaN doped with Si, which is an n-type dopant, is selected from the u-semiconductor layer 13 starting from the main surface of the u-semiconductor layer 13 by selection of crystal growth conditions. The first n-type semiconductor layer 141 is formed by epitaxial crystal growth so as to be stacked thereon.
　－第１半導体発光層形成工程－
　ウエハ１１’の温度を８００℃程度とすると共に反応容器内の圧力を１０ｋ～１００ｋＰａとし、また、反応容器内にキャリアガスＮ2を５～１５Ｌ／ｍｉｎの流量で流通させながら、そこに反応ガスとして、Ｖ族元素供給源（ＮＨ3 ）、III族元素供給源１（ＴＭＧ）、及びIII族元素供給源２（ＴＭＩ）を、それぞれの供給流量が０．１～５Ｌ／ｍｉｎ、５～１５μｍｏｌ／ｍｉｎ、及び２～３０μｍｏｌ／ｍｉｎとなるように流す。 -First semiconductor light emitting layer formation process-
The temperature of the wafer 11 'is set to about 800 ° C., the pressure in the reaction vessel is set to 10 k to 100 kPa, and the carrier gas N 2 is circulated in the reaction vessel at a flow rate of 5 to 15 L / min. As the group V element source (NH 3 ), group III element source 1 (TMG), and group III element source 2 (TMI), the respective supply flow rates are 0.1 to 5 L / min, 5 to 15 μmol. It flows so as to be / min and 2 to 30 μmol / min.
　このとき、図４（ｂ）に示すように、結晶成長条件の選択により、第１ｎ型半導体層１４１の主面を起点として、ＩｎＧａＮが第１ｎ型半導体層１４１の上に積層されるようにエピタキシャル結晶成長して第１半導体発光層１５１が形成される。 At this time, as shown in FIG. 4B, epitaxial growth is performed such that InGaN is stacked on the first n-type semiconductor layer 141 starting from the main surface of the first n-type semiconductor layer 141 by selection of crystal growth conditions. The first semiconductor light emitting layer 151 is formed by crystal growth.
　－第１ｐ型半導体層の形成工程－
　ウエハ１１’の温度を１０００～１１００℃とすると共に反応容器内の圧力を１０ｋ～１００ｋＰａとし、また、反応容器内にキャリアガスのＨ2を所定流量で流通させながら、そこに反応ガスとして、Ｖ族元素供給源（ＮＨ3）、III族元素供給源１（ＴＭＧ）、及びIII族元素供給源２（ＴＭＩ）、並びにｐ型ドーピング元素供給源（Ｃｐ2Ｍｇ）を、それぞれ適量の供給流量で流す。 -Process of forming the first p-type semiconductor layer-
The temperature of the wafer 11 ′ is set to 1000 to 1100 ° C., the pressure in the reaction vessel is set to 10 k to 100 kPa, and while H 2 of the carrier gas is circulated at a predetermined flow rate in the reaction vessel Group element source (NH 3 ), group III element source 1 (TMG), and group III element source 2 (TMI), and p-type doping element source (Cp 2 Mg), respectively at appropriate supply flow rates Flow.
　このとき、図４（ｃ）に示すように、結晶成長条件の選択により、第１半導体発光層１５１の主面を起点として、ｐ型ドーパントであるＭｇがドープされたＩｎＧａＮが第１半導体発光層１５１の上に積層されるように結晶成長して第１ｐ型半導体層１６１が形成される。 At this time, as shown in FIG. 4C, InGaN doped with Mg, which is a p-type dopant, is selected from the main surface of the first semiconductor light emitting layer 151 as the first semiconductor light emitting layer by selection of crystal growth conditions. The first p-type semiconductor layer 161 is formed by crystal growth so as to be stacked on the semiconductor layer 151.
　－第２ｎ型半導体層形成工程－
　反応ガスの供給流量を変更することを除いて第１ｎ型半導体層形成工程と同様の操作を行う。 -Second n-type semiconductor layer formation process-
The same operation as the first n-type semiconductor layer forming process is performed except that the supply flow rate of the reaction gas is changed.
　このとき、図５（ａ）に示すように、結晶成長条件の選択により、第１ｐ型半導体層１６１の主面を起点として、第１ｎ型半導体層１４１と同一の構成元素で且つ元素組成比が異なるＩｎＧａＮが第１ｐ型半導体層１６１の上に積層されるようにエピタキシャル結晶成長して第２ｎ型半導体層１４２が形成される。なお、ＩｎＮ混晶比は、ＴＭＩのモル流量／（ＴＭＧのモル流量＋ＴＭＩのモル流量）と成長温度によって決定されることから、第１ｎ型半導体層１４１よりもＩｎＮ混晶比を高めるためには、第１ｎ型半導体層形成工程よりもIII族元素供給源２（ＴＭＩ）の供給流量を増やすことが好ましい。 At this time, as shown in FIG. 5A, by selection of the crystal growth conditions, with the main surface of the first p-type semiconductor layer 161 as a starting point, the element composition ratio is the same as that of the first n-type semiconductor layer 141. The second n-type semiconductor layer 142 is formed by epitaxial crystal growth so that different InGaN layers are stacked on the first p-type semiconductor layer 161. Since the InN mixed crystal ratio is determined by the molar flow rate of TMI / (molar flow rate of TMG + molar flow rate of TMI) and the growth temperature, the InN mixed crystal ratio is higher than that of the first n-type semiconductor layer 141. It is preferable to increase the supply flow rate of the group III element supply source 2 (TMI) more than the first n-type semiconductor layer forming step.
　－第２半導体発光層形成工程－
　第１半導体発光層形成工程と同様の操作を行う。 -Second semiconductor light emitting layer formation process-
The same operation as the first semiconductor light emitting layer forming process is performed.
　このとき、図５（ｂ）に示すように、結晶成長条件の選択により、第２ｎ型半導体層１４２の主面を起点として、第１半導体発光層１５１とは元素組成比が異なる半導体で形成された、及び／又は、第１半導体発光層１５１とは層厚が異なるＩｎＧａＮが第１ｎ型半導体層１４１の上に積層されるようにエピタキシャル結晶成長して第２半導体発光層１５２が形成される。 At this time, as shown in FIG. 5B, the semiconductor growth layer 151 is formed of a semiconductor whose element composition ratio is different from that of the first semiconductor light emitting layer 151 starting from the main surface of the second n-type semiconductor layer 142. The second semiconductor light emitting layer 152 is formed by epitaxial crystal growth such that InGaN having a layer thickness different from that of the first semiconductor light emitting layer 151 is stacked on the first n-type semiconductor layer 141.
　－第２ｐ型半導体層の形成工程－
　第１ｐ型半導体層形成工程と同様の操作を行う。 -Step of forming second p-type semiconductor layer-
The same operation as the first p-type semiconductor layer formation step is performed.
　このとき、図５（ｃ）に示すように、結晶成長条件の選択により、第２半導体発光層１５２の主面を起点として、ｐ型ドーパントであるＭｇがドープされたＩｎＧａＮが第２半導体発光層１５２の上に積層されるようにエピタキシャル結晶成長して第２ｐ型半導体層１６２が形成される。 At this time, as shown in FIG. 5C, InGaN doped with Mg as a p-type dopant is selected as a second semiconductor light emitting layer starting from the main surface of the second semiconductor light emitting layer 152 by selection of crystal growth conditions. The second p-type semiconductor layer 162 is formed by epitaxial crystal growth so as to be stacked on the semiconductor layer 152.
　－第３ｎ型半導体層形成工程－
　反応ガスの供給流量を変更することを除いて第１及び第２ｎ型半導体層形成工程と同様の操作を行う。 -Third n-type semiconductor layer formation process-
The same operation as the first and second n-type semiconductor layer forming steps is performed except for changing the supply flow rate of the reaction gas.
　このとき、図６（ａ）に示すように、結晶成長条件の選択により、第２ｐ型半導体層１６２の主面を起点として、第１及び第２ｎ型半導体層１４１，１４２と同一の構成元素で且つ元素組成比が異なるＩｎＧａＮが第２ｐ型半導体層１６２の上に積層されるようにエピタキシャル結晶成長して第３ｎ型半導体層１４３が形成される。なお、ＩｎＮ混晶比は、ＴＭＩのモル流量／（ＴＭＧのモル流量＋ＴＭＩのモル流量）と成長温度によって決定されることから、第１及び第２ｎ型半導体層１４１，１４２よりもＩｎＮ混晶比を高めるためには、第１及び第２ｎ型半導体層形成工程よりもIII族元素供給源２（ＴＭＩ）の供給流量を増やすことが好ましい。 At this time, as shown in FIG. 6A, with the selection of the crystal growth conditions, with the main surface of the second p-type semiconductor layer 162 as a starting point, the same constituent elements as the first and second n-type semiconductor layers 141 and 142 are used. In addition, epitaxial crystal growth is performed so that InGaN having different element composition ratios is stacked on the second p-type semiconductor layer 162, and the third n-type semiconductor layer 143 is formed. Since the InN mixed crystal ratio is determined by the molar flow rate of TMI / (molar flow rate of TMG + molar flow rate of TMI) and the growth temperature, the InN mixed crystal ratio is higher than that of the first and second n-type semiconductor layers 141 and 142. It is preferable to increase the supply flow rate of the group III element source 2 (TMI) rather than the first and second n-type semiconductor layer forming steps.
　－第３半導体発光層形成工程－
　第１及び第２半導体発光層形成工程と同様の操作を行う。 -Third semiconductor light emitting layer formation process-
The same operation as the first and second semiconductor light emitting layer forming steps is performed.
　このとき、図６（ｂ）に示すように、結晶成長条件の選択により、第３ｎ型半導体層１４３の主面を起点として、第１及び第２半導体発光層１５１，１５２とは元素組成比が異なる半導体で形成された、及び／又は、第１及び第２半導体発光層１５１，１５２とは層厚が異なるＩｎＧａＮが第３ｎ型半導体層１４３の上に積層されるようにエピタキシャル結晶成長して第３半導体発光層１５３が形成される。 At this time, as shown in FIG. 6 (b), the element composition ratio of the first and second semiconductor light emitting layers 151 and 152 is set from the main surface of the third n-type semiconductor layer 143 as a starting point by selection of crystal growth conditions. The epitaxial crystal growth is performed so that InGaN, which is formed of different semiconductors and / or has a layer thickness different from that of the first and second semiconductor light emitting layers 151 and 152, is stacked on the third n-type semiconductor layer 143. A semiconductor light emitting layer 153 is formed.
　－第３ｐ型半導体層の形成工程－
　第１及び第２ｐ型半導体層形成工程と同様の操作を行う。 -Step of forming third p-type semiconductor layer-
The same operation as the first and second p-type semiconductor layer forming steps is performed.
　このとき、図６（ｃ）に示すように、結晶成長条件の選択により、第３半導体発光層１５３の主面を起点として、ｐ型ドーパントであるＭｇがドープされたＩｎＧａＮが第３半導体発光層１５３の上に積層されるようにエピタキシャル結晶成長して第３ｐ型半導体層１６３が形成される。 At this time, as shown in FIG. 6C, InGaN doped with Mg, which is a p-type dopant, is selected as the third semiconductor light emitting layer, with the main surface of the third semiconductor light emitting layer 153 as a starting point. The third p-type semiconductor layer 163 is formed by epitaxial crystal growth so as to be stacked on the 153.
　＜電極形成及び劈開工程＞
　図７に示すように、第１～第３ｎ型半導体層１４１～１４３並びに第１及び第２ｐ型半導体層１６１，１６２のそれぞれが露出するように反応性イオンエッチングし、露出した第１～第３ｎ型半導体層１４１～１４３並びに第１～第３ｐ型半導体層１６１～１６３の上に、真空蒸着、スパッタリング、ＣＶＤ（Chemical Vapor Deposition）等の方法により、それぞれ第１～第３ｎ型電極１７１～１７３及び第１～第３ｐ型電極１８１～１８３を形成する。なお、第１ｎ型半導体層１４１、第１半導体発光層１５１、及び第１ｐ型半導体層１６１からなり第１ｐ型半導体層１６１が露出した部分が第１発光領域Ａ１、第１及び第２ｎ型半導体層１４１，１４２、第１及び第２半導体発光層１５１，１５２、並びに第１及び第２ｐ型半導体層１６１，１６２からなり第２ｐ型半導体層１６２が露出した部分が第２発光領域Ａ２、また、第１～第３ｎ型半導体層１４１～１４３、第１～第３半導体発光層１５１～１５３、並びに第１～第３ｐ型半導体層１６１～１６３からなり第３ｐ型半導体層１６３が露出した部分が第３発光領域Ａ３にそれぞれ構成される。 <Electrode formation and cleavage process>
As shown in FIG. 7, reactive ion etching is performed so that the first to third n-type semiconductor layers 141 to 143 and the first and second p-type semiconductor layers 161 and 162 are exposed, and the exposed first to third n The first to third n-type electrodes 171 to 173 and the first to third p-type semiconductor layers 161 to 163 and the first to third p-type semiconductor layers 161 to 163 are formed by vacuum evaporation, sputtering, chemical vapor deposition (CVD) or the like. First to third p-type electrodes 181 to 183 are formed. A portion consisting of the first n-type semiconductor layer 141, the first semiconductor light-emitting layer 151, and the first p-type semiconductor layer 161 and exposed to the first p-type semiconductor layer 161 is a first light emitting region A1, the first and second n-type semiconductor layers. A portion including the first and second semiconductor light emitting layers 151 and 142, and the first and second p type semiconductor layers 161 and 162 and exposed to the second p type semiconductor layer 162 is a second light emitting region A2, and a second light emitting region A2. The portion where the third p-type semiconductor layer 163 is exposed and which includes the first to third n-type semiconductor layers 141 to 143, the first to third semiconductor light emitting layers 151 to 153, and the first to third p-type semiconductor layers 161 to 163 is the third Each is configured in the light emitting area A3.
　そして、ウエハ１１’を劈開することにより個々に分断し、実施形態１に係る多波長発光素子１０が製造される。 Then, the wafer 11 ′ is cleaved to be divided individually, and the multi-wavelength light emitting device 10 according to the first embodiment is manufactured.
　［実施形態２］
　（多波長発光素子）
　図８は、実施形態２に係る多波長発光素子１０を示す。なお、実施形態１と同一名称の部分は実施形態１と同一符号で示す。 Second Embodiment
(Multi-wavelength light emitting device)
FIG. 8 shows the multi-wavelength light emitting device 10 according to the second embodiment. In addition, the part of the same name as Embodiment 1 is shown with the same code as Embodiment 1.
　実施形態２に係る多波長発光素子１０は、ｕ-半導体層１３の上に積層されるように設けられた第１ｎ型半導体層１４１（第１半導体下地層）、第１ｎ型半導体層１４１の表面の一部分を露出させて、第１ｎ型半導体層１４１の上に積層されるように設けられた第１半導体発光層１５１、第１半導体発光層１５１の表面の一部分を除いて、第１半導体発光層１５１の上に積層されるように設けられた第２ｎ型半導体層１４２（第２半導体下地層）、第２ｎ型半導体層１４２の表面の一部分を露出させて、第２ｎ型半導体層１４２の上に積層されるように設けられた第２半導体発光層１５２、第２半導体発光層１５２の表面の一部分を除いて、第２半導体発光層１５２の上に積層されるように設けられた第３ｎ型半導体層１４３（第３半導体下地層）、及び第３ｎ型半導体層１４３の表面の一部分を露出させて、第３ｎ型半導体層１４３の上に積層されるように設けられた第３半導体発光層１５３を備えている。第１ｎ型半導体層１４１は、ｕ-半導体層１３の主面を起点として、ｎ型ドーパントがドープされた半導体がエピタキシャル結晶成長して形成されたものである。第１半導体発光層１５１は、第１ｎ型半導体層１４１の主面を起点として半導体がエピタキシャル結晶成長して形成されたものである。第２ｎ型半導体層１４２は、第１半導体発光層１５１の主面を起点として、ｎ型ドーパントがドープされた半導体がエピタキシャル結晶成長して形成されたものである。第２半導体発光層１５２は、第２ｎ型半導体層１４２の主面を起点として半導体がエピタキシャル結晶成長して形成されたものである。第３ｎ型半導体層１４３は、第２半導体発光層１５２の主面を起点として、ｎ型ドーパントがドープされた半導体がエピタキシャル結晶成長して形成されたものである。第３半導体発光層１５３は、第３ｎ型半導体層１４３の主面を起点として半導体がエピタキシャル結晶成長して形成されたものである。第１～第３ｎ型半導体層１４１～１４３を形成する半導体は、同一の構成元素を有するが、元素組成比が相互に異なっている。なお、第１～第３ｎ型半導体層１４１～１４３は、第１～第３半導体発光層１５１～１５３の下地層を構成するものであり、例えばＩｎＧａＮ/ＧａＮ超格子構造などのように欠陥の伝搬及び発生を防ぐ構造を有していてもよい。 The multi-wavelength light emitting device 10 according to the second embodiment includes the surfaces of a first n-type semiconductor layer 141 (first semiconductor base layer) and a first n-type semiconductor layer 141 provided to be stacked on the u− semiconductor layer 13. A first semiconductor light emitting layer 151 provided to be laminated on the first n-type semiconductor layer 141 by exposing a part of the first semiconductor light emitting layer 151 except for a portion of the surface of the first semiconductor light emitting layer 151 A portion of the surface of the second n-type semiconductor layer 142 (second semiconductor base layer) provided to be stacked on the semiconductor layer 151 and the second n-type semiconductor layer 142 exposed on the second n-type semiconductor layer 142; A second semiconductor light emitting layer 152 provided to be stacked, a third n-type semiconductor provided to be stacked on the second semiconductor light emitting layer 152 except for a part of the surface of the second semiconductor light emitting layer 152 Layer 143 (below the third semiconductor) And the third semiconductor light emitting layer 153 provided to be laminated on the third n-type semiconductor layer 143 by exposing a part of the surface of the ground layer and the third n-type semiconductor layer 143. The first n-type semiconductor layer 141 is formed by epitaxial crystal growth of a semiconductor doped with an n-type dopant starting from the main surface of the u− semiconductor layer 13. The first semiconductor light emitting layer 151 is formed by epitaxial crystal growth of a semiconductor starting from the main surface of the first n-type semiconductor layer 141. The second n-type semiconductor layer 142 is formed by epitaxial crystal growth of a semiconductor doped with an n-type dopant from the main surface of the first semiconductor light emitting layer 151 as a starting point. The second semiconductor light emitting layer 152 is formed by epitaxial crystal growth of a semiconductor starting from the main surface of the second n-type semiconductor layer 142. The third n-type semiconductor layer 143 is formed by epitaxial crystal growth of a semiconductor doped with an n-type dopant starting from the main surface of the second semiconductor light emitting layer 152. The third semiconductor light emitting layer 153 is formed by epitaxial crystal growth of a semiconductor with the main surface of the third n-type semiconductor layer 143 as a starting point. The semiconductors forming the first to third n-type semiconductor layers 141 to 143 have the same constituent elements, but the element composition ratios are different from each other. The first to third n-type semiconductor layers 141 to 143 form an underlayer of the first to third semiconductor light emitting layers 151 to 153, and propagation of defects such as InGaN / GaN super lattice structure, for example. And you may have a structure which prevents generation | occurrence | production.
　実施形態２に係る多波長発光素子１０は、第１半導体発光層１５１の第２ｎ型半導体層１４２が積層されていない部分、第２半導体発光層１５２の第３ｎ型半導体層１４３が積層されていない部分、及び第３半導体発光層１５３の上に積層されるように設けられた第１～第３ｐ型半導体層１６１～１６３を備えている。第１～第３ｐ型半導体層１６１～１６３は、それぞれ第１～第３半導体発光層１５１～１５３の主面を起点として半導体がエピタキシャル結晶成長して形成されたものである。 In the multi-wavelength light emitting device 10 according to the second embodiment, the portion of the first semiconductor light emitting layer 151 where the second n type semiconductor layer 142 is not stacked and the third n type semiconductor layer 143 of the second semiconductor light emitting layer 152 are not stacked. The first to third p-type semiconductor layers 161 to 163 are provided so as to be stacked on the portion and the third semiconductor light emitting layer 153. The first to third p-type semiconductor layers 161 to 163 are formed by epitaxial crystal growth of a semiconductor from the main surfaces of the first to third semiconductor light emitting layers 151 to 153, respectively.
　実施形態２に係る多波長発光素子１０は、第１～第３ｎ型半導体層１４１～１４３に電気的に接続するようにそれぞれ設けられた第１～第３ｎ型電極１７１～１７３、及び第１～第３ｐ型半導体層１６１～１６３に電気的に接続するようにそれぞれ設けられた第１～第３ｐ型電極１８１～１８３を備えている。 The multi-wavelength light emitting device 10 according to the second embodiment includes first to third n-type electrodes 171 to 173 and first to third n-type electrodes provided to be electrically connected to the first to third n-type semiconductor layers 141 to 143, respectively. The first to third p-type electrodes 181 to 183 are provided so as to be electrically connected to the third p-type semiconductor layers 161 to 163, respectively.
　実施形態２に係る多波長発光素子１０では、第１ｐ型電極１８１が設けられた第１ｐ型半導体層１６１の露出部分が第１発光領域Ａ１、第２ｐ型電極１８２が設けられた第２ｐ型半導体層１６２の露出部分が第２発光領域Ａ２、及び第３ｐ型電極１８３が設けられた第３ｐ型半導体層１６３の積層部分が第３発光領域Ａ３にそれぞれ構成されている。 In the multi-wavelength light emitting device 10 according to the second embodiment, the exposed portion of the first p-type semiconductor layer 161 provided with the first p-type electrode 181 is the first light emitting region A1 and the second p-type semiconductor provided with the second p-type electrode 182. The exposed portion of the layer 162 is configured as the second light emitting region A2, and the stacked portion of the third p type semiconductor layer 163 provided with the third p type electrode 183 is configured as the third light emitting region A3.
　各層の詳細構成及びその他の構成は実施形態１と同一である。 The detailed configuration of each layer and the other configuration are the same as in the first embodiment.
　（多波長発光素子の製造方法）
　実施形態２に係る多波長発光素子１０の製造方法では、図９（ａ）に示すように、ウエハ１１’（基板１１）上に形成した凹溝１１ａの側面から結晶成長させたｕ-半導体層１３としてのｕ-ＩｎＧａＮ層、第１ｎ型半導体層１４１としてのＳｉをドープした第１ｎ型ＩｎＧａＮ層、第１半導体発光層１５１としての第１ＩｎＧａＮ層、第２ｎ型半導体層１４２としてのＳｉをドープした第２ｎ型ＩｎＧａＮ層、第２半導体発光層１５２としての第２ＩｎＧａＮ層、第３ｎ型半導体層１４３としてのＳｉをドープした第３ｎ型ＩｎＧａＮ層、及び第３半導体発光層１５３としての第３ＩｎＧａＮ層を順に形成し、次いで、図９（ｂ）に示すように、第１～第３ｎ型半導体層１４１～１４３並びに第１及び第２半導体発光層１５１，１５２のそれぞれが露出するようにエッチングを行った後、図９（ｃ）に示すように、第１～第３半導体発光層１５１～１５３の露出部分にそれぞれ第１～第３ｐ型ＩｎＧａＮ層を同時に形成し、さらに、第１～第３ｎ型半導体層１４１～１４３の露出部分及び第１～第３ｐ型半導体層１６１～１６３の上に、それぞれ第１～第３ｎ型電極１７１～１７３及び第１～第３ｐ型電極１８１～１８３を形成する。 (Manufacturing method of multi-wavelength light emitting device)
In the method of manufacturing the multi-wavelength light emitting device 10 according to the second embodiment, as shown in FIG. 9A, the u-semiconductor layer is grown from the side surface of the recessed groove 11a formed on the wafer 11 '(substrate 11). 13, a u-InGaN layer as a first n-type semiconductor layer 141, a first n-type InGaN layer doped with Si as a first n-type semiconductor layer 141, a first InGaN layer as a first semiconductor light emitting layer 151, and Si as a second n-type semiconductor layer 142 Second n-type InGaN layer, second InGaN layer as second semiconductor light-emitting layer 152, third n-type InGaN layer doped with Si as third n-type semiconductor layer 143, and third InGaN layer as third semiconductor light-emitting layer 153 in this order Then, as shown in FIG. 9B, the first to third n-type semiconductor layers 141 to 143 and the first and second semiconductor light emitting layers 151 and 152 are formed. The first to third p-type InGaN layers are simultaneously formed on the exposed portions of the first to third semiconductor light emitting layers 151 to 153, respectively, as shown in FIG. 9C. Furthermore, first to third n-type electrodes 171 to 173 and first to third p-type electrodes are respectively formed on the exposed portions of the first to third n-type semiconductor layers 141 to 143 and the first to third p-type semiconductor layers 161 to 163. Electrodes 181 to 183 are formed.
　各工程の詳細は実施形態１と同一である。 The details of each step are the same as in the first embodiment.
　［実施形態３］
　（多波長発光素子）
　図１０は、実施形態３に係る多波長発光素子１０を示す。なお、実施形態１と同一名称の部分は実施形態１と同一符号で示す。 Third Embodiment
(Multi-wavelength light emitting device)
FIG. 10 shows the multi-wavelength light emitting device 10 according to the third embodiment. In addition, the part of the same name as Embodiment 1 is shown with the same code as Embodiment 1.
　実施形態３に係る多波長発光素子１０は、ｕ-半導体層１３の上に積層されるように設けられた第１ｎ型半導体層１４１（第１半導体下地層）、第１ｎ型半導体層１４１の表面の一部分を露出させると共に表面の他の一部分を除いて、第１ｎ型半導体層１４１の上に積層されるように設けられた第２ｎ型半導体層１４２（第２半導体下地層）、及び第２ｎ型半導体層１４２の表面の一部分を露出させると共に表面の他の一部分を除いて、第２ｎ型半導体層１４２の上に積層されるように設けられた第３ｎ型半導体層１４３（第３半導体下地層）を備えている。第１ｎ型半導体層１４１は、ｕ-半導体層１３の主面を起点として、ｎ型ドーパントがドープされた半導体がエピタキシャル結晶成長して形成されたものである。第２ｎ型半導体層１４２は、第１ｎ型半導体層１４１の主面を起点として、ｎ型ドーパントがドープされた半導体がエピタキシャル結晶成長して形成されたものである。第３ｎ型半導体層１４３は、第２ｎ型半導体層１４２の主面を起点として、ｎ型ドーパントがドープされた半導体がエピタキシャル結晶成長して形成されたものである。第１～第３ｎ型半導体層１４１～１４３を形成する半導体は、同一の構成元素を有するが、元素組成比が相互に異なっている。なお、第１～第３ｎ型半導体層１４１～１４３は、第１～第３半導体発光層１５１～１５３の下地層を構成するものであり、例えばＩｎＧａＮ/ＧａＮ超格子構造などのように欠陥の伝搬及び発生を防ぐ構造を有していてもよい。 The multi-wavelength light emitting device 10 according to the third embodiment includes the surfaces of a first n-type semiconductor layer 141 (first semiconductor underlayer) and a first n-type semiconductor layer 141 provided so as to be stacked on the u− semiconductor layer 13. A second n-type semiconductor layer 142 (a second semiconductor base layer) provided to be laminated on the first n-type semiconductor layer 141 except for exposing a part of the surface and excluding the other part of the surface; A third n-type semiconductor layer 143 (third semiconductor foundation layer) provided to be laminated on the second n-type semiconductor layer 142 except for exposing a part of the surface of the semiconductor layer 142 and excluding the other part of the surface Is equipped. The first n-type semiconductor layer 141 is formed by epitaxial crystal growth of a semiconductor doped with an n-type dopant starting from the main surface of the u− semiconductor layer 13. The second n-type semiconductor layer 142 is formed by epitaxial crystal growth of a semiconductor doped with an n-type dopant from the main surface of the first n-type semiconductor layer 141 as a starting point. The third n-type semiconductor layer 143 is formed by epitaxial crystal growth of a semiconductor doped with an n-type dopant starting from the main surface of the second n-type semiconductor layer 142. The semiconductors forming the first to third n-type semiconductor layers 141 to 143 have the same constituent elements, but the element composition ratios are different from each other. The first to third n-type semiconductor layers 141 to 143 form an underlayer of the first to third semiconductor light emitting layers 151 to 153, and propagation of defects such as InGaN / GaN super lattice structure, for example. And you may have a structure which prevents generation | occurrence | production.
　実施形態３に係る多波長発光素子１０は、第１ｎ型半導体層１４１の第２ｎ型半導体層１４２が積層されていない他の一部分、第２ｎ型半導体層１４２の第３ｎ型半導体層１４３が積層されていない他の一部分、及び第３ｎ型半導体発光層の上に積層されるように設けられた第１～第３半導体発光層１５１～１５３を備えている。第１～第３半導体発光層１５１～１５３は、それぞれ第１～第３ｎ型半導体層１４１～１４３の主面を起点として半導体がエピタキシャル結晶成長して形成されたものである。また、実施形態３に係る多波長発光素子１０は、第１～第３半導体発光層１５１～１５３の上に積層されるように設けられた第１～第３ｐ型半導体層１６１～１６３を備えている。第１～第３ｐ型半導体層１６１～１６３は、それぞれ第１～第３半導体発光層１５１～１５３の主面を起点として半導体がエピタキシャル結晶成長して形成されたものである。 In the multi-wavelength light emitting device 10 according to the third embodiment, the third n-type semiconductor layer 143 of the second n-type semiconductor layer 142 is stacked, and the other part of the first n-type semiconductor layer 141 where the second n-type semiconductor layer 142 is not stacked. The semiconductor light emitting layer 151 includes first to third semiconductor light emitting layers 151 to 153 provided on the third n-type semiconductor light emitting layer. The first to third semiconductor light emitting layers 151 to 153 are formed by epitaxial crystal growth of a semiconductor from the main surfaces of the first to third n-type semiconductor layers 141 to 143 as starting points. The multi-wavelength light emitting device 10 according to the third embodiment includes the first to third p-type semiconductor layers 161 to 163 provided to be stacked on the first to third semiconductor light emitting layers 151 to 153. There is. The first to third p-type semiconductor layers 161 to 163 are formed by epitaxial crystal growth of a semiconductor from the main surfaces of the first to third semiconductor light emitting layers 151 to 153, respectively.
　実施形態３に係る多波長発光素子１０は、第１～第３ｎ型半導体層１４１～１４３に電気的に接続するようにそれぞれ設けられた第１～第３ｎ型電極１７１～１７３、及び第１～第３ｐ型半導体層１６１～１６３に電気的に接続するようにそれぞれ設けられた第１～第３ｐ型電極１８１～１８３を備えている。 The multi-wavelength light emitting device 10 according to the third embodiment includes first to third n-type electrodes 171 to 173 and first to third n-type electrodes provided to be electrically connected to the first to third n-type semiconductor layers 141 to 143, respectively. The first to third p-type electrodes 181 to 183 are provided so as to be electrically connected to the third p-type semiconductor layers 161 to 163, respectively.
　実施形態３に係る多波長発光素子１０は、第１ｐ型電極１８１が設けられた第１ｐ型半導体層１６１の露出部分が第１発光領域Ａ１、第２ｐ型電極１８２が設けられた第２ｐ型半導体層１６２の露出部分が第２発光領域Ａ２、及び第３ｐ型電極１８３が設けられた第３ｐ型半導体層１６３の積層部分が第３発光領域Ａ３にそれぞれ構成されている。 In the multi-wavelength light emitting device 10 according to the third embodiment, the exposed portion of the first p-type semiconductor layer 161 provided with the first p-type electrode 181 is the first light emitting region A1 and the second p-type semiconductor provided with the second p-type electrode 182. The exposed portion of the layer 162 is configured as the second light emitting region A2, and the stacked portion of the third p type semiconductor layer 163 provided with the third p type electrode 183 is configured as the third light emitting region A3.
　各層の詳細構成及びその他の構成は実施形態１と同一である。 The detailed configuration of each layer and the other configuration are the same as in the first embodiment.
　（多波長発光素子の製造方法）
　実施形態３に係る多波長発光素子１０の製造方法では、図１１（ａ）に示すように、ウエハ１１’（基板１１）上に形成した凹溝１１ａの側面から結晶成長させたｕ-半導体層１３としてのｕ-ＩｎＧａＮ層、第１ｎ型半導体層１４１としてのＳｉをドープした第１ｎ型ＩｎＧａＮ層、第２ｎ型半導体層１４２としてのＳｉをドープした第２ｎ型ＩｎＧａＮ層、及び第３ｎ型半導体層１４３としてのＳｉをドープした第３ｎ型ＩｎＧａＮ層を順に形成し、次いで、図１１（ｂ）に示すように、第１及び第２ｎ型半導体層１４１，１４２のそれぞれが露出するようにエッチングを行った後、図１１（ｃ）に示すように、第１～第３ｎ型半導体層１４１～１４３の露出部分にそれぞれ第１～第３半導体発光層１５１～１５３を同時に形成する。ここで、第１～第３ｎ型半導体層１４３を形成する半導体は、同一の構成元素を有するが、元素組成比が相互に異なっていることから、第１～第３半導体発光層１５１～１５３は、同一の構成元素で且つ相互に元素組成比が異なる半導体で形成され、及び／又は、同一の構成元素により相互に層厚が異なって形成される。その後、第１～第３半導体発光層１５１～１５３の上にそれぞれ第１～第３ｐ型半導体層１６１～１６３を同時に形成し、さらに、第１～第３ｎ型半導体層１４１～１４３の露出部分及び第１～第３ｐ型半導体層１６１～１６３の上にそれぞれ第１～第３ｎ型電極１７１～１７３及び第１～第３ｐ型電極１８１～１８３を形成する。 (Manufacturing method of multi-wavelength light emitting device)
In the method of manufacturing the multi-wavelength light emitting device 10 according to the third embodiment, as shown in FIG. 11A, the u-semiconductor layer is formed by crystal growth from the side surface of the recessed groove 11a formed on the wafer 11 '(substrate 11). 13, a first n-type InGaN layer doped with Si as a first n-type semiconductor layer 141, a second n-type InGaN layer doped with Si as a second n-type semiconductor layer 142, and a third n-type semiconductor layer A third n-type InGaN layer doped with Si is sequentially formed as 143, and then etching is performed so that each of the first and second n-type semiconductor layers 141 and 142 is exposed as shown in FIG. After that, as shown in FIG. 11C, first to third semiconductor light emitting layers 151 to 153 are simultaneously formed on exposed portions of the first to third n-type semiconductor layers 141 to 143, respectively. Here, the semiconductors forming the first to third n-type semiconductor layers 143 have the same constituent elements, but since the element composition ratios are different from each other, the first to third semiconductor light emitting layers 151 to 153 are It is formed of semiconductors which are the same constituent elements and have mutually different elemental composition ratios, and / or are formed to have different layer thicknesses from one another by the same constituent elements. Thereafter, first to third p-type semiconductor layers 161 to 163 are simultaneously formed on the first to third semiconductor light emitting layers 151 to 153, respectively, and further, exposed portions of the first to third n-type semiconductor layers 141 to 143 and First to third n-type electrodes 171 to 173 and first to third p-type electrodes 181 to 183 are formed on the first to third p-type semiconductor layers 161 to 163, respectively.
　各工程の詳細は実施形態１と同一である。 The details of each step are the same as in the first embodiment.
　［その他の実施形態］
　上記実施形態では、第１～第３発光領域Ａ１～Ａ３を有する多波長発光素子１０としたが、特にこれに限定されるものではなく、３つよりも多くの発光領域を有するものであってもよい。 Other Embodiments
Although the multi-wavelength light emitting device 10 has the first to third light emitting regions A1 to A3 in the above embodiment, the present invention is not particularly limited thereto, and has more than three light emitting regions. It is also good.
　本発明は多波長発光素子及びその製造方法について有用である。 The present invention is useful for a multi-wavelength light emitting device and a method of manufacturing the same.
１０　多波長発光素子
１１　基板
１１ａ　凹溝
１１’　ウエハ
１２　結晶成長面
１３　ｕ-半導体層
１４１～１４３　第１～第３ｎ型半導体層（第１～第３半導体下地層）
１５１～１５３　第１～第３半導体発光層
１６１～１６３　第１～第３ｐ型半導体層
１７１～１７３　第１～第３ｎ型電極
１８１～１８３　第１～第３ｐ型電極
２０　フォトレジスト
Ａ１～Ａ３　第１～第３発光領域 10 multi-wavelength light emitting device 11 substrate 11a recessed groove 11 'wafer 12 crystal growth surface 13 u-semiconductor layers 141 to 143 first to third n-type semiconductor layers (first to third semiconductor underlayers)
151 to 153 first to third semiconductor light emitting layers 161 to 163 first to third p-type semiconductor layers 171 to 173 first to third n-type electrodes 181 to 183 first to third p-type electrodes 20 photoresists A1 to A3 first ~ 3rd light emitting area

Claims (12)

  1. 　発光波長が異なる第１及び第２発光領域が構成された多波長発光素子であって、
    　上記第１発光領域には、第１半導体下地層と、その上に積層された第１半導体発光層と、が設けられ、
    　上記第２発光領域には、上記第１半導体下地層の上に配置された該第１半導体下地層と同一の構成元素で且つ元素組成比が異なる半導体で形成された第２半導体下地層と、その上に積層された第２半導体発光層と、が設けられた多波長発光素子。     A multi-wavelength light emitting device comprising first and second light emitting regions having different light emitting wavelengths, wherein
    The first light emitting region is provided with a first semiconductor base layer and a first semiconductor light emitting layer stacked thereon.
    A second semiconductor underlayer formed of a semiconductor having the same constituent elements as the first semiconductor underlayer disposed on the first semiconductor underlayer and different in elemental composition ratio in the second light emitting region; And a second semiconductor light emitting layer laminated thereon.
  2. 　請求項１に記載された多波長発光素子において、
    　上記第１及び第２半導体下地層は、相互に同一の構成元素で且つ元素組成比が異なる半導体で形成されている多波長発光素子。     In the multi-wavelength light emitting device according to claim 1,
    The multi-wavelength light emitting device, wherein the first and second semiconductor base layers are formed of semiconductors having the same constituent elements and different element composition ratios.
  3. 　請求項２に記載された多波長発光素子において、
    　上記第１及び第２半導体下地層を形成する半導体がＩｎＧａＮである多波長発光素子。     In the multi-wavelength light emitting device according to claim 2,
    The multiwavelength light-emitting device whose semiconductor which forms said 1st and 2nd semiconductor base layer is InGaN.
  4. 　請求項１乃至３のいずれかに記載された多波長発光素子において、
    　上記第１及び第２半導体発光層は、相互に同一の構成元素の半導体で形成されている多波長発光素子。     In the multi-wavelength light emitting device according to any one of claims 1 to 3,
    The first and second semiconductor light emitting layers are multi-wavelength light emitting elements formed of semiconductors of the same constituent element.
  5. 　請求項４に記載された多波長発光素子において、
    　上記第１及び第２半導体発光層は、元素組成比が異なる半導体で形成されている多波長発光素子。     In the multi-wavelength light emitting device according to claim 4,
    The first and second semiconductor light emitting layers are multi-wavelength light emitting elements formed of semiconductors different in elemental composition ratio.
  6. 　請求項４又は５に記載された多波長発光素子において、
    　上記第１及び第２半導体発光層の層厚さが異なる多波長発光素子。     In the multi-wavelength light emitting device according to claim 4 or 5,
    The multiple wavelength light emitting element in which the layer thickness of said 1st and 2nd semiconductor light emitting layer differs.
  7. 　請求項４乃至６のいずれかに記載された多波長発光素子において、
    　上記第１及び第２半導体発光層を形成する半導体がＩｎＧａＮである多波長発光素子。     In the multi-wavelength light emitting device according to any one of claims 4 to 6,
    The multiple wavelength light emitting element whose semiconductor which forms said 1st and 2nd semiconductor light emitting layer is InGaN.
  8. 　請求項１乃至７のいずれかに記載された多波長発光素子において、
    　上記第１及び第２発光領域が基板上に構成されている多波長発光素子。     In the multi-wavelength light emitting device according to any one of claims 1 to 7,
    A multi-wavelength light emitting device, wherein the first and second light emitting regions are formed on a substrate.
  9. 　請求項８に記載された多波長発光素子において、
    　上記基板がサファイア基板である多波長発光素子。     In the multi-wavelength light emitting device according to claim 8,
    The multi-wavelength light emitting device in which the substrate is a sapphire substrate.
  10. 　請求項１乃至９のいずれかに記載された多波長発光素子において、
    　上記第１及び第２発光領域とは発光波長が異なる第３発光領域が構成され、
    　上記第３発光領域には、上記第１及び第２半導体下地層の上に配置された該第１及び第２半導体下地層と同一の構成元素で且つ元素組成比が異なる半導体で形成された第３半導体下地層と、その上に積層された第３半導体発光層と、が設けられている多波長発光素子。     In the multi-wavelength light emitting device according to any one of claims 1 to 9,
    A third light emitting region having a light emitting wavelength different from that of the first and second light emitting regions is constituted,
    The third light emitting region is formed of a semiconductor having the same constituent element as the first and second semiconductor underlayers disposed on the first and second semiconductor underlayers, and having a different element composition ratio. 3 A multi-wavelength light emitting device provided with a semiconductor base layer and a third semiconductor light emitting layer laminated thereon.
  11. 　請求項１０に記載された多波長発光素子において、
    　上記第１～第３発光領域は、赤、緑、及び青の光を発光するように構成されている多波長発光素子。     In the multi-wavelength light emitting device according to claim 10,
    The first to third light emitting regions are multi-wavelength light emitting elements configured to emit red, green and blue light.
  12. 　第１半導体下地層を形成し、その上に、該第１半導体下地層と同一の構成元素で且つ元素組成比が異なる半導体で第２半導体下地層を、該第１半導体下地層の一部分が露出した状態に形成した後、露出した第１半導体下地層の一部分の上及び第２半導体下地層の上にそれぞれ第１及び第２半導体発光層を同時に形成する多波長発光素子の製造方法。 A first semiconductor underlayer is formed, on which a second semiconductor underlayer is formed of a semiconductor having the same constituent elements as the first semiconductor underlayer but different in elemental composition ratio, and a portion of the first semiconductor underlayer is exposed. A method of manufacturing a multi-wavelength light emitting device, wherein first and second semiconductor light emitting layers are simultaneously formed on a portion of the exposed first semiconductor underlayer and on the second semiconductor underlayer, respectively, after forming in the above state.
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