WO2012103837A3 - 时延调整方法和数据转换器 - Google Patents

时延调整方法和数据转换器 Download PDF

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Publication number
WO2012103837A3
WO2012103837A3 PCT/CN2012/073050 CN2012073050W WO2012103837A3 WO 2012103837 A3 WO2012103837 A3 WO 2012103837A3 CN 2012073050 W CN2012073050 W CN 2012073050W WO 2012103837 A3 WO2012103837 A3 WO 2012103837A3
Authority
WO
WIPO (PCT)
Prior art keywords
data converter
clock
delay adjustment
adjustment method
delay
Prior art date
Application number
PCT/CN2012/073050
Other languages
English (en)
French (fr)
Other versions
WO2012103837A2 (zh
Inventor
邵珠法
石晓明
李刚
Original Assignee
华为技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to CN201280000462.2A priority Critical patent/CN102714854B/zh
Priority to PCT/CN2012/073050 priority patent/WO2012103837A2/zh
Publication of WO2012103837A2 publication Critical patent/WO2012103837A2/zh
Publication of WO2012103837A3 publication Critical patent/WO2012103837A3/zh

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/06—Continuously compensating for, or preventing, undesired influence of physical parameters
    • H03M1/0617—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence
    • H03M1/0624—Continuously compensating for, or preventing, undesired influence of physical parameters characterised by the use of methods or means not specific to a particular type of detrimental influence by synchronisation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Analogue/Digital Conversion (AREA)
  • Pulse Circuits (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

本发明提供一种时延调整方法和数据转换器，所述时延调整方法包括：数据转换器的时延调整单元接收固定时钟；所述时延调整单元采用第一调整量对所述固定时钟进行调整，获得采样时钟，以及采用第二调整量对所述固定时钟进行调整，获得用于数字处理的时钟；所述时延调整单元将所述采样时钟发送给所述数据转换器的转换器核，以及将所述用于数字处理的时钟发送给所述数据转换器的数字时钟单元。本发明可以在数据转换器内部实现时延调整功能，进而可以降低时钟设计复杂度和实现成本。
PCT/CN2012/073050 2012-03-26 2012-03-26 时延调整方法和数据转换器 WO2012103837A2 (zh)

Priority Applications (2)

Application Number Priority Date Filing Date Title
CN201280000462.2A CN102714854B (zh) 2012-03-26 2012-03-26 时延调整方法和数据转换器
PCT/CN2012/073050 WO2012103837A2 (zh) 2012-03-26 2012-03-26 时延调整方法和数据转换器

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2012/073050 WO2012103837A2 (zh) 2012-03-26 2012-03-26 时延调整方法和数据转换器

Publications (2)

Publication Number Publication Date
WO2012103837A2 WO2012103837A2 (zh) 2012-08-09
WO2012103837A3 true WO2012103837A3 (zh) 2013-02-21

Family

ID=46603137

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2012/073050 WO2012103837A2 (zh) 2012-03-26 2012-03-26 时延调整方法和数据转换器

Country Status (2)

Country Link
CN (1) CN102714854B (zh)
WO (1) WO2012103837A2 (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109155798B (zh) * 2016-05-27 2020-08-25 华为技术有限公司 一种异步fifo电路及时延确定方法
CN108984446B (zh) * 2018-07-25 2021-07-16 郑州云海信息技术有限公司 基于fpga原语的phy接口及fpga芯片

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101677237A (zh) * 2008-09-16 2010-03-24 联发科技股份有限公司 时钟时序校准电路、时钟时序校准方法以及模数转换系统
US20110006933A1 (en) * 2009-07-09 2011-01-13 Texas Instruments Incorporated Time-interleaved analog-to-digital converter
CN102035553A (zh) * 2010-11-15 2011-04-27 中兴通讯股份有限公司 一种并行模数转化装置及控制模数转换通道偏斜的方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101267207B (zh) * 1999-03-24 2011-12-28 株式会社爱德万测试 A-d转换装置和校准单元

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101677237A (zh) * 2008-09-16 2010-03-24 联发科技股份有限公司 时钟时序校准电路、时钟时序校准方法以及模数转换系统
US20110006933A1 (en) * 2009-07-09 2011-01-13 Texas Instruments Incorporated Time-interleaved analog-to-digital converter
CN102035553A (zh) * 2010-11-15 2011-04-27 中兴通讯股份有限公司 一种并行模数转化装置及控制模数转换通道偏斜的方法

Also Published As

Publication number Publication date
WO2012103837A2 (zh) 2012-08-09
CN102714854B (zh) 2015-06-03
CN102714854A (zh) 2012-10-03

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