WO2012098904A1 - Image display device and drive method for image display device - Google Patents

Image display device and drive method for image display device Download PDF

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Publication number
WO2012098904A1
WO2012098904A1 PCT/JP2012/000337 JP2012000337W WO2012098904A1 WO 2012098904 A1 WO2012098904 A1 WO 2012098904A1 JP 2012000337 W JP2012000337 W JP 2012000337W WO 2012098904 A1 WO2012098904 A1 WO 2012098904A1
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WIPO (PCT)
Prior art keywords
subfield
code
gradation
value
image signal
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PCT/JP2012/000337
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French (fr)
Japanese (ja)
Inventor
広史 本田
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パナソニック株式会社
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Publication of WO2012098904A1 publication Critical patent/WO2012098904A1/en

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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007Display of intermediate tones
    • G09G3/2018Display of intermediate tones by time modulation using two or more time intervals
    • G09G3/2022Display of intermediate tones by time modulation using two or more time intervals using sub-frames
    • G09G3/2029Display of intermediate tones by time modulation using two or more time intervals using sub-frames the sub-frames having non-binary weights
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/28Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels
    • G09G3/288Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels
    • G09G3/291Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes
    • G09G3/293Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using luminous gas-discharge panels, e.g. plasma panels using AC panels controlling the gas discharge to control a cell condition, e.g. by means of specific pulse shapes for address discharge
    • G09G3/2932Addressed by writing selected cells that are in an OFF state
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N13/00Stereoscopic video systems; Multi-view video systems; Details thereof
    • H04N13/30Image reproducers
    • H04N13/332Displays for viewing with the aid of special glasses or head-mounted displays [HMD]
    • H04N13/341Displays for viewing with the aid of special glasses or head-mounted displays [HMD] using temporal multiplexing
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202Addressing of scan or signal lines
    • G09G2310/0205Simultaneous scanning of several lines in flat panels

Definitions

  • the present invention relates to an image display device that displays an image in an image display region by combining binary control of light emission and non-light emission in a light emitting element that constitutes a pixel, and a driving method of the image display device.
  • a plasma display panel (hereinafter abbreviated as “panel”) is a typical image display device that displays an image in an image display area by combining binary control of light emission and non-light emission in a light emitting element constituting a pixel. is there.
  • a large number of discharge cells which are light-emitting elements constituting pixels, are formed between a front substrate and a rear substrate that are arranged to face each other.
  • a plurality of pairs of display electrodes composed of a pair of scan electrodes and sustain electrodes are formed on the front glass substrate in parallel with each other.
  • a dielectric layer and a protective layer are formed so as to cover the display electrode pairs.
  • the back substrate has a plurality of parallel data electrodes formed on the glass substrate on the back side, a dielectric layer is formed so as to cover the data electrodes, and a plurality of barrier ribs are formed thereon in parallel with the data electrodes. ing. And the fluorescent substance layer is formed in the surface of a dielectric material layer, and the side surface of a partition.
  • the front substrate and the rear substrate are arranged opposite to each other and sealed so that the display electrode pair and the data electrode are three-dimensionally crossed.
  • a discharge gas containing xenon at a partial pressure ratio of 5% is sealed, and a discharge cell is formed in a portion where the display electrode pair and the data electrode face each other.
  • ultraviolet rays are generated by gas discharge in each discharge cell, and the phosphors of each color of red (R), green (G) and blue (B) are excited and emitted by the ultraviolet rays. Display an image.
  • a subfield method is generally used as a method for displaying an image in an image display region by combining binary control of light emission and non-light emission in a light emitting element.
  • each discharge cell In the subfield method, one field is divided into a plurality of subfields having different emission luminances.
  • each discharge cell light emission / non-light emission of each subfield is controlled by a combination according to a desired gradation value.
  • each discharge cell emits light with the emission luminance of one field set to a desired gradation value, and an image composed of various combinations of gradation values is displayed in the image display area of the panel.
  • each subfield has an address period and a sustain period.
  • the scan pulse is sequentially applied to the scan electrodes, and the address pulse is selectively applied to the data electrodes based on the image signal to be displayed.
  • an address discharge is generated between the scan electrode and the data electrode of the discharge cell to emit light, and a wall charge is formed in the discharge cell (hereinafter, these operations are also collectively referred to as “address”). ).
  • the number of sustain pulses based on the gradation weights determined for each subfield is alternately applied to the display electrode pairs composed of the scan electrodes and the sustain electrodes.
  • a sustain discharge is generated in the discharge cell that has generated the address discharge, and the phosphor layer of the discharge cell emits light (hereinafter referred to as “lighting” that the discharge cell emits light by the sustain discharge, and “non-emitting”). Also written as “lit”.)
  • each discharge cell is made to emit light with the luminance according to the gradation weight.
  • each discharge cell of the panel is caused to emit light with a luminance corresponding to the gradation value of the image signal, and an image is displayed in the image display area of the panel.
  • the simultaneous writing operation every two lines is a driving method in which a scanning pulse is simultaneously applied to two adjacent scanning electrodes to perform the writing operation simultaneously for two lines (see, for example, Patent Document 1). If the simultaneous write operation is performed every two lines, the time spent for the write operation can be shortened and the write period can be shortened. For example, the number of subfields is increased or the time of the sustain period is increased. It becomes possible.
  • the driving method that performs the simultaneous writing operation every two lines may cause a decrease in resolution in the direction orthogonal to the scanning electrodes.
  • the direction orthogonal to the scan electrode is referred to as “vertical direction”
  • the resolution in the direction orthogonal to the scan electrode is referred to as “vertical resolution”. This is because a write operation is simultaneously performed on two adjacent scan electrodes within one field period, so that each discharge formed on the two adjacent scan electrodes in one image displayed on the panel. This is because the cells emit light in the same pattern. Therefore, the resolution of the image is reduced to half of the number of scan electrodes in the direction orthogonal to the scan electrodes (vertical direction).
  • a plasma display device as a three-dimensional (3-dimension: hereinafter referred to as “3D”) image display device.
  • a right-eye image and a left-eye image constituting a stereoscopic image (3D image) are alternately displayed on a panel, and a user uses special glasses called shutter glasses to display the images. Observe.
  • the shutter glasses include a right-eye shutter and a left-eye shutter, and the right-eye shutter is opened (a state in which visible light is transmitted) during a period in which the right-eye image is displayed on the panel, and the left-eye shutter. Is closed (a state in which visible light is blocked), and while the left-eye image is displayed, the left-eye shutter is opened and the right-eye shutter is closed.
  • the user can observe the right-eye image only with the right eye and the left-eye image with only the left eye, so that the display image can be stereoscopically viewed.
  • the plasma display device used as the 3D image display device in order to display one 3D image, two images of one right eye image and one left eye image are displayed. There must be. Therefore, a user who observes a 3D image through shutter glasses observes the number of images displayed on the panel per second as half the number of fields per second.
  • the field frequency of the image displayed on the panel is 60 Hz
  • the image is a normal image (2D image) that is not a 3D image
  • 60 images per second 60 images per second.
  • a 2D image is displayed.
  • the image is a 3D image, 30 3D images are displayed per second.
  • the field frequency in order to display 60 3D images per second, the field frequency must be set to 120 Hz, which is twice 60 Hz. In that case, the time that can be used to display one right-eye image or one left-eye image is limited to one-half of the time that can be used to display one 2D image.
  • the above-described driving method using the simultaneous writing operation every two lines is effective.
  • the vertical resolution tends to be lowered.
  • a plasma display device used as a 3D image display device smoothness of diagonal lines is prevented from being impaired when a panel is driven to display a 3D image by a driving method using a simultaneous writing operation every two lines. Therefore, it is desired to prevent deterioration of image display quality.
  • a plurality of subfields having gradation weights constitute one field, and each of the plurality of subfields is expressed using a subfield code indicating a combination of light emission and non-light emission in each of the plurality of subfields.
  • This is an image display device that controls the light emission and non-light emission, displays a gradation value based on an image signal on each of a plurality of pixels constituting the image display area, and displays an image in the image display area.
  • at least one first-type subfield that performs a line-by-line addressing operation that applies a scan pulse to each of the scan electrodes in the address period and two adjacent scan electrodes in the address period simultaneously.
  • a display code which is a subfield code for displaying a gradation value based on an image signal on a pixel, is composed of a plurality of second-type subfields that perform simultaneous writing operation every two lines to which a scan pulse is applied.
  • a drive circuit for outputting is provided.
  • the drive circuit includes a two-line average unit, a two-line difference unit, a subtraction unit, an average code conversion unit, a difference code creation unit, and a display code synthesis unit.
  • the two-line average unit calculates an average value of image signals corresponding to each pixel of a pair of pixels that are adjacent to each other in the direction orthogonal to the scanning electrode and perform the address operation simultaneously in the address period of the second type subfield.
  • the two-line difference unit calculates a difference value between the image signals corresponding to each pixel of the pair of pixels described above, and compares the difference value with the gradation weight of the first type subfield.
  • the subtraction unit subtracts a predetermined variable determined by the comparison result in the two-line difference unit from the above average value.
  • the average code conversion unit converts the output of the subtraction unit into a subfield code having a predetermined subfield determined by the comparison result of the two-line difference unit as a non-lighting subfield, and outputs the subfield code.
  • the difference code creation unit generates a subfield code for controlling a predetermined subfield based on the comparison result of the two-line difference unit.
  • the display code synthesis unit generates a display code by synthesizing the subfield code output from the average code conversion unit and the subfield code generated by the difference code creation unit.
  • the conversion from the image signal to the display code can be performed by the calculation using the calculation circuit. Therefore, even in an image display device that needs to cope with high functionality and multi-function, it is not necessary to provide a huge number of conversion tables for converting image signals into display codes. That is, it is not necessary to configure the image signal processing circuit so as to select an optimal one from a vast number of conversion tables according to various conditions. Furthermore, the time required for the writing period can be shortened while preventing the image display quality from being deteriorated in the image display device.
  • the image display device of the present invention includes a base code generation unit, a rule generation unit, an upper and lower code generation unit, and an average code selection unit in the average code conversion unit.
  • the base code generation unit selects a gradation value that is larger than the gradation value of the image signal in the target pixel pair and closest to the gradation value of the image signal in the target pixel pair from among a plurality of basic subfield codes.
  • the sub-field code having the upper gradation base code is selected.
  • the rule generation unit generates a rule for generating a new subfield code by changing the light-emitting subfield in the upper gradation base code to a non-light-emitting subfield based on the image signal in the target pixel pair.
  • the upper / lower code generation unit applies the above-described rule to the upper gradation base code and newly generates an image signal in the target pixel pair that is larger than the gradation value of the image signal in the target pixel pair.
  • the subfield code having the gradation value closest to the gradation value is selected as the upper gradation code, and is the closest to the gradation value of the image signal in the target pixel pair below the gradation value of the image signal in the target pixel pair
  • a subfield code having a gradation value is selected as the lower gradation code.
  • the average code selection unit calculates a gradation value to be displayed on the target pixel pair by adding a predetermined value to the gradation value of the image signal in the target pixel pair.
  • a subfield code having a gradation value closer to the gradation value to be displayed on the target pixel pair is selected and output.
  • the plurality of basic subfield codes described above are all subfields having the largest gradation weight among the subfields that emit light, and all having a gradation weight smaller than that subfield.
  • the sub-field is a base code that emits light, or a deleted base code that uses a predetermined sub-field determined by the comparison result of the two-line difference portion from the base code as a non-lighting sub-field.
  • the predetermined value described above is a dither value calculated by dither processing and an error generated by error diffusion processing.
  • the present invention also comprises a plurality of subfields using a subfield code indicating a combination of light emission and non-light emission in each of the plurality of subfields, with a plurality of subfields having gradation weights defined.
  • the gradation value based on the image signal is displayed on each of the plurality of pixels constituting the image display area to display the image in the image display area, and scanning in the writing period
  • At least one first-type subfield that performs a line-by-line addressing operation that applies a scan pulse to each electrode and a line-by-line simultaneous address that simultaneously applies a scan pulse to two adjacent scan electrodes in the address period
  • a plurality of second type subfields that perform the operation constitute one field, and gradation values based on image signals are displayed on the pixels.
  • a driving method of an image display device for generating a display code is a sub-field code.
  • the driving method includes calculating an average value of image signals corresponding to each pixel of a pair of pixels that are adjacent to each other in a direction orthogonal to the scanning electrode and simultaneously perform the writing operation in the writing period of the second type subfield.
  • the conversion from the image signal to the display code can be performed by the calculation using the calculation circuit. Therefore, even in an image display device that needs to cope with high functionality and multi-function, it is not necessary to provide a huge number of conversion tables for converting image signals into display codes. That is, it is not necessary to configure the image signal processing circuit so as to select an optimal one from a vast number of conversion tables according to various conditions. Furthermore, the time required for the writing period can be shortened while preventing the image display quality from being deteriorated in the image display device.
  • the driving method of the image display device includes a plurality of basic subfield codes that are larger than the gradation value of the image signal in the pixel pair of interest and the gradation value of the image signal in the pixel pair of interest. Selecting the subfield code having the gradation value closest to the upper gradation base code, and changing the light emission subfield in the upper gradation base code to the non-light emission subfield based on the image signal in the pixel pair of interest.
  • a predetermined value is added to the gradation value of the image signal in the target pixel pair to calculate a gradation value to be displayed on the target pixel pair, and the target pixel pair of the upper gradation code and the lower gradation code is calculated. Selecting a subfield code having a gradation value closer to the gradation value to be displayed.
  • FIG. 1 is an exploded perspective view showing a structure of a panel used in an image display apparatus according to an embodiment of the present invention.
  • FIG. 2 is an electrode array diagram of a panel used in the image display apparatus according to the embodiment of the present invention.
  • FIG. 3 is a diagram schematically showing drive voltage waveforms applied to the respective electrodes of the panel used in the image display device according to the embodiment of the present invention.
  • FIG. 4 is a diagram schematically showing the subfield configuration of the image display device and the opening / closing operation of the shutter glasses in the embodiment of the present invention.
  • FIG. 5 is a diagram showing an example of a code set when one field is composed of five subfields.
  • FIG. 6 is a diagram schematically showing an example of a circuit block and an image display system constituting the image display apparatus according to the embodiment of the present invention.
  • FIG. 7 is a diagram schematically showing an example of a circuit block constituting the image signal processing circuit of the image display device according to the embodiment of the present invention.
  • FIG. 8A is a diagram schematically showing an example of a writing operation in the image signal processing circuit of the image display device according to the embodiment of the present invention.
  • FIG. 8B is a diagram schematically showing another example of the writing operation in the image signal processing circuit of the image display device according to the embodiment of the present invention.
  • FIG. 8C is a diagram schematically showing another example of the write operation in the image signal processing circuit of the image display device according to the embodiment of the present invention.
  • FIG. 8A is a diagram schematically showing an example of a writing operation in the image signal processing circuit of the image display device according to the embodiment of the present invention.
  • FIG. 8B is a diagram schematically showing another example of the writing operation
  • FIG. 8D is a diagram schematically showing another example of the writing operation in the image signal processing circuit of the image display device according to the embodiment of the present invention.
  • FIG. 8E is a diagram schematically showing another example of the writing operation in the image signal processing circuit of the image display device according to the embodiment of the present invention.
  • FIG. 8F is a diagram schematically showing another example of the writing operation in the image signal processing circuit of the image display device according to the embodiment of the present invention.
  • FIG. 8G is a diagram schematically showing another example of the writing operation in the image signal processing circuit of the image display device according to the embodiment of the present invention.
  • FIG. 9 is a diagram schematically showing an example of a circuit block constituting the average code conversion unit of the image display device according to the embodiment of the present invention.
  • FIG. 10A is a diagram illustrating an example of a base code set used in the image display device according to the embodiment of the present invention.
  • FIG. 10B is a diagram showing an example of a deleted base code set used in the image display device according to the embodiment of the present invention.
  • FIG. 11A is a diagram illustrating an example of an intermediate code set generated by the intermediate code generation unit of the image display device according to the embodiment of the present invention.
  • FIG. 11B is a diagram showing another example of the intermediate code set generated by the intermediate code generation unit of the image display device according to the embodiment of the present invention.
  • FIG. 11C is a diagram illustrating another example of the intermediate code set generated by the intermediate code generation unit of the image display device according to the embodiment of the present invention.
  • FIG. 11A is a diagram illustrating an example of a base code set used in the image display device according to the embodiment of the present invention.
  • FIG. 10B is a diagram showing an example of a deleted base code set used in the image display device according to the embodiment of the
  • FIG. 12A is a diagram illustrating an example of a dither pattern used in the image display device according to the embodiment of the present invention.
  • FIG. 12B is a diagram showing another example of the dither pattern used in the image display device according to the embodiment of the present invention.
  • FIG. 13 is a diagram showing the error diffusion coefficient of the error diffusion unit of the image display device according to the embodiment of the present invention.
  • FIG. 14 is a flowchart showing the operation of the image signal processing circuit of the image display device according to the embodiment of the present invention.
  • FIG. 15 is a diagram schematically showing another example of a drive voltage waveform applied to each electrode of the panel used in the image display device according to the embodiment of the present invention.
  • FIG. 16A is a diagram illustrating an example of a base code set used in the image display device according to the embodiment of the present invention.
  • FIG. 16B is a diagram showing another example of the deleted base code set used in the image display device according to the embodiment of the present invention.
  • FIG. 16C is a diagram showing another example of the deleted base code set used in the image display device according to the embodiment of the present invention.
  • FIG. 1 is an exploded perspective view showing the structure of panel 10 used in the image display apparatus according to the embodiment of the present invention.
  • a plurality of display electrode pairs 14 each including a scanning electrode 12 and a sustaining electrode 13 are formed on a glass front substrate 11.
  • a dielectric layer 15 is formed so as to cover the scan electrode 12 and the sustain electrode 13, and a protective layer 16 is formed on the dielectric layer 15.
  • This protective layer 16 has been used as a panel material in order to lower the discharge start voltage in the discharge cell, and has a large secondary electron emission coefficient and durability when neon (Ne) and xenon (Xe) gas is sealed. It is made of a material mainly composed of magnesium oxide (MgO).
  • the protective layer 16 may be composed of a single layer or may be composed of a plurality of layers. Moreover, the structure which particle
  • a plurality of data electrodes 22 are formed on the rear substrate 21, a dielectric layer 23 is formed so as to cover the data electrodes 22, and a grid-like partition wall 24 is further formed thereon.
  • a phosphor layer 25R that emits red (R)
  • a phosphor layer 25G that emits green (G)
  • a phosphor layer 25B that emits blue (B).
  • the phosphor layer 25R, the phosphor layer 25G, and the phosphor layer 25B are collectively referred to as a phosphor layer 25.
  • the front substrate 11 and the rear substrate 21 are arranged to face each other so that the display electrode pair 14 and the data electrode 22 intersect each other with a minute space therebetween, and a discharge space is provided in the gap between the front substrate 11 and the rear substrate 21.
  • the outer peripheral part is sealed with sealing materials, such as glass frit.
  • sealing materials such as glass frit.
  • a mixed gas of neon and xenon is sealed in the discharge space as a discharge gas.
  • the discharge space is partitioned into a plurality of sections by the barrier ribs 24, and discharge cells, which are light-emitting elements constituting the pixels, are formed at the intersections between the display electrode pairs 14 and the data electrodes 22.
  • one pixel is composed of three consecutive discharge cells arranged in the direction in which the display electrode pair 14 extends.
  • the three discharge cells are a discharge cell having a phosphor layer 25R and emitting red (R) (red discharge cell), and a discharge cell having a phosphor layer 25G and emitting green (G) (green). And a discharge cell having a phosphor layer 25B and emitting blue (B) light (blue discharge cell).
  • the structure of the panel 10 is not limited to the above-described structure, and may be, for example, provided with a stripe-shaped partition wall.
  • FIG. 2 is an electrode array diagram of panel 10 used in the plasma display device according to one embodiment of the present invention.
  • the panel 10 includes n scan electrodes SC1 to SCn (scan electrode 12 in FIG. 1) extended in the horizontal direction (row direction and line direction) and n sustain electrodes SU1 to SUn (FIG. 1).
  • the sustain electrodes 13) are arranged, and m data electrodes D1 to Dm (data electrodes 22 in FIG. 1) extending in the vertical direction (column direction) are arranged.
  • m discharge cells are formed on one pair of display electrodes 14 and m / 3 pixels are formed.
  • the cell is coated with a green phosphor as a phosphor layer 25G, and the discharge cell having the data electrode Dp + 2 is coated with a blue phosphor as a phosphor layer 25B.
  • the plasma display device in the present embodiment drives the panel 10 by the subfield method.
  • the subfield method one field of an image signal is divided into a plurality of subfields on the time axis, and a gradation weight is set for each subfield. Therefore, each field has a plurality of subfields having different gradation weights.
  • the image signal input to the image display device is a 3D image signal.
  • the 3D image signal is a stereoscopic image signal in which a right-eye image signal and a left-eye image signal are alternately repeated for each field.
  • the right-eye field for displaying the right-eye image signal on the panel 10 and the left-eye field for displaying the left-eye image signal on the panel 10 are alternately repeated, and the panel 10 includes the stereoscopic image including the right-eye image and the left-eye image.
  • the stereoscopic image (3D image) displayed on the panel 10 is observed by the user through shutter glasses that open and close the right-eye shutter and the left-eye shutter in synchronization with the right-eye field and the left-eye field, respectively. To do. Thereby, the user can stereoscopically view the 3D image displayed on the panel 10.
  • the right-eye field and the left-eye field differ only in the image signal to be displayed, and the field configuration is the same, such as the number of subfields constituting one field, the gradation weight of each subfield, and the arrangement of subfields. is there.
  • the configuration of one field and the drive voltage waveform applied to each electrode will be described.
  • the field frequency (the number of fields generated per second) is set to twice the normal frequency (for example, 120 Hz) so that the user can smoothly observe a 3D moving image. ing.
  • Each field has a plurality of subfields, and each subfield has an initialization period, an address period, and a sustain period.
  • an initializing operation is performed in which initializing discharge is generated in the discharge cells and wall charges necessary for the address discharge in the subsequent address period are formed on each electrode.
  • Initialization operation includes “forced initialization operation” that forcibly generates an initializing discharge in all discharge cells regardless of the operation of the immediately preceding subfield and an addressing discharge that occurs in the addressing period of the immediately preceding subfield.
  • the forced initializing operation the rising ramp waveform voltage and the falling ramp waveform voltage are applied to the scan electrode 12 to generate an initializing discharge in the discharge cell.
  • the forced initializing operation is performed in all discharge cells in the initializing period of one subfield, and all the discharge cells are selected in the initializing period of the other subfield. Perform initialization.
  • force initialization period the initialization period in which the forced initialization operation is performed
  • subfield having the forced initialization period is referred to as “forced initialization subfield”.
  • An initialization period for performing the selective initialization operation is referred to as a “selective initialization period”
  • a subfield having the selective initialization period is referred to as a “selective initialization subfield”.
  • subfield SF1 is a forced initialization subfield
  • the other subfields are selected initialization subfields.
  • the present invention is not limited to the above-described subfields as subfields for forced initialization subfields and subfields for selective initialization subfields.
  • the structure which switches a subfield structure based on an image signal etc. may be sufficient.
  • a scan pulse is applied to the scan electrode 12 and an address pulse is selectively applied to the data electrode 22 to selectively generate an address discharge in the discharge cells to emit light. Then, an address operation is performed to form wall charges in the discharge cells for generating a sustain discharge in the subsequent sustain period.
  • either the simultaneous writing operation for every two lines or the writing operation for every one line is performed in the writing period.
  • the simultaneous writing operation for every two lines is an addressing operation in which a scanning pulse is simultaneously applied to two adjacent scanning electrodes 12 and a writing pulse is selectively applied to the data electrodes 22.
  • the simultaneous address operation for every two lines the address discharge is simultaneously generated in the discharge cells in which the sustain discharge is to be generated.
  • the address operation for each line is an address operation in which a scan pulse is sequentially applied to each of scan electrode SC1 to scan electrode SCn and an address pulse is selectively applied to data electrode 22.
  • an address discharge is generated for each line in a discharge cell in which a sustain discharge is to be generated.
  • the length of the writing period can be shortened as compared with the writing period in which the writing operation is performed every line.
  • a subfield that performs a write operation for each line in the write period is referred to as a “first type subfield”. Further, a subfield that performs the simultaneous writing operation every two lines during the writing period is referred to as a “second type subfield”.
  • the first type subfield and the second type subfield are mixed in one field. That is, in the present embodiment, one field includes at least one first type subfield and a plurality of second type subfields.
  • the above-mentioned 1 line is a row
  • sustain pulses of the number obtained by multiplying the gradation weight set in each subfield by a predetermined proportional constant are alternately applied to the scan electrode 12 and the sustain electrode 13 to generate an address discharge in the immediately preceding address period.
  • a sustain discharge is generated in the discharged discharge cell, and a sustain operation for emitting light from the discharge cell is performed.
  • This proportionality constant is a luminance multiple.
  • the gradation weight represents the ratio of the magnitude of the luminance displayed in each subfield, and the number of sustain pulses corresponding to the gradation weight is generated in the sustain period in each subfield. Therefore, for example, the subfield with the gradation weight “8” emits light with a luminance about eight times that of the subfield with the gradation weight “1”, and about four times as high as the subfield with the gradation weight “2”. Emits light. Therefore, for example, if the subfield with the gradation weight “8” and the subfield with the gradation weight “2” are emitted, the discharge cell can emit light with a luminance corresponding to the gradation value “10”.
  • each discharge cell emits light with various gradation values by selectively emitting light in each subfield by controlling light emission / non-light emission of each discharge cell for each subfield in a combination according to the image signal. That is, a gradation value corresponding to an image signal can be displayed on each discharge cell, and an image based on the image signal can be displayed on the panel 10.
  • one pixel includes three consecutive discharge cells arranged in the direction in which the display electrode pair 14 extends, that is, a red discharge cell, a green discharge cell, and a blue discharge.
  • a red discharge cell is also referred to as a “red pixel”, a green discharge cell as a “green pixel”, and a blue discharge cell as a “blue pixel”.
  • the right-eye field and the left-eye field are each composed of five subfields (subfield SF1, subfield SF2, subfield SF3, subfield SF4, subfield SF5), and subfield SF1.
  • subfield SF1, subfield SF2, subfield SF3, subfield SF4, subfield SF5 are set to each subfield of subfield SF5.
  • the subfield SF1, the subfield SF3, the subfield SF4, and the subfield SF5 are the second type subfield
  • the subfield SF2 is the first type subfield.
  • the subfields that are the first type subfield and the subfields that are the second type subfield are not limited to the subfields described above.
  • the number of subfields constituting one field and the gradation weight set in each subfield are not limited to the above-described subfield configuration. They are preferably set optimally according to the specifications of the image display device.
  • FIG. 3 is a diagram schematically showing drive voltage waveforms applied to the respective electrodes of panel 10 used in the plasma display device according to one embodiment of the present invention.
  • FIG. 3 shows data electrode D1 to data electrode Dm, scan electrode SC1 that performs the address operation first in the address period, scan electrode SCn that performs the address operation last in the address period (for example, scan electrode SC1080), sustain electrode SU1 to The drive voltage waveform applied to each of the sustain electrodes SUn is shown.
  • Scan electrode SCi, sustain electrode SUi, and data electrode Dk in the following represent electrodes selected based on image data (data indicating light emission / non-light emission for each subfield) from among the electrodes.
  • FIG. 3 also shows a subfield SF1 that is a forced initialization subfield and the second type subfield, a subfield SF2 that is a selective initialization subfield and the first type subfield, and a selective initialization subfield.
  • the subfield SF3 which is the second type subfield.
  • the subfield SF1, the subfield SF2, and the subfield SF3 have different waveform shapes of the drive voltage applied to the scan electrode 12 in the initialization period.
  • the subfield SF1, the subfield SF3, and the subfield SF2 have different write operations in the write period.
  • each subfield after subfield SF4 is a selective initialization subfield and is a second type subfield, and therefore generates substantially the same drive voltage waveform as subfield SF3 except for the number of sustain pulses.
  • the voltage 0 (V) is applied to the data electrode D1 to the data electrode Dm and the sustain electrode SU1 to the sustain electrode SUn.
  • a voltage Vi1 is applied to scan electrode SC1 through scan electrode SCn after voltage 0 (V) is applied, and a ramp waveform voltage that gradually rises from voltage Vi1 to voltage Vi2 (hereinafter referred to as an “upward ramp waveform voltage”). ) Is applied.
  • voltage Vi1 is set to a voltage lower than the discharge start voltage for sustain electrode SU1 to sustain electrode SUn
  • voltage Vi2 is set to a voltage exceeding the discharge start voltage for sustain electrode SU1 to sustain electrode SUn.
  • the wall voltage on the electrode represents a voltage generated by wall charges accumulated on the dielectric layer covering the electrode, the protective layer, the phosphor layer, and the like.
  • the positive voltage Ve is applied to the sustain electrodes SU1 to SUn, and the voltage 0 (V) is applied to the data electrodes D1 to Dm.
  • a scan waveform SC1 to scan electrode SCn are applied with a ramp waveform voltage that gently falls from voltage Vi3 to negative voltage Vi4 (hereinafter referred to as “down ramp waveform voltage”).
  • Voltage Vi3 is set to a voltage lower than the discharge start voltage with respect to sustain electrode SU1 through sustain electrode SUn
  • voltage Vi4 is set to a voltage exceeding the discharge start voltage with respect to sustain electrode SU1 through sustain electrode SUn.
  • the above voltage waveform is a forced initializing waveform that generates an initializing discharge in the discharge cell regardless of the operation of the immediately preceding subfield.
  • the operation for applying the forced initialization waveform to the scan electrode 12 is the forced initialization operation.
  • the forced initialization operation in the initialization period Ti1 of the forced initialization subfield ends.
  • initializing discharge is forcibly generated in all the discharge cells in the image display area of the panel 10.
  • the simultaneous writing operation every two lines, scan electrode SC1 and scan electrode SC2, scan electrode SC3 and scan electrode SC4, scan electrode SC5 and scan electrode SC6,..., Scan electrode SCn-1 and scan electrode SCn are adjacent in this order.
  • a scanning pulse is simultaneously applied to the two scanning electrodes 12 to be performed. That is, the two-line simultaneous write operation is a write operation in which scan pulses are sequentially applied to two adjacent scan electrodes 12 in the order in which the scan electrodes 12 are arranged on the panel 10.
  • the scan pulse is applied to each scan electrode 12 in the order of scan electrode SC1, scan electrode SC2, scan electrode SC3, scan electrode SC4,..., Scan electrode SCn-1, and scan electrode SCn.
  • the line-by-line address operation is an address operation in which scan pulses are sequentially applied to each of the scan electrodes 12 in the order in which the scan electrodes 12 are arranged on the panel 10.
  • the voltage Ve is applied to the sustain electrode SU1 to the sustain electrode SUn, and the voltage 0 (V) is applied to the data electrode D1 to the data electrode Dm.
  • Voltage Vc is applied to scan electrode SC1 through scan electrode SCn.
  • a negative scan pulse with a negative voltage Va is applied to the first (first line) scan electrode SC1 and the second (second line) scan electrode SC2 from the top in terms of arrangement.
  • a positive address pulse having a positive voltage Vd is applied to the data electrodes Dk of the discharge cells that should emit light in the first and second lines of the data electrodes D1 to Dm.
  • the voltage difference between data electrode Dk and scan electrode SC2 exceeds the discharge start voltage, and discharge occurs between data electrode Dk and scan electrode SC1, and between data electrode Dk and scan electrode SC2.
  • sustain electrode SU1 in a region intersecting data electrode Dk is induced by a discharge generated between data electrode Dk and scan electrode SC1. Discharge also occurs between scan electrode SC1 and scan electrode SC1. Similarly, a discharge is also generated between sustain electrode SU2 and scan electrode SC2 in a region intersecting data electrode Dk, induced by a discharge generated between data electrode Dk and scan electrode SC2.
  • address discharge is generated in the discharge cells (discharge cells to emit light) to which the scan pulse voltage Va and the address pulse voltage Vd are simultaneously applied.
  • the address operation in the first-line discharge cells and the second-line discharge cells is completed.
  • the discharge cell having the data electrode Dh to which the address pulse is not applied the data electrode Dh is the data electrode D1 to the data electrode Dm excluding the data electrode Dk
  • the intersection of the data electrode Dh and the scan electrode SC1 Since the voltage at the portion and the voltage at the intersection between the data electrode Dh and the scan electrode SC2 do not exceed the discharge start voltage, the address discharge does not occur and the wall voltage after the end of the initialization period Ti1 is maintained.
  • a scan pulse of voltage Va is applied to the third (third line) scan electrode SC3 and the fourth (fourth line) scan electrode SC4 from the top, and the third and fourth lines are arranged.
  • An address pulse of voltage Vd is applied to the data electrode Dk corresponding to the discharge cell that should emit light to the eye.
  • address discharge occurs in the discharge cells of the third line and the discharge cells of the fourth line to which the scan pulse and the address pulse are simultaneously applied.
  • the address operation is performed in the discharge cells of the third line and the fourth line.
  • the same addressing operation is sequentially performed in the order of scan electrode SC5 and scan electrode SC6, scan electrode SC7 and scan electrode SC8,..., Scan electrode SCn-1 and scan electrode SCn up to the discharge cell in the nth row.
  • An address discharge is selectively generated in the discharge cell to emit light, and a wall charge for sustain discharge is formed in the discharge cell.
  • the writing period Tw1 of the subfield SF1 ends.
  • the time required for the writing period for performing the simultaneous writing operation for every two lines is reduced to about half of the time required for the writing period for performing the writing operation for every one line.
  • the simultaneous write operation for every two lines is not limited to the write operation in which the scan pulse is simultaneously applied to the scan electrode SCp of the odd line and the scan electrode SCp + 1 of the next even line.
  • an address operation may be performed in which a scan pulse is simultaneously applied to the even-numbered scan electrode SCp + 1 and the next odd-numbered scan electrode SCp + 2.
  • the order in which the scan pulse is applied to the scan electrode 12 is not limited to the order described above. What is necessary is just to set arbitrarily the order which applies a scanning pulse to the scanning electrode 12 according to the specification etc. in an image display apparatus.
  • voltage Ve applied to sustain electrode SU1 through sustain electrode SUn in the second half of initialization period Ti1 and voltage Ve applied to sustain electrode SU1 through sustain electrode SUn in address period Tw1 may have different voltage values. .
  • the voltage 0 (V) is applied to the sustain electrodes SU1 to SUn. Then, sustain pulse of positive voltage Vs is applied to scan electrode SC1 through scan electrode SCn.
  • the voltage difference between the scan electrode SCi and the sustain electrode SUi exceeds the discharge start voltage, and is maintained between the scan electrode SCi and the sustain electrode SUi. Discharge occurs.
  • the phosphor layer 25 of the discharge cell in which the sustain discharge has occurred emits light by the ultraviolet rays generated by the sustain discharge.
  • a negative wall voltage is accumulated on scan electrode SCi
  • a positive wall voltage is accumulated on sustain electrode SUi.
  • a positive wall voltage is also accumulated on the data electrode Dk.
  • the sustain discharge does not occur in the discharge cells in which the address discharge has not occurred in the address period Tw1.
  • the sustain pulses of the number obtained by multiplying the gradation weight by a predetermined luminance multiple are alternately applied to scan electrode SC1 through scan electrode SCn and sustain electrode SU1 through sustain electrode SUn.
  • the discharge cells that have generated the address discharge in the address period generate the sustain discharges the number of times corresponding to the gradation weight, and emit light with the luminance corresponding to the gradation weight.
  • scan electrode SC1 to scan are performed while voltage 0 (V) is applied to sustain electrode SU1 to sustain electrode SUn and data electrode D1 to data electrode Dm.
  • An upward ramp waveform voltage that gradually rises from voltage 0 (V) to voltage Vr is applied to electrode SCn.
  • the sustain of the discharge cell that has generated the sustain discharge is maintained while the rising ramp waveform voltage applied to scan electrode SC1 through scan electrode SCn exceeds the discharge start voltage.
  • a weak discharge (erase discharge) is continuously generated between the electrode SUi and the scan electrode SCi.
  • the charged particles generated by this weak discharge are accumulated as wall charges on the sustain electrode SUi and the scan electrode SCi so as to reduce the voltage difference between the sustain electrode SUi and the scan electrode SCi.
  • the wall voltage on scan electrode SCi and the wall voltage on sustain electrode SUi are weakened while the positive wall voltage on data electrode Dk remains.
  • unnecessary wall charges in the discharge cell are erased.
  • the voltage 0 (V) is applied to the data electrodes D1 to Dm, and the positive voltage Ve is applied to the sustain electrodes SU1 to SUn.
  • Scan electrode SC1 to scan electrode SCn decrease from a voltage lower than the discharge start voltage (for example, voltage 0 (V)) toward negative voltage Vi4 at the same gradient as the downward ramp waveform voltage generated in initialization period Ti1. Apply a downward ramp waveform voltage.
  • the voltage Vi4 is set to a voltage exceeding the discharge start voltage.
  • the negative wall voltage on scan electrode SCi and the positive wall voltage on sustain electrode SUi are weakened.
  • an excessive portion of the positive wall voltage on the data electrode Dk is discharged.
  • the wall voltage in the discharge cell is adjusted to a wall voltage suitable for the address operation in the address period Tw2.
  • the voltage waveform described above is a selective initialization waveform in which an initializing discharge is selectively generated in a discharge cell that has performed an address operation in the address period (here, address period Tw1) of the immediately preceding subfield.
  • the operation of applying the selective initialization waveform to the scan electrode 12 is the selective initialization operation.
  • the voltage Ve is applied to the sustain electrode SU1 to the sustain electrode SUn, and the voltage 0 (to the data electrode D1 to the data electrode Dm, as in the address period Tw1. V) is applied, and voltage Vc is applied to scan electrode SC1 through scan electrode SCn.
  • a negative scan pulse having a negative voltage Va is applied to the first (first line) scan electrode SC1 in terms of arrangement.
  • a positive address pulse of a positive voltage Vd is applied to the data electrode Dk of the discharge cell that should emit light in the first line among the data electrodes D1 to Dm.
  • the voltage difference between the data electrode Dk and the scan electrode SC1 determines the discharge start voltage.
  • the address discharge occurs between the data electrode Dk and the scan electrode SC1 and between the sustain electrode SU1 and the scan electrode SC1 in the region intersecting with the data electrode Dk.
  • a positive wall voltage is accumulated on the scan electrode SC1
  • a negative wall voltage is accumulated on the sustain electrode SU1
  • a negative wall voltage is also accumulated on the data electrode Dk.
  • the address operation in the discharge cell on the first line is completed.
  • the discharge cell having the data electrode Dh to which the address pulse is not applied the data electrode Dh is the data electrode D1 to the data electrode Dm excluding the data electrode Dk
  • the intersection of the data electrode Dh and the scan electrode SC1 Since the voltage of the part does not exceed the discharge start voltage, the address discharge does not occur, and the wall voltage after the end of the initialization period Ti2 is maintained.
  • a scan pulse of the voltage Va is applied to the second (second line) scan electrode SC2 from the top, and the voltage Vd is applied to the data electrode Dk corresponding to the discharge cell that should emit light on the second line. Apply the write pulse. As a result, an address discharge is generated in the discharge cells of the second line to which the scan pulse and the address pulse are simultaneously applied. Thus, the write operation in the second line is performed.
  • the same addressing operation is sequentially performed in the order of scan electrode SC3, scan electrode SC4,..., Scan electrode SCn-1, and scan electrode SCn up to the discharge cell in the nth row, and is selected as a discharge cell to emit light. Address discharge is generated, and wall charges for sustain discharge are formed in the discharge cells. Thus, the writing period Tw2 of the subfield SF2 ends.
  • the address operation is performed for each line in which the scan pulse is sequentially applied to each of the scan electrodes SC1 to SCn.
  • sustain period Ts2 of subfield SF2 As in sustain period Ts1 of subfield SF1, the number of sustain pulses corresponding to the gradation weights are alternately applied to scan electrode SC1 through scan electrode SCn and sustain electrode SU1 through sustain electrode SUn. Apply.
  • a driving voltage waveform for performing a selective initialization operation is applied to each electrode in the same manner as in the initialization period Ti1 of the subfield SF2.
  • a driving voltage waveform for performing the simultaneous writing operation for every two lines is applied to each electrode as in the writing period Tw1 of the subfield SF1.
  • sustain period Ts3 of subfield SF3 as in sustain period Ts2 of subfield SF2, the number of sustain pulses corresponding to the gradation weights are alternately applied to scan electrode SC1 through scan electrode SCn and sustain electrode SU1 through sustain electrode SUn. Apply.
  • each subfield after subfield SF4 the same drive voltage waveform as in subfield SF3 is applied to each electrode except for the number of sustain pulses generated in the sustain period. That is, in each subfield after subfield SF4, the selective initialization operation is performed in the initialization period, and the simultaneous writing operation is performed every two lines in the writing period.
  • Voltage Va ⁇ 180 (V)
  • voltage Vc ⁇ 30 (V)
  • voltage Vs 190 (V)
  • voltage Vr 190 (V)
  • voltage Ve 120 (V)
  • voltage Vd 60 (V)
  • the gradient of the rising ramp waveform voltage generated in the initialization period Ti1 is about 1.3 V / ⁇ sec
  • the gradient of the rising ramp waveform voltage generated in each sustain period is about 10 V / ⁇ sec.
  • the gradient of the generated downward ramp waveform voltage is about ⁇ 1.5 V / ⁇ sec.
  • the specific numerical values such as the voltage value and the gradient described above are merely examples, and the present invention is not limited to the numerical values described above for each voltage value and the gradient.
  • Each voltage value, gradient, and the like are preferably set optimally based on the discharge characteristics of the panel and the specifications of the plasma display device.
  • subfield SF1 is a forced initialization subfield for performing a forced initialization operation
  • other subfields are a selective initialization subfield for performing a selective initialization operation
  • the present invention is not limited to this configuration.
  • the subfield SF1 may be a selective initialization subfield and other subfields may be forced initialization subfields, or a plurality of subfields may be forced initialization subfields.
  • FIG. 4 is a diagram schematically showing the subfield configuration of the image display device and the opening / closing operation of the shutter glasses in the embodiment of the present invention.
  • FIG. 4 shows scan electrode SC1 that performs the address operation first in the address period, scan electrode SCn that performs the address operation last in the address period, sustain electrode SU1 to sustain electrode SUn, and data electrode D1 to data electrode Dm.
  • the drive voltage waveform to be applied and the opening / closing operation of the right-eye shutter and the left-eye shutter are shown.
  • FIG. 4 shows three fields (field F1 to field F3).
  • a right eye field and a left eye field are alternately generated.
  • the field F1 and the field F3 are right-eye fields, and the field F2 is a left-eye field. Therefore, the right eye image signal is displayed on the panel 10 in the field F1 and the field F3, and the left eye image signal is displayed on the panel 10 in the field F2.
  • an image (right-eye image and left-eye image) displayed in two fields is recognized as one 3D image. Therefore, the number of images displayed on the panel 10 per second is observed by the user as half the number of fields displayed per second.
  • the field frequency of the 3D image displayed on the panel (the number of fields generated per second) is 60 Hz, the user will observe 30 3D images per second. Therefore, in order to display 60 3D images per second, the field frequency must be set to 120 Hz, which is twice 60 Hz.
  • the field frequency (the number of fields generated per second) is set to twice the normal frequency (for example, 120 Hz) so that the user can smoothly observe the 3D moving image. ing. Therefore, the time that can be used to display one right-eye image or one left-eye image is the time that can be used to display one 2D image (a normal image that is not a 3D image) with a field frequency of 60 Hz. Is limited to one-half of.
  • the opening / closing operation of the shutter for the right eye and the shutter for the left eye of the shutter glasses is controlled based on on / off of a shutter opening / closing timing signal.
  • the right-eye shutter opens in synchronization with the start of the writing period of the first subfield (subfield SF1) of the right-eye field (for example, field F1), and starts the left-eye field (for example, field F2).
  • the subfield (subfield SF1) is closed in synchronization with the start of the writing period.
  • the left-eye shutter opens in synchronization with the start of the writing period of the first subfield (subfield SF1) of the left-eye field (eg, field F2), and the first subfield (subfield) of the right-eye field (eg, field F3) Closed in synchronization with the start of the writing period of SF1).
  • one field is composed of a plurality of subfields in which gradation weights are determined in advance. Then, by combining a subfield that is lit (lighting subfield) and a subfield that is not lit (non-lighting subfield), each discharge cell emits light with a light emission luminance corresponding to the magnitude of the gradation value based on the image signal. .
  • subfield code a combination of a lighting subfield and a non-lighting subfield
  • code set a set of a plurality of subfield codes
  • a subfield code is selected from a plurality of subfield codes constituting a code set according to a gradation value. Then, light emission / non-light emission of each subfield is controlled based on the subfield code, and the discharge cell is caused to emit light with a luminance corresponding to the magnitude of the gradation value, and an image is displayed on the panel 10.
  • the gradation value when displaying black (the gradation value when no sustain discharge occurs) is assumed to be “0”.
  • a gradation value corresponding to the gradation weight “N” is expressed as a gradation value “N”.
  • the gradation value displayed by the discharge cells that emit light only in the subfield SF1 having the gradation weight “1” is the gradation value “1”.
  • FIG. 5 is a diagram showing an example of a code set when one field is composed of five subfields.
  • the numerical value written immediately below the notation indicating each subfield represents the gradation weight of each subfield.
  • one field includes five subfields from subfield SF1 to subfield SF5, and each subfield is “1”, “10”, “6”, “3”, “2”. ”Indicates a code set having a tone weight of“. ”
  • “1” indicates a light-emitting subfield
  • a blank field indicates a non-light-emitting subfield
  • the leftmost column indicates a gradation value to be displayed in each subfield code.
  • the subfield code corresponding to the gradation value “1” is “10000”.
  • subfield code it is assumed that 0 or 1 data is arranged in the order of subfield SF1, subfield SF2, subfield SF3, subfield SF4, and subfield SF5 from the left. In the following description, it is assumed that binary numerical values shown as subfield codes are arranged in the order of subfield SF1, subfield SF2, subfield SF3,.
  • the subfield code corresponding to the gradation value “10” is “10110”. Accordingly, in the discharge cell displaying the gradation value “10”, the subfield SF1, the subfield SF3, and the subfield SF4 emit light.
  • FIG. 6 is a diagram schematically showing an example of a circuit block and an image display system constituting the image display device 30 according to the embodiment of the present invention.
  • the image display system shown in the present embodiment includes an image display device 30 and shutter glasses 38 as constituent elements.
  • the image display device 30 includes a panel 10, a drive circuit that drives the panel 10, and a power supply circuit (not shown) that supplies power necessary for each circuit block.
  • the drive circuit includes an image signal processing circuit 31, a data electrode drive circuit 32, a scan electrode drive circuit 33, a sustain electrode drive circuit 34, and a timing generation circuit 35.
  • the drive circuit included in the image display device 30 includes one field including a first-type subfield that performs a writing operation for each line and a second-type subfield that performs a simultaneous writing operation for every two lines. Each drive voltage is generated and applied to each electrode.
  • the image signals input to the image signal processing circuit 31 are a red image signal, a green image signal, and a blue image signal. Based on the red image signal, the green image signal, and the blue image signal, the image signal processing circuit 31 sets each gradation value of red, green, and blue (a gradation value expressed by one field) to each discharge cell. To do.
  • the input image signal includes a luminance signal (Y signal) and a saturation signal (C signal, or RY signal and BY signal, or u signal and v signal, etc.).
  • a red image signal, a green image signal, and a blue image signal are calculated based on the luminance signal and the saturation signal, and then, each gradation value of red, green, and blue is set in each discharge cell.
  • the red, green, and blue gradation values set for each discharge cell are subfield codes indicating lighting / non-lighting for each subfield (light emission / non-light emission corresponds to digital signals “1” and “0”).
  • the subfield code is output as a display code. That is, the image signal processing circuit 31 converts the red image signal, the green image signal, and the blue image signal into a red display code, a green display code, and a blue display code and outputs the converted signals.
  • the image signal input to the image display device 30 is a 3D image signal having a right-eye image signal and a left-eye image signal.
  • the image signal processing circuit 31 converts the right-eye image signal into a right-eye display code (red right-eye display code, green right-eye display code, blue right-eye display code), and converts the left-eye image signal to the left-eye.
  • Display code red left eye display code, green left eye display code, blue left eye display code
  • the image signal processing circuit 31 does not convert an image signal into a subfield code using a conversion table, but converts the image signal into a subfield code by a logical operation. Details of this will be described later.
  • the timing generation circuit 35 generates various timing signals for controlling the operation of each circuit block based on the horizontal synchronization signal and the vertical synchronization signal.
  • the generated timing signal is supplied to each circuit block (data electrode drive circuit 32, scan electrode drive circuit 33, sustain electrode drive circuit 34, image signal processing circuit 31, etc.).
  • Scan electrode drive circuit 33 includes a ramp waveform generation unit, a sustain pulse generation unit, and a scan pulse generation unit (not shown in FIG. 6), and generates a drive voltage waveform based on a timing signal supplied from timing generation circuit 35. Then, the voltage is applied to each of scan electrode SC1 to scan electrode SCn.
  • the ramp waveform generator generates a forced initialization waveform and a selective initialization waveform to be applied to scan electrode SC1 through scan electrode SCn during the initialization period based on the timing signal.
  • the sustain pulse generator generates a sustain pulse to be applied to scan electrode SC1 through scan electrode SCn during the sustain period based on the timing signal.
  • the scan pulse generator includes a plurality of scan electrode drive ICs (scan ICs), and generates scan pulses to be applied to scan electrode SC1 through scan electrode SCn during the address period based on the timing signal.
  • the scanning electrode drive circuit 33 sequentially applies scanning pulses to two adjacent scanning electrodes 12 in the order in which the scanning electrodes 12 are arranged on the panel 10 in the address period in which the simultaneous writing operation is performed every two lines. .
  • the scan pulse is sequentially applied to each of the scan electrodes SC1 to SCn in the order in which the scan electrodes 12 are arranged on the panel 10.
  • Sustain electrode drive circuit 34 includes a sustain pulse generation unit and a circuit (not shown in FIG. 5) for generating voltage Ve, and generates and maintains a drive voltage waveform based on the timing signal supplied from timing generation circuit 35.
  • the voltage is applied to each of electrode SU1 through sustain electrode SUn.
  • a sustain pulse is generated based on the timing signal and applied to sustain electrode SU1 through sustain electrode SUn.
  • voltage Ve is generated based on the timing signal and applied to sustain electrode SU1 through sustain electrode SUn.
  • the data electrode drive circuit 32 is based on the right eye display code and the left eye display code of each color output from the image signal processing circuit 31 and the timing signal supplied from the timing generation circuit 35. A write pulse corresponding to is generated. Then, the data electrode drive circuit 32 applies the address pulse to the data electrodes D1 to Dm during the address period.
  • the purpose of the image signal processing circuit 31 in the present embodiment is to reduce the time required for the writing period while preventing the image display quality in the image display device 30 from deteriorating.
  • the distinction between the image signal for the right eye and the image signal for the left eye is not mentioned, and they are collectively referred to as an image signal.
  • the value of the image signal is assumed to be equal to the gradation value to be displayed on the target pixel.
  • the pixel of interest is a pixel that is an object of calculation at that time.
  • FIG. 7 is a diagram schematically showing an example of a circuit block constituting the image signal processing circuit 31 of the image display device 30 according to an embodiment of the present invention.
  • the image signal processing circuit 31 includes a one horizontal period delay unit 41, a line average unit 42, a two line difference unit 43, a subtraction unit 44, an average code conversion unit 45, a difference code creation unit 91, and a display code synthesis unit 92.
  • the one horizontal period delay unit 41 is abbreviated as “1H delay unit 41”.
  • the 1H delay unit 41 delays the image signal input to the image signal processing circuit 31 by one horizontal period. Therefore, the image signal output from the 1H delay unit 41 is an image signal one line before the target pixel, and is an image signal of a pixel adjacent to the target pixel. That is, if the image signal of the pixel of interest is the image signal of the pixel on the (p + 1) line, the image signal output from the 1H delay unit 41 is the image signal of the pixel on the p line.
  • pixels continuously arranged on one data electrode 22 are referred to as “vertically continuous pixels”.
  • pixels continuously arranged on one display electrode pair 14 are referred to as “horizontal pixels”. Therefore, the pixels adjacent above and below the pixel of interest are pixels adjacent to the pixel of interest on one data electrode 22.
  • the pixels adjacent to the left and right of the target pixel are pixels adjacent to the target pixel on one display electrode pair 14.
  • the vertical direction is a direction in which the data electrode 22 extends
  • the horizontal direction is a direction in which the display electrode pair 14 extends.
  • the two-line averaging unit 42 is two pixels adjacent in the vertical direction (two pixels adjacent in the direction orthogonal to the scanning electrode 12), and the writing operation is performed simultaneously when performing the simultaneous writing operation every two lines. An average value of the image signals corresponding to each of the two pixels is calculated. Hereinafter, these two pixels are also referred to as “a pair of pixels”. That is, the 2-line average unit 42 calculates an average value of the image signal corresponding to the pixel on the p-th line and the image signal corresponding to the pixel on the (p + 1) -th line. Hereinafter, this average value is referred to as an “average image signal”. Therefore, the output of the 2-line averaging unit 42 is an average image signal of pixels on the p-th line and the (p + 1) -th line. Note that p is an odd number.
  • the two-line difference unit 43 is two pixels adjacent in the vertical direction (two pixels adjacent in the direction orthogonal to the scanning electrode 12), and performs a write operation simultaneously when performing a two-line simultaneous write operation.
  • the difference value of the image signal corresponding to each of the two pixels (a pair of pixels) is calculated.
  • the two-line difference unit 43 compares the difference value with the gradation weight of the first type subfield.
  • the 2-line difference unit 43 subtracts the image signal corresponding to the pixel on the (p + 1) line from the image signal corresponding to the pixel on the p line to calculate a difference value. Then, the two-line difference unit 43 compares the calculated difference value with the gradation weight Wth of the first type subfield (subfield SF2 in the present embodiment).
  • the gradation weight Wth of the first type subfield (subfield SF2 in the present embodiment) is referred to as “gradation threshold Wth”.
  • the two-line difference unit 43 outputs “1” if the difference value is equal to or greater than the gradation threshold value Wth.
  • the 2-line difference unit 43 outputs “ ⁇ 1” if the difference value is equal to or less than ( ⁇ 1) ⁇ (tone threshold Wth).
  • the 2-line difference unit 43 outputs “0” if the difference value is larger than ( ⁇ 1) ⁇ (gradation threshold value Wth) and less than the gradation threshold value Wth.
  • the two-line difference unit 43 performs the following three operations. 1) When Wth ⁇ (difference value), “1” is output. 2) When -Wth ⁇ (difference value) ⁇ Wth, “0” is output. 3) When (difference value) ⁇ ⁇ Wth, “ ⁇ 1” is output.
  • the subtracting unit 44 subtracts a predetermined variable determined based on the output of the two-line difference unit 43 from the output of the two-line averaging unit 42. That is, the subtracting unit 44 subtracts a predetermined variable determined by the difference value of the image signal of the pair of pixels from the average image signal of the pair of pixels.
  • this predetermined variable is set to “1/2 of the gradation threshold value Wth”. If the output of the 2-line difference unit 43 is “0”, the predetermined variable is set to “0”.
  • the subtraction unit 44 subtracts 1 ⁇ 2 of the gradation threshold value Wth from the average image signal output from the 2-line average unit 42. To do. Then, the subtraction result is output as an image signal of a pixel on the p-th line and a pixel on the (p + 1) -th line (a pair of pixels on the p-th line and the (p + 1) -th line).
  • the subtracting unit 44 uses the average image signal output from the two-line averaging unit 42 as it is as the pixel on the p-th line and the pixel on the (p + 1) -th line. This is output as an image signal (a pair of pixels on the p-th line and the (p + 1) -th line).
  • the average code conversion unit 45 converts the image signal output from the subtraction unit 44 into a subfield code having a predetermined subfield as a non-lighting subfield.
  • This predetermined subfield is a subfield determined by the output of the 2-line difference unit 43 (comparison result in the 2-line difference unit 43).
  • the average code conversion unit 45 converts the image signal of the pair of pixels on the p-th line and the (p + 1) -th line output from the subtraction unit 44 into a subfield code. At this time, if the output of the two-line difference unit 43 is “1” or “ ⁇ 1”, the average code conversion unit 45 in the present embodiment performs the first type subfield (subfield SF2 in the present embodiment). ) To the non-lit subfield.
  • the subfield code output from the average code conversion unit 45 is “X0XXX”.
  • This subfield code represents a lighting subfield as “1” and a non-lighting subfield as “0”, and “X” represents either “0” or “1”. .
  • subfield SF1 subfield SF2
  • subfield SF3 subfield SF4
  • subfield SF5 subfield SF5
  • the difference code creation unit 91 generates a subfield code for controlling the first type subfield (subfield SF2 in the present embodiment), which is a predetermined subfield, based on the output of the two-line difference unit 43.
  • the difference code creation unit 91 sets the subfield code “ -1 ---- "is output. Further, for the image signal of the pixel on the (p + 1) -th line, a subfield code “ ⁇ 0 ⁇ ” is output that sets the subfield SF2 to a non-lighting subfield.
  • the difference code creation unit 91 sets the subfield SF2 as a non-lighting subfield for the image signal of the pixel on the p-th line.
  • the code “ ⁇ 0 ⁇ ” is output.
  • the subfield code “ ⁇ 1 ⁇ ” which outputs the subfield SF2 as the lighting subfield is output.
  • the difference code creation unit 91 applies the subfield SF2 to the image signal of the pixel on the p-th line and the image signal of the pixel on the (p + 1) -th line.
  • the sub-field code “-----” that does not control is output.
  • subfields that are not subject to control are represented by “-”.
  • the image signal processing circuit 31 in the present embodiment synthesizes the output of the average code conversion unit 45 and the output of the difference code creation unit 91 by a logical sum operation in the display code synthesis unit 92. Therefore, the differential code creation unit 91 outputs the bit corresponding to “ ⁇ ” replaced with “0” in consideration of the logical OR operation performed in the subsequent stage.
  • bit is data constituting a subfield code, and a numerical value of 1 or 0 represented by each bit represents lighting or non-lighting in each subfield.
  • the display code synthesis unit 92 creates a display code by synthesizing the subfield code output from the average code conversion unit 45 and the subfield code output from the difference code creation unit 91.
  • the display code synthesis unit 92 includes a subfield code corresponding to the p-th pixel output from the average code conversion unit 45, and a subfield code corresponding to the p-th pixel output from the difference code creation unit 91. Is ORed for each bit. Then, the result of the logical sum operation is output to the data electrode driving circuit 32 as a display code of the pixel on the p-th line.
  • the display code is a subfield code actually used for image display.
  • the display code synthesis unit 92 applies the subfield code corresponding to the (p + 1) line pixel output from the average code conversion unit 45 and the (p + 1) line pixel output from the difference code creation unit 91.
  • the corresponding subfield code is ORed for each bit. Then, the result of the logical sum operation is output to the data electrode driving circuit 32 as the display code of the pixel on the (p + 1) line.
  • the display is performed on the panel 10 even when the simultaneous writing operation is performed every two lines in the writing period in order to shorten the writing period. It is possible to suppress a decrease in the vertical resolution of the image to be displayed.
  • the image signal processing circuit 31 for performing the simultaneous writing operation every two lines with the odd-numbered scan electrode SCp and the next even-numbered scan electrode SCp + 1 as one pair in the write period.
  • the operation of 31 has been described, the present invention is not limited to this configuration.
  • the image signal processing circuit 31 performs the operation on the scan electrode SCp + 1. It is assumed that the same operation as described above is performed with the pixel and the pixel on the scan electrode SCp + 1 as a pair of pixels.
  • FIG. 8A is a diagram schematically showing an example of a write operation in the image signal processing circuit 31 of the image display device 30 according to the embodiment of the present invention.
  • FIG. 8B is a diagram schematically showing another example of the writing operation in the image signal processing circuit 31 of the image display device 30 according to the embodiment of the present invention.
  • FIG. 8C is a diagram schematically showing another example of the writing operation in the image signal processing circuit 31 of the image display device 30 according to the embodiment of the present invention.
  • FIG. 8D is a diagram schematically showing another example of the writing operation in the image signal processing circuit 31 of the image display device 30 according to the embodiment of the present invention.
  • FIG. 8E is a diagram schematically showing another example of the writing operation in the image signal processing circuit 31 of the image display device 30 according to the embodiment of the present invention.
  • FIG. 8F is a diagram schematically showing another example of the writing operation in the image signal processing circuit 31 of the image display device 30 according to the embodiment of the present invention.
  • FIG. 8G is a diagram schematically showing another example of the writing operation in the image signal processing circuit 31 of the image display device 30 according to the embodiment of the present invention.
  • FIG. 8A is a diagram schematically illustrating an example of an image signal input to the image signal processing circuit 31.
  • FIG. 8B is a diagram schematically illustrating an example of an image displayed on the panel 10 when it is assumed that the simultaneous writing operation is performed every two lines in the writing period of all the subfields.
  • FIG. 8C is a diagram schematically illustrating an example of an average image signal output from the two-line average unit 42.
  • FIG. 8D is a diagram schematically illustrating an example of an image signal output from the subtracting unit 44.
  • FIG. 8E is a diagram schematically illustrating an example of the output of the 2-line difference unit 43.
  • FIG. 8F is a diagram schematically showing lighting / non-lighting of the first type subfield based on the subfield code output from the difference code creating unit 91.
  • FIG. 8G is a diagram schematically showing an example of a display image based on the subfield code output from the display code synthesis unit 92.
  • 8A to 8G one column represents one pixel.
  • 8A to 8G (excluding FIG. 8E), white columns represent pixels that are lit, and black columns represent pixels that are not lit.
  • 8E shows the output (“1” or “ ⁇ 1”) of the 2-line difference unit 43, and the output “0” of the 2-line difference unit 43 is indicated by a blank.
  • the 2-line average unit 42 is a circuit block provided to prevent such information loss.
  • the two-line averaging unit 42 calculates an average value of the image signal of the pixel on the p-th line and the image signal of the pixel on the (p + 1) -th line, and outputs them as image signals for the p-th line and the (p + 1) -th line. To do. Thereby, as shown to FIG. 8C, it can prevent that the information which should be displayed on the panel 10 is missing.
  • the first type subfield (in this embodiment, subfield SF2) for performing the writing operation for each line is provided in one field. .
  • the image signal processing circuit 31 includes a two-line difference unit 43 and a difference code creation unit 91.
  • the two-line difference unit 43 is a circuit block for detecting a pixel that should compensate for the decrease in vertical resolution
  • the difference code creation unit 91 is a first-type subfield (this embodiment) for compensating for the decrease in vertical resolution.
  • the circuit block for generating a subfield code for controlling the subfield SF2).
  • the image signal processing circuit 31 includes a subtraction unit 44 and a display code synthesis unit 92.
  • the subtraction unit 44 and the display code synthesis unit 92 are circuit blocks for generating a display code based on the subfield code created by the difference code creation unit 91.
  • the two-line difference unit 43 changes the gradation value to be equal to or higher than the gradation threshold Wth between the image signal of the pixel on the p-th line and the image signal of the pixel on the (p + 1) -th line.
  • Wth the gradation threshold
  • the difference code creation unit 91 turns on the first type subfield (subfield SF2 in the present embodiment) with the pixels marked with “1” in FIG. 8E and does not light up with the pixels marked with “ ⁇ 1”. Create a subfield code. As a result, each pixel is turned on or off in the first type subfield (subfield SF2 in this embodiment) as shown in FIG. 8F. In FIG. 8F, each pixel not shown in the column represents lighting or non-lighting based on the image signal.
  • the subtracting unit 44 uses a pixel in which the output of the two-line difference unit 43 is “1” or “ ⁇ 1” (for example, a pixel marked “1” or “ ⁇ 1” in FIG. 8E) 2), 1/2 of the gradation threshold value Wth is subtracted from the average image signal output from the two-line average unit 42.
  • the average code conversion unit 45 converts the image signal output from the subtraction unit 44 into a subfield code.
  • the first type subfield in this embodiment, the sub-field The field SF2
  • the second type subfield in this embodiment, the subfield excluding the subfield SF2
  • the average code conversion unit 45 converts all the subfields into subfield codes based on the image signal output from the subtraction unit 44 for the other pixels (pixels whose output from the two-line difference unit 43 is “0”). To do.
  • the display code synthesis unit 92 synthesizes the subfield code output from the average code conversion unit 45 and the subfield code output from the difference code creation unit 91 by a logical sum operation, and actually displays the image on the image display.
  • a display code to be used is output to the data electrode drive circuit 32.
  • the image signal processing circuit 31 in the present exemplary embodiment displays an image in which the vertical resolution is prevented from lowering compared to the original image signal (for example, the image shown in FIG. 8A). 10 can be displayed. That is, the image signal processing circuit 31 in the present embodiment has a vertical resolution compared to an image (for example, the image shown in FIG. 8B) when performing the simultaneous writing operation every two lines in the writing period of all subfields. It is possible to improve and display an image of a smooth diagonal line on the panel 10.
  • FIG. 9 is a diagram schematically showing an example of a circuit block constituting the average code conversion unit 45 of the image display device 30 according to the embodiment of the present invention.
  • the average code conversion unit 45 includes an attribute detection unit 49, a base code generation unit 50, a rule generation unit 61, an upper and lower code generation unit 70, and an average code selection unit 80.
  • the attribute detection unit 49 specifies the relationship between the image signal and the position of the pixel displaying the image signal.
  • the time differentiation of the image signal corresponding to each pixel determines whether each pixel is in the moving image area or the still image area. Detect if there is any.
  • a change in brightness is detected by spatial differentiation of the image signal (detecting a change in the image signal between adjacent pixels), and it is detected whether or not each pixel corresponds to the contour portion of the image. Then, those detection results are output as attributes of the image signal corresponding to each pixel.
  • a subfield code that is basic in subsequent signal processing is referred to as a “basic code”, and a code set including the base code is referred to as a “basic code set”.
  • the base code is a subfield code generated by lighting one by one or two in order from the subfield having the smallest gradation weight. Therefore, the base code is a subfield code in which a subfield having the largest gradation weight among the subfields to emit light and all subfields having a gradation weight smaller than that subfield emit light.
  • “deleted base code” is set based on the base code set.
  • the deleted base code is a subfield code in which a predetermined subfield determined by the output of the two-line difference unit 43 among the lighting subfields of the base code is a non-lighting subfield.
  • a subfield code set in which a predetermined subfield determined by the output of the two-line difference unit 43 is a non-lighting subfield is referred to as a “deleted base code set”.
  • the base code generation unit 50 selects “base code set” or “deleted base code set” based on the tone value of the image signal output from the subtraction unit 44 (hereinafter referred to as “input tone”). Select "Upper gradation basis code”.
  • the upper tone base code is a base code or a deleted base code having a tone value larger than the input tone and having a tone value closest to the input tone.
  • the base code generation unit 50 selects a base code having a gradation value larger than the input gradation and closest to the input gradation in the base code set as the upper gradation base code, Output.
  • the base code generation unit 50 selects a deleted base code having a gradation value larger than the input gradation and closest to the input gradation as the upper gradation base code in the deleted base code set, Output it.
  • FIG. 10A is a diagram illustrating an example of a base code set used in the image display device 30 according to an embodiment of the present invention.
  • FIG. 10B is a diagram showing an example of a deleted base code set used in the image display device 30 according to the embodiment of the present invention.
  • the light-emitting subfield is “1”
  • the non-light-emitting subfield is blank
  • each subfield code (base code or deleted) is displayed in the second column from the left.
  • base code represents a gradation value to be displayed in (base code).
  • the numerical value written immediately below the notation indicating each subfield in each code set represents the gradation weight of each subfield.
  • FIG. 10A shows a base code set used when the output of the 2-line difference unit 43 is “0”.
  • one field is composed of five subfields, and each subfield is “1”, “10”, “6”, “3”, “3” in order from the subfield SF1. 2 "gradation weight.
  • the first subfield (subfield SF1) of one field is the subfield having the smallest gradation weight
  • the second subfield (subfield SF2) is the subfield having the largest gradation weight.
  • the subfields are arranged so that the gradation weights are sequentially reduced. And it is set as a lighting subfield one by one in an order from the subfield with the smallest gradation weight. Therefore, the number of base codes included in this base code set is (the number of subfields constituting one field + 1). For example, in the example of the base code set shown in FIG. 10A, the number of base codes is 6.
  • FIG. 10B shows a deleted base code set used when the output of the 2-line difference unit 43 is “1” or “ ⁇ 1”.
  • the deleted base code set shown in FIG. 10B is a subfield code set generated from the base code set shown in FIG. 10A with a predetermined subfield determined by the output of the two-line difference unit 43 as a non-lighting subfield. is there.
  • this predetermined subfield is a first type subfield (in this embodiment, subfield SF2). Therefore, the deleted base code set shown in FIG. 10B is a subfield code set in which the subfield SF2 is a non-lighting subfield from the base code set shown in FIG. 10A.
  • the subfield SF2 is a subfield having the largest gradation weight. Therefore, the deleted base code set shown in FIG. 10B is equal to the code set obtained by removing the base code “11111” having the gradation value “22” from the base code set shown in FIG. 10A.
  • the image display device 30 in the present embodiment generates a new code set based on the code set as described above, and converts the input gradation into a subfield code using the code set.
  • the base code generation unit 50 includes a base code set selection unit 52 and a base code selection unit 54.
  • the base code set selection unit 52 stores the base code set and gradation values of a plurality of base codes constituting the base code set. In addition, the base code set selection unit 52 stores the gradation values of the deleted base code set and the plurality of deleted base codes constituting the deleted base code set. Each base code and each gradation value of the base code are stored in the base code set selection unit 52 in association with each other.
  • This base code set is, for example, the base code set shown in FIG. 10A.
  • Each deleted base code and each gradation value of the deleted base code are stored in the base code set selection unit 52 in association with each other.
  • This deleted base code set is, for example, the deleted base code set shown in FIG. 10B.
  • the base code set selection unit 52 selects a base code set (for example, the base code set shown in FIG. If the output is “1” or “ ⁇ 1”, the deleted base code set (for example, the deleted base code set shown in FIG. 10B) is selected.
  • the base code selection unit 54 includes a subfield code (a base code constituting the base code set or a deleted base code constituting the deleted base code set) constituting the code set selected by the base code set selection unit 52. Code) and the input gradation are compared. Then, a subfield code (base code or deleted base code) having a gradation value larger than the input gradation and closest to the input gradation is selected. Then, the selected subfield code is output as the upper gradation base code.
  • a subfield code a base code constituting the base code set or a deleted base code constituting the deleted base code set
  • the base code generation unit 50 selects a base code (or a deleted base code) having a gradation value larger than the input gradation and closest to the input gradation, and uses the selected base code as the upper gradation base. Output as code.
  • a new subfield code not included in the base code set is obtained by changing the lighting subfield in the upper gradation base code to the non-lighting subfield based on the image signal output from the subtracting unit 44. Is generated.
  • the rule generation unit 61 generates a rule for generating this new subfield code.
  • the rule generation unit 61 increases the number of subfield codes used for image display, the image signal output from the subtraction unit 44, and the attribute detected by the attribute detection unit 49 (the attribute associated with the image signal). ) To generate a rule for changing the lighting subfield in the upper gradation base code selected by the base code generation unit 50 to the non-lighting subfield.
  • the rule generated by the rule generation unit 61 defines a rule for changing the lighting subfield in the upper gradation base code to the non-lighting subfield.
  • the rule generated by the rule generation unit 61 restricts subfields to be changed from lighting to non-lighting in the upper gradation base code. This is because the gradation value of the new subfield code created by changing the lighting subfield to the non-lighting subfield in the upper gradation basis code is smaller than the upper gradation basis code (or the deleted basis). This is so that it does not fall below the gradation value of (code).
  • the upper gradation base code allows unlimited subfields to change from lighting to non-lighting, all lighting subfields become non-lighting subfields, and subfield codes with a gradation value of “0” are generated. This is because there is a possibility that it may occur.
  • the rule generation unit 61 generates a rule so that the subfield code generated based on the rule has the next gradation value.
  • the “lower gradation base code” is a base code (or a deleted base code) having a gradation value that is equal to or lower than the input gradation and closest to the input gradation.
  • the rule generated by the rule generation unit 61 is composed of one or more of the following three rules. 1) A rule for setting the first subfield to be changed from the lighting subfield to the non-lighting subfield. 2) A rule for setting the second subfield to be changed from the lighting subfield to the non-lighting subfield. 3) A rule for setting a sub-field that prohibits non-lighting.
  • the upper / lower code generation unit 70 applies the rule generated by the rule generation unit 61 to the upper gradation base code output from the base code generation unit 50 to generate an upper gradation code and a lower gradation code.
  • the upper gradation code is a sub-field code that can be newly generated based on the rule generated by the rule generation unit 61 and has a gradation value larger than the input gradation and closest to the input gradation. It is a field code.
  • the lower gradation code has a gradation value that is equal to or lower than the input gradation and closest to the input gradation among subfield codes that can be newly generated based on the rule generated by the rule generation unit 61. It is a subfield code.
  • the upper / lower code generation unit 70 includes an intermediate code generation unit 72 and an upper / lower code selection unit 74.
  • the intermediate code generation unit 72 changes the lighting subfield in the upper gradation base code to the non-lighting subfield and generates a new subfield code.
  • the newly generated subfield code is referred to as “intermediate code”.
  • a set obtained by adding the original upper tone base code to these intermediate codes is referred to as an “intermediate code set”.
  • FIG. 11A is a diagram illustrating an example of an intermediate code set generated by the intermediate code generation unit 72 of the image display device 30 according to the embodiment of the present invention.
  • FIG. 11B is a diagram illustrating another example of the intermediate code set generated by the intermediate code generation unit 72 of the image display device 30 according to the embodiment of the present invention.
  • FIG. 11C is a diagram illustrating another example of the intermediate code set generated by the intermediate code generation unit 72 of the image display device 30 according to the embodiment of the present invention.
  • the light emitting subfield is indicated by “1”
  • the non-light emitting subfield is indicated by a blank
  • each subfield code (intermediate) is indicated in the second column from the left.
  • Code) represents the gradation value to be displayed.
  • the numerical value written immediately below the notation indicating each subfield in each intermediate code set represents the gradation weight of each subfield.
  • one field includes five subfields, and each subfield is “1”, “10”, and “6” in order from the subfield SF1. , “3” and “2”.
  • FIG. 11A as an example of the intermediate code set, “1) Rules for setting the first subfield to be changed from the lighting subfield to the non-lighting subfield” are shown in FIGS. 10A and 10B.
  • rule 1 This “1) rule for setting the first subfield to be changed from a lighting subfield to a non-lighting subfield” is a rule that “one of the lighting subfields is changed to a non-lighting subfield”. (Hereinafter referred to as “rule 1”).
  • the subfield SF1 and four subfields from the subfield SF3 to the subfield SF5 are lit. It becomes a subfield.
  • the subfield code “10011” obtained by changing the subfield SF3 to the non-lighting subfield is the base code (or the deleted base code) of the gradation value “6” shown in FIG. 10A (or FIG. 10B) (No. It is equal to 4). Accordingly, three subfield codes excluding the subfield code “10011” are newly generated intermediate codes.
  • FIG. 11B as an example of the intermediate code set, in addition to the above-described rule 1, “2) a rule for setting the second subfield to be changed from the lighting subfield to the non-lighting subfield” is shown in FIG.
  • Rule 2 for setting the second subfield to be changed from the lighting subfield to the non-lighting subfield is “the subfield code having the smallest gradation value among the newly generated intermediate codes”.
  • the sub-field SF5 is a non-lighting sub-field ”(hereinafter referred to as“ rule 2 ”).
  • rule 1 By applying rule 1 to the base code of gradation value “12” shown in FIG. 10A (or the deleted base code of gradation value “12” shown in FIG. 10B) “10111” (No. 5). As shown in FIG. 11A, three new subfield codes are generated. Of these three subfield codes, the “subfield code with the smallest gradation value among the newly generated intermediate codes” is the subfield code “10101” with the gradation value “9”.
  • rule 1 and rule 2 are applied to the base code of the gradation value “12” shown in FIG. 10A (or the deleted base code of the gradation value “12” shown in FIG. 10B) “10111”. Then, four new subfield codes can be generated as intermediate codes.
  • FIG. 9C as an example of the intermediate code set, in addition to the above-described rule 1, “3) a rule for setting a subfield that prohibits non-lighting” is shown in the gradation value ““3 a rule for setting a subfield that prohibits non-lighting” is shown in the gradation value “3 a rule for setting a subfield that prohibits non-lighting” is shown in the gradation value “3 a rule for setting a subfield that prohibits non-lighting” is shown in the gradation value “ The intermediate code set generated by applying to the base code of “12” (or the deleted base code of the gradation value “12” shown in FIG. 10B) “10111” is shown.
  • rule 3 This “3) rule for setting a subfield that prohibits non-lighting” is a rule that “subfield SF1 is prohibited from being a non-lighting subfield” (hereinafter referred to as “rule 3”). ).
  • rule 1 By applying rule 1 to the base code of gradation value “12” shown in FIG. 10A (or the deleted base code of gradation value “12” shown in FIG. 10B) “10111” (No. 5). As shown in FIG. 11A, three new subfield codes are generated. Of these three subfield codes, the “subfield code whose subfield SF1 is a non-lighting subfield” is a subfield code “00111” having a gradation value of “11”.
  • rule 1 and rule 3 described above are applied to the base code of the gradation value “12” shown in FIG. 10A (or the deleted base code of the gradation value “12” shown in FIG. 10B) “10111”. Then, two new subfield codes can be generated as intermediate codes.
  • the intermediate code generation unit 72 applies the rule generated by the rule generation unit 61 to the upper gradation base code output from the base code generation unit 50 to generate an intermediate code, and the intermediate code set Is generated.
  • rule 1 and rule 3 are used when generating intermediate code.
  • rule 2 may be added when generating intermediate code.
  • the image display device 30 displays an image with relatively low power consumption, or when an image with relatively little occurrence of moving image pseudo contour is displayed, the number of intermediate codes generated can be increased. It is. Then, by increasing the number of intermediate codes generated, an image can be displayed with a smoother gradation change.
  • the upper / lower code selection unit 74 compares each gradation value of the subfield code constituting the intermediate code set generated by the intermediate code generation unit 72 with the input gradation. Then, the upper / lower code selection unit 74 selects a subfield code having a gradation value larger than the input gradation and closest to the input gradation, and outputs it as an upper gradation code. In addition, the upper / lower code selection unit 74 selects a subfield code having a gradation value equal to or lower than the input gradation and closest to the input gradation, and outputs it as a lower gradation code.
  • the average code selection unit 80 adds a predetermined value to the input gradation and calculates a gradation value to be displayed on the pixel pair of interest. Then, the average code selection unit 80 selects one of the upper gradation code and the lower gradation code that has a gradation value closer to the gradation value to be displayed on the target pixel pair, and outputs it.
  • the pixel-of-interest pair is a pair of pixels that are the targets of gradation value calculation at that time.
  • the above-described predetermined value added to the input gradation is an error diffused by the error diffusion process and a dither value calculated by the dither process. Therefore, the average code selection unit 80 adds the error and the dither value to the input gradation, calculates the gradation value to be displayed on the pixel pair of interest, and selects the attention value of the upper gradation code and the lower gradation code. The one having a gradation value closer to the gradation value to be displayed on the pixel pair is selected.
  • the average code selection unit 80 calculates the difference between the gradation value to be displayed on the target pixel pair and the selected gradation value, and diffuses the difference as an error to surrounding pixels.
  • the average code selection unit 80 includes a dither selection unit 82, an error diffusion unit 84, and an average code determination unit 86.
  • the dither selection unit 82 stores a plurality of dither patterns. Then, one dither pattern based on the image signal output from the subtraction unit 44 (hereinafter simply referred to as “image signal”) and the attribute detected by the attribute detection unit 49 from among the plurality of stored dither patterns. Select.
  • the dither selection unit 82 selects a dither element corresponding to the position of the pixel from the selected dither pattern based on the position of the pixel displaying the image signal. Further, the dither selection unit 82 calculates the dither value by multiplying the selected dither element by the difference between the gradation value of the upper gradation code and the gradation value of the lower gradation code.
  • the same dither element is given to each of a pair of pixels that simultaneously perform the write operation in the second type subfield.
  • FIG. 12A is a diagram showing an example of a dither pattern used in the image display device 30 according to the embodiment of the present invention.
  • FIG. 12B is a diagram showing another example of the dither pattern used in the image display device 30 according to the embodiment of the present invention.
  • one column represents one pixel.
  • FIG. 12A shows the simplest binary dither.
  • “+0.25” and “ ⁇ 0.25” are arranged in a checkered pattern as dither elements.
  • FIG. 12B is a diagram showing an example of a quaternary dither. In FIG. 12B, dither elements “+0.375”, “+0.125”, “ ⁇ 0.375” and “ ⁇ 0.125” are arranged.
  • the error diffusion unit 84 outputs an error to be added to the target pixel pair to the average code determination unit 86 and diffuses the error output from the average code determination unit 86 to the peripheral pixels of the target pixel pair.
  • the error diffusion unit 84 diffuses the same error to each of a pair of pixels that simultaneously perform the write operation in the second type subfield.
  • the dither selection unit 82 stores, for example, the two types of dither patterns shown in FIGS. 12A and 12B, and selects one of the dither patterns based on the attributes detected by the image signal and the attribute detection unit 49. .
  • the dither pattern shown in FIG. 12A is selected, the dither element is either “+0.25” or “ ⁇ 0.25”.
  • the dither element shown in FIG. 12B is selected, the dither element is “+0”. .375 ”,“ +0.125 ”,“ ⁇ 0.375 ”, and“ ⁇ 0.125 ”.
  • the dither selection unit 82 selects any one of these dither elements based on the position of the pixel displaying the image signal. Further, the dither value is calculated by multiplying the selected dither element by the difference between the tone value of the upper tone code and the tone value of the lower tone code. Then, the calculated dither value is added to the input gradation in the average code selection unit 80.
  • FIG. 13 is a diagram showing error diffusion coefficients of the error diffusion unit 84 of the image display device 30 according to the embodiment of the present invention.
  • one column represents one pixel.
  • the middle column in FIG. 13 represents a pair of pixels (target pixel pair) that are to be subjected to error diffusion processing.
  • the error diffusion unit 84 diffuses (adds) a value obtained by multiplying the error generated in the pair of pixels arranged at the upper left of the target pixel pair by the diffusion coefficient k1 to the target pixel pair. Further, the error diffusion unit 84 diffuses (adds) a value obtained by multiplying the error generated in the pair of pixels arranged on the target pixel pair by the diffusion coefficient k2 to the target pixel pair. Further, the error diffusion unit 84 diffuses (adds) a value obtained by multiplying the error generated in the pair of pixels arranged at the upper right of the target pixel pair by the diffusion coefficient k3 to the target pixel pair. Further, the error diffusion unit 84 diffuses (adds) a value obtained by multiplying an error generated in a pair of pixels arranged on the left of the target pixel pair by a diffusion coefficient k4.
  • the error diffusion unit 84 diffuses (adds) a value obtained by multiplying the error generated in the target pixel pair by the diffusion coefficient k4 to a pair of pixels arranged to the right of the target pixel pair. In addition, the error diffusion unit 84 diffuses (adds) a value obtained by multiplying the error generated in the target pixel pair by the diffusion coefficient k3 to a pair of pixels arranged at the lower left of the target pixel pair. Further, the error diffusion unit 84 diffuses (adds) a value obtained by multiplying the error generated in the target pixel pair by the diffusion coefficient k2 to a pair of pixels arranged below the target pixel pair. In addition, the error diffusion unit 84 diffuses (adds) a value obtained by multiplying the error generated in the target pixel pair by the diffusion coefficient k1 to a pair of pixels arranged at the lower right of the target pixel pair.
  • which diffusion coefficient is selected is determined using a random number generated by a random number generator (not shown).
  • the average code determination unit 86 converts the subfield code output to the subsequent stage into the upper tone code or the lower tone code. Determine one of the gradation codes.
  • the average code determination unit 86 adds a dither value and an error to the input gradation, and calculates a gradation value to be displayed on the target pixel pair. Then, of the upper gradation code and the lower gradation code, the one having the gradation value closer to the gradation value to be displayed on the target pixel pair is selected as the subfield code to be output to the subsequent stage.
  • the average code determination unit 86 calculates a difference between the gradation value to be displayed on the target pixel pair and the gradation value of the selected subfield code, and uses the difference as a newly generated error. Output to.
  • FIG. 14 is a flowchart showing the operation of the image signal processing circuit 31 of the image display device 30 according to the embodiment of the present invention.
  • the image signal processing circuit 31 executes the following series of steps.
  • Step S42 The 2-line averaging unit 42 calculates an average value of the image signal corresponding to the target pixel on the p-th line and the image signal corresponding to the target pixel on the (p + 1) -th line. Then, the calculation result is output as an average image signal of the target pixel pair on the p-th line and the (p + 1) -th line.
  • the line average unit 42 outputs “11.5” as the gradation value of the average image signal of the target pixel pair in the p-th line and the (p + 1) -th line.
  • Step S43 The two-line difference unit 43 calculates a difference value by subtracting the image signal corresponding to the target pixel on the (p + 1) line from the image signal corresponding to the target pixel on the p-th line. Then, the difference value is compared with the gradation threshold value Wth, and the comparison result is output.
  • the two-line difference unit 43 outputs “1” if the difference value is equal to or greater than the gradation threshold Wth, and “ ⁇ 1” if the difference value is equal to or less than ( ⁇ 1) ⁇ (gradation threshold Wth). Is output, and if the difference value is larger than ( ⁇ 1) ⁇ (tone threshold Wth) and less than the tone threshold Wth, “0” is output.
  • the gradation threshold value Wth is a numerical value equal to the gradation weight of the first type subfield (subfield SF2 in the present embodiment). Therefore, for example, if the gradation weight of the subfield SF2 is “10”, the gradation threshold value Wth is “10”. At this time, the difference value “ ⁇ 13” is equal to or less than ( ⁇ 1) ⁇ (tone threshold Wth). Therefore, the two-line difference unit 43 outputs “ ⁇ 1”.
  • Step S44 If the output of the two-line difference unit 43 is “1” or “ ⁇ 1”, the subtraction unit 44 subtracts 1 ⁇ 2 ⁇ tone threshold Wth from the average image signal of the target pixel pair, and the result is p-line It outputs as an image signal of the target pixel pair of the eye and the (p + 1) -th line. If the output of the two-line difference unit 43 is “0”, the subtracting unit 44 outputs the average image signal of the target pixel pair as it is.
  • the subtracting unit 44 outputs “6.5” as the gradation value of the target pixel pair on the p-th line and the (p + 1) -th line.
  • the attribute detection unit 49 of the average code conversion unit 45 receives the image signal (input gradation) of the target pixel pair on the p-th line and the (p + 1) -th line output from the subtraction unit 44.
  • the attribute detection unit 49 detects an attribute associated with the image signal.
  • the image signal corresponding to the pixel pair of interest has a gradation value (input gradation) of “6.5”, and the attribute attached to the image signal corresponding to the pixel pair of interest in the attribute detection unit 49 is a moving image.
  • the description will be made assuming that the detection result of the contour portion is obtained.
  • the base code set selection unit 52 of the average code conversion unit 45 is either a base code set stored in the base code set selection unit 52 or a deleted base code set. Select. If the output of the 2-line difference unit 43 is “0”, the base code set selection unit 52 selects a base code set (for example, the base code set shown in FIG. 10A), and the output of the 2-line difference unit 43 is If it is “1” or “ ⁇ 1”, the deleted base code set (for example, the deleted base code set shown in FIG. 10B) is selected.
  • Step S54 The base code selection unit 54 of the average code conversion unit 45 selects the upper tone base code for the input tone.
  • step S54 the gradation that is larger than the gradation value (input gradation) of the image signal in the pixel pair of interest and is closest to the input gradation from the code set selected by the base code set selection unit 52.
  • a subfield code having a value is selected as the upper gradation base code.
  • the base code selection unit 54 sets each gradation value of the base code constituting the base code set stored in the base code set selection unit 52 (or the deleted base code constituting the deleted base code set). Are compared with the input gradation. Then, a base code (or a deleted base code) having a gradation value larger than the input gradation and closest to the input gradation is selected, and is output as an upper gradation base code.
  • the base code set selection unit 52 selects the deleted base code set shown in FIG. 10B. . Then, the base code selection unit 54 has a gradation value that is larger than the gradation value “6.5” and closest to the gradation value “6.5” in the deleted base code set shown in FIG. 10B. Select the deleted base code. At this time, the deleted base code “10111” having the gradation value “12” is the deleted base code having the gradation value larger than the gradation value “6.5” and having the gradation value closest to the gradation value “6.5”. Is. Therefore, the base code selection unit 54 selects the deleted base code “10111” and outputs it as the upper gradation base code.
  • Step S61 The rule generation unit 61 of the average code conversion unit 45 generates a rule for generating an intermediate code set.
  • step S61 a rule for generating a new subfield code by changing the light emitting subfield in the upper gradation base code to a non-light emitting subfield is generated based on the image signal in the pixel pair of interest.
  • the rule generation unit 61 performs a basic rule (rule 1) “change any one of the lighting subfields to the non-lighting subfield” if the attribute attached to the image signal is a still image. ) Is generated.
  • the rule generation unit 61 restricts the subfield codes that can be used for displaying the image in order to suppress the moving image pseudo contour.
  • the subfield codes include those that have a high effect of suppressing moving image pseudo contours and those that do not.
  • the subfield codes shown in FIGS. 10A and 10B are subfield codes that have a high effect of suppressing the moving image pseudo contour.
  • the appearance of the moving image pseudo contour depends on the subfield code that can be used to display the image, and the image is displayed using the subfield code that is highly effective in suppressing the moving image pseudo contour.
  • the moving image pseudo contour can be suppressed.
  • the subfield code that can be used for displaying an image is limited as compared with the case where the suppression of the moving image pseudo contour is unnecessary. This is the reason why the rule generation unit 61 restricts the subfield codes that can be used for image display in order to suppress the moving image pseudo contour.
  • the rule generating unit 61 sets “a subfield that prohibits non-lighting” in the basic rule 1 in order to suppress the moving image pseudo contour. Add “When the rule”.
  • This additional rule is, for example, the rule 3 described with reference to FIG. 11C, which is “prohibiting the subfield SF1 from being a non-lighting subfield”.
  • the rule generation unit 61 limits the subfield codes that can be used for displaying an image.
  • the rule generated by the rule generation unit 61 is that the attribute attached to the image signal is a still image.
  • the rule generation unit 61 includes a rule generated when the image signal in the pixel pair of interest is a still image.
  • Step S72 The intermediate code generation unit 72 of the average code conversion unit 45 generates an intermediate code set.
  • the intermediate code generation unit 72 generates an intermediate code from the upper gradation base code based on the rules generated by the rule generation unit 61, and generates an intermediate code set.
  • the code generation unit 72 applies the rules 1 and 3 generated by the rule generation unit 61 to the base code “10111” to generate a new intermediate code.
  • subfield SF1 and subfield SF3 to subfield SF5 which are lighting subfields of the deleted base code “10111”
  • the subfield (from subfield SF3 to subfield SF1 is excluded based on rule 3).
  • the subfield SF5) is to be replaced with a non-lighting subfield.
  • the subfields SF3 to SF5 are set to non-lighting subfields.
  • the intermediate code generating unit 72 generates three intermediate codes “10011”, “10101”, and “10110”.
  • the intermediate code set thus obtained is, for example, the intermediate code set shown in FIG. 11C.
  • Step S74 The upper / lower code selection unit 74 of the average code conversion unit 45 selects an upper gradation code and a lower gradation code.
  • step S74 the gradation of the image signal in the target pixel pair is larger than the gradation value of the image signal in the target pixel pair from the intermediate code set generated by applying the above-described rule to the upper gradation base code.
  • the subfield code having the gradation value closest to the value is selected as the upper gradation code, and the gradation closest to the gradation value of the image signal in the target pixel pair is equal to or smaller than the gradation value of the image signal in the target pixel pair
  • a subfield code having a value is selected as a lower gradation code.
  • the upper / lower code selection unit 74 compares each gradation value of the subfield code constituting the intermediate code set with the input gradation. Then, a subfield code having a gradation value larger than the input gradation and closest to the input gradation is selected and output as an upper gradation code. Also, a subfield code having a gradation value that is equal to or lower than the input gradation and closest to the input gradation is selected, and is output as a lower gradation code.
  • the subfield code corresponding to the upper gradation code is This is a subfield code of gradation value “9”.
  • the subfield code corresponding to the lower gradation code is a subfield code having a gradation value “6”. Therefore, the upper / lower code selection unit 74 selects the subfield code “10101” having the gradation value “9” as the upper gradation code and the subfield code “10011” having the gradation value “6” as the lower gradation code. ”Is selected.
  • Step S82 The dither selection unit 82 of the average code conversion unit 45 selects a dither element based on the attribute of the image signal.
  • the dither selection unit 82 uses the attribute detected by the image signal and attribute detection unit 49. Based on the above, one of the dither patterns is selected.
  • the dither pattern shown in FIG. 12A is selected. If the attribute attached to the image signal is not a contour portion, the dither pattern shown in FIG. 12B is selected. If the selection unit 82 is set, when the attribute attached to the image signal is a contour portion, the dither selection unit 82 selects the dither pattern shown in FIG. 12A. Then, the dither selection unit 82 selects one of the dither elements set in the dither pattern based on the position of the target pixel pair. For example, the dither selection unit 82 selects “0.25” as the dither element based on the dither pattern shown in FIG. 2A.
  • Step S83 The dither selector 82 calculates a dither value.
  • the dither selection unit 82 calculates the dither value by multiplying the selected dither element by the difference between the tone value of the upper tone code and the tone value of the lower tone code.
  • the upper gradation code selected in step S74 is the gradation value “9”
  • the gradation value of the lower gradation code selected in step S74 is “6”
  • the dither selected in step S82 If the element is “0.25”, the dither selector 82 multiplies the difference “3” between the gradation value of the upper gradation code and the gradation value of the lower gradation code by the dither element “0.25”. Then, the dither value “0.75” is calculated.
  • Step S86 The average code determination unit 86 of the average code conversion unit 45 calculates a gradation value to be displayed on the target pixel pair.
  • step S86 a predetermined value is added to the gradation value of the image signal in the target pixel pair to calculate the gradation value to be displayed on the target pixel pair.
  • the average code determination unit 86 adds the dither value calculated in step S83 to the input gradation, and further adds the error output from the error diffusion unit 84 based on the calculation result in step S88.
  • the gradation value to be displayed on the target pixel pair is calculated. Therefore, the predetermined value is a numerical value obtained by adding the dither value output from the dither selection unit 82 and the error output from the error diffusion unit 84.
  • the input gradation is the gradation value “6.5”
  • the dither value calculated in step S83 is “0.75”
  • Step S87 The average code determination unit 86 determines a subfield code to be used when displaying a gradation value on the target pixel pair.
  • step S87 the one having the gradation value closer to the gradation value to be displayed on the target pixel pair among the upper gradation code and the lower gradation code is selected as the subfield code to be output to the subsequent stage.
  • the average code determination unit 86 compares the gradation value to be displayed on the target pixel pair with the gradation value of the upper gradation code and the gradation value of the lower gradation code. If the tone value to be displayed on the target pixel pair is closer to the tone value of the upper tone code than the tone value of the lower tone code, it is used to display the tone value on the target pixel pair.
  • the upper gradation code is selected as the subfield code to be output, and is output.
  • the gradation value to be displayed on the target pixel pair is closer to the lower gradation code gradation value than the upper gradation code gradation value, the gradation value is displayed on the attention pixel pair.
  • a lower gradation code is selected as a subfield code to be used, and is output.
  • the gradation value of the upper gradation code is “9”, the gradation value of the lower gradation code is “6”, and the gradation value to be displayed on the target pixel pair is “7.15”.
  • the difference between the gradation value of the upper gradation code and the gradation value to be displayed on the target pixel pair is “1.85”, and the gradation value to be displayed on the lower pixel code and the target pixel pair The difference from the value is “1.15”. Therefore, in this case, the average code determination unit 86 selects the lower gradation code “10011” having the gradation value “6” and outputs it to the subsequent stage.
  • Step S88 The average code determination unit 86 calculates a newly generated error and outputs it to the error diffusion unit 84.
  • the average code determination unit 86 subtracts the gradation value of the subfield code selected for output to the subsequent stage from the gradation value to be displayed on the pixel pair of interest, and the subtraction result is error diffusion as a newly generated error. To the unit 84.
  • the average code determination unit 86 outputs “1.15” to the error diffusion unit 84 as a newly generated error.
  • Step S91 Based on the output of the two-line difference unit 43, the difference code creation unit 91 generates a subfield code for controlling the first type subfield (subfield SF2 in the present embodiment) that performs the write operation for each line during the write period. Generate.
  • the difference code creation unit 91 sets the first type subfield to the lighting subfield for the image signal of the pixel of interest on the p-th line. And a subfield code for making the first type subfield a non-lighting subfield is output for the image signal of the target pixel on the (p + 1) -th line.
  • the difference code creation unit 91 sets the first type subfield to the non-lighting subfield for the image signal of the target pixel on the p-th line. And outputs a subfield code for setting the first type subfield to the lighting subfield for the image signal of the target pixel on the (p + 1) -th line.
  • the difference code creation unit 91 applies the first to the image signal of the target pixel of the p-th line and the image signal of the target pixel of the (p + 1) -th line. A subfield code that does not control one type of subfield is output.
  • the difference code creation unit 91 does not process the image signal of the pixel of interest on the p-th line.
  • a subfield code “ ⁇ 1 ⁇ ” that outputs the subfield SF2 as a lighting subfield is output.
  • a subfield that is not subject to control is represented by “ ⁇ ”.
  • “ ⁇ ” is set to “0” in consideration of a logical operation in a later stage. Yes. Therefore, the difference code creation unit 91 outputs the above-described subfield code “ ⁇ 0 ⁇ ” as the subfield code “00000”, and outputs the above subfield code “ ⁇ 1 ⁇ ” as the subfield code “01000”. "Is output.
  • Step S92 The display code synthesis unit 92 synthesizes the subfield code output from the average code conversion unit 45 and the subfield code output from the difference code creation unit 91 to create a display code.
  • the display code synthesis unit 92 includes the sub-field code corresponding to the p-th pixel of interest output from the average code converter 45 and the p-th pixel of interest output from the difference code creation unit 91.
  • the sub-field code corresponding to is ORed for each bit. Then, the result of the logical sum operation is output to the data electrode drive circuit 32 as a display code of the pixel of interest on the p-th line.
  • the display code synthesis unit 92 also outputs the subfield code corresponding to the pixel of interest on the (p + 1) th line output from the average code conversion unit 45 and the target of the (p + 1) th line output from the difference code creation unit 91.
  • the subfield code corresponding to the pixel is ORed for each bit. Then, the result of the logical sum operation is output to the data electrode driving circuit 32 as the display code of the pixel on the (p + 1) line.
  • the display code is a subfield code actually used for image display.
  • the display code synthesis unit 92 “10011” is output as the display code of the pixel of interest on the line.
  • the display code synthesis unit 92 “11011” is output as the display code of the pixel of interest on the (p + 1) -th line.
  • step S92 ends, the process returns to step S42. In this way, a series of steps from step S42 to step S92 is repeatedly executed.
  • one field is constituted by the first type subfield that performs the write operation for each line during the write period and the second type subfield that performs the simultaneous write operation for every two lines during the write period. To do.
  • the difference value of the image signal corresponding to a pair of pixels (target pixel pair) performing the write operation at the same time in the second type subfield is smaller than the gradation weight of the first type subfield, it corresponds to the target pixel pair.
  • the average value of the image signal to be converted is converted into a display code.
  • the time required for the writing period can be shortened while preventing the image display quality in the image display device 30 from deteriorating.
  • conversion from an image signal to a display code is performed using a conversion table including a number of subfield codes. Rather than doing so, it can be done by an arithmetic circuit.
  • conversion from an image signal to a display code can be performed by calculation using an arithmetic circuit. Therefore, even in such an image display device, it is not necessary to provide a huge number of conversion tables, but a necessary minimum table (for example, the base code set shown in FIG. 10A and the deleted base code shown in FIG. 10B). Set) and an arithmetic circuit for converting the image signal into the display code.
  • the conversion from the image signal to the subfield code can be performed by the logical operation, which is necessary for the writing period while preventing the image display quality from being deteriorated. Time can be shortened.
  • subfield SF2 in the present embodiment only the subfield having the largest gradation weight (subfield SF2 in the present embodiment) is the first type subfield, and the other subfields are the second type subfield.
  • the present invention is not limited to this configuration.
  • FIG. 15 is a diagram schematically showing another example of a drive voltage waveform applied to each electrode of panel 10 used in image display device 30 in one embodiment of the present invention.
  • FIG. 15 shows data electrode D1 to data electrode Dm, scan electrode SC1 that performs the address operation first in the address period, scan electrode SCn that performs the address operation last in the address period (for example, scan electrode SC1080), sustain electrode SU1 to The drive voltage waveform applied to each of the sustain electrodes SUn is shown.
  • one field is composed of five subfields (subfield SF1, subfield SF2, subfield SF3, subfield SF4, subfield SF5), and subfield SF1 to subfield SF5 It is assumed that gradation weights of (1, 10, 6, 3, 2) are set in each subfield.
  • subfield SF1 is a forced initialization subfield and is a second type subfield.
  • the subfield SF2 and the subfield SF3 are selective initialization subfields and are type 1 subfields.
  • Each subfield after subfield SF4 is a selective initialization subfield and is a second type subfield.
  • a subfield having the largest gradation weight for example, subfield SF2
  • a subfield having the second largest gradation weight for example, subfield SF3
  • the first type subfield that performs each write operation may be used, and the other subfield may be the second type subfield that performs the simultaneous write operation every two lines during the write period.
  • the gradation weight Wth of the first type subfield (subfield SF2 in FIG. 15) having the largest gradation weight is set to the first gradation threshold Wth1, and the gradation weight is the second.
  • the gradation weight Wth of the large first type subfield (subfield SF3 in FIG. 15) is set as the second gradation threshold Wth2.
  • the two-line difference unit 43 compares the calculated difference value (difference value of the image signal corresponding to each pixel of the target pixel pair) with the first gradation threshold Wth1 and the second gradation threshold Wth2.
  • the 2-line difference unit 43 outputs “2” if the difference value is equal to or greater than the first gradation threshold Wth1.
  • the two-line difference unit 43 outputs “1” if the difference value is less than the first gradation threshold value Wth1 and greater than or equal to the second gradation threshold value Wth2.
  • the 2-line difference unit 43 outputs “0” if the difference value is less than the second gradation threshold Wth2 and greater than ( ⁇ 1) ⁇ (second gradation threshold Wth2).
  • the two-line difference unit 43 outputs “ ⁇ 1” if the difference value is equal to or smaller than ( ⁇ 1) ⁇ (second gradation threshold Wth2) and is larger than ( ⁇ 1) ⁇ (first gradation threshold Wth1). To do.
  • the 2-line difference unit 43 outputs “ ⁇ 2” if the difference value is equal to or less than ( ⁇ 1) ⁇ (first gradation threshold Wth1).
  • the 2-line difference unit 43 performs the following five operations. 1) When Wth1 ⁇ (difference value), “2” is output. 2) When Wth2 ⁇ (difference value) ⁇ Wth1, “1” is output. 3) When -Wth2 ⁇ (difference value) ⁇ Wth2, “0” is output. 4) When -Wth1 ⁇ (difference value) ⁇ Wth2, “ ⁇ 1” is output. 5) When (difference value) ⁇ ⁇ Wth1, “ ⁇ 2” is output.
  • the subtracting unit 44 subtracts a predetermined variable determined based on the output of the two-line difference unit 43 from the average image signal output from the two-line averaging unit 42. That is, the subtracting unit 44 subtracts a predetermined variable determined by the difference value of the image signal of the pair of pixels from the average image signal of the pair of pixels.
  • the subtraction unit 44 sets this predetermined variable to “1 ⁇ 2 of the first gradation threshold value Wth1”. If the output of the two-line difference unit 43 is “1” or “ ⁇ 1”, the subtracting unit 44 sets the predetermined variable to “1 ⁇ 2 of the second gradation threshold value Wth2”. The subtractor 44 sets the predetermined variable to “0” if the output of the two-line difference unit 43 is “0”.
  • the subtracting unit 44 uses the average image signal output from the two-line averaging unit 42 to 1 ⁇ 2 the first gradation threshold value Wth1. Is output as an image signal of a pixel on the p-th line and a pixel on the (p + 1) -th line (a pair of pixels on the p-th line and the (p + 1) -th line).
  • the subtracting unit 44 calculates 1 ⁇ 2 of the second gradation threshold Wth2 from the average image signal output from the two-line averaging unit 42. Is output as an image signal of a pixel on the p-th line and a pixel on the (p + 1) -th line (a pair of pixels on the p-th line and the (p + 1) -th line).
  • the subtracting unit 44 uses the average image signal output from the two-line averaging unit 42 as it is as the pixel on the p-th line and the pixel on the (p + 1) -th line. This is output as an image signal (a pair of pixels on the p-th line and the (p + 1) -th line).
  • the average code conversion unit 45 converts the image signal output from the subtraction unit 44 into a subfield code having a predetermined subfield as a non-lighting subfield.
  • This predetermined subfield is a subfield determined by the output of the 2-line difference unit 43 (comparison result in the 2-line difference unit 43).
  • the average code conversion unit 45 converts the image signal of the target pixel pair on the p-th line and the (p + 1) -th line output from the subtraction unit 44 into a subfield code. At this time, if the output of the two-line difference unit 43 is “2” or “ ⁇ 2”, the average code conversion unit 45 in the present embodiment has the first type subfield having the largest gradation weight (in this embodiment). In the embodiment, the subfield SF2) is a non-lighting subfield.
  • the subfield code output from the average code conversion unit 45 is “X0XXX”.
  • the average code conversion unit 45 in the present embodiment has the second largest tone weight.
  • One type of subfield (in this embodiment, subfield SF3) is set as a non-lighting subfield.
  • the subfield code output from the average code conversion unit 45 is “XX0XX”.
  • This subfield code represents a lighting subfield as “1” and a non-lighting subfield as “0”, and “X” represents either “0” or “1”. .
  • subfield SF1 subfield SF2
  • subfield SF3 subfield SF4
  • subfield SF5 subfield SF5
  • the base code set selection unit 52 of the average code conversion unit 45 may be configured as follows.
  • FIG. 16A is a diagram showing another example of the base code set used in the image display device 30 according to the embodiment of the present invention.
  • FIG. 16B is a diagram showing another example of the deleted base code set used in the image display device 30 according to the embodiment of the present invention.
  • FIG. 16C is a diagram showing another example of the deleted base code set used in the image display device 30 according to the embodiment of the present invention.
  • the light-emitting subfield is “1”
  • the non-light-emitting subfield is blank
  • each subfield code (base code) is displayed in the second column from the left. (Or a deleted base code) represents a gradation value to be displayed. Further, the numerical value written immediately below the notation indicating each subfield in each code set represents the gradation weight of each subfield.
  • FIG. 16A shows a base code set used when the output of the 2-line difference unit 43 is “0”.
  • one field is composed of five subfields, and each subfield is “1”, “10”, “6”, “3”, “3” in order from the subfield SF1. 2 "gradation weight.
  • the base code set shown in FIG. 16A is the same base code set as the base code set shown in FIG. 10A, and is set to the lighting subfield one by one in order from the subfield having the smallest gradation weight. Therefore, the number of base codes included in this base code set is six.
  • FIG. 16B shows a deleted base code set used when the output of the 2-line difference unit 43 is “2” or “ ⁇ 2”.
  • the deleted base code set shown in FIG. 16B is a subfield code set generated from the base code set shown in FIG. 16A with a predetermined subfield determined by the output of the two-line difference unit 43 as a non-lighting subfield. is there.
  • this predetermined subfield is a first type subfield (in this embodiment, subfield SF2) having the largest gradation weight.
  • the deleted base code set shown in FIG. 16B is a sub-field code set in which the sub-field SF2 is a non-lighting sub-field from the base code set shown in FIG. 16A.
  • the subfield SF2 is a subfield having the largest gradation weight. Therefore, the deleted base code set shown in FIG. 16B is equal to the code set obtained by removing the base code “11111” having the gradation value “22” from the base code set shown in FIG. 16A.
  • FIG. 16C shows a deleted base code set used when the output of the two-line difference unit 43 is “1” or “ ⁇ 1”.
  • the deleted base code set shown in FIG. 16C is a sub-field code set generated from the base code set shown in FIG. 16A using a predetermined sub-field determined by the output of the two-line difference unit 43 as a non-lighting sub-field. is there.
  • this predetermined subfield is the first type subfield having the second largest gradation weight (subfield SF3 in the present embodiment). Therefore, the deleted base code set shown in FIG. 16C is a subfield code set in which the subfield SF3 is set as a non-lighting subfield from the base code set shown in FIG. 16A.
  • the base code set selection unit 52 stores the base code set and gradation values of a plurality of base codes constituting the base code set. In addition, the base code set selection unit 52 stores the gradation values of the deleted base code set and the plurality of deleted base codes constituting the deleted base code set. Each base code and each gradation value of the base code are stored in the base code set selection unit 52 in association with each other.
  • This base code set is, for example, the base code set shown in FIG. 16A.
  • Each deleted base code and each gradation value of the deleted base code are stored in the base code set selection unit 52 in association with each other.
  • This deleted base code set is, for example, the deleted base code set shown in FIGS. 16B and 16C.
  • the base code set selection unit 52 selects a base code set (for example, the base code set shown in FIG. 16A). If the output of the 2-line difference unit 43 is “2” or “ ⁇ 2”, the base code set selection unit 52 deletes the base code that has been deleted by setting the first type subfield having the highest gradation weight as a non-lighting subfield. A set (eg, a deleted base code set shown in FIG. 16B) is selected. Then, if the output of the two-line difference unit 43 is “1” or “ ⁇ 1”, the base code set selection unit 52 sets the second-type first subfield with the second largest gradation weight as a non-lighting subfield. A deleted base code set (for example, the deleted base code set shown in FIG. 16C) is selected.
  • the base code selection unit 54 compares each gradation value of the subfield code constituting the code set selected by the base code set selection unit 52 with the input gradation, and forms a subfield that becomes an upper gradation base code. Select a code.
  • the image signal processing circuit 31 may be configured as described above.
  • the base code generation unit 50 includes a base code set selection unit 52, and the base code set selection unit 52 stores the base code set and the deleted base code set in advance.
  • the present invention is not limited to this configuration.
  • a configuration may be adopted in which a rule for generating a base code or a deleted base code is determined in advance, and the base code or the deleted base code is generated based on the rule.
  • the upper / lower code generation unit 70 selects the upper gradation code and the lower gradation code by the upper / lower code selection unit 74 after the intermediate code set is generated by the intermediate code generation unit 72.
  • the present invention is not limited to this configuration.
  • an intermediate code is generated in order of increasing gradation value, and at the same time, the intermediate code and the input gradation are sequentially compared to select the upper gradation code and the lower gradation code.
  • dither processing and error diffusion processing are performed after setting a subfield for prohibiting the write operation. Therefore, even in the image display device 30 that generates display codes from an intermediate code set having a limited number of subfield codes and uses them for image display, it is possible to prevent image display quality from being deteriorated.
  • the configuration in which the average code selection unit 80 includes the dither selection unit 82 and the error diffusion unit 84 has been described.
  • the present invention is not necessarily limited to this configuration.
  • the dither selection unit 82 may be omitted.
  • the error diffusion unit 84 may be omitted when the error diffusion process is not performed.
  • a common error and a common dither element are used for the p-line target pixel and the (p + 1) -line target pixel, and the output of the average code selection unit 80 is the p-line target pixel.
  • the common subfield code is used for the target pixel in the (p + 1) -th line.
  • the present invention is not limited to this configuration. For example, the following configuration may be used. First, the difference between the upper gradation code and the lower gradation code selected by the upper / lower code selection unit 74 is calculated.
  • the output of the average code selection unit 80 is set to a different subfield code for the target pixel on the p-th line and the target pixel on the (p + 1) -th line.
  • a different subfield code for the target pixel on the p-th line and the target pixel on the (p + 1) -th line.
  • the number of subfields constituting one field, the subfields that are forced initialization subfields, the gradation weights of each subfield, and the like are not limited to the above-described numerical values. Moreover, the structure which switches a subfield structure based on an image signal etc. may be sufficient.
  • drive voltage waveforms shown in FIGS. 3, 4, and 15 are merely examples in the embodiment of the present invention, and the present invention is not limited to these drive voltage waveforms.
  • circuit configurations shown in FIGS. 6, 7, and 9 are merely examples in the embodiment of the present invention, and the present invention is not limited to these circuit configurations.
  • each circuit block shown in the embodiment of the present invention may be configured as an electric circuit that performs each operation shown in the embodiment, or a microcomputer that is programmed to perform the same operation. May be used.
  • the number of subfields constituting one field is not limited to the above number.
  • the number of gradations that can be displayed on the panel 10 can be further increased.
  • the time required for driving panel 10 can be shortened by reducing the number of subfields.
  • one pixel is constituted by discharge cells of three colors of red, green, and blue.
  • a panel in which one pixel is constituted by discharge cells of four colors or more has been described.
  • the specific numerical values shown in the embodiment of the present invention are set based on the characteristics of the panel 10 having a screen size of 50 inches and the number of display electrode pairs 14 of 1024. It is just an example.
  • the present invention is not limited to these numerical values, and each numerical value is desirably set optimally in accordance with panel specifications, panel characteristics, plasma display device specifications, and the like. Each of these numerical values is allowed to vary within a range where the above-described effect can be obtained.
  • the number of subfields constituting one field, the gradation weight of each subfield, and the like are not limited to the values shown in the embodiment of the present invention, and the subfield configuration is based on an image signal or the like. May be configured to switch.
  • the present invention since conversion from an image signal to a subfield code can be performed by calculation, it is not necessary to use a conversion table composed of a large number of subfield codes, and the writing period is prevented while preventing a decrease in image display quality.
  • the time required for the image display device can be shortened, so that it is useful as an image display device that displays an image in an image display region by combining binary control of light emission and non-light emission in a light emitting element that constitutes a pixel, and an image display device driving method It is.

Abstract

To reduce the time required for a write period in an image display device, an image display device has: a 2-line average unit (42) for calculating an average value for an image signal in relation to a pixel of interest; a 2-line difference unit (43) for calculating a difference value for the image signal in relation to the pixel of interest, and comparing the difference value with the gradient weight of a first type subfield; a subtraction unit (44) for subtracting a prescribed coefficient determined by the comparison result in the 2-line difference unit from the average value; an average code conversion unit (45) for converting the output from the subtraction unit into a subfield code having a prescribed subfield set as a non-emitting subfield, and outputting the same; a difference code generation unit (91) for generating a subfield code for controlling the prescribed subfield on the basis of the comparison result in the 2-line difference unit; and a display code synthesis unit (92) for synthesizing the subfield code outputted by the average code conversion unit and the subfield code generated by the difference code generation unit, and generating a display code.

Description

画像表示装置および画像表示装置の駆動方法Image display device and driving method of image display device
 本発明は、画素を構成する発光素子における発光と非発光との2値制御を組み合わせて画像表示領域に画像を表示する画像表示装置および画像表示装置の駆動方法に関する。 The present invention relates to an image display device that displays an image in an image display region by combining binary control of light emission and non-light emission in a light emitting element that constitutes a pixel, and a driving method of the image display device.
 画素を構成する発光素子における発光と非発光との2値制御を組み合わせて画像表示領域に画像を表示する画像表示装置として代表的なものにプラズマディスプレイパネル(以下、「パネル」と略記する)がある。 A plasma display panel (hereinafter abbreviated as “panel”) is a typical image display device that displays an image in an image display area by combining binary control of light emission and non-light emission in a light emitting element constituting a pixel. is there.
 パネルは、対向配置された前面基板と背面基板との間に、画素を構成する発光素子である放電セルが多数形成されている。前面基板は、1対の走査電極と維持電極とからなる表示電極対が前面側のガラス基板上に互いに平行に複数対形成されている。そして、それら表示電極対を覆うように誘電体層および保護層が形成されている。 In the panel, a large number of discharge cells, which are light-emitting elements constituting pixels, are formed between a front substrate and a rear substrate that are arranged to face each other. In the front substrate, a plurality of pairs of display electrodes composed of a pair of scan electrodes and sustain electrodes are formed on the front glass substrate in parallel with each other. A dielectric layer and a protective layer are formed so as to cover the display electrode pairs.
 背面基板は、背面側のガラス基板上に複数の平行なデータ電極が形成され、それらデータ電極を覆うように誘電体層が形成され、さらにその上にデータ電極と平行に複数の隔壁が形成されている。そして、誘電体層の表面と隔壁の側面とに蛍光体層が形成されている。 The back substrate has a plurality of parallel data electrodes formed on the glass substrate on the back side, a dielectric layer is formed so as to cover the data electrodes, and a plurality of barrier ribs are formed thereon in parallel with the data electrodes. ing. And the fluorescent substance layer is formed in the surface of a dielectric material layer, and the side surface of a partition.
 そして、表示電極対とデータ電極とが立体交差するように、前面基板と背面基板とを対向配置して密封する。密封された内部の放電空間には、例えば分圧比で5%のキセノンを含む放電ガスを封入し、表示電極対とデータ電極とが対向する部分に放電セルを形成する。このような構成のパネルにおいて、各放電セル内でガス放電により紫外線を発生し、この紫外線で赤色(R)、緑色(G)および青色(B)の各色の蛍光体を励起発光してカラーの画像表示を行う。 Then, the front substrate and the rear substrate are arranged opposite to each other and sealed so that the display electrode pair and the data electrode are three-dimensionally crossed. In the sealed internal discharge space, for example, a discharge gas containing xenon at a partial pressure ratio of 5% is sealed, and a discharge cell is formed in a portion where the display electrode pair and the data electrode face each other. In the panel having such a configuration, ultraviolet rays are generated by gas discharge in each discharge cell, and the phosphors of each color of red (R), green (G) and blue (B) are excited and emitted by the ultraviolet rays. Display an image.
 発光素子における発光と非発光との2値制御を組み合わせて画像表示領域に画像を表示する方法としては一般にサブフィールド法が用いられている。 A subfield method is generally used as a method for displaying an image in an image display region by combining binary control of light emission and non-light emission in a light emitting element.
 サブフィールド法では、1フィールドを、発光輝度が互いに異なる複数のサブフィールドに分割する。そして、各放電セルでは、所望の階調値に応じた組合せで各サブフィールドの発光・非発光を制御する。これにより1フィールドの発光輝度を所望の階調値にして各放電セルを発光し、パネルの画像表示領域に、様々な階調値の組合せで構成された画像を表示する。 In the subfield method, one field is divided into a plurality of subfields having different emission luminances. In each discharge cell, light emission / non-light emission of each subfield is controlled by a combination according to a desired gradation value. Thus, each discharge cell emits light with the emission luminance of one field set to a desired gradation value, and an image composed of various combinations of gradation values is displayed in the image display area of the panel.
 サブフィールド法において、各サブフィールドは、書込み期間および維持期間を有する。 In the subfield method, each subfield has an address period and a sustain period.
 書込み期間では、走査電極に走査パルスを順次印加するとともに、データ電極には表示すべき画像信号にもとづき選択的に書込みパルスを印加する。これにより、発光を行うべき放電セルの走査電極とデータ電極との間に書込み放電を発生し、その放電セル内に壁電荷を形成する(以下、これらの動作を総称して「書込み」とも記す)。 In the address period, the scan pulse is sequentially applied to the scan electrodes, and the address pulse is selectively applied to the data electrodes based on the image signal to be displayed. As a result, an address discharge is generated between the scan electrode and the data electrode of the discharge cell to emit light, and a wall charge is formed in the discharge cell (hereinafter, these operations are also collectively referred to as “address”). ).
 維持期間では、サブフィールド毎に定められた階調重みにもとづく数の維持パルスを走査電極と維持電極とからなる表示電極対に交互に印加する。これにより、書込み放電を発生した放電セルで維持放電を発生し、その放電セルの蛍光体層を発光させる(以下、放電セルを維持放電により発光させることを「点灯」、発光させないことを「非点灯」とも記す)。これにより、各サブフィールドにおいて、各放電セルを、階調重みに応じた輝度で発光させる。このようにして、パネルの各放電セルを画像信号の階調値に応じた輝度で発光させて、パネルの画像表示領域に画像を表示する。 In the sustain period, the number of sustain pulses based on the gradation weights determined for each subfield is alternately applied to the display electrode pairs composed of the scan electrodes and the sustain electrodes. As a result, a sustain discharge is generated in the discharge cell that has generated the address discharge, and the phosphor layer of the discharge cell emits light (hereinafter referred to as “lighting” that the discharge cell emits light by the sustain discharge, and “non-emitting”). Also written as “lit”.) Thereby, in each subfield, each discharge cell is made to emit light with the luminance according to the gradation weight. In this way, each discharge cell of the panel is caused to emit light with a luminance corresponding to the gradation value of the image signal, and an image is displayed in the image display area of the panel.
 上述したサブフィールド法では、パネルの大画面化、高精細度化等により走査電極の数が増加すると、書込み期間に要する時間が長くなり、維持期間に割り当てることができる時間が減少するという問題が生じる。 In the subfield method described above, when the number of scan electrodes increases due to an increase in the screen size and resolution, the time required for the writing period becomes longer, and the time that can be allocated to the sustain period decreases. Arise.
 この問題を解決するために、「2ライン毎同時書込み動作」を行う駆動方法が提案されている。2ライン毎同時書込み動作とは、互いに隣接する2本の走査電極に同時に走査パルスを印加して2ライン同時に書込み動作を行う駆動方法である(例えば、特許文献1参照)。2ライン毎同時書込み動作を行うと、書込み動作に費やす時間を短縮して書込み期間を短縮することができるので、例えば、サブフィールドの数を増やしたり、あるいは維持期間の時間を増やす、といったことが可能になる。 In order to solve this problem, a driving method that performs “two-line simultaneous writing operation” has been proposed. The simultaneous writing operation every two lines is a driving method in which a scanning pulse is simultaneously applied to two adjacent scanning electrodes to perform the writing operation simultaneously for two lines (see, for example, Patent Document 1). If the simultaneous write operation is performed every two lines, the time spent for the write operation can be shortened and the write period can be shortened. For example, the number of subfields is increased or the time of the sustain period is increased. It becomes possible.
 しかしながら、2ライン毎同時書込み動作を行う駆動方法は、走査電極に直交する方向の解像度に低下を生じることがある。以下、走査電極に直交する方向を「垂直方向」と記し、走査電極に直交する方向の解像度を「垂直解像度」と記す。これは、1フィールド期間内において、互いに隣接する2本の走査電極に同時に書込み動作を行うので、パネルに表示される1枚の画像において、隣接する2本の走査電極上に形成される各放電セルが同じパターンで発光するためである。そのため、走査電極に直交する方向(垂直方向)に関して、画像の解像度は、走査電極の数の半分に低下する。 However, the driving method that performs the simultaneous writing operation every two lines may cause a decrease in resolution in the direction orthogonal to the scanning electrodes. Hereinafter, the direction orthogonal to the scan electrode is referred to as “vertical direction”, and the resolution in the direction orthogonal to the scan electrode is referred to as “vertical resolution”. This is because a write operation is simultaneously performed on two adjacent scan electrodes within one field period, so that each discharge formed on the two adjacent scan electrodes in one image displayed on the panel. This is because the cells emit light in the same pattern. Therefore, the resolution of the image is reduced to half of the number of scan electrodes in the direction orthogonal to the scan electrodes (vertical direction).
 垂直解像度が低下すると、特に斜め線をパネルに表示するときに斜め線の滑らかさが損なわれてしまうため、使用者に画像表示品質が低下したように感じられることがある。 When the vertical resolution is reduced, the smoothness of the diagonal lines is impaired particularly when the diagonal lines are displayed on the panel, so that the user may feel that the image display quality has deteriorated.
 また、3次元(3 Dimension:以下「3D」と記す)画像表示装置としてプラズマディスプレイ装置を応用することが検討されている。 Also, it is considered to apply a plasma display device as a three-dimensional (3-dimension: hereinafter referred to as “3D”) image display device.
 このプラズマディスプレイ装置では、立体視用の画像(3D画像)を構成する右目用画像と左目用画像とをパネルに交互に表示し、使用者は、シャッタ眼鏡と呼ばれる特殊な眼鏡を用いてその画像を観測する。 In this plasma display device, a right-eye image and a left-eye image constituting a stereoscopic image (3D image) are alternately displayed on a panel, and a user uses special glasses called shutter glasses to display the images. Observe.
 シャッタ眼鏡は、右目用のシャッタと左目用のシャッタとを備え、パネルに右目用画像が表示されている期間は右目用のシャッタを開く(可視光を透過する状態のこと)とともに左目用のシャッタを閉じ(可視光を遮断する状態のこと)、左目用画像が表示されている期間は左目用のシャッタを開くとともに右目用のシャッタを閉じる。これにより、使用者は、右目用画像を右目だけで観測し、左目用画像を左目だけで観測することができるので、表示画像を立体視することができる。 The shutter glasses include a right-eye shutter and a left-eye shutter, and the right-eye shutter is opened (a state in which visible light is transmitted) during a period in which the right-eye image is displayed on the panel, and the left-eye shutter. Is closed (a state in which visible light is blocked), and while the left-eye image is displayed, the left-eye shutter is opened and the right-eye shutter is closed. As a result, the user can observe the right-eye image only with the right eye and the left-eye image with only the left eye, so that the display image can be stereoscopically viewed.
 このように、3D画像表示装置として用いられるプラズマディスプレイ装置においては、1枚の3D画像を表示するために、1枚の右目用画像と1枚の左目用画像との2枚の画像を表示しなければならない。そのため、シャッタ眼鏡を通して3D画像を観測する使用者には、1秒間にパネルに表示される画像の数が、1秒間のフィールドの数の半分の数として観測される。 As described above, in the plasma display device used as the 3D image display device, in order to display one 3D image, two images of one right eye image and one left eye image are displayed. There must be. Therefore, a user who observes a 3D image through shutter glasses observes the number of images displayed on the panel per second as half the number of fields per second.
 例えば、パネルに表示される画像のフィールド周波数(1秒間に発生するフィールドの数)が60Hzのとき、その画像が3D画像ではない通常の画像(2D画像)であれば、1秒間に60枚の2D画像が表示されるが、その画像が3D画像であれば、1秒間に30枚の3D画像が表示されることになる。 For example, when the field frequency of the image displayed on the panel (the number of fields generated per second) is 60 Hz, if the image is a normal image (2D image) that is not a 3D image, 60 images per second. A 2D image is displayed. If the image is a 3D image, 30 3D images are displayed per second.
 したがって、1秒間に60枚の3D画像を表示するためには、フィールド周波数を60Hzの2倍の120Hzに設定しなければならない。その場合、1枚の右目用画像または1枚の左目用画像を表示するために使用できる時間は、1枚の2D画像を表示するために使用できる時間の2分の1に制限される。 Therefore, in order to display 60 3D images per second, the field frequency must be set to 120 Hz, which is twice 60 Hz. In that case, the time that can be used to display one right-eye image or one left-eye image is limited to one-half of the time that can be used to display one 2D image.
 このような場合、パネルの駆動に要する時間を削減する方法として、上述した2ライン毎同時書込み動作を用いた駆動方法が有効である。しかしながら、2ライン毎同時書込み動作を用いた駆動方法では、上述したように、垂直解像度が低下しやすい。 In such a case, as a method for reducing the time required for driving the panel, the above-described driving method using the simultaneous writing operation every two lines is effective. However, in the driving method using the simultaneous writing operation for every two lines, as described above, the vertical resolution tends to be lowered.
 そして、垂直解像度が低下すると、斜め線の図柄が含まれている画像をパネルに表示する際に、垂直解像度が高い画像と比較して、その斜め線の滑らかさが損なわれやすい。 When the vertical resolution is lowered, when the image including the diagonal line pattern is displayed on the panel, the smoothness of the diagonal line is easily lost as compared with an image having a high vertical resolution.
 3D画像表示装置として用いるプラズマディスプレイ装置においては、2ライン毎同時書込み動作を用いた駆動方法によりパネルを駆動して3D画像を表示するときに、斜め線の滑らかさが損なわれることを防止して、画像表示品質の低下を防止することが望まれている。 In a plasma display device used as a 3D image display device, smoothness of diagonal lines is prevented from being impaired when a panel is driven to display a 3D image by a driving method using a simultaneous writing operation every two lines. Therefore, it is desired to prevent deterioration of image display quality.
特開2008-116894号公報JP 2008-116894 A
 本発明は、階調重みが定められた複数のサブフィールドで1フィールドを構成し、複数のサブフィールドのそれぞれにおける発光と非発光との組合せを示すサブフィールドコードを用いて複数のサブフィールドのそれぞれの発光と非発光とを制御して、画像表示領域を構成する複数の画素のそれぞれに画像信号にもとづく階調値を表示して画像表示領域に画像を表示する画像表示装置である。この画像表示装置は、書込み期間において走査電極の1本ずつに走査パルスを印加する1ライン毎書込み動作を行う少なくとも1つの第1種サブフィールドと、書込み期間において隣接する2本の走査電極に同時に走査パルスを印加する2ライン毎同時書込み動作を行う複数の第2種サブフィールドとで1フィールドを構成し、画像信号にもとづく階調値を画素に表示するためのサブフィールドコードである表示コードを出力する駆動回路を備える。駆動回路は、2ライン平均部と、2ライン差分部と、減算部と、平均コード変換部と、差分コード作成部と、表示コード合成部とを有する。2ライン平均部は、走査電極と直交する方向に隣接し、かつ第2種サブフィールドの書込み期間に同時に書込み動作を行う1対の画素の各画素に対応する画像信号の平均値を算出する。2ライン差分部は、上述の1対の画素の各画素に対応する画像信号の間で差分値を算出し、その差分値と第1種サブフィールドの階調重みとを比較する。減算部は、2ライン差分部における比較結果によって決定される所定の変数を上述の平均値から減算する。平均コード変換部は、減算部の出力を、2ライン差分部の比較結果によって決定される所定のサブフィールドを非点灯サブフィールドとするサブフィールドコードに変換して出力する。差分コード作成部は、2ライン差分部の比較結果にもとづき、所定のサブフィールドを制御するサブフィールドコードを生成する。表示コード合成部は、平均コード変換部が出力するサブフィールドコードと差分コード作成部が生成するサブフィールドコードとを合成して表示コードを生成する。 In the present invention, a plurality of subfields having gradation weights constitute one field, and each of the plurality of subfields is expressed using a subfield code indicating a combination of light emission and non-light emission in each of the plurality of subfields. This is an image display device that controls the light emission and non-light emission, displays a gradation value based on an image signal on each of a plurality of pixels constituting the image display area, and displays an image in the image display area. In this image display device, at least one first-type subfield that performs a line-by-line addressing operation that applies a scan pulse to each of the scan electrodes in the address period and two adjacent scan electrodes in the address period simultaneously. A display code, which is a subfield code for displaying a gradation value based on an image signal on a pixel, is composed of a plurality of second-type subfields that perform simultaneous writing operation every two lines to which a scan pulse is applied. A drive circuit for outputting is provided. The drive circuit includes a two-line average unit, a two-line difference unit, a subtraction unit, an average code conversion unit, a difference code creation unit, and a display code synthesis unit. The two-line average unit calculates an average value of image signals corresponding to each pixel of a pair of pixels that are adjacent to each other in the direction orthogonal to the scanning electrode and perform the address operation simultaneously in the address period of the second type subfield. The two-line difference unit calculates a difference value between the image signals corresponding to each pixel of the pair of pixels described above, and compares the difference value with the gradation weight of the first type subfield. The subtraction unit subtracts a predetermined variable determined by the comparison result in the two-line difference unit from the above average value. The average code conversion unit converts the output of the subtraction unit into a subfield code having a predetermined subfield determined by the comparison result of the two-line difference unit as a non-lighting subfield, and outputs the subfield code. The difference code creation unit generates a subfield code for controlling a predetermined subfield based on the comparison result of the two-line difference unit. The display code synthesis unit generates a display code by synthesizing the subfield code output from the average code conversion unit and the subfield code generated by the difference code creation unit.
 これにより、画像信号から表示コードへの変換を、演算回路を用いた演算によって行うことができるようになる。したがって、高機能化や多機能化等への対応が必要な画像表示装置においても、画像信号から表示コードへの変換を行う膨大な数の変換テーブルを備える必要がなくなる。すなわち、様々な条件に応じて膨大な数の変換テーブルの中から最適な1つを選択するように画像信号処理回路を構成する必要がなくなる。さらに、画像表示装置における画像表示品質の低下を防止しつつ、書込み期間に要する時間を短縮することができる。 Thereby, the conversion from the image signal to the display code can be performed by the calculation using the calculation circuit. Therefore, even in an image display device that needs to cope with high functionality and multi-function, it is not necessary to provide a huge number of conversion tables for converting image signals into display codes. That is, it is not necessary to configure the image signal processing circuit so as to select an optimal one from a vast number of conversion tables according to various conditions. Furthermore, the time required for the writing period can be shortened while preventing the image display quality from being deteriorated in the image display device.
 また、本発明の画像表示装置は、平均コード変換部に、基底コード生成部と、ルール生成部と、上下コード生成部と、平均コード選択部とを有する。基底コード生成部は、複数の基本となるサブフィールドコードの中から、注目画素対における画像信号の階調値よりも大きく、かつ注目画素対における画像信号の階調値に最も近い階調値を有するサブフィールドコードを上階調基底コードとして選択する。ルール生成部は、注目画素対における画像信号にもとづき、上階調基底コードにおける発光するサブフィールドを非発光のサブフィールドに変更して新たなサブフィールドコードを生成するためのルールを生成する。上下コード生成部は、上階調基底コードに上述のルールを適用して新たに生成されるサブフィールドコードの中から、注目画素対における画像信号の階調値より大きく注目画素対における画像信号の階調値に最も近い階調値を有するサブフィールドコードを上階調コードとして選択し、かつ、注目画素対における画像信号の階調値以下で注目画素対における画像信号の階調値に最も近い階調値を有するサブフィールドコードを下階調コードとして選択する。平均コード選択部は、注目画素対における画像信号の階調値に、所定の値を加算して注目画素対に表示すべき階調値を算出し、上階調コードおよび下階調コードのうち注目画素対に表示すべき階調値により近い階調値を有するサブフィールドコードを選択して出力する。 Further, the image display device of the present invention includes a base code generation unit, a rule generation unit, an upper and lower code generation unit, and an average code selection unit in the average code conversion unit. The base code generation unit selects a gradation value that is larger than the gradation value of the image signal in the target pixel pair and closest to the gradation value of the image signal in the target pixel pair from among a plurality of basic subfield codes. The sub-field code having the upper gradation base code is selected. The rule generation unit generates a rule for generating a new subfield code by changing the light-emitting subfield in the upper gradation base code to a non-light-emitting subfield based on the image signal in the target pixel pair. The upper / lower code generation unit applies the above-described rule to the upper gradation base code and newly generates an image signal in the target pixel pair that is larger than the gradation value of the image signal in the target pixel pair. The subfield code having the gradation value closest to the gradation value is selected as the upper gradation code, and is the closest to the gradation value of the image signal in the target pixel pair below the gradation value of the image signal in the target pixel pair A subfield code having a gradation value is selected as the lower gradation code. The average code selection unit calculates a gradation value to be displayed on the target pixel pair by adding a predetermined value to the gradation value of the image signal in the target pixel pair. A subfield code having a gradation value closer to the gradation value to be displayed on the target pixel pair is selected and output.
 また、本発明の画像表示装置において、上述した複数の基本となるサブフィールドコードは、発光するサブフィールドのうち最も階調重みが大きいサブフィールドと、そのサブフィールドよりも小さい階調重みを有する全てのサブフィールドが発光する基底コード、または、基底コードから2ライン差分部の比較結果によって決定される所定のサブフィールドを非点灯サブフィールドとする削除済み基底コードである。 In the image display device of the present invention, the plurality of basic subfield codes described above are all subfields having the largest gradation weight among the subfields that emit light, and all having a gradation weight smaller than that subfield. The sub-field is a base code that emits light, or a deleted base code that uses a predetermined sub-field determined by the comparison result of the two-line difference portion from the base code as a non-lighting sub-field.
 また、本発明の画像表示装置において、上述した所定の値は、ディザ処理により算出されるディザ値および誤差拡散処理により発生する誤差である。 Further, in the image display device of the present invention, the predetermined value described above is a dither value calculated by dither processing and an error generated by error diffusion processing.
 また、本発明は、階調重みが定められた複数のサブフィールドで1フィールドを構成し、複数のサブフィールドのそれぞれにおける発光と非発光との組合せを示すサブフィールドコードを用いて複数のサブフィールドのそれぞれの発光と非発光とを制御して、画像表示領域を構成する複数の画素のそれぞれに画像信号にもとづく階調値を表示して画像表示領域に画像を表示するとともに、書込み期間において走査電極の1本ずつに走査パルスを印加する1ライン毎書込み動作を行う少なくとも1つの第1種サブフィールドと、書込み期間において隣接する2本の走査電極に同時に走査パルスを印加する2ライン毎同時書込み動作を行う複数の第2種サブフィールドとで1フィールドを構成し、画像信号にもとづく階調値を画素に表示するためのサブフィールドコードである表示コードを生成する画像表示装置の駆動方法である。この駆動方法は、走査電極と直交する方向に隣接し、かつ第2種サブフィールドの書込み期間に同時に書込み動作を行う1対の画素の各画素に対応する画像信号の平均値を算出するステップと、上述の1対の画素の各画素に対応する画像信号の間で差分値を算出し、その差分値と第1種サブフィールドの階調重みとを比較するステップと、差分値と第1種サブフィールドの階調重みとを比較するステップにおける比較結果によって決定される所定の変数を上述の平均値から減算するステップと、所定の変数を平均値から減算するステップにおける減算結果を、所定のサブフィールドを非点灯サブフィールドとするサブフィールドコードに変換するステップと、差分値と第1種サブフィールドの階調重みとを比較するステップにおける比較結果にもとづき所定のサブフィールドを制御するサブフィールドコードを生成するステップと、所定のサブフィールドを非点灯サブフィールドとするサブフィールドコードに変換するステップにおいて生成されたサブフィールドコードと、所定のサブフィールドを制御するサブフィールドコードを生成するステップにおいて生成されたサブフィールドコードとを合成して表示コードを生成するステップとを有する。 The present invention also comprises a plurality of subfields using a subfield code indicating a combination of light emission and non-light emission in each of the plurality of subfields, with a plurality of subfields having gradation weights defined. By controlling the light emission and non-light emission of each of these, the gradation value based on the image signal is displayed on each of the plurality of pixels constituting the image display area to display the image in the image display area, and scanning in the writing period At least one first-type subfield that performs a line-by-line addressing operation that applies a scan pulse to each electrode and a line-by-line simultaneous address that simultaneously applies a scan pulse to two adjacent scan electrodes in the address period A plurality of second type subfields that perform the operation constitute one field, and gradation values based on image signals are displayed on the pixels. A driving method of an image display device for generating a display code is a sub-field code. The driving method includes calculating an average value of image signals corresponding to each pixel of a pair of pixels that are adjacent to each other in a direction orthogonal to the scanning electrode and simultaneously perform the writing operation in the writing period of the second type subfield. Calculating a difference value between the image signals corresponding to each pixel of the pair of pixels, comparing the difference value with the gradation weight of the first type subfield, and the difference value and the first type The subtraction result in the step of subtracting the predetermined variable determined from the comparison result in the step of comparing the gradation weight of the subfield from the average value and the step of subtracting the predetermined variable from the average value Comparison results in the step of converting the field into a non-lighting subfield code into a subfield code and the step of comparing the difference value with the gradation weight of the first type subfield Based on the subfield code generated in the step of generating a subfield code for controlling a predetermined subfield and the step of converting the predetermined subfield into a subfield code having a non-lighting subfield, and the predetermined subfield are controlled. Generating a display code by combining the subfield code generated in the step of generating the subfield code.
 これにより、画像信号から表示コードへの変換を、演算回路を用いた演算によって行うことができるようになる。したがって、高機能化や多機能化等への対応が必要な画像表示装置においても、画像信号から表示コードへの変換を行う膨大な数の変換テーブルを備える必要がなくなる。すなわち、様々な条件に応じて膨大な数の変換テーブルの中から最適な1つを選択するように画像信号処理回路を構成する必要がなくなる。さらに、画像表示装置における画像表示品質の低下を防止しつつ、書込み期間に要する時間を短縮することができる。 Thereby, the conversion from the image signal to the display code can be performed by the calculation using the calculation circuit. Therefore, even in an image display device that needs to cope with high functionality and multi-function, it is not necessary to provide a huge number of conversion tables for converting image signals into display codes. That is, it is not necessary to configure the image signal processing circuit so as to select an optimal one from a vast number of conversion tables according to various conditions. Furthermore, the time required for the writing period can be shortened while preventing the image display quality from being deteriorated in the image display device.
 また、本発明の画像表示装置の駆動方法は、複数の基本となるサブフィールドコードの中から、注目画素対における画像信号の階調値よりも大きく、かつ注目画素対における画像信号の階調値に最も近い階調値を有するサブフィールドコードを上階調基底コードとして選択するステップと、注目画素対における画像信号にもとづき、上階調基底コードにおける発光するサブフィールドを非発光のサブフィールドに変更して新たなサブフィールドコードを生成するためのルールを生成するステップと、上階調基底コードに上述のルールを適用して新たに生成されるサブフィールドコードの中から、注目画素対における画像信号の階調値より大きく注目画素対における画像信号の階調値に最も近い階調値を有するサブフィールドコードを上階調コードとして選択し、かつ、注目画素対における画像信号の階調値以下で注目画素対における画像信号の階調値に最も近い階調値を有するサブフィールドコードを下階調コードとして選択するステップと、注目画素対における画像信号の階調値に、所定の値を加算して注目画素対に表示すべき階調値を算出し、上階調コードおよび下階調コードのうち注目画素対に表示すべき階調値により近い階調値を有するサブフィールドコードを選択するステップとを有する。 In addition, the driving method of the image display device according to the present invention includes a plurality of basic subfield codes that are larger than the gradation value of the image signal in the pixel pair of interest and the gradation value of the image signal in the pixel pair of interest. Selecting the subfield code having the gradation value closest to the upper gradation base code, and changing the light emission subfield in the upper gradation base code to the non-light emission subfield based on the image signal in the pixel pair of interest. Generating a rule for generating a new subfield code, and applying the above-mentioned rule to the upper gradation base code, the image signal in the pixel pair of interest from the newly generated subfield code The sub-field code that has a gradation value that is larger than the gradation value of the pixel signal and that is closest to the gradation value of the image signal in the pixel of interest Selecting a subfield code having a gradation value that is equal to or less than the gradation value of the image signal in the pixel pair of interest and that is closest to the gradation value of the image signal in the pixel pair of interest as the lower gradation code. Then, a predetermined value is added to the gradation value of the image signal in the target pixel pair to calculate a gradation value to be displayed on the target pixel pair, and the target pixel pair of the upper gradation code and the lower gradation code is calculated. Selecting a subfield code having a gradation value closer to the gradation value to be displayed.
図1は、本発明の一実施の形態における画像表示装置に用いるパネルの構造を示す分解斜視図である。FIG. 1 is an exploded perspective view showing a structure of a panel used in an image display apparatus according to an embodiment of the present invention. 図2は、本発明の一実施の形態における画像表示装置に用いるパネルの電極配列図である。FIG. 2 is an electrode array diagram of a panel used in the image display apparatus according to the embodiment of the present invention. 図3は、本発明の一実施の形態における画像表示装置に用いるパネルの各電極に印加する駆動電圧波形を概略的に示す図である。FIG. 3 is a diagram schematically showing drive voltage waveforms applied to the respective electrodes of the panel used in the image display device according to the embodiment of the present invention. 図4は、本発明の一実施の形態における画像表示装置のサブフィールド構成およびシャッタ眼鏡の開閉動作を概略的に示す図である。FIG. 4 is a diagram schematically showing the subfield configuration of the image display device and the opening / closing operation of the shutter glasses in the embodiment of the present invention. 図5は、1フィールドを5個のサブフィールドで構成するときのコードセットの一例を示す図である。FIG. 5 is a diagram showing an example of a code set when one field is composed of five subfields. 図6は、本発明の一実施の形態における画像表示装置を構成する回路ブロックおよび画像表示システムの一例を概略的に示す図である。FIG. 6 is a diagram schematically showing an example of a circuit block and an image display system constituting the image display apparatus according to the embodiment of the present invention. 図7は、本発明の一実施の形態における画像表示装置の画像信号処理回路を構成する回路ブロックの一例を概略的に示す図である。FIG. 7 is a diagram schematically showing an example of a circuit block constituting the image signal processing circuit of the image display device according to the embodiment of the present invention. 図8Aは、本発明の一実施の形態における画像表示装置の画像信号処理回路における書込み動作の一例を概略的に示す図である。FIG. 8A is a diagram schematically showing an example of a writing operation in the image signal processing circuit of the image display device according to the embodiment of the present invention. 図8Bは、本発明の一実施の形態における画像表示装置の画像信号処理回路における書込み動作の他の一例を概略的に示す図である。FIG. 8B is a diagram schematically showing another example of the writing operation in the image signal processing circuit of the image display device according to the embodiment of the present invention. 図8Cは、本発明の一実施の形態における画像表示装置の画像信号処理回路における書込み動作の他の一例を概略的に示す図である。FIG. 8C is a diagram schematically showing another example of the write operation in the image signal processing circuit of the image display device according to the embodiment of the present invention. 図8Dは、本発明の一実施の形態における画像表示装置の画像信号処理回路における書込み動作の他の一例を概略的に示す図である。FIG. 8D is a diagram schematically showing another example of the writing operation in the image signal processing circuit of the image display device according to the embodiment of the present invention. 図8Eは、本発明の一実施の形態における画像表示装置の画像信号処理回路における書込み動作の他の一例を概略的に示す図である。FIG. 8E is a diagram schematically showing another example of the writing operation in the image signal processing circuit of the image display device according to the embodiment of the present invention. 図8Fは、本発明の一実施の形態における画像表示装置の画像信号処理回路における書込み動作の他の一例を概略的に示す図である。FIG. 8F is a diagram schematically showing another example of the writing operation in the image signal processing circuit of the image display device according to the embodiment of the present invention. 図8Gは、本発明の一実施の形態における画像表示装置の画像信号処理回路における書込み動作の他の一例を概略的に示す図である。FIG. 8G is a diagram schematically showing another example of the writing operation in the image signal processing circuit of the image display device according to the embodiment of the present invention. 図9は、本発明の一実施の形態における画像表示装置の平均コード変換部を構成する回路ブロックの一例を概略的に示す図である。FIG. 9 is a diagram schematically showing an example of a circuit block constituting the average code conversion unit of the image display device according to the embodiment of the present invention. 図10Aは、本発明の一実施の形態における画像表示装置に用いる基底コードセットの一例を示す図である。FIG. 10A is a diagram illustrating an example of a base code set used in the image display device according to the embodiment of the present invention. 図10Bは、本発明の一実施の形態における画像表示装置に用いる削除済み基底コードセットの一例を示す図である。FIG. 10B is a diagram showing an example of a deleted base code set used in the image display device according to the embodiment of the present invention. 図11Aは、本発明の一実施の形態における画像表示装置の中間コード生成部において生成される中間コードセットの一例を示す図である。FIG. 11A is a diagram illustrating an example of an intermediate code set generated by the intermediate code generation unit of the image display device according to the embodiment of the present invention. 図11Bは、本発明の一実施の形態における画像表示装置の中間コード生成部において生成される中間コードセットの他の一例を示す図である。FIG. 11B is a diagram showing another example of the intermediate code set generated by the intermediate code generation unit of the image display device according to the embodiment of the present invention. 図11Cは、本発明の一実施の形態における画像表示装置の中間コード生成部において生成される中間コードセットの他の一例を示す図である。FIG. 11C is a diagram illustrating another example of the intermediate code set generated by the intermediate code generation unit of the image display device according to the embodiment of the present invention. 図12Aは、本発明の一実施の形態における画像表示装置で使用するディザパターンの一例を示す図である。FIG. 12A is a diagram illustrating an example of a dither pattern used in the image display device according to the embodiment of the present invention. 図12Bは、本発明の一実施の形態における画像表示装置で使用するディザパターンの他の一例を示す図である。FIG. 12B is a diagram showing another example of the dither pattern used in the image display device according to the embodiment of the present invention. 図13は、本発明の一実施の形態における画像表示装置の誤差拡散部の誤差拡散係数を示す図である。FIG. 13 is a diagram showing the error diffusion coefficient of the error diffusion unit of the image display device according to the embodiment of the present invention. 図14は、本発明の一実施の形態における画像表示装置の画像信号処理回路の動作を示すフローチャートである。FIG. 14 is a flowchart showing the operation of the image signal processing circuit of the image display device according to the embodiment of the present invention. 図15は、本発明の一実施の形態における画像表示装置に用いるパネルの各電極に印加する駆動電圧波形の他の例を概略的に示す図である。FIG. 15 is a diagram schematically showing another example of a drive voltage waveform applied to each electrode of the panel used in the image display device according to the embodiment of the present invention. 図16Aは、本発明の一実施の形態における画像表示装置に用いる基底コードセットの一例を示す図である。FIG. 16A is a diagram illustrating an example of a base code set used in the image display device according to the embodiment of the present invention. 図16Bは、本発明の一実施の形態における画像表示装置に用いる削除済み基底コードセットの他の一例を示す図である。FIG. 16B is a diagram showing another example of the deleted base code set used in the image display device according to the embodiment of the present invention. 図16Cは、本発明の一実施の形態における画像表示装置に用いる削除済み基底コードセットの他の一例を示す図である。FIG. 16C is a diagram showing another example of the deleted base code set used in the image display device according to the embodiment of the present invention.
 以下、本発明の実施の形態における画像表示装置について、プラズマディスプレイパネルを用いた3Dプラズマディスプレイ装置を例に挙げて、図面を用いて説明する。 Hereinafter, an image display device according to an embodiment of the present invention will be described with reference to the drawings, taking a 3D plasma display device using a plasma display panel as an example.
 (実施の形態)
 図1は、本発明の一実施の形態における画像表示装置に用いるパネル10の構造を示す分解斜視図である。
(Embodiment)
FIG. 1 is an exploded perspective view showing the structure of panel 10 used in the image display apparatus according to the embodiment of the present invention.
 ガラス製の前面基板11上には、走査電極12と維持電極13とからなる表示電極対14が複数形成されている。そして、走査電極12と維持電極13とを覆うように誘電体層15が形成され、その誘電体層15上に保護層16が形成されている。 A plurality of display electrode pairs 14 each including a scanning electrode 12 and a sustaining electrode 13 are formed on a glass front substrate 11. A dielectric layer 15 is formed so as to cover the scan electrode 12 and the sustain electrode 13, and a protective layer 16 is formed on the dielectric layer 15.
 この保護層16は、放電セルにおける放電開始電圧を下げるために、パネルの材料として使用実績があり、ネオン(Ne)およびキセノン(Xe)ガスを封入した場合に2次電子放出係数が大きく耐久性に優れた酸化マグネシウム(MgO)を主成分とする材料で形成されている。 This protective layer 16 has been used as a panel material in order to lower the discharge start voltage in the discharge cell, and has a large secondary electron emission coefficient and durability when neon (Ne) and xenon (Xe) gas is sealed. It is made of a material mainly composed of magnesium oxide (MgO).
 保護層16は、一つの層で構成されていてもよく、あるいは複数の層で構成されていてもよい。また、層の上に粒子が存在する構成であってもよい。 The protective layer 16 may be composed of a single layer or may be composed of a plurality of layers. Moreover, the structure which particle | grains exist on a layer may be sufficient.
 背面基板21上にはデータ電極22が複数形成され、データ電極22を覆うように誘電体層23が形成され、さらにその上に井桁状の隔壁24が形成されている。そして、隔壁24の側面および誘電体層23上には赤色(R)に発光する蛍光体層25R、緑色(G)に発光する蛍光体層25G、および青色(B)に発光する蛍光体層25Bが設けられている。以下、蛍光体層25R、蛍光体層25G、蛍光体層25Bをまとめて蛍光体層25とも記す。 A plurality of data electrodes 22 are formed on the rear substrate 21, a dielectric layer 23 is formed so as to cover the data electrodes 22, and a grid-like partition wall 24 is further formed thereon. On the side surfaces of the barrier ribs 24 and on the dielectric layer 23, a phosphor layer 25R that emits red (R), a phosphor layer 25G that emits green (G), and a phosphor layer 25B that emits blue (B). Is provided. Hereinafter, the phosphor layer 25R, the phosphor layer 25G, and the phosphor layer 25B are collectively referred to as a phosphor layer 25.
 これら前面基板11と背面基板21とを、微小な空間を挟んで表示電極対14とデータ電極22とが交差するように対向配置し、前面基板11と背面基板21との間隙に放電空間を設ける。そして、その外周部をガラスフリット等の封着材によって封着する。その放電空間には、例えばネオンとキセノンの混合ガスを放電ガスとして封入する。 The front substrate 11 and the rear substrate 21 are arranged to face each other so that the display electrode pair 14 and the data electrode 22 intersect each other with a minute space therebetween, and a discharge space is provided in the gap between the front substrate 11 and the rear substrate 21. . And the outer peripheral part is sealed with sealing materials, such as glass frit. For example, a mixed gas of neon and xenon is sealed in the discharge space as a discharge gas.
 放電空間は隔壁24によって複数の区画に仕切られており、表示電極対14とデータ電極22とが交差する部分に、画素を構成する発光素子である放電セルが形成される。 The discharge space is partitioned into a plurality of sections by the barrier ribs 24, and discharge cells, which are light-emitting elements constituting the pixels, are formed at the intersections between the display electrode pairs 14 and the data electrodes 22.
 そして、これらの放電セルで放電を発生し、放電セルの蛍光体層25を発光(放電セルを点灯)することにより、パネル10にカラーの画像を表示する。 Then, a discharge is generated in these discharge cells, and the phosphor layer 25 of the discharge cells emits light (lights the discharge cells), thereby displaying a color image on the panel 10.
 なお、パネル10においては、表示電極対14が延伸する方向に配列された連続する3つの放電セルで1つの画素を構成する。この3つの放電セルとは、蛍光体層25Rを有し赤色(R)に発光する放電セル(赤の放電セル)と、蛍光体層25Gを有し緑色(G)に発光する放電セル(緑の放電セル)と、蛍光体層25Bを有し青色(B)に発光する放電セル(青の放電セル)である。 In the panel 10, one pixel is composed of three consecutive discharge cells arranged in the direction in which the display electrode pair 14 extends. The three discharge cells are a discharge cell having a phosphor layer 25R and emitting red (R) (red discharge cell), and a discharge cell having a phosphor layer 25G and emitting green (G) (green). And a discharge cell having a phosphor layer 25B and emitting blue (B) light (blue discharge cell).
 なお、パネル10の構造は上述したものに限られるわけではなく、例えばストライプ状の隔壁を備えたものであってもよい。 Note that the structure of the panel 10 is not limited to the above-described structure, and may be, for example, provided with a stripe-shaped partition wall.
 図2は、本発明の一実施の形態におけるプラズマディスプレイ装置に用いるパネル10の電極配列図である。 FIG. 2 is an electrode array diagram of panel 10 used in the plasma display device according to one embodiment of the present invention.
 パネル10には、水平方向(行方向、ライン方向)に延長されたn本の走査電極SC1~走査電極SCn(図1の走査電極12)およびn本の維持電極SU1~維持電極SUn(図1の維持電極13)が配列され、垂直方向(列方向)に延長されたm本のデータ電極D1~データ電極Dm(図1のデータ電極22)が配列されている。 The panel 10 includes n scan electrodes SC1 to SCn (scan electrode 12 in FIG. 1) extended in the horizontal direction (row direction and line direction) and n sustain electrodes SU1 to SUn (FIG. 1). The sustain electrodes 13) are arranged, and m data electrodes D1 to Dm (data electrodes 22 in FIG. 1) extending in the vertical direction (column direction) are arranged.
 そして、1対の走査電極SCi(i=1~n)および維持電極SUiと1つのデータ電極Dj(j=1~m)とが交差した領域に発光素子としての放電セルが1つ形成される。すなわち、1対の表示電極対14上には、m個の放電セルが形成され、m/3個の画素が形成される。そして、放電セルは放電空間内にm×n個形成され、m×n個の放電セルが形成された領域がパネル10の画像表示領域となる。例えば、画素数が1920×1080個のパネルでは、m=1920×3となり、n=1080となる。 One discharge cell as a light emitting element is formed in a region where a pair of scan electrode SCi (i = 1 to n) and sustain electrode SUi intersects with one data electrode Dj (j = 1 to m). . In other words, m discharge cells are formed on one pair of display electrodes 14 and m / 3 pixels are formed. Then, m × n discharge cells are formed in the discharge space, and an area where m × n discharge cells are formed becomes an image display area of the panel 10. For example, in a panel having 1920 × 1080 pixels, m = 1920 × 3 and n = 1080.
 例えば、データ電極Dp(p=3×q-2 : qはm/3以下の正の整数)を有する放電セルには赤の蛍光体が蛍光体層25Rとして塗布され、データ電極Dp+1を有する放電セルには緑の蛍光体が蛍光体層25Gとして塗布され、データ電極Dp+2を有する放電セルには青の蛍光体が蛍光体層25Bとして塗布されている。 For example, a discharge cell having a data electrode Dp (p = 3 × q−2: q is a positive integer less than or equal to m / 3) is coated with a red phosphor as a phosphor layer 25R, and has a data electrode Dp + 1. The cell is coated with a green phosphor as a phosphor layer 25G, and the discharge cell having the data electrode Dp + 2 is coated with a blue phosphor as a phosphor layer 25B.
 次に、パネル10を駆動するための駆動電圧波形とその動作の概要について説明する。 Next, a driving voltage waveform for driving the panel 10 and an outline of its operation will be described.
 本実施の形態におけるプラズマディスプレイ装置は、サブフィールド法によってパネル10を駆動する。サブフィールド法では、画像信号の1フィールドを時間軸上で複数のサブフィールドに分割し、各サブフィールドに階調重みをそれぞれ設定する。したがって、各フィールドは階調重みが異なる複数のサブフィールドを有する。 The plasma display device in the present embodiment drives the panel 10 by the subfield method. In the subfield method, one field of an image signal is divided into a plurality of subfields on the time axis, and a gradation weight is set for each subfield. Therefore, each field has a plurality of subfields having different gradation weights.
 そして、画像信号にもとづき、サブフィールド毎に各放電セルの発光・非発光を制御する。すなわち、画像信号にもとづき、発光するサブフィールドと非発光のサブフィールドとを組み合わせることによって、画像信号にもとづく複数の階調をパネル10に表示する。 And based on the image signal, light emission / non-light emission of each discharge cell is controlled for each subfield. That is, a plurality of gradations based on the image signal are displayed on the panel 10 by combining the light-emitting subfield and the non-light-emitting subfield based on the image signal.
 なお、本実施の形態において、画像表示装置に入力される画像信号は、3D画像信号である。3D画像信号は、右目用画像信号と左目用画像信号とをフィールド毎に交互に繰り返す立体視用の画像信号である。 In the present embodiment, the image signal input to the image display device is a 3D image signal. The 3D image signal is a stereoscopic image signal in which a right-eye image signal and a left-eye image signal are alternately repeated for each field.
 そして、右目用画像信号をパネル10に表示する右目用フィールドと、左目用画像信号をパネル10に表示する左目用フィールドとを交互に繰り返し、パネル10に右目用画像および左目用画像からなる立体視用の画像を表示する。それとともに、パネル10に表示されるその立体視用の画像(3D画像)を、右目用フィールドおよび左目用フィールドに同期して右目用シャッタおよび左目用シャッタをそれぞれ開閉するシャッタ眼鏡を通して使用者が観測する。これにより、使用者は、パネル10に表示される3D画像を立体視することができる。 Then, the right-eye field for displaying the right-eye image signal on the panel 10 and the left-eye field for displaying the left-eye image signal on the panel 10 are alternately repeated, and the panel 10 includes the stereoscopic image including the right-eye image and the left-eye image. Display an image for At the same time, the stereoscopic image (3D image) displayed on the panel 10 is observed by the user through shutter glasses that open and close the right-eye shutter and the left-eye shutter in synchronization with the right-eye field and the left-eye field, respectively. To do. Thereby, the user can stereoscopically view the 3D image displayed on the panel 10.
 右目用フィールドと左目用フィールドとでは表示する画像信号が異なるだけであり、1つのフィールドを構成するサブフィールドの数、各サブフィールドの階調重み、サブフィールドの配列等、フィールドの構成は同じである。そこで、まず1つのフィールドの構成と各電極に印加する駆動電圧波形について説明する。 The right-eye field and the left-eye field differ only in the image signal to be displayed, and the field configuration is the same, such as the number of subfields constituting one field, the gradation weight of each subfield, and the arrangement of subfields. is there. First, the configuration of one field and the drive voltage waveform applied to each electrode will be described.
 以下、「右目用」および「左目用」の区別が必要ない場合には、右目用フィールドおよび左目用フィールドを単に「フィールド」と略記する。また、右目用画像信号および左目用画像信号を単に「画像信号」と略記する。 Hereinafter, when it is not necessary to distinguish between “for right eye” and “for left eye”, the field for right eye and the field for left eye are simply abbreviated as “field”. Further, the image signal for the right eye and the image signal for the left eye are simply abbreviated as “image signal”.
 なお、本実施の形態では、使用者に3D画像の動画像が滑らかに観測されるように、フィールド周波数(1秒間に発生するフィールドの数)を通常の2倍(例えば、120Hz)に設定している。 In this embodiment, the field frequency (the number of fields generated per second) is set to twice the normal frequency (for example, 120 Hz) so that the user can smoothly observe a 3D moving image. ing.
 各フィールドは複数のサブフィールドを有し、それぞれのサブフィールドは初期化期間、書込み期間および維持期間を備える。 Each field has a plurality of subfields, and each subfield has an initialization period, an address period, and a sustain period.
 初期化期間では、放電セルに初期化放電を発生し、続く書込み期間における書込み放電に必要な壁電荷を各電極上に形成する初期化動作を行う。 In the initializing period, an initializing operation is performed in which initializing discharge is generated in the discharge cells and wall charges necessary for the address discharge in the subsequent address period are formed on each electrode.
 初期化動作には、直前のサブフィールドの動作にかかわらず全ての放電セルに強制的に初期化放電を発生する「強制初期化動作」と、直前のサブフィールドの書込み期間で書込み放電を発生した放電セルだけに選択的に初期化放電を発生する「選択初期化動作」とがある。強制初期化動作では、上昇する傾斜波形電圧および下降する傾斜波形電圧を走査電極12に印加して、放電セルに初期化放電を発生する。 Initialization operation includes “forced initialization operation” that forcibly generates an initializing discharge in all discharge cells regardless of the operation of the immediately preceding subfield and an addressing discharge that occurs in the addressing period of the immediately preceding subfield. There is a “selective initialization operation” in which initializing discharge is selectively generated only in the discharge cells. In the forced initializing operation, the rising ramp waveform voltage and the falling ramp waveform voltage are applied to the scan electrode 12 to generate an initializing discharge in the discharge cell.
 そして、1フィールドを構成する複数のサブフィールドのうち、1つのサブフィールドの初期化期間では全ての放電セルで強制初期化動作を行い、他のサブフィールドの初期化期間では全ての放電セルで選択初期化動作を行う。 Then, among the plurality of subfields constituting one field, the forced initializing operation is performed in all discharge cells in the initializing period of one subfield, and all the discharge cells are selected in the initializing period of the other subfield. Perform initialization.
 以下、強制初期化動作を行う初期化期間を「強制初期化期間」と呼称し、強制初期化期間を有するサブフィールドを「強制初期化サブフィールド」と呼称する。また、選択初期化動作を行う初期化期間を「選択初期化期間」と呼称し、選択初期化期間を有するサブフィールドを「選択初期化サブフィールド」と呼称する。 Hereinafter, the initialization period in which the forced initialization operation is performed is referred to as “forced initialization period”, and the subfield having the forced initialization period is referred to as “forced initialization subfield”. An initialization period for performing the selective initialization operation is referred to as a “selective initialization period”, and a subfield having the selective initialization period is referred to as a “selective initialization subfield”.
 なお、本実施の形態では、サブフィールドSF1を強制初期化サブフィールドとし、他のサブフィールド(サブフィールドSF2以降のサブフィールド)を選択初期化サブフィールドとする。しかし、本発明は、強制初期化サブフィールドとするサブフィールドおよび選択初期化サブフィールドとするサブフィールドが何ら上述したサブフィールドに限定されるものではない。また、画像信号等にもとづいてサブフィールド構成を切り換える構成であってもよい。 In the present embodiment, subfield SF1 is a forced initialization subfield, and the other subfields (subfields subsequent to subfield SF2) are selected initialization subfields. However, the present invention is not limited to the above-described subfields as subfields for forced initialization subfields and subfields for selective initialization subfields. Moreover, the structure which switches a subfield structure based on an image signal etc. may be sufficient.
 書込み期間では、走査電極12に走査パルスを印加するとともにデータ電極22に選択的に書込みパルスを印加し、発光するべき放電セルに選択的に書込み放電を発生する。そして、続く維持期間で維持放電を発生するための壁電荷をその放電セル内に形成する書込み動作を行う。 In the address period, a scan pulse is applied to the scan electrode 12 and an address pulse is selectively applied to the data electrode 22 to selectively generate an address discharge in the discharge cells to emit light. Then, an address operation is performed to form wall charges in the discharge cells for generating a sustain discharge in the subsequent sustain period.
 なお、本実施の形態における画像表示装置では、書込み期間において、2ライン毎同時書込み動作、または1ライン毎書込み動作のいずれかの書込み動作を行う。 In the image display device according to the present embodiment, either the simultaneous writing operation for every two lines or the writing operation for every one line is performed in the writing period.
 2ライン毎同時書込み動作は、隣接する2本の走査電極12に同時に走査パルスを印加するとともにデータ電極22に選択的に書込みパルスを印加する書込み動作のことである。2ライン毎同時書込み動作では、維持放電を発生させるべき放電セルに、2ライン同時に書込み放電を発生する。 The simultaneous writing operation for every two lines is an addressing operation in which a scanning pulse is simultaneously applied to two adjacent scanning electrodes 12 and a writing pulse is selectively applied to the data electrodes 22. In the simultaneous address operation for every two lines, the address discharge is simultaneously generated in the discharge cells in which the sustain discharge is to be generated.
 1ライン毎書込み動作は、走査電極SC1~走査電極SCnの1本ずつに順次走査パルスを印加するとともにデータ電極22に選択的に書込みパルスを印加する書込み動作のことである。1ライン毎書込み動作では、維持放電を発生させるべき放電セルに、1ライン毎に書込み放電を発生する。 The address operation for each line is an address operation in which a scan pulse is sequentially applied to each of scan electrode SC1 to scan electrode SCn and an address pulse is selectively applied to data electrode 22. In the address operation for each line, an address discharge is generated for each line in a discharge cell in which a sustain discharge is to be generated.
 したがって、2ライン毎同時書込み動作を行う書込み期間では、1ライン毎書込み動作を行う書込み期間と比較して、書込み期間の長さを短縮することができる。 Therefore, in the writing period in which the simultaneous writing operation is performed every two lines, the length of the writing period can be shortened as compared with the writing period in which the writing operation is performed every line.
 以下、本実施の形態では、書込み期間に1ライン毎書込み動作を行うサブフィールドを「第1種サブフィールド」と呼称する。また、書込み期間に2ライン毎同時書込み動作を行うサブフィールドを「第2種サブフィールド」と呼称する。 Hereinafter, in the present embodiment, a subfield that performs a write operation for each line in the write period is referred to as a “first type subfield”. Further, a subfield that performs the simultaneous writing operation every two lines during the writing period is referred to as a “second type subfield”.
 本実施の形態における画像表示装置では、1フィールドに、第1種サブフィールドと第2種サブフィールドとが混在する。すなわち、本実施の形態では、1フィールドは、少なくとも1つの第1種サブフィールドと、複数の第2種サブフィールドとによって構成される。 In the image display apparatus according to the present embodiment, the first type subfield and the second type subfield are mixed in one field. That is, in the present embodiment, one field includes at least one first type subfield and a plurality of second type subfields.
 なお、上述の1ラインとは、1対の表示電極対14上に形成される全放電セルからなる列のことである。 In addition, the above-mentioned 1 line is a row | line which consists of all the discharge cells formed on one pair of display electrode pairs 14. FIG.
 維持期間では、それぞれのサブフィールドに設定された階調重みに所定の比例定数を乗じた数の維持パルスを走査電極12および維持電極13に交互に印加し、直前の書込み期間に書込み放電を発生した放電セルで維持放電を発生し、その放電セルを発光する維持動作を行う。この比例定数が輝度倍数である。 In the sustain period, sustain pulses of the number obtained by multiplying the gradation weight set in each subfield by a predetermined proportional constant are alternately applied to the scan electrode 12 and the sustain electrode 13 to generate an address discharge in the immediately preceding address period. A sustain discharge is generated in the discharged discharge cell, and a sustain operation for emitting light from the discharge cell is performed. This proportionality constant is a luminance multiple.
 階調重みとは、各サブフィールドで表示する輝度の大きさの比を表すものであり、各サブフィールドでは階調重みに応じた数の維持パルスを維持期間に発生する。そのため、例えば、階調重み「8」のサブフィールドは、階調重み「1」のサブフィールドの約8倍の輝度で発光し、階調重み「2」のサブフィールドの約4倍の輝度で発光する。したがって、例えば、階調重み「8」のサブフィールドと階調重み「2」のサブフィールドを発光すれば、階調値「10」に相当する輝度で放電セルを発光することができる。 The gradation weight represents the ratio of the magnitude of the luminance displayed in each subfield, and the number of sustain pulses corresponding to the gradation weight is generated in the sustain period in each subfield. Therefore, for example, the subfield with the gradation weight “8” emits light with a luminance about eight times that of the subfield with the gradation weight “1”, and about four times as high as the subfield with the gradation weight “2”. Emits light. Therefore, for example, if the subfield with the gradation weight “8” and the subfield with the gradation weight “2” are emitted, the discharge cell can emit light with a luminance corresponding to the gradation value “10”.
 こうして、画像信号に応じた組合せでサブフィールド毎に各放電セルの発光・非発光を制御して各サブフィールドを選択的に発光することにより、様々な階調値で各放電セルを発光する。すなわち、各放電セルに画像信号に応じた階調値を表示し、画像信号にもとづく画像をパネル10に表示することができる。 Thus, each discharge cell emits light with various gradation values by selectively emitting light in each subfield by controlling light emission / non-light emission of each discharge cell for each subfield in a combination according to the image signal. That is, a gradation value corresponding to an image signal can be displayed on each discharge cell, and an image based on the image signal can be displayed on the panel 10.
 なお、パネル10において、1つの画素は、上述したように、表示電極対14が延伸する方向に配列された連続する3つの放電セル、すなわち、赤の放電セル、緑の放電セル、青の放電セルで構成されるが、本実施の形態では、以下、赤の放電セルを「赤の画素」、緑の放電セルを「緑の画素」、青の放電セルを「青の画素」とも記す。 In the panel 10, as described above, one pixel includes three consecutive discharge cells arranged in the direction in which the display electrode pair 14 extends, that is, a red discharge cell, a green discharge cell, and a blue discharge. In the present embodiment, a red discharge cell is also referred to as a “red pixel”, a green discharge cell as a “green pixel”, and a blue discharge cell as a “blue pixel”.
 なお、本実施の形態においては、右目用フィールドおよび左目用フィールドをそれぞれ5つのサブフィールド(サブフィールドSF1、サブフィールドSF2、サブフィールドSF3、サブフィールドSF4、サブフィールドSF5)で構成し、サブフィールドSF1からサブフィールドSF5の各サブフィールドにそれぞれ(1、10、6、3、2)の階調重みを設定するものとする。また、サブフィールドSF1、サブフィールドSF3、サブフィールドSF4、サブフィールドSF5を第2種サブフィールドとし、サブフィールドSF2を第1種サブフィールドとする。 In the present embodiment, the right-eye field and the left-eye field are each composed of five subfields (subfield SF1, subfield SF2, subfield SF3, subfield SF4, subfield SF5), and subfield SF1. To (1), (10), (6), (3), (2)) is set to each subfield of subfield SF5. Further, the subfield SF1, the subfield SF3, the subfield SF4, and the subfield SF5 are the second type subfield, and the subfield SF2 is the first type subfield.
 しかし、本発明は、第1種サブフィールドとするサブフィールドおよび第2種サブフィールドとするサブフィールドが何ら上述したサブフィールドに限定されるものではない。また、1フィールドを構成するサブフィールドの数、および各サブフィールドに設定する階調重みが何ら上述したサブフィールド構成に限定されるものではない。それらは、画像表示装置の仕様等に応じて最適に設定することが好ましい。 However, in the present invention, the subfields that are the first type subfield and the subfields that are the second type subfield are not limited to the subfields described above. Further, the number of subfields constituting one field and the gradation weight set in each subfield are not limited to the above-described subfield configuration. They are preferably set optimally according to the specifications of the image display device.
 図3は、本発明の一実施の形態におけるプラズマディスプレイ装置に用いるパネル10の各電極に印加する駆動電圧波形を概略的に示す図である。 FIG. 3 is a diagram schematically showing drive voltage waveforms applied to the respective electrodes of panel 10 used in the plasma display device according to one embodiment of the present invention.
 図3には、データ電極D1~データ電極Dm、書込み期間において最初に書込み動作を行う走査電極SC1、書込み期間において最後に書込み動作を行う走査電極SCn(例えば、走査電極SC1080)、維持電極SU1~維持電極SUnのそれぞれに印加する駆動電圧波形を示す。また、以下における走査電極SCi、維持電極SUi、データ電極Dkは、各電極の中から画像データ(サブフィールド毎の発光・非発光を示すデータ)にもとづき選択された電極を表す。 FIG. 3 shows data electrode D1 to data electrode Dm, scan electrode SC1 that performs the address operation first in the address period, scan electrode SCn that performs the address operation last in the address period (for example, scan electrode SC1080), sustain electrode SU1 to The drive voltage waveform applied to each of the sustain electrodes SUn is shown. Scan electrode SCi, sustain electrode SUi, and data electrode Dk in the following represent electrodes selected based on image data (data indicating light emission / non-light emission for each subfield) from among the electrodes.
 また、図3には、強制初期化サブフィールドであり第2種サブフィールドであるサブフィールドSF1と、選択初期化サブフィールドであり第1種サブフィールドであるサブフィールドSF2と、選択初期化サブフィールドであり第2種サブフィールドであるサブフィールドSF3とを示す。サブフィールドSF1と、サブフィールドSF2およびサブフィールドSF3とでは、初期化期間に走査電極12に印加する駆動電圧の波形形状が異なる。また、サブフィールドSF1およびサブフィールドSF3と、サブフィールドSF2とでは、書込み期間における書込み動作が異なる。 FIG. 3 also shows a subfield SF1 that is a forced initialization subfield and the second type subfield, a subfield SF2 that is a selective initialization subfield and the first type subfield, and a selective initialization subfield. And the subfield SF3 which is the second type subfield. The subfield SF1, the subfield SF2, and the subfield SF3 have different waveform shapes of the drive voltage applied to the scan electrode 12 in the initialization period. In addition, the subfield SF1, the subfield SF3, and the subfield SF2 have different write operations in the write period.
 なお、サブフィールドSF4以降の各サブフィールドは、選択初期化サブフィールドであり第2種サブフィールドであるため、維持パルスの発生数を除き、サブフィールドSF3とほぼ同様の駆動電圧波形を発生する。 It should be noted that each subfield after subfield SF4 is a selective initialization subfield and is a second type subfield, and therefore generates substantially the same drive voltage waveform as subfield SF3 except for the number of sustain pulses.
 まず、強制初期化サブフィールドであるサブフィールドSF1について説明する。 First, the subfield SF1, which is a forced initialization subfield, will be described.
 強制初期化動作を行うサブフィールドSF1の初期化期間Ti1の前半部では、データ電極D1~データ電極Dm、維持電極SU1~維持電極SUnには、それぞれ電圧0(V)を印加する。走査電極SC1~走査電極SCnには、電圧0(V)を印加した後に電圧Vi1を印加し、電圧Vi1から電圧Vi2まで緩やかに上昇する傾斜波形電圧(以下、「上り傾斜波形電圧」と呼称する)を印加する。このとき、電圧Vi1は、維持電極SU1~維持電極SUnに対して放電開始電圧よりも低い電圧に設定し、電圧Vi2は、維持電極SU1~維持電極SUnに対して放電開始電圧を超える電圧に設定する。 In the first half of the initialization period Ti1 of the subfield SF1 in which the forced initialization operation is performed, the voltage 0 (V) is applied to the data electrode D1 to the data electrode Dm and the sustain electrode SU1 to the sustain electrode SUn. A voltage Vi1 is applied to scan electrode SC1 through scan electrode SCn after voltage 0 (V) is applied, and a ramp waveform voltage that gradually rises from voltage Vi1 to voltage Vi2 (hereinafter referred to as an “upward ramp waveform voltage”). ) Is applied. At this time, voltage Vi1 is set to a voltage lower than the discharge start voltage for sustain electrode SU1 to sustain electrode SUn, and voltage Vi2 is set to a voltage exceeding the discharge start voltage for sustain electrode SU1 to sustain electrode SUn. To do.
 この上り傾斜波形電圧が上昇する間に、各放電セルの走査電極SC1~走査電極SCnと維持電極SU1~維持電極SUnとの間、および走査電極SC1~走査電極SCnとデータ電極D1~データ電極Dmとの間に、それぞれ微弱な初期化放電が持続して発生する。そして、走査電極SC1~走査電極SCn上に負の壁電圧が蓄積され、データ電極D1~データ電極Dm上および維持電極SU1~維持電極SUn上には正の壁電圧が蓄積される。この電極上の壁電圧とは、電極を覆う誘電体層上、保護層上、蛍光体層上等に蓄積された壁電荷により生じる電圧を表す。 While the rising ramp waveform voltage rises, scan electrode SC1 through scan electrode SCn and sustain electrode SU1 through sustain electrode SUn, and scan electrode SC1 through scan electrode SCn and data electrode D1 through data electrode Dm of each discharge cell. In between, weak initializing discharges are continuously generated. Negative wall voltage is accumulated on scan electrode SC1 through scan electrode SCn, and positive wall voltage is accumulated on data electrode D1 through data electrode Dm and sustain electrode SU1 through sustain electrode SUn. The wall voltage on the electrode represents a voltage generated by wall charges accumulated on the dielectric layer covering the electrode, the protective layer, the phosphor layer, and the like.
 サブフィールドSF1の初期化期間Ti1の後半部では、維持電極SU1~維持電極SUnには正の電圧Veを印加し、データ電極D1~データ電極Dmには電圧0(V)を印加する。走査電極SC1~走査電極SCnには、電圧Vi3から負の電圧Vi4まで緩やかに下降する傾斜波形電圧(以下、「下り傾斜波形電圧」と呼称する)を印加する。電圧Vi3は、維持電極SU1~維持電極SUnに対して放電開始電圧未満の電圧に設定し、電圧Vi4は、維持電極SU1~維持電極SUnに対して放電開始電圧を超える電圧に設定する。 In the latter half of the initialization period Ti1 of the subfield SF1, the positive voltage Ve is applied to the sustain electrodes SU1 to SUn, and the voltage 0 (V) is applied to the data electrodes D1 to Dm. A scan waveform SC1 to scan electrode SCn are applied with a ramp waveform voltage that gently falls from voltage Vi3 to negative voltage Vi4 (hereinafter referred to as “down ramp waveform voltage”). Voltage Vi3 is set to a voltage lower than the discharge start voltage with respect to sustain electrode SU1 through sustain electrode SUn, and voltage Vi4 is set to a voltage exceeding the discharge start voltage with respect to sustain electrode SU1 through sustain electrode SUn.
 この下り傾斜波形電圧を走査電極SC1~走査電極SCnに印加する間に、各放電セルの走査電極SC1~走査電極SCnと維持電極SU1~維持電極SUnとの間、および走査電極SC1~走査電極SCnとデータ電極D1~データ電極Dmとの間に、それぞれ微弱な初期化放電が発生する。これにより、走査電極SC1~走査電極SCn上の負の壁電圧および維持電極SU1~維持電極SUn上の正の壁電圧が弱められ、データ電極D1~データ電極Dm上の正の壁電圧は、書込み期間Tw1での書込み動作に適した電圧に調整される。 While this downward ramp waveform voltage is applied to scan electrode SC1 through scan electrode SCn, between discharge electrode SC1 through scan electrode SCn and sustain electrode SU1 through sustain electrode SUn of each discharge cell, and scan electrode SC1 through scan electrode SCn. Between the data electrode D1 and the data electrode Dm, a weak initializing discharge is generated. As a result, the negative wall voltage on scan electrode SC1 through scan electrode SCn and the positive wall voltage on sustain electrode SU1 through sustain electrode SUn are weakened, and the positive wall voltage on data electrode D1 through data electrode Dm is written. The voltage is adjusted to a voltage suitable for the writing operation in the period Tw1.
 以上の電圧波形が、直前のサブフィールドの動作にかかわらず放電セルに初期化放電を発生する強制初期化波形である。そして、強制初期化波形を走査電極12に印加する動作が強制初期化動作である。 The above voltage waveform is a forced initializing waveform that generates an initializing discharge in the discharge cell regardless of the operation of the immediately preceding subfield. The operation for applying the forced initialization waveform to the scan electrode 12 is the forced initialization operation.
 以上により、強制初期化サブフィールド(サブフィールドSF1)の初期化期間Ti1における強制初期化動作が終了する。そして、強制初期化サブフィールドの初期化期間Ti1では、パネル10の画像表示領域における全ての放電セルで強制的に初期化放電を発生する。 Thus, the forced initialization operation in the initialization period Ti1 of the forced initialization subfield (subfield SF1) ends. In the initializing period Ti1 of the forced initializing subfield, initializing discharge is forcibly generated in all the discharge cells in the image display area of the panel 10.
 次に、書込み期間について説明する。 Next, the writing period will be described.
 本実施の形態における画像表示装置では、書込み期間において「2ライン毎同時書込み動作」または「1ライン毎書込み動作」のいずれかの書込み動作を行う。 In the image display apparatus according to the present embodiment, either the “simultaneous writing operation for every two lines” or the “writing operation for every line” is performed during the writing period.
 2ライン毎同時書込み動作では、走査電極SC1と走査電極SC2、走査電極SC3と走査電極SC4、走査電極SC5と走査電極SC6、・・・、走査電極SCn-1と走査電極SCnという順番で、隣接する2本の走査電極12に同時に走査パルスを印加する。すなわち、2ライン毎同時書込み動作は、走査電極12がパネル10に配列された順番で、隣接する2本の走査電極12に同時に走査パルスを順次印加していく書込み動作である。 In the simultaneous writing operation every two lines, scan electrode SC1 and scan electrode SC2, scan electrode SC3 and scan electrode SC4, scan electrode SC5 and scan electrode SC6,..., Scan electrode SCn-1 and scan electrode SCn are adjacent in this order. A scanning pulse is simultaneously applied to the two scanning electrodes 12 to be performed. That is, the two-line simultaneous write operation is a write operation in which scan pulses are sequentially applied to two adjacent scan electrodes 12 in the order in which the scan electrodes 12 are arranged on the panel 10.
 1ライン毎書込み動作では、走査電極SC1、走査電極SC2、走査電極SC3、走査電極SC4、・・・、走査電極SCn-1、走査電極SCnという順番で、走査電極12の1本ずつに走査パルスを順次印加する。すなわち、1ライン毎書込み動作は、走査電極12がパネル10に配列された順番で走査電極12の1本ずつに走査パルスを順次印加する書込み動作である。 In the write operation for each line, the scan pulse is applied to each scan electrode 12 in the order of scan electrode SC1, scan electrode SC2, scan electrode SC3, scan electrode SC4,..., Scan electrode SCn-1, and scan electrode SCn. Are sequentially applied. That is, the line-by-line address operation is an address operation in which scan pulses are sequentially applied to each of the scan electrodes 12 in the order in which the scan electrodes 12 are arranged on the panel 10.
 2ライン毎同時書込み動作を行うサブフィールドSF1の書込み期間Tw1では、維持電極SU1~維持電極SUnには電圧Veを印加し、データ電極D1~データ電極Dmには電圧0(V)を印加し、走査電極SC1~走査電極SCnには電圧Vcを印加する。 In the address period Tw1 of the subfield SF1 in which the simultaneous address operation is performed every two lines, the voltage Ve is applied to the sustain electrode SU1 to the sustain electrode SUn, and the voltage 0 (V) is applied to the data electrode D1 to the data electrode Dm. Voltage Vc is applied to scan electrode SC1 through scan electrode SCn.
 次に、配置的に見て上から1番目(1ライン目)の走査電極SC1および2番目(2ライン目)の走査電極SC2に負の電圧Vaの負極性の走査パルスを印加する。そして、データ電極D1~データ電極Dmのうちの1ライン目および2ライン目において発光するべき放電セルのデータ電極Dkに正の電圧Vdの正極性の書込みパルスを印加する。 Next, a negative scan pulse with a negative voltage Va is applied to the first (first line) scan electrode SC1 and the second (second line) scan electrode SC2 from the top in terms of arrangement. Then, a positive address pulse having a positive voltage Vd is applied to the data electrodes Dk of the discharge cells that should emit light in the first and second lines of the data electrodes D1 to Dm.
 書込みパルスの電圧Vdを印加したデータ電極Dkと、走査パルスの電圧Vaを印加した走査電極SC1および走査電極SC2との交差部にある放電セルでは、データ電極Dkと走査電極SC1との電圧差、およびデータ電極Dkと走査電極SC2との電圧差が放電開始電圧を超え、データ電極Dkと走査電極SC1との間、およびデータ電極Dkと走査電極SC2との間に放電が発生する。 In the discharge cell at the intersection of the data electrode Dk to which the address pulse voltage Vd is applied and the scan electrode SC1 and the scan electrode SC2 to which the scan pulse voltage Va is applied, the voltage difference between the data electrode Dk and the scan electrode SC1; The voltage difference between data electrode Dk and scan electrode SC2 exceeds the discharge start voltage, and discharge occurs between data electrode Dk and scan electrode SC1, and between data electrode Dk and scan electrode SC2.
 また、維持電極SU1~維持電極SUnに電圧Veを印加しているため、データ電極Dkと走査電極SC1との間に発生する放電に誘発されて、データ電極Dkと交差する領域にある維持電極SU1と走査電極SC1との間にも放電が発生する。同様に、データ電極Dkと走査電極SC2との間に発生する放電に誘発されて、データ電極Dkと交差する領域にある維持電極SU2と走査電極SC2との間にも放電が発生する。こうして、走査パルスの電圧Vaと書込みパルスの電圧Vdとが同時に印加された放電セル(発光するべき放電セル)に書込み放電が発生する。 In addition, since voltage Ve is applied to sustain electrode SU1 through sustain electrode SUn, sustain electrode SU1 in a region intersecting data electrode Dk is induced by a discharge generated between data electrode Dk and scan electrode SC1. Discharge also occurs between scan electrode SC1 and scan electrode SC1. Similarly, a discharge is also generated between sustain electrode SU2 and scan electrode SC2 in a region intersecting data electrode Dk, induced by a discharge generated between data electrode Dk and scan electrode SC2. Thus, address discharge is generated in the discharge cells (discharge cells to emit light) to which the scan pulse voltage Va and the address pulse voltage Vd are simultaneously applied.
 書込み放電が発生した放電セルでは、走査電極SC1上および走査電極SC2上に正の壁電圧が蓄積され、維持電極SU1上および維持電極SU2上に負の壁電圧が蓄積され、データ電極Dk上にも負の壁電圧が蓄積される。 In the discharge cell in which the address discharge has occurred, positive wall voltage is accumulated on scan electrode SC1 and scan electrode SC2, negative wall voltage is accumulated on sustain electrode SU1 and sustain electrode SU2, and data electrode Dk is accumulated. Even negative wall voltage is accumulated.
 このようにして、1ライン目の放電セル、および2ライン目の放電セルにおける書込み動作が終了する。なお、書込みパルスを印加しなかったデータ電極Dh(データ電極Dhはデータ電極D1~データ電極Dmのうちデータ電極Dkを除いたもの)を有する放電セルでは、データ電極Dhと走査電極SC1との交差部の電圧およびデータ電極Dhと走査電極SC2との交差部の電圧は放電開始電圧を超えないので、書込み放電は発生せず、初期化期間Ti1終了後の壁電圧が保たれる。 In this manner, the address operation in the first-line discharge cells and the second-line discharge cells is completed. In the discharge cell having the data electrode Dh to which the address pulse is not applied (the data electrode Dh is the data electrode D1 to the data electrode Dm excluding the data electrode Dk), the intersection of the data electrode Dh and the scan electrode SC1. Since the voltage at the portion and the voltage at the intersection between the data electrode Dh and the scan electrode SC2 do not exceed the discharge start voltage, the address discharge does not occur and the wall voltage after the end of the initialization period Ti1 is maintained.
 次に、配置的に見て上から3番目(3ライン目)の走査電極SC3および4番目(4ライン目)の走査電極SC4に電圧Vaの走査パルスを印加するとともに、3ライン目および4ライン目に発光するべき放電セルに対応するデータ電極Dkに電圧Vdの書込みパルスを印加する。これにより、走査パルスと書込みパルスとが同時に印加された3ライン目の放電セルおよび4ライン目の放電セルでは書込み放電が発生する。こうして、3ライン目および4ライン目の放電セルにおける書込み動作を行う。 Next, a scan pulse of voltage Va is applied to the third (third line) scan electrode SC3 and the fourth (fourth line) scan electrode SC4 from the top, and the third and fourth lines are arranged. An address pulse of voltage Vd is applied to the data electrode Dk corresponding to the discharge cell that should emit light to the eye. As a result, address discharge occurs in the discharge cells of the third line and the discharge cells of the fourth line to which the scan pulse and the address pulse are simultaneously applied. Thus, the address operation is performed in the discharge cells of the third line and the fourth line.
 同様の書込み動作を、走査電極SC5と走査電極SC6、走査電極SC7と走査電極SC8、・・・、走査電極SCn-1と走査電極SCnという順番で、n行目の放電セルに至るまで順次行い、発光するべき放電セルに選択的に書込み放電を発生し、その放電セルに維持放電のための壁電荷を形成する。こうして、サブフィールドSF1の書込み期間Tw1が終了する。 The same addressing operation is sequentially performed in the order of scan electrode SC5 and scan electrode SC6, scan electrode SC7 and scan electrode SC8,..., Scan electrode SCn-1 and scan electrode SCn up to the discharge cell in the nth row. An address discharge is selectively generated in the discharge cell to emit light, and a wall charge for sustain discharge is formed in the discharge cell. Thus, the writing period Tw1 of the subfield SF1 ends.
 このように、サブフィールドSF1の書込み期間Tw1では、奇数ライン目の走査電極SCp(p=奇数)とその次の偶数ライン目の走査電極SCp+1とに同時に走査パルスを印加する2ライン毎同時書込み動作を行うことにより、データ電極Dkを共有するpライン目の放電セルとp+1ライン目の放電セルとで、同時に同じ書込み動作を行う。これにより、2ライン毎同時書込み動作を行う書込み期間に要する時間は、1ライン毎書込み動作を行う書込み期間に要する時間の約半分に短縮される。 As described above, in the address period Tw1 of the subfield SF1, the simultaneous write operation for every two lines in which the scan pulse is simultaneously applied to the scan electrode SCp (p = odd number) of the odd-numbered line and the scan electrode SCp + 1 of the next even-numbered line. Thus, the same address operation is simultaneously performed in the p-th line discharge cell and the p + 1-th line discharge cell sharing the data electrode Dk. Thereby, the time required for the writing period for performing the simultaneous writing operation for every two lines is reduced to about half of the time required for the writing period for performing the writing operation for every one line.
 なお、2ライン毎同時書込み動作は、奇数ライン目の走査電極SCpとその次の偶数ライン目の走査電極SCp+1とに同時に走査パルスを印加する書込み動作に限定されるものではない。例えば、偶数ライン目の走査電極SCp+1とその次の奇数ライン目の走査電極SCp+2とに同時に走査パルスを印加する書込み動作を行ってもよい。 Note that the simultaneous write operation for every two lines is not limited to the write operation in which the scan pulse is simultaneously applied to the scan electrode SCp of the odd line and the scan electrode SCp + 1 of the next even line. For example, an address operation may be performed in which a scan pulse is simultaneously applied to the even-numbered scan electrode SCp + 1 and the next odd-numbered scan electrode SCp + 2.
 なお、本発明は、走査電極12に走査パルスを印加する順番が何ら上述した順番に限定されるものではない。走査電極12に走査パルスを印加する順番は、画像表示装置における仕様等に応じて任意に設定すればよい。 In the present invention, the order in which the scan pulse is applied to the scan electrode 12 is not limited to the order described above. What is necessary is just to set arbitrarily the order which applies a scanning pulse to the scanning electrode 12 according to the specification etc. in an image display apparatus.
 なお、初期化期間Ti1の後半に維持電極SU1~維持電極SUnに印加する電圧Veと、書込み期間Tw1に維持電極SU1~維持電極SUnに印加する電圧Veとは互いに異なる電圧値であってもよい。 Note that voltage Ve applied to sustain electrode SU1 through sustain electrode SUn in the second half of initialization period Ti1 and voltage Ve applied to sustain electrode SU1 through sustain electrode SUn in address period Tw1 may have different voltage values. .
 次に、維持期間について説明する。 Next, the maintenance period will be described.
 サブフィールドSF1の維持期間Ts1では、まず維持電極SU1~維持電極SUnに電圧0(V)を印加する。そして、走査電極SC1~走査電極SCnに正の電圧Vsの維持パルスを印加する。 In the sustain period Ts1 of the subfield SF1, first, the voltage 0 (V) is applied to the sustain electrodes SU1 to SUn. Then, sustain pulse of positive voltage Vs is applied to scan electrode SC1 through scan electrode SCn.
 この維持パルスの印加により、書込み期間Tw1に書込み放電を発生した放電セルでは、走査電極SCiと維持電極SUiとの電圧差が放電開始電圧を超え、走査電極SCiと維持電極SUiとの間に維持放電が発生する。そして、この維持放電により発生した紫外線により、維持放電が発生した放電セルの蛍光体層25が発光する。また、この維持放電により、走査電極SCi上に負の壁電圧が蓄積され、維持電極SUi上に正の壁電圧が蓄積される。さらに、データ電極Dk上にも正の壁電圧が蓄積される。ただし、書込み期間Tw1において書込み放電が発生しなかった放電セルでは維持放電は発生しない。 In the discharge cell in which the address discharge is generated in the address period Tw1 by the application of the sustain pulse, the voltage difference between the scan electrode SCi and the sustain electrode SUi exceeds the discharge start voltage, and is maintained between the scan electrode SCi and the sustain electrode SUi. Discharge occurs. The phosphor layer 25 of the discharge cell in which the sustain discharge has occurred emits light by the ultraviolet rays generated by the sustain discharge. In addition, due to the sustain discharge, a negative wall voltage is accumulated on scan electrode SCi, and a positive wall voltage is accumulated on sustain electrode SUi. Furthermore, a positive wall voltage is also accumulated on the data electrode Dk. However, the sustain discharge does not occur in the discharge cells in which the address discharge has not occurred in the address period Tw1.
 続いて、走査電極SC1~走査電極SCnに電圧0(V)を印加し、維持電極SU1~維持電極SUnに電圧Vsの維持パルスを印加する。直前に維持放電を発生した放電セルでは再び維持放電が発生し、維持電極SUi上に負の壁電圧が蓄積され、走査電極SCi上に正の壁電圧が蓄積される。 Subsequently, voltage 0 (V) is applied to scan electrode SC1 through scan electrode SCn, and a sustain pulse of voltage Vs is applied to sustain electrode SU1 through sustain electrode SUn. In the discharge cell that has generated a sustain discharge immediately before, a sustain discharge occurs again, a negative wall voltage is accumulated on sustain electrode SUi, and a positive wall voltage is accumulated on scan electrode SCi.
 以降同様に、走査電極SC1~走査電極SCnと維持電極SU1~維持電極SUnとに、階調重みに所定の輝度倍数を乗じた数の維持パルスを交互に印加する。こうして、書込み期間において書込み放電を発生した放電セルは、階調重みに応じた回数の維持放電を発生し、階調重みに応じた輝度で発光する。 Thereafter, similarly, the sustain pulses of the number obtained by multiplying the gradation weight by a predetermined luminance multiple are alternately applied to scan electrode SC1 through scan electrode SCn and sustain electrode SU1 through sustain electrode SUn. Thus, the discharge cells that have generated the address discharge in the address period generate the sustain discharges the number of times corresponding to the gradation weight, and emit light with the luminance corresponding to the gradation weight.
 そして、維持期間Ts1における維持パルスの発生後(維持期間の最後)に、維持電極SU1~維持電極SUnおよびデータ電極D1~データ電極Dmに電圧0(V)を印加したまま、走査電極SC1~走査電極SCnに電圧0(V)から電圧Vrまで緩やかに上昇する上り傾斜波形電圧を印加する。 After generation of the sustain pulse in sustain period Ts1 (the end of the sustain period), scan electrode SC1 to scan are performed while voltage 0 (V) is applied to sustain electrode SU1 to sustain electrode SUn and data electrode D1 to data electrode Dm. An upward ramp waveform voltage that gradually rises from voltage 0 (V) to voltage Vr is applied to electrode SCn.
 電圧Vrを放電開始電圧を超える電圧に設定することで、走査電極SC1~走査電極SCnへ印加する上り傾斜波形電圧が放電開始電圧を超えて上昇する間に、維持放電を発生した放電セルの維持電極SUiと走査電極SCiとの間に、微弱な放電(消去放電)が持続して発生する。 By setting the voltage Vr to a voltage exceeding the discharge start voltage, the sustain of the discharge cell that has generated the sustain discharge is maintained while the rising ramp waveform voltage applied to scan electrode SC1 through scan electrode SCn exceeds the discharge start voltage. A weak discharge (erase discharge) is continuously generated between the electrode SUi and the scan electrode SCi.
 この微弱な放電で発生した荷電粒子は、維持電極SUiと走査電極SCiとの間の電圧差を緩和するように、維持電極SUi上および走査電極SCi上に壁電荷となって蓄積される。これにより、データ電極Dk上の正の壁電圧を残したまま、走査電極SCi上の壁電圧および維持電極SUi上の壁電圧が弱められる。こうして、放電セル内における不要な壁電荷が消去される。 The charged particles generated by this weak discharge are accumulated as wall charges on the sustain electrode SUi and the scan electrode SCi so as to reduce the voltage difference between the sustain electrode SUi and the scan electrode SCi. Thereby, the wall voltage on scan electrode SCi and the wall voltage on sustain electrode SUi are weakened while the positive wall voltage on data electrode Dk remains. Thus, unnecessary wall charges in the discharge cell are erased.
 走査電極SC1~走査電極SCnに印加する電圧が電圧Vrに到達したら、走査電極SC1~走査電極SCnへの印加電圧を電圧0(V)まで下降する。こうして、サブフィールドSF1の維持期間Ts1における維持動作が終了する。 When the voltage applied to scan electrode SC1 through scan electrode SCn reaches voltage Vr, the voltage applied to scan electrode SC1 through scan electrode SCn is lowered to voltage 0 (V). Thus, the sustain operation in subfield SF1 during sustain period Ts1 ends.
 以上により、サブフィールドSF1が終了する。 Thus, subfield SF1 is completed.
 次に、選択初期化サブフィールドについてサブフィールドSF2を例に挙げて説明する。 Next, the selective initialization subfield will be described by taking the subfield SF2 as an example.
 サブフィールドSF2の初期化期間Ti2では、データ電極D1~データ電極Dmに電圧0(V)を印加し、維持電極SU1~維持電極SUnには正の電圧Veを印加する。 In the initialization period Ti2 of the subfield SF2, the voltage 0 (V) is applied to the data electrodes D1 to Dm, and the positive voltage Ve is applied to the sustain electrodes SU1 to SUn.
 走査電極SC1~走査電極SCnには放電開始電圧未満となる電圧(例えば、電圧0(V))から負の電圧Vi4に向かって、初期化期間Ti1で発生した下り傾斜波形電圧と同じ勾配で下降する下り傾斜波形電圧を印加する。電圧Vi4は、放電開始電圧を超える電圧に設定する。 Scan electrode SC1 to scan electrode SCn decrease from a voltage lower than the discharge start voltage (for example, voltage 0 (V)) toward negative voltage Vi4 at the same gradient as the downward ramp waveform voltage generated in initialization period Ti1. Apply a downward ramp waveform voltage. The voltage Vi4 is set to a voltage exceeding the discharge start voltage.
 この下り傾斜波形電圧を走査電極SC1~走査電極SCnに印加する間に、直前のサブフィールド(図3では、サブフィールドSF1)の維持期間Ts1に維持放電を発生した放電セルでは、走査電極SCiと維持電極SUiとの間、および走査電極SCiとデータ電極Dkとの間でそれぞれ微弱な初期化放電が発生する。 In the discharge cell in which the sustain discharge is generated in the sustain period Ts1 of the immediately preceding subfield (subfield SF1 in FIG. 3) while the downward ramp waveform voltage is applied to scan electrode SC1 through scan electrode SCn, scan electrode SCi and A weak initializing discharge is generated between sustain electrode SUi and between scan electrode SCi and data electrode Dk.
 そして、この初期化放電により、走査電極SCi上の負の壁電圧および維持電極SUi上の正の壁電圧が弱められる。また、データ電極Dk上の正の壁電圧の過剰な部分が放電される。こうして、放電セル内の壁電圧は書込み期間Tw2における書込み動作に適した壁電圧に調整される。 And, by this initializing discharge, the negative wall voltage on scan electrode SCi and the positive wall voltage on sustain electrode SUi are weakened. In addition, an excessive portion of the positive wall voltage on the data electrode Dk is discharged. Thus, the wall voltage in the discharge cell is adjusted to a wall voltage suitable for the address operation in the address period Tw2.
 一方、直前のサブフィールド(サブフィールドSF1)の維持期間Ts1に維持放電を発生しなかった放電セルでは、初期化放電は発生せず、それ以前の壁電圧が保たれる。 On the other hand, in the discharge cells that did not generate the sustain discharge in the sustain period Ts1 of the immediately preceding subfield (subfield SF1), the initializing discharge does not occur and the previous wall voltage is maintained.
 上述の電圧波形が、直前のサブフィールドの書込み期間(ここでは、書込み期間Tw1)で書込み動作を行った放電セルで選択的に初期化放電を発生する選択初期化波形である。そして、選択初期化波形を走査電極12に印加する動作が選択初期化動作である。 The voltage waveform described above is a selective initialization waveform in which an initializing discharge is selectively generated in a discharge cell that has performed an address operation in the address period (here, address period Tw1) of the immediately preceding subfield. The operation of applying the selective initialization waveform to the scan electrode 12 is the selective initialization operation.
 以上により、選択初期化サブフィールドであるサブフィールドSF2の初期化期間Ti2における選択初期化動作が終了する。 Thus, the selective initialization operation in the initialization period Ti2 of the subfield SF2, which is the selective initialization subfield, is completed.
 1ライン毎書込み動作を行うサブフィールドSF2の書込み期間Tw2では、書込み期間Tw1と同様に、維持電極SU1~維持電極SUnには電圧Veを印加し、データ電極D1~データ電極Dmには電圧0(V)を印加し、走査電極SC1~走査電極SCnには電圧Vcを印加する。 In the address period Tw2 of the subfield SF2 in which the address operation is performed for each line, the voltage Ve is applied to the sustain electrode SU1 to the sustain electrode SUn, and the voltage 0 (to the data electrode D1 to the data electrode Dm, as in the address period Tw1. V) is applied, and voltage Vc is applied to scan electrode SC1 through scan electrode SCn.
 次に、配置的に見て上から1番目(1ライン目)の走査電極SC1に負の電圧Vaの負極性の走査パルスを印加する。そして、データ電極D1~データ電極Dmのうちの1ライン目において発光するべき放電セルのデータ電極Dkに正の電圧Vdの正極性の書込みパルスを印加する。 Next, a negative scan pulse having a negative voltage Va is applied to the first (first line) scan electrode SC1 in terms of arrangement. Then, a positive address pulse of a positive voltage Vd is applied to the data electrode Dk of the discharge cell that should emit light in the first line among the data electrodes D1 to Dm.
 書込みパルスの電圧Vdを印加したデータ電極Dkと、走査パルスの電圧Vaを印加した走査電極SC1との交差部にある放電セルでは、データ電極Dkと走査電極SC1との電圧差が放電開始電圧を超え、データ電極Dkと走査電極SC1との間、およびデータ電極Dkと交差する領域にある維持電極SU1と走査電極SC1との間に書込み放電が発生する。 In the discharge cell at the intersection of the data electrode Dk to which the address pulse voltage Vd is applied and the scan electrode SC1 to which the scan pulse voltage Va is applied, the voltage difference between the data electrode Dk and the scan electrode SC1 determines the discharge start voltage. The address discharge occurs between the data electrode Dk and the scan electrode SC1 and between the sustain electrode SU1 and the scan electrode SC1 in the region intersecting with the data electrode Dk.
 書込み放電が発生した放電セルでは、走査電極SC1上に正の壁電圧が蓄積され、維持電極SU1上に負の壁電圧が蓄積され、データ電極Dk上にも負の壁電圧が蓄積される。 In the discharge cell in which the address discharge has occurred, a positive wall voltage is accumulated on the scan electrode SC1, a negative wall voltage is accumulated on the sustain electrode SU1, and a negative wall voltage is also accumulated on the data electrode Dk.
 このようにして、1ライン目の放電セルにおける書込み動作が終了する。なお、書込みパルスを印加しなかったデータ電極Dh(データ電極Dhはデータ電極D1~データ電極Dmのうちデータ電極Dkを除いたもの)を有する放電セルでは、データ電極Dhと走査電極SC1との交差部の電圧は放電開始電圧を超えないので、書込み放電は発生せず、初期化期間Ti2終了後の壁電圧が保たれる。 In this way, the address operation in the discharge cell on the first line is completed. In the discharge cell having the data electrode Dh to which the address pulse is not applied (the data electrode Dh is the data electrode D1 to the data electrode Dm excluding the data electrode Dk), the intersection of the data electrode Dh and the scan electrode SC1. Since the voltage of the part does not exceed the discharge start voltage, the address discharge does not occur, and the wall voltage after the end of the initialization period Ti2 is maintained.
 次に、配置的に見て上から2番目(2ライン目)の走査電極SC2に電圧Vaの走査パルスを印加するとともに、2ライン目に発光するべき放電セルに対応するデータ電極Dkに電圧Vdの書込みパルスを印加する。これにより、走査パルスと書込みパルスとが同時に印加された2ライン目の放電セルに書込み放電が発生する。こうして、2ライン目における書込み動作を行う。 Next, a scan pulse of the voltage Va is applied to the second (second line) scan electrode SC2 from the top, and the voltage Vd is applied to the data electrode Dk corresponding to the discharge cell that should emit light on the second line. Apply the write pulse. As a result, an address discharge is generated in the discharge cells of the second line to which the scan pulse and the address pulse are simultaneously applied. Thus, the write operation in the second line is performed.
 同様の書込み動作を、走査電極SC3、走査電極SC4、・・・、走査電極SCn-1、走査電極SCnという順番で、n行目の放電セルに至るまで順次行い、発光するべき放電セルに選択的に書込み放電を発生し、その放電セルに維持放電のための壁電荷を形成する。こうして、サブフィールドSF2の書込み期間Tw2が終了する。 The same addressing operation is sequentially performed in the order of scan electrode SC3, scan electrode SC4,..., Scan electrode SCn-1, and scan electrode SCn up to the discharge cell in the nth row, and is selected as a discharge cell to emit light. Address discharge is generated, and wall charges for sustain discharge are formed in the discharge cells. Thus, the writing period Tw2 of the subfield SF2 ends.
 このように、サブフィールドSF2の書込み期間Tw2では、走査電極SC1から走査電極SCnの1本ずつに順次走査パルスを印加する1ライン毎書込み動作を行う。 Thus, in the address period Tw2 of the subfield SF2, the address operation is performed for each line in which the scan pulse is sequentially applied to each of the scan electrodes SC1 to SCn.
 サブフィールドSF2の維持期間Ts2では、サブフィールドSF1の維持期間Ts1と同様に、階調重みに応じた数の維持パルスを走査電極SC1~走査電極SCnと維持電極SU1~維持電極SUnとに交互に印加する。 In sustain period Ts2 of subfield SF2, as in sustain period Ts1 of subfield SF1, the number of sustain pulses corresponding to the gradation weights are alternately applied to scan electrode SC1 through scan electrode SCn and sustain electrode SU1 through sustain electrode SUn. Apply.
 サブフィールドSF3の初期化期間Ti3では、サブフィールドSF2の初期化期間Ti1と同様に選択初期化動作を行うための駆動電圧波形を各電極に印加する。サブフィールドSF3の書込み期間Tw3では、サブフィールドSF1の書込み期間Tw1と同様に2ライン毎同時書込み動作を行うための駆動電圧波形を各電極に印加する。サブフィールドSF3の維持期間Ts3では、サブフィールドSF2の維持期間Ts2と同様に、階調重みに応じた数の維持パルスを走査電極SC1~走査電極SCnと維持電極SU1~維持電極SUnとに交互に印加する。 In the initialization period Ti3 of the subfield SF3, a driving voltage waveform for performing a selective initialization operation is applied to each electrode in the same manner as in the initialization period Ti1 of the subfield SF2. In the writing period Tw3 of the subfield SF3, a driving voltage waveform for performing the simultaneous writing operation for every two lines is applied to each electrode as in the writing period Tw1 of the subfield SF1. In sustain period Ts3 of subfield SF3, as in sustain period Ts2 of subfield SF2, the number of sustain pulses corresponding to the gradation weights are alternately applied to scan electrode SC1 through scan electrode SCn and sustain electrode SU1 through sustain electrode SUn. Apply.
 サブフィールドSF4以降の各サブフィールドでは、維持期間に発生する維持パルスの数を除き、サブフィールドSF3と同様の駆動電圧波形を各電極に印加する。すなわち、サブフィールドSF4以降の各サブフィールドでは、初期化期間では選択初期化動作を行い、書込み期間では2ライン毎同時書込み動作を行う。 In each subfield after subfield SF4, the same drive voltage waveform as in subfield SF3 is applied to each electrode except for the number of sustain pulses generated in the sustain period. That is, in each subfield after subfield SF4, the selective initialization operation is performed in the initialization period, and the simultaneous writing operation is performed every two lines in the writing period.
 以上が、本実施の形態においてパネル10の各電極に印加する駆動電圧波形の概要である。 The above is the outline of the drive voltage waveform applied to each electrode of panel 10 in the present embodiment.
 なお、本実施の形態において各電極に印加する電圧値は、例えば、電圧Vi1=150(V)、電圧Vi2=340(V)、電圧Vi3=190(V)、電圧Vi4=-160(V)、電圧Va=-180(V)、電圧Vc=-30(V)、電圧Vs=190(V)、電圧Vr=190(V)、電圧Ve=120(V)、電圧Vd=60(V)である。また、初期化期間Ti1に発生する上り傾斜波形電圧の勾配は約1.3V/μsecであり、各維持期間に発生する上り傾斜波形電圧の勾配は約10V/μsecであり、各初期化期間に発生する下り傾斜波形電圧の勾配は約-1.5V/μsecである。 In this embodiment, voltage values applied to the electrodes are, for example, voltage Vi1 = 150 (V), voltage Vi2 = 340 (V), voltage Vi3 = 190 (V), and voltage Vi4 = −160 (V). , Voltage Va = −180 (V), voltage Vc = −30 (V), voltage Vs = 190 (V), voltage Vr = 190 (V), voltage Ve = 120 (V), voltage Vd = 60 (V) It is. Further, the gradient of the rising ramp waveform voltage generated in the initialization period Ti1 is about 1.3 V / μsec, and the gradient of the rising ramp waveform voltage generated in each sustain period is about 10 V / μsec. The gradient of the generated downward ramp waveform voltage is about −1.5 V / μsec.
 なお、本実施の形態において、上述した電圧値や勾配等の具体的な数値は単なる一例に過ぎず、本発明は、各電圧値や勾配等が上述した数値に限定されるものではない。各電圧値や勾配等は、パネルの放電特性やプラズマディスプレイ装置の仕様等にもとづき最適に設定することが望ましい。 In the present embodiment, the specific numerical values such as the voltage value and the gradient described above are merely examples, and the present invention is not limited to the numerical values described above for each voltage value and the gradient. Each voltage value, gradient, and the like are preferably set optimally based on the discharge characteristics of the panel and the specifications of the plasma display device.
 なお、本実施の形態では、サブフィールドSF1を強制初期化動作を行う強制初期化サブフィールドとし、他のサブフィールド(サブフィールドSF2以降のサブフィールド)を選択初期化動作を行う選択初期化サブフィールドとしたが、本発明は何らこの構成に限定されるものではない。例えば、サブフィールドSF1を選択初期化サブフィールドにして他のサブフィールドを強制初期化サブフィールドにしたり、あるいは複数のサブフィールドを強制初期化サブフィールドとしてもよい。 In the present embodiment, subfield SF1 is a forced initialization subfield for performing a forced initialization operation, and other subfields (subfields subsequent to subfield SF2) are a selective initialization subfield for performing a selective initialization operation. However, the present invention is not limited to this configuration. For example, the subfield SF1 may be a selective initialization subfield and other subfields may be forced initialization subfields, or a plurality of subfields may be forced initialization subfields.
 次に、本実施の形態の画像表示装置におけるサブフィールドの構成について説明する。 Next, the configuration of subfields in the image display apparatus according to the present embodiment will be described.
 図4は、本発明の一実施の形態における画像表示装置のサブフィールド構成およびシャッタ眼鏡の開閉動作を概略的に示す図である。 FIG. 4 is a diagram schematically showing the subfield configuration of the image display device and the opening / closing operation of the shutter glasses in the embodiment of the present invention.
 図4には、書込み期間において最初に書込み動作を行う走査電極SC1、書込み期間において最後に書込み動作を行う走査電極SCn、維持電極SU1~維持電極SUn、およびデータ電極D1~データ電極Dmのそれぞれに印加する駆動電圧波形と、右目用シャッタおよび左目用シャッタの開閉動作とを示す。また、図4には3つのフィールド(フィールドF1~フィールドF3)を示す。 FIG. 4 shows scan electrode SC1 that performs the address operation first in the address period, scan electrode SCn that performs the address operation last in the address period, sustain electrode SU1 to sustain electrode SUn, and data electrode D1 to data electrode Dm. The drive voltage waveform to be applied and the opening / closing operation of the right-eye shutter and the left-eye shutter are shown. FIG. 4 shows three fields (field F1 to field F3).
 本実施の形態においては、パネル10に3D画像を表示するために、右目用フィールドと左目用フィールドとを交互に発生する。 In the present embodiment, in order to display a 3D image on the panel 10, a right eye field and a left eye field are alternately generated.
 例えば、図4に示す3つのフィールドのうち、フィールドF1、フィールドF3は右目用フィールドであり、フィールドF2は左目用フィールドである。したがって、フィールドF1およびフィールドF3では右目用画像信号をパネル10に表示し、フィールドF2では左目用画像信号をパネル10に表示する。 For example, among the three fields shown in FIG. 4, the field F1 and the field F3 are right-eye fields, and the field F2 is a left-eye field. Therefore, the right eye image signal is displayed on the panel 10 in the field F1 and the field F3, and the left eye image signal is displayed on the panel 10 in the field F2.
 また、シャッタ眼鏡を通してパネル10に表示される3D画像を観測する使用者には、2フィールドで表示される画像(右目用画像および左目用画像)が1枚の3D画像として認識される。そのため、使用者には、1秒間にパネル10に表示される画像の数が、1秒間に表示されるフィールドの数の半分の数として観測される。 Further, for a user who observes a 3D image displayed on the panel 10 through the shutter glasses, an image (right-eye image and left-eye image) displayed in two fields is recognized as one 3D image. Therefore, the number of images displayed on the panel 10 per second is observed by the user as half the number of fields displayed per second.
 例えば、パネルに表示される3D画像のフィールド周波数(1秒間に発生するフィールドの数)が60Hzであれば、使用者には、1秒間に30枚の3D画像が観測されることになる。したがって、1秒間に60枚の3D画像を表示するためには、フィールド周波数を60Hzの2倍の120Hzに設定しなければならない。 For example, if the field frequency of the 3D image displayed on the panel (the number of fields generated per second) is 60 Hz, the user will observe 30 3D images per second. Therefore, in order to display 60 3D images per second, the field frequency must be set to 120 Hz, which is twice 60 Hz.
 そこで、本実施の形態では、使用者に3D画像の動画像が滑らかに観測されるように、フィールド周波数(1秒間に発生するフィールドの数)を通常の2倍(例えば、120Hz)に設定している。そのため、1枚の右目用画像または1枚の左目用画像を表示するために使用できる時間は、フィールド周波数60Hzの2D画像(3D画像ではない通常の画像)を1枚表示するために使用できる時間の2分の1に制限される。 Therefore, in this embodiment, the field frequency (the number of fields generated per second) is set to twice the normal frequency (for example, 120 Hz) so that the user can smoothly observe the 3D moving image. ing. Therefore, the time that can be used to display one right-eye image or one left-eye image is the time that can be used to display one 2D image (a normal image that is not a 3D image) with a field frequency of 60 Hz. Is limited to one-half of.
 シャッタ眼鏡の右目用シャッタおよび左目用シャッタは、シャッタ開閉用タイミング信号のオン・オフにもとづき開閉動作が制御される。 The opening / closing operation of the shutter for the right eye and the shutter for the left eye of the shutter glasses is controlled based on on / off of a shutter opening / closing timing signal.
 具体的には、右目用シャッタは、右目用フィールド(例えば、フィールドF1)の先頭サブフィールド(サブフィールドSF1)の書込み期間の開始に同期して開き、左目用フィールド(例えば、フィールドF2)の先頭サブフィールド(サブフィールドSF1)の書込み期間の開始に同期して閉じる。 Specifically, the right-eye shutter opens in synchronization with the start of the writing period of the first subfield (subfield SF1) of the right-eye field (for example, field F1), and starts the left-eye field (for example, field F2). The subfield (subfield SF1) is closed in synchronization with the start of the writing period.
 左目用シャッタは、左目用フィールド(例えば、フィールドF2)の先頭サブフィールド(サブフィールドSF1)の書込み期間の開始に同期して開き、右目用フィールド(例えば、フィールドF3)の先頭サブフィールド(サブフィールドSF1)の書込み期間の開始に同期して閉じる。 The left-eye shutter opens in synchronization with the start of the writing period of the first subfield (subfield SF1) of the left-eye field (eg, field F2), and the first subfield (subfield) of the right-eye field (eg, field F3) Closed in synchronization with the start of the writing period of SF1).
 次に、パネル10に画像信号に応じた階調値を表示する方法について説明する。 Next, a method for displaying the gradation value corresponding to the image signal on the panel 10 will be described.
 上述したように、サブフィールド法では、あらかじめ階調重みを定めた複数のサブフィールドで1フィールドを構成する。そして、点灯するサブフィールド(点灯サブフィールド)と点灯しないサブフィールド(非点灯サブフィールド)とを組み合わせて、各放電セルを、画像信号にもとづく階調値の大きさに応じた発光輝度で発光する。 As described above, in the subfield method, one field is composed of a plurality of subfields in which gradation weights are determined in advance. Then, by combining a subfield that is lit (lighting subfield) and a subfield that is not lit (non-lighting subfield), each discharge cell emits light with a light emission luminance corresponding to the magnitude of the gradation value based on the image signal. .
 以下、点灯サブフィールドと非点灯サブフィールドの組合せを「サブフィールドコード」または単に「コード」と呼称し、複数のサブフィールドコードの集合を「コードセット」と呼称する。 Hereinafter, a combination of a lighting subfield and a non-lighting subfield is referred to as a “subfield code” or simply “code”, and a set of a plurality of subfield codes is referred to as a “code set”.
 本実施の形態では、コードセットを構成する複数のサブフィールドコードの中から、階調値に応じてサブフィールドコードを選択する。そして、サブフィールドコードにもとづき各サブフィールドの発光・非発光を制御し、放電セルを階調値の大きさに応じた輝度で発光させて、パネル10に画像を表示する。 In this embodiment, a subfield code is selected from a plurality of subfield codes constituting a code set according to a gradation value. Then, light emission / non-light emission of each subfield is controlled based on the subfield code, and the discharge cell is caused to emit light with a luminance corresponding to the magnitude of the gradation value, and an image is displayed on the panel 10.
 次に、本実施の形態において用いるコードセットについて説明する。 Next, a code set used in this embodiment will be described.
 なお、以下の説明では、黒を表示するときの階調値(維持放電が発生しないときの階調値)を「0」とする。また、階調重み「N」に対応する階調値を階調値「N」と表記する。 In the following description, the gradation value when displaying black (the gradation value when no sustain discharge occurs) is assumed to be “0”. A gradation value corresponding to the gradation weight “N” is expressed as a gradation value “N”.
 したがって、例えば、階調重み「1」のサブフィールドSF1だけが発光する放電セルが表示する階調値は階調値「1」となる。また、階調重み「1」のサブフィールドSF1と階調重み「2」のサブフィールドSF2だけが発光する放電セルが表示する階調値は、1+2=3なので階調値「3」となる。 Therefore, for example, the gradation value displayed by the discharge cells that emit light only in the subfield SF1 having the gradation weight “1” is the gradation value “1”. The gradation value displayed by the discharge cells that emit light only in the subfield SF1 having the gradation weight “1” and the subfield SF2 having the gradation weight “2” is 1 + 2 = 3, so the gradation value is “3”.
 図5は、1フィールドを5個のサブフィールドで構成するときのコードセットの一例を示す図である。 FIG. 5 is a diagram showing an example of a code set when one field is composed of five subfields.
 なお、以降の図面では、「階調重み」を単に「重み」と記し、「階調値」を単に「階調」と記す。 In the following drawings, “gradation weight” is simply referred to as “weight”, and “gradation value” is simply referred to as “gradation”.
 図5に示すコードセットにおいて各サブフィールドを示す表記の直下に記された数値は、各サブフィールドの階調重みを表す。 In the code set shown in FIG. 5, the numerical value written immediately below the notation indicating each subfield represents the gradation weight of each subfield.
 なお、図5には、サブフィールドSF1からサブフィールドSF5までの5つのサブフィールドを1フィールドに有し、各サブフィールドはそれぞれ「1」、「10」、「6」、「3」、「2」の階調重みを有するコードセットを示す。 In FIG. 5, one field includes five subfields from subfield SF1 to subfield SF5, and each subfield is “1”, “10”, “6”, “3”, “2”. ”Indicates a code set having a tone weight of“. ”
 図5に示すコードセットには、発光するサブフィールドを「1」、非発光のサブフィールドを空欄で示し、最も左の列には、各サブフィールドコードにおいて表示する階調値を表す。 In the code set shown in FIG. 5, “1” indicates a light-emitting subfield, and a blank field indicates a non-light-emitting subfield, and the leftmost column indicates a gradation value to be displayed in each subfield code.
 例えば、図5に示すコードセットにもとづけば、階調値「1」に対応するサブフィールドコードは「10000」である。 For example, based on the code set shown in FIG. 5, the subfield code corresponding to the gradation value “1” is “10000”.
 したがって、階調値「1」を表示する放電セルではサブフィールドSF1だけが発光する。 Therefore, only the subfield SF1 emits light in the discharge cell displaying the gradation value “1”.
 なお、このサブフィールドコードは、左からサブフィールドSF1、サブフィールドSF2、サブフィールドSF3、サブフィールドSF4、サブフィールドSF5の順に0または1のデータが並んでいるものとする。また、以下、サブフィールドコードとして示す2値の数値は、左からサブフィールドSF1、サブフィールドSF2、サブフィールドSF3、・・・・の順にデータが並んでいるものとする。 In this subfield code, it is assumed that 0 or 1 data is arranged in the order of subfield SF1, subfield SF2, subfield SF3, subfield SF4, and subfield SF5 from the left. In the following description, it is assumed that binary numerical values shown as subfield codes are arranged in the order of subfield SF1, subfield SF2, subfield SF3,.
 また、図5に示すコードセットにもとづけば、階調値「10」に対応するサブフィールドコードは「10110」である。したがって、階調値「10」を表示する放電セルではサブフィールドSF1、サブフィールドSF3およびサブフィールドSF4が発光する。 Further, based on the code set shown in FIG. 5, the subfield code corresponding to the gradation value “10” is “10110”. Accordingly, in the discharge cell displaying the gradation value “10”, the subfield SF1, the subfield SF3, and the subfield SF4 emit light.
 次に、本実施の形態における3Dプラズマディスプレイ装置の構成について説明する。 Next, the configuration of the 3D plasma display device in the present embodiment will be described.
 図6は、本発明の一実施の形態における画像表示装置30を構成する回路ブロックおよび画像表示システムの一例を概略的に示す図である。 FIG. 6 is a diagram schematically showing an example of a circuit block and an image display system constituting the image display device 30 according to the embodiment of the present invention.
 本実施の形態に示す画像表示システムは、画像表示装置30とシャッタ眼鏡38とを構成要素に含む。 The image display system shown in the present embodiment includes an image display device 30 and shutter glasses 38 as constituent elements.
 画像表示装置30は、パネル10、パネル10を駆動する駆動回路、および各回路ブロックに必要な電源を供給する電源回路(図示せず)を備えている。駆動回路は、画像信号処理回路31、データ電極駆動回路32、走査電極駆動回路33、維持電極駆動回路34、およびタイミング発生回路35を備えている。 The image display device 30 includes a panel 10, a drive circuit that drives the panel 10, and a power supply circuit (not shown) that supplies power necessary for each circuit block. The drive circuit includes an image signal processing circuit 31, a data electrode drive circuit 32, a scan electrode drive circuit 33, a sustain electrode drive circuit 34, and a timing generation circuit 35.
 画像表示装置30が有する駆動回路は、1ライン毎書込み動作を行う第1種サブフィールドと、2ライン毎同時書込み動作を行う第2種サブフィールドとで1フィールドを構成し、図3に示した各駆動電圧を発生して各電極に印加する。 The drive circuit included in the image display device 30 includes one field including a first-type subfield that performs a writing operation for each line and a second-type subfield that performs a simultaneous writing operation for every two lines. Each drive voltage is generated and applied to each electrode.
 画像信号処理回路31に入力される画像信号は、赤の画像信号、緑の画像信号、青の画像信号である。画像信号処理回路31は、赤の画像信号、緑の画像信号、青の画像信号にもとづき、各放電セルに赤、緑、青の各階調値(1フィールドで表現される階調値)を設定する。なお、画像信号処理回路31は、入力される画像信号が輝度信号(Y信号)および彩度信号(C信号、またはR-Y信号およびB-Y信号、またはu信号およびv信号等)を含むときには、その輝度信号および彩度信号にもとづき赤の画像信号、緑の画像信号、青の画像信号を算出し、その後、各放電セルに赤、緑、青の各階調値を設定する。そして、各放電セルに設定した赤、緑、青の階調値を、サブフィールド毎の点灯・非点灯を示すサブフィールドコード(発光・非発光をデジタル信号の「1」、「0」に対応させたデータのこと)に変換し、そのサブフィールドコードを表示コードとして出力する。すなわち、画像信号処理回路31は、赤の画像信号、緑の画像信号、青の画像信号を、赤の表示コード、緑の表示コード、青の表示コードに変換して出力する。 The image signals input to the image signal processing circuit 31 are a red image signal, a green image signal, and a blue image signal. Based on the red image signal, the green image signal, and the blue image signal, the image signal processing circuit 31 sets each gradation value of red, green, and blue (a gradation value expressed by one field) to each discharge cell. To do. In the image signal processing circuit 31, the input image signal includes a luminance signal (Y signal) and a saturation signal (C signal, or RY signal and BY signal, or u signal and v signal, etc.). In some cases, a red image signal, a green image signal, and a blue image signal are calculated based on the luminance signal and the saturation signal, and then, each gradation value of red, green, and blue is set in each discharge cell. The red, green, and blue gradation values set for each discharge cell are subfield codes indicating lighting / non-lighting for each subfield (light emission / non-light emission corresponds to digital signals “1” and “0”). The subfield code is output as a display code. That is, the image signal processing circuit 31 converts the red image signal, the green image signal, and the blue image signal into a red display code, a green display code, and a blue display code and outputs the converted signals.
 また、画像表示装置30に入力される画像信号が、右目用画像信号と左目用画像信号とを有する3D画像信号であり、その3D画像信号をパネル10に表示する際には、右目用画像信号と左目用画像信号とがフィールド毎に交互に画像信号処理回路31に入力される。したがって、画像信号処理回路31は、右目用画像信号を右目用表示コード(赤の右目用表示コード、緑の右目用表示コード、青の右目用表示コード)に変換し、左目用画像信号を左目用表示コード(赤の左目用表示コード、緑の左目用表示コード、青の左目用表示コード)に変換して出力する。 The image signal input to the image display device 30 is a 3D image signal having a right-eye image signal and a left-eye image signal. When the 3D image signal is displayed on the panel 10, the right-eye image signal is displayed. And the image signal for the left eye are alternately input to the image signal processing circuit 31 for each field. Therefore, the image signal processing circuit 31 converts the right-eye image signal into a right-eye display code (red right-eye display code, green right-eye display code, blue right-eye display code), and converts the left-eye image signal to the left-eye. Display code (red left eye display code, green left eye display code, blue left eye display code) and output.
 なお、本実施の形態において、画像信号処理回路31は、変換テーブルを用いて画像信号をサブフィールドコードへ変換するのではなく、論理演算によって画像信号をサブフィールドコードへ変換する。この詳細は後述する。 In the present embodiment, the image signal processing circuit 31 does not convert an image signal into a subfield code using a conversion table, but converts the image signal into a subfield code by a logical operation. Details of this will be described later.
 タイミング発生回路35は、水平同期信号および垂直同期信号にもとづき、各回路ブロックの動作を制御する各種のタイミング信号を発生する。そして、発生したタイミング信号をそれぞれの回路ブロック(データ電極駆動回路32、走査電極駆動回路33、維持電極駆動回路34、および画像信号処理回路31等)へ供給する。 The timing generation circuit 35 generates various timing signals for controlling the operation of each circuit block based on the horizontal synchronization signal and the vertical synchronization signal. The generated timing signal is supplied to each circuit block (data electrode drive circuit 32, scan electrode drive circuit 33, sustain electrode drive circuit 34, image signal processing circuit 31, etc.).
 走査電極駆動回路33は、傾斜波形発生部、維持パルス発生部、走査パルス発生部(図6には示さず)を備え、タイミング発生回路35から供給されるタイミング信号にもとづいて駆動電圧波形を作成し、走査電極SC1~走査電極SCnのそれぞれに印加する。傾斜波形発生部は、タイミング信号にもとづき、初期化期間に走査電極SC1~走査電極SCnに印加する強制初期化波形および選択初期化波形を発生する。維持パルス発生部は、タイミング信号にもとづき、維持期間に走査電極SC1~走査電極SCnに印加する維持パルスを発生する。走査パルス発生部は、複数の走査電極駆動IC(走査IC)を備え、タイミング信号にもとづき、書込み期間に走査電極SC1~走査電極SCnに印加する走査パルスを発生する。 Scan electrode drive circuit 33 includes a ramp waveform generation unit, a sustain pulse generation unit, and a scan pulse generation unit (not shown in FIG. 6), and generates a drive voltage waveform based on a timing signal supplied from timing generation circuit 35. Then, the voltage is applied to each of scan electrode SC1 to scan electrode SCn. The ramp waveform generator generates a forced initialization waveform and a selective initialization waveform to be applied to scan electrode SC1 through scan electrode SCn during the initialization period based on the timing signal. The sustain pulse generator generates a sustain pulse to be applied to scan electrode SC1 through scan electrode SCn during the sustain period based on the timing signal. The scan pulse generator includes a plurality of scan electrode drive ICs (scan ICs), and generates scan pulses to be applied to scan electrode SC1 through scan electrode SCn during the address period based on the timing signal.
 すなわち、走査電極駆動回路33は、2ライン毎同時書込み動作を行う書込み期間では、走査電極12がパネル10に配列された順番で、隣接する2本の走査電極12に同時に走査パルスを順次印加する。また、1ライン毎書込み動作を行う書込み期間では、走査電極12がパネル10に配列された順番で走査電極SC1から走査電極SCnの1本ずつに走査パルスを順次印加する。 That is, the scanning electrode drive circuit 33 sequentially applies scanning pulses to two adjacent scanning electrodes 12 in the order in which the scanning electrodes 12 are arranged on the panel 10 in the address period in which the simultaneous writing operation is performed every two lines. . In the address period in which the address operation is performed for each line, the scan pulse is sequentially applied to each of the scan electrodes SC1 to SCn in the order in which the scan electrodes 12 are arranged on the panel 10.
 維持電極駆動回路34は、維持パルス発生部、電圧Veを発生する回路(図5には示さず)を備え、タイミング発生回路35から供給されるタイミング信号にもとづいて駆動電圧波形を作成し、維持電極SU1~維持電極SUnのそれぞれに印加する。維持期間では、タイミング信号にもとづいて維持パルスを発生し、維持電極SU1~維持電極SUnに印加する。初期化期間および書込み期間では、タイミング信号にもとづいて電圧Veを発生し、維持電極SU1~維持電極SUnに印加する。 Sustain electrode drive circuit 34 includes a sustain pulse generation unit and a circuit (not shown in FIG. 5) for generating voltage Ve, and generates and maintains a drive voltage waveform based on the timing signal supplied from timing generation circuit 35. The voltage is applied to each of electrode SU1 through sustain electrode SUn. In the sustain period, a sustain pulse is generated based on the timing signal and applied to sustain electrode SU1 through sustain electrode SUn. In the initialization period and the address period, voltage Ve is generated based on the timing signal and applied to sustain electrode SU1 through sustain electrode SUn.
 データ電極駆動回路32は、画像信号処理回路31から出力される各色の右目用表示コードと左目用表示コード、およびタイミング発生回路35から供給されるタイミング信号にもとづき、各データ電極D1~データ電極Dmに対応する書込みパルスを発生する。そして、データ電極駆動回路32は、書込み期間に、その書込みパルスを各データ電極D1~データ電極Dmに印加する。 The data electrode drive circuit 32 is based on the right eye display code and the left eye display code of each color output from the image signal processing circuit 31 and the timing signal supplied from the timing generation circuit 35. A write pulse corresponding to is generated. Then, the data electrode drive circuit 32 applies the address pulse to the data electrodes D1 to Dm during the address period.
 次に、画像信号処理回路31の詳細とその動作について説明する。 Next, details of the image signal processing circuit 31 and its operation will be described.
 本実施の形態における画像信号処理回路31は、画像表示装置30における画像表示品質の低下を防止しつつ、書込み期間に要する時間を短縮することを目的とする。なお、以下の説明では、右目用画像信号と左目用画像信号との区別については言及せず、それらをまとめて画像信号とする。また画像信号の値は、注目画素に表示すべき階調値に等しいものとする。 The purpose of the image signal processing circuit 31 in the present embodiment is to reduce the time required for the writing period while preventing the image display quality in the image display device 30 from deteriorating. In the following description, the distinction between the image signal for the right eye and the image signal for the left eye is not mentioned, and they are collectively referred to as an image signal. The value of the image signal is assumed to be equal to the gradation value to be displayed on the target pixel.
 なお、注目画素とは、その時点で演算の対象となっている画素のことである。 Note that the pixel of interest is a pixel that is an object of calculation at that time.
 図7は、本発明の一実施の形態における画像表示装置30の画像信号処理回路31を構成する回路ブロックの一例を概略的に示す図である。 FIG. 7 is a diagram schematically showing an example of a circuit block constituting the image signal processing circuit 31 of the image display device 30 according to an embodiment of the present invention.
 画像信号処理回路31は、1水平期間遅延部41、2ライン平均部42、2ライン差分部43、減算部44、平均コード変換部45、差分コード作成部91、および表示コード合成部92を有する。以下、1水平期間遅延部41を「1H遅延部41」と略記する。 The image signal processing circuit 31 includes a one horizontal period delay unit 41, a line average unit 42, a two line difference unit 43, a subtraction unit 44, an average code conversion unit 45, a difference code creation unit 91, and a display code synthesis unit 92. . Hereinafter, the one horizontal period delay unit 41 is abbreviated as “1H delay unit 41”.
 1H遅延部41は、画像信号処理回路31に入力される画像信号を、1水平期間だけ遅延する。したがって、1H遅延部41から出力される画像信号は、注目画素の1ライン前の画像信号であり、注目画素の上に隣接する画素の画像信号である。すなわち、注目画素の画像信号が(p+1)ライン目の画素の画像信号であれば1H遅延部41から出力される画像信号はpライン目の画素の画像信号である。 The 1H delay unit 41 delays the image signal input to the image signal processing circuit 31 by one horizontal period. Therefore, the image signal output from the 1H delay unit 41 is an image signal one line before the target pixel, and is an image signal of a pixel adjacent to the target pixel. That is, if the image signal of the pixel of interest is the image signal of the pixel on the (p + 1) line, the image signal output from the 1H delay unit 41 is the image signal of the pixel on the p line.
 なお、本実施の形態では、1つのデータ電極22上に連続して配置された画素(列方向に連続して配置された画素)を、「縦に連続する画素」とする。また、1つの表示電極対14上に連続して配置された画素(行方向に連続して配置された画素)を、「横に連続する画素」とする。したがって、注目画素の上下に隣接する画素とは、注目画素に対して1つのデータ電極22上で隣接する画素のことである。また、注目画素の左右に隣接する画素とは、注目画素に対して1つの表示電極対14上で隣接する画素のことである。また、縦方向とはデータ電極22が延伸する方向のことであり、横方向とは表示電極対14が延伸する方向のことである。 In the present embodiment, pixels continuously arranged on one data electrode 22 (pixels continuously arranged in the column direction) are referred to as “vertically continuous pixels”. Further, pixels continuously arranged on one display electrode pair 14 (pixels continuously arranged in the row direction) are referred to as “horizontal pixels”. Therefore, the pixels adjacent above and below the pixel of interest are pixels adjacent to the pixel of interest on one data electrode 22. Further, the pixels adjacent to the left and right of the target pixel are pixels adjacent to the target pixel on one display electrode pair 14. The vertical direction is a direction in which the data electrode 22 extends, and the horizontal direction is a direction in which the display electrode pair 14 extends.
 2ライン平均部42は、縦方向に隣接する2つの画素(走査電極12と直交する方向に隣接する2つの画素)であって、かつ2ライン毎同時書込み動作を行うときに同時に書込み動作が行われる2つの画素のそれぞれに対応する画像信号の平均値を算出する。以下、この2つの画素を「1対の画素」とも記す。すなわち、2ライン平均部42は、pライン目の画素に対応する画像信号と、(p+1)ライン目の画素に対応する画像信号との平均値を算出する。以下、この平均値を「平均画像信号」と呼称する。したがって、2ライン平均部42の出力は、pライン目および(p+1)ライン目の画素の平均画像信号である。なお、pは奇数である。 The two-line averaging unit 42 is two pixels adjacent in the vertical direction (two pixels adjacent in the direction orthogonal to the scanning electrode 12), and the writing operation is performed simultaneously when performing the simultaneous writing operation every two lines. An average value of the image signals corresponding to each of the two pixels is calculated. Hereinafter, these two pixels are also referred to as “a pair of pixels”. That is, the 2-line average unit 42 calculates an average value of the image signal corresponding to the pixel on the p-th line and the image signal corresponding to the pixel on the (p + 1) -th line. Hereinafter, this average value is referred to as an “average image signal”. Therefore, the output of the 2-line averaging unit 42 is an average image signal of pixels on the p-th line and the (p + 1) -th line. Note that p is an odd number.
 2ライン差分部43は、縦方向に隣接する2つの画素(走査電極12と直交する方向に隣接する2つの画素)であって、かつ2ライン毎同時書込み動作を行うときに同時に書込み動作が行われる2つの画素(1対の画素)のそれぞれに対応する画像信号の差分値を算出する。そして、2ライン差分部43は、その差分値を、第1種サブフィールドの階調重みと比較する。 The two-line difference unit 43 is two pixels adjacent in the vertical direction (two pixels adjacent in the direction orthogonal to the scanning electrode 12), and performs a write operation simultaneously when performing a two-line simultaneous write operation. The difference value of the image signal corresponding to each of the two pixels (a pair of pixels) is calculated. Then, the two-line difference unit 43 compares the difference value with the gradation weight of the first type subfield.
 本実施の形態において、2ライン差分部43は、pライン目の画素に対応する画像信号から(p+1)ライン目の画素に対応する画像信号を減算して差分値を算出する。そして、2ライン差分部43は、算出した差分値を、第1種サブフィールド(本実施の形態では、サブフィールドSF2)の階調重みWthと比較する。以下、第1種サブフィールド(本実施の形態では、サブフィールドSF2)の階調重みWthを、「階調閾値Wth」と記す。 In the present embodiment, the 2-line difference unit 43 subtracts the image signal corresponding to the pixel on the (p + 1) line from the image signal corresponding to the pixel on the p line to calculate a difference value. Then, the two-line difference unit 43 compares the calculated difference value with the gradation weight Wth of the first type subfield (subfield SF2 in the present embodiment). Hereinafter, the gradation weight Wth of the first type subfield (subfield SF2 in the present embodiment) is referred to as “gradation threshold Wth”.
 このとき、2ライン差分部43は、差分値が階調閾値Wth以上であれば、「1」を出力する。 At this time, the two-line difference unit 43 outputs “1” if the difference value is equal to or greater than the gradation threshold value Wth.
 また、2ライン差分部43は、差分値が(-1)×(階調閾値Wth)以下であれば、「-1」を出力する。 The 2-line difference unit 43 outputs “−1” if the difference value is equal to or less than (−1) × (tone threshold Wth).
 また、2ライン差分部43は、差分値が(-1)×(階調閾値Wth)よりも大きく、かつ階調閾値Wth未満であれば「0」を出力する。 The 2-line difference unit 43 outputs “0” if the difference value is larger than (−1) × (gradation threshold value Wth) and less than the gradation threshold value Wth.
 すなわち、2ライン差分部43は、以下の3つの動作をする。
1)Wth≦(差分値)のときには「1」を出力する。
2)-Wth<(差分値)<Wthのときには「0」を出力する。
3)(差分値)≦-Wthのときには「-1」を出力する。
That is, the two-line difference unit 43 performs the following three operations.
1) When Wth ≦ (difference value), “1” is output.
2) When -Wth <(difference value) <Wth, “0” is output.
3) When (difference value) ≦ −Wth, “−1” is output.
 減算部44は、2ライン平均部42の出力から、2ライン差分部43の出力にもとづき決定される所定の変数を減算する。すなわち、減算部44は、1対の画素の平均画像信号から、1対の画素の画像信号の差分値によって決定される所定の変数を減算する。 The subtracting unit 44 subtracts a predetermined variable determined based on the output of the two-line difference unit 43 from the output of the two-line averaging unit 42. That is, the subtracting unit 44 subtracts a predetermined variable determined by the difference value of the image signal of the pair of pixels from the average image signal of the pair of pixels.
 本実施の形態においては、2ライン差分部43の出力が「1」または「-1」であれば、この所定の変数を「階調閾値Wthの1/2」とする。また、2ライン差分部43の出力が「0」であれば、この所定の変数を「0」とする。 In this embodiment, if the output of the two-line difference unit 43 is “1” or “−1”, this predetermined variable is set to “1/2 of the gradation threshold value Wth”. If the output of the 2-line difference unit 43 is “0”, the predetermined variable is set to “0”.
 したがって、減算部44は、2ライン差分部43の出力が「1」または「-1」であれば、2ライン平均部42から出力される平均画像信号から階調閾値Wthの1/2を減算する。そして、その減算結果を、pライン目の画素および(p+1)ライン目の画素(pライン目および(p+1)ライン目の1対の画素)の画像信号として出力する。 Accordingly, if the output of the 2-line difference unit 43 is “1” or “−1”, the subtraction unit 44 subtracts ½ of the gradation threshold value Wth from the average image signal output from the 2-line average unit 42. To do. Then, the subtraction result is output as an image signal of a pixel on the p-th line and a pixel on the (p + 1) -th line (a pair of pixels on the p-th line and the (p + 1) -th line).
 また、減算部44は、2ライン差分部43の出力が「0」であれば、2ライン平均部42から出力される平均画像信号を、そのままpライン目の画素および(p+1)ライン目の画素(pライン目および(p+1)ライン目の1対の画素)の画像信号として出力する。 If the output of the two-line difference unit 43 is “0”, the subtracting unit 44 uses the average image signal output from the two-line averaging unit 42 as it is as the pixel on the p-th line and the pixel on the (p + 1) -th line. This is output as an image signal (a pair of pixels on the p-th line and the (p + 1) -th line).
 平均コード変換部45は、減算部44から出力される画像信号を、所定のサブフィールドを非点灯サブフィールドとするサブフィールドコードに変換する。この所定のサブフィールドとは、2ライン差分部43の出力(2ライン差分部43における比較結果)によって決定されるサブフィールドである。 The average code conversion unit 45 converts the image signal output from the subtraction unit 44 into a subfield code having a predetermined subfield as a non-lighting subfield. This predetermined subfield is a subfield determined by the output of the 2-line difference unit 43 (comparison result in the 2-line difference unit 43).
 平均コード変換部45は、減算部44から出力されるpライン目および(p+1)ライン目の1対の画素の画像信号を、サブフィールドコードに変換する。このとき、2ライン差分部43の出力が「1」または「-1」であれば、本実施の形態における平均コード変換部45は、第1種サブフィールド(本実施の形態では、サブフィールドSF2)を非点灯サブフィールドにする。 The average code conversion unit 45 converts the image signal of the pair of pixels on the p-th line and the (p + 1) -th line output from the subtraction unit 44 into a subfield code. At this time, if the output of the two-line difference unit 43 is “1” or “−1”, the average code conversion unit 45 in the present embodiment performs the first type subfield (subfield SF2 in the present embodiment). ) To the non-lit subfield.
 したがって、2ライン差分部43の出力が「1」または「-1」であれば、平均コード変換部45から出力されるサブフィールドコードは「X0XXX」となる。 Therefore, if the output of the two-line difference unit 43 is “1” or “−1”, the subfield code output from the average code conversion unit 45 is “X0XXX”.
 なお、このサブフィールドコードは、点灯サブフィールドを「1」、非点灯サブフィールドを「0」で表しており、「X」は「0」または「1」のどちらであってもよいことを表す。 This subfield code represents a lighting subfield as “1” and a non-lighting subfield as “0”, and “X” represents either “0” or “1”. .
 なお、このサブフィールドコードは、左からサブフィールドSF1、サブフィールドSF2、サブフィールドSF3、サブフィールドSF4、サブフィールドSF5の順にデータが並んでいるものとする。 In this subfield code, it is assumed that data is arranged in the order of subfield SF1, subfield SF2, subfield SF3, subfield SF4, and subfield SF5 from the left.
 また、2ライン差分部43の出力が「0」であれば、非点灯サブフィールドに固定されるサブフィールドは発生しないので、平均コード変換部45から出力されるサブフィールドコードは「XXXXX」となる。 If the output of the 2-line difference unit 43 is “0”, no subfield fixed to the non-illuminated subfield is generated, so the subfield code output from the average code conversion unit 45 is “XXXX”. .
 平均コード変換部45の詳細は後述する。 Details of the average code converter 45 will be described later.
 差分コード作成部91は、2ライン差分部43の出力にもとづき、所定のサブフィールドである第1種サブフィールド(本実施の携帯では、サブフィールドSF2)を制御するサブフィールドコードを生成する。 The difference code creation unit 91 generates a subfield code for controlling the first type subfield (subfield SF2 in the present embodiment), which is a predetermined subfield, based on the output of the two-line difference unit 43.
 すなわち、差分コード作成部91は、2ライン差分部43の出力が「1」であれば、pライン目の画素の画像信号に対しては、サブフィールドSF2を点灯サブフィールドにするサブフィールドコード「-1---」を出力する。また、(p+1)ライン目の画素の画像信号に対しては、サブフィールドSF2を非点灯サブフィールドにするサブフィールドコード「-0---」を出力する。 That is, if the output of the 2-line difference unit 43 is “1”, the difference code creation unit 91 sets the subfield code “ -1 ---- "is output. Further, for the image signal of the pixel on the (p + 1) -th line, a subfield code “−0 −−−” is output that sets the subfield SF2 to a non-lighting subfield.
 また、差分コード作成部91は、2ライン差分部43の出力が「-1」であれば、pライン目の画素の画像信号に対しては、サブフィールドSF2を非点灯サブフィールドにするサブフィールドコード「-0---」を出力する。また、(p+1)ライン目の画素の画像信号に対しては、サブフィールドSF2を点灯サブフィールドにするサブフィールドコード「-1---」を出力する。 Further, if the output of the two-line difference unit 43 is “−1”, the difference code creation unit 91 sets the subfield SF2 as a non-lighting subfield for the image signal of the pixel on the p-th line. The code “−0 −−−” is output. Further, for the image signal of the pixel on the (p + 1) -th line, the subfield code “−1 −−−” which outputs the subfield SF2 as the lighting subfield is output.
 また、差分コード作成部91は、2ライン差分部43の出力が「0」であれば、pライン目の画素の画像信号および(p+1)ライン目の画素の画像信号に対して、サブフィールドSF2を制御しないサブフィールドコード「-----」を出力する。 Further, if the output of the two-line difference unit 43 is “0”, the difference code creation unit 91 applies the subfield SF2 to the image signal of the pixel on the p-th line and the image signal of the pixel on the (p + 1) -th line. The sub-field code “-----” that does not control is output.
 なお、このサブフィールドコードでは、制御の対象外となるサブフィールドを「-」で表している。 In this subfield code, subfields that are not subject to control are represented by “-”.
 なお、本実施の形態における画像信号処理回路31は、表示コード合成部92において、平均コード変換部45の出力と、差分コード作成部91の出力とを、論理和演算によって合成する。そのため、差分コード作成部91は、後段で論理和演算が行われることを考慮して、「-」に対応するビットを「0」に置き換えて出力している。 Note that the image signal processing circuit 31 in the present embodiment synthesizes the output of the average code conversion unit 45 and the output of the difference code creation unit 91 by a logical sum operation in the display code synthesis unit 92. Therefore, the differential code creation unit 91 outputs the bit corresponding to “−” replaced with “0” in consideration of the logical OR operation performed in the subsequent stage.
 なお、上述した「ビット」とは、サブフィールドコードを構成するデータのことであり、各ビットが表す1または0の数値は、各サブフィールドにおける点灯または非点灯を表す。 Note that the above-mentioned “bit” is data constituting a subfield code, and a numerical value of 1 or 0 represented by each bit represents lighting or non-lighting in each subfield.
 表示コード合成部92は、平均コード変換部45から出力されるサブフィールドコードと、差分コード作成部91から出力されるサブフィールドコードとを合成して表示コードを作成する。 The display code synthesis unit 92 creates a display code by synthesizing the subfield code output from the average code conversion unit 45 and the subfield code output from the difference code creation unit 91.
 表示コード合成部92は、平均コード変換部45から出力されるpライン目の画素に対応するサブフィールドコードと、差分コード作成部91から出力されるpライン目の画素に対応するサブフィールドコードとを、各ビット毎に論理和演算する。そして、その論理和演算の結果を、pライン目の画素の表示コードとしてデータ電極駆動回路32に出力する。表示コードとは、画像表示に実際に用いるサブフィールドコードのことである。 The display code synthesis unit 92 includes a subfield code corresponding to the p-th pixel output from the average code conversion unit 45, and a subfield code corresponding to the p-th pixel output from the difference code creation unit 91. Is ORed for each bit. Then, the result of the logical sum operation is output to the data electrode driving circuit 32 as a display code of the pixel on the p-th line. The display code is a subfield code actually used for image display.
 また、表示コード合成部92は、平均コード変換部45から出力される(p+1)ライン目の画素に対応するサブフィールドコードと、差分コード作成部91から出力される(p+1)ライン目の画素に対応するサブフィールドコードとを、各ビット毎に論理和演算する。そして、その論理和演算の結果を、(p+1)ライン目の画素の表示コードとしてデータ電極駆動回路32に出力する。 Further, the display code synthesis unit 92 applies the subfield code corresponding to the (p + 1) line pixel output from the average code conversion unit 45 and the (p + 1) line pixel output from the difference code creation unit 91. The corresponding subfield code is ORed for each bit. Then, the result of the logical sum operation is output to the data electrode driving circuit 32 as the display code of the pixel on the (p + 1) line.
 本実施の形態においては、画像信号処理回路31をこのように構成することにより、書込み期間を短縮するために、書込み期間において2ライン毎同時書込み動作を行うときであっても、パネル10に表示される画像の垂直解像度の低下を抑制することができる。 In the present embodiment, by configuring the image signal processing circuit 31 in this way, the display is performed on the panel 10 even when the simultaneous writing operation is performed every two lines in the writing period in order to shorten the writing period. It is possible to suppress a decrease in the vertical resolution of the image to be displayed.
 なお、本実施の形態では、書込み期間において奇数ライン目の走査電極SCpとその次の偶数ライン目の走査電極SCp+1とを1つのペアにして2ライン毎同時書込み動作を行うときの画像信号処理回路31の動作を説明したが、本発明は何らこの構成に限定されるものではない。書込み期間において偶数ライン目の走査電極SCp+1とその次の奇数ライン目の走査電極SCp+2とを1つのペアにして2ライン毎同時書込み動作を行うときには、画像信号処理回路31は、走査電極SCp+1上の画素と走査電極SCp+1上の画素とを1対の画素として上述と同様の動作を行うものとする。 In the present embodiment, the image signal processing circuit for performing the simultaneous writing operation every two lines with the odd-numbered scan electrode SCp and the next even-numbered scan electrode SCp + 1 as one pair in the write period. Although the operation of 31 has been described, the present invention is not limited to this configuration. When the simultaneous writing operation is performed every two lines with the scan electrode SCp + 1 of the even-numbered line and the scan electrode SCp + 2 of the next odd-numbered line as one pair in the address period, the image signal processing circuit 31 performs the operation on the scan electrode SCp + 1. It is assumed that the same operation as described above is performed with the pixel and the pixel on the scan electrode SCp + 1 as a pair of pixels.
 次に画像信号処理回路31の動作について説明する。 Next, the operation of the image signal processing circuit 31 will be described.
 図8Aは、本発明の一実施の形態における画像表示装置30の画像信号処理回路31における書込み動作の一例を概略的に示す図である。 FIG. 8A is a diagram schematically showing an example of a write operation in the image signal processing circuit 31 of the image display device 30 according to the embodiment of the present invention.
 図8Bは、本発明の一実施の形態における画像表示装置30の画像信号処理回路31における書込み動作の他の一例を概略的に示す図である。 FIG. 8B is a diagram schematically showing another example of the writing operation in the image signal processing circuit 31 of the image display device 30 according to the embodiment of the present invention.
 図8Cは、本発明の一実施の形態における画像表示装置30の画像信号処理回路31における書込み動作の他の一例を概略的に示す図である。 FIG. 8C is a diagram schematically showing another example of the writing operation in the image signal processing circuit 31 of the image display device 30 according to the embodiment of the present invention.
 図8Dは、本発明の一実施の形態における画像表示装置30の画像信号処理回路31における書込み動作の他の一例を概略的に示す図である。 FIG. 8D is a diagram schematically showing another example of the writing operation in the image signal processing circuit 31 of the image display device 30 according to the embodiment of the present invention.
 図8Eは、本発明の一実施の形態における画像表示装置30の画像信号処理回路31における書込み動作の他の一例を概略的に示す図である。 FIG. 8E is a diagram schematically showing another example of the writing operation in the image signal processing circuit 31 of the image display device 30 according to the embodiment of the present invention.
 図8Fは、本発明の一実施の形態における画像表示装置30の画像信号処理回路31における書込み動作の他の一例を概略的に示す図である。 FIG. 8F is a diagram schematically showing another example of the writing operation in the image signal processing circuit 31 of the image display device 30 according to the embodiment of the present invention.
 図8Gは、本発明の一実施の形態における画像表示装置30の画像信号処理回路31における書込み動作の他の一例を概略的に示す図である。 FIG. 8G is a diagram schematically showing another example of the writing operation in the image signal processing circuit 31 of the image display device 30 according to the embodiment of the present invention.
 なお、図8Aは、画像信号処理回路31に入力される画像信号の一例を概略的に示した図である。図8Bは、全てのサブフィールドの書込み期間で2ライン毎同時書込み動作を行うことを想定したときにパネル10に表示される画像の一例を概略的に示した図である。図8Cは、2ライン平均部42から出力される平均画像信号の一例を概略的に示した図である。図8Dは、減算部44から出力される画像信号の一例を概略的に示した図である。図8Eは、2ライン差分部43の出力の一例を概略的に示した図である。図8Fは、差分コード作成部91から出力されるサブフィールドコードにもとづく第1種サブフィールドの点灯・非点灯を概略的に示した図である。図8Gは、表示コード合成部92から出力されるサブフィールドコードにもとづく表示画像の一例を概略的に示した図である。 Note that FIG. 8A is a diagram schematically illustrating an example of an image signal input to the image signal processing circuit 31. FIG. 8B is a diagram schematically illustrating an example of an image displayed on the panel 10 when it is assumed that the simultaneous writing operation is performed every two lines in the writing period of all the subfields. FIG. 8C is a diagram schematically illustrating an example of an average image signal output from the two-line average unit 42. FIG. 8D is a diagram schematically illustrating an example of an image signal output from the subtracting unit 44. FIG. 8E is a diagram schematically illustrating an example of the output of the 2-line difference unit 43. FIG. 8F is a diagram schematically showing lighting / non-lighting of the first type subfield based on the subfield code output from the difference code creating unit 91. FIG. 8G is a diagram schematically showing an example of a display image based on the subfield code output from the display code synthesis unit 92.
 図8Aから図8Gの各図面において、1つの欄は1つの画素を表している。また、図8Aから図8Gの各図面(図8Eは除く)において、白の欄は点灯する画素を表し、黒の欄は非点灯の画素を表す。また、図8Eには、2ライン差分部43の出力(「1」または「-1」)を示し、2ライン差分部43の出力「0」を空欄で示す。 8A to 8G, one column represents one pixel. 8A to 8G (excluding FIG. 8E), white columns represent pixels that are lit, and black columns represent pixels that are not lit. 8E shows the output (“1” or “−1”) of the 2-line difference unit 43, and the output “0” of the 2-line difference unit 43 is indicated by a blank.
 以下では、一例として、図8Aに示した斜め線の画像信号が画像信号処理回路31に入力されたときの画像信号処理回路31の動作について説明する。 Hereinafter, as an example, the operation of the image signal processing circuit 31 when the oblique line image signal illustrated in FIG. 8A is input to the image signal processing circuit 31 will be described.
 例えば、全てのサブフィールドの書込み期間で2ライン毎同時書込み動作を行うことを想定する。その場合、表示画像の垂直解像度は大幅に低下し、例えば図8Bに示すように、斜め線は、粗い階段状の線としてパネル10に表示されることになる。 For example, it is assumed that simultaneous writing operation is performed every two lines in the writing period of all subfields. In that case, the vertical resolution of the display image is greatly reduced, and for example, as shown in FIG. 8B, the diagonal line is displayed on the panel 10 as a rough step-like line.
 また、図8Aに示した斜め線よりも線幅の細い斜め線が画像信号処理回路31に入力されれば、全てのサブフィールドの書込み期間で2ライン毎同時書込み動作を行うと、その斜め線は、点線としてパネル10に表示されることになる。あるいは、細い水平線(横に延びる一本の細線)であれば、全てのサブフィールドの書込み期間で2ライン毎同時書込み動作を行うと、その線がパネル10に表示されなくなることもある。 In addition, if a diagonal line having a line width smaller than the diagonal line shown in FIG. 8A is input to the image signal processing circuit 31, when the simultaneous writing operation is performed every two lines in the writing period of all the subfields, the diagonal line Will be displayed on the panel 10 as a dotted line. Alternatively, in the case of a thin horizontal line (one thin line extending laterally), if the simultaneous writing operation is performed every two lines during the writing period of all the subfields, the line may not be displayed on the panel 10.
 この現象は、2ライン毎同時書込み動作を行うときに、一方のライン(図8Bでは奇数ライン)の情報のみをパネル10に表示し、他方のライン(図8Bでは偶数ライン)の情報がパネル10に表示されないために発生する。 In this phenomenon, when two lines are simultaneously written, only information on one line (odd line in FIG. 8B) is displayed on the panel 10, and information on the other line (even line in FIG. 8B) is displayed on the panel 10. Occurs because it is not displayed.
 2ライン平均部42は、このような情報の欠落を防ぐために設けられた回路ブロックである。2ライン平均部42では、pライン目の画素の画像信号と(p+1)ライン目の画素の画像信号との平均値を算出し、それらをpライン目および(p+1)ライン目の画像信号として出力する。これにより、図8Cに示すように、パネル10に表示すべき情報が欠落することを防ぐことができる。 The 2-line average unit 42 is a circuit block provided to prevent such information loss. The two-line averaging unit 42 calculates an average value of the image signal of the pixel on the p-th line and the image signal of the pixel on the (p + 1) -th line, and outputs them as image signals for the p-th line and the (p + 1) -th line. To do. Thereby, as shown to FIG. 8C, it can prevent that the information which should be displayed on the panel 10 is missing.
 しかし、この動作だけでは、表示画像における垂直解像度の低下を改善することはできない。 However, this operation alone cannot improve the decrease in vertical resolution in the displayed image.
 本実施の形態においては、表示画像における垂直解像度の低下を補うために、1ライン毎書込み動作を行う第1種サブフィールド(本実施の形態では、サブフィールドSF2)を1フィールド内に設けている。 In the present embodiment, in order to compensate for the decrease in vertical resolution in the display image, the first type subfield (in this embodiment, subfield SF2) for performing the writing operation for each line is provided in one field. .
 そして、画像信号処理回路31は、2ライン差分部43および差分コード作成部91を備えている。2ライン差分部43は、垂直解像度の低下を補うべき画素を検出するための回路ブロックであり、差分コード作成部91は、垂直解像度の低下を補うための第1種サブフィールド(本実施の形態では、サブフィールドSF2)を制御するサブフィールドコードを生成する回路ブロックである。 The image signal processing circuit 31 includes a two-line difference unit 43 and a difference code creation unit 91. The two-line difference unit 43 is a circuit block for detecting a pixel that should compensate for the decrease in vertical resolution, and the difference code creation unit 91 is a first-type subfield (this embodiment) for compensating for the decrease in vertical resolution. The circuit block for generating a subfield code for controlling the subfield SF2).
 さらに、画像信号処理回路31は、減算部44および表示コード合成部92を備えている。減算部44および表示コード合成部92は、差分コード作成部91で作成したサブフィールドコードにもとづき表示コードを発生するための回路ブロックである。 Furthermore, the image signal processing circuit 31 includes a subtraction unit 44 and a display code synthesis unit 92. The subtraction unit 44 and the display code synthesis unit 92 are circuit blocks for generating a display code based on the subfield code created by the difference code creation unit 91.
 2ライン差分部43は、図8Eに示すように、pライン目の画素の画像信号と(p+1)ライン目の画素の画像信号との間で、階調値が階調閾値Wth以上に変化するときには、「1」または「-1」を出力する。 As shown in FIG. 8E, the two-line difference unit 43 changes the gradation value to be equal to or higher than the gradation threshold Wth between the image signal of the pixel on the p-th line and the image signal of the pixel on the (p + 1) -th line. Sometimes, “1” or “−1” is output.
 差分コード作成部91は、第1種サブフィールド(本実施の形態では、サブフィールドSF2)を、図8Eで「1」を記した画素で点灯し、「-1」を記した画素で非点灯とするサブフィールドコードを作成する。その結果、各画素は、第1種サブフィールド(本実施の形態では、サブフィールドSF2)において、図8Fに示すように、点灯または非点灯となる。なお、図8Fにおいて、欄で示されていない各画素は画像信号にもとづき点灯または非点灯となることを表している。 The difference code creation unit 91 turns on the first type subfield (subfield SF2 in the present embodiment) with the pixels marked with “1” in FIG. 8E and does not light up with the pixels marked with “−1”. Create a subfield code. As a result, each pixel is turned on or off in the first type subfield (subfield SF2 in this embodiment) as shown in FIG. 8F. In FIG. 8F, each pixel not shown in the column represents lighting or non-lighting based on the image signal.
 減算部44は、図8Dに示すように、2ライン差分部43の出力が「1」または「-1」となる画素において(例えば、図8Eに「1」または「-1」と記した画素において)、2ライン平均部42から出力される平均画像信号から階調閾値Wthの1/2を減算する。これは、差分コード作成部91で生成した、第1種サブフィールド(本実施の形態では、サブフィールドSF2)を制御するためのサブフィールドコードを、平均コード変換部45の出力に合成することを見越してのことである。 As shown in FIG. 8D, the subtracting unit 44 uses a pixel in which the output of the two-line difference unit 43 is “1” or “−1” (for example, a pixel marked “1” or “−1” in FIG. 8E) 2), 1/2 of the gradation threshold value Wth is subtracted from the average image signal output from the two-line average unit 42. This means that the sub-field code for controlling the first type sub-field (sub-field SF2 in the present embodiment) generated by the difference code creating unit 91 is combined with the output of the average code converting unit 45. In anticipation.
 平均コード変換部45は、減算部44から出力される画像信号をサブフィールドコードに変換する。このとき、2ライン差分部43の出力が「1」または「-1」である画素(例えば、図8Dにおいて破線で囲った画素)に関しては、第1種サブフィールド(本実施の形態では、サブフィールドSF2)を非点灯とし、第2種サブフィールド(本実施の形態では、サブフィールドSF2を除くサブフィールド)は減算部44から出力される画像信号にもとづいて、サブフィールドコードを生成する。平均コード変換部45は、その他の画素(2ライン差分部43の出力が「0」である画素)に関しては、全てのサブフィールドが減算部44から出力される画像信号にもとづくサブフィールドコードに変換する。 The average code conversion unit 45 converts the image signal output from the subtraction unit 44 into a subfield code. At this time, for a pixel (for example, a pixel surrounded by a broken line in FIG. 8D) for which the output of the two-line difference unit 43 is “1” or “−1”, the first type subfield (in this embodiment, the sub-field The field SF2) is not lit, and the second type subfield (in this embodiment, the subfield excluding the subfield SF2) generates a subfield code based on the image signal output from the subtracting unit 44. The average code conversion unit 45 converts all the subfields into subfield codes based on the image signal output from the subtraction unit 44 for the other pixels (pixels whose output from the two-line difference unit 43 is “0”). To do.
 そして、表示コード合成部92は、平均コード変換部45から出力されるサブフィールドコードと、差分コード作成部91から出力されるサブフィールドコードとを、論理和演算によって合成し、画像表示に実際に用いる表示コードとしてデータ電極駆動回路32に出力する。 Then, the display code synthesis unit 92 synthesizes the subfield code output from the average code conversion unit 45 and the subfield code output from the difference code creation unit 91 by a logical sum operation, and actually displays the image on the image display. A display code to be used is output to the data electrode drive circuit 32.
 この結果、図8Gに示すように、本実施の形態における画像信号処理回路31は、元の画像信号(例えば、図8Aに示す画像)と比較して、垂直解像度の低下を防止した画像をパネル10に表示することができる。すなわち、本実施の形態における画像信号処理回路31は、全てのサブフィールドの書込み期間で2ライン毎同時書込み動作を行うときの画像(例えば、図8Bに示す画像)と比較して、垂直解像度を向上し、滑らかな斜め線の画像をパネル10に表示することができる。 As a result, as shown in FIG. 8G, the image signal processing circuit 31 in the present exemplary embodiment displays an image in which the vertical resolution is prevented from lowering compared to the original image signal (for example, the image shown in FIG. 8A). 10 can be displayed. That is, the image signal processing circuit 31 in the present embodiment has a vertical resolution compared to an image (for example, the image shown in FIG. 8B) when performing the simultaneous writing operation every two lines in the writing period of all subfields. It is possible to improve and display an image of a smooth diagonal line on the panel 10.
 次に、平均コード変換部45について説明する。 Next, the average code conversion unit 45 will be described.
 図9は、本発明の一実施の形態における画像表示装置30の平均コード変換部45を構成する回路ブロックの一例を概略的に示す図である。 FIG. 9 is a diagram schematically showing an example of a circuit block constituting the average code conversion unit 45 of the image display device 30 according to the embodiment of the present invention.
 平均コード変換部45は、属性検出部49、基底コード生成部50、ルール生成部61、上下コード生成部70、および平均コード選択部80を有する。 The average code conversion unit 45 includes an attribute detection unit 49, a base code generation unit 50, a rule generation unit 61, an upper and lower code generation unit 70, and an average code selection unit 80.
 属性検出部49は、画像信号とその画像信号を表示する画素の位置との関係を特定する。また、各画素に対応する画像信号の時間微分(同一画素に関して、現フィールドと次フィールドとの間で画像信号の変化を検出すること)によって、各画素が動画領域にあるのか、静止画領域にあるのかの検出を行う。また、画像信号の空間微分(隣接する画素間で画像信号の変化を検出すること)によって明るさの変化を検出し、各画素が画像の輪郭部にあたるのかどうかの検出を行う。そして、それらの検出結果を各画素に対応する画像信号の属性として出力する。 The attribute detection unit 49 specifies the relationship between the image signal and the position of the pixel displaying the image signal. In addition, the time differentiation of the image signal corresponding to each pixel (detecting a change in the image signal between the current field and the next field with respect to the same pixel) determines whether each pixel is in the moving image area or the still image area. Detect if there is any. Further, a change in brightness is detected by spatial differentiation of the image signal (detecting a change in the image signal between adjacent pixels), and it is detected whether or not each pixel corresponds to the contour portion of the image. Then, those detection results are output as attributes of the image signal corresponding to each pixel.
 本実施の形態では、以降の信号処理において基本となるサブフィールドコードを「基底コード」と呼称し、基底コードから成るコードセットを「基底コードセット」と呼称する。基底コードは、階調重みの小さいサブフィールドから順に1つずつまたは2つずつ点灯させて生成したサブフィールドコードである。したがって、基底コードは、発光するサブフィールドのうち最も階調重みが大きいサブフィールドと、そのサブフィールドよりも小さい階調重みを有する全てのサブフィールドが発光するサブフィールドコードである。 In the present embodiment, a subfield code that is basic in subsequent signal processing is referred to as a “basic code”, and a code set including the base code is referred to as a “basic code set”. The base code is a subfield code generated by lighting one by one or two in order from the subfield having the smallest gradation weight. Therefore, the base code is a subfield code in which a subfield having the largest gradation weight among the subfields to emit light and all subfields having a gradation weight smaller than that subfield emit light.
 また、本実施の形態では、基底コードセットにもとづき「削除済み基底コード」を設定する。削除済み基底コードは、基底コードの点灯サブフィールドのうち、2ライン差分部43の出力により決定される所定のサブフィールドを非点灯サブフィールドとしたサブフィールドコードである。以下、基底コードセットの点灯サブフィールドのうち、2ライン差分部43の出力により決定される所定のサブフィールドを非点灯サブフィールドとしたサブフィールドコードセットを「削除済み基底コードセット」と呼称する。 In this embodiment, “deleted base code” is set based on the base code set. The deleted base code is a subfield code in which a predetermined subfield determined by the output of the two-line difference unit 43 among the lighting subfields of the base code is a non-lighting subfield. Hereinafter, among the lighting subfields of the base code set, a subfield code set in which a predetermined subfield determined by the output of the two-line difference unit 43 is a non-lighting subfield is referred to as a “deleted base code set”.
 そして、基底コード生成部50は、減算部44から出力される画像信号の階調値(以下、「入力階調」と呼称する)にもとづき、基底コードセットまたは削除済み基底コードセットの中から「上階調基底コード」を選択する。上階調基底コードは、入力階調よりも大きい階調値であり、かつ入力階調に最も近い階調値を有する基底コードまたは削除済み基底コードである。 Then, the base code generation unit 50 selects “base code set” or “deleted base code set” based on the tone value of the image signal output from the subtraction unit 44 (hereinafter referred to as “input tone”). Select "Upper gradation basis code". The upper tone base code is a base code or a deleted base code having a tone value larger than the input tone and having a tone value closest to the input tone.
 このように、基底コード生成部50は、基底コードセットの中で入力階調よりも大きく、かつ入力階調に最も近い階調値を有する基底コードを上階調基底コードとして選択し、それを出力する。または、基底コード生成部50は、削除済み基底コードセットの中で入力階調よりも大きく、かつ入力階調に最も近い階調値を有する削除済み基底コードを上階調基底コードとして選択し、それを出力する。 As described above, the base code generation unit 50 selects a base code having a gradation value larger than the input gradation and closest to the input gradation in the base code set as the upper gradation base code, Output. Alternatively, the base code generation unit 50 selects a deleted base code having a gradation value larger than the input gradation and closest to the input gradation as the upper gradation base code in the deleted base code set, Output it.
 以下、基底コードセットおよび削除済み基底コードセットの一例を図面を用いて説明する。 Hereinafter, an example of the base code set and the deleted base code set will be described with reference to the drawings.
 図10Aは、本発明の一実施の形態における画像表示装置30に用いる基底コードセットの一例を示す図である。 FIG. 10A is a diagram illustrating an example of a base code set used in the image display device 30 according to an embodiment of the present invention.
 図10Bは、本発明の一実施の形態における画像表示装置30に用いる削除済み基底コードセットの一例を示す図である。 FIG. 10B is a diagram showing an example of a deleted base code set used in the image display device 30 according to the embodiment of the present invention.
 図10A、図10Bに示すコードセットには、発光するサブフィールドを「1」、非発光のサブフィールドを空欄で示し、左から2番目の列には、各サブフィールドコード(基底コードまたは削除済み基底コード)において表示する階調値を表す。また、各コードセットにおいて各サブフィールドを示す表記の直下に記された数値は、各サブフィールドの階調重みを表す。 In the code sets shown in FIGS. 10A and 10B, the light-emitting subfield is “1”, the non-light-emitting subfield is blank, and each subfield code (base code or deleted) is displayed in the second column from the left. Represents a gradation value to be displayed in (base code). Further, the numerical value written immediately below the notation indicating each subfield in each code set represents the gradation weight of each subfield.
 図10Aは、2ライン差分部43の出力が「0」のときに用いる基底コードセットである。図10Aに示す基底コードセットは、1フィールドを5個のサブフィールドで構成し、各サブフィールドは、サブフィールドSF1から順に、それぞれ「1」、「10」、「6」、「3」、「2」の階調重みを有する。 FIG. 10A shows a base code set used when the output of the 2-line difference unit 43 is “0”. In the base code set shown in FIG. 10A, one field is composed of five subfields, and each subfield is “1”, “10”, “6”, “3”, “3” in order from the subfield SF1. 2 "gradation weight.
 図10Aに示す基底コードセットでは、1フィールドの先頭サブフィールド(サブフィールドSF1)を階調重みが最も小さいサブフィールドにし、2番目のサブフィールド(サブフィールドSF2)を階調重みが最も大きいサブフィールドにし、それ以降は、順次階調重みが小さくなるように各サブフィールドを配列する。そして、階調重みが最も小さいサブフィールドから順に1つずつ点灯サブフィールドとする。したがってこの基底コードセットに含まれる基底コードの数は、(1フィールドを構成するサブフィールドの数+1)である。例えば、図10Aに示す基底コードセットの例では、基底コードの数は6となる。 In the base code set shown in FIG. 10A, the first subfield (subfield SF1) of one field is the subfield having the smallest gradation weight, and the second subfield (subfield SF2) is the subfield having the largest gradation weight. After that, the subfields are arranged so that the gradation weights are sequentially reduced. And it is set as a lighting subfield one by one in an order from the subfield with the smallest gradation weight. Therefore, the number of base codes included in this base code set is (the number of subfields constituting one field + 1). For example, in the example of the base code set shown in FIG. 10A, the number of base codes is 6.
 図10Bは、2ライン差分部43の出力が「1」または「-1」のときに用いる削除済み基底コードセットである。図10Bに示す削除済み基底コードセットは、図10Aに示した基底コードセットから、2ライン差分部43の出力により決定される所定のサブフィールドを非点灯サブフィールドにして生成したサブフィールドコードセットである。 FIG. 10B shows a deleted base code set used when the output of the 2-line difference unit 43 is “1” or “−1”. The deleted base code set shown in FIG. 10B is a subfield code set generated from the base code set shown in FIG. 10A with a predetermined subfield determined by the output of the two-line difference unit 43 as a non-lighting subfield. is there.
 本実施の形態では、この所定のサブフィールドを第1種サブフィールド(本実施の形態では、サブフィールドSF2)とする。したがって、図10Bに示す削除済み基底コードセットは、図10Aに示した基底コードセットからサブフィールドSF2を非点灯サブフィールドとしたサブフィールドコードセットとなる。 In the present embodiment, this predetermined subfield is a first type subfield (in this embodiment, subfield SF2). Therefore, the deleted base code set shown in FIG. 10B is a subfield code set in which the subfield SF2 is a non-lighting subfield from the base code set shown in FIG. 10A.
 なお、本実施の形態において、サブフィールドSF2は最も階調重みの大きいサブフィールドである。したがって、図10Bに示した削除済み基底コードセットは、図10Aに示した基底コードセットから階調値「22」の基底コード「11111」を除いたコードセットに等しい。 In the present embodiment, the subfield SF2 is a subfield having the largest gradation weight. Therefore, the deleted base code set shown in FIG. 10B is equal to the code set obtained by removing the base code “11111” having the gradation value “22” from the base code set shown in FIG. 10A.
 本実施の形態における画像表示装置30は、以上のようなコードセットにもとづき新たなコードセットを生成し、そのコードセットを用いて入力階調をサブフィールドコードに変換する。 The image display device 30 in the present embodiment generates a new code set based on the code set as described above, and converts the input gradation into a subfield code using the code set.
 基底コード生成部50は、基底コードセット選択部52および基底コード選択部54を有する。 The base code generation unit 50 includes a base code set selection unit 52 and a base code selection unit 54.
 基底コードセット選択部52は、基底コードセットおよび基底コードセットを構成する複数の基底コードの各階調値を記憶する。また、基底コードセット選択部52は、削除済み基底コードセットおよび削除済み基底コードセットを構成する複数の削除済み基底コードの各階調値を記憶する。各基底コードと、基底コードの各階調値とは互いに関連付けされて基底コードセット選択部52に記憶される。この基底コードセットは、例えば図10Aに示した基底コードセットである。また、各削除済み基底コードと、削除済み基底コードの各階調値とは互いに関連付けされて基底コードセット選択部52に記憶される。この削除済み基底コードセットは、例えば図10Bに示した削除済み基底コードセットである。 The base code set selection unit 52 stores the base code set and gradation values of a plurality of base codes constituting the base code set. In addition, the base code set selection unit 52 stores the gradation values of the deleted base code set and the plurality of deleted base codes constituting the deleted base code set. Each base code and each gradation value of the base code are stored in the base code set selection unit 52 in association with each other. This base code set is, for example, the base code set shown in FIG. 10A. Each deleted base code and each gradation value of the deleted base code are stored in the base code set selection unit 52 in association with each other. This deleted base code set is, for example, the deleted base code set shown in FIG. 10B.
 そして、基底コードセット選択部52は、2ライン差分部43の出力が「0」であれば、基底コードセット(例えば、図10Aに示した基底コードセット)を選択し、2ライン差分部43の出力が「1」または「-1」であれば、削除済み基底コードセット(例えば、図10Bに示した削除済み基底コードセット)を選択する。 If the output of the two-line difference unit 43 is “0”, the base code set selection unit 52 selects a base code set (for example, the base code set shown in FIG. If the output is “1” or “−1”, the deleted base code set (for example, the deleted base code set shown in FIG. 10B) is selected.
 基底コード選択部54は、基底コードセット選択部52によって選択された方のコードセットを構成するサブフィールドコード(基底コードセットを構成する基底コード、または、削除済み基底コードセットを構成する削除済み基底コード)の各階調値と入力階調とを比較する。そして、入力階調より大きく、かつ入力階調に最も近い階調値を有するサブフィールドコード(基底コードまたは削除済み基底コード)を選択する。そして、選択したサブフィールドコードを上階調基底コードとして出力する。 The base code selection unit 54 includes a subfield code (a base code constituting the base code set or a deleted base code constituting the deleted base code set) constituting the code set selected by the base code set selection unit 52. Code) and the input gradation are compared. Then, a subfield code (base code or deleted base code) having a gradation value larger than the input gradation and closest to the input gradation is selected. Then, the selected subfield code is output as the upper gradation base code.
 このように、基底コード生成部50は、入力階調よりも大きく、かつ入力階調に最も近い階調値を有する基底コード(または、削除済み基底コード)を選択し、それを上階調基底コードとして出力する。 As described above, the base code generation unit 50 selects a base code (or a deleted base code) having a gradation value larger than the input gradation and closest to the input gradation, and uses the selected base code as the upper gradation base. Output as code.
 本実施の形態では、減算部44から出力される画像信号にもとづき、上階調基底コードにおける点灯サブフィールドを非点灯サブフィールドに変更することで、基底コードセットに含まれない新たなサブフィールドコードを生成する。ルール生成部61では、この新たなサブフィールドコードを生成するためのルールを生成する。 In the present embodiment, a new subfield code not included in the base code set is obtained by changing the lighting subfield in the upper gradation base code to the non-lighting subfield based on the image signal output from the subtracting unit 44. Is generated. The rule generation unit 61 generates a rule for generating this new subfield code.
 すなわち、ルール生成部61は、画像の表示に用いるサブフィールドコードの数を増やすために、減算部44から出力される画像信号、および属性検出部49において検出された属性(画像信号に付随する属性)にもとづき、基底コード生成部50において選択された上階調基底コードにおける点灯サブフィールドを非点灯サブフィールドに変更するときのルールを生成する。 That is, the rule generation unit 61 increases the number of subfield codes used for image display, the image signal output from the subtraction unit 44, and the attribute detected by the attribute detection unit 49 (the attribute associated with the image signal). ) To generate a rule for changing the lighting subfield in the upper gradation base code selected by the base code generation unit 50 to the non-lighting subfield.
 言い換えると、本実施の形態においてルール生成部61で生成されるルールは、上階調基底コードにおける点灯サブフィールドを非点灯サブフィールドに変更する法則を規定したものである。 In other words, in the present embodiment, the rule generated by the rule generation unit 61 defines a rule for changing the lighting subfield in the upper gradation base code to the non-lighting subfield.
 ルール生成部61で生成するルールでは、上階調基底コードにおいて点灯から非点灯に変更するサブフィールドを制限する。これは、上階調基底コードにおいて点灯サブフィールドを非点灯サブフィールドに変更して作成した新たなサブフィールドコードの階調値が、その上階調基底コードよりも小さい基底コード(または削除済み基底コード)の階調値を下回らないようにするためである。 The rule generated by the rule generation unit 61 restricts subfields to be changed from lighting to non-lighting in the upper gradation base code. This is because the gradation value of the new subfield code created by changing the lighting subfield to the non-lighting subfield in the upper gradation basis code is smaller than the upper gradation basis code (or the deleted basis). This is so that it does not fall below the gradation value of (code).
 例えば、上階調基底コードにおいて点灯から非点灯に変更するサブフィールドを無制限に許可すると、全ての点灯サブフィールドが非点灯サブフィールドとなり、階調値が「0」となるサブフィールドコードが生成されることもあり得るためである。 For example, if the upper gradation base code allows unlimited subfields to change from lighting to non-lighting, all lighting subfields become non-lighting subfields, and subfield codes with a gradation value of “0” are generated. This is because there is a possibility that it may occur.
 ルール生成部61においては、ルールにもとづき生成されるサブフィールドコードが次の階調値を有するようにルールを生成する。
1)上階調基底コードの階調値以下の階調値。
2)下階調基底コードの階調値以上の階調値。
なお、「下階調基底コード」とは、入力階調以下であり、かつ入力階調に最も近い階調値を有する基底コード(または、削除済み基底コード)のことである。
The rule generation unit 61 generates a rule so that the subfield code generated based on the rule has the next gradation value.
1) A gradation value equal to or lower than the gradation value of the upper gradation base code.
2) A gradation value equal to or higher than the gradation value of the lower gradation base code.
The “lower gradation base code” is a base code (or a deleted base code) having a gradation value that is equal to or lower than the input gradation and closest to the input gradation.
 具体的には、ルール生成部61で生成されるルールは、次の3つのルールのうちの1つもしくは複数から成る。
1)点灯サブフィールドから非点灯サブフィールドに変更する1つ目のサブフィールドを設定するときのルール。
2)点灯サブフィールドから非点灯サブフィールドに変更する2つ目のサブフィールドを設定するときのルール。
3)非点灯となることを禁止するサブフィールドを設定するときのルール。
Specifically, the rule generated by the rule generation unit 61 is composed of one or more of the following three rules.
1) A rule for setting the first subfield to be changed from the lighting subfield to the non-lighting subfield.
2) A rule for setting the second subfield to be changed from the lighting subfield to the non-lighting subfield.
3) A rule for setting a sub-field that prohibits non-lighting.
 上下コード生成部70は、基底コード生成部50から出力される上階調基底コードに、ルール生成部61で生成したルールを適用して、上階調コードと下階調コードとを生成する。 The upper / lower code generation unit 70 applies the rule generated by the rule generation unit 61 to the upper gradation base code output from the base code generation unit 50 to generate an upper gradation code and a lower gradation code.
 上階調コードとは、ルール生成部61で生成したルールにもとづいて新たに生成することができるサブフィールドコードの中で、入力階調より大きくかつ入力階調に最も近い階調値を有するサブフィールドコードのことである。 The upper gradation code is a sub-field code that can be newly generated based on the rule generated by the rule generation unit 61 and has a gradation value larger than the input gradation and closest to the input gradation. It is a field code.
 下階調コードとは、ルール生成部61で生成したルールにもとづいて新たに生成することができるサブフィールドコードの中で、入力階調以下でありかつ入力階調に最も近い階調値を有するサブフィールドコードのことである。 The lower gradation code has a gradation value that is equal to or lower than the input gradation and closest to the input gradation among subfield codes that can be newly generated based on the rule generated by the rule generation unit 61. It is a subfield code.
 上下コード生成部70は、中間コード生成部72、および上下コード選択部74を有する。 The upper / lower code generation unit 70 includes an intermediate code generation unit 72 and an upper / lower code selection unit 74.
 中間コード生成部72は、ルール生成部61において生成されたルールにもとづき、上階調基底コードにおける点灯サブフィールドを非点灯サブフィールドに変更して新たなサブフィールドコードを生成する。以下、新たに生成されたサブフィールドコードを「中間コード」と呼称する。また、それらの中間コードに元の上階調基底コードを加えた集合を「中間コードセット」と呼称する。 Based on the rules generated by the rule generation unit 61, the intermediate code generation unit 72 changes the lighting subfield in the upper gradation base code to the non-lighting subfield and generates a new subfield code. Hereinafter, the newly generated subfield code is referred to as “intermediate code”. A set obtained by adding the original upper tone base code to these intermediate codes is referred to as an “intermediate code set”.
 以下、中間コードの一例を図面を用いて説明する。 Hereinafter, an example of the intermediate code will be described with reference to the drawings.
 図11Aは、本発明の一実施の形態における画像表示装置30の中間コード生成部72において生成される中間コードセットの一例を示す図である。 FIG. 11A is a diagram illustrating an example of an intermediate code set generated by the intermediate code generation unit 72 of the image display device 30 according to the embodiment of the present invention.
 図11Bは、本発明の一実施の形態における画像表示装置30の中間コード生成部72において生成される中間コードセットの他の一例を示す図である。 FIG. 11B is a diagram illustrating another example of the intermediate code set generated by the intermediate code generation unit 72 of the image display device 30 according to the embodiment of the present invention.
 図11Cは、本発明の一実施の形態における画像表示装置30の中間コード生成部72において生成される中間コードセットの他の一例を示す図である。 FIG. 11C is a diagram illustrating another example of the intermediate code set generated by the intermediate code generation unit 72 of the image display device 30 according to the embodiment of the present invention.
 図11A、図11B、図11Cに示す中間コードセットには、発光するサブフィールドを「1」、非発光のサブフィールドを空欄で示し、左から2番目の列には、各サブフィールドコード(中間コード)において表示する階調値を表す。また、各中間コードセットにおいて各サブフィールドを示す表記の直下に記された数値は、各サブフィールドの階調重みを表す。 In the intermediate code sets shown in FIGS. 11A, 11B, and 11C, the light emitting subfield is indicated by “1”, the non-light emitting subfield is indicated by a blank, and each subfield code (intermediate) is indicated in the second column from the left. Code) represents the gradation value to be displayed. Also, the numerical value written immediately below the notation indicating each subfield in each intermediate code set represents the gradation weight of each subfield.
 図11A、図11B、図11Cに示す中間コードセットは、1フィールドを5個のサブフィールドで構成し、各サブフィールドは、サブフィールドSF1から順に、それぞれ「1」、「10」、「6」、「3」、「2」の階調重みを有する。 In the intermediate code set shown in FIGS. 11A, 11B, and 11C, one field includes five subfields, and each subfield is “1”, “10”, and “6” in order from the subfield SF1. , “3” and “2”.
 図11Aには、中間コードセットの一例として、上述した「1)点灯サブフィールドから非点灯サブフィールドに変更する1つ目のサブフィールドを設定するときのルール」を、図10Aおよび図10Bに示した階調値「12」の基底コード(または、削除済み基底コード)「10111」に適用して生成した中間コードセットを示す。 In FIG. 11A, as an example of the intermediate code set, “1) Rules for setting the first subfield to be changed from the lighting subfield to the non-lighting subfield” are shown in FIGS. 10A and 10B. The intermediate code set generated by applying to the base code (or deleted base code) “10111” having the gradation value “12” is shown.
 この「1)点灯サブフィールドから非点灯サブフィールドに変更する1つ目のサブフィールドを設定するときのルール」は、「点灯サブフィールドのいずれか1つを非点灯サブフィールドに変更する」というルール(以下、「ルール1」と記す)である。 This “1) rule for setting the first subfield to be changed from a lighting subfield to a non-lighting subfield” is a rule that “one of the lighting subfields is changed to a non-lighting subfield”. (Hereinafter referred to as “rule 1”).
 図10A(または、図10B)に示した階調値「12」の基底コード「10111」(No.5)では、サブフィールドSF1、およびサブフィールドSF3からサブフィールドSF5までの4つのサブフィールドが点灯サブフィールドとなる。 In the base code “10111” (No. 5) of the gradation value “12” shown in FIG. 10A (or FIG. 10B), the subfield SF1 and four subfields from the subfield SF3 to the subfield SF5 are lit. It becomes a subfield.
 したがって、ルール1にもとづき、これら4つの点灯サブフィールドのいずれか1つを非点灯サブフィールドに変更することによって、図11Aに示すように、4個のサブフィールドコード、「00111」、「10110」、「10101」、「10011」を生成することができる。 Therefore, by changing any one of these four lighting subfields to a non-lighting subfield based on Rule 1, as shown in FIG. 11A, four subfield codes, “00111”, “10110” , “10101”, “10011” can be generated.
 ただし、サブフィールドSF3を非点灯サブフィールドに変更したサブフィールドコード「10011」は、図10A(または図10B)に示した階調値「6」の基底コード(または削除済み基底コード)(No.4)に等しい。したがって、サブフィールドコード「10011」を除く3個のサブフィールドコードが新たに生成された中間コードとなる。 However, the subfield code “10011” obtained by changing the subfield SF3 to the non-lighting subfield is the base code (or the deleted base code) of the gradation value “6” shown in FIG. 10A (or FIG. 10B) (No. It is equal to 4). Accordingly, three subfield codes excluding the subfield code “10011” are newly generated intermediate codes.
 すなわち、上述したルール1を、図10Aに示した階調値「12」の基底コード(または、図10Bに示した階調値「12」の削除済み基底コード)「10111」に適用すれば、新たに3個のサブフィールドコードを中間コードとして生成することができる。 That is, if the rule 1 described above is applied to the base code of the gradation value “12” shown in FIG. 10A (or the deleted base code of the gradation value “12” shown in FIG. 10B) “10111”, Three new subfield codes can be generated as intermediate codes.
 図11Bには、中間コードセットの一例として、上述したルール1に加え、「2)点灯サブフィールドから非点灯サブフィールドに変更する2つ目のサブフィールドを設定するときのルール」を、図10Aに示した階調値「12」の基底コード(または、図10Bに示した階調値「12」の削除済み基底コード)「10111」に適用して生成した中間コードセットを示す。 In FIG. 11B, as an example of the intermediate code set, in addition to the above-described rule 1, “2) a rule for setting the second subfield to be changed from the lighting subfield to the non-lighting subfield” is shown in FIG. The intermediate code set generated by applying to the base code of the gradation value “12” shown in FIG. 10 (or the deleted base code of the gradation value “12” shown in FIG. 10B) “10111”.
 この「2)点灯サブフィールドから非点灯サブフィールドに変更する2つ目のサブフィールドを設定するときのルール」は、「新たに生成された中間コードのうち階調値が最も小さいサブフィールドコードのサブフィールドSF5を非点灯サブフィールドにする」というルール(以下、「ルール2」と記す)である。 This “2) Rule for setting the second subfield to be changed from the lighting subfield to the non-lighting subfield” is “the subfield code having the smallest gradation value among the newly generated intermediate codes”. The sub-field SF5 is a non-lighting sub-field ”(hereinafter referred to as“ rule 2 ”).
 図10Aに示した階調値「12」の基底コード(または、図10Bに示した階調値「12」の削除済み基底コード)「10111」(No.5)にルール1を適用することで、図11Aに示したように、新たに3個のサブフィールドコードが生成される。これら3個のサブフィールドコードのうち「新たに生成された中間コードのうち階調値が最も小さいサブフィールドコード」は、階調値「9」のサブフィールドコード「10101」である。 By applying rule 1 to the base code of gradation value “12” shown in FIG. 10A (or the deleted base code of gradation value “12” shown in FIG. 10B) “10111” (No. 5). As shown in FIG. 11A, three new subfield codes are generated. Of these three subfield codes, the “subfield code with the smallest gradation value among the newly generated intermediate codes” is the subfield code “10101” with the gradation value “9”.
 したがって、ルール2にもとづき、階調値「9」のサブフィールドコードのサブフィールドSF5を非点灯サブフィールドに変更することによって、図11Bに示すように、新たに階調値「7」のサブフィールドコード「10100」を生成することができる。 Therefore, by changing the subfield SF5 of the subfield code of the gradation value “9” to the non-lighting subfield based on the rule 2, as shown in FIG. 11B, a new subfield of the gradation value “7” is obtained. The code “10100” can be generated.
 すなわち、上述したルール1およびルール2を、図10Aに示した階調値「12」の基底コード(または、図10Bに示した階調値「12」の削除済み基底コード)「10111」に適用すれば、新たに4個のサブフィールドコードを中間コードとして生成することができる。 That is, the above-described rule 1 and rule 2 are applied to the base code of the gradation value “12” shown in FIG. 10A (or the deleted base code of the gradation value “12” shown in FIG. 10B) “10111”. Then, four new subfield codes can be generated as intermediate codes.
 図9Cには、中間コードセットの一例として、上述したルール1に加え、「3)非点灯となることを禁止するサブフィールドを設定するときのルール」を、図10Aに示した階調値「12」の基底コード(または、図10Bに示した階調値「12」の削除済み基底コード)「10111」に適用して生成した中間コードセットを示す。 In FIG. 9C, as an example of the intermediate code set, in addition to the above-described rule 1, “3) a rule for setting a subfield that prohibits non-lighting” is shown in the gradation value “ The intermediate code set generated by applying to the base code of “12” (or the deleted base code of the gradation value “12” shown in FIG. 10B) “10111” is shown.
 この「3)非点灯となることを禁止するサブフィールドを設定するときのルール」は、「サブフィールドSF1を非点灯サブフィールドにすることを禁止する」というルール(以下、「ルール3」と記す)である。 This “3) rule for setting a subfield that prohibits non-lighting” is a rule that “subfield SF1 is prohibited from being a non-lighting subfield” (hereinafter referred to as “rule 3”). ).
 図10Aに示した階調値「12」の基底コード(または、図10Bに示した階調値「12」の削除済み基底コード)「10111」(No.5)にルール1を適用することで、図11Aに示したように、新たに3個のサブフィールドコードが生成される。これら3個のサブフィールドコードのうち「サブフィールドSF1が非点灯サブフィールドであるサブフィールドコード」は、階調値「11」のサブフィールドコード「00111」である。 By applying rule 1 to the base code of gradation value “12” shown in FIG. 10A (or the deleted base code of gradation value “12” shown in FIG. 10B) “10111” (No. 5). As shown in FIG. 11A, three new subfield codes are generated. Of these three subfield codes, the “subfield code whose subfield SF1 is a non-lighting subfield” is a subfield code “00111” having a gradation value of “11”.
 したがって、ルール3にもとづくことで、階調値「11」のサブフィールドコードは、中間コードセットから除外される。 Therefore, based on rule 3, the subfield code having the gradation value “11” is excluded from the intermediate code set.
 すなわち、上述したルール1およびルール3を、図10Aに示した階調値「12」の基底コード(または、図10Bに示した階調値「12」の削除済み基底コード)「10111」に適用すれば、新たに2個のサブフィールドコードを中間コードとして生成することができる。 That is, rule 1 and rule 3 described above are applied to the base code of the gradation value “12” shown in FIG. 10A (or the deleted base code of the gradation value “12” shown in FIG. 10B) “10111”. Then, two new subfield codes can be generated as intermediate codes.
 このように、中間コード生成部72は、基底コード生成部50から出力される上階調基底コードに、ルール生成部61で生成されたルールを適用して、中間コードを生成し、中間コードセットを生成する。 As described above, the intermediate code generation unit 72 applies the rule generated by the rule generation unit 61 to the upper gradation base code output from the base code generation unit 50 to generate an intermediate code, and the intermediate code set Is generated.
 なお、以下では、中間コードを生成する際にルール1とルール3を用いる例を説明するが、中間コードの生成数を増やしたいときには、中間コードを生成する際にルール2を追加すればよい。例えば、画像表示装置30において、消費電力が比較的少ない画像が表示されるときや、動画擬似輪郭の発生が比較的少ない画像が表示されるとき等は、中間コードの生成数を増やすことが可能である。そして、中間コードの生成数を増やすことで、より滑らかな階調の変化で画像を表示することができる。 In the following, an example in which rule 1 and rule 3 are used when generating intermediate code will be described. However, if the number of intermediate codes to be generated is increased, rule 2 may be added when generating intermediate code. For example, when the image display device 30 displays an image with relatively low power consumption, or when an image with relatively little occurrence of moving image pseudo contour is displayed, the number of intermediate codes generated can be increased. It is. Then, by increasing the number of intermediate codes generated, an image can be displayed with a smoother gradation change.
 上下コード選択部74は、中間コード生成部72で生成した中間コードセットを構成するサブフィールドコードの各階調値と、入力階調とを比較する。そして、上下コード選択部74は、入力階調より大きく、かつ入力階調に最も近い階調値を有するサブフィールドコードを選択し、それを上階調コードとして出力する。また、上下コード選択部74は、入力階調以下で、かつ入力階調に最も近い階調値を有するサブフィールドコードを選択し、それを下階調コードとして出力する。 The upper / lower code selection unit 74 compares each gradation value of the subfield code constituting the intermediate code set generated by the intermediate code generation unit 72 with the input gradation. Then, the upper / lower code selection unit 74 selects a subfield code having a gradation value larger than the input gradation and closest to the input gradation, and outputs it as an upper gradation code. In addition, the upper / lower code selection unit 74 selects a subfield code having a gradation value equal to or lower than the input gradation and closest to the input gradation, and outputs it as a lower gradation code.
 平均コード選択部80は、入力階調に所定の値を加算して、注目画素対に表示すべき階調値を算出する。そして、平均コード選択部80は、上階調コードおよび下階調コードのうち、注目画素対に表示すべき階調値により近い階調値を有する方を選択し、それを出力する。 The average code selection unit 80 adds a predetermined value to the input gradation and calculates a gradation value to be displayed on the pixel pair of interest. Then, the average code selection unit 80 selects one of the upper gradation code and the lower gradation code that has a gradation value closer to the gradation value to be displayed on the target pixel pair, and outputs it.
 なお、注目画素対とは、その時点で階調値の演算の対象となっている1対の画素のことである。 Note that the pixel-of-interest pair is a pair of pixels that are the targets of gradation value calculation at that time.
 本実施の形態において、入力階調に加算する上述した所定の値は、誤差拡散処理により拡散される誤差およびディザ処理により算出されるディザ値である。したがって、平均コード選択部80は、入力階調に、誤差およびディザ値を加算して、注目画素対に表示すべき階調値を算出し、上階調コードおよび下階調コードのうち、注目画素対に表示すべき階調値により近い階調値を有する方を選択する。 In the present embodiment, the above-described predetermined value added to the input gradation is an error diffused by the error diffusion process and a dither value calculated by the dither process. Therefore, the average code selection unit 80 adds the error and the dither value to the input gradation, calculates the gradation value to be displayed on the pixel pair of interest, and selects the attention value of the upper gradation code and the lower gradation code. The one having a gradation value closer to the gradation value to be displayed on the pixel pair is selected.
 さらに、平均コード選択部80は、注目画素対に表示すべき階調値と選択した階調値との差を算出し、その差を誤差として周辺画素に拡散する。 Furthermore, the average code selection unit 80 calculates the difference between the gradation value to be displayed on the target pixel pair and the selected gradation value, and diffuses the difference as an error to surrounding pixels.
 平均コード選択部80は、ディザ選択部82、誤差拡散部84、および平均コード決定部86を有する。 The average code selection unit 80 includes a dither selection unit 82, an error diffusion unit 84, and an average code determination unit 86.
 ディザ選択部82は、複数のディザパターンを記憶している。そして、記憶している複数のディザパターンの中から、減算部44から出力される画像信号(以下、単に「画像信号」と記す)および属性検出部49において検出された属性にもとづき1つのディザパターンを選択する。 The dither selection unit 82 stores a plurality of dither patterns. Then, one dither pattern based on the image signal output from the subtraction unit 44 (hereinafter simply referred to as “image signal”) and the attribute detected by the attribute detection unit 49 from among the plurality of stored dither patterns. Select.
 また、ディザ選択部82は、その画像信号を表示する画素の位置にもとづき、選択したディザパターンから、その画素の位置に対応するディザ要素を選択する。さらに、ディザ選択部82は、選択したディザ要素に、上階調コードの階調値と下階調コードの階調値との差分を乗算してディザ値を算出する。 Also, the dither selection unit 82 selects a dither element corresponding to the position of the pixel from the selected dither pattern based on the position of the pixel displaying the image signal. Further, the dither selection unit 82 calculates the dither value by multiplying the selected dither element by the difference between the gradation value of the upper gradation code and the gradation value of the lower gradation code.
 なお、本実施の形態においては、第2種サブフィールドで同時に書込み動作を行う1対の画素のそれぞれには同じディザ要素が与えられる。 In the present embodiment, the same dither element is given to each of a pair of pixels that simultaneously perform the write operation in the second type subfield.
 これらの動作の一例を、図面を用いて説明する。 An example of these operations will be described with reference to the drawings.
 図12Aは、本発明の一実施の形態における画像表示装置30で使用するディザパターンの一例を示す図である。 FIG. 12A is a diagram showing an example of a dither pattern used in the image display device 30 according to the embodiment of the present invention.
 図12Bは、本発明の一実施の形態における画像表示装置30で使用するディザパターンの他の一例を示す図である。 FIG. 12B is a diagram showing another example of the dither pattern used in the image display device 30 according to the embodiment of the present invention.
 なお、図12A、図12Bにおいて、1つの欄は1つの画素を表している。 In FIGS. 12A and 12B, one column represents one pixel.
 図12Aは最も単純な2値ディザを示した図であり、図12Aではディザ要素として「+0.25」と「-0.25」とが市松状に配列されている。また、図12Bは4値ディザの一例を示した図であり、図12Bでは2画素×2画素で構成された1つのブロックの各画素にディザ要素「+0.375」、「+0.125」、「-0.375」、および「-0.125」が配列されている。 FIG. 12A shows the simplest binary dither. In FIG. 12A, “+0.25” and “−0.25” are arranged in a checkered pattern as dither elements. FIG. 12B is a diagram showing an example of a quaternary dither. In FIG. 12B, dither elements “+0.375”, “+0.125”, “−0.375” and “−0.125” are arranged.
 誤差拡散部84は、注目画素対に加算するための誤差を平均コード決定部86に出力するとともに、平均コード決定部86から出力される誤差を注目画素対の周辺画素に拡散する。 The error diffusion unit 84 outputs an error to be added to the target pixel pair to the average code determination unit 86 and diffuses the error output from the average code determination unit 86 to the peripheral pixels of the target pixel pair.
 なお、誤差拡散部84では、第2種サブフィールドで同時に書込み動作を行う1対の画素のそれぞれには同じ誤差を拡散する。 Note that the error diffusion unit 84 diffuses the same error to each of a pair of pixels that simultaneously perform the write operation in the second type subfield.
 そして、ディザ選択部82は、例えば、図12A、図12Bに示した2種類のディザパターンを記憶し、画像信号および属性検出部49において検出された属性にもとづきいずれか一方のディザパターンを選択する。図12Aに示すディザパターンが選択されたときには、ディザ要素は「+0.25」および「-0.25」のいずれかであり、図12Bに示すディザパターンが選択されたときには、ディザ要素は「+0.375」、「+0.125」、「-0.375」、および「-0.125」のいずれかである。 Then, the dither selection unit 82 stores, for example, the two types of dither patterns shown in FIGS. 12A and 12B, and selects one of the dither patterns based on the attributes detected by the image signal and the attribute detection unit 49. . When the dither pattern shown in FIG. 12A is selected, the dither element is either “+0.25” or “−0.25”. When the dither pattern shown in FIG. 12B is selected, the dither element is “+0”. .375 ”,“ +0.125 ”,“ −0.375 ”, and“ −0.125 ”.
 そして、ディザ選択部82は、これらのディザ要素のいずれか1つを、画像信号を表示する画素の位置にもとづき選択する。さらに、選択したディザ要素に、上階調コードの階調値と下階調コードの階調値との差分を乗算してディザ値を算出する。そして、算出されたディザ値は、平均コード選択部80において、入力階調に加算される。 Then, the dither selection unit 82 selects any one of these dither elements based on the position of the pixel displaying the image signal. Further, the dither value is calculated by multiplying the selected dither element by the difference between the tone value of the upper tone code and the tone value of the lower tone code. Then, the calculated dither value is added to the input gradation in the average code selection unit 80.
 図13は、本発明の実施の形態における画像表示装置30の誤差拡散部84の誤差拡散係数を示す図である。 FIG. 13 is a diagram showing error diffusion coefficients of the error diffusion unit 84 of the image display device 30 according to the embodiment of the present invention.
 図13において、1つの欄は1つの画素を表している。そして、図13における中央の欄は誤差拡散処理の対象となる1対の画素(注目画素対)を表す。 In FIG. 13, one column represents one pixel. The middle column in FIG. 13 represents a pair of pixels (target pixel pair) that are to be subjected to error diffusion processing.
 誤差拡散部84は、注目画素対に、注目画素対の左上に配置された1対の画素で発生した誤差に拡散係数k1を乗算した値を拡散(加算)する。また、誤差拡散部84は、注目画素対に、注目画素対の上に配置された1対の画素で発生した誤差に拡散係数k2を乗算した値を拡散(加算)する。また、誤差拡散部84は、注目画素対に、注目画素対の右上に配置された1対の画素で発生した誤差に拡散係数k3を乗算した値を拡散(加算)する。また、誤差拡散部84は、注目画素対に、注目画素対の左に配置された1対の画素で発生した誤差に拡散係数k4を乗算した値を拡散(加算)する。 The error diffusion unit 84 diffuses (adds) a value obtained by multiplying the error generated in the pair of pixels arranged at the upper left of the target pixel pair by the diffusion coefficient k1 to the target pixel pair. Further, the error diffusion unit 84 diffuses (adds) a value obtained by multiplying the error generated in the pair of pixels arranged on the target pixel pair by the diffusion coefficient k2 to the target pixel pair. Further, the error diffusion unit 84 diffuses (adds) a value obtained by multiplying the error generated in the pair of pixels arranged at the upper right of the target pixel pair by the diffusion coefficient k3 to the target pixel pair. Further, the error diffusion unit 84 diffuses (adds) a value obtained by multiplying an error generated in a pair of pixels arranged on the left of the target pixel pair by a diffusion coefficient k4.
 そして、誤差拡散部84は、注目画素対で発生した誤差に拡散係数k4を乗算した値を、注目画素対の右に配置された1対の画素に拡散(加算)する。また、誤差拡散部84は、注目画素対で発生した誤差に拡散係数k3を乗算した値を、注目画素対の左下に配置された1対の画素に拡散(加算)する。また、誤差拡散部84は、注目画素対で発生した誤差に拡散係数k2を乗算した値を、注目画素対の下に配置された1対の画素に拡散(加算)する。また、誤差拡散部84は、注目画素対で発生した誤差に拡散係数k1を乗算した値を、注目画素対の右下に配置された1対の画素に拡散(加算)する。 Then, the error diffusion unit 84 diffuses (adds) a value obtained by multiplying the error generated in the target pixel pair by the diffusion coefficient k4 to a pair of pixels arranged to the right of the target pixel pair. In addition, the error diffusion unit 84 diffuses (adds) a value obtained by multiplying the error generated in the target pixel pair by the diffusion coefficient k3 to a pair of pixels arranged at the lower left of the target pixel pair. Further, the error diffusion unit 84 diffuses (adds) a value obtained by multiplying the error generated in the target pixel pair by the diffusion coefficient k2 to a pair of pixels arranged below the target pixel pair. In addition, the error diffusion unit 84 diffuses (adds) a value obtained by multiplying the error generated in the target pixel pair by the diffusion coefficient k1 to a pair of pixels arranged at the lower right of the target pixel pair.
 本実施の形態において、各拡散係数は、k1=1/16、k2=4/16、k3=3/16、およびk4=8/16とする。または、k1=3/16、k2=4/16、k3=1/16、およびk4=8/16とする。本実施の形態では、どちらの拡散係数を選択するかを、乱数発生器(図示せず)によって発生する乱数を用いて決定している。 In this embodiment, the diffusion coefficients are k1 = 1/16, k2 = 4/16, k3 = 3/16, and k4 = 8/16. Alternatively, k1 = 3/16, k2 = 4/16, k3 = 1/16, and k4 = 8/16. In the present embodiment, which diffusion coefficient is selected is determined using a random number generated by a random number generator (not shown).
 平均コード決定部86は、入力階調、ディザ選択部82から出力されたディザ値、および誤差拡散部84から出力された誤差にもとづき、後段に出力するサブフィールドコードを、上階調コードまたは下階調コードのいずれかに決定する。 Based on the input tone, the dither value output from the dither selection unit 82, and the error output from the error diffusion unit 84, the average code determination unit 86 converts the subfield code output to the subsequent stage into the upper tone code or the lower tone code. Determine one of the gradation codes.
 具体的には、平均コード決定部86は、入力階調に、ディザ値および誤差を加算して、注目画素対に表示すべき階調値を算出する。そして、上階調コードおよび下階調コードのうち、注目画素対に表示すべき階調値により近い階調値を有する方を後段に出力するサブフィールドコードとして選択する。 Specifically, the average code determination unit 86 adds a dither value and an error to the input gradation, and calculates a gradation value to be displayed on the target pixel pair. Then, of the upper gradation code and the lower gradation code, the one having the gradation value closer to the gradation value to be displayed on the target pixel pair is selected as the subfield code to be output to the subsequent stage.
 そして、平均コード決定部86は、注目画素対に表示すべき階調値と、選択したサブフィールドコードの階調値との差分を算出し、その差分を、新しく発生した誤差として誤差拡散部84に出力する。 Then, the average code determination unit 86 calculates a difference between the gradation value to be displayed on the target pixel pair and the gradation value of the selected subfield code, and uses the difference as a newly generated error. Output to.
 次に、画像信号処理回路31の動作について説明する。なお、以下では、次の条件にもとづき画像信号処理回路31が動作するものとして、説明を行う。
1)コードセットとして、図10Bに示した削除済み基底コードセットを使用する。
2)図11Aの説明に用いたルールを使用する。すなわち「点灯サブフィールドのいずれか1つを非点灯サブフィールドに変更する」というルール1を使用する。
3)画像信号に付随する属性にもとづき、「非点灯となることを禁止するサブフィールドを設定するときのルール」(ルール3)をルール1に追加する。
Next, the operation of the image signal processing circuit 31 will be described. In the following description, it is assumed that the image signal processing circuit 31 operates based on the following conditions.
1) The deleted base code set shown in FIG. 10B is used as the code set.
2) The rules used in the description of FIG. 11A are used. That is, rule 1 “change any one of the lighting subfields to a non-lighting subfield” is used.
3) Based on the attribute accompanying the image signal, “Rule for setting sub-field forbidden to turn off” (rule 3) is added to rule 1.
 図14は、本発明の一実施の形態における画像表示装置30の画像信号処理回路31の動作を示すフローチャートである。 FIG. 14 is a flowchart showing the operation of the image signal processing circuit 31 of the image display device 30 according to the embodiment of the present invention.
 画像信号処理回路31は、次の一連のステップを実行する。 The image signal processing circuit 31 executes the following series of steps.
 (ステップS42)
2ライン平均部42は、pライン目の注目画素に対応する画像信号と(p+1)ライン目の注目画素に対応する画像信号との平均値を算出する。そして、その算出結果を、pライン目および(p+1)ライン目の注目画素対の平均画像信号として出力する。
(Step S42)
The 2-line averaging unit 42 calculates an average value of the image signal corresponding to the target pixel on the p-th line and the image signal corresponding to the target pixel on the (p + 1) -th line. Then, the calculation result is output as an average image signal of the target pixel pair on the p-th line and the (p + 1) -th line.
 例えば、pライン目の注目画素に対応する画像信号の階調値が「5」であり、(p+1)ライン目の注目画素に対応する画像信号の階調値が「18」であれば、2ライン平均部42は、pライン目および(p+1)ライン目の注目画素対の平均画像信号の階調値として「11.5」を出力する。 For example, if the tone value of the image signal corresponding to the target pixel of the p-th line is “5” and the tone value of the image signal corresponding to the target pixel of the (p + 1) -th line is “18”, 2 The line average unit 42 outputs “11.5” as the gradation value of the average image signal of the target pixel pair in the p-th line and the (p + 1) -th line.
 (ステップS43)
2ライン差分部43は、pライン目の注目画素に対応する画像信号から、(p+1)ライン目の注目画素に対応する画像信号を減算して差分値を算出する。そして、この差分値と階調閾値Wthとを比較し、その比較結果を出力する。
(Step S43)
The two-line difference unit 43 calculates a difference value by subtracting the image signal corresponding to the target pixel on the (p + 1) line from the image signal corresponding to the target pixel on the p-th line. Then, the difference value is compared with the gradation threshold value Wth, and the comparison result is output.
 すなわち、2ライン差分部43は、差分値が階調閾値Wth以上であれば、「1」を出力し、差分値が(-1)×(階調閾値Wth)以下であれば、「-1」を出力し、差分値が(-1)×(階調閾値Wth)よりも大きく、かつ階調閾値Wth未満であれば「0」を出力する。 That is, the two-line difference unit 43 outputs “1” if the difference value is equal to or greater than the gradation threshold Wth, and “−1” if the difference value is equal to or less than (−1) × (gradation threshold Wth). Is output, and if the difference value is larger than (−1) × (tone threshold Wth) and less than the tone threshold Wth, “0” is output.
 例えば、pライン目の注目画素に対応する画像信号が「5」であり、(p+1)ライン目の注目画素に対応する画像信号が「18」であれば、それらの差分値は「-13」となる。また、本実施の形態では、階調閾値Wthは、第1種サブフィールド(本実施の形態では、サブフィールドSF2)の階調重みに等しい数値とする。したがって、例えば、サブフィールドSF2の階調重みが「10」であれば、階調閾値Wthは「10」となる。このとき、差分値「-13」は(-1)×(階調閾値Wth)以下となる。したがって、2ライン差分部43は「-1」を出力する。 For example, if the image signal corresponding to the target pixel on the p-th line is “5” and the image signal corresponding to the target pixel on the (p + 1) -th line is “18”, the difference value between them is “−13”. It becomes. In the present embodiment, the gradation threshold value Wth is a numerical value equal to the gradation weight of the first type subfield (subfield SF2 in the present embodiment). Therefore, for example, if the gradation weight of the subfield SF2 is “10”, the gradation threshold value Wth is “10”. At this time, the difference value “−13” is equal to or less than (−1) × (tone threshold Wth). Therefore, the two-line difference unit 43 outputs “−1”.
 (ステップS44)
減算部44は、2ライン差分部43の出力が「1」または「-1」であれば、注目画素対の平均画像信号から1/2×階調閾値Wthを減算し、その結果をpライン目および(p+1)ライン目の注目画素対の画像信号として出力する。また、減算部44は、2ライン差分部43の出力が「0」であれば、注目画素対の平均画像信号をそのまま出力する。
(Step S44)
If the output of the two-line difference unit 43 is “1” or “−1”, the subtraction unit 44 subtracts ½ × tone threshold Wth from the average image signal of the target pixel pair, and the result is p-line It outputs as an image signal of the target pixel pair of the eye and the (p + 1) -th line. If the output of the two-line difference unit 43 is “0”, the subtracting unit 44 outputs the average image signal of the target pixel pair as it is.
 例えば、2ライン差分部43の出力が「-1」であり、階調閾値Wthが「10」であり、注目画素対の平均画像信号の階調値が「11.5」であれば、11.5-10/2=6.5となる。したがって、減算部44は、pライン目および(p+1)ライン目の注目画素対の階調値として「6.5」を出力する。 For example, if the output of the 2-line difference unit 43 is “−1”, the gradation threshold Wth is “10”, and the gradation value of the average image signal of the pixel pair of interest is “11.5”, 11 .5-10 / 2 = 6.5. Therefore, the subtracting unit 44 outputs “6.5” as the gradation value of the target pixel pair on the p-th line and the (p + 1) -th line.
 (ステップS49)
平均コード変換部45の属性検出部49には、減算部44から出力されるpライン目および(p+1)ライン目の注目画素対の画像信号(入力階調)が入力される。属性検出部49は、その画像信号に付随する属性を検出する。
(Step S49)
The attribute detection unit 49 of the average code conversion unit 45 receives the image signal (input gradation) of the target pixel pair on the p-th line and the (p + 1) -th line output from the subtraction unit 44. The attribute detection unit 49 detects an attribute associated with the image signal.
 以下、注目画素対に対応する画像信号は階調値(入力階調)が「6.5」であり、属性検出部49において、注目画素対に対応する画像信号に付随する属性は動画であり輪郭部であるという検出結果が得られたものとして説明を行う。 Hereinafter, the image signal corresponding to the pixel pair of interest has a gradation value (input gradation) of “6.5”, and the attribute attached to the image signal corresponding to the pixel pair of interest in the attribute detection unit 49 is a moving image. The description will be made assuming that the detection result of the contour portion is obtained.
 (ステップS52)
平均コード変換部45の基底コードセット選択部52は、2ライン差分部43の出力にもとづき、基底コードセット選択部52内に記憶された基底コードセットまたは削除済み基底コードセットのいずれかのコードセットを選択する。基底コードセット選択部52は、2ライン差分部43の出力が「0」であれば、基底コードセット(例えば、図10Aに示した基底コードセット)を選択し、2ライン差分部43の出力が「1」または「-1」であれば、削除済み基底コードセット(例えば、図10Bに示した削除済み基底コードセット)を選択する。
(Step S52)
Based on the output of the two-line difference unit 43, the base code set selection unit 52 of the average code conversion unit 45 is either a base code set stored in the base code set selection unit 52 or a deleted base code set. Select. If the output of the 2-line difference unit 43 is “0”, the base code set selection unit 52 selects a base code set (for example, the base code set shown in FIG. 10A), and the output of the 2-line difference unit 43 is If it is “1” or “−1”, the deleted base code set (for example, the deleted base code set shown in FIG. 10B) is selected.
 (ステップS54)
平均コード変換部45の基底コード選択部54は、入力階調に対する上階調基底コードを選択する。
(Step S54)
The base code selection unit 54 of the average code conversion unit 45 selects the upper tone base code for the input tone.
 すなわち、ステップS54では、基底コードセット選択部52において選択されたコードセットの中から、注目画素対における画像信号の階調値(入力階調)よりも大きく、かつ入力階調に最も近い階調値を有するサブフィールドコードを上階調基底コードとして選択する。 That is, in step S54, the gradation that is larger than the gradation value (input gradation) of the image signal in the pixel pair of interest and is closest to the input gradation from the code set selected by the base code set selection unit 52. A subfield code having a value is selected as the upper gradation base code.
 具体的には、基底コード選択部54は、基底コードセット選択部52に記憶されている基底コードセットを構成する基底コードの各階調値(または、削除済み基底コードセットを構成する削除済み基底コードの各階調値)と入力階調とを比較する。そして、入力階調よりも大きく、かつ入力階調に最も近い階調値を有する基底コード(または、削除済み基底コード)を選択し、それを上階調基底コードとして出力する。 Specifically, the base code selection unit 54 sets each gradation value of the base code constituting the base code set stored in the base code set selection unit 52 (or the deleted base code constituting the deleted base code set). Are compared with the input gradation. Then, a base code (or a deleted base code) having a gradation value larger than the input gradation and closest to the input gradation is selected, and is output as an upper gradation base code.
 例えば、2ライン差分部43の出力が「-1」であり、入力階調が「6.5」であれば、基底コードセット選択部52は図10Bに示した削除済み基底コードセットを選択する。そして、基底コード選択部54は、図10Bに示した削除済み基底コードセットにおいて、階調値「6.5」よりも大きく、かつ階調値「6.5」に最も近い階調値を有する削除済み基底コードを選択する。このとき、階調値「6.5」よりも大きく、かつ階調値「6.5」に最も近い階調値を有する削除済み基底コードは階調値「12」の削除済み基底コード「10111」である。したがって、基底コード選択部54は、削除済み基底コード「10111」を選択し、それを上階調基底コードとして出力する。 For example, if the output of the 2-line difference unit 43 is “−1” and the input gradation is “6.5”, the base code set selection unit 52 selects the deleted base code set shown in FIG. 10B. . Then, the base code selection unit 54 has a gradation value that is larger than the gradation value “6.5” and closest to the gradation value “6.5” in the deleted base code set shown in FIG. 10B. Select the deleted base code. At this time, the deleted base code “10111” having the gradation value “12” is the deleted base code having the gradation value larger than the gradation value “6.5” and having the gradation value closest to the gradation value “6.5”. Is. Therefore, the base code selection unit 54 selects the deleted base code “10111” and outputs it as the upper gradation base code.
 (ステップS61)
平均コード変換部45のルール生成部61は、中間コードセット生成のためのルールを生成する。
(Step S61)
The rule generation unit 61 of the average code conversion unit 45 generates a rule for generating an intermediate code set.
 すなわち、ステップS61では、注目画素対における画像信号にもとづき、上階調基底コードにおける発光するサブフィールドを非発光のサブフィールドに変更して新たなサブフィールドコードを生成するためのルールを生成する。 That is, in step S61, a rule for generating a new subfield code by changing the light emitting subfield in the upper gradation base code to a non-light emitting subfield is generated based on the image signal in the pixel pair of interest.
 具体的には、ルール生成部61は、画像信号に付随する属性が静止画であれば、「点灯サブフィールドのいずれか1つを非点灯サブフィールドに変更する」という基本的なルール(ルール1)を生成する。 Specifically, the rule generation unit 61 performs a basic rule (rule 1) “change any one of the lighting subfields to the non-lighting subfield” if the attribute attached to the image signal is a still image. ) Is generated.
 ルール生成部61は、画像信号に付随する属性が動画であれば、動画擬似輪郭を抑制するために、画像の表示に使用することができるサブフィールドコードを制限する。 If the attribute attached to the image signal is a moving image, the rule generation unit 61 restricts the subfield codes that can be used for displaying the image in order to suppress the moving image pseudo contour.
 パネル10を用いた画像表示装置30では、動画像をパネル10に表示する際に、元の画像信号には含まれない偽の輪郭が使用者に観測されることがある。この偽の輪郭が動画擬似輪郭である。そして、サブフィールドコードには、動画擬似輪郭を抑制する効果が高いものとそうでないものとがある。例えば、図10A、図10Bに示したサブフィールドコードは動画擬似輪郭を抑制する効果が高いサブフィールドコードである。 In the image display device 30 using the panel 10, when a moving image is displayed on the panel 10, a false contour that is not included in the original image signal may be observed by the user. This false contour is a moving image pseudo contour. The subfield codes include those that have a high effect of suppressing moving image pseudo contours and those that do not. For example, the subfield codes shown in FIGS. 10A and 10B are subfield codes that have a high effect of suppressing the moving image pseudo contour.
 すなわち、動画擬似輪郭の見え方は、画像の表示に使用することができるサブフィールドコードに依存しており、動画擬似輪郭を抑制する効果が高いサブフィールドコードを用いて画像の表示を行うことで、動画擬似輪郭を抑制することができる。その場合、画像の表示に使用することができるサブフィールドコードは、動画擬似輪郭の抑制が不要な場合と比較して、制限される。これが、ルール生成部61において、動画擬似輪郭を抑制するために、画像の表示に使用することができるサブフィールドコードを制限する理由である。 In other words, the appearance of the moving image pseudo contour depends on the subfield code that can be used to display the image, and the image is displayed using the subfield code that is highly effective in suppressing the moving image pseudo contour. The moving image pseudo contour can be suppressed. In that case, the subfield code that can be used for displaying an image is limited as compared with the case where the suppression of the moving image pseudo contour is unnecessary. This is the reason why the rule generation unit 61 restricts the subfield codes that can be used for image display in order to suppress the moving image pseudo contour.
 そして、画像信号に付随する属性が動画であれば、ルール生成部61は、動画擬似輪郭を抑制するために、基本となるルール1に、「非点灯となることを禁止するサブフィールドを設定するときのルール」を追加する。この追加ルールは、例えば、図11Cを用いて説明した「サブフィールドSF1を非点灯サブフィールドにすることを禁止する」というルール3である。これにより、ルール生成部61は、画像の表示に使用することができるサブフィールドコードを制限する。 Then, if the attribute attached to the image signal is a moving image, the rule generating unit 61 sets “a subfield that prohibits non-lighting” in the basic rule 1 in order to suppress the moving image pseudo contour. Add “When the rule”. This additional rule is, for example, the rule 3 described with reference to FIG. 11C, which is “prohibiting the subfield SF1 from being a non-lighting subfield”. As a result, the rule generation unit 61 limits the subfield codes that can be used for displaying an image.
 したがって、画像信号に付随する属性が動画であるとき(すなわち、注目画素対における画像信号が動画であるとき)にルール生成部61が生成するルールは、画像信号に付随する属性が静止画であるとき(すなわち、注目画素対における画像信号が静止画であるとき)にルール生成部61が生成するルールを包含する。 Therefore, when the attribute attached to the image signal is a moving image (that is, when the image signal in the target pixel pair is a moving image), the rule generated by the rule generation unit 61 is that the attribute attached to the image signal is a still image. The rule generation unit 61 includes a rule generated when the image signal in the pixel pair of interest is a still image.
 (ステップS72)
平均コード変換部45の中間コード生成部72は、中間コードセットを生成する。
(Step S72)
The intermediate code generation unit 72 of the average code conversion unit 45 generates an intermediate code set.
 具体的には、中間コード生成部72は、ルール生成部61が生成したルールにもとづき、上階調基底コードから中間コードを生成し、中間コードセットを生成する。 Specifically, the intermediate code generation unit 72 generates an intermediate code from the upper gradation base code based on the rules generated by the rule generation unit 61, and generates an intermediate code set.
 例えば、ステップS50において選択された上階調基底コードが階調値「12」の削除済み基底コード「10111」であり、ルール生成部61が生成したルールがルール1およびルール3であれば、中間コード生成部72は、この基底コード「10111」にルール生成部61が生成したルール1およびルール3を適用し、新たな中間コードを生成する。 For example, if the upper gradation base code selected in step S50 is the deleted base code “10111” having the gradation value “12” and the rules generated by the rule generation unit 61 are rule 1 and rule 3, The code generation unit 72 applies the rules 1 and 3 generated by the rule generation unit 61 to the base code “10111” to generate a new intermediate code.
 具体的には、削除済み基底コード「10111」の点灯サブフィールドであるサブフィールドSF1およびサブフィールドSF3からサブフィールドSF5のうち、ルール3にもとづき、サブフィールドSF1を除いたサブフィールド(サブフィールドSF3からサブフィールドSF5)を、非点灯サブフィールドへの置き換えの対象とする。そして、ルール1にもとづき、サブフィールドSF3からサブフィールドSF5の各サブフィールドをそれぞれ非点灯サブフィールドにする。こうして、中間コード生成部72は、3つの中間コード「10011」、「10101」、および「10110」を生成する。このようにして得られた中間コードセットは、例えば、図11Cに示した中間コードセットである。 Specifically, out of subfield SF1 and subfield SF3 to subfield SF5, which are lighting subfields of the deleted base code “10111”, the subfield (from subfield SF3 to subfield SF1 is excluded based on rule 3). The subfield SF5) is to be replaced with a non-lighting subfield. Then, based on rule 1, the subfields SF3 to SF5 are set to non-lighting subfields. In this way, the intermediate code generating unit 72 generates three intermediate codes “10011”, “10101”, and “10110”. The intermediate code set thus obtained is, for example, the intermediate code set shown in FIG. 11C.
 (ステップS74)
平均コード変換部45の上下コード選択部74は、上階調コードと下階調コードを選択する。
(Step S74)
The upper / lower code selection unit 74 of the average code conversion unit 45 selects an upper gradation code and a lower gradation code.
 すなわち、ステップS74では、上階調基底コードに上述したルールを適用して生成される中間コードセットの中から、注目画素対における画像信号の階調値より大きく注目画素対における画像信号の階調値に最も近い階調値を有するサブフィールドコードを上階調コードとして選択し、かつ、注目画素対における画像信号の階調値以下で注目画素対における画像信号の階調値に最も近い階調値を有するサブフィールドコードを下階調コードとして選択する。 That is, in step S74, the gradation of the image signal in the target pixel pair is larger than the gradation value of the image signal in the target pixel pair from the intermediate code set generated by applying the above-described rule to the upper gradation base code. The subfield code having the gradation value closest to the value is selected as the upper gradation code, and the gradation closest to the gradation value of the image signal in the target pixel pair is equal to or smaller than the gradation value of the image signal in the target pixel pair A subfield code having a value is selected as a lower gradation code.
 具体的には、上下コード選択部74は、中間コードセットを構成するサブフィールドコードの各階調値と入力階調とを比較する。そして、入力階調よりも大きく、かつ入力階調に最も近い階調値を有するサブフィールドコードを選択し、それを上階調コードとして出力する。また、入力階調以下で、かつ入力階調に最も近い階調値を有するサブフィールドコードを選択し、それを下階調コードとして出力する。 Specifically, the upper / lower code selection unit 74 compares each gradation value of the subfield code constituting the intermediate code set with the input gradation. Then, a subfield code having a gradation value larger than the input gradation and closest to the input gradation is selected and output as an upper gradation code. Also, a subfield code having a gradation value that is equal to or lower than the input gradation and closest to the input gradation is selected, and is output as a lower gradation code.
 例えば、入力階調が階調値「6.5」であり、ステップS72において生成された中間コードセットが図11Cに示した中間コードセットであれば、上階調コードに該当するサブフィールドコードは階調値「9」のサブフィールドコードである。また、下階調コードに該当するサブフィールドコードは階調値「6」のサブフィールドコードである。したがって、上下コード選択部74は、上階調コードとして階調値「9」を有するサブフィールドコード「10101」を選択し、下階調コードとして階調値「6」を有するサブフィールドコード「10011」を選択する。 For example, if the input gradation is the gradation value “6.5” and the intermediate code set generated in step S72 is the intermediate code set shown in FIG. 11C, the subfield code corresponding to the upper gradation code is This is a subfield code of gradation value “9”. Further, the subfield code corresponding to the lower gradation code is a subfield code having a gradation value “6”. Therefore, the upper / lower code selection unit 74 selects the subfield code “10101” having the gradation value “9” as the upper gradation code and the subfield code “10011” having the gradation value “6” as the lower gradation code. ”Is selected.
 (ステップS82)
平均コード変換部45のディザ選択部82は、画像信号の属性にもとづきディザ要素を選択する。
(Step S82)
The dither selection unit 82 of the average code conversion unit 45 selects a dither element based on the attribute of the image signal.
 例えば、ディザ選択部82に、図12Aに示したディザパターンと、図12Bに示したディザパターンとが記憶されていれば、ディザ選択部82は、画像信号および属性検出部49において検出された属性にもとづき、いずれか一方のディザパターンを選択する。 For example, if the dither pattern shown in FIG. 12A and the dither pattern shown in FIG. 12B are stored in the dither selection unit 82, the dither selection unit 82 uses the attribute detected by the image signal and attribute detection unit 49. Based on the above, one of the dither patterns is selected.
 そして、画像信号に付随する属性が輪郭部であれば図12Aに示したディザパターンを選択し、画像信号に付随する属性が輪郭部でなければ図12Bに示したディザパターンを選択するようにディザ選択部82が設定してあれば、画像信号に付随する属性が輪郭部のときには、ディザ選択部82は、図12Aに示したディザパターンを選択する。そして、ディザ選択部82は、注目画素対の位置にもとづき、ディザパターンに設定されたディザ要素の中からいずれか1つを選択する。例えば、ディザ選択部82は、図2Aに示したディザパターンにもとづき、ディザ要素として「0.25」を選択する。 If the attribute attached to the image signal is a contour portion, the dither pattern shown in FIG. 12A is selected. If the attribute attached to the image signal is not a contour portion, the dither pattern shown in FIG. 12B is selected. If the selection unit 82 is set, when the attribute attached to the image signal is a contour portion, the dither selection unit 82 selects the dither pattern shown in FIG. 12A. Then, the dither selection unit 82 selects one of the dither elements set in the dither pattern based on the position of the target pixel pair. For example, the dither selection unit 82 selects “0.25” as the dither element based on the dither pattern shown in FIG. 2A.
 (ステップS83)
ディザ選択部82は、ディザ値を算出する。
(Step S83)
The dither selector 82 calculates a dither value.
 ディザ選択部82は、選択したディザ要素に、上階調コードの階調値と下階調コードの階調値との差分を乗算してディザ値を算出する。 The dither selection unit 82 calculates the dither value by multiplying the selected dither element by the difference between the tone value of the upper tone code and the tone value of the lower tone code.
 例えば、ステップS74において選択された上階調コードが階調値「9」であり、ステップS74において選択された下階調コードの階調値が「6」であり、ステップS82において選択されたディザ要素が「0.25」であれば、ディザ選択部82は、上階調コードの階調値と下階調コードの階調値との差分「3」にディザ要素「0.25」を乗算してディザ値「0.75」を算出する。 For example, the upper gradation code selected in step S74 is the gradation value “9”, the gradation value of the lower gradation code selected in step S74 is “6”, and the dither selected in step S82. If the element is “0.25”, the dither selector 82 multiplies the difference “3” between the gradation value of the upper gradation code and the gradation value of the lower gradation code by the dither element “0.25”. Then, the dither value “0.75” is calculated.
 (ステップS86)
平均コード変換部45の平均コード決定部86は、注目画素対に表示すべき階調値を算出する。
(Step S86)
The average code determination unit 86 of the average code conversion unit 45 calculates a gradation value to be displayed on the target pixel pair.
 すなわち、ステップS86では、注目画素対における画像信号の階調値に所定の値を加算して注目画素対に表示すべき階調値を算出する。 That is, in step S86, a predetermined value is added to the gradation value of the image signal in the target pixel pair to calculate the gradation value to be displayed on the target pixel pair.
 具体的には、平均コード決定部86は、入力階調に、ステップS83において算出されたディザ値を加算し、さらに、ステップS88における算出結果にもとづき誤差拡散部84から出力される誤差を加算して、注目画素対に表示すべき階調値を算出する。したがって、上述の所定の値は、ディザ選択部82から出力されるディザ値と、誤差拡散部84から出力される誤差とを加算した数値である。 Specifically, the average code determination unit 86 adds the dither value calculated in step S83 to the input gradation, and further adds the error output from the error diffusion unit 84 based on the calculation result in step S88. Thus, the gradation value to be displayed on the target pixel pair is calculated. Therefore, the predetermined value is a numerical value obtained by adding the dither value output from the dither selection unit 82 and the error output from the error diffusion unit 84.
 例えば、入力階調が階調値「6.5」であり、ステップS83において算出されたディザ値が「0.75」であり、ステップS88における算出結果にもとづき誤差拡散部84から出力される誤差が「-0.1」であれば、6.5+0.75-0.1=7.15となる。したがって、注目画素に表示すべき階調値は「7.15」となる。 For example, the input gradation is the gradation value “6.5”, the dither value calculated in step S83 is “0.75”, and the error output from the error diffusion unit 84 based on the calculation result in step S88. Is “−0.1”, 6.5 + 0.75−0.1 = 7.15. Therefore, the gradation value to be displayed on the target pixel is “7.15”.
 (ステップS87)
平均コード決定部86は、注目画素対に階調値を表示する際に使用するサブフィールドコードを決定する。
(Step S87)
The average code determination unit 86 determines a subfield code to be used when displaying a gradation value on the target pixel pair.
 すなわち、ステップS87では、上階調コードおよび下階調コードのうち注目画素対に表示すべき階調値により近い階調値を有する方を、後段へ出力するサブフィールドコードとして選択する。 That is, in step S87, the one having the gradation value closer to the gradation value to be displayed on the target pixel pair among the upper gradation code and the lower gradation code is selected as the subfield code to be output to the subsequent stage.
 具体的には、平均コード決定部86は、注目画素対に表示すべき階調値と、上階調コードの階調値および下階調コードの階調値とを比較する。そして注目画素対に表示すべき階調値が下階調コードの階調値よりも上階調コードの階調値の方に近い場合は、注目画素対に階調値を表示する際に使用するサブフィールドコードとして上階調コードを選択し、それを出力する。また、注目画素対に表示すべき階調値が上階調コードの階調値よりも下階調コードの階調値の方に近い場合は、注目画素対に階調値を表示する際に使用するサブフィールドコードとして下階調コードを選択し、それを出力する。 Specifically, the average code determination unit 86 compares the gradation value to be displayed on the target pixel pair with the gradation value of the upper gradation code and the gradation value of the lower gradation code. If the tone value to be displayed on the target pixel pair is closer to the tone value of the upper tone code than the tone value of the lower tone code, it is used to display the tone value on the target pixel pair. The upper gradation code is selected as the subfield code to be output, and is output. When the gradation value to be displayed on the target pixel pair is closer to the lower gradation code gradation value than the upper gradation code gradation value, the gradation value is displayed on the attention pixel pair. A lower gradation code is selected as a subfield code to be used, and is output.
 例えば、上階調コードの階調値が「9」であり、下階調コードの階調値が「6」であり、注目画素対に表示すべき階調値が「7.15」であれば、上階調コードの階調値と注目画素対に表示すべき階調値との差分は「1.85」となり、下階調コードの階調値と注目画素対に表示すべき階調値との差分は「1.15」となる。したがって、この場合、平均コード決定部86は、階調値「6」を有する下階調コード「10011」を選択し、それを後段へ出力する。 For example, the gradation value of the upper gradation code is “9”, the gradation value of the lower gradation code is “6”, and the gradation value to be displayed on the target pixel pair is “7.15”. For example, the difference between the gradation value of the upper gradation code and the gradation value to be displayed on the target pixel pair is “1.85”, and the gradation value to be displayed on the lower pixel code and the target pixel pair The difference from the value is “1.15”. Therefore, in this case, the average code determination unit 86 selects the lower gradation code “10011” having the gradation value “6” and outputs it to the subsequent stage.
 (ステップS88)
平均コード決定部86は、新たに発生した誤差を算出して誤差拡散部84に出力する。
(Step S88)
The average code determination unit 86 calculates a newly generated error and outputs it to the error diffusion unit 84.
 平均コード決定部86は、注目画素対に表示すべき階調値から、後段へ出力するために選択したサブフィールドコードの階調値を減算し、その減算結果を新たに発生した誤差として誤差拡散部84に出力する。 The average code determination unit 86 subtracts the gradation value of the subfield code selected for output to the subsequent stage from the gradation value to be displayed on the pixel pair of interest, and the subtraction result is error diffusion as a newly generated error. To the unit 84.
 例えば、注目画素対に表示すべき階調値が「7.15」であり、後段へ出力するために選択したサブフィールドコードの階調値が「6」であれば、7.15-6=1.15である。したがって、平均コード決定部86は、この「1.15」を新たに発生した誤差として誤差拡散部84に出力する。 For example, if the gradation value to be displayed on the target pixel pair is “7.15” and the gradation value of the subfield code selected for output to the subsequent stage is “6”, 7.15−6 = 1.15. Therefore, the average code determination unit 86 outputs “1.15” to the error diffusion unit 84 as a newly generated error.
 (ステップS91)
差分コード作成部91は、2ライン差分部43の出力にもとづき、書込み期間に1ライン毎書込み動作を行う第1種サブフィールド(本実施の形態では、サブフィールドSF2)を制御するサブフィールドコードを生成する。
(Step S91)
Based on the output of the two-line difference unit 43, the difference code creation unit 91 generates a subfield code for controlling the first type subfield (subfield SF2 in the present embodiment) that performs the write operation for each line during the write period. Generate.
 差分コード作成部91は、2ライン差分部43の出力が「1」であれば、pライン目の注目画素の画像信号に対しては、第1種サブフィールドを点灯サブフィールドにするサブフィールドコードを出力し、(p+1)ライン目の注目画素の画像信号に対しては、第1種サブフィールドを非点灯サブフィールドにするサブフィールドコードを出力する。 If the output of the two-line difference unit 43 is “1”, the difference code creation unit 91 sets the first type subfield to the lighting subfield for the image signal of the pixel of interest on the p-th line. And a subfield code for making the first type subfield a non-lighting subfield is output for the image signal of the target pixel on the (p + 1) -th line.
 また、差分コード作成部91は、2ライン差分部43の出力が「-1」であれば、pライン目の注目画素の画像信号に対しては、第1種サブフィールドを非点灯サブフィールドにするサブフィールドコードを出力し、(p+1)ライン目の注目画素の画像信号に対しては、第1種サブフィールドを点灯サブフィールドにするサブフィールドコードを出力する。 Further, if the output of the two-line difference unit 43 is “−1”, the difference code creation unit 91 sets the first type subfield to the non-lighting subfield for the image signal of the target pixel on the p-th line. And outputs a subfield code for setting the first type subfield to the lighting subfield for the image signal of the target pixel on the (p + 1) -th line.
 また、差分コード作成部91は、2ライン差分部43の出力が「0」であれば、pライン目の注目画素の画像信号および(p+1)ライン目の注目画素の画像信号に対して、第1種サブフィールドを制御しないサブフィールドコードを出力する。 Further, if the output of the two-line difference unit 43 is “0”, the difference code creation unit 91 applies the first to the image signal of the target pixel of the p-th line and the image signal of the target pixel of the (p + 1) -th line. A subfield code that does not control one type of subfield is output.
 例えば、第1種サブフィールドがサブフィールドSF2であり、2ライン差分部43の出力が「-1」であれば、差分コード作成部91は、pライン目の注目画素の画像信号に対しては、サブフィールドSF2を非点灯サブフィールドにするサブフィールドコード「-0---」を出力する。また、(p+1)ライン目の注目画素の画像信号に対しては、サブフィールドSF2を点灯サブフィールドにするサブフィールドコード「-1---」を出力する。 For example, if the first type subfield is the subfield SF2 and the output of the two-line difference unit 43 is “−1”, the difference code creation unit 91 does not process the image signal of the pixel of interest on the p-th line. , The subfield code “−0 −−−”, which makes the subfield SF2 a non-lighting subfield, is output. Further, for the image signal of the pixel of interest on the (p + 1) -th line, a subfield code “−1 −−−” that outputs the subfield SF2 as a lighting subfield is output.
 なお、このサブフィールドコードでは、制御の対象外となるサブフィールドを「-」で表しているが、本実施の形態では、後段での論理演算を考慮して「-」を「0」にしている。したがって、差分コード作成部91は、上述のサブフィールドコード「-0---」をサブフィールドコード「00000」として出力し、上述のサブフィールドコード「-1---」をサブフィールドコード「01000」として出力する。 In this subfield code, a subfield that is not subject to control is represented by “−”. However, in this embodiment, “−” is set to “0” in consideration of a logical operation in a later stage. Yes. Therefore, the difference code creation unit 91 outputs the above-described subfield code “−0 −−−” as the subfield code “00000”, and outputs the above subfield code “−1 −−−” as the subfield code “01000”. "Is output.
 (ステップS92)
表示コード合成部92は、平均コード変換部45から出力されるサブフィールドコードと、差分コード作成部91から出力されるサブフィールドコードとを合成して表示コードを作成する。
(Step S92)
The display code synthesis unit 92 synthesizes the subfield code output from the average code conversion unit 45 and the subfield code output from the difference code creation unit 91 to create a display code.
 具体的には、表示コード合成部92は、平均コード変換部45から出力されるpライン目の注目画素に対応するサブフィールドコードと、差分コード作成部91から出力されるpライン目の注目画素に対応するサブフィールドコードとを、各ビット毎に論理和演算する。そして、その論理和演算の結果を、pライン目の注目画素の表示コードとしてデータ電極駆動回路32に出力する。 Specifically, the display code synthesis unit 92 includes the sub-field code corresponding to the p-th pixel of interest output from the average code converter 45 and the p-th pixel of interest output from the difference code creation unit 91. The sub-field code corresponding to is ORed for each bit. Then, the result of the logical sum operation is output to the data electrode drive circuit 32 as a display code of the pixel of interest on the p-th line.
 また、表示コード合成部92は、平均コード変換部45から出力される(p+1)ライン目の注目画素に対応するサブフィールドコードと、差分コード作成部91から出力される(p+1)ライン目の注目画素に対応するサブフィールドコードとを、各ビット毎に論理和演算する。そして、その論理和演算の結果を、(p+1)ライン目の画素の表示コードとしてデータ電極駆動回路32に出力する。 The display code synthesis unit 92 also outputs the subfield code corresponding to the pixel of interest on the (p + 1) th line output from the average code conversion unit 45 and the target of the (p + 1) th line output from the difference code creation unit 91. The subfield code corresponding to the pixel is ORed for each bit. Then, the result of the logical sum operation is output to the data electrode driving circuit 32 as the display code of the pixel on the (p + 1) line.
 なお、表示コードとは、画像表示に実際に用いるサブフィールドコードのことである。 Note that the display code is a subfield code actually used for image display.
 例えば、pライン目の注目画素のサブフィールドコードとして、平均コード変換部45から「10011」が出力され、差分コード作成部91から「00000」が出力されれば、表示コード合成部92は、pライン目の注目画素の表示コードとして「10011」を出力する。 For example, if “10011” is output from the average code conversion unit 45 and “00000” is output from the difference code creation unit 91 as the subfield code of the pixel of interest on the p-th line, the display code synthesis unit 92 “10011” is output as the display code of the pixel of interest on the line.
 あるいは、(p+1)ライン目の注目画素のサブフィールドコードとして、平均コード変換部45から「10011」が出力され、差分コード作成部91から「01000」が出力されれば、表示コード合成部92は、(p+1)ライン目の注目画素の表示コードとして「11011」を出力する。 Alternatively, if “10011” is output from the average code conversion unit 45 and “01000” is output from the difference code creation unit 91 as the subfield code of the pixel of interest on the (p + 1) -th line, the display code synthesis unit 92 , “11011” is output as the display code of the pixel of interest on the (p + 1) -th line.
 ステップS92が終了したら、ステップS42に戻る。こうして、ステップS42からステップS92までの一連のステップを繰り返し実行する。 When step S92 ends, the process returns to step S42. In this way, a series of steps from step S42 to step S92 is repeatedly executed.
 このように、本実施の形態においては、書込み期間に1ライン毎書込み動作を行う第1種サブフィールドと、書込み期間に2ライン毎同時書込み動作を行う第2種サブフィールドとで1フィールドを構成する。 As described above, in the present embodiment, one field is constituted by the first type subfield that performs the write operation for each line during the write period and the second type subfield that performs the simultaneous write operation for every two lines during the write period. To do.
 そして、第2種サブフィールドにおいて同時に書込み動作を行う1対の画素(注目画素対)に対応する画像信号の差分値が第1種サブフィールドの階調重みよりも小さいときには、注目画素対に対応する画像信号の平均値を表示コードに変換する。 Then, when the difference value of the image signal corresponding to a pair of pixels (target pixel pair) performing the write operation at the same time in the second type subfield is smaller than the gradation weight of the first type subfield, it corresponds to the target pixel pair. The average value of the image signal to be converted is converted into a display code.
 また、上述の差分値が第1種サブフィールドの階調重み以上のときには、第1種サブフィールドにおいて、注目画素対の一方の画素を点灯し他方の画素を非点灯にする表示コードを作成する。 Further, when the above-described difference value is equal to or greater than the gradation weight of the first type subfield, a display code for lighting one pixel of the target pixel pair and turning off the other pixel in the first type subfield is created. .
 これにより、画像表示装置30における画像表示品質の低下を防止しつつ、書込み期間に要する時間を短縮することができる。 Thereby, the time required for the writing period can be shortened while preventing the image display quality in the image display device 30 from deteriorating.
 また、本実施の形態では、上述したように画像信号処理回路31を構成することで、画像信号から表示コード(サブフィールドコード)への変換を、多数のサブフィールドコードから成る変換テーブルを用いて行うのではなく、演算回路によって行うことができる。 Further, in the present embodiment, by configuring the image signal processing circuit 31 as described above, conversion from an image signal to a display code (subfield code) is performed using a conversion table including a number of subfield codes. Rather than doing so, it can be done by an arithmetic circuit.
 すなわち、本実施の形態では、パネルの大画面化、高精細度化、画像表示品質の向上、放送方式の多様化、3D画像の表示機能等の多機能化、等への対応が必要な画像表示装置において、様々な条件に応じて膨大な数の変換テーブルの中から最適な1つを選択するように画像信号処理回路を構成する必要がなくなる。本実施の形態によれば、画像信号から表示コード(サブフィールドコード)への変換を、演算回路を用いて演算によって行うことができる。したがって、そのような画像表示装置においても、膨大な数の変換テーブルを備える必要はなく、必要最小限のテーブル(例えば、図10Aに示した基底コードセット、および図10Bに示した削除済み基底コードセット)と、画像信号から表示コードへの変換のための演算回路を備えるだけでよい。 In other words, in this embodiment, an image that needs to cope with an increase in the screen size of the panel, higher definition, improvement in image display quality, diversification of broadcasting methods, multi-functionality such as a 3D image display function, and the like. In the display device, it is not necessary to configure an image signal processing circuit so as to select an optimum one from a vast number of conversion tables according to various conditions. According to the present embodiment, conversion from an image signal to a display code (subfield code) can be performed by calculation using an arithmetic circuit. Therefore, even in such an image display device, it is not necessary to provide a huge number of conversion tables, but a necessary minimum table (for example, the base code set shown in FIG. 10A and the deleted base code shown in FIG. 10B). Set) and an arithmetic circuit for converting the image signal into the display code.
 このように、本実施の形態によれば、画像表示装置30において、画像信号からサブフィールドコードへの変換を論理演算によって行うことができ、画像表示品質の低下を防止しつつ、書込み期間に要する時間を短縮することができる。 As described above, according to the present embodiment, in the image display device 30, the conversion from the image signal to the subfield code can be performed by the logical operation, which is necessary for the writing period while preventing the image display quality from being deteriorated. Time can be shortened.
 なお、本実施の形態では、最も階調重みの大きいサブフィールド(本実施の形態では、サブフィールドSF2)だけを第1種サブフィールドとし、他のサブフィールドは第2種サブフィールドとする構成を説明したが、本発明は、何らこの構成に限定されるものではない。 In the present embodiment, only the subfield having the largest gradation weight (subfield SF2 in the present embodiment) is the first type subfield, and the other subfields are the second type subfield. Although described, the present invention is not limited to this configuration.
 図15は、本発明の一実施の形態における画像表示装置30に用いるパネル10の各電極に印加する駆動電圧波形の他の例を概略的に示す図である。 FIG. 15 is a diagram schematically showing another example of a drive voltage waveform applied to each electrode of panel 10 used in image display device 30 in one embodiment of the present invention.
 図15には、データ電極D1~データ電極Dm、書込み期間において最初に書込み動作を行う走査電極SC1、書込み期間において最後に書込み動作を行う走査電極SCn(例えば、走査電極SC1080)、維持電極SU1~維持電極SUnのそれぞれに印加する駆動電圧波形を示す。 FIG. 15 shows data electrode D1 to data electrode Dm, scan electrode SC1 that performs the address operation first in the address period, scan electrode SCn that performs the address operation last in the address period (for example, scan electrode SC1080), sustain electrode SU1 to The drive voltage waveform applied to each of the sustain electrodes SUn is shown.
 図15に示す駆動電圧波形においては、1フィールドを5つのサブフィールド(サブフィールドSF1、サブフィールドSF2、サブフィールドSF3、サブフィールドSF4、サブフィールドSF5)で構成し、サブフィールドSF1からサブフィールドSF5の各サブフィールドにはそれぞれ(1、10、6、3、2)の階調重みを設定するものとする。 In the drive voltage waveform shown in FIG. 15, one field is composed of five subfields (subfield SF1, subfield SF2, subfield SF3, subfield SF4, subfield SF5), and subfield SF1 to subfield SF5 It is assumed that gradation weights of (1, 10, 6, 3, 2) are set in each subfield.
 また、図15に示す駆動電圧波形において、サブフィールドSF1は強制初期化サブフィールドであり第2種サブフィールドである。サブフィールドSF2およびサブフィールドSF3は、選択初期化サブフィールドであり第1種サブフィールドである。サブフィールドSF4以降の各サブフィールドは、選択初期化サブフィールドであり第2種サブフィールドである。 In the drive voltage waveform shown in FIG. 15, subfield SF1 is a forced initialization subfield and is a second type subfield. The subfield SF2 and the subfield SF3 are selective initialization subfields and are type 1 subfields. Each subfield after subfield SF4 is a selective initialization subfield and is a second type subfield.
 例えば、図15に示すように、最も階調重みが大きいサブフィールド(例えば、サブフィールドSF2)、および2番目に階調重みの大きいサブフィールド(例えば、サブフィールドSF3)を、書込み期間に1ライン毎書込み動作を行う第1種サブフィールドとし、他のサブフィールドを、書込み期間に2ライン毎同時書込み動作を行う第2種サブフィールドとしてもよい。 For example, as shown in FIG. 15, a subfield having the largest gradation weight (for example, subfield SF2) and a subfield having the second largest gradation weight (for example, subfield SF3) are set to one line in the writing period. The first type subfield that performs each write operation may be used, and the other subfield may be the second type subfield that performs the simultaneous write operation every two lines during the write period.
 このような駆動電圧波形のときには、階調重みが最も大きい第1種サブフィールド(図15では、サブフィールドSF2)の階調重みWthを第1階調閾値Wth1とし、階調重みが2番目に大きい第1種サブフィールド(図15では、サブフィールドSF3)の階調重みWthを第2階調閾値Wth2とする。 In such a driving voltage waveform, the gradation weight Wth of the first type subfield (subfield SF2 in FIG. 15) having the largest gradation weight is set to the first gradation threshold Wth1, and the gradation weight is the second. The gradation weight Wth of the large first type subfield (subfield SF3 in FIG. 15) is set as the second gradation threshold Wth2.
 そして、2ライン差分部43は、算出した差分値(注目画素対の各画素に対応する画像信号の差分値)と、第1階調閾値Wth1および第2階調閾値Wth2とを比較する。 Then, the two-line difference unit 43 compares the calculated difference value (difference value of the image signal corresponding to each pixel of the target pixel pair) with the first gradation threshold Wth1 and the second gradation threshold Wth2.
 そして、2ライン差分部43は、差分値が第1階調閾値Wth1以上であれば「2」を出力する。 The 2-line difference unit 43 outputs “2” if the difference value is equal to or greater than the first gradation threshold Wth1.
 また、2ライン差分部43は、差分値が第1階調閾値Wth1未満であり第2階調閾値Wth2以上であれば「1」を出力する。 Also, the two-line difference unit 43 outputs “1” if the difference value is less than the first gradation threshold value Wth1 and greater than or equal to the second gradation threshold value Wth2.
 また、2ライン差分部43は、差分値が第2階調閾値Wth2未満であり(-1)×(第2階調閾値Wth2)より大きければ「0」を出力する。 The 2-line difference unit 43 outputs “0” if the difference value is less than the second gradation threshold Wth2 and greater than (−1) × (second gradation threshold Wth2).
 また、2ライン差分部43は、差分値が(-1)×(第2階調閾値Wth2)以下であり(-1)×(第1階調閾値Wth1)より大きければ「-1」を出力する。 The two-line difference unit 43 outputs “−1” if the difference value is equal to or smaller than (−1) × (second gradation threshold Wth2) and is larger than (−1) × (first gradation threshold Wth1). To do.
 また、2ライン差分部43は、差分値が(-1)×(第1階調閾値Wth1)以下であれば「-2」を出力する。 The 2-line difference unit 43 outputs “−2” if the difference value is equal to or less than (−1) × (first gradation threshold Wth1).
 すなわち、2ライン差分部43は、以下の5つの動作をする。
1)Wth1≦(差分値)のときには「2」を出力する。
2)Wth2≦(差分値)<Wth1のときには「1」を出力する。
3)-Wth2<(差分値)<Wth2のときには「0」を出力する。
4)-Wth1<(差分値)≦Wth2のときには「-1」を出力する。
5)(差分値)≦-Wth1 のときには「-2」を出力する。
That is, the 2-line difference unit 43 performs the following five operations.
1) When Wth1 ≦ (difference value), “2” is output.
2) When Wth2 ≦ (difference value) <Wth1, “1” is output.
3) When -Wth2 <(difference value) <Wth2, “0” is output.
4) When -Wth1 <(difference value) ≦ Wth2, “−1” is output.
5) When (difference value) ≦ −Wth1, “−2” is output.
 減算部44は、2ライン平均部42から出力される平均画像信号から、2ライン差分部43の出力にもとづき決定される所定の変数を減算する。すなわち、減算部44は、1対の画素の平均画像信号から、1対の画素の画像信号の差分値によって決定される所定の変数を減算する。 The subtracting unit 44 subtracts a predetermined variable determined based on the output of the two-line difference unit 43 from the average image signal output from the two-line averaging unit 42. That is, the subtracting unit 44 subtracts a predetermined variable determined by the difference value of the image signal of the pair of pixels from the average image signal of the pair of pixels.
 減算部44は、2ライン差分部43の出力が「2」または「-2」であれば、この所定の変数を「第1階調閾値Wth1の1/2」とする。また、減算部44は、2ライン差分部43の出力が「1」または「-1」であれば、この所定の変数を「第2階調閾値Wth2の1/2」とする。また、減算部44は、2ライン差分部43の出力が「0」であれば、この所定の変数を「0」とする。 If the output of the two-line difference unit 43 is “2” or “−2”, the subtraction unit 44 sets this predetermined variable to “½ of the first gradation threshold value Wth1”. If the output of the two-line difference unit 43 is “1” or “−1”, the subtracting unit 44 sets the predetermined variable to “½ of the second gradation threshold value Wth2”. The subtractor 44 sets the predetermined variable to “0” if the output of the two-line difference unit 43 is “0”.
 したがって、減算部44は、2ライン差分部43の出力が「2」または「-2」であれば、2ライン平均部42から出力される平均画像信号から第1階調閾値Wth1の1/2を減算した結果を、pライン目の画素および(p+1)ライン目の画素(pライン目および(p+1)ライン目の1対の画素)の画像信号として出力する。 Therefore, if the output of the two-line difference unit 43 is “2” or “−2”, the subtracting unit 44 uses the average image signal output from the two-line averaging unit 42 to ½ the first gradation threshold value Wth1. Is output as an image signal of a pixel on the p-th line and a pixel on the (p + 1) -th line (a pair of pixels on the p-th line and the (p + 1) -th line).
 また、減算部44は、2ライン差分部43の出力が「1」または「-1」であれば、2ライン平均部42から出力される平均画像信号から第2階調閾値Wth2の1/2を減算した結果を、pライン目の画素および(p+1)ライン目の画素(pライン目および(p+1)ライン目の1対の画素)の画像信号として出力する。 Further, if the output of the two-line difference unit 43 is “1” or “−1”, the subtracting unit 44 calculates ½ of the second gradation threshold Wth2 from the average image signal output from the two-line averaging unit 42. Is output as an image signal of a pixel on the p-th line and a pixel on the (p + 1) -th line (a pair of pixels on the p-th line and the (p + 1) -th line).
 また、減算部44は、2ライン差分部43の出力が「0」であれば、2ライン平均部42から出力される平均画像信号を、そのままpライン目の画素および(p+1)ライン目の画素(pライン目および(p+1)ライン目の1対の画素)の画像信号として出力する。 If the output of the two-line difference unit 43 is “0”, the subtracting unit 44 uses the average image signal output from the two-line averaging unit 42 as it is as the pixel on the p-th line and the pixel on the (p + 1) -th line. This is output as an image signal (a pair of pixels on the p-th line and the (p + 1) -th line).
 平均コード変換部45は、減算部44から出力される画像信号を、所定のサブフィールドを非点灯サブフィールドとするサブフィールドコードに変換する。この所定のサブフィールドとは、2ライン差分部43の出力(2ライン差分部43における比較結果)によって決定されるサブフィールドである。 The average code conversion unit 45 converts the image signal output from the subtraction unit 44 into a subfield code having a predetermined subfield as a non-lighting subfield. This predetermined subfield is a subfield determined by the output of the 2-line difference unit 43 (comparison result in the 2-line difference unit 43).
 平均コード変換部45は、減算部44から出力されるpライン目および(p+1)ライン目の注目画素対の画像信号を、サブフィールドコードに変換する。このとき、2ライン差分部43の出力が「2」または「-2」であれば、本実施の形態における平均コード変換部45は、最も階調重みが大きい第1種サブフィールド(本実施の形態では、サブフィールドSF2)を非点灯サブフィールドにする。 The average code conversion unit 45 converts the image signal of the target pixel pair on the p-th line and the (p + 1) -th line output from the subtraction unit 44 into a subfield code. At this time, if the output of the two-line difference unit 43 is “2” or “−2”, the average code conversion unit 45 in the present embodiment has the first type subfield having the largest gradation weight (in this embodiment). In the embodiment, the subfield SF2) is a non-lighting subfield.
 したがって、2ライン差分部43の出力が「2」または「-2」であれば、平均コード変換部45から出力されるサブフィールドコードは「X0XXX」となる。 Therefore, if the output of the 2-line difference unit 43 is “2” or “−2”, the subfield code output from the average code conversion unit 45 is “X0XXX”.
 また、平均コード変換部45は、2ライン差分部43の出力が「1」または「-1」であれば、本実施の形態における平均コード変換部45は、2番目に階調重みが大きい第1種サブフィールド(本実施の形態では、サブフィールドSF3)を非点灯サブフィールドにする。 Further, if the output of the two-line difference unit 43 is “1” or “−1”, the average code conversion unit 45 in the present embodiment has the second largest tone weight. One type of subfield (in this embodiment, subfield SF3) is set as a non-lighting subfield.
 したがって、2ライン差分部43の出力が「1」または「-1」であれば、平均コード変換部45から出力されるサブフィールドコードは「XX0XX」となる。 Therefore, if the output of the two-line difference unit 43 is “1” or “−1”, the subfield code output from the average code conversion unit 45 is “XX0XX”.
 また、2ライン差分部43の出力が「0」であれば、非点灯サブフィールドに固定されるサブフィールドは発生しないので、平均コード変換部45から出力されるサブフィールドコードは「XXXXX」となる。 If the output of the 2-line difference unit 43 is “0”, no subfield fixed to the non-illuminated subfield is generated, so the subfield code output from the average code conversion unit 45 is “XXXX”. .
 なお、このサブフィールドコードは、点灯サブフィールドを「1」、非点灯サブフィールドを「0」で表しており、「X」は「0」または「1」のどちらであってもよいことを表す。 This subfield code represents a lighting subfield as “1” and a non-lighting subfield as “0”, and “X” represents either “0” or “1”. .
 なお、このサブフィールドコードは、左からサブフィールドSF1、サブフィールドSF2、サブフィールドSF3、サブフィールドSF4、サブフィールドSF5の順にデータが並んでいるものとする。 In this subfield code, it is assumed that data is arranged in the order of subfield SF1, subfield SF2, subfield SF3, subfield SF4, and subfield SF5 from the left.
 平均コード変換部45から出力されるサブフィールドコードを上述したように制御するには、平均コード変換部45の基底コードセット選択部52を以下のように構成すればよい。 In order to control the subfield code output from the average code conversion unit 45 as described above, the base code set selection unit 52 of the average code conversion unit 45 may be configured as follows.
 図16Aは、本発明の一実施の形態における画像表示装置30に用いる基底コードセットの他の一例を示す図である。 FIG. 16A is a diagram showing another example of the base code set used in the image display device 30 according to the embodiment of the present invention.
 図16Bは、本発明の一実施の形態における画像表示装置30に用いる削除済み基底コードセットの他の一例を示す図である。 FIG. 16B is a diagram showing another example of the deleted base code set used in the image display device 30 according to the embodiment of the present invention.
 図16Cは、本発明の一実施の形態における画像表示装置30に用いる削除済み基底コードセットの他の一例を示す図である。 FIG. 16C is a diagram showing another example of the deleted base code set used in the image display device 30 according to the embodiment of the present invention.
 図16A、図16B、図16Cに示すコードセットには、発光するサブフィールドを「1」、非発光のサブフィールドを空欄で示し、左から2番目の列には、各サブフィールドコード(基底コードまたは削除済み基底コード)において表示する階調値を表す。また、各コードセットにおいて各サブフィールドを示す表記の直下に記された数値は、各サブフィールドの階調重みを表す。 In the code sets shown in FIGS. 16A, 16B, and 16C, the light-emitting subfield is “1”, the non-light-emitting subfield is blank, and each subfield code (base code) is displayed in the second column from the left. (Or a deleted base code) represents a gradation value to be displayed. Further, the numerical value written immediately below the notation indicating each subfield in each code set represents the gradation weight of each subfield.
 図16Aは、2ライン差分部43の出力が「0」のときに用いる基底コードセットである。図16Aに示す基底コードセットは、1フィールドを5個のサブフィールドで構成し、各サブフィールドは、サブフィールドSF1から順に、それぞれ「1」、「10」、「6」、「3」、「2」の階調重みを有する。 FIG. 16A shows a base code set used when the output of the 2-line difference unit 43 is “0”. In the base code set shown in FIG. 16A, one field is composed of five subfields, and each subfield is “1”, “10”, “6”, “3”, “3” in order from the subfield SF1. 2 "gradation weight.
 図16Aに示す基底コードセットは、図10Aに示した基底コードセットと同じ基底コードセットであり、階調重みが最も小さいサブフィールドから順に1つずつ点灯サブフィールドとする。したがってこの基底コードセットに含まれる基底コードの数は6となる。 The base code set shown in FIG. 16A is the same base code set as the base code set shown in FIG. 10A, and is set to the lighting subfield one by one in order from the subfield having the smallest gradation weight. Therefore, the number of base codes included in this base code set is six.
 図16Bは、2ライン差分部43の出力が「2」または「-2」のときに用いる削除済み基底コードセットである。図16Bに示す削除済み基底コードセットは、図16Aに示した基底コードセットから、2ライン差分部43の出力により決定される所定のサブフィールドを非点灯サブフィールドにして生成したサブフィールドコードセットである。 FIG. 16B shows a deleted base code set used when the output of the 2-line difference unit 43 is “2” or “−2”. The deleted base code set shown in FIG. 16B is a subfield code set generated from the base code set shown in FIG. 16A with a predetermined subfield determined by the output of the two-line difference unit 43 as a non-lighting subfield. is there.
 本実施の形態では、この所定のサブフィールドを最も階調重みが大きい第1種サブフィールド(本実施の形態では、サブフィールドSF2)とする。したがって、図16Bに示す削除済み基底コードセットは、図16Aに示した基底コードセットからサブフィールドSF2を非点灯サブフィールドとしたサブフィールドコードセットとなる。 In the present embodiment, this predetermined subfield is a first type subfield (in this embodiment, subfield SF2) having the largest gradation weight. Accordingly, the deleted base code set shown in FIG. 16B is a sub-field code set in which the sub-field SF2 is a non-lighting sub-field from the base code set shown in FIG. 16A.
 なお、本実施の形態において、サブフィールドSF2は最も階調重みの大きいサブフィールドである。したがって、図16Bに示した削除済み基底コードセットは、図16Aに示した基底コードセットから階調値「22」の基底コード「11111」を除いたコードセットに等しい。 In the present embodiment, the subfield SF2 is a subfield having the largest gradation weight. Therefore, the deleted base code set shown in FIG. 16B is equal to the code set obtained by removing the base code “11111” having the gradation value “22” from the base code set shown in FIG. 16A.
 図16Cは、2ライン差分部43の出力が「1」または「-1」のときに用いる削除済み基底コードセットである。図16Cに示す削除済み基底コードセットは、図16Aに示した基底コードセットから、2ライン差分部43の出力により決定される所定のサブフィールドを非点灯サブフィールドにして生成したサブフィールドコードセットである。 FIG. 16C shows a deleted base code set used when the output of the two-line difference unit 43 is “1” or “−1”. The deleted base code set shown in FIG. 16C is a sub-field code set generated from the base code set shown in FIG. 16A using a predetermined sub-field determined by the output of the two-line difference unit 43 as a non-lighting sub-field. is there.
 本実施の形態では、この所定のサブフィールドを2番目に階調重みが大きい第1種サブフィールド(本実施の形態では、サブフィールドSF3)とする。したがって、図16Cに示す削除済み基底コードセットは、図16Aに示した基底コードセットからサブフィールドSF3を非点灯サブフィールドとしたサブフィールドコードセットとなる。 In the present embodiment, this predetermined subfield is the first type subfield having the second largest gradation weight (subfield SF3 in the present embodiment). Therefore, the deleted base code set shown in FIG. 16C is a subfield code set in which the subfield SF3 is set as a non-lighting subfield from the base code set shown in FIG. 16A.
 基底コードセット選択部52は、基底コードセットおよび基底コードセットを構成する複数の基底コードの各階調値を記憶する。また、基底コードセット選択部52は、削除済み基底コードセットおよび削除済み基底コードセットを構成する複数の削除済み基底コードの各階調値を記憶する。各基底コードと、基底コードの各階調値とは互いに関連付けされて基底コードセット選択部52に記憶される。この基底コードセットは、例えば図16Aに示した基底コードセットである。また、各削除済み基底コードと、削除済み基底コードの各階調値とは互いに関連付けされて基底コードセット選択部52に記憶される。この削除済み基底コードセットは、例えば図16Bおよび図16Cに示した削除済み基底コードセットである。 The base code set selection unit 52 stores the base code set and gradation values of a plurality of base codes constituting the base code set. In addition, the base code set selection unit 52 stores the gradation values of the deleted base code set and the plurality of deleted base codes constituting the deleted base code set. Each base code and each gradation value of the base code are stored in the base code set selection unit 52 in association with each other. This base code set is, for example, the base code set shown in FIG. 16A. Each deleted base code and each gradation value of the deleted base code are stored in the base code set selection unit 52 in association with each other. This deleted base code set is, for example, the deleted base code set shown in FIGS. 16B and 16C.
 そして、基底コードセット選択部52は、2ライン差分部43の出力が「0」であれば、基底コードセット(例えば、図16Aに示した基底コードセット)を選択する。基底コードセット選択部52は、2ライン差分部43の出力が「2」または「-2」であれば、最も階調重みが大きい第1種サブフィールドを非点灯サブフィールドにした削除済み基底コードセット(例えば、図16Bに示した削除済み基底コードセット)を選択する。そして、基底コードセット選択部52は、2ライン差分部43の出力が「1」または「-1」であれば、2番目に階調重みが大きい第1種サブフィールドを非点灯サブフィールドにした削除済み基底コードセット(例えば、図16Cに示した削除済み基底コードセット)を選択する。 Then, if the output of the 2-line difference unit 43 is “0”, the base code set selection unit 52 selects a base code set (for example, the base code set shown in FIG. 16A). If the output of the 2-line difference unit 43 is “2” or “−2”, the base code set selection unit 52 deletes the base code that has been deleted by setting the first type subfield having the highest gradation weight as a non-lighting subfield. A set (eg, a deleted base code set shown in FIG. 16B) is selected. Then, if the output of the two-line difference unit 43 is “1” or “−1”, the base code set selection unit 52 sets the second-type first subfield with the second largest gradation weight as a non-lighting subfield. A deleted base code set (for example, the deleted base code set shown in FIG. 16C) is selected.
 そして、基底コード選択部54は、基底コードセット選択部52によって選択されたコードセットを構成するサブフィールドコードの各階調値と入力階調とを比較して、上階調基底コードとなるサブフィールドコードを選択する。 Then, the base code selection unit 54 compares each gradation value of the subfield code constituting the code set selected by the base code set selection unit 52 with the input gradation, and forms a subfield that becomes an upper gradation base code. Select a code.
 すなわち、図15に示した駆動電圧波形を実現するには、画像信号処理回路31を以上のように構成すればよい。 That is, to realize the drive voltage waveform shown in FIG. 15, the image signal processing circuit 31 may be configured as described above.
 なお、本実施の形態では、基底コード生成部50は基底コードセット選択部52を有し、基底コードセット選択部52には基底コードセットおよび削除済み基底コードセットがあらかじめ記憶されている、という構成を説明した。しかし、本発明は何らこの構成に限定されるものではない。例えば、基底コードまたは削除済み基底コードを生成するルールをあらかじめ定めておき、そのルールにもとづき基底コードまたは削除済み基底コードを生成する構成であってもよい。 In the present embodiment, the base code generation unit 50 includes a base code set selection unit 52, and the base code set selection unit 52 stores the base code set and the deleted base code set in advance. Explained. However, the present invention is not limited to this configuration. For example, a configuration may be adopted in which a rule for generating a base code or a deleted base code is determined in advance, and the base code or the deleted base code is generated based on the rule.
 なお、本実施の形態では、上下コード生成部70は、中間コード生成部72で中間コードセットを生成した後に、上下コード選択部74で上階調コードおよび下階調コードを選択する、という構成を説明した。しかし、本発明は何らこの構成に限定されるものではない。例えば、階調値が大きくなる順に中間コードを生成し、それと同時に中間コードと入力階調とを逐次比較することで上階調コードおよび下階調コードを選択する構成であってもよい。 In the present embodiment, the upper / lower code generation unit 70 selects the upper gradation code and the lower gradation code by the upper / lower code selection unit 74 after the intermediate code set is generated by the intermediate code generation unit 72. Explained. However, the present invention is not limited to this configuration. For example, an intermediate code is generated in order of increasing gradation value, and at the same time, the intermediate code and the input gradation are sequentially compared to select the upper gradation code and the lower gradation code.
 なお、本実施の形態においては、書込み動作を禁止するサブフィールドを設定した後にディザ処理および誤差拡散処理を行う。そのため、制限された数のサブフィールドコードを有する中間コードセットから表示コードを発生して画像の表示に用いる画像表示装置30においても、画像表示品質の低下を防止することができる。 In the present embodiment, dither processing and error diffusion processing are performed after setting a subfield for prohibiting the write operation. Therefore, even in the image display device 30 that generates display codes from an intermediate code set having a limited number of subfield codes and uses them for image display, it is possible to prevent image display quality from being deteriorated.
 なお、本実施の形態においては、平均コード選択部80がディザ選択部82および誤差拡散部84を有する構成を説明したが、本発明は必ずしもこの構成に限定されるものではない。例えば、ディザ処理を行わない場合にはディザ選択部82を省略してもよい。あるいは、誤差拡散処理を行わない場合には誤差拡散部84を省略してもよい。 In the present embodiment, the configuration in which the average code selection unit 80 includes the dither selection unit 82 and the error diffusion unit 84 has been described. However, the present invention is not necessarily limited to this configuration. For example, when the dither process is not performed, the dither selection unit 82 may be omitted. Alternatively, the error diffusion unit 84 may be omitted when the error diffusion process is not performed.
 なお、本実施の形態においては、pライン目の注目画素および(p+1)ライン目の注目画素で共通の誤差と共通のディザ要素を用い、平均コード選択部80の出力がpライン目の注目画素および(p+1)ライン目の注目画素で共通のサブフィールドコードになる構成を説明した。しかし、本発明は何らこの構成に限定されるものではない。例えば、次のような構成であってもよい。まず、上下コード選択部74で選択された上階調コードと下階調コードとの間の差異を算出する。次に、その差異が第1種サブフィールドにのみ発生する画素については、pライン目の注目画素と(p+1)ライン目の注目画素とで互いに異なる誤差およびディザ要素を用いる。そして、平均コード選択部80の出力を、pライン目の注目画素と(p+1)ライン目の注目画素とで高いに異なるサブフィールドコードにする。例えばこのような構成であってもよい。 In this embodiment, a common error and a common dither element are used for the p-line target pixel and the (p + 1) -line target pixel, and the output of the average code selection unit 80 is the p-line target pixel. In the above description, the common subfield code is used for the target pixel in the (p + 1) -th line. However, the present invention is not limited to this configuration. For example, the following configuration may be used. First, the difference between the upper gradation code and the lower gradation code selected by the upper / lower code selection unit 74 is calculated. Next, for pixels in which the difference occurs only in the first type subfield, different errors and dither elements are used for the pixel of interest on the p-th line and the pixel of attention on the (p + 1) -th line. Then, the output of the average code selection unit 80 is set to a different subfield code for the target pixel on the p-th line and the target pixel on the (p + 1) -th line. For example, such a configuration may be used.
 なお、本発明は1フィールドを構成するサブフィールドの数、強制初期化サブフィールドとするサブフィールド、各サブフィールドが有する階調重み等が上述した数値に限定されるものではない。また、画像信号等にもとづいてサブフィールド構成を切り換える構成であってもよい。 In the present invention, the number of subfields constituting one field, the subfields that are forced initialization subfields, the gradation weights of each subfield, and the like are not limited to the above-described numerical values. Moreover, the structure which switches a subfield structure based on an image signal etc. may be sufficient.
 なお、図3、図4、図15に示した駆動電圧波形は本発明の実施の形態における一例を示したものに過ぎず、本発明は何らこの駆動電圧波形に限定されるものではない。 Note that the drive voltage waveforms shown in FIGS. 3, 4, and 15 are merely examples in the embodiment of the present invention, and the present invention is not limited to these drive voltage waveforms.
 また、図6、図7、図9に示した回路構成も本発明の実施の形態における一例を示したものに過ぎず、本発明は何らこれらの回路構成に限定されるものではない。 Also, the circuit configurations shown in FIGS. 6, 7, and 9 are merely examples in the embodiment of the present invention, and the present invention is not limited to these circuit configurations.
 なお、本発明における実施の形態に示した各回路ブロックは、実施の形態に示した各動作を行う電気回路として構成されてもよく、あるいは、同様の動作をするようにプログラミングされたマイクロコンピュータ等を用いて構成されてもよい。 Note that each circuit block shown in the embodiment of the present invention may be configured as an electric circuit that performs each operation shown in the embodiment, or a microcomputer that is programmed to perform the same operation. May be used.
 なお、本発明における実施の形態では、1つのフィールドを、5個のサブフィールドで構成する例を説明した。しかし、本発明は1フィールドを構成するサブフィールドの数が何ら上記の数に限定されるものではない。例えば、サブフィールドの数をより多くすることで、パネル10に表示できる階調の数をさらに増加することができる。あるいは、サブフィールドの数をより少なくすることで、パネル10の駆動に要する時間を短縮することができる。 In the embodiment of the present invention, an example in which one field is composed of five subfields has been described. However, in the present invention, the number of subfields constituting one field is not limited to the above number. For example, by increasing the number of subfields, the number of gradations that can be displayed on the panel 10 can be further increased. Alternatively, the time required for driving panel 10 can be shortened by reducing the number of subfields.
 なお、本発明における実施の形態では、1画素を赤、緑、青の3色の放電セルで構成する例を説明したが、1画素を4色あるいはそれ以上の色の放電セルで構成するパネルにおいても、本発明における実施の形態に示した構成を適用することは可能であり、同様の効果を得ることができる。 In the embodiment of the present invention, an example in which one pixel is constituted by discharge cells of three colors of red, green, and blue has been described. However, a panel in which one pixel is constituted by discharge cells of four colors or more. However, it is possible to apply the configuration shown in the embodiment of the present invention, and the same effect can be obtained.
 なお、本発明の実施の形態において示した具体的な数値は、画面サイズが50インチ、表示電極対14の数が1024のパネル10の特性にもとづき設定したものであって、単に実施の形態における一例を示したものに過ぎない。本発明はこれらの数値に何ら限定されるものではなく、各数値はパネルの仕様やパネルの特性、およびプラズマディスプレイ装置の仕様等にあわせて最適に設定することが望ましい。また、これらの各数値は、上述した効果を得られる範囲でのばらつきを許容するものとする。また、1フィールドを構成するサブフィールドの数や各サブフィールドの階調重み等も本発明における実施の形態に示した値に限定されるものではなく、また、画像信号等にもとづいてサブフィールド構成を切り換える構成であってもよい。 The specific numerical values shown in the embodiment of the present invention are set based on the characteristics of the panel 10 having a screen size of 50 inches and the number of display electrode pairs 14 of 1024. It is just an example. The present invention is not limited to these numerical values, and each numerical value is desirably set optimally in accordance with panel specifications, panel characteristics, plasma display device specifications, and the like. Each of these numerical values is allowed to vary within a range where the above-described effect can be obtained. Further, the number of subfields constituting one field, the gradation weight of each subfield, and the like are not limited to the values shown in the embodiment of the present invention, and the subfield configuration is based on an image signal or the like. May be configured to switch.
 本発明は、画像信号からサブフィールドコードへの変換を演算によって行うことができるので、多数のサブフィールドコードから成る変換テーブルを用いる必要がなく、かつ、画像表示品質の低下を防止しつつ書込み期間に要する時間を短縮することができるので、画素を構成する発光素子における発光と非発光との2値制御を組み合わせて画像表示領域に画像を表示する画像表示装置および画像表示装置の駆動方法として有用である。 In the present invention, since conversion from an image signal to a subfield code can be performed by calculation, it is not necessary to use a conversion table composed of a large number of subfield codes, and the writing period is prevented while preventing a decrease in image display quality. The time required for the image display device can be shortened, so that it is useful as an image display device that displays an image in an image display region by combining binary control of light emission and non-light emission in a light emitting element that constitutes a pixel, and an image display device driving method It is.
 10  パネル
 11  前面基板
 12  走査電極
 13  維持電極
 14  表示電極対
 15,23  誘電体層
 16  保護層
 21  背面基板
 22  データ電極
 24  隔壁
 25,25R,25G,25B  蛍光体層
 30  画像表示装置
 31  画像信号処理回路
 32  データ電極駆動回路
 33  走査電極駆動回路
 34  維持電極駆動回路
 35  タイミング発生回路
 38  シャッタ眼鏡
 41  1H遅延部
 42  2ライン平均部
 43  2ライン差分部
 44  減算部
 45  平均コード変換部
 49  属性検出部
 50  基底コード生成部
 52  基底コードセット選択部
 54  基底コード選択部
 61  ルール生成部
 70  上下コード生成部
 72  中間コード生成部
 74  上下コード選択部
 80  平均コード選択部
 82  ディザ選択部
 84  誤差拡散部
 86  平均コード決定部
 91  差分コード作成部
 92  表示コード合成部
 Wth  階調閾値
 Wth1  第1階調閾値
 Wth2  第2階調閾値
DESCRIPTION OF SYMBOLS 10 Panel 11 Front substrate 12 Scan electrode 13 Sustain electrode 14 Display electrode pair 15,23 Dielectric layer 16 Protective layer 21 Back substrate 22 Data electrode 24 Partition 25, 25R, 25G, 25B Phosphor layer 30 Image display device 31 Image signal processing Circuit 32 Data electrode drive circuit 33 Scan electrode drive circuit 34 Sustain electrode drive circuit 35 Timing generation circuit 38 Shutter glasses 41 1H delay unit 42 2-line average unit 43 2-line difference unit 44 subtraction unit 45 average code conversion unit 49 attribute detection unit 50 Base code generation unit 52 Base code set selection unit 54 Base code selection unit 61 Rule generation unit 70 Upper and lower code generation unit 72 Intermediate code generation unit 74 Upper and lower code selection unit 80 Average code selection unit 82 Dither selection unit 84 Error diffusion unit 86 Average code Decision Part 91 differential code creating unit 92 display code combining unit Wth tone threshold Wth1 first gradation threshold Wth2 second gradation threshold

Claims (6)

  1. 階調重みが定められた複数のサブフィールドで1フィールドを構成し、前記複数のサブフィールドのそれぞれにおける発光と非発光との組合せを示すサブフィールドコードを用いて前記複数のサブフィールドのそれぞれの発光と非発光とを制御して、画像表示領域を構成する複数の画素のそれぞれに画像信号にもとづく階調値を表示して前記画像表示領域に画像を表示する画像表示装置であって、
    書込み期間において走査電極の1本ずつに走査パルスを印加する1ライン毎書込み動作を行う少なくとも1つの第1種サブフィールドと、書込み期間において隣接する2本の走査電極に同時に走査パルスを印加する2ライン毎同時書込み動作を行う複数の第2種サブフィールドとで1フィールドを構成し、前記画像信号にもとづく階調値を前記画素に表示するためのサブフィールドコードである表示コードを出力する駆動回路を備え、
    前記駆動回路は、
    前記走査電極と直交する方向に隣接し、かつ前記第2種サブフィールドの書込み期間に同時に書込み動作を行う1対の画素の各画素に対応する画像信号の平均値を算出する2ライン平均部と、
    前記1対の画素の各画素に対応する画像信号の間で差分値を算出し、前記差分値と前記第1種サブフィールドの階調重みとを比較する2ライン差分部と、
    前記2ライン差分部における比較結果によって決定される所定の変数を前記平均値から減算する減算部と、
    前記減算部の出力を、前記2ライン差分部の比較結果によって決定される所定のサブフィールドを非点灯サブフィールドとするサブフィールドコードに変換して出力する平均コード変換部と、
    前記2ライン差分部の比較結果にもとづき、前記所定のサブフィールドを制御するサブフィールドコードを生成する差分コード作成部と、
    前記平均コード変換部が出力するサブフィールドコードと前記差分コード作成部が生成するサブフィールドコードとを合成して前記表示コードを生成する表示コード合成部とを有する
    ことを特徴とする画像表示装置。
    Each of the plurality of subfields is formed using a subfield code indicating a combination of light emission and non-light emission in each of the plurality of subfields. An image display device that controls non-light emission and displays a gradation value based on an image signal on each of a plurality of pixels constituting the image display region and displays an image in the image display region,
    Applying a scan pulse simultaneously to at least one first-type subfield that performs a write operation for each line that applies a scan pulse to each one of the scan electrodes in the address period, and two adjacent scan electrodes in the address period 2 A drive circuit that forms a field with a plurality of second-type subfields that perform simultaneous writing operation for each line and outputs a display code that is a subfield code for displaying a gradation value based on the image signal on the pixel With
    The drive circuit is
    A two-line average unit that calculates an average value of image signals corresponding to each pixel of a pair of pixels that are adjacent to each other in a direction orthogonal to the scan electrodes and simultaneously perform an address operation in the address period of the second type subfield ,
    A two-line difference unit that calculates a difference value between image signals corresponding to each pixel of the pair of pixels, and compares the difference value with a gradation weight of the first type subfield;
    A subtraction unit that subtracts a predetermined variable determined by the comparison result in the two-line difference unit from the average value;
    An average code conversion unit for converting the output of the subtraction unit into a subfield code having a predetermined subfield determined by the comparison result of the two-line difference unit as a non-lighting subfield, and outputting the subfield code;
    A difference code creating unit that generates a subfield code for controlling the predetermined subfield based on a comparison result of the two-line difference unit;
    An image display device comprising: a display code synthesis unit that generates the display code by synthesizing a subfield code output from the average code conversion unit and a subfield code generated by the difference code creation unit.
  2. 前記平均コード変換部は、
    複数の基本となるサブフィールドコードの中から、注目画素対における画像信号の階調値よりも大きく、かつ前記注目画素対における画像信号の階調値に最も近い階調値を有するサブフィールドコードを上階調基底コードとして選択する基底コード生成部と、
    前記注目画素対における画像信号にもとづき、前記上階調基底コードにおける発光するサブフィールドを非発光のサブフィールドに変更して新たなサブフィールドコードを生成するためのルールを生成するルール生成部と、
    前記上階調基底コードに前記ルールを適用して新たに生成されるサブフィールドコードの中から、前記注目画素対における画像信号の階調値より大きく前記注目画素対における画像信号の階調値に最も近い階調値を有するサブフィールドコードを上階調コードとして選択し、かつ、前記注目画素対における画像信号の階調値以下で前記注目画素対における画像信号の階調値に最も近い階調値を有するサブフィールドコードを下階調コードとして選択する上下コード生成部と、
    前記注目画素対における画像信号の階調値に、所定の値を加算して前記注目画素対に表示すべき階調値を算出し、前記上階調コードおよび前記下階調コードのうち前記注目画素対に表示すべき階調値により近い階調値を有するサブフィールドコードを選択して出力する平均コード選択部とを有する
    ことを特徴とする請求項1に記載の画像表示装置。
    The average code converter is
    Among the plurality of basic subfield codes, a subfield code having a gradation value that is larger than the gradation value of the image signal in the target pixel pair and closest to the gradation value of the image signal in the target pixel pair. A base code generation unit to select as an upper gradation base code;
    A rule generation unit that generates a rule for generating a new subfield code by changing a light-emitting subfield in the upper gradation base code to a non-light-emitting subfield based on an image signal in the target pixel pair;
    Among the subfield codes newly generated by applying the rule to the upper tone base code, the tone value of the image signal in the target pixel pair is larger than the tone value of the image signal in the target pixel pair. The subfield code having the closest gradation value is selected as the upper gradation code, and the gradation closest to the gradation value of the image signal in the target pixel pair is equal to or smaller than the gradation value of the image signal in the target pixel pair An upper and lower code generation unit for selecting a subfield code having a value as a lower gradation code;
    A predetermined value is added to the gradation value of the image signal in the target pixel pair to calculate a gradation value to be displayed on the target pixel pair, and the attention value is selected from the upper gradation code and the lower gradation code. The image display apparatus according to claim 1, further comprising: an average code selection unit that selects and outputs a subfield code having a gradation value closer to the gradation value to be displayed on the pixel pair.
  3. 前記平均コード変換部において、
    前記複数の基本となるサブフィールドコードは、発光するサブフィールドのうち最も階調重みが大きいサブフィールドと、前記最も階調重みが大きいサブフィールドよりも小さい階調重みを有する全てのサブフィールドが発光する基底コード、または、前記基底コードから前記2ライン差分部の比較結果によって決定される前記所定のサブフィールドを非点灯サブフィールドとする削除済み基底コードである
    ことを特徴とする請求項2に記載の画像表示装置。
    In the average code converter,
    The plurality of basic subfield codes emit light from subfields having the largest gradation weight among the subfields to emit light and all subfields having gradation weights smaller than the subfield having the largest gradation weight. The base code to be used or a deleted base code in which the predetermined subfield determined by the comparison result of the two-line difference portion from the base code is a non-lighting subfield. Image display device.
  4. 前記平均コード選択部において、
    前記所定の値は、ディザ処理により算出されるディザ値および誤差拡散処理により発生する誤差である
    ことを特徴とする請求項2に記載の画像表示装置。
    In the average code selector,
    The image display apparatus according to claim 2, wherein the predetermined value is a dither value calculated by dither processing and an error generated by error diffusion processing.
  5. 階調重みが定められた複数のサブフィールドで1フィールドを構成し、前記複数のサブフィールドのそれぞれにおける発光と非発光との組合せを示すサブフィールドコードを用いて前記複数のサブフィールドのそれぞれの発光と非発光とを制御して、画像表示領域を構成する複数の画素のそれぞれに画像信号にもとづく階調値を表示して前記画像表示領域に画像を表示するとともに、書込み期間において走査電極の1本ずつに走査パルスを印加する1ライン毎書込み動作を行う少なくとも1つの第1種サブフィールドと、書込み期間において隣接する2本の走査電極に同時に走査パルスを印加する2ライン毎同時書込み動作を行う複数の第2種サブフィールドとで1フィールドを構成し、前記画像信号にもとづく階調値を前記画素に表示するためのサブフィールドコードである表示コードを生成する画像表示装置の駆動方法であって、
    前記走査電極と直交する方向に隣接し、かつ前記第2種サブフィールドの書込み期間に同時に書込み動作を行う1対の画素の各画素に対応する画像信号の平均値を算出するステップと、
    前記1対の画素の各画素に対応する画像信号の間で差分値を算出し、前記差分値と前記第1種サブフィールドの階調重みとを比較するステップと、
    前記差分値と前記第1種サブフィールドの階調重みとを比較するステップにおける比較結果によって決定される所定の変数を前記平均値から減算するステップと、
    前記所定の変数を前記平均値から減算するステップにおける減算結果を、前記所定のサブフィールドを非点灯サブフィールドとするサブフィールドコードに変換するステップと、
    前記差分値と前記第1種サブフィールドの階調重みとを比較するステップにおける比較結果にもとづき前記所定のサブフィールドを制御するサブフィールドコードを生成するステップと、
    前記所定のサブフィールドを非点灯サブフィールドとするサブフィールドコードに変換するステップにおいて生成されたサブフィールドコードと、前記所定のサブフィールドを制御するサブフィールドコードを生成するステップにおいて生成されたサブフィールドコードとを合成して前記表示コードを生成するステップとを有する
    ことを特徴とする画像表示装置の駆動方法。
    Each of the plurality of subfields is formed using a subfield code indicating a combination of light emission and non-light emission in each of the plurality of subfields. And the non-light emission are controlled to display the gradation value based on the image signal in each of the plurality of pixels constituting the image display area to display the image in the image display area. At least one first-type subfield that performs a line-by-line address operation that applies a scan pulse line by line, and a line-by-line simultaneous address operation that simultaneously applies a scan pulse to two adjacent scan electrodes in the address period A plurality of second-type subfields constitute one field, and gradation values based on the image signal are displayed on the pixels. A driving method of an image display apparatus for generating a display code is a sub-field code because,
    Calculating an average value of image signals corresponding to each pixel of a pair of pixels that are adjacent to each other in a direction orthogonal to the scan electrodes and simultaneously perform an address operation during an address period of the second type subfield;
    Calculating a difference value between image signals corresponding to each pixel of the pair of pixels, and comparing the difference value with a gradation weight of the first type subfield;
    Subtracting a predetermined variable determined by the comparison result in the step of comparing the difference value and the gradation weight of the first type subfield from the average value;
    Converting a subtraction result in the step of subtracting the predetermined variable from the average value into a subfield code in which the predetermined subfield is a non-lighting subfield;
    Generating a subfield code for controlling the predetermined subfield based on a comparison result in the step of comparing the difference value and the gradation weight of the first type subfield;
    The subfield code generated in the step of converting the predetermined subfield into a subfield code having a non-lighting subfield and the subfield code generated in the step of generating a subfield code for controlling the predetermined subfield And a step of generating the display code by synthesizing the display code.
  6. 複数の基本となるサブフィールドコードの中から、注目画素対における画像信号の階調値よりも大きく、かつ前記注目画素対における画像信号の階調値に最も近い階調値を有するサブフィールドコードを上階調基底コードとして選択するステップと、
    前記注目画素対における画像信号にもとづき、前記上階調基底コードにおける発光するサブフィールドを非発光のサブフィールドに変更して新たなサブフィールドコードを生成するためのルールを生成するステップと、
    前記上階調基底コードに前記ルールを適用して新たに生成されるサブフィールドコードの中から、前記注目画素対における画像信号の階調値より大きく前記注目画素対における画像信号の階調値に最も近い階調値を有するサブフィールドコードを上階調コードとして選択し、かつ、前記注目画素対における画像信号の階調値以下で前記注目画素対における画像信号の階調値に最も近い階調値を有するサブフィールドコードを下階調コードとして選択するステップと、
    前記注目画素対における画像信号の階調値に、所定の値を加算して前記注目画素対に表示すべき階調値を算出し、前記上階調コードおよび前記下階調コードのうち前記注目画素対に表示すべき階調値により近い階調値を有するサブフィールドコードを選択するステップとを有する
    ことを特徴とする請求項5に記載の画像表示装置の駆動方法。
    Among the plurality of basic subfield codes, a subfield code having a gradation value that is larger than the gradation value of the image signal in the target pixel pair and closest to the gradation value of the image signal in the target pixel pair. Selecting as the upper tone base code;
    Generating a rule for generating a new subfield code by changing a light-emitting subfield in the upper gradation base code to a non-light-emitting subfield based on an image signal in the target pixel pair;
    Among the subfield codes newly generated by applying the rule to the upper tone base code, the tone value of the image signal in the target pixel pair is larger than the tone value of the image signal in the target pixel pair. The subfield code having the closest gradation value is selected as the upper gradation code, and the gradation closest to the gradation value of the image signal in the target pixel pair is equal to or smaller than the gradation value of the image signal in the target pixel pair Selecting a subfield code having a value as a lower gradation code;
    A predetermined value is added to the gradation value of the image signal in the target pixel pair to calculate a gradation value to be displayed on the target pixel pair, and the attention value is selected from the upper gradation code and the lower gradation code. 6. The method of driving an image display device according to claim 5, further comprising: selecting a subfield code having a gradation value closer to the gradation value to be displayed on the pixel pair.
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