WO2012083100A8 - Electroplated lead-free bump deposition - Google Patents

Electroplated lead-free bump deposition Download PDF

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Publication number
WO2012083100A8
WO2012083100A8 PCT/US2011/065324 US2011065324W WO2012083100A8 WO 2012083100 A8 WO2012083100 A8 WO 2012083100A8 US 2011065324 W US2011065324 W US 2011065324W WO 2012083100 A8 WO2012083100 A8 WO 2012083100A8
Authority
WO
WIPO (PCT)
Prior art keywords
layer
electroplated lead
deposition
free bump
bump deposition
Prior art date
Application number
PCT/US2011/065324
Other languages
French (fr)
Other versions
WO2012083100A2 (en
WO2012083100A3 (en
Inventor
Daniel L. Goodman
Arthur Keigler
Johannes Chiu
Zhenqiu Liu
Original Assignee
Tel Nexx, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tel Nexx, Inc. filed Critical Tel Nexx, Inc.
Priority to CN2011800599578A priority Critical patent/CN103430287A/en
Priority to KR1020137016821A priority patent/KR20130130000A/en
Priority to JP2013544802A priority patent/JP2013546205A/en
Publication of WO2012083100A2 publication Critical patent/WO2012083100A2/en
Publication of WO2012083100A3 publication Critical patent/WO2012083100A3/en
Publication of WO2012083100A8 publication Critical patent/WO2012083100A8/en

Links

Classifications

    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/02—Electroplating of selected surface areas
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/10—Electroplating with more than one layer of the same or of different metals
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/48—After-treatment of electroplated surfaces
    • C25D5/50—After-treatment of electroplated surfaces by heat-treatment
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/60—Electroplating characterised by the structure or texture of the layers
    • C25D5/615—Microstructure of the layers, e.g. mixed structure
    • C25D5/617—Crystalline layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/228—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a liquid phase, e.g. alloy diffusion processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/114—Manufacturing methods by blanket deposition of the material of the bump connector
    • H01L2224/1146—Plating
    • H01L2224/11462—Electroplating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/115—Manufacturing methods by chemical or physical modification of a pre-existing or pre-deposited material
    • H01L2224/11502—Pre-existing or pre-deposited material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/118—Post-treatment of the bump connector
    • H01L2224/11848—Thermal treatments, e.g. annealing, controlled cooling
    • H01L2224/11849—Reflowing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/119—Methods of manufacturing bump connectors involving a specific sequence of method steps
    • H01L2224/11901—Methods of manufacturing bump connectors involving a specific sequence of method steps with repetition of the same manufacturing step
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Abstract

A method of forming a metal feature on a workpiece with deposition is provided. The method includes providing an under bump metal layer for solder of an electronic device on the workpiece, depositing a substantially pure tin layer directly to the under bump metal layer, and depositing a tin silver alloy layer onto the substantially pure tin layer.
PCT/US2011/065324 2010-12-17 2011-12-16 Electroplated lead-free bump deposition WO2012083100A2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN2011800599578A CN103430287A (en) 2010-12-17 2011-12-16 Electroplated lead-free bump deposition
KR1020137016821A KR20130130000A (en) 2010-12-17 2011-12-16 Electroplated lead-free bump deposition
JP2013544802A JP2013546205A (en) 2010-12-17 2011-12-16 Lead-free bump deposition by electroplating

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US12/971,744 2010-12-17
US12/971,744 US20120325671A2 (en) 2010-12-17 2010-12-17 Electroplated lead-free bump deposition

Publications (3)

Publication Number Publication Date
WO2012083100A2 WO2012083100A2 (en) 2012-06-21
WO2012083100A3 WO2012083100A3 (en) 2013-04-25
WO2012083100A8 true WO2012083100A8 (en) 2013-06-20

Family

ID=46232956

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2011/065324 WO2012083100A2 (en) 2010-12-17 2011-12-16 Electroplated lead-free bump deposition

Country Status (6)

Country Link
US (1) US20120325671A2 (en)
JP (1) JP2013546205A (en)
KR (1) KR20130130000A (en)
CN (1) CN103430287A (en)
TW (1) TW201241242A (en)
WO (1) WO2012083100A2 (en)

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EP2405469B1 (en) * 2010-07-05 2016-09-21 ATOTECH Deutschland GmbH Method to form solder alloy deposits on substrates
JP5659821B2 (en) * 2011-01-26 2015-01-28 三菱マテリアル株式会社 Manufacturing method of Sn alloy bump
US9054256B2 (en) 2011-06-02 2015-06-09 Solarcity Corporation Tunneling-junction solar cell with copper grid for concentrated photovoltaic application
US9865754B2 (en) 2012-10-10 2018-01-09 Tesla, Inc. Hole collectors for silicon photovoltaic cells
JP5827939B2 (en) 2012-12-17 2015-12-02 東京エレクトロン株式会社 Film forming method, program, computer storage medium, and film forming apparatus
US10074755B2 (en) 2013-01-11 2018-09-11 Tesla, Inc. High efficiency solar panel
US9219174B2 (en) 2013-01-11 2015-12-22 Solarcity Corporation Module fabrication of solar cells with low resistivity electrodes
US9412884B2 (en) 2013-01-11 2016-08-09 Solarcity Corporation Module fabrication of solar cells with low resistivity electrodes
JP2014175357A (en) 2013-03-06 2014-09-22 Tokyo Electron Ltd Substrate processing method, program, computer storage medium, and substrate processing system
JP5871844B2 (en) * 2013-03-06 2016-03-01 東京エレクトロン株式会社 Substrate processing method, program, computer storage medium, and substrate processing system
US8877630B1 (en) * 2013-11-12 2014-11-04 Chipmos Technologies Inc. Semiconductor structure having a silver alloy bump body and manufacturing method thereof
US9368340B2 (en) * 2014-06-02 2016-06-14 Lam Research Corporation Metallization of the wafer edge for optimized electroplating performance on resistive substrates
US9804498B2 (en) * 2014-06-09 2017-10-31 International Business Machines Corporation Filtering lead from photoresist stripping solution
US10309012B2 (en) 2014-07-03 2019-06-04 Tesla, Inc. Wafer carrier for reducing contamination from carbon particles and outgassing
US9899546B2 (en) 2014-12-05 2018-02-20 Tesla, Inc. Photovoltaic cells with electrodes adapted to house conductive paste
JP6557466B2 (en) * 2014-12-24 2019-08-07 ローム・アンド・ハース・エレクトロニック・マテリアルズ・コリア・リミテッド Nickel plating solution
US9947822B2 (en) 2015-02-02 2018-04-17 Tesla, Inc. Bifacial photovoltaic module using heterojunction solar cells
US9576922B2 (en) 2015-05-04 2017-02-21 Globalfoundries Inc. Silver alloying post-chip join
US10049970B2 (en) 2015-06-17 2018-08-14 Samsung Electronics Co., Ltd. Methods of manufacturing printed circuit board and semiconductor package
US20170110392A1 (en) * 2015-10-15 2017-04-20 Advanced Semiconductor Engineering, Inc. Semiconductor package structure and method for manufacturing the same structure
US9761744B2 (en) 2015-10-22 2017-09-12 Tesla, Inc. System and method for manufacturing photovoltaic structures with a metal seed layer
US9953908B2 (en) * 2015-10-30 2018-04-24 International Business Machines Corporation Method for forming solder bumps using sacrificial layer
US9842956B2 (en) 2015-12-21 2017-12-12 Tesla, Inc. System and method for mass-production of high-efficiency photovoltaic structures
US10115838B2 (en) 2016-04-19 2018-10-30 Tesla, Inc. Photovoltaic structures with interlocking busbars
US10672919B2 (en) 2017-09-19 2020-06-02 Tesla, Inc. Moisture-resistant solar cells for solar roof tiles
US11190128B2 (en) 2018-02-27 2021-11-30 Tesla, Inc. Parallel-connected solar roof tile modules

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Also Published As

Publication number Publication date
US20120152752A1 (en) 2012-06-21
JP2013546205A (en) 2013-12-26
WO2012083100A2 (en) 2012-06-21
US20120325671A2 (en) 2012-12-27
WO2012083100A3 (en) 2013-04-25
TW201241242A (en) 2012-10-16
CN103430287A (en) 2013-12-04
KR20130130000A (en) 2013-11-29

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