201241242 六、發明說明 【發明所屬之技術領域】 所揭露之實施例大體上關於用於應用金屬結構 之方法及設備，更具體地關於用於沉積無鉛焊接劑 光阻圖案化膜之工件表面之微尺寸圖案中之方法及 及更具體地關於用於電鏟錫-銀合金焊接劑凸塊之 設備。 【先前技術】 半導體工業在歐盟有害物質限制（RoHS )指 下已朝向去除電子產品中之錯而努力。工業較規定 前進而提供無鉛包裝「綠色」消費者電子產品。諸 經由遮罩圖案化沉積之無鉛焊接劑的電沉積爲可提 距凸塊（連接間距小於約300微米）或先進電子產 之微凸塊的技術。錫（Sn )及銀（Ag )之合金爲 用之主要候選金屬。實質上純錫具有許多焊接劑金 欲屬性，例如耐疲勞性、熱循環及易延展機械屬性 工業已發現實質上純錫焊接劑中錫晶鬚生長使其成 靠的連接焊接劑用於先進包裝應用。已發現添加少 介於約1 %及4%重量之Ag，可顯著地減少焊接劑 S η晶鬚形成之可能性。因爲錫（-〇 · 1 3伏S Η E )與$ + 0.799伏SHE)之間之大的電化學還原電位差， 式中錫-銀合金（SnAg)焊接劑電鍍較實質上純錫 鉛-錫（PbSn )電鍍更困難。還原電位差造成溶液 至工件 於塗佈 設備， 方法及 令要求 更快速 如使用 供緊間 品包裝 該些應 屬之所 ，然而 爲不可 量銀， 接合中 §.( 習知方 電鍍或 中Ag + 201241242 離子自發地與金屬Sn反應及/或錫離子 或Sn + 2爲Sn + 2或Sn + 4，藉此沉浸將金屬 面上。類似地，電鍍溶液中 Ag +離子可沉 屬上’諸如鎳或銅。化學供應商已開發有 成Ag+離子而促使其還原電位接近Sn + 2, 中Ag+離子穏定。當電鍍SnAg無鉛焊接| 構上時’合成於電鍍溶液中之有機Ag +離 之Ag.沉浸沉積於下凸塊金屬（UBM)上 地爲鎳或銅。此不必要之沉浸沉積可造成 之空隙缺陷，該空隙可於回流焊接劑之後 空隙可造成機械及電封裝接合晶片之失敗 S n Ag焊接劑之替代方法，以形成連接至 無鉛凸塊，而解決面對電子工業朝向排除 所有鉛的問題。此外，工業亦需開發以| 鍍凸塊結構取代鉛-錫（PbSn )電鍍凸ί 法。因市售SnAg電鍍化學中Ag-錯合劑 成本，SnAg電鍍凸塊之典型成本爲PbSn 電沉積SnAg凸塊之現有方法包含製造裝 統，例如 U . S .專利申請案 1 1 / 8 4 0 5 7 4 8中 及之方式倂入本文，而揭露具控制系統之 以確保焊接劑金屬於貫穿沉積中配置恆定 需要SnAg電鍍之方法，將昂貴化學之使 時SnAg與其下金屬之間配置可靠介面。 (Sn + 2 )氧化 Sn A g沉積於S η表 浸沉積於其他金 機分子，用以合 藉此使電鍍溶液 ill於該等UBM結 子未排除不必要 之可能性，典型 UBM/SnAg 介面 觀察到，且該等 。因此需要電鍍 其下金屬之可靠 積體電路產品之 联鉛（SnAg)電 电結構之經濟方 及其他成分之高 凸塊的許多倍。 備中昂貴控制系 所說明，其以提 市售電鍍裝備， 合金組成。因此 用減至最少，同 201241242 【發明內容及實施方式】 儘管將參照圖式中所示之實施例說明本實施例，應理 解的是實施例可以許多替代形式實施例體現。此外，可使 用任何適當元件或材料之尺寸、形狀或類型。本揭露之實 施例提供於電沉積之無鉛焊接劑凸塊與其下凸塊金屬 (UBM )之間配置可靠介面之方法。 現在參照圖1，顯示已準備電沉積之工件的工件表面 之單一凸塊之截面。電接觸元件101實質上藉由絕緣膜 1 〇〇環繞，該些特徵類型係以半週期陣列配置於積體電路 工件之上，例如3 00毫米矽晶圓可具有1，000至100,000 個分佈於表面之該等電接觸元件。請注意，可配置任何適 當工件或基板，例如砷化鎵或其他。工件塗佈種層1 0 2及 接著塗佈光阻1〇4，其被光圖案化以提供開口，其中諸如 鎳（Ni )或銅（Cu )或一系列Ni及Cu層之下凸塊金屬 106電沉積。焊接劑金屬120使用相同光阻圖案遮罩層 104而電沉積於下凸塊金屬106之上。例如，U.S.專利 7,012,333，其以提及方式倂入本文，其中提及SnAg焊接 劑合金之沉積’且約3.5%重量之合金以低於SnAg共晶點 沉積。 現在參照圖2，顯示配置無鉛凸塊之其他先前技術方 法，例如SnAg或SnAgCu合金，其中更貴重之實質上純 金屬層131於實質上純錫層130沉積之前沉積於下凸塊金 屬之上。U.S.專利6,596,62 1，其以提及方式倂入本文， 其中提及藉由使用包含約2微米厚Ni之下凸塊金屬層 201241242 106，接著以與形成SnAgCu合金凸塊所需實質上純Snl30 成比例之Ag/Cu 1 3 1塗佈層106，而形成無鉛SnAgCu凸 塊具約3.5%Ag及約0.6%Cu及差額之Sn。 現在參照圖3，將討論該些先前技術方法之潛在缺 點，其中圖3顯示熱回流程序之後，焊接劑凸塊之截面。 熱回流程序在後續處理之前有利地使焊接劑凸塊結構穩 定。在電沉積步驟之後，移除光阻1 04 (未顯示），並蝕 刻掉種層1 02除了藉由下凸塊金屬1 06保護處以外。後續 於所謂回流程序步驟中熱處理晶圓。簡言之，回流包含以 控制之氣體加熱工件，使得實質上於焊接劑熔化之前移除 氧化錫，對SnAg合金而言可發生於約221 °C及約23 2°C 之間；在約3.5%Ag組成之SnAg共晶約221 °C，及在實 質上純Sn熔點約232 °C，當焊接劑相位從固體改變爲液 體時，表面張力造成金屬體積改變形狀，隨著液體表面張 力減至最少表面面積而轉換爲實質上球形126。亦發生於 提高之溫度的爲金屬間化合物（IMC )層128之形成，其 爲許多合金相位之混合物，例如在Cu/Sn介面，IMC將爲 Cu5Sn6及Cu3Sn合金相位之組合。亦發生於提高之溫度 的爲不同有機分子之氣化及除氣，其可於沉積程序期間倂 入焊接劑。該些提高之溫度程序藉由降溫晶圓或基板而停 止，造成焊接劑固化，其中，固·體焊接劑包含許多次微米 尺寸之晶粒，其可具有不同尺寸及組成。例如，U.S.專利 6,805，9 74，其以提及之方式倂入本文，其中提及控制合 金組成及冷卻速率之重要，以避免不必要之大型Ag3Sn電 201241242 鍍晶粒形成，而是形成Sn晶粒及Ag3Sn小晶粒之微細晶 粒分散。 下凸塊金屬（UBM)與焊接劑之間配置可重複及良好 控制金屬間結構（IMC )之重要，以及焊接劑內良好控制 之晶粒結構，可影響焊接劑凸塊之機械及電子遷移二者可 靠性。此外，在焊接劑成核及生長冷卻期間，晶粒結構強 烈地受到所形成之IMC影響。在回流最初相位期間禁止 出現於下凸塊金屬介面之Ag離開是有利的，如同藉由比 較圖4及5所展示，其顯示相對於下凸塊金屬與焊接劑之 間之介面區域232、242已重疊及拋光之凸塊之光學顯微 鏡影像230、240，其中淺色及深色相應於不同材料之焊 接劑、UBM、及IMC，其中極暗的斑點爲空隙。例如，圖 4中所示之單一步驟電沉積SnAg，使用鎳UBM層及約 2.5%Ag合金，可頻繁發生UBM與SnAg之間區域中之介 面空隙234、236、238。藉由對比，如圖5中所示，所揭 露之實施例重複使用實質上純錫之第一層極錫-銀之第二 層，便無該等介面空隙發生。實質上純Sn層/槽可稱爲 例如市售實質上純 Sn材料或槽’諸如可獲自 Dow Chemical 〇 現在參照圖6，顯示單一凸塊結構截面。準備具有實 質上藉由絕緣膜100環繞之電接觸元件101之結構252的 工件2 50，其中該些特徵類型係以半週期陣列配置，其中 工件塗佈種層1 02及接著塗佈光阻1 04，其經光圖案化以 提供開口，其中諸如鎳（Ni )或銅（Cu )或一系列Ni及 -9 - 201241242201241242 VI. Description of the Invention [Technical Fields of the Invention] The disclosed embodiments relate generally to methods and apparatus for applying metal structures, and more particularly to the surface of workpieces for depositing lead-free solder resist patterned films Methods in size patterns and more particularly with respect to apparatus for electric shovel tin-silver alloy solder bumps. [Prior Art] The semiconductor industry has been working towards the removal of errors in electronic products under the European Union's Restriction of Hazardous Substances (RoHS). The industry provides for lead-free packaging of "green" consumer electronics products. Electrodeposition of lead-free solders patterned by masking is a technique for lifting bumps (join spacing less than about 300 microns) or advanced electronically produced microbumps. Alloys of tin (Sn) and silver (Ag) are the main candidate metals. In essence, pure tin has many properties of soldering agents, such as fatigue resistance, thermal cycling, and ductile mechanical properties. The industry has found that tin solder whiskers in pure tin solders are grown to form a connecting solder for advanced packaging. application. It has been found that the addition of less than about 1% and 4% by weight of Ag significantly reduces the likelihood of solder S η whisker formation. Because of the large electrochemical reduction potential difference between tin (-〇·1 3 volts S Η E ) and $ + 0.799 volts SHE), the tin-silver alloy (SnAg) solder plating is substantially pure tin-lead-tin (PbSn) plating is more difficult. The reduction potential difference causes the solution to the workpiece to be applied to the coating equipment, and the method and requirements are faster, such as the use of the tight-fitting packaging, which should be the same, but for the non-quantitative silver, in the joint §. (Knowledge plating or medium Ag + 201241242 Ions spontaneously react with metal Sn and/or tin ions or Sn + 2 is Sn + 2 or Sn + 4, thereby immersing the metal surface. Similarly, Ag + ions in the plating solution can be submerged on 'such as nickel Or copper. Chemical suppliers have developed Ag+ ions to promote their reduction potential close to Sn + 2, and Ag+ ion determination. When electroplating SnAg lead-free soldering | when configured, 'organic Ag + ionized in electroplating solution Immersed on the under bump metal (UBM) is nickel or copper. This unnecessary immersion deposition can cause void defects that can cause mechanical and electrical package bonding wafer failure after the reflow soldering gap. An alternative to n Ag soldering to form a lead-free bump to solve the problem of facing the electronics industry toward eliminating all lead. In addition, the industry needs to develop a lead-tin (PbSn) plating bump instead of a plated bump structure. Liga. The cost of Ag-stacking agents in commercially available SnAg plating chemistries, the typical cost of SnAg plated bumps is PbSn. The current method of electrodepositing SnAg bumps includes manufacturing equipment, such as U.S. Patent Application 1 1 / 8 4 0 5 7 4 8 The method of neutralization is incorporated herein, and the method of controlling the system to ensure that the solder metal is constant in the deposition process requires SnAg plating, and the arrangement between the expensive chemical and the underlying SnAg is disclosed. Reliable interface. (Sn + 2 ) oxidized Sn A g deposited on S η immersed in other gold molecules, so that the plating solution ill in the UBM junctions does not eliminate unnecessary possibilities, typical UBM / The SnAg interface has been observed, and so on. Therefore, many times the economical side of the lead-on-lead (SnAg) electrical structure and other high-bumps of the reliable integrated circuit product of the metal underlying metal need to be electroplated. It is made up of commercially available electroplating equipment and alloys. Therefore, it is minimized, and 201241242. [Invention and Contents] Although the embodiment will be described with reference to the embodiments shown in the drawings, it should be understood. The embodiment can be embodied in a number of alternative embodiments. Further, any suitable element or material size, shape or type can be used. Embodiments of the present disclosure provide for electrodeposited lead-free solder bumps and under bump metal (UBM) A method of configuring a reliable interface between them. Referring now to Figure 1, a cross section of a single bump of a workpiece surface of a workpiece to be electrodeposited is shown. The electrical contact element 101 is substantially surrounded by an insulating film 1 ,, the feature types The semi-periodic array is disposed on the integrated circuit workpiece. For example, a 300 mm wafer may have 1,000 to 100,000 electrical contact elements distributed on the surface. Note that any suitable workpiece or substrate can be configured, such as gallium arsenide or others. The workpiece is coated with a seed layer 1 0 2 and then coated with a photoresist 1〇4, which is photopatterned to provide openings, such as nickel (Ni) or copper (Cu) or a series of Ni and Cu under bump metal 106 electrodeposition. Solder metal 120 is electrodeposited onto lower bump metal 106 using the same photoresist pattern mask layer 104. For example, U.S. Patent No. 7,012,333, the disclosure of which is incorporated herein by reference in its entirety in the the the the the the the the the the the the the the the the Referring now to Figure 2, there is shown another prior art method of configuring lead-free bumps, such as SnAg or SnAgCu alloys, in which a more expensive substantially pure metal layer 131 is deposited on the under bump metal prior to deposition of substantially pure tin layer 130. U.S. Patent No. 6,596,62, the disclosure of which is incorporated herein by reference in its entirety by reference in its entirety in the the the the the the the the the the the the the the the Snl30 is proportional to the Ag/Cu 1 3 1 coating layer 106, and the lead-free SnAgCu bumps are formed with about 3.5% Ag and about 0.6% Cu and a difference in Sn. Referring now to Figure 3, potential disadvantages of these prior art methods will be discussed, with Figure 3 showing the cross section of the solder bumps after the thermal reflow procedure. The hot reflow process advantageously stabilizes the solder bump structure prior to subsequent processing. After the electrodeposition step, the photoresist 104 (not shown) is removed and the seed layer 102 is etched away except by the lower bump metal 106 protection. Subsequent heat treatment of the wafer in a so-called reflow procedure step. Briefly, the reflow comprises heating the workpiece with a controlled gas such that the tin oxide is removed substantially prior to melting of the solder, which may occur between about 221 ° C and about 23 2 ° C for the SnAg alloy; The AgAg eutectic composed of %Ag is about 221 °C, and the melting point of pure Sn is about 232 °C. When the phase of the solder changes from solid to liquid, the surface tension causes the volume of the metal to change shape, and the surface tension of the liquid decreases. The surface area is converted to a substantially spherical shape 126 with a minimum surface area. Also occurring at elevated temperatures is the formation of an intermetallic compound (IMC) layer 128, which is a mixture of many alloy phases, such as in the Cu/Sn interface, which will be a combination of Cu5Sn6 and Cu3Sn alloy phases. Also occurring at elevated temperatures are gasification and degassing of different organic molecules which can be incorporated into the solder during the deposition process. The elevated temperature program is stopped by cooling the wafer or substrate, causing the solder to solidify, wherein the solid body solder comprises a plurality of sub-micron sized grains, which may have different sizes and compositions. For example, U.S. Patent No. 6,805,9,74, the disclosure of which is incorporated herein by reference in its entirety, in its entirety, the disclosure of the entire disclosure of the disclosure of the disclosure of the disclosure of the disclosure of the disclosure of the disclosure of the disclosure of the disclosure of the disclosure of the disclosure of the disclosure of The fine crystal grains of the grains and Ag3Sn small crystal grains are dispersed. The importance of repeatable and well-controlled intermetallic structure (IMC) between the under bump metal (UBM) and the solder, as well as the well-controlled grain structure in the solder, can affect the mechanical and electronic migration of the solder bumps. Reliability. In addition, during solder nucleation and growth cooling, the grain structure is strongly affected by the formed IMC. It is advantageous to inhibit Ag exiting the lower bump metal interface during the initial phase of reflow, as shown by comparing Figures 4 and 5, which show interface regions 232, 242 with respect to the under bump metal and solder. Optical microscope images 230, 240 of the overlapped and polished bumps, wherein the light and dark colors correspond to solders, UBMs, and IMCs of different materials, with extremely dark spots being voids. For example, a single step of electrodepositing SnAg as shown in Figure 4, using a nickel UBM layer and about 2.5% Ag alloy, can frequently occur with interfacial voids 234, 236, 238 in the region between UBM and SnAg. By contrast, as shown in Figure 5, the disclosed embodiment re-uses the second layer of the first layer of tin-silver, which is substantially pure tin, without the occurrence of such interfacial voids. Substantially pure Sn layers/grooves may be referred to as, for example, commercially available substantially pure Sn materials or tanks' such as available from Dow Chemical®. Referring now to Figure 6, a single bump structure cross section is shown. A workpiece 205 having a structure 252 substantially surrounding the electrical contact element 101 surrounded by the insulating film 100 is prepared, wherein the feature types are arranged in a semi-periodic array, wherein the workpiece is coated with a seed layer 102 and then coated with a photoresist 1 04, which is patterned by light to provide openings, such as nickel (Ni) or copper (Cu) or a series of Ni and -9 - 201241242
Cl!層之下凸塊金屬1 06電沉積。請注意，可配置任何適 當下凸塊金屬。實質上純錫層121係使用電鍍槽電沉積， 其除了錫以外不包含其他金屬離子內含。請注意，工件 2 50可沖洗以移除電鍍槽。錫-銀層122接著使用相同光 阻圖案遮罩層104於包括錫及銀離子之金屬離子內含的其 他電鍍槽中電沉積。根據下列方程式調整實質上純Sn層 (TSn)及SnAg層（TSnAg)之厚度，以及311八8層中％八8 (CsnAg )，以提供％ A g之最後組成： 0/〇Ag = CsnAg X TsnAg/ ( TsnAg + Tsn) 例如，爲達成％Ag之最後組成等於1.5% Ag，TSn =The bump metal 106 is deposited under the Cl! layer. Please note that any suitable bump metal can be configured. The substantially pure tin layer 121 is electrodeposited using a plating bath which does not contain other metal ions contained in addition to tin. Note that workpiece 2 50 can be rinsed to remove the plating bath. The tin-silver layer 122 is then electrodeposited using other photoresist pattern mask layers 104 in other plating baths contained within the metal ions including tin and silver ions. The thicknesses of the substantially pure Sn layer (TSn) and the SnAg layer (TSnAg) are adjusted according to the following equation, and the octave 8 8 (CsnAg) is provided to provide the final composition of % A g: 0/〇Ag = CsnAg X TsnAg/ ( TsnAg + Tsn) For example, to achieve the final composition of %Ag equal to 1.5% Ag, TSn =
TsnAg 且 CsnAg=3.0〇/o。 已考量應用實質上純銀（Ag )及實質上純錫（Sn ) 以利製造SnAg合金，或甚至應用 Ag、接著Cu、接著 Sn，其接著回流以形成SnAgCu合金，由於實質上純Ag 及實質上純Sn電鍍材料較SnAg合金電鍍便宜，此方法 可具有特別成本優勢。當使用實質上純金屬層之組合時， 爲二原因，於應用實質上純錫之前，需應用更貴重金屬： (1 )因爲失控之Ag沉浸沉積於Sn之問題，Ag電沉積於 Sn表面難以控制，藉此產生不穩定Sn/Ag介面，其將造 成沉稂步驟與熱處理回流步驟之間之產品控制問題； (2 )在熱回流程序期間，實質上純A g未熔化，而是溶 解於Sn中’因此Ag金屬層在熔化之錫焊接劑球上不穩 -10- 201241242 定’在Sn熔化與Ag完全溶解於Sn之間之期間四處漂 流。然而’爲於其中形成金屬間層之回流程序期間將Ag 直接應用於UBM材料之上，Sn與UBM之間Ag的出現造 成金屬間層中空隙形成，且該些空隙減少焊接劑接合之可 靠性。因爲SnAg材料較Sll材料昂貴許多倍，本揭露之 實施例提供若干實質上純Ag及實質上純Sn方法之經濟 效益’例如減少焊接劑沉積成本達約50%或更多，而無減 損焊接劑接合可靠性之相關缺點。 現在參照圖7’顯示適用於本揭露之實施例之製造程 序的市售晶圓電沉積機。所揭露之實施例可以市售電沉積 機實施’諸如Billerica MA之NEXX系統的「Stratus」》 系統200可包含2005年5月12日於專利合作協定下發布 之國際申請案WO 2005/042804 A2中所揭露之特徵，其以 提及之方式倂入本文。方塊圖中所示之系統200形成爲示 範系統。請注意，可配置更多或更少模組而具有不同組態 及位置。工業電沉積機200可包含負載端口 206，藉此以 上所說明之先前以光阻圖案化之基板被插入及撤出系統。 裝載站204可具有機械臂，其將基板278轉移至基板載台 27〇、2 72、274中，接著藉由傳送器28 0而轉移至模組 210、212、214、216' 260、262、264、266 並連續處 理。一系列可包括銅（Cu )電沉積模組2 1 6、鎳（Ni )電 沉積模組214、錫（Sn)電沉積模組212、錫-銀（SnAg) 電沉積模組210。基板接著可返回至裝載站204，卸載基 板並遞送經過基板清洗模組202而返回至負載端口 206。 -11 - 201241242 使用例如去離子水之清洗步驟，例如可配置於電沉積步驟 之前及之後，可配置清洗模組 260、262、264、266。另 一方面，模組260、262、264及266可爲沖洗或熱處理模 組以及清洗模組。控制器220可配置於每一站或模組內， 以於站或模組內按順序排列程序及/或傳送器》系統控制 器2 22可配置於系統200內，以於站或程序模組之間按順 序排列基板，並協調系統動作，諸如主機通訊、批次裝載 及卸載、或控制系統200所需其他動作。控制器222可程 控而於經配置以支援具有適當金屬離子內含（例如以上所 說明）之電鍍槽的程序模組212中以實質上純錫電鍍工 件。應注意的是，程序模組2 1 2可包括純錫陽極或不溶性 鉑-鈦（Pt-Ti )陽極。控制器222可進一步程控而於經配 置以支援沖洗來自工件之實質上所有實質上純錫電鍍化學 之沖洗池中沖洗工件。控制器222可進一步程控而於經配 置以支援具適當金屬離子內含（例如以上所說明）之電鍍 槽的程序模組2 1 0中以錫及銀電鍍工件。應注意的是，程 序模組可包括例如不溶性Pt-Ti陽極或任何其他適當陽 極。控制器222或任何其他適當控制器可進一步程控而於 經配置以熱處理工件的熱處理模組中熱處理工件，造成錫 及錫-銀層混合及形成實質上均勻錫-銀合金特徵。控制器 222可進一步程控而以銅電沉積模組2 1 6於工件上沉積 銅。控制器222可進一步程控而以鎳電沉積模組2 1 4於工 件上沉積鎳。控制器222可進一步程控而以清洗模組260 清洗工件。在所示實施例中，顯示四個電沉積模組2 1 0、 -12- 201241242 212、214、216 及四個清洗模組 260、262、264、266。然 而，應注意的是，可配置更多或更少模組。藉由範例，可 僅配置錫（Sn )電沉積模組及錫-銀（SnAg )電沉積模 組。有關進一步範例，可配置具有錫（Sn )電沉積模組及 錫-銀（SnAg )電沉積模組之不同工具。有關進一步範 例，可配置多個重複電沉積模組以允許並列處理多項工 件，而增加系統產量。因此，系統組態之所有該等變化、 替代及修改均包括在內。 現在參照圖8，顯示示範電沉積程序模組2 1 0之方塊 圖。電沉積模組210可結合於Billerica MA之NEXX系統 的「Stratus」中具有之模組特徵，並可結合於2005年5 月12日於專利合作協定下發布之國際申請案 WO 2 00 5/04 2 8 04 A2中所揭露之特徵，其以提及之方式倂入本 文。示範電沉積模組具有外殼3 00，其包含流體3 02，其 中流體3 02可流經外殼3 00，及其中流體3 02可爲循環之 電解液。藉由傳送器280，工件載台272可從外殼300移 除，並可容納基板27 8。儘管顯示二基板，載台可容納更 多或更少基板。陽極310、312配置屏蔽板314、316及槳 或流體鼓動組件318及320。請注意，可配置更多或更少 組件。例如，可配置單一陽極。藉由進一步範例，陽極可 爲外殼300之一部分，或可不配置屏蔽板314、316及槳 或流體鼓動組件318及320。 可執行所描繪之程序，例如以下將以設備200進一步 說明。如同可體現，控制器220可適當程控而至少部分以 -13- 201241242 自動方式影響程序。 現在參照圖9，顯示示範程序流程圖400，其顯示於 工件上形成無鉛焊接劑凸塊之方法。根據示範實施例，例 如於方塊402，設備中工件可配置藉由具有複數開口之圖 案化光阻遮罩層覆蓋之導電種層。於方塊404，在包含例 如實質上純錫陽極或不溶性鈾-鈦陽極之錫電鑛槽中可沉 浸工件。在方塊406中，可形成電接觸至種層，且電位施 加於工件與陽極之間而造成沉積實質上純錫，例如於光阻 圖案特徵中沉積介於約2微米至約150微米之錫。在方塊 408中，工件可移動至沖洗池。在方塊410中，可沖洗來 自工件之贲質上所有實質上純錫電鍍化學。於方塊412, 工件可從沖洗池移除，並於方塊414，沉浸於包含錫及銀 離子及陽極（例如不溶性鈾-鈦陽極）之電鍍槽中。依據 方塊416，可形成電接觸至種層，且電位施加於工件與陽 極之間而造成錫-銀合金沉積。例如可於光阻圖案特徵中 沉積介於約2微米至約1 5 0微米之錫-銀合金》在方塊 418中，可移除光阻圖案化層，且依據方塊420，可實質 上移除所有未藉由電鍍之錫及錫-銀合金覆蓋之種層。諸 如方塊422中，例如以介於約210。(：至約230。(：（攝氏 度）熱處理工件，可造成錫及錫-銀層混合，而形成所欲 實質上均勻錫-銀合金特徵。在示範程序400中，錫及錫-銀層可具有任何適當厚度或組成，例如，錫層可爲約3 0 微米及錫-銀合金層爲約30微米，及熱處理之前，錫-銀 合金組成可爲介於約1 %及約7%重量銀，及熱處理之後， -14- 201241242 爲介於約〇 . 5 %至約3 . 5 %重量銀。藉由進一·步範例，錫層 可爲約10微米及錫-銀合金層爲約10微米，及熱處理之 前，錫-銀合金組成可爲介於約1 %及約7 %重量銀，及熱 處理之後，爲介於約0.5 %至約3.5 %重量銀。藉由進一步 範例，錫層可爲錫-銀層之約四分之一厚度。此外，在實 施例中，程序400可提供更多或更少步驟，或一或多項步 驟可於一或多項步驟或程序中組合。藉由進一步範例，錫 層可爲約1微米或10微米，及錫-銀層可介於約20微米 至約120微米。 根據實施例，提供以沉積而於工件上形成金屬特徵之 方法。工件配置用於電子裝置之焊接劑的下凸塊金屬層。 實質上純錫層係直接沉積至下凸塊金屬層。錫銀合金層係 沉積於實質上純錫層上。 在實施例中，可沖洗來自工件之實質上所有實質上純 錫電鍍化學。 在實施例中，藉由電沉積而完成沉積。 在實施例中，下凸塊金屬包含銅或鎳。 在實施例中，配置用於在具有導電種層之工件上形成 無鉛焊接劑凸塊之設備，導電種層係藉由具有複數特徵開 口之圖案化光阻遮罩層覆蓋。設備具有第一電鍍槽，其具 適應於在光阻圖案特徵中沉積實質上純錫層之金屬離子內 含。可配置沖洗池並適應於沖洗來自工件之實質上所有實 質上純錫電鍍化學。第二電鍍槽配置適應於在光阻圖案特 徵中沉積錫-銀合金層之金屬離子內含。 -15- 201241242 在實施例中，配置銅電沉積模組。 在實施例中，配置銅電沉積模組及鎳電沉積模組。 在贲施例中，配置清洗模組。 在贸施例中，藉由具有直接沉積實質上純錫層至用於 電子裝置之焊接劑之下凸塊金.屬層之步驟的程序，而準備 具有無鉛焊接劑特之電子裝置。配置沉積錫銀合金層至實 質上純錫層上之步驟。 在實施例中，配置沖洗來自電子裝置之實質上所有實 質上純錫電鍍化學之步驟。 在贲施例中，藉由電沉積而完成沉積。 在實施例中，下凸塊金屬包含銅或鎳。 在R施例中，配置於工件上形成無鉛焊接劑凸塊之方 法，該方法包含配置將工件配置導電種層之步驟，導電種 層係藉由具有複數特徵開口之圖案化光阻遮罩層覆蓋。工 件係沉浸於具金屬離子內含之第一電鑛槽中。該方法包含 配置電接觸至種層，及經由第一電鍍槽之金屬離子內含配 置電位以造成介於約2微米至約1 5 0微米之實質上純錫沉 積於光阻圖案特徵中。工件係沉浸於具金屬離子內含之第 二電鍍槽中。形成電接觸至種層，及經由第二電鍍槽中金 腸離子內含配置電位以造成介於約2微米至約150微米之 錫-銀合金沉積於光阻圖案特徵中。 在實施例中，方法可包括將工件移至沖洗池，沖洗來 自工件之實質上所有實質上純錫電鍍化學，及從沖洗池移 除工件。 -16- 201241242 在實施例中，移除光阻圖案化層。 在實施例中，移除實質上所有未藉由電鍍之錫及錫_ 銀合金覆蓋之種層。 在實施例中，以介於約攝氏210度至約230度熱處理 工件，以造成錫及錫-銀層混合及形成實質上均勻錫-銀合 金特徵。 在實施例中，錫層約30微米及錫-銀合金層約30微 米，及其中’在熱處理之前，錫-銀合金組成介.於約1%及 約7 %銀重量，及在熱處理之後，約〇 . 5 %至約3.5 %銀重 量。 在實施例中，錫層約1微米或約10微米，及錫-銀合 金層介於約20微米至約120微米。 在實施例中，錫層約10微米及錫-銀合金層約10微 米，及其中，在熱處理之前，錫-銀合金組成介於約1 %及 約7%銀重量，及在熱處理之後，約0.5%至約3.5%銀重 量。 在實施例中，錫層爲錫-銀層約四分之一厚度。 在實施例中，配置用於在具有導電種層之工件上形成 無鉛焊接劑凸塊之設備，導電種層係藉由具有複數特徵開 口之圖案化光阻遮罩層覆蓋》設備具有控制器可程控而於 經配置以支援具有適應於沉積實質上純錫層於工件上之金 屬離子內含的第一電鍍槽之第一程序模組中，以實質上純 錫電鍍工件。控制器進一步可程控而於經配置以支援具有 適應於沉積錫及銀層於工件上之金屬離子內含的第二電鍍 -17- 201241242 槽之第二程序模組中，以錫及銀電鍍工件。 在贲施例中，控制器進一步可程控而於沖洗池中沖洗 工件，該沖洗池經配置以支援沖洗來自工件之實質上所有 實質上純錫電鍍化學。 在實施例中，控制器進一步可程控而以銅電沉積模組 於工件上沉積銅。 在ff施例中，控制器進一步可程控而以鎳電沉積模組 於工件上沉積鎳。 在®施例中，控制器進一步可程控而以清洗模組清洗 工件。 在示範實施例中，提供用於處理一或多項工件電化學 形成無鉛凸塊圖案之方法。在一實施例中，無鉛凸塊係藉 由實質上二步驟沉積程序形成，第一步驟經由來自包含錫 離子（例如金屬離子內含）之電鍍溶液的實質上純錫之遮 罩沉積，及第二步驟經由來自包含錫離子及銀離子之控制 之混合物（例如金屬離子內含）之電鍍溶液的錫-銀合金 之遮罩沉積，該二步驟經控制以提供目標層1及層2厚度 T 1及T2，連同第二步驟經控制而提供X%合金組成，使 得在後續熱處理之後，二層混合及形成實質上均勻錫-銀 (SnAg )合金，該合金具有合金沉積步驟中沉積之X% Ag與實質上純錫沉積步驟中0% Ag之間之中間濃度。所 揭露之實施例避免諸如Ag之貴重金屬離子之沉浸沉積， 且下凸塊材料（UBM )表面上有機錯合劑排除UBM與焊 接劑介面之間可能形成空隙。諸如實質上純錫之較不貴重 -18- 201241242 金屬層於無鉛焊接劑之前電沉積於UBM上，Sn及：諸如 Ag及/或Cu之更貴重金屬之合金與Sn共同沉積作爲 SnAg或SnAgCu合金，以形成用於電子包裝之凸塊。 應理解的是上述說明僅爲描繪。熟悉本技藝之人士可 設計不同替代及修改而未偏離本發明。因此，本發明希望 包括落於申請項範圍內之所有該等替代、修改及變化。 【圖式簡單說明】 實施例之上述方面及其他特徵係於結合附圖之下列說 明中說明。藉由參照結合附圖之下列說明，可更佳理解以 上所說明之技術。在圖式中，不同圖式中相同代號係指相 同零件。圖式不一定按比例尺，於描繪技術之原理時，通 常予以強調。 圖1顯示沉積步驟之後，先前技術之截面圖； 圖2顯示沉積步驟之後，先前技術之截面圖； 圖3顯示熱處理之後，焊接劑凸塊之截面圖； 圖4顯示先前技術之自上而下部分，其中顯示在 UBM至SnAg介面存在空隙； 圖5顯示本揭露之實施例之自上而下部分，其中顯示 在UBM至SnAg介面存在空隙； 圖6顯示在第二沉積步驟之後，本揭露之實施例之截 面圖； 圖7顯示適於使用本揭露之實施例之製造程序的市售 晶圓電沉積機； -19- 201241242 圖8顯示電沉積模組；以及 圖9顯示程序流程圖。 【主要元件符號說明】 100 :絕緣膜 1 〇 1 :電接觸元件 1 02 :種層 1 〇 4 :光阻 1 〇 6 :下凸塊金屬 1 2 0 :焊接劑金屬 1 2 1 :純錫層 1 2 2 :錫-銀層 126 :球形 1 2 8 :金屬間化合物層 1 3 0 :純錫層 1 3 1 :純金屬層 2 0 0 :系統 202 :基板清洗模組 2 0 4 :裝載站 2 0 6 :負載端口 2 10 :錫-銀（SnAg)電沉積模組 212 :錫（Sn)電沉積模組 2 1 4 :鎳電沉積模組 2 1 6 :銅電沉積模組 -20 - 201241242 2 2 0、222 ：控芾丨J 230、 240 ：光學 23 2、242 ：介面 234 ' 236 、 238 ： 2 5 0 :工件 2 5 2 :結構 260 、 262 、 264 、 270 、 272 、 274 ： 27 8 :基板 2 8 0 :傳送器 300 :外殼 3 0 2 :流體 310 、 312 :陽極 3 14、3 16 :屏蔽 3 18、3 20 ：槳或 器 顯微鏡影像 區域 介面空隙 266 :清洗模組 基板載台 板 流體鼓動組件 -21 -TsnAg and CsnAg = 3.0 〇 / o. It has been considered to apply substantially pure silver (Ag) and substantially pure tin (Sn) to facilitate the manufacture of SnAg alloys, or even to apply Ag, followed by Cu, followed by Sn, which is then reflowed to form a SnAgCu alloy, due to substantially pure Ag and substantially Pure Sn plating materials are cheaper than SnAg alloy plating, and this method has a special cost advantage. When a combination of substantially pure metal layers is used, for the second reason, more precious metals need to be applied before the application of substantially pure tin: (1) It is difficult to deposit Ag on the Sn surface because of the problem of uncontrolled Ag immersion deposition on Sn. Control, thereby creating an unstable Sn/Ag interface that will cause product control problems between the sinking step and the heat treatment reflow step; (2) during the hot reflux procedure, substantially pure Ag does not melt but dissolves In Sn, 'The Ag metal layer is therefore unstable on the molten tin solder ball. -10- 201241242 The 'flows around the period during the melting of Sn and the complete dissolution of Ag between Sn. However, 'Ag is applied directly to the UBM material during the reflow process in which the intermetallic layer is formed. The presence of Ag between Sn and UBM causes void formation in the intermetallic layer, and these voids reduce the reliability of solder joint bonding. . Because SnAg materials are many times more expensive than Sll materials, the embodiments of the present disclosure provide the economics of a number of substantially pure Ag and substantially pure Sn processes, such as reducing solder deposition costs by up to about 50% or more, without loss soldering agents. Related disadvantages of joint reliability. A commercially available wafer electrodeposition machine suitable for use in the manufacturing process of the embodiments of the present disclosure will now be described with reference to Figure 7'. The disclosed embodiment can be implemented by a commercially available electrodeposition machine "Stratus" such as the NEXX system of Billerica MA. System 200 can include International Application WO 2005/042804 A2, issued May 12, 2005 under the Patent Cooperation Agreement. The disclosed features are incorporated herein by reference. The system 200 shown in the block diagram is formed as an exemplary system. Note that more or fewer modules can be configured with different configurations and locations. The industrial electrodeposition machine 200 can include a load port 206 whereby the previously patterned photoresist patterned substrate is inserted and withdrawn from the system. The loading station 204 can have a robotic arm that transfers the substrate 278 to the substrate carriers 27, 2, 72, 274, and then transfers to the modules 210, 212, 214, 216' 260, 262 by the transmitter 28 0, 264, 266 and continuous processing. The series may include a copper (Cu) electrodeposition module 216, a nickel (Ni) electrodeposition module 214, a tin (Sn) electrodeposition module 212, and a tin-silver (SnAg) electrodeposition module 210. The substrate can then be returned to the loading station 204, the substrate unloaded and delivered through the substrate cleaning module 202 and returned to the load port 206. -11 - 201241242 Cleaning modules 260, 262, 264, 266 can be configured using a cleaning step such as deionized water, for example, before and after the electrodeposition step. In another aspect, modules 260, 262, 264, and 266 can be flush or heat treated modules and cleaning modules. The controller 220 can be disposed in each station or module to sequentially arrange programs and/or transmitters in the station or module. The system controller 2 22 can be configured in the system 200 for the station or program module. The substrates are arranged in order and coordinate system actions such as host communication, batch loading and unloading, or other actions required by control system 200. Controller 222 can be programmed to support substantially pure tin plating in a program module 212 configured to have a plating bath containing a suitable metal ion (e.g., as described above). It should be noted that the program module 212 may include a pure tin anode or an insoluble platinum-titanium (Pt-Ti) anode. Controller 222 can be further programmed to flush the workpiece in a rinse tank configured to support flushing substantially all of the substantially pure tin plating chemistry from the workpiece. The controller 222 can be further programmed to plate the workpiece with tin and silver in a program module 210 that is configured to support a plating bath with a suitable metal ion (e.g., as described above). It should be noted that the program module can include, for example, an insoluble Pt-Ti anode or any other suitable anode. Controller 222 or any other suitable controller may be further programmed to heat treat the workpiece in a heat treatment module configured to heat treat the workpiece, resulting in a tin and tin-silver layer mixing and forming a substantially uniform tin-silver alloy feature. The controller 222 can be further programmed to deposit copper on the workpiece with the copper electrodeposition module 2 16 . The controller 222 can be further programmed to deposit nickel on the workpiece with the nickel electrodeposition module 2 14 . Controller 222 can be further programmed to clean the workpiece with cleaning module 260. In the illustrated embodiment, four electrodeposition modules 2 1 0, -12-201241242 212, 214, 216 and four cleaning modules 260, 262, 264, 266 are shown. However, it should be noted that more or fewer modules can be configured. By way of example, only tin (Sn) electrodeposition modules and tin-silver (SnAg) electrodeposition modules can be configured. For further examples, different tools with tin (Sn) electrodeposition modules and tin-silver (SnAg) electrodeposition modules can be configured. For further examples, multiple re-deposition modules can be configured to allow multiple workpieces to be processed in parallel, increasing system throughput. Therefore, all such changes, substitutions, and modifications to the system configuration are included. Referring now to Figure 8, a block diagram of an exemplary electrodeposition module 2 1 0 is shown. The electrodeposition module 210 can be combined with the module features of the "Stratus" of the NEXX system of Billerica MA, and can be combined with the international application WO 2 00 5/04 issued under the Patent Cooperation Agreement on May 12, 2005. The features disclosed in 2 8 04 A2 are incorporated herein by reference. The exemplary electrodeposition module has a housing 300 that contains a fluid 302, wherein fluid 032 can flow through the housing 300, and the fluid 032 therein can be a circulating electrolyte. The workpiece stage 272 can be removed from the housing 300 by the conveyor 280 and can accommodate the substrate 278. Although the two substrates are shown, the stage can accommodate more or fewer substrates. The anodes 310, 312 are configured with shield plates 314, 316 and paddle or fluid agitation assemblies 318 and 320. Note that more or fewer components can be configured. For example, a single anode can be configured. By way of further example, the anode can be part of the outer casing 300, or the shield plates 314, 316 and the paddle or fluid agitation assemblies 318 and 320 can be omitted. The depicted procedure can be performed, for example, as further illustrated by device 200. As can be appreciated, the controller 220 can be programmed to affect the program at least in part in an automatic manner from -13 to 201241242. Referring now to Figure 9, an exemplary program flow diagram 400 is shown showing a method of forming lead-free solder bumps on a workpiece. According to an exemplary embodiment, for example, at block 402, the workpiece in the apparatus can be configured with a conductive seed layer covered by a patterned photoresist mask having a plurality of openings. At block 404, the workpiece can be immersed in a tin ore tank containing, for example, a substantially pure tin anode or an insoluble uranium-titanium anode. In block 406, an electrical contact can be made to the seed layer and a potential is applied between the workpiece and the anode to cause deposition of substantially pure tin, such as depositing tin between about 2 microns and about 150 microns in the photoresist pattern feature. In block 408, the workpiece can be moved to the rinse tank. In block 410, all substantially pure tin plating chemistry from the enamel of the workpiece can be flushed. At block 412, the workpiece is removed from the rinse bath and, at block 414, immersed in a plating bath containing tin and silver ions and an anode (e.g., an insoluble uranium-titanium anode). According to block 416, electrical contact to the seed layer can be formed and a potential is applied between the workpiece and the anode to cause tin-silver alloy deposition. For example, a tin-silver alloy of between about 2 microns and about 150 microns can be deposited in the photoresist pattern feature. In block 418, the photoresist patterned layer can be removed and substantially removed according to block 420. All layers that are not covered by electroplated tin and tin-silver alloy. Such as in block 422, for example, at about 210. (: to about 230. (: degrees Celsius) heat treatment of the workpiece, which can cause the tin and tin-silver layers to mix to form the desired substantially uniform tin-silver alloy characteristics. In the demonstration procedure 400, the tin and tin-silver layer can Any suitable thickness or composition, for example, the tin layer can be about 30 microns and the tin-silver alloy layer can be about 30 microns, and the tin-silver alloy composition can be between about 1% and about 7% by weight prior to heat treatment. After the heat treatment, -14-201241242 is between about 5% and about 3.5% by weight of silver. By way of further example, the tin layer can be about 10 microns and the tin-silver alloy layer is about 10 microns. And prior to the heat treatment, the tin-silver alloy composition may be between about 1% and about 7% by weight silver, and after heat treatment, between about 0.5% and about 3.5% by weight silver. By way of further example, the tin layer may be Approximately one quarter of the thickness of the tin-silver layer. Further, in an embodiment, the program 400 may provide more or fewer steps, or one or more steps may be combined in one or more steps or procedures. The tin layer can be about 1 micron or 10 micron, and the tin-silver layer can be between about 20 microns and about 120 micron. According to an embodiment, there is provided a method of forming a metal feature on a workpiece by deposition. The workpiece is configured with a lower bump metal layer for a solder of an electronic device. A substantially pure tin layer is deposited directly onto the lower bump metal layer. A silver alloy layer is deposited on the substantially pure tin layer. In an embodiment, substantially all of the substantially pure tin plating chemistry from the workpiece can be rinsed. In an embodiment, the deposition is accomplished by electrodeposition. The lower bump metal comprises copper or nickel. In an embodiment, an apparatus for forming a lead-free solder bump on a workpiece having a conductive seed layer is provided, the conductive seed layer being patterned by a photoresist having a plurality of characteristic openings The mask layer is covered. The apparatus has a first plating bath having a metal ion inclusion adapted to deposit a substantially pure tin layer in the photoresist pattern feature. The rinse tank can be configured and adapted to rinse substantially all of the substantial from the workpiece Pure tin plating chemistry. The second plating bath configuration is adapted to deposit a metal ion inclusion of a tin-silver alloy layer in the photoresist pattern feature. -15- 201241242 In an embodiment, copper is configured In the embodiment, a copper electrodeposition module and a nickel electrodeposition module are disposed. In the embodiment, a cleaning module is disposed. In the trade example, by directly depositing a substantially pure tin layer to The procedure for the step of bumping the gold layer under the soldering agent of the electronic device, and preparing the electronic device having the lead-free soldering agent. The step of depositing the tin-silver alloy layer onto the substantially pure tin layer is configured. The step of rinsing substantially all of the substantially pure tin plating chemistry from the electronic device is configured. In the embodiment, the deposition is accomplished by electrodeposition. In an embodiment, the lower bump metal comprises copper or nickel. In an embodiment, a method of forming a lead-free solder bump on a workpiece includes the step of disposing a workpiece with a conductive seed layer, the conductive seed layer being covered by a patterned photoresist mask having a plurality of feature openings. The workpiece is immersed in the first electric ore tank containing metal ions. The method includes configuring electrical contact to the seed layer, and depositing a potential through the metal ion of the first plating bath to cause substantially pure tin between about 2 microns and about 150 microns to deposit in the photoresist pattern feature. The workpiece is immersed in a second plating bath containing metal ions. An electrical contact is formed to the seed layer, and a potential is placed in the metallization ion in the second plating bath to cause a tin-silver alloy between about 2 microns and about 150 microns to be deposited in the photoresist pattern feature. In an embodiment, the method can include moving the workpiece to the rinse tank, flushing substantially all of the substantially pure tin plating chemistry from the workpiece, and removing the workpiece from the rinse tank. -16- 201241242 In an embodiment, the photoresist patterned layer is removed. In an embodiment, substantially all of the layers not covered by the electroplated tin and tin-silver alloy are removed. In an embodiment, the workpiece is heat treated at a temperature of between about 210 degrees Celsius and about 230 degrees to cause the tin and tin-silver layers to mix and form a substantially uniform tin-silver alloy feature. In an embodiment, the tin layer is about 30 microns and the tin-silver alloy layer is about 30 microns, and wherein the 'tin-silver alloy composition is between about 1% and about 7% silver weight before heat treatment, and after heat treatment, About 5. 5 % to about 3.5% silver weight. In an embodiment, the tin layer is about 1 micron or about 10 microns, and the tin-silver alloy layer is between about 20 microns and about 120 microns. In an embodiment, the tin layer is about 10 microns and the tin-silver alloy layer is about 10 microns, and wherein the tin-silver alloy composition is between about 1% and about 7% silver weight prior to heat treatment, and after heat treatment, 0.5% to about 3.5% silver weight. In an embodiment, the tin layer is about one quarter of the thickness of the tin-silver layer. In an embodiment, an apparatus for forming a lead-free solder bump on a workpiece having a conductive seed layer is provided, the conductive seed layer being covered by a patterned photoresist mask layer having a plurality of feature openings. The program is programmed to support the first process module having a first plating bath adapted to deposit a substantially pure tin layer on the workpiece, and the workpiece is plated with substantially pure tin. The controller is further programmable to support the second program module having a second plating -17-201241242 groove adapted to deposit a tin and a silver layer on the workpiece, to plate the workpiece with tin and silver . In an embodiment, the controller is further programmable to flush the workpiece in the rinse tank, the rinse tank configured to support flushing substantially all of the substantially pure tin plating chemistry from the workpiece. In an embodiment, the controller is further programmable to deposit copper on the workpiece with a copper electrodeposition module. In the ff embodiment, the controller is further programmable to deposit nickel on the workpiece using a nickel electrodeposition module. In the ® example, the controller is further programmable to clean the workpiece with a cleaning module. In an exemplary embodiment, a method for electrochemically forming a lead-free bump pattern for processing one or more workpieces is provided. In one embodiment, the lead-free bump is formed by a substantially two-step deposition process, the first step being deposited via a mask of substantially pure tin from a plating solution containing tin ions (eg, metal ions), and The second step is deposited via a mask of tin-silver alloy from a plating solution containing a controlled mixture of tin ions and silver ions (eg, metal ion contained), the two steps being controlled to provide a target layer 1 and layer 2 thickness T 1 And T2, along with the second step controlled to provide an X% alloy composition such that after subsequent heat treatment, the two layers are mixed and form a substantially uniform tin-silver (SnAg) alloy having X% Ag deposited during the alloy deposition step. The intermediate concentration between 0% Ag and the substantially pure tin deposition step. The disclosed embodiments avoid immersion deposition of precious metal ions such as Ag, and organic dopants on the surface of the under bump material (UBM) may form voids between the UBM and the solder interface. Less expensive than pure tin -18- 201241242 The metal layer is electrodeposited on the UBM prior to the lead-free solder. Sn and alloys of more noble metals such as Ag and/or Cu are co-deposited with Sn as SnAg or SnAgCu alloy. To form bumps for electronic packaging. It should be understood that the above description is only a depiction. Various alternatives and modifications can be devised by those skilled in the art without departing from the invention. Accordingly, the present invention is intended to embrace all such alternatives, modifications and BRIEF DESCRIPTION OF THE DRAWINGS The above aspects and other features of the embodiments are described in the following description in conjunction with the drawings. The above described techniques are better understood by reference to the following description in conjunction with the drawings. In the drawings, the same reference numerals in the different drawings refer to the same parts. The schema is not necessarily to scale and is often emphasized when describing the principles of the technology. Figure 1 shows a cross-sectional view of the prior art after the deposition step; Figure 2 shows a cross-sectional view of the prior art after the deposition step; Figure 3 shows a cross-sectional view of the solder bump after the heat treatment; Figure 4 shows the top-down of the prior art Part, wherein there is a void in the UBM to SnAg interface; Figure 5 shows the top-down portion of the embodiment of the present disclosure showing voids in the UBM to SnAg interface; Figure 6 shows the disclosure after the second deposition step A cross-sectional view of an embodiment; Figure 7 shows a commercially available wafer electrodeposition machine suitable for use with the fabrication process of the embodiments of the present disclosure; -19-201241242 Figure 8 shows an electrodeposition module; and Figure 9 shows a program flow diagram. [Main component symbol description] 100 : Insulation film 1 〇1 : Electrical contact element 1 02 : Seed layer 1 〇 4 : Photoresist 1 〇 6 : Lower bump metal 1 2 0 : Solder metal 1 2 1 : Pure tin layer 1 2 2 : tin-silver layer 126: spherical 1 2 8 : intermetallic compound layer 1 3 0 : pure tin layer 1 3 1 : pure metal layer 2 0 0 : system 202: substrate cleaning module 2 0 4 : loading station 2 0 6 : Load port 2 10 : Tin-silver (SnAg) electrodeposition module 212: Tin (Sn) electrodeposition module 2 1 4: Nickel electrodeposition module 2 1 6 : Copper electrodeposition module-20 - 201241242 2 2 0, 222: Control J 230, 240: Optical 23 2, 242: Interface 234 ' 236 , 238 : 2 5 0 : Workpiece 2 5 2 : Structure 260 , 262 , 264 , 270 , 272 , 274 : 27 8 : Substrate 2 8 0 : Transmitter 300 : Housing 3 0 2 : Fluid 310 , 312 : Anode 3 14 , 3 16 : Shield 3 18 , 3 20 : Paddle or microscope image area interface gap 266 : Cleaning module substrate Platen fluid agitating assembly-21 -