WO2012081237A1 - Semiconductor device and method for controlling same - Google Patents

Semiconductor device and method for controlling same Download PDF

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Publication number
WO2012081237A1
WO2012081237A1 PCT/JP2011/006961 JP2011006961W WO2012081237A1 WO 2012081237 A1 WO2012081237 A1 WO 2012081237A1 JP 2011006961 W JP2011006961 W JP 2011006961W WO 2012081237 A1 WO2012081237 A1 WO 2012081237A1
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Prior art keywords
gate electrode
current
ohmic
electrode
voltage
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PCT/JP2011/006961
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French (fr)
Japanese (ja)
Inventor
優人 山際
柳原　学
真吾 橋詰
文智 井腰
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パナソニック株式会社
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Priority to JP2012548654A priority Critical patent/JP5654044B2/en
Publication of WO2012081237A1 publication Critical patent/WO2012081237A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1066—Gate region of field-effect devices with PN junction gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
    • H01L29/2003—Nitride compounds

Definitions

  • the present invention relates to a semiconductor device and a control method thereof, and more particularly, to a semiconductor device including a semiconductor element capable of flowing a current bidirectionally and a control method thereof.
  • a wide gap semiconductor such as a group III nitride semiconductor represented by GaN or silicon carbide (SiC) has been studied.
  • a wide gap semiconductor has a dielectric breakdown electric field about an order of magnitude higher than that of silicon (Si).
  • AlGaN aluminum gallium nitride
  • GaN gallium nitride
  • 2DEG high mobility two-dimensional electron gas
  • a bidirectional semiconductor device can be formed with a single semiconductor device (see, for example, Patent Document 1). .
  • FIG. 8 is a diagram showing a configuration of a conventional semiconductor element 300 described in Patent Document 1.
  • a conventional semiconductor element 300 includes a substrate 301, a semiconductor layer stack 302, a first electrode 303a, a second electrode 303b, a first gate electrode 304a, and a second gate electrode 304b. Is provided.
  • the semiconductor element 300 causes the power supply voltage to be reduced between the first electrode 303a and the second electrode 303b via the channel.
  • a current can flow in a direction corresponding to the polarity.
  • the conventional semiconductor device has a problem that power consumption increases.
  • a first gate current flows from the first gate electrode toward the channel region immediately below the first gate electrode.
  • a second gate current flows from the second gate electrode toward the channel region immediately below the second gate electrode.
  • the potential of the second gate electrode is higher than the second electrode by the potential difference VGb between the second gate electrode and the second electrode, and higher than the first electrode by the sum of the power supply voltage VSba and the potential difference VGb. .
  • the second gate current flows not only through the second electrode but also through the first electrode.
  • the semiconductor device When the semiconductor device is in a conductive state and the power supply voltage VSba increases, the potential difference between the second gate electrode and the first electrode increases. For this reason, the second gate current increases as the power supply voltage VSba increases. Therefore, the driving power for driving the second gate electrode is increased.
  • the present invention has been made to solve the above-described problems, and an object thereof is to provide a semiconductor device that can suppress an increase in power consumption and a driving method thereof.
  • a semiconductor device is a semiconductor device including a semiconductor element that can flow a current bidirectionally, and the semiconductor element is formed over the substrate and the substrate And a pair of ohmic electrodes formed on or above the semiconductor layer and spaced apart from each other, and between the pair of ohmic electrodes on or above the semiconductor layer.
  • a pair of gate electrodes corresponding to each of the pair of ohmic electrodes, and the semiconductor device further bi-directionally passes the semiconductor element between the pair of ohmic electrodes via the channel region.
  • a control unit configured to make a conductive state in which a current can flow; and when the semiconductor element is in the conductive state, the control unit is configured to be a high one of the pair of ohmic electrodes.
  • the potential of the high-potential side gate electrode which is a potential corresponding to the high-potential-side ohmic electrode
  • a first electric signal is supplied to the high potential side gate electrode so as to be lower than the potential of the low potential side gate electrode which is a gate electrode corresponding to the low potential side ohmic electrode, and A second electric signal is supplied to the low potential side gate electrode.
  • the magnitude of the gate current flowing through the high potential side gate electrode depends on the potential difference between the high potential side ohmic electrode and the high potential side gate electrode. Increase is suppressed and power consumption can be reduced.
  • the magnitude of the saturation current of the current flowing between the pair of ohmic electrodes depends on the potential difference between the low-potential side ohmic electrode and the low-potential side gate electrode. The magnitude of the current can be maintained. Therefore, power consumption can be reduced while maintaining the characteristics of the power supply current and the power supply voltage.
  • control unit includes a first voltage source that generates a first voltage that is equal to or higher than a threshold voltage of the pair of gate electrodes, and a second voltage source that generates a second voltage higher than the first voltage. And the control unit supplies the first voltage as the first electric signal to the high potential side gate electrode, and supplies the second voltage as the second electric signal to the low potential side gate electrode. Also good.
  • a high voltage or a low voltage can be easily supplied between each gate electrode and the corresponding ohmic electrode. Accordingly, since the current flowing from the high potential side gate electrode to the channel region can be reduced while maintaining the characteristics of the power supply current and the power supply voltage, the driving power of the high potential side gate electrode can be suppressed.
  • the control unit may include a first current source that generates a first current for applying a voltage that is equal to or higher than a threshold voltage of the pair of gate electrodes, and a second current that generates a second current larger than the first current. And the controller supplies the first current to the high potential side gate electrode as the first electrical signal and supplies the second current to the low potential side gate electrode as the second electrical signal. May be.
  • the control unit may supply a current for applying a voltage equal to or higher than a threshold voltage of the pair of gate electrodes to the pair of gate electrodes as the first electric signal and the second electric signal.
  • the threshold voltage of the pair of gate electrodes may be positive.
  • the semiconductor element can be in a cut-off state.
  • the semiconductor element may further include a pair of control layers having P-type conductivity formed between the pair of gate electrodes and the semiconductor layer.
  • the threshold voltage of the first gate electrode and the threshold voltage of the second gate electrode can be made positive.
  • the pair of gate electrodes may be in Schottky junction with the semiconductor layer.
  • the threshold voltage of the first gate electrode and the threshold voltage of the second gate electrode can be made positive.
  • the semiconductor element may further include an insulating film formed between the pair of gate electrodes and the semiconductor layer.
  • the threshold voltage of the first gate electrode and the threshold voltage of the second gate electrode can be made positive.
  • the substrate may be a silicon substrate, a sapphire substrate, or a silicon carbide substrate.
  • a method for controlling a semiconductor device is a method for controlling a semiconductor device in which current can flow in both directions.
  • the semiconductor device is formed over a substrate, the channel, and a channel.
  • a pair of gate electrodes corresponding to each of the pair of ohmic electrodes, and the method of controlling the semiconductor device includes a high potential side gate which is a gate electrode corresponding to a high potential side ohmic electrode of the pair of ohmic electrodes
  • a first electric signal is supplied to the electrode, and a second electric signal is applied to the low potential side gate electrode which is a gate electrode corresponding to the low potential side ohmic electrode of the pair of ohmic electrodes.
  • the potential of the high potential side gate electrode when the high potential side ohmic electrode is used as a reference is the low potential side ohmic electrode
  • the first electric signal and the second electric signal are supplied so as to be lower than the potential of the low-potential side gate electrode with reference to.
  • the magnitude of the gate current flowing through the high potential side gate electrode depends on the potential difference between the high potential side ohmic electrode and the high potential side gate electrode. Increase is suppressed and power consumption can be reduced.
  • the magnitude of the saturation current of the current flowing between the pair of ohmic electrodes depends on the potential difference between the low-potential side ohmic electrode and the low-potential side gate electrode. The magnitude of the current can be maintained. Therefore, power consumption can be reduced while maintaining the characteristics of the power supply current and the power supply voltage.
  • the semiconductor device according to the present invention can suppress an increase in power consumption.
  • FIG. 1A is a cross-sectional view showing an example of the configuration of the semiconductor device according to Embodiment 1 of the present invention.
  • FIG. 1B is a cross-sectional view showing an example of the configuration of the semiconductor device according to Embodiment 1 of the present invention.
  • FIG. 2 is a diagram for explaining the behavior of the channel region in the semiconductor device according to the first embodiment of the present invention.
  • FIG. 3A is a diagram showing an example of the relationship between the power supply current ISba and the power supply voltage VSba according to Embodiment 1 of the present invention.
  • FIG. 3B is a diagram showing an example of the relationship between the gate current IGb and the power supply voltage VSba according to Embodiment 1 of the present invention.
  • FIG. 4 is a cross-sectional view showing an example of the configuration of the semiconductor device according to the first modification of the first embodiment of the present invention.
  • FIG. 5 is a cross-sectional view showing an example of the configuration of the semiconductor device according to Modification 2 of Embodiment 1 of the present invention.
  • FIG. 6 is a cross-sectional view showing an example of the configuration of the semiconductor device according to the second embodiment of the present invention.
  • FIG. 7 is a cross-sectional view showing an example of the configuration of a semiconductor device according to a variation of the second embodiment of the present invention.
  • FIG. 8 is a cross-sectional view showing a configuration of a conventional semiconductor element.
  • a semiconductor device includes a semiconductor element having a pair of gate electrodes and a pair of ohmic electrodes, and applying a voltage higher than a threshold voltage to the pair of gate electrodes. And a control unit for bringing the ohmic electrodes into a conductive state.
  • the control unit applies a low voltage to the gate electrode corresponding to the high-potential side ohmic electrode and applies a high voltage to the gate electrode corresponding to the low-potential side ohmic electrode when the semiconductor element is in a conductive state. It is characterized by doing.
  • FIGS. 1A and 1B are cross-sectional views showing an example of the configuration of the semiconductor device 10 according to the first embodiment of the present invention.
  • the semiconductor device 10 includes a semiconductor element 100 and a control unit 120.
  • the semiconductor element 100 can flow a current bidirectionally according to the polarity of the power supply voltage VSba of the power supply 130.
  • a semiconductor element 100 includes a substrate 101, a semiconductor layer stack 102, a first ohmic electrode 104a, a second ohmic electrode 104b, a first gate electrode 105a, and a second gate.
  • the electrode 105b, the first ohmic terminal 106a, the second ohmic terminal 106b, the first gate terminal 107a, the second gate terminal 107b, the first control layer 108a, and the second control layer 108b are provided.
  • the substrate 101 is, for example, a semiconductor substrate such as silicon (Si).
  • the substrate 101 may be a sapphire substrate or a silicon carbide (SiC) substrate.
  • the semiconductor layer stack 102 is formed on the substrate 101 and has a channel region 103.
  • the semiconductor layer stack 102 is made of, for example, GaN / AlGaN.
  • the first ohmic electrode 104a and the second ohmic electrode 104b are a pair of ohmic electrodes formed on or above the semiconductor layer stack 102 so as to be separated from each other.
  • the first ohmic electrode 104a and the second ohmic electrode 104b have, for example, a stacked structure of titanium (Ti) and aluminum (Al).
  • the first gate electrode 105a is one of a pair of gate electrodes formed between the pair of ohmic electrodes on or above the semiconductor layer stack 102. Specifically, the first gate electrode 105a is formed between the first ohmic electrode 104a and the second ohmic electrode 104b.
  • the first gate electrode 105a corresponds to one of a pair of ohmic electrodes. Specifically, the first gate electrode 105a corresponds to the first ohmic electrode 104a, and is formed in a region closer to the first ohmic electrode 104a than the second ohmic electrode 104b.
  • the first gate electrode 105a is made of nickel (Ni), for example.
  • the ohmic electrode and the gate electrode corresponding to the ohmic electrode are a pair of electrodes to which a voltage for forming a channel in the channel region 103 is applied.
  • the first gate electrode 105a corresponding to the first ohmic electrode 104a is supplied with a potential higher than the threshold voltage of the first gate electrode 105a, which is a potential when the first ohmic electrode 104a is used as a reference. In this case, a channel is generated in the channel region 103 below the first gate electrode 105a.
  • the threshold voltage of the first gate electrode 105a is positive, for example.
  • the second gate electrode 105b is the other of the pair of gate electrodes formed between the pair of ohmic electrodes on or above the semiconductor layer stack 102. Specifically, the second gate electrode 105b is formed between the first gate electrode 105a and the second ohmic electrode 104b.
  • the second gate electrode 105b corresponds to the other of the pair of ohmic electrodes. Specifically, the second gate electrode 105b corresponds to the second ohmic electrode 104b, and is formed in a region closer to the second ohmic electrode 104b than the first ohmic electrode 104a.
  • the second gate electrode 105b is made of nickel, for example.
  • the second gate electrode 105b corresponding to the second ohmic electrode 104b has a potential when the second ohmic electrode 104b is used as a reference and is equal to or higher than the threshold voltage of the second gate electrode 105b.
  • a channel is generated in the channel region 103 below the second gate electrode 105b.
  • the threshold voltage of the second gate electrode 105b is positive, for example.
  • the first ohmic terminal 106a is connected to the first ohmic electrode 104a.
  • the first ohmic terminal 106 a is a terminal for connecting a voltage source (or current source) included in the control unit 120 and the power source 130.
  • the second ohmic terminal 106b is connected to the second ohmic electrode 104b.
  • the second ohmic terminal 106 b is a terminal for connecting a voltage source (or current source) included in the control unit 120 and the power source 130.
  • the first gate terminal 107a is connected to the first gate electrode 105a.
  • the first gate terminal 107a is a terminal for connecting a voltage source (or current source) included in the control unit 120.
  • the second gate terminal 107b is connected to the second gate electrode 105b.
  • the second gate terminal 107b is a terminal for connecting a voltage source (or current source) included in the control unit 120.
  • the first control layer 108a is a control layer having P-type conductivity formed between the first gate electrode 105a and the semiconductor layer stack 102.
  • the first control layer 108a is made of, for example, P-GaN.
  • the second control layer 108b is a control layer having P-type conductivity, which is formed between the second gate electrode 105b and the semiconductor layer stack 102.
  • the second control layer 108b is made of, for example, P-GaN.
  • Each of the first control layer 108 a and the second control layer 108 b forms a PN junction with the channel region 103.
  • the control unit 120 is a circuit for bringing the semiconductor element 100 into a conductive state.
  • the conduction state is a state in which a current can flow in both directions through the channel region 103 between the pair of ohmic electrodes (the first ohmic electrode 104a and the second ohmic electrode 104b).
  • the control unit 120 includes voltage sources 121a, 121b, 122a and 122b, and switches 123a and 123b.
  • the voltage source 121a is an example of a first voltage source that generates a first voltage that is equal to or higher than a threshold voltage of a pair of gate electrodes.
  • the voltage source 121a is connected between the first ohmic terminal 106a and the first gate terminal 107a via a switch 123a.
  • the voltage source 121a has a first potential that is the potential of the first gate electrode 105a when the first ohmic electrode 104a is used as a reference, so that the first potential is equal to or higher than the threshold voltage of the first gate electrode 105a.
  • a gate voltage VGa1 is applied between the one gate electrode 105a and the first ohmic electrode 104a.
  • the gate voltage VGa1 is an example of the first voltage, and is a voltage that is equal to or higher than the threshold voltage of the first gate electrode 105a.
  • the voltage source 122a is an example of a second voltage source that generates a second voltage higher than the first voltage.
  • the voltage source 121a is connected between the first ohmic terminal 106a and the first gate terminal 107a via a switch 123a.
  • the voltage source 122a applies the gate voltage VGa2 between the first gate electrode 105a and the first ohmic electrode 104a so that the first potential is equal to or higher than the threshold voltage of the first gate electrode 105a.
  • the gate voltage VGa2 is an example of a second voltage, which is equal to or higher than the threshold voltage of the first gate electrode 105a and higher than the gate voltage VGa1.
  • the switch 123a selects either the voltage source 121a or the voltage source 122a according to the polarity of the power supply voltage VSba of the power supply 130. Specifically, the switch 123a has a high voltage when the power supply voltage VSba of the power supply 130 is positive, that is, when the potential of the second ohmic electrode 104b is higher than the potential of the first ohmic electrode 104a (see FIG. 1A). Source 122a is selected. Further, the switch 123a switches the low voltage source 121a when the power supply voltage VSba of the power supply 130 is negative, that is, when the potential of the second ohmic electrode 104b is lower than the potential of the first ohmic electrode 104a (see FIG. 1B). select.
  • the voltage source 121b is an example of a first voltage source that generates a first voltage that is equal to or higher than a threshold voltage of a pair of gate electrodes.
  • the voltage source 121b is connected between the second ohmic terminal 106b and the second gate terminal 107b via a switch 123b.
  • the voltage source 121b is configured so that the second potential, which is the potential of the second gate electrode 105b with respect to the second ohmic electrode 104b, is equal to or higher than the threshold voltage of the second gate electrode 105b.
  • a gate voltage VGb1 is applied between the two gate electrodes 105b and the second ohmic electrode 104b.
  • the gate voltage VGb1 is an example of the first voltage, and is a voltage equal to or higher than the threshold voltage of the second gate electrode 105b. Further, the gate voltage VGb1 may be equal to the gate voltage VGa1.
  • the voltage source 122b is an example of a second voltage source that generates a second voltage higher than the first voltage.
  • the voltage source 121b is connected between the second ohmic terminal 106b and the second gate terminal 107b via a switch 123b.
  • the voltage source 122b applies the gate voltage VGb2 between the second gate electrode 105b and the second ohmic electrode 104b so that the second potential is equal to or higher than the threshold voltage of the second gate electrode 105b.
  • the gate voltage VGb2 is an example of a second voltage, which is equal to or higher than the threshold voltage of the second gate electrode 105b and higher than the gate voltage VGb1. Further, the gate voltage VGb2 may be equal to the gate voltage VGa2.
  • the switch 123b selects either the voltage source 121b or the voltage source 122b according to the polarity of the power supply voltage VSba of the power supply 130. Specifically, the switch 123b has a low voltage when the power supply voltage VSba of the power supply 130 is positive, that is, when the potential of the second ohmic electrode 104b is higher than the potential of the first ohmic electrode 104a (see FIG. 1A). The source 121b is selected. Further, the switch 123b switches the high voltage source 122b when the power supply voltage VSba of the power supply 130 is negative, that is, when the potential of the second ohmic electrode 104b is lower than the potential of the first ohmic electrode 104a (see FIG. 1B). select.
  • the control unit 120 has a potential when the high-potential-side ohmic electrode of the pair of ohmic electrodes is used as a reference, and the high-potential-side ohmic electrode.
  • the potential of the high-potential-side gate electrode that is the corresponding gate electrode is a potential when the low-potential-side ohmic electrode is used as a reference, and the low-potential-side gate electrode that is the gate electrode corresponding to the low-potential-side ohmic electrode
  • the first electric signal is supplied to the high potential side gate electrode and the second electric signal is supplied to the low potential side gate electrode so as to be lower than the first potential.
  • the high-potential-side ohmic electrode and the high-potential-side gate electrode are the second ohmic electrode 104b and the second gate electrode 105b.
  • the low potential side ohmic electrode and the low potential side gate electrode are the first ohmic electrode 104a and the first gate electrode 105a.
  • the gate voltage VGb1 is supplied as a first electric signal from the low voltage source 121b to the second gate electrode 105b which is the high potential side gate electrode.
  • the gate voltage VGa2 is supplied as the second electric signal from the high voltage source 122a to the first gate electrode 105a which is the low potential side gate electrode. At this time, VGa2> VGb1.
  • the high-potential-side ohmic electrode and the high-potential-side gate electrode are the first ohmic electrode 104a and the first gate electrode 105a.
  • the low potential side ohmic electrode and the low potential side gate electrode are the second ohmic electrode 104b and the second gate electrode 105b.
  • the gate voltage VGa1 is supplied as a first electric signal from the low voltage source 121a to the first gate electrode 105a which is the high potential side gate electrode.
  • the gate voltage VGb2 is supplied as a second electric signal from the high voltage source 122b to the second gate electrode 105b, which is the low potential side gate electrode. At this time, VGb2> VGa1.
  • FIG. 2 is a diagram for explaining the behavior of the channel region 103 when the semiconductor element 100 according to the first embodiment of the present invention is in a conductive state.
  • a potential VGa equal to or higher than the threshold voltage of the first gate electrode 105a is applied to the first gate electrode 105a with the first ohmic electrode 104a as a reference, and a potential VGb equal to or higher than the threshold voltage of the second gate electrode 105b is equal to the second ohmic.
  • the semiconductor element 100 becomes conductive.
  • a current ISba flows between the first ohmic electrode 104a and the second ohmic electrode 104b by applying the power supply voltage VSba between the first ohmic electrode 104a and the second ohmic electrode 104b.
  • the direction of the current ISba is determined according to the polarity of the power supply voltage VSba. That is, of the first ohmic electrode 104a and the second ohmic electrode 104b, the current ISba flows from the high potential side ohmic electrode to the low potential side ohmic electrode.
  • FIG. 3A is a diagram showing an example of the relationship between ISba and VSba according to Embodiment 1 of the present invention. As shown in FIG. 3A, as the power supply voltage VSba increases, the current ISba also increases.
  • the potential of the first gate electrode 105a is higher by VGa than the potential of the first ohmic electrode 104a. Therefore, the first gate current IGa flows from the first gate electrode 105a to the channel region 103 through the first control layer 108a.
  • the potential of the second gate electrode 105b is higher by VGb than the potential of the second ohmic electrode 104b, and higher by VSba + VGb than the potential of the first ohmic electrode 104a. Therefore, the second gate current IGb flows from the second gate electrode 105b to the channel region 103 through the second control layer 108b.
  • Resistors 109 a, 109 b and 109 c exist inside the semiconductor element 100.
  • the resistor 109a is a resistor from the first ohmic electrode 104a to the point A in the channel region immediately below the first gate electrode 105a.
  • the resistor 109b is the resistance of the channel region from point A in the channel region immediately below the first gate electrode 105a to point B in the channel region immediately below the second gate electrode 105b.
  • the resistor 109c is a resistor from the point B of the channel region immediately below the second gate electrode 105b to the second ohmic electrode 104b.
  • the potential at point A in the channel region immediately below the first gate electrode 105a is higher than the potential at the first ohmic terminal 106a due to voltage drop caused by ISba and the resistor 109a. Since the potential at the point A rises as ISba increases, the voltage applied between the first gate electrode 105a and the point A becomes smaller than VGa as ISba increases.
  • ISba When ISba further increases and no channel is formed at point A, ISba saturates as shown in FIG. 3A. Whether or not a channel is formed at the point A is determined by the potential difference between the point A and the first gate electrode 105a. Therefore, the potential of the first gate electrode 105a is high when the potential of the first ohmic electrode 104a is used as a reference. As a result, the channel at point A is more easily maintained.
  • the magnitude of the saturation current of ISba depends on the magnitude of VGa. That is, the magnitude of the saturation current of ISba depends on the potential difference between the first gate electrode 105a and the first ohmic electrode 104a. In other words, the magnitude of the saturation current of ISba depends on the voltage applied between the low potential side ohmic electrode and the low potential side gate electrode.
  • the potential at point B in the channel region immediately below the second gate electrode 105b is lower than the potential of the second ohmic terminal 106b due to voltage drop caused by ISba and the resistor 109c.
  • the potential at the point B with respect to the second ohmic terminal 106b decreases as ISba increases.
  • a voltage VGb is applied to the second gate terminal 107b with respect to the second ohmic terminal 106b.
  • the voltage applied between the second gate electrode 105b and the point B increases with respect to VGb as ISba increases. Therefore, when the semiconductor element 100 is in a conductive state, when the potential VGb equal to or higher than the threshold voltage of the second gate electrode 105b is applied to the second gate electrode 105b with respect to the second ohmic electrode 104b, ISba increases. Even so, a channel is still formed at point B.
  • the gate current IGb flowing through the second gate terminal 107b increases as the potential difference between the second gate electrode 105b and the second ohmic electrode 104b increases.
  • the gate current flowing through the high potential side gate electrode increases as the potential difference between the high potential side gate electrode and the high potential side ohmic electrode increases.
  • the potential at point B in the channel region immediately below the second gate electrode 105b is higher than the potential at the second ohmic terminal 106b due to voltage drop caused by ISba and the resistor 109c. Since the potential at the point B rises as ISba increases, the voltage applied between the second gate electrode 105b and the point B increases with respect to VGb as ISba increases.
  • the magnitude of the saturation current of ISba depends on the magnitude of VGb. That is, the magnitude of the saturation current of ISba depends on the potential difference between the second gate electrode 105b and the second ohmic electrode 104b. In other words, the magnitude of the saturation current of ISba depends on the voltage applied between the low potential side ohmic electrode and the low potential side gate electrode.
  • a voltage of VGa is applied to the first gate terminal 107a with respect to the first ohmic terminal 106a.
  • the voltage applied between the first gate electrode 105a and the point A increases with respect to VGa as the absolute value of ISba increases. Therefore, when the semiconductor element 100 is in a conductive state, when a potential VGa that is equal to or higher than the threshold voltage of the first gate electrode 105a is applied to the first gate electrode 105a with respect to the first ohmic electrode 104a, the absolute value of ISba. Even if increases, a channel is still formed at point A.
  • the magnitude of the ISba saturation current depends on the potential difference between the low potential side ohmic electrode and the low potential side gate electrode. Further, the magnitude of the gate current flowing through the high potential side gate electrode depends on the potential difference between the high potential side ohmic electrode and the high potential side gate electrode.
  • the saturation current of ISba is increased.
  • the gate current can be reduced while maintaining the thickness.
  • the control unit 120 of the semiconductor device 10 includes two voltage sources 121a and 122a between the first ohmic terminal 106a and the first gate terminal 107a.
  • the two voltage sources 121a and 122a generate gate voltages VGa1 (first voltage) and VGa2 (second voltage) that are equal to or higher than the threshold voltage of the first gate electrode 105a, respectively.
  • the switch 123a selects one of the voltage sources 121a and 122a. That is, the switch 123a switches the voltage applied between the first ohmic terminal 106a and the first gate terminal 107a.
  • VGa1 is equal to or higher than the threshold voltage of the first gate electrode 105a and lower than VGa2.
  • the magnitude of VGa2 is set so that the saturation current of ISba can flow when VSba> 0.
  • control unit 120 includes the voltage source 121a for low voltage and the voltage source 121b for high voltage, and selects a voltage to be applied to the first gate electrode 105a. That is, the control unit 120 can apply the low voltage VGa1 or the high voltage VGa2 to the first gate electrode 105a by the switch 123a.
  • control unit 120 includes two voltage sources 121b and 122b between the second ohmic terminal 106b and the second gate terminal 107b.
  • the two voltage sources 121b and 122b generate gate voltages VGb1 (first voltage) and VGb2 (second voltage) that are equal to or higher than the threshold voltage of the second gate electrode 105b, respectively.
  • the switch 123b selects one of the voltage sources 121b and 122b. That is, the switch 123b switches the voltage applied between the second ohmic terminal 106b and the second gate terminal 107b.
  • VGb1 is equal to or higher than the threshold voltage of the second gate electrode 105b and lower than VGb2.
  • the magnitude of VGb2 is set so that the saturation current of ISba can flow when VSba ⁇ 0.
  • VGa2 When VSba> 0, a high voltage VGa2 is applied between the low potential side first gate terminal 107a and the low potential side first ohmic terminal 106a.
  • a voltage of VGb1 which is a low voltage, is applied between the second gate terminal 107b on the high potential side and the second ohmic terminal 106b on the high potential side.
  • VGa2 that is a high voltage is between the first gate terminal 107a and the first ohmic terminal 106a, and a high voltage is between the second gate terminal 107b and the second ohmic terminal 106b.
  • IGb can be suppressed.
  • the characteristics of IGb and VSba are shown in FIG. 3B.
  • the gate current IGb flowing from the second gate electrode 105b toward the channel region 103 increases as the potential difference between the second gate electrode 105b and the first ohmic electrode 104a increases.
  • the potential difference between the second gate electrode 105b and the first ohmic electrode 104a is VSba + VGb2.
  • the potential difference between the second gate electrode 105b and the first ohmic electrode 104a is VSba + VGb1.
  • the saturation current of ISba depends on VGa2. Therefore, a high voltage VGa2 is provided between the first gate terminal 107a and the first ohmic terminal 106a, and a high voltage VGb2 is provided between the second gate terminal 107b and the second ohmic terminal 106b. Compared to the applied case, the saturation current of ISba does not decrease.
  • a low voltage of VGa1 is applied between the first gate terminal 107a on the high potential side and the first ohmic terminal 106a on the high potential side.
  • a high voltage VGb2 is applied between the low potential side second gate terminal 107b and the low potential side second ohmic terminal 106b.
  • VGa2 that is a high voltage is between the first gate terminal 107a and the first ohmic terminal 106a, and a high voltage is between the second gate terminal 107b and the second ohmic terminal 106b.
  • IGa can be suppressed.
  • the saturation current of ISba depends on VGb2. Therefore, a high voltage VGa2 is provided between the first gate terminal 107a and the first ohmic terminal 106a, and a high voltage VGb2 is provided between the second gate terminal 107b and the second ohmic terminal 106b. Compared to the applied case, the saturation current of ISba does not decrease.
  • the semiconductor device 10 applies the semiconductor element 100 having the pair of gate electrodes and the pair of ohmic electrodes, and a voltage equal to or higher than the threshold voltage to the pair of gate electrodes.
  • a control unit 120 for bringing the semiconductor element 100 into a conductive state between the pair of ohmic electrodes.
  • the control unit 120 applies a low voltage to the gate electrode corresponding to the high-potential side ohmic electrode and applies a high voltage to the gate electrode corresponding to the low-potential side ohmic electrode when the semiconductor element 100 is in a conductive state. Apply.
  • the potential difference between the low-potential side ohmic electrode and the low-potential side gate electrode is maintained, while the high-potential side ohmic electrode and the high-potential side gate electrode are interposed. Reduce the potential difference.
  • the magnitude of the saturation current of the current ISba flowing from the power supply 130 depends on the potential difference between the low potential side ohmic electrode and the low potential side gate electrode. Further, the magnitude of the gate current flowing through the high potential side gate electrode depends on the potential difference between the high potential side ohmic electrode and the high potential side gate electrode. For this reason, according to the semiconductor device 10 concerning Embodiment 1 of this invention, the magnitude
  • the threshold voltages of the first gate electrode 105a and the second gate electrode 105b are both positive. Accordingly, the voltage applied to the first gate electrode 105a when the first ohmic electrode 104a is used as a reference and the voltage applied to the second gate electrode 105b when the second ohmic electrode 104b is used as a reference are both. When 0, the semiconductor element 100 can be cut off.
  • FIG. 4 is a diagram showing an example of the configuration of the semiconductor device 10a according to the first modification of the first embodiment of the present invention. Constituent elements similar to those of the first embodiment are denoted by the same reference numerals, and the description thereof is omitted.
  • the semiconductor device 10 a includes a semiconductor element 100 a instead of the semiconductor element 100.
  • the semiconductor element 100a is different from the semiconductor element 100 in that the first control layer 108a and the second control layer 108b are not provided. That is, the first gate electrode 105a and the second gate electrode 105b and the semiconductor layer stack 102 are in Schottky junction. Even with such a configuration, while maintaining the characteristics of ISba-VSba, when VSba> 0, the increase in IGb, which is the gate current on the high potential side, is increased, and when VSba ⁇ 0, the gate current on the high potential side, IGA, is increased. Can be suppressed.
  • the semiconductor device 10a according to the first modification of the first embodiment of the present invention similarly to the first embodiment, the decrease of the saturation current of the current ISba flowing from the power source is suppressed, and the gate current is reduced. By suppressing the increase, power consumption can be reduced.
  • FIG. 5 is a diagram showing an example of the configuration of the semiconductor device 10b according to the second modification of the first embodiment of the present invention. Constituent elements similar to those of the first embodiment are denoted by the same reference numerals, and the description thereof is omitted.
  • the semiconductor device 10 b according to the second modification of the first embodiment includes a semiconductor element 100 b instead of the semiconductor element 100.
  • the semiconductor element 100b is different from the semiconductor element 100 in that the first insulating film 110a is provided instead of the first control layer 108a and the second insulating film 110b is provided instead of the second control layer 108b. ing.
  • the first insulating film 110 a is an insulating film formed between the first gate electrode 105 a and the semiconductor layer stack 102.
  • the second insulating film 110 b is an insulating film formed between the second gate electrode 105 b and the semiconductor layer stack 102.
  • the first insulating film 110a and the second insulating film 110b are a silicon oxide film (SiO 2 ) or a silicon nitride film (SiN).
  • the semiconductor element 100b is in a conductive state, and both IGa and IGb are 0 in a steady state.
  • IGa and IGb flow transiently in order to accumulate the capacitance of the first gate electrode 105a and the capacitance of the second gate electrode 105b.
  • transient IGb can be suppressed more than when VGb2 is applied.
  • the decrease of the saturation current of the current ISba flowing from the power source is suppressed, and the gate current is reduced.
  • the increase power consumption can be reduced.
  • Embodiment 2 The semiconductor device according to Embodiment 2 of the present invention supplies a semiconductor element having a pair of gate electrodes and a pair of ohmic electrodes, and a current that becomes a voltage equal to or higher than a threshold voltage to the pair of gate electrodes. And a control unit for bringing the semiconductor element into a conductive state between the pair of ohmic electrodes.
  • the control unit supplies a low current to the gate electrode corresponding to the high-potential side ohmic electrode and supplies a high current to the gate electrode corresponding to the low-potential side ohmic electrode when the semiconductor element is conductive. It is characterized by doing.
  • FIG. 6 is a cross-sectional view showing an example of the configuration of the semiconductor device 20 according to the second embodiment of the present invention.
  • the semiconductor device 20 includes a semiconductor element 100 and a control unit 140.
  • the same components as those in the first embodiment are denoted by the same reference numerals, and the description thereof is omitted.
  • the control unit 140 is a circuit for bringing the semiconductor element 100 into a conductive state. As shown in FIG. 6, the control unit 140 includes current sources 141a, 141b, 142a, and 142b, and switches 143a and 143b.
  • the current source 141a is an example of a first current source that generates a first current for applying a voltage equal to or higher than a threshold voltage of a pair of gate electrodes.
  • the current source 141a is connected between the first ohmic terminal 106a and the first gate terminal 107a via the switch 143a.
  • the current source 141a is configured so that the first potential, which is the potential of the first gate electrode 105a with respect to the first ohmic electrode 104a, is equal to or higher than the threshold voltage of the first gate electrode 105a.
  • a gate current IGa1 is supplied to one gate electrode 105a.
  • the gate current IGa1 is an example of the first current.
  • the current source 142a is an example of a second current source that generates a second current larger than the first current.
  • the current source 142a is connected between the first ohmic terminal 106a and the first gate terminal 107a via the switch 143a.
  • the current source 142a supplies the gate current IGa2 to the first gate electrode 105a so that the first potential is equal to or higher than the threshold voltage of the first gate electrode 105a.
  • the gate current IGa2 is an example of the second current and is larger than the gate current IGa1.
  • the switch 143a selects either the current source 141a or the current source 142a according to the polarity of the power supply voltage VSba of the power supply 130. Specifically, the switch 143a is a high-current current source when the power supply voltage VSba of the power supply 130 is positive, that is, when the potential of the second ohmic electrode 104b is higher than the potential of the first ohmic electrode 104a (FIG. 6). 142a is selected. The switch 143a selects the low-current current source 141a when the power supply voltage VSba of the power supply 130 is negative, that is, when the potential of the second ohmic electrode 104b is lower than the potential of the first ohmic electrode 104a.
  • the current source 141b is an example of a first current source that generates a first current for applying a voltage equal to or higher than a threshold voltage of a pair of gate electrodes.
  • the current source 141b is connected between the second ohmic terminal 106b and the second gate terminal 107b via a switch 143b.
  • the current source 141b is configured so that the second potential, which is the potential of the second gate electrode 105b with respect to the second ohmic electrode 104b, is equal to or higher than the threshold voltage of the second gate electrode 105b.
  • a gate current IGb1 is supplied to the two-gate electrode 105b.
  • the gate current IGb1 is an example of the first current. Further, the gate current IGb1 may be equal to the gate current IGa1.
  • the current source 142b is an example of a second current source that generates a second current larger than the first current.
  • the current source 142b is connected between the second ohmic terminal 106b and the second gate terminal 107b via the switch 143b.
  • the current source 142b supplies the gate current IGb2 to the second gate electrode 105b so that the second potential is equal to or higher than the threshold voltage of the second gate electrode 105b.
  • the gate current IGb2 is an example of the second current and is larger than the gate current IGb1. Further, the gate current IGb2 may be equal to the gate current IGa2.
  • the switch 143b selects either the current source 141b or the current source 142b according to the polarity of the power supply voltage VSba of the power supply 130. Specifically, the switch 143b is a low-current current source when the power supply voltage VSba of the power supply 130 is positive, that is, when the potential of the second ohmic electrode 104b is higher than the potential of the first ohmic electrode 104a (FIG. 6). 141b is selected. The switch 143b selects the high-current current source 142b when the power supply voltage VSba of the power supply 130 is negative, that is, when the potential of the second ohmic electrode 104b is lower than the potential of the first ohmic electrode 104a.
  • the control unit 140 has a potential when the high-potential-side ohmic electrode is used as a reference and is applied to the high-potential-side ohmic electrode.
  • the potential of the high-potential side gate electrode corresponding to the low-potential side ohmic electrode is the potential when the potential of the high-potential side gate electrode is based on the low-potential side ohmic electrode,
  • the first electric signal is supplied to the high potential side gate electrode and the second electric signal is supplied to the low potential side gate electrode so as to be lower than the first potential.
  • the high-potential-side ohmic electrode and the high-potential-side gate electrode are the second ohmic electrode 104b and the second gate electrode 105b.
  • the low potential side ohmic electrode and the low potential side gate electrode are the first ohmic electrode 104a and the first gate electrode 105a.
  • a gate current IGb1 is supplied as a first electric signal from the low current source 141b to the second gate electrode 105b which is the high potential side gate electrode. Then, the gate current IGa2 is supplied as the second electric signal from the high current source 142a to the first gate electrode 105a which is the low potential side gate electrode. At this time, IGa2> IGb1.
  • the high potential side ohmic electrode and the high potential side gate electrode are the first ohmic electrode 104a and the first gate electrode 105a
  • the low potential side ohmic electrode and the low potential side gate electrode are the second ohmic electrode.
  • the gate electrode 104b and the second gate electrode 105b are used.
  • the gate current IGa1 is supplied as the first electric signal from the low current source 141a to the first gate electrode 105a which is the high potential side gate electrode.
  • the gate current IGb2 is supplied as the second electric signal from the high current source 142b to the second gate electrode 105b which is the low potential side gate electrode.
  • IGb2 > IGa1.
  • the control unit 140 of the semiconductor device 20 includes two current sources 141a and 142a between the first ohmic terminal 106a and the first gate terminal 107a.
  • the two current sources 141a and 142a respectively generate gate currents IGa1 (first current) and IGa2 (second current) that can apply a potential equal to or higher than the threshold voltage of the first gate electrode 105a.
  • the switch 143a selects one of the current sources 141a and 142a. That is, the switch 143a switches the current supplied to the first gate terminal 107a.
  • IGa1 is a current for applying a voltage equal to or higher than the threshold voltage of the first gate electrode 105a, and is a current smaller than IGa2.
  • the magnitude of IGa2 is set so as to be a gate voltage VGa that allows a saturation current of ISba to flow when VSba> 0.
  • control unit 140 includes the current source 141a for low current and the current source 142a for high current, and selects the current to be supplied to the first gate electrode 105a. That is, the control unit 140 can supply IGa1 having a low current or IGa2 having a high current to the first gate electrode 105a by the switch 143a.
  • control unit 140 includes two current sources 141b and 142b between the second ohmic terminal 106b and the second gate terminal 107b.
  • the two current sources 141b and 142b generate gate currents IGb1 (first current) and IGb2 (second current) that can apply a potential higher than the threshold voltage of the second gate electrode 105b, respectively.
  • the switch 143b selects one of the current sources 141b and 142b. That is, the switch 143b switches the current supplied to the second gate terminal 107b.
  • IGb1 is a current for applying a voltage equal to or higher than the threshold voltage of the second gate electrode 105b, and is a current smaller than IGb2. Further, the magnitude of IGb2 is set to be a gate voltage VGb that allows a saturation current of ISba to flow when VSba ⁇ 0.
  • control unit 140 includes the current source 141b for low current and the current source 142b for high current, and selects the current to be supplied to the second gate electrode 105b. That is, the control unit 140 can supply IGb1 having a low current or IGb2 having a high current to the second gate electrode 105b by the switch 143b.
  • IGb1 smaller than IGb2 is supplied to the second gate terminal 107b on the high potential side. Then, the high current IGa2 is supplied to the first gate terminal 107a on the low potential side. Even in this state, a channel is generated in the channel region 103 immediately below the second gate terminal 107b. Accordingly, the driving power of the second gate terminal 107b is reduced.
  • IGa1 smaller than IGa2 is supplied to the first gate terminal 107a on the high potential side.
  • IGb2 which is a high current, is supplied to the second gate terminal 107b on the low potential side. Even in this state, a channel is generated in the channel region 103 immediately below the second gate terminal 107b. Accordingly, the driving power of the first gate terminal 107a can be suppressed.
  • the semiconductor element 100 having the pair of gate electrodes and the pair of ohmic electrodes and the pair of gate electrodes have a voltage equal to or higher than the threshold voltage.
  • a control unit 140 is provided that brings the semiconductor element 100 into a conductive state between the pair of ohmic electrodes by supplying a current.
  • the control unit 140 supplies a low current to the gate electrode corresponding to the high-potential side ohmic electrode and supplies a high current to the gate electrode corresponding to the low-potential side ohmic electrode when the semiconductor element 100 is conductive. Supply.
  • FIG. 7 is a diagram showing an example of the configuration of the semiconductor device 20a according to the variation of the second embodiment of the present invention. Constituent elements similar to those of the second embodiment are denoted by the same reference numerals, and the description thereof is omitted.
  • the semiconductor device 20 a includes a control unit 150 instead of the control unit 140.
  • the control unit 150 includes current sources 151a and 151b.
  • the current source 151a is an example of a current source that generates a current for applying a voltage higher than the threshold voltage of the pair of gate electrodes.
  • the current source 151a is connected between the first ohmic terminal 106a and the first gate terminal 107a.
  • the current source 151a supplies the gate current IGa as the first electric signal to the first gate terminal 107a.
  • the current source 151b is an example of a current source that generates a current for applying a voltage higher than the threshold voltage of the pair of gate electrodes.
  • the current source 151b is connected between the second ohmic terminal 106b and the second gate terminal 107b.
  • the current source 151b supplies the gate current IGb as the second electric signal to the second gate terminal 107b.
  • both IGa and IGb are currents for applying a voltage higher than the threshold voltage of the gate electrode.
  • IGa and IGb each have the same current value.
  • the decrease of the saturation current of the current ISba flowing from the power source is suppressed and the increase of the gate current is increased. By suppressing the power consumption, power consumption can be reduced.
  • the semiconductor device is a semiconductor device including a semiconductor element capable of flowing a current bidirectionally, and the semiconductor element includes a substrate, A semiconductor layer having a channel region formed on the substrate, a pair of ohmic electrodes formed on or above the semiconductor layer and spaced apart from each other, and the pair of ohmics on or above the semiconductor layer And a pair of gate electrodes corresponding to each of the pair of ohmic electrodes formed between the electrodes, and the semiconductor device further includes the semiconductor element and the channel region between the pair of ohmic electrodes.
  • a control unit configured to make a conductive state in which a current can flow in both directions through the pair of ohmics when the semiconductor element is in the conductive state.
  • the potential when the high potential side ohmic electrode is used as a reference, and the potential of the high potential side gate electrode corresponding to the high potential side ohmic electrode is the same as that of the low potential side ohmic electrode.
  • the first electric signal is supplied to the high potential side gate electrode so as to be lower than the potential of the low potential side gate electrode, which is the potential of the reference and is the gate electrode corresponding to the low potential side ohmic electrode.
  • a second electric signal is supplied to the low potential side gate electrode.
  • the magnitude of the gate current flowing through the high potential side gate electrode depends on the potential difference between the high potential side ohmic electrode and the high potential side gate electrode. Increase is suppressed and power consumption can be reduced.
  • the magnitude of the saturation current of the current flowing between the pair of ohmic electrodes depends on the potential difference between the low-potential side ohmic electrode and the low-potential side gate electrode. The magnitude of the current can be maintained. Therefore, power consumption can be reduced while maintaining the characteristics of the power supply current and the power supply voltage.
  • control unit includes a first voltage source that generates a first voltage that is equal to or higher than a threshold voltage of the pair of gate electrodes, and a second voltage source that generates a second voltage higher than the first voltage. And the control unit supplies the first voltage as the first electric signal to the high potential side gate electrode, and supplies the second voltage as the second electric signal to the low potential side gate electrode. Also good.
  • a high voltage or a low voltage can be easily supplied between each gate electrode and the corresponding ohmic electrode. Accordingly, since the current flowing from the high potential side gate electrode to the channel region can be reduced while maintaining the characteristics of the power supply current and the power supply voltage, the driving power of the high potential side gate electrode can be suppressed.
  • the control unit may include a first current source that generates a first current for applying a voltage that is equal to or higher than a threshold voltage of the pair of gate electrodes, and a second current that generates a second current larger than the first current. And the controller supplies the first current to the high potential side gate electrode as the first electrical signal and supplies the second current to the low potential side gate electrode as the second electrical signal. May be.
  • the control unit may supply a current for applying a voltage equal to or higher than a threshold voltage of the pair of gate electrodes to the pair of gate electrodes as the first electric signal and the second electric signal.
  • the threshold voltage of the pair of gate electrodes may be positive.
  • the semiconductor element can be in a cut-off state.
  • the semiconductor element may further include a pair of control layers having P-type conductivity formed between the pair of gate electrodes and the semiconductor layer.
  • the threshold voltage of the first gate electrode and the threshold voltage of the second gate electrode can be made positive.
  • the pair of gate electrodes may be in Schottky junction with the semiconductor layer.
  • the threshold voltage of the first gate electrode and the threshold voltage of the second gate electrode can be made positive.
  • the semiconductor element may further include an insulating film formed between the pair of gate electrodes and the semiconductor layer.
  • the threshold voltage of the first gate electrode and the threshold voltage of the second gate electrode can be made positive.
  • the substrate may be a silicon substrate, a sapphire substrate, or a silicon carbide substrate.
  • a method for controlling a semiconductor device is a method for controlling a semiconductor device capable of flowing a current in both directions.
  • the semiconductor device is formed on a substrate and the substrate, A semiconductor layer having a channel region, a pair of ohmic electrodes formed on or above the semiconductor layer and spaced apart from each other, and formed between the pair of ohmic electrodes on or above the semiconductor layer
  • a pair of gate electrodes corresponding to each of the pair of ohmic electrodes, and the method of controlling the semiconductor device is a high potential side which is a gate electrode corresponding to a high potential side ohmic electrode of the pair of ohmic electrodes
  • a first electrical signal is supplied to the gate electrode, and a second potential is applied to the low potential side gate electrode that is a gate electrode corresponding to the low potential side ohmic electrode of the pair of ohmic electrodes.
  • the potential of the high-potential-side gate electrode when the high-potential-side ohmic electrode is used as a reference is the low-potential-side ohmic
  • the first electric signal and the second electric signal are supplied so as to be lower than the potential of the low potential side gate electrode when the electrode is used as a reference.
  • the magnitude of the gate current flowing through the high potential side gate electrode depends on the potential difference between the high potential side ohmic electrode and the high potential side gate electrode. Increase is suppressed and power consumption can be reduced.
  • the magnitude of the saturation current of the current flowing between the pair of ohmic electrodes depends on the potential difference between the low-potential side ohmic electrode and the low-potential side gate electrode. The magnitude of the current can be maintained. Therefore, power consumption can be reduced while maintaining the characteristics of the power supply current and the power supply voltage.
  • the semiconductor device and the control method thereof according to the present invention have been described based on the embodiments, but the present invention is not limited to these embodiments. Unless it deviates from the meaning of this invention, the form which carried out the various deformation
  • the control unit 120 applies the high voltage VGa2 generated by the voltage source 122a between the first gate electrode 105a and the first ohmic electrode 104a when the high-potential-side ohmic electrode is the second ohmic electrode 104b.
  • the low voltage VGa1 generated by the voltage source 121a may be applied between the second gate electrode 105b and the second ohmic electrode 104b.
  • the control unit 120 applies the low voltage VGa1 generated by the voltage source 121a between the first gate electrode 105a and the first ohmic electrode 104a.
  • the high voltage VGa2 generated by the voltage source 122a may be applied between the second gate electrode 105b and the second ohmic electrode 104b.
  • the control unit 140 supplies the high current IGa2 generated by the current source 142a to the first gate electrode 105a, and generates the low current generated by the current source 141a.
  • the current IGa1 may be supplied to the second gate electrode 105b.
  • the control unit 140 supplies the low current IGa2 generated by the current source 141a to the first gate electrode 105a, and generates a high current generated by the current source 142a.
  • the current IGa1 may be supplied to the second gate electrode 105b.
  • the configuration of the semiconductor device is for illustration in order to specifically describe the present invention, and the semiconductor device according to the present invention is not necessarily provided with all of the above configurations. In other words, the semiconductor device according to the present invention need only have a minimum configuration capable of realizing the effects of the present invention.
  • the first ohmic terminal 106a, the second ohmic terminal 106b, the first gate terminal 107a, and the second gate terminal 107b may not be provided.
  • the semiconductor device and the control method thereof according to the present invention have an effect that an increase in power consumption can be suppressed.

Abstract

Disclosed is a semiconductor device (10), which is provided with a semiconductor element (100) that can bidirectionally flow a current. The semiconductor element (100) is provided with a pair of a first ohmic electrode (104a) and a second ohmic electrode (104b), and a pair of a first gate electrode (105a) and a second gate electrode (105b). The semiconductor device (10) is also provided with a control unit (120), which brings the semiconductor element (100) into an electrically connected state. The control unit (120) supplies a first electric signal to a high potential-side gate electrode, and supplies a second electric signal to a low potential-side gate electrode, such that, in the case where the semiconductor element (100) is electrically connected, the potential of the high potential-side gate electrode, said potential corresponding to a high potential-side ohmic electrode with the high potential-side ohmic electrode as reference, is lower than the potential of the low potential-side gate electrode, said potential corresponding to the low potential-side ohmic electrode with the low potential-side ohmic electrode as reference.

Description

半導体装置及びその制御方法Semiconductor device and control method thereof
　本発明は、半導体装置及びその制御方法に関し、特に、双方向に電流を流すことができる半導体素子を備える半導体装置及びその制御方法に関する。 The present invention relates to a semiconductor device and a control method thereof, and more particularly, to a semiconductor device including a semiconductor element capable of flowing a current bidirectionally and a control method thereof.
　近年、材料限界を打破して導通損失を低減するために、ＧａＮに代表されるＩＩＩ族窒化物半導体又は炭化珪素（ＳｉＣ）などのワイドギャップ半導体を用いた半導体装置の導入が検討されている。ワイドギャップ半導体は、絶縁破壊電界がシリコン（Ｓｉ）と比べて約１桁高い。 In recent years, in order to overcome material limitations and reduce conduction loss, introduction of a semiconductor device using a wide gap semiconductor such as a group III nitride semiconductor represented by GaN or silicon carbide (SiC) has been studied. A wide gap semiconductor has a dielectric breakdown electric field about an order of magnitude higher than that of silicon (Si).
　窒化アルミニウムガリウム（ＡｌＧａＮ）と窒化ガリウム（ＧａＮ）とのヘテロ接合界面には、自発分極及びピエゾ分極により電荷が生じる。これにより、アンドープ時においても１×１０１３ｃｍ－２以上のシートキャリア濃度と、１０００ｃｍ２Ｖ／ｓｅｃ以上の高移動度の２次元電子ガス（２ＤＥＧ）層が形成される。このため、ＡｌＧａＮ／ＧａＮヘテロ接合電界効果トランジスタ（ＡｌＧａＮ／ＧａＮ－ＨＦＥＴ）は、低オン抵抗及び高耐圧を実現するパワースイッチングトランジスタとして期待されている。 Electric charges are generated at the heterojunction interface between aluminum gallium nitride (AlGaN) and gallium nitride (GaN) due to spontaneous polarization and piezoelectric polarization. As a result, a sheet carrier concentration of 1 × 10 13 cm −2 or more and a high mobility two-dimensional electron gas (2DEG) layer of 1000 cm 2 V / sec or more are formed even when undoped. Therefore, the AlGaN / GaN heterojunction field effect transistor (AlGaN / GaN-HFET) is expected as a power switching transistor that realizes low on-resistance and high breakdown voltage.
　特に、ＡｌＧａＮ／ＧａＮのヘテロ接合を利用して２つのゲート電極を有する構造にすることにより、１つの半導体装置で双方向半導体装置を形成することが可能となる（例えば、特許文献１を参照）。 In particular, by using a structure having two gate electrodes using an AlGaN / GaN heterojunction, a bidirectional semiconductor device can be formed with a single semiconductor device (see, for example, Patent Document 1). .
　図８は、特許文献１に記載の従来の半導体素子３００の構成を示す図である。図８に示すように、従来の半導体素子３００は、基板３０１と、半導体層積層体３０２と、第１電極３０３ａと、第２電極３０３ｂと、第１ゲート電極３０４ａと、第２ゲート電極３０４ｂとを備える。 FIG. 8 is a diagram showing a configuration of a conventional semiconductor element 300 described in Patent Document 1. In FIG. As shown in FIG. 8, a conventional semiconductor element 300 includes a substrate 301, a semiconductor layer stack 302, a first electrode 303a, a second electrode 303b, a first gate electrode 304a, and a second gate electrode 304b. Is provided.
　第１ゲート電極３０４ａと第２ゲート電極３０４ｂとにそれぞれ、閾値電圧より高い電圧が印加された場合、半導体層積層体３０２にチャネルが生成される。これにより、半導体素子３００は、第１電極３０３ａと第２電極３０３ｂとの間で、チャネルを介して導通状態となる。 When a voltage higher than the threshold voltage is applied to each of the first gate electrode 304a and the second gate electrode 304b, a channel is generated in the semiconductor layer stack 302. As a result, the semiconductor element 300 becomes conductive between the first electrode 303a and the second electrode 303b via the channel.
　これにより、第１電極３０３ａと第２電極３０３ｂとの間に電源電圧が印加された場合、半導体素子３００は、第１電極３０３ａと第２電極３０３ｂとの間でチャネルを介して、電源電圧の極性に応じた方向に電流を流すことができる。 As a result, when a power supply voltage is applied between the first electrode 303a and the second electrode 303b, the semiconductor element 300 causes the power supply voltage to be reduced between the first electrode 303a and the second electrode 303b via the channel. A current can flow in a direction corresponding to the polarity.
国際公開第２００８／０６２８００号International Publication No. 2008/062800
　しかしながら、上記従来の半導体装置では、消費電力が増大してしまうという課題がある。 However, the conventional semiconductor device has a problem that power consumption increases.
　従来の半導体素子が導通状態にあるとき、第１ゲート電極から第１ゲート電極直下のチャネル領域に向かって第１ゲート電流が流れる。同様に、第２ゲート電極から第２ゲート電極直下のチャネル領域に向かって第２ゲート電流が流れる。 When the conventional semiconductor element is in a conductive state, a first gate current flows from the first gate electrode toward the channel region immediately below the first gate electrode. Similarly, a second gate current flows from the second gate electrode toward the channel region immediately below the second gate electrode.
　ここで、第２ゲート電極の電位は、第２電極よりも、第２ゲート電極と第２電極との間の電位差ＶＧｂだけ高く、第１電極よりも電源電圧ＶＳｂａと電位差ＶＧｂとの和だけ高い。このため、第２ゲート電流は、第２電極だけでなく、第１電極にも流れる。 Here, the potential of the second gate electrode is higher than the second electrode by the potential difference VGb between the second gate electrode and the second electrode, and higher than the first electrode by the sum of the power supply voltage VSba and the potential difference VGb. . For this reason, the second gate current flows not only through the second electrode but also through the first electrode.
　半導体装置が導通状態であり電源電圧ＶＳｂａが高くなると、第２ゲート電極と第１電極との電位差が増加する。このため、電源電圧ＶＳｂａの上昇に伴って、第２ゲート電流は高くなる。したがって、第２ゲート電極を駆動する駆動電力が大きくなってしまう。 When the semiconductor device is in a conductive state and the power supply voltage VSba increases, the potential difference between the second gate electrode and the first electrode increases. For this reason, the second gate current increases as the power supply voltage VSba increases. Therefore, the driving power for driving the second gate electrode is increased.
　そこで、本発明は、上記課題を解決するためになされたものであって、消費電力の増大を抑制することができる半導体装置及びその駆動方法を提供することを目的とする。 Therefore, the present invention has been made to solve the above-described problems, and an object thereof is to provide a semiconductor device that can suppress an increase in power consumption and a driving method thereof.
　上記課題を解決するため、本発明の一態様に係る半導体装置は、双方向に電流を流すことができる半導体素子を備える半導体装置であって、前記半導体素子は、基板と、前記基板上に形成され、チャネル領域を有する半導体層と、前記半導体層の上又は上方に、互いに離隔して形成された一対のオーミック電極と、前記半導体層の上又は上方に、前記一対のオーミック電極の間に形成された、前記一対のオーミック電極のそれぞれに対応する一対のゲート電極とを備え、前記半導体装置は、さらに、前記半導体素子を、前記一対のオーミック電極の間で前記チャネル領域を介して双方向に電流を流すことが可能な導通状態にする制御部を備え、前記制御部は、前記半導体素子が前記導通状態である場合、前記一対のオーミック電極のうち高電位側のオーミック電極を基準とした場合の電位であって、前記高電位側のオーミック電極に対応するゲート電極である高電位側ゲート電極の電位が、低電位側のオーミック電極を基準とした場合の電位であって、前記低電位側のオーミック電極に対応するゲート電極である低電位側ゲート電極の電位より低くなるように、前記高電位側ゲート電極に第１電気信号を供給し、かつ、前記低電位側ゲート電極に第２電気信号を供給する。 In order to solve the above problems, a semiconductor device according to one embodiment of the present invention is a semiconductor device including a semiconductor element that can flow a current bidirectionally, and the semiconductor element is formed over the substrate and the substrate And a pair of ohmic electrodes formed on or above the semiconductor layer and spaced apart from each other, and between the pair of ohmic electrodes on or above the semiconductor layer. A pair of gate electrodes corresponding to each of the pair of ohmic electrodes, and the semiconductor device further bi-directionally passes the semiconductor element between the pair of ohmic electrodes via the channel region. A control unit configured to make a conductive state in which a current can flow; and when the semiconductor element is in the conductive state, the control unit is configured to be a high one of the pair of ohmic electrodes. When the potential of the high-potential side gate electrode, which is a potential corresponding to the high-potential-side ohmic electrode, is based on the low-potential-side ohmic electrode A first electric signal is supplied to the high potential side gate electrode so as to be lower than the potential of the low potential side gate electrode which is a gate electrode corresponding to the low potential side ohmic electrode, and A second electric signal is supplied to the low potential side gate electrode.
　これにより、高電位側ゲート電極に流れるゲート電流の大きさは、高電位側のオーミック電極と高電位側ゲート電極との間の電位差に依存するので、当該電位差を低くすることで、ゲート電流の増大が抑制され、消費電力を削減することができる。また、一対のオーミック電極間を流れる電流の飽和電流の大きさは、低電位側のオーミック電極と低電位側のゲート電極との間の電位差に依存するので、当該電位差を高くすることで、飽和電流の大きさを保つことができる。したがって、電源電流と電源電圧との特性を維持したまま、消費電力を削減することができる。 As a result, the magnitude of the gate current flowing through the high potential side gate electrode depends on the potential difference between the high potential side ohmic electrode and the high potential side gate electrode. Increase is suppressed and power consumption can be reduced. In addition, the magnitude of the saturation current of the current flowing between the pair of ohmic electrodes depends on the potential difference between the low-potential side ohmic electrode and the low-potential side gate electrode. The magnitude of the current can be maintained. Therefore, power consumption can be reduced while maintaining the characteristics of the power supply current and the power supply voltage.
　また、前記制御部は、前記一対のゲート電極の閾値電圧以上の電圧である第１電圧を生成する第１電圧源と、前記第１電圧より高い第２電圧を生成する第２電圧源とを有し、前記制御部は、前記高電位側ゲート電極に前記第１電圧を前記第１電気信号として供給し、前記低電位側ゲート電極に前記第２電圧を前記第２電気信号として供給してもよい。 Further, the control unit includes a first voltage source that generates a first voltage that is equal to or higher than a threshold voltage of the pair of gate electrodes, and a second voltage source that generates a second voltage higher than the first voltage. And the control unit supplies the first voltage as the first electric signal to the high potential side gate electrode, and supplies the second voltage as the second electric signal to the low potential side gate electrode. Also good.
　これにより、異なる電圧を発生する２つの電圧源を備えることで、各ゲート電極と、対応するオーミック電極との間に高電圧又は低電圧を容易に供給することができる。したがって、電源電流と電源電圧との特性を維持したまま、高電位側ゲート電極からチャネル領域に流れる電流を低減することができるため、高電位側ゲート電極の駆動電力を抑制することができる。 Thus, by providing two voltage sources that generate different voltages, a high voltage or a low voltage can be easily supplied between each gate electrode and the corresponding ohmic electrode. Accordingly, since the current flowing from the high potential side gate electrode to the channel region can be reduced while maintaining the characteristics of the power supply current and the power supply voltage, the driving power of the high potential side gate electrode can be suppressed.
　また、前記制御部は、前記一対のゲート電極の閾値電圧以上の電圧を印加するための第１電流を生成する第１電流源と、前記第１電流より大きい第２電流を生成する第２電流源とを備え、前記制御部は、前記高電位側ゲート電極に前記第１電流を前記第１電気信号として供給し、前記低電位側ゲート電極に前記第２電流を前記第２電気信号として供給してもよい。 The control unit may include a first current source that generates a first current for applying a voltage that is equal to or higher than a threshold voltage of the pair of gate electrodes, and a second current that generates a second current larger than the first current. And the controller supplies the first current to the high potential side gate electrode as the first electrical signal and supplies the second current to the low potential side gate electrode as the second electrical signal. May be.
　これにより、異なる電流を発生する２つの電流源を備えることで、各ゲート電極に高電流又は低電流を容易に供給することができる。したがって、電源電流と電源電圧との特性を維持したまま、高電位側のゲート電流を低減し、高電位側ゲート電極の駆動電力を抑制することができる。 Thereby, by providing two current sources that generate different currents, a high current or a low current can be easily supplied to each gate electrode. Therefore, it is possible to reduce the high-potential-side gate current and suppress the driving power of the high-potential-side gate electrode while maintaining the characteristics of the power supply current and the power supply voltage.
　また、前記制御部は、前記一対のゲート電極の閾値電圧以上の電圧を印加するための電流を、前記第１電気信号及び前記第２電気信号として前記一対のゲート電極に供給してもよい。 The control unit may supply a current for applying a voltage equal to or higher than a threshold voltage of the pair of gate electrodes to the pair of gate electrodes as the first electric signal and the second electric signal.
　これにより、第１ゲート電極又は第２ゲート電極に供給するゲート電流源の数を減らすことができ、回路構成を簡素化することができる。 Thereby, the number of gate current sources supplied to the first gate electrode or the second gate electrode can be reduced, and the circuit configuration can be simplified.
　また、前記一対のゲート電極の閾値電圧は、正であってもよい。 Further, the threshold voltage of the pair of gate electrodes may be positive.
　これにより、第１オーミック電極を基準とした場合に第１ゲート電極に印加される電圧、及び、第２オーミック電極を基準とした場合に第２ゲート電極に印加される電圧がともに０のときに、半導体素子を遮断状態とすることができる。 Thus, when the voltage applied to the first gate electrode when the first ohmic electrode is used as a reference and the voltage applied to the second gate electrode when the second ohmic electrode is used as a reference are both zero. The semiconductor element can be in a cut-off state.
　また、前記半導体素子は、さらに、前記一対のゲート電極と前記半導体層との間に形成された、Ｐ型の導電性を有する一対のコントロール層を備えてもよい。 The semiconductor element may further include a pair of control layers having P-type conductivity formed between the pair of gate electrodes and the semiconductor layer.
　これにより、第１ゲート電極の閾値電圧及び第２ゲート電極の閾値電圧を正にすることができる。 Thereby, the threshold voltage of the first gate electrode and the threshold voltage of the second gate electrode can be made positive.
　また、前記一対のゲート電極は、前記半導体層とショットキー接合していてもよい。 The pair of gate electrodes may be in Schottky junction with the semiconductor layer.
　これにより、第１ゲート電極の閾値電圧及び第２ゲート電極の閾値電圧を正にすることができる。 Thereby, the threshold voltage of the first gate electrode and the threshold voltage of the second gate electrode can be made positive.
　また、前記半導体素子は、さらに、前記一対のゲート電極と前記半導体層との間に形成された絶縁膜を備えてもよい。 The semiconductor element may further include an insulating film formed between the pair of gate electrodes and the semiconductor layer.
　これにより、第１ゲート電極の閾値電圧及び第２ゲート電極の閾値電圧を正にすることができる。 Thereby, the threshold voltage of the first gate electrode and the threshold voltage of the second gate electrode can be made positive.
　また、前記基板は、シリコン基板、サファイア基板、又は、炭化珪素基板であってもよい。 The substrate may be a silicon substrate, a sapphire substrate, or a silicon carbide substrate.
　また、本発明の一態様に係る半導体装置の制御方法は、双方向に電流を流すことができる半導体装置の制御方法であって、前記半導体装置は、基板と、前記基板上に形成され、チャネル領域を有する半導体層と、前記半導体層の上又は上方に、互いに離隔して形成された一対のオーミック電極と、前記半導体層の上又は上方に、前記一対のオーミック電極の間に形成された、前記一対のオーミック電極のそれぞれに対応する一対のゲート電極とを備え、前記半導体装置の制御方法は、前記一対のオーミック電極のうち高電位側のオーミック電極に対応するゲート電極である高電位側ゲート電極に第１電気信号を供給し、前記一対のオーミック電極のうち低電位側のオーミック電極に対応するゲート電極である低電位側ゲート電極に第２電気信号を供給し、前記第１電気信号及び前記第２電気信号の供給では、前記高電位側のオーミック電極を基準とした場合の前記高電位側ゲート電極の電位が、前記低電位側のオーミック電極を基準とした場合の前記低電位側ゲート電極の電位より低くなるように、前記第１電気信号及び前記第２電気信号を供給する。 In addition, a method for controlling a semiconductor device according to one embodiment of the present invention is a method for controlling a semiconductor device in which current can flow in both directions. The semiconductor device is formed over a substrate, the channel, and a channel. A semiconductor layer having a region; a pair of ohmic electrodes formed on or above the semiconductor layer; and formed between the pair of ohmic electrodes on or above the semiconductor layer; A pair of gate electrodes corresponding to each of the pair of ohmic electrodes, and the method of controlling the semiconductor device includes a high potential side gate which is a gate electrode corresponding to a high potential side ohmic electrode of the pair of ohmic electrodes A first electric signal is supplied to the electrode, and a second electric signal is applied to the low potential side gate electrode which is a gate electrode corresponding to the low potential side ohmic electrode of the pair of ohmic electrodes. In the supply of the first electric signal and the second electric signal, the potential of the high potential side gate electrode when the high potential side ohmic electrode is used as a reference is the low potential side ohmic electrode The first electric signal and the second electric signal are supplied so as to be lower than the potential of the low-potential side gate electrode with reference to.
　これにより、高電位側ゲート電極に流れるゲート電流の大きさは、高電位側のオーミック電極と高電位側ゲート電極との間の電位差に依存するので、当該電位差を低くすることで、ゲート電流の増大が抑制され、消費電力を削減することができる。また、一対のオーミック電極間を流れる電流の飽和電流の大きさは、低電位側のオーミック電極と低電位側のゲート電極との間の電位差に依存するので、当該電位差を高くすることで、飽和電流の大きさを保つことができる。したがって、電源電流と電源電圧との特性を維持したまま、消費電力を削減することができる。 As a result, the magnitude of the gate current flowing through the high potential side gate electrode depends on the potential difference between the high potential side ohmic electrode and the high potential side gate electrode. Increase is suppressed and power consumption can be reduced. In addition, the magnitude of the saturation current of the current flowing between the pair of ohmic electrodes depends on the potential difference between the low-potential side ohmic electrode and the low-potential side gate electrode. The magnitude of the current can be maintained. Therefore, power consumption can be reduced while maintaining the characteristics of the power supply current and the power supply voltage.
　本発明に係る半導体装置によれば、消費電力の増加を抑制することができる。 The semiconductor device according to the present invention can suppress an increase in power consumption.
図１Ａは、本発明の実施の形態１に係る半導体装置の構成の一例を示す断面図である。FIG. 1A is a cross-sectional view showing an example of the configuration of the semiconductor device according to Embodiment 1 of the present invention. 図１Ｂは、本発明の実施の形態１に係る半導体装置の構成の一例を示す断面図である。FIG. 1B is a cross-sectional view showing an example of the configuration of the semiconductor device according to Embodiment 1 of the present invention. 図２は、本発明の実施の形態１に係る半導体装置におけるチャネル領域の挙動を説明するための図である。FIG. 2 is a diagram for explaining the behavior of the channel region in the semiconductor device according to the first embodiment of the present invention. 図３Ａは、本発明の実施の形態１に係る電源電流ＩＳｂａと電源電圧ＶＳｂａとの関係の一例を示す図である。FIG. 3A is a diagram showing an example of the relationship between the power supply current ISba and the power supply voltage VSba according to Embodiment 1 of the present invention. 図３Ｂは、本発明の実施の形態１に係るゲート電流ＩＧｂと電源電圧ＶＳｂａとの関係の一例を示す図である。FIG. 3B is a diagram showing an example of the relationship between the gate current IGb and the power supply voltage VSba according to Embodiment 1 of the present invention. 図４は、本発明の実施の形態１の変型例１に係る半導体装置の構成の一例を示す断面図である。FIG. 4 is a cross-sectional view showing an example of the configuration of the semiconductor device according to the first modification of the first embodiment of the present invention. 図５は、本発明の実施の形態１の変型例２に係る半導体装置の構成の一例を示す断面図である。FIG. 5 is a cross-sectional view showing an example of the configuration of the semiconductor device according to Modification 2 of Embodiment 1 of the present invention. 図６は、本発明の実施の形態２に係る半導体装置の構成の一例を示す断面図である。FIG. 6 is a cross-sectional view showing an example of the configuration of the semiconductor device according to the second embodiment of the present invention. 図７は、本発明の実施の形態２の変型例に係る半導体装置の構成の一例を示す断面図である。FIG. 7 is a cross-sectional view showing an example of the configuration of a semiconductor device according to a variation of the second embodiment of the present invention. 図８は、従来の半導体素子の構成を示す断面図である。FIG. 8 is a cross-sectional view showing a configuration of a conventional semiconductor element.
　以下では、本発明の実施の形態に係る半導体装置及びその制御方法について、図面を用いて詳細に説明する。なお、以下に示す実施の形態は例示を目的としており、本発明がこれらに限定されることを意図しない。 Hereinafter, a semiconductor device and a control method thereof according to an embodiment of the present invention will be described in detail with reference to the drawings. The following embodiments are for illustrative purposes and are not intended to limit the present invention.
　（実施の形態１）
　本発明の実施の形態１に係る半導体装置は、一対のゲート電極と一対のオーミック電極とを有する半導体素子と、一対のゲート電極に閾値電圧以上の電圧を印加することで、半導体素子を一対のオーミック電極間で導通状態にする制御部とを備える。そして、制御部は、半導体素子が導通状態である場合に、高電位側のオーミック電極に対応するゲート電極に低電圧を印加し、低電位側のオーミック電極に対応するゲート電極に高電圧を印加することを特徴とする。 (Embodiment 1)
A semiconductor device according to Embodiment 1 of the present invention includes a semiconductor element having a pair of gate electrodes and a pair of ohmic electrodes, and applying a voltage higher than a threshold voltage to the pair of gate electrodes. And a control unit for bringing the ohmic electrodes into a conductive state. The control unit applies a low voltage to the gate electrode corresponding to the high-potential side ohmic electrode and applies a high voltage to the gate electrode corresponding to the low-potential side ohmic electrode when the semiconductor element is in a conductive state. It is characterized by doing.
　図１Ａ及び図１Ｂは、本発明の実施の形態１に係る半導体装置１０の構成の一例を示す断面図である。図１Ａ及び図１Ｂに示すように、半導体装置１０は、半導体素子１００と、制御部１２０とを備える。半導体素子１００は、電源１３０の電源電圧ＶＳｂａの極性に応じて、双方向に電流を流すことができる。 1A and 1B are cross-sectional views showing an example of the configuration of the semiconductor device 10 according to the first embodiment of the present invention. As illustrated in FIGS. 1A and 1B, the semiconductor device 10 includes a semiconductor element 100 and a control unit 120. The semiconductor element 100 can flow a current bidirectionally according to the polarity of the power supply voltage VSba of the power supply 130.
　図１Ａ及び図１Ｂに示すように、半導体素子１００は、基板１０１と、半導体層積層体１０２と、第１オーミック電極１０４ａと、第２オーミック電極１０４ｂと、第１ゲート電極１０５ａと、第２ゲート電極１０５ｂと、第１オーミック端子１０６ａと、第２オーミック端子１０６ｂと、第１ゲート端子１０７ａと、第２ゲート端子１０７ｂと、第１コントロール層１０８ａと、第２コントロール層１０８ｂとを備える。 As shown in FIGS. 1A and 1B, a semiconductor element 100 includes a substrate 101, a semiconductor layer stack 102, a first ohmic electrode 104a, a second ohmic electrode 104b, a first gate electrode 105a, and a second gate. The electrode 105b, the first ohmic terminal 106a, the second ohmic terminal 106b, the first gate terminal 107a, the second gate terminal 107b, the first control layer 108a, and the second control layer 108b are provided.
　基板１０１は、例えば、シリコン（Ｓｉ）などの半導体基板である。基板１０１は、サファイア基板又は炭化珪素（ＳｉＣ）基板でもよい。 The substrate 101 is, for example, a semiconductor substrate such as silicon (Si). The substrate 101 may be a sapphire substrate or a silicon carbide (SiC) substrate.
　半導体層積層体１０２は、基板１０１の上に形成され、チャネル領域１０３を有する。半導体層積層体１０２は、例えば、ＧａＮ／ＡｌＧａＮから構成される。 The semiconductor layer stack 102 is formed on the substrate 101 and has a channel region 103. The semiconductor layer stack 102 is made of, for example, GaN / AlGaN.
　第１オーミック電極１０４ａ及び第２オーミック電極１０４ｂは、半導体層積層体１０２の上又は上方に、互いに離隔して形成された一対のオーミック電極である。第１オーミック電極１０４ａ及び第２オーミック電極１０４ｂは、例えば、チタン（Ｔｉ）とアルミニウム（Ａｌ）との積層構造を有する。 The first ohmic electrode 104a and the second ohmic electrode 104b are a pair of ohmic electrodes formed on or above the semiconductor layer stack 102 so as to be separated from each other. The first ohmic electrode 104a and the second ohmic electrode 104b have, for example, a stacked structure of titanium (Ti) and aluminum (Al).
　第１ゲート電極１０５ａは、半導体層積層体１０２の上又は上方に、一対のオーミック電極の間に形成された一対のゲート電極の一方である。具体的には、第１ゲート電極１０５ａは、第１オーミック電極１０４ａと第２オーミック電極１０４ｂとの間に形成されている。 The first gate electrode 105a is one of a pair of gate electrodes formed between the pair of ohmic electrodes on or above the semiconductor layer stack 102. Specifically, the first gate electrode 105a is formed between the first ohmic electrode 104a and the second ohmic electrode 104b.
　また、第１ゲート電極１０５ａは、一対のオーミック電極の一方に対応している。具体的には、第１ゲート電極１０５ａは、第１オーミック電極１０４ａに対応し、第２オーミック電極１０４ｂより第１オーミック電極１０４ａに近い領域に形成されている。第１ゲート電極１０５ａは、例えば、ニッケル（Ｎｉ）で構成される。 The first gate electrode 105a corresponds to one of a pair of ohmic electrodes. Specifically, the first gate electrode 105a corresponds to the first ohmic electrode 104a, and is formed in a region closer to the first ohmic electrode 104a than the second ohmic electrode 104b. The first gate electrode 105a is made of nickel (Ni), for example.
　なお、オーミック電極と、当該オーミック電極に対応するゲート電極とは、チャネル領域１０３にチャネルを形成するための電圧を印加するペアとなる電極である。具体的には、第１オーミック電極１０４ａに対応する第１ゲート電極１０５ａに、第１オーミック電極１０４ａを基準とした場合の電位であって、第１ゲート電極１０５ａの閾値電圧以上の電位が供給された場合に、第１ゲート電極１０５ａの下方のチャネル領域１０３にチャネルが生成される。なお、第１ゲート電極１０５ａの閾値電圧は、例えば、正である。 Note that the ohmic electrode and the gate electrode corresponding to the ohmic electrode are a pair of electrodes to which a voltage for forming a channel in the channel region 103 is applied. Specifically, the first gate electrode 105a corresponding to the first ohmic electrode 104a is supplied with a potential higher than the threshold voltage of the first gate electrode 105a, which is a potential when the first ohmic electrode 104a is used as a reference. In this case, a channel is generated in the channel region 103 below the first gate electrode 105a. Note that the threshold voltage of the first gate electrode 105a is positive, for example.
　第２ゲート電極１０５ｂは、半導体層積層体１０２の上又は上方に、一対のオーミック電極の間に形成された一対のゲート電極の他方である。具体的には、第２ゲート電極１０５ｂは、第１ゲート電極１０５ａと第２オーミック電極１０４ｂとの間に形成されている。 The second gate electrode 105b is the other of the pair of gate electrodes formed between the pair of ohmic electrodes on or above the semiconductor layer stack 102. Specifically, the second gate electrode 105b is formed between the first gate electrode 105a and the second ohmic electrode 104b.
　また、第２ゲート電極１０５ｂは、一対のオーミック電極の他方に対応している。具体的には、第２ゲート電極１０５ｂは、第２オーミック電極１０４ｂに対応し、第１オーミック電極１０４ａより第２オーミック電極１０４ｂに近い領域に形成されている。第２ゲート電極１０５ｂは、例えば、ニッケルで構成される。 The second gate electrode 105b corresponds to the other of the pair of ohmic electrodes. Specifically, the second gate electrode 105b corresponds to the second ohmic electrode 104b, and is formed in a region closer to the second ohmic electrode 104b than the first ohmic electrode 104a. The second gate electrode 105b is made of nickel, for example.
　また、第２オーミック電極１０４ｂに対応する第２ゲート電極１０５ｂに、第２オーミック電極１０４ｂを基準とした場合の電位であって、第２ゲート電極１０５ｂの閾値電圧以上の電位が供給された場合に、第２ゲート電極１０５ｂの下方のチャネル領域１０３にチャネルが生成される。なお、第２ゲート電極１０５ｂの閾値電圧は、例えば、正である。 In addition, when the second gate electrode 105b corresponding to the second ohmic electrode 104b has a potential when the second ohmic electrode 104b is used as a reference and is equal to or higher than the threshold voltage of the second gate electrode 105b. A channel is generated in the channel region 103 below the second gate electrode 105b. Note that the threshold voltage of the second gate electrode 105b is positive, for example.
　第１オーミック端子１０６ａは、第１オーミック電極１０４ａと接続されている。第１オーミック端子１０６ａは、制御部１２０が備える電圧源（又は電流源）、及び、電源１３０の接続用の端子である。 The first ohmic terminal 106a is connected to the first ohmic electrode 104a. The first ohmic terminal 106 a is a terminal for connecting a voltage source (or current source) included in the control unit 120 and the power source 130.
　第２オーミック端子１０６ｂは、第２オーミック電極１０４ｂと接続されている。第２オーミック端子１０６ｂは、制御部１２０が備える電圧源（又は電流源）、及び、電源１３０の接続用の端子である。 The second ohmic terminal 106b is connected to the second ohmic electrode 104b. The second ohmic terminal 106 b is a terminal for connecting a voltage source (or current source) included in the control unit 120 and the power source 130.
　第１ゲート端子１０７ａは、第１ゲート電極１０５ａと接続されている。第１ゲート端子１０７ａは、制御部１２０が備える電圧源（又は電流源）の接続用の端子である。 The first gate terminal 107a is connected to the first gate electrode 105a. The first gate terminal 107a is a terminal for connecting a voltage source (or current source) included in the control unit 120.
　第２ゲート端子１０７ｂは、第２ゲート電極１０５ｂと接続されている。第２ゲート端子１０７ｂは、制御部１２０が備える電圧源（又は電流源）の接続用の端子である。 The second gate terminal 107b is connected to the second gate electrode 105b. The second gate terminal 107b is a terminal for connecting a voltage source (or current source) included in the control unit 120.
　第１コントロール層１０８ａは、第１ゲート電極１０５ａと半導体層積層体１０２との間に形成された、Ｐ型の導電性を持つコントロール層である。第１コントロール層１０８ａは、例えば、Ｐ－ＧａＮから構成される。 The first control layer 108a is a control layer having P-type conductivity formed between the first gate electrode 105a and the semiconductor layer stack 102. The first control layer 108a is made of, for example, P-GaN.
　第２コントロール層１０８ｂは、第２ゲート電極１０５ｂと半導体層積層体１０２との間に形成された、Ｐ型の導電性を持つコントロール層である。第２コントロール層１０８ｂは、例えば、Ｐ－ＧａＮから構成される。第１コントロール層１０８ａ及び第２コントロール層１０８ｂはそれぞれ、チャネル領域１０３との間でＰＮ接合を形成している。 The second control layer 108b is a control layer having P-type conductivity, which is formed between the second gate electrode 105b and the semiconductor layer stack 102. The second control layer 108b is made of, for example, P-GaN. Each of the first control layer 108 a and the second control layer 108 b forms a PN junction with the channel region 103.
　制御部１２０は、半導体素子１００を導通状態にするための回路である。導通状態とは、一対のオーミック電極（第１オーミック電極１０４ａと第２オーミック電極１０４ｂ）の間でチャネル領域１０３を介して双方向に電流を流すことが可能な状態である。図１Ａ及び図１Ｂに示すように、制御部１２０は、電圧源１２１ａ、１２１ｂ、１２２ａ及び１２２ｂと、スイッチ１２３ａ及び１２３ｂとを備える。 The control unit 120 is a circuit for bringing the semiconductor element 100 into a conductive state. The conduction state is a state in which a current can flow in both directions through the channel region 103 between the pair of ohmic electrodes (the first ohmic electrode 104a and the second ohmic electrode 104b). As shown in FIGS. 1A and 1B, the control unit 120 includes voltage sources 121a, 121b, 122a and 122b, and switches 123a and 123b.
　電圧源１２１ａは、一対のゲート電極の閾値電圧以上の電圧である第１電圧を生成する第１電圧源の一例である。電圧源１２１ａは、第１オーミック端子１０６ａと第１ゲート端子１０７ａとの間に、スイッチ１２３ａを介して接続されている。 The voltage source 121a is an example of a first voltage source that generates a first voltage that is equal to or higher than a threshold voltage of a pair of gate electrodes. The voltage source 121a is connected between the first ohmic terminal 106a and the first gate terminal 107a via a switch 123a.
　具体的には、電圧源１２１ａは、第１オーミック電極１０４ａを基準とした場合の第１ゲート電極１０５ａの電位である第１電位が、第１ゲート電極１０５ａの閾値電圧以上となるように、第１ゲート電極１０５ａと第１オーミック電極１０４ａとの間にゲート電圧ＶＧａ１を印加する。なお、ゲート電圧ＶＧａ１は、第１電圧の一例であり、第１ゲート電極１０５ａの閾値電圧以上の電圧である。 Specifically, the voltage source 121a has a first potential that is the potential of the first gate electrode 105a when the first ohmic electrode 104a is used as a reference, so that the first potential is equal to or higher than the threshold voltage of the first gate electrode 105a. A gate voltage VGa1 is applied between the one gate electrode 105a and the first ohmic electrode 104a. The gate voltage VGa1 is an example of the first voltage, and is a voltage that is equal to or higher than the threshold voltage of the first gate electrode 105a.
　電圧源１２２ａは、第１電圧より高い第２電圧を生成する第２電圧源の一例である。電圧源１２１ａは、第１オーミック端子１０６ａと第１ゲート端子１０７ａとの間に、スイッチ１２３ａを介して接続されている。 The voltage source 122a is an example of a second voltage source that generates a second voltage higher than the first voltage. The voltage source 121a is connected between the first ohmic terminal 106a and the first gate terminal 107a via a switch 123a.
　具体的には、電圧源１２２ａは、第１電位が第１ゲート電極１０５ａの閾値電圧以上となるように、第１ゲート電極１０５ａと第１オーミック電極１０４ａとの間にゲート電圧ＶＧａ２を印加する。なお、ゲート電圧ＶＧａ２は、第２電圧の一例であり、第１ゲート電極１０５ａの閾値電圧以上であり、かつ、ゲート電圧ＶＧａ１より高い電圧である。 Specifically, the voltage source 122a applies the gate voltage VGa2 between the first gate electrode 105a and the first ohmic electrode 104a so that the first potential is equal to or higher than the threshold voltage of the first gate electrode 105a. Note that the gate voltage VGa2 is an example of a second voltage, which is equal to or higher than the threshold voltage of the first gate electrode 105a and higher than the gate voltage VGa1.
　スイッチ１２３ａは、電源１３０の電源電圧ＶＳｂａの極性に応じて、電圧源１２１ａ及び電圧源１２２ａのいずれかを選択する。具体的には、スイッチ１２３ａは、電源１３０の電源電圧ＶＳｂａが正の場合、すなわち、第２オーミック電極１０４ｂの電位が第１オーミック電極１０４ａの電位より高い場合（図１Ａ参照）、高電圧の電圧源１２２ａを選択する。また、スイッチ１２３ａは、電源１３０の電源電圧ＶＳｂａが負の場合、すなわち、第２オーミック電極１０４ｂの電位が第１オーミック電極１０４ａの電位より低い場合（図１Ｂ参照）、低電圧の電圧源１２１ａを選択する。 The switch 123a selects either the voltage source 121a or the voltage source 122a according to the polarity of the power supply voltage VSba of the power supply 130. Specifically, the switch 123a has a high voltage when the power supply voltage VSba of the power supply 130 is positive, that is, when the potential of the second ohmic electrode 104b is higher than the potential of the first ohmic electrode 104a (see FIG. 1A). Source 122a is selected. Further, the switch 123a switches the low voltage source 121a when the power supply voltage VSba of the power supply 130 is negative, that is, when the potential of the second ohmic electrode 104b is lower than the potential of the first ohmic electrode 104a (see FIG. 1B). select.
　電圧源１２１ｂは、一対のゲート電極の閾値電圧以上の電圧である第１電圧を生成する第１電圧源の一例である。電圧源１２１ｂは、第２オーミック端子１０６ｂと第２ゲート端子１０７ｂとの間に、スイッチ１２３ｂを介して接続されている。 The voltage source 121b is an example of a first voltage source that generates a first voltage that is equal to or higher than a threshold voltage of a pair of gate electrodes. The voltage source 121b is connected between the second ohmic terminal 106b and the second gate terminal 107b via a switch 123b.
　具体的には、電圧源１２１ｂは、第２オーミック電極１０４ｂを基準とした場合の第２ゲート電極１０５ｂの電位である第２電位が、第２ゲート電極１０５ｂの閾値電圧以上となるように、第２ゲート電極１０５ｂと第２オーミック電極１０４ｂとの間にゲート電圧ＶＧｂ１を印加する。なお、ゲート電圧ＶＧｂ１は、第１電圧の一例であり、第２ゲート電極１０５ｂの閾値電圧以上の電圧である。また、ゲート電圧ＶＧｂ１は、ゲート電圧ＶＧａ１と等しくてもよい。 Specifically, the voltage source 121b is configured so that the second potential, which is the potential of the second gate electrode 105b with respect to the second ohmic electrode 104b, is equal to or higher than the threshold voltage of the second gate electrode 105b. A gate voltage VGb1 is applied between the two gate electrodes 105b and the second ohmic electrode 104b. Note that the gate voltage VGb1 is an example of the first voltage, and is a voltage equal to or higher than the threshold voltage of the second gate electrode 105b. Further, the gate voltage VGb1 may be equal to the gate voltage VGa1.
　電圧源１２２ｂは、第１電圧より高い第２電圧を生成する第２電圧源の一例である。電圧源１２１ｂは、第２オーミック端子１０６ｂと第２ゲート端子１０７ｂとの間に、スイッチ１２３ｂを介して接続されている。 The voltage source 122b is an example of a second voltage source that generates a second voltage higher than the first voltage. The voltage source 121b is connected between the second ohmic terminal 106b and the second gate terminal 107b via a switch 123b.
　具体的には、電圧源１２２ｂは、第２電位が第２ゲート電極１０５ｂの閾値電圧以上となるように、第２ゲート電極１０５ｂと第２オーミック電極１０４ｂとの間にゲート電圧ＶＧｂ２を印加する。なお、ゲート電圧ＶＧｂ２は、第２電圧の一例であり、第２ゲート電極１０５ｂの閾値電圧以上であり、かつ、ゲート電圧ＶＧｂ１より高い電圧である。また、ゲート電圧ＶＧｂ２は、ゲート電圧ＶＧａ２と等しくてもよい。 Specifically, the voltage source 122b applies the gate voltage VGb2 between the second gate electrode 105b and the second ohmic electrode 104b so that the second potential is equal to or higher than the threshold voltage of the second gate electrode 105b. Note that the gate voltage VGb2 is an example of a second voltage, which is equal to or higher than the threshold voltage of the second gate electrode 105b and higher than the gate voltage VGb1. Further, the gate voltage VGb2 may be equal to the gate voltage VGa2.
　スイッチ１２３ｂは、電源１３０の電源電圧ＶＳｂａの極性に応じて、電圧源１２１ｂ及び電圧源１２２ｂのいずれかを選択する。具体的には、スイッチ１２３ｂは、電源１３０の電源電圧ＶＳｂａが正の場合、すなわち、第２オーミック電極１０４ｂの電位が第１オーミック電極１０４ａの電位より高い場合（図１Ａ参照）、低電圧の電圧源１２１ｂを選択する。また、スイッチ１２３ｂは、電源１３０の電源電圧ＶＳｂａが負の場合、すなわち、第２オーミック電極１０４ｂの電位が第１オーミック電極１０４ａの電位より低い場合（図１Ｂ参照）、高電圧の電圧源１２２ｂを選択する。 The switch 123b selects either the voltage source 121b or the voltage source 122b according to the polarity of the power supply voltage VSba of the power supply 130. Specifically, the switch 123b has a low voltage when the power supply voltage VSba of the power supply 130 is positive, that is, when the potential of the second ohmic electrode 104b is higher than the potential of the first ohmic electrode 104a (see FIG. 1A). The source 121b is selected. Further, the switch 123b switches the high voltage source 122b when the power supply voltage VSba of the power supply 130 is negative, that is, when the potential of the second ohmic electrode 104b is lower than the potential of the first ohmic electrode 104a (see FIG. 1B). select.
　このように、制御部１２０は、半導体素子１００を導通状態にする場合に、一対のオーミック電極のうち高電位側のオーミック電極を基準とした場合の電位であって、高電位側のオーミック電極に対応するゲート電極である高電位側ゲート電極の電位が、低電位側のオーミック電極を基準とした場合の電位であって、低電位側のオーミック電極に対応するゲート電極である低電位側ゲート電極の電位より低くなるように、高電位側ゲート電極に第１電気信号を供給し、かつ、低電位側ゲート電極に第２電気信号を供給する。 As described above, when the semiconductor element 100 is brought into the conductive state, the control unit 120 has a potential when the high-potential-side ohmic electrode of the pair of ohmic electrodes is used as a reference, and the high-potential-side ohmic electrode. The potential of the high-potential-side gate electrode that is the corresponding gate electrode is a potential when the low-potential-side ohmic electrode is used as a reference, and the low-potential-side gate electrode that is the gate electrode corresponding to the low-potential-side ohmic electrode The first electric signal is supplied to the high potential side gate electrode and the second electric signal is supplied to the low potential side gate electrode so as to be lower than the first potential.
　例えば、図１Ａの例では、高電位側のオーミック電極及び高電位側ゲート電極は、第２オーミック電極１０４ｂ及び第２ゲート電極１０５ｂである。そして、低電位側のオーミック電極及び低電位側ゲート電極は、第１オーミック電極１０４ａ及び第１ゲート電極１０５ａである。 For example, in the example of FIG. 1A, the high-potential-side ohmic electrode and the high-potential-side gate electrode are the second ohmic electrode 104b and the second gate electrode 105b. The low potential side ohmic electrode and the low potential side gate electrode are the first ohmic electrode 104a and the first gate electrode 105a.
　高電位側ゲート電極である第２ゲート電極１０５ｂには、低電圧の電圧源１２１ｂからゲート電圧ＶＧｂ１が第１電気信号として供給される。そして、低電位側ゲート電極である第１ゲート電極１０５ａには、高電圧の電圧源１２２ａからゲート電圧ＶＧａ２が第２電気信号として供給される。このとき、ＶＧａ２＞ＶＧｂ１である。 The gate voltage VGb1 is supplied as a first electric signal from the low voltage source 121b to the second gate electrode 105b which is the high potential side gate electrode. The gate voltage VGa2 is supplied as the second electric signal from the high voltage source 122a to the first gate electrode 105a which is the low potential side gate electrode. At this time, VGa2> VGb1.
　図１Ｂの例では、高電位側のオーミック電極及び高電位側ゲート電極は、第１オーミック電極１０４ａ及び第１ゲート電極１０５ａである。そして、低電位側のオーミック電極及び低電位側ゲート電極は、第２オーミック電極１０４ｂ及び第２ゲート電極１０５ｂである。 In the example of FIG. 1B, the high-potential-side ohmic electrode and the high-potential-side gate electrode are the first ohmic electrode 104a and the first gate electrode 105a. The low potential side ohmic electrode and the low potential side gate electrode are the second ohmic electrode 104b and the second gate electrode 105b.
　高電位側ゲート電極である第１ゲート電極１０５ａには、低電圧の電圧源１２１ａからゲート電圧ＶＧａ１が第１電気信号として供給される。そして、低電位側ゲート電極である第２ゲート電極１０５ｂには、高電圧の電圧源１２２ｂからゲート電圧ＶＧｂ２が第２電気信号として供給される。このとき、ＶＧｂ２＞ＶＧａ１である。 The gate voltage VGa1 is supplied as a first electric signal from the low voltage source 121a to the first gate electrode 105a which is the high potential side gate electrode. The gate voltage VGb2 is supplied as a second electric signal from the high voltage source 122b to the second gate electrode 105b, which is the low potential side gate electrode. At this time, VGb2> VGa1.
　以下では、本発明の実施の形態１に係る半導体装置１０の動作について説明する。 Hereinafter, the operation of the semiconductor device 10 according to the first embodiment of the present invention will be described.
　図２は、本発明の実施の形態１に係る半導体素子１００が導通状態である場合におけるチャネル領域１０３の挙動を説明するための図である。 FIG. 2 is a diagram for explaining the behavior of the channel region 103 when the semiconductor element 100 according to the first embodiment of the present invention is in a conductive state.
　第１ゲート電極１０５ａの閾値電圧以上の電位ＶＧａが、第１オーミック電極１０４ａを基準として第１ゲート電極１０５ａに印加され、かつ、第２ゲート電極１０５ｂの閾値電圧以上の電位ＶＧｂが、第２オーミック電極１０４ｂを基準として第２ゲート電極１０５ｂに印加された場合に、半導体素子１００は導電状態となる。このとき、第１オーミック電極１０４ａと第２オーミック電極１０４ｂとの間に、電源電圧ＶＳｂａを印加することで、第１オーミック電極１０４ａと第２オーミック電極１０４ｂとの間に電流ＩＳｂａが流れる。 A potential VGa equal to or higher than the threshold voltage of the first gate electrode 105a is applied to the first gate electrode 105a with the first ohmic electrode 104a as a reference, and a potential VGb equal to or higher than the threshold voltage of the second gate electrode 105b is equal to the second ohmic. When applied to the second gate electrode 105b with the electrode 104b as a reference, the semiconductor element 100 becomes conductive. At this time, a current ISba flows between the first ohmic electrode 104a and the second ohmic electrode 104b by applying the power supply voltage VSba between the first ohmic electrode 104a and the second ohmic electrode 104b.
　このとき、電流ＩＳｂａの向きは、電源電圧ＶＳｂａの極性に応じて決定される。つまり、第１オーミック電極１０４ａと第２オーミック電極１０４ｂとのうち、高電位側のオーミック電極から低電位側のオーミック電極に電流ＩＳｂａが流れる。 At this time, the direction of the current ISba is determined according to the polarity of the power supply voltage VSba. That is, of the first ohmic electrode 104a and the second ohmic electrode 104b, the current ISba flows from the high potential side ohmic electrode to the low potential side ohmic electrode.
　図３Ａは、本発明の実施の形態１に係るＩＳｂａとＶＳｂａとの関係の一例を示す図である。図３Ａに示すように、電源電圧ＶＳｂａが大きくなるにつれて、電流ＩＳｂａも大きくなる。 FIG. 3A is a diagram showing an example of the relationship between ISba and VSba according to Embodiment 1 of the present invention. As shown in FIG. 3A, as the power supply voltage VSba increases, the current ISba also increases.
　また、半導体素子１００が導通状態であるとき、第１ゲート電極１０５ａの電位は、第１オーミック電極１０４ａの電位よりＶＧａだけ高い。したがって、第１ゲート電極１０５ａから第１コントロール層１０８ａを介してチャネル領域１０３へ第１ゲート電流ＩＧａが流れる。 Further, when the semiconductor element 100 is in a conductive state, the potential of the first gate electrode 105a is higher by VGa than the potential of the first ohmic electrode 104a. Therefore, the first gate current IGa flows from the first gate electrode 105a to the channel region 103 through the first control layer 108a.
　同様に、半導体素子１００が導通状態であるとき、第２ゲート電極１０５ｂの電位は、第２オーミック電極１０４ｂの電位よりＶＧｂだけ高く、第１オーミック電極１０４ａの電位よりＶＳｂａ＋ＶＧｂだけ高い。したがって、第２ゲート電極１０５ｂから第２コントロール層１０８ｂを介してチャネル領域１０３へ第２ゲート電流ＩＧｂが流れる。 Similarly, when the semiconductor element 100 is in a conductive state, the potential of the second gate electrode 105b is higher by VGb than the potential of the second ohmic electrode 104b, and higher by VSba + VGb than the potential of the first ohmic electrode 104a. Therefore, the second gate current IGb flows from the second gate electrode 105b to the channel region 103 through the second control layer 108b.
　まず、ＶＳｂａ＞０の場合（図１Ａ）について説明する。第１ゲート電極１０５ａ直下のチャネル領域１０３について、半導体素子１００が導通状態のとき、高電位側の第２オーミック電極１０４ｂから低電位側の第１オーミック電極１０４ａに向けて、チャネル領域１０３には電流ＩＳｂａが流れている。 First, the case where VSba> 0 (FIG. 1A) will be described. With respect to the channel region 103 immediately below the first gate electrode 105a, when the semiconductor element 100 is in a conductive state, the channel region 103 has a current flowing from the second ohmic electrode 104b on the high potential side toward the first ohmic electrode 104a on the low potential side. ISba is flowing.
　半導体素子１００の内部には、抵抗１０９ａ、１０９ｂ及び１０９ｃが存在する。抵抗１０９ａは、第１オーミック電極１０４ａから第１ゲート電極１０５ａ直下のチャネル領域のＡ点までの抵抗である。抵抗１０９ｂは、第１ゲート電極１０５ａ直下のチャネル領域のＡ点から第２ゲート電極１０５ｂ直下のチャネル領域のＢ点までのチャネル領域の抵抗である。抵抗１０９ｃは、第２ゲート電極１０５ｂ直下のチャネル領域のＢ点から第２オーミック電極１０４ｂまでの抵抗である。 Resistors 109 a, 109 b and 109 c exist inside the semiconductor element 100. The resistor 109a is a resistor from the first ohmic electrode 104a to the point A in the channel region immediately below the first gate electrode 105a. The resistor 109b is the resistance of the channel region from point A in the channel region immediately below the first gate electrode 105a to point B in the channel region immediately below the second gate electrode 105b. The resistor 109c is a resistor from the point B of the channel region immediately below the second gate electrode 105b to the second ohmic electrode 104b.
　半導体素子１００が導通状態で、ＩＳｂａが流れると抵抗１０９ａ、１０９ｂ及び１０９ｃで、それぞれ電圧ドロップが発生する。各電圧ドロップの総和が、電源電圧ＶＳｂａに相当する。 When the semiconductor element 100 is in a conductive state and ISba flows, a voltage drop occurs in each of the resistors 109a, 109b, and 109c. The total sum of the voltage drops corresponds to the power supply voltage VSba.
　第１ゲート電極１０５ａ直下のチャネル領域のＡ点の電位は、ＩＳｂａと抵抗１０９ａとによる電圧ドロップにより、第１オーミック端子１０６ａの電位よりも高くなっている。Ａ点の電位は、ＩＳｂａの増加に伴って上昇するため、第１ゲート電極１０５ａとＡ点との間に印加される電圧は、ＩＳｂａが増加するほどＶＧａに対して小さくなる。 The potential at point A in the channel region immediately below the first gate electrode 105a is higher than the potential at the first ohmic terminal 106a due to voltage drop caused by ISba and the resistor 109a. Since the potential at the point A rises as ISba increases, the voltage applied between the first gate electrode 105a and the point A becomes smaller than VGa as ISba increases.
　ＩＳｂａがさらに増加し、Ａ点にチャネルが形成されなくなった時点で、図３Ａに示すように、ＩＳｂａは飽和する。Ａ点にチャネルが形成されるか否かは、Ａ点と第１ゲート電極１０５ａとの電位差によって決まるので、第１オーミック電極１０４ａの電位を基準とした場合の第１ゲート電極１０５ａの電位が高い程、Ａ点のチャネルは維持されやすくなる。 When ISba further increases and no channel is formed at point A, ISba saturates as shown in FIG. 3A. Whether or not a channel is formed at the point A is determined by the potential difference between the point A and the first gate electrode 105a. Therefore, the potential of the first gate electrode 105a is high when the potential of the first ohmic electrode 104a is used as a reference. As a result, the channel at point A is more easily maintained.
　したがって、ＩＳｂａの飽和電流の大きさは、ＶＧａの大きさに依存する。つまり、ＩＳｂａの飽和電流の大きさは、第１ゲート電極１０５ａと第１オーミック電極１０４ａとの電位差に依存する。言い換えると、ＩＳｂａの飽和電流の大きさは、低電位側のオーミック電極と低電位側ゲート電極との間に印加される電圧に依存する。 Therefore, the magnitude of the saturation current of ISba depends on the magnitude of VGa. That is, the magnitude of the saturation current of ISba depends on the potential difference between the first gate electrode 105a and the first ohmic electrode 104a. In other words, the magnitude of the saturation current of ISba depends on the voltage applied between the low potential side ohmic electrode and the low potential side gate electrode.
　なお、ＩＳｂａが増加するとＡ点の電位が上昇するため、第１ゲート端子１０７ａから第１ゲート電極１０５ａ及び第１コントロール層１０８ａを介してチャネル領域１０３に流れる電流ＩＧａは減少する。 Note that, as ISba increases, the potential at point A increases, so that the current IGa flowing from the first gate terminal 107a to the channel region 103 via the first gate electrode 105a and the first control layer 108a decreases.
　次に、第２ゲート電極１０５ｂ直下のチャネル領域１０３について説明すると、半導体素子１００が導通状態のとき、チャネル領域１０３にはＩＳｂａが流れる。 Next, the channel region 103 immediately below the second gate electrode 105b will be described. When the semiconductor element 100 is conductive, ISba flows through the channel region 103.
　第２ゲート電極１０５ｂ直下のチャネル領域のＢ点の電位は、ＩＳｂａと抵抗１０９ｃとによる電圧ドロップにより、第２オーミック端子１０６ｂの電位よりも低くなっている。第２オーミック端子１０６ｂに対するＢ点の電位は、ＩＳｂａの増加に伴って下降する。 The potential at point B in the channel region immediately below the second gate electrode 105b is lower than the potential of the second ohmic terminal 106b due to voltage drop caused by ISba and the resistor 109c. The potential at the point B with respect to the second ohmic terminal 106b decreases as ISba increases.
　また、第２ゲート端子１０７ｂには、第２オーミック端子１０６ｂに対してＶＧｂの電圧が印加されている。第２ゲート電極１０５ｂとＢ点との間に印加される電圧は、ＩＳｂａが増加するほどＶＧｂに対して大きくなる。したがって、半導体素子１００が導通状態である場合において、第２ゲート電極１０５ｂの閾値電圧以上の電位ＶＧｂが第２オーミック電極１０４ｂを基準として第２ゲート電極１０５ｂに印加されているとき、ＩＳｂａが増加しても、Ｂ点にはチャネルは形成されたままである。 Further, a voltage VGb is applied to the second gate terminal 107b with respect to the second ohmic terminal 106b. The voltage applied between the second gate electrode 105b and the point B increases with respect to VGb as ISba increases. Therefore, when the semiconductor element 100 is in a conductive state, when the potential VGb equal to or higher than the threshold voltage of the second gate electrode 105b is applied to the second gate electrode 105b with respect to the second ohmic electrode 104b, ISba increases. Even so, a channel is still formed at point B.
　さらに、ＩＳｂａが増加すると、第１オーミック端子１０６ａに対する第２オーミック端子１０６ｂの電位ＶＳｂａが上昇する。このため、第１オーミック端子１０６ａに対する第２ゲート端子１０７ｂの電位は、ＶＳｂａ＋ＶＧｂに上昇する。したがって、ＩＳｂａが増加すると、第２ゲート端子１０７ｂから第２ゲート電極１０５ｂ、第２コントロール層１０８ｂ及びチャネル領域１０３を介して第１オーミック端子１０６ａへ流れる電流、すなわち、ＩＧｂが増加する。 Further, when ISba increases, the potential VSba of the second ohmic terminal 106b with respect to the first ohmic terminal 106a increases. For this reason, the potential of the second gate terminal 107b with respect to the first ohmic terminal 106a rises to VSba + VGb. Therefore, when ISba increases, the current flowing from the second gate terminal 107b to the first ohmic terminal 106a via the second gate electrode 105b, the second control layer 108b, and the channel region 103, that is, IGb increases.
　つまり、第２ゲート端子１０７ｂを流れるゲート電流ＩＧｂは、第２ゲート電極１０５ｂと第２オーミック電極１０４ｂとの電位差が大きい程、大きくなる。言い換えると、高電位側ゲート電極に流れるゲート電流は、高電位側ゲート電極と高電位側のオーミック電極との電位差が大きい程、大きくなる。 That is, the gate current IGb flowing through the second gate terminal 107b increases as the potential difference between the second gate electrode 105b and the second ohmic electrode 104b increases. In other words, the gate current flowing through the high potential side gate electrode increases as the potential difference between the high potential side gate electrode and the high potential side ohmic electrode increases.
　次に、ＶＳｂａ＜０の場合（図１Ｂ）、ＩＳｂａ＜０となり、極性が反転する。 Next, when VSba <0 (FIG. 1B), ISba <0 and the polarity is inverted.
　第２ゲート電極１０５ｂ直下のチャネル領域のＢ点の電位は、ＩＳｂａと抵抗１０９ｃとによる電圧ドロップより、第２オーミック端子１０６ｂの電位よりも高くなっている。Ｂ点の電位は、ＩＳｂａの増加に伴って上昇するため、第２ゲート電極１０５ｂとＢ点との間に印加される電圧は、ＩＳｂａが増加するほどＶＧｂに対して大きくなる。 The potential at point B in the channel region immediately below the second gate electrode 105b is higher than the potential at the second ohmic terminal 106b due to voltage drop caused by ISba and the resistor 109c. Since the potential at the point B rises as ISba increases, the voltage applied between the second gate electrode 105b and the point B increases with respect to VGb as ISba increases.
　ＩＳｂａがさらに増加し、Ｂ点にチャネルが形成されなくなった時点で、ＩＳｂａは飽和する。Ｂ点にチャネルが形成されるか否かは、Ｂ点と第２ゲート電極１０５ｂとの電位差によって決まるので、第２オーミック電極１０４ｂの電位を基準とした場合の第２ゲート電極１０５ｂの電位が高い程、Ｂ点のチャネルは維持されやすくなる。 When ISba further increases and no channel is formed at point B, ISba is saturated. Whether or not a channel is formed at the point B is determined by the potential difference between the point B and the second gate electrode 105b. Therefore, the potential of the second gate electrode 105b is high when the potential of the second ohmic electrode 104b is used as a reference. As a result, the channel at the point B is more easily maintained.
　したがって、ＩＳｂａの飽和電流の大きさは、ＶＧｂの大きさに依存する。つまり、ＩＳｂａの飽和電流の大きさは、第２ゲート電極１０５ｂと第２オーミック電極１０４ｂとの電位差に依存する。言い換えると、ＩＳｂａの飽和電流の大きさは、低電位側のオーミック電極と低電位側ゲート電極との間に印加される電圧に依存する。 Therefore, the magnitude of the saturation current of ISba depends on the magnitude of VGb. That is, the magnitude of the saturation current of ISba depends on the potential difference between the second gate electrode 105b and the second ohmic electrode 104b. In other words, the magnitude of the saturation current of ISba depends on the voltage applied between the low potential side ohmic electrode and the low potential side gate electrode.
　なお、ＩＳｂａの絶対値が増加するとＢ点の電位が上昇するため、第２ゲート端子１０７ｂから第２ゲート電極１０５ｂ及び第２コントロール層１０８ｂを介してチャネル領域１０３に流れる電流ＩＧｂが減少する。 Note that when the absolute value of ISba increases, the potential at the point B increases, so that the current IGb flowing from the second gate terminal 107b to the channel region 103 via the second gate electrode 105b and the second control layer 108b decreases.
　また、第１ゲート端子１０７ａには、第１オーミック端子１０６ａに対してＶＧａの電圧が印加されている。第１ゲート電極１０５ａとＡ点との間に印加される電圧は、ＩＳｂａの絶対値が増加するほどＶＧａに対して大きくなる。したがって、半導体素子１００が導通状態である場合において、第１ゲート電極１０５ａの閾値電圧以上の電位ＶＧａが第１オーミック電極１０４ａを基準として第１ゲート電極１０５ａに印加されているとき、ＩＳｂａの絶対値が増加しても、Ａ点にはチャネルが形成されたままである。 In addition, a voltage of VGa is applied to the first gate terminal 107a with respect to the first ohmic terminal 106a. The voltage applied between the first gate electrode 105a and the point A increases with respect to VGa as the absolute value of ISba increases. Therefore, when the semiconductor element 100 is in a conductive state, when a potential VGa that is equal to or higher than the threshold voltage of the first gate electrode 105a is applied to the first gate electrode 105a with respect to the first ohmic electrode 104a, the absolute value of ISba. Even if increases, a channel is still formed at point A.
　さらに、ＩＳｂａの絶対値が増加すると、第２オーミック端子１０６ｂに対する第１オーミック端子１０６ａの電位ＶＳｂａの絶対値が上昇する。このため、第２オーミック端子１０６ｂに対する第１ゲート端子１０７ａの電位は、ＶＳｂａの絶対値＋ＶＧａに上昇する。したがって、ＩＳＢａの絶対値が増加すると、第１ゲート端子１０７ａから第１ゲート電極１０５ａ、第１コントロール層１０８ａ及びチャネル領域１０３を介して第２オーミック端子１０６ｂへ流れる電流、すなわち、ＩＧａが増加する。 Furthermore, when the absolute value of ISba increases, the absolute value of the potential VSba of the first ohmic terminal 106a with respect to the second ohmic terminal 106b increases. For this reason, the potential of the first gate terminal 107a with respect to the second ohmic terminal 106b rises to the absolute value of VSba + VGa. Therefore, when the absolute value of ISBa increases, the current flowing from the first gate terminal 107a to the second ohmic terminal 106b through the first gate electrode 105a, the first control layer 108a, and the channel region 103, that is, IGa increases.
　なお、ＶＳｂａ＞０のときのＩＳｂａの飽和電流と、ＶＳｂａ＜０のときのＩＳｂａの飽和電流の絶対値を一致させる場合には、ＶＧａ＝ＶＧｂとする。 Note that when the absolute value of the ISba saturation current when VSba> 0 matches the absolute value of the ISba saturation current when VSba <0, VGa = VGb.
　以上のように、ＩＳｂａの飽和電流の大きさは、低電位側のオーミック電極と低電位側ゲート電極との間の電位差に依存する。また、高電位側ゲート電極に流れるゲート電流の大きさは、高電位側のオーミック電極と高電位側ゲート電極との間の電位差に依存する。 As described above, the magnitude of the ISba saturation current depends on the potential difference between the low potential side ohmic electrode and the low potential side gate electrode. Further, the magnitude of the gate current flowing through the high potential side gate electrode depends on the potential difference between the high potential side ohmic electrode and the high potential side gate electrode.
　したがって、低電位側のオーミック電極と低電位側ゲート電極との電位差を保ちつつ、高電位側のオーミック電極と高電位側ゲート電極との間の電位差を小さくすることで、ＩＳｂａの飽和電流の大きさを保ちつつ、ゲート電流の大きさを小さくすることができる。 Therefore, by maintaining the potential difference between the low potential side ohmic electrode and the low potential side gate electrode while reducing the potential difference between the high potential side ohmic electrode and the high potential side gate electrode, the saturation current of ISba is increased. The gate current can be reduced while maintaining the thickness.
　本発明の実施の形態１に係る半導体装置１０の制御部１２０は、第１オーミック端子１０６ａと第１ゲート端子１０７ａとの間に、２つの電圧源１２１ａ及び１２２ａを備えている。２つの電圧源１２１ａ及び１２２ａはそれぞれ、第１ゲート電極１０５ａの閾値電圧以上のゲート電圧ＶＧａ１（第１電圧）及びＶＧａ２（第２電圧）を生成する。 The control unit 120 of the semiconductor device 10 according to the first embodiment of the present invention includes two voltage sources 121a and 122a between the first ohmic terminal 106a and the first gate terminal 107a. The two voltage sources 121a and 122a generate gate voltages VGa1 (first voltage) and VGa2 (second voltage) that are equal to or higher than the threshold voltage of the first gate electrode 105a, respectively.
　そして、スイッチ１２３ａは、電圧源１２１ａ及び１２２ａのいずれかを選択する。すなわち、スイッチ１２３ａは、第１オーミック端子１０６ａと第１ゲート端子１０７ａとの間に印加する電圧を切り替える。 The switch 123a selects one of the voltage sources 121a and 122a. That is, the switch 123a switches the voltage applied between the first ohmic terminal 106a and the first gate terminal 107a.
　このとき、ＶＧａ１は、第１ゲート電極１０５ａの閾値電圧以上で、かつ、ＶＧａ２よりも低い電圧である。また、ＶＧａ２の大きさは、ＶＳｂａ＞０において、ＩＳｂａの飽和電流を流すことができるように設定される。 At this time, VGa1 is equal to or higher than the threshold voltage of the first gate electrode 105a and lower than VGa2. The magnitude of VGa2 is set so that the saturation current of ISba can flow when VSba> 0.
　このように、制御部１２０は、低電圧用の電圧源１２１ａと、高電圧用の電圧源１２１ｂとを備え、第１ゲート電極１０５ａに印加する電圧を選択する。すなわち、制御部１２０は、スイッチ１２３ａにより、低電圧であるＶＧａ１、又は、高電圧であるＶＧａ２を第１ゲート電極１０５ａに印加することができる。 As described above, the control unit 120 includes the voltage source 121a for low voltage and the voltage source 121b for high voltage, and selects a voltage to be applied to the first gate electrode 105a. That is, the control unit 120 can apply the low voltage VGa1 or the high voltage VGa2 to the first gate electrode 105a by the switch 123a.
　また、制御部１２０は、第２オーミック端子１０６ｂと第２ゲート端子１０７ｂの間に、２つの電圧源１２１ｂ及び１２２ｂを備えている。２つの電圧源１２１ｂ及び１２２ｂはそれぞれ、第２ゲート電極１０５ｂの閾値電圧以上のゲート電圧ＶＧｂ１（第１電圧）及びＶＧｂ２（第２電圧）を生成する。 Further, the control unit 120 includes two voltage sources 121b and 122b between the second ohmic terminal 106b and the second gate terminal 107b. The two voltage sources 121b and 122b generate gate voltages VGb1 (first voltage) and VGb2 (second voltage) that are equal to or higher than the threshold voltage of the second gate electrode 105b, respectively.
　そして、スイッチ１２３ｂは、電圧源１２１ｂ及び１２２ｂのいずれかを選択する。すなわち、スイッチ１２３ｂは、第２オーミック端子１０６ｂと第２ゲート端子１０７ｂとの間に印加する電圧を切り替える。 The switch 123b selects one of the voltage sources 121b and 122b. That is, the switch 123b switches the voltage applied between the second ohmic terminal 106b and the second gate terminal 107b.
　このとき、ＶＧｂ１は、第２ゲート電極１０５ｂの閾値電圧以上で、かつ、ＶＧｂ２よりも低い電圧である。また、ＶＧｂ２の大きさは、ＶＳｂａ＜０において、ＩＳｂａの飽和電流を流すことができるように設定される。 At this time, VGb1 is equal to or higher than the threshold voltage of the second gate electrode 105b and lower than VGb2. The magnitude of VGb2 is set so that the saturation current of ISba can flow when VSba <0.
　ＶＳｂａ＞０のときには、低電位側の第１ゲート端子１０７ａと低電位側の第１オーミック端子１０６ａとの間には、高電圧であるＶＧａ２の電圧が印加される。そして、高電位側の第２ゲート端子１０７ｂと高電位側の第２オーミック端子１０６ｂとの間には、低電圧であるＶＧｂ１の電圧が印加される。 When VSba> 0, a high voltage VGa2 is applied between the low potential side first gate terminal 107a and the low potential side first ohmic terminal 106a. A voltage of VGb1, which is a low voltage, is applied between the second gate terminal 107b on the high potential side and the second ohmic terminal 106b on the high potential side.
　このようにすると、第１ゲート端子１０７ａと第１オーミック端子１０６ａとの間には、高電圧であるＶＧａ２が、第２ゲート端子１０７ｂと第２オーミック端子１０６ｂとの間には、高電圧であるＶＧｂ２が印加される場合と比較して、ＩＧｂを抑制させることが可能である。ＩＧｂとＶＳｂａの特性を図３Ｂに示す。 Thus, VGa2 that is a high voltage is between the first gate terminal 107a and the first ohmic terminal 106a, and a high voltage is between the second gate terminal 107b and the second ohmic terminal 106b. Compared with the case where VGb2 is applied, IGb can be suppressed. The characteristics of IGb and VSba are shown in FIG. 3B.
　第２ゲート電極１０５ｂからチャネル領域１０３に向けて流れるゲート電流ＩＧｂは、第２ゲート電極１０５ｂと第１オーミック電極１０４ａとの電位差が大きくなるほど、増大する。 The gate current IGb flowing from the second gate electrode 105b toward the channel region 103 increases as the potential difference between the second gate electrode 105b and the first ohmic electrode 104a increases.
　第２ゲート電極１０５ｂにＶＧｂ２が印加された場合、第２ゲート電極１０５ｂと第１オーミック電極１０４ａとの電位差は、ＶＳｂａ＋ＶＧｂ２になる。本発明の実施の形態１のように、第２ゲート電極１０５ｂにＶＧｂ１が印加された場合、第２ゲート電極１０５ｂと第１オーミック電極１０４ａとの電位差は、ＶＳｂａ＋ＶＧｂ１になる。 When VGb2 is applied to the second gate electrode 105b, the potential difference between the second gate electrode 105b and the first ohmic electrode 104a is VSba + VGb2. When VGb1 is applied to the second gate electrode 105b as in the first embodiment of the present invention, the potential difference between the second gate electrode 105b and the first ohmic electrode 104a is VSba + VGb1.
　ＶＧｂ１＜ＶＧｂ２であるので、本発明の実施の形態１では、第２ゲート電極１０５ｂと第１オーミック電極１０４ａとの電位差は小さくなる。したがって、ゲート電流ＩＧｂの増加を抑制することができ、消費電力の増大を抑制することができる。 Since VGb1 <VGb2, in Embodiment 1 of the present invention, the potential difference between the second gate electrode 105b and the first ohmic electrode 104a is small. Therefore, an increase in the gate current IGb can be suppressed, and an increase in power consumption can be suppressed.
　また、ＩＳｂａの飽和電流はＶＧａ２に依存している。このため、第１ゲート端子１０７ａと第１オーミック端子１０６ａとの間には、高電圧であるＶＧａ２が、第２ゲート端子１０７ｂと第２オーミック端子１０６ｂとの間には、高電圧であるＶＧｂ２が印加される場合と比較して、ＩＳｂａの飽和電流は減少しない。 Also, the saturation current of ISba depends on VGa2. Therefore, a high voltage VGa2 is provided between the first gate terminal 107a and the first ohmic terminal 106a, and a high voltage VGb2 is provided between the second gate terminal 107b and the second ohmic terminal 106b. Compared to the applied case, the saturation current of ISba does not decrease.
　ＶＳｂａ＜０のときには、高電位側の第１ゲート端子１０７ａと高電位側の第１オーミック端子１０６ａとの間には、低電圧であるＶＧａ１の電圧が印加される。そして、低電位側の第２ゲート端子１０７ｂと低電位側の第２オーミック端子１０６ｂとの間には、高電圧であるＶＧｂ２の電圧が印加される。 When VSba <0, a low voltage of VGa1 is applied between the first gate terminal 107a on the high potential side and the first ohmic terminal 106a on the high potential side. A high voltage VGb2 is applied between the low potential side second gate terminal 107b and the low potential side second ohmic terminal 106b.
　このようにすると、第１ゲート端子１０７ａと第１オーミック端子１０６ａとの間には、高電圧であるＶＧａ２が、第２ゲート端子１０７ｂと第２オーミック端子１０６ｂとの間には、高電圧であるＶＧｂ２が印加される場合と比較して、ＩＧａを抑制させることが可能である。また、ＩＳｂａの飽和電流はＶＧｂ２に依存している。このため、第１ゲート端子１０７ａと第１オーミック端子１０６ａとの間には、高電圧であるＶＧａ２が、第２ゲート端子１０７ｂと第２オーミック端子１０６ｂとの間には、高電圧であるＶＧｂ２が印加される場合と比較して、ＩＳｂａの飽和電流は減少しない。 Thus, VGa2 that is a high voltage is between the first gate terminal 107a and the first ohmic terminal 106a, and a high voltage is between the second gate terminal 107b and the second ohmic terminal 106b. Compared with the case where VGb2 is applied, IGa can be suppressed. Further, the saturation current of ISba depends on VGb2. Therefore, a high voltage VGa2 is provided between the first gate terminal 107a and the first ohmic terminal 106a, and a high voltage VGb2 is provided between the second gate terminal 107b and the second ohmic terminal 106b. Compared to the applied case, the saturation current of ISba does not decrease.
　以上のように、本発明の実施の形態１に係る半導体装置１０は、一対のゲート電極と一対のオーミック電極とを有する半導体素子１００と、一対のゲート電極に閾値電圧以上の電圧を印加することで、半導体素子１００を一対のオーミック電極間で導通状態にする制御部１２０とを備える。そして、制御部１２０は、半導体素子１００が導通状態である場合に、高電位側のオーミック電極に対応するゲート電極に低電圧を印加し、低電位側のオーミック電極に対応するゲート電極に高電圧を印加する。すなわち、本発明の実施の形態１に係る半導体装置１０は、低電位側のオーミック電極と低電位側ゲート電極との電位差を保ちつつ、高電位側のオーミック電極と高電位側ゲート電極との間の電位差を小さくする。 As described above, the semiconductor device 10 according to the first embodiment of the present invention applies the semiconductor element 100 having the pair of gate electrodes and the pair of ohmic electrodes, and a voltage equal to or higher than the threshold voltage to the pair of gate electrodes. And a control unit 120 for bringing the semiconductor element 100 into a conductive state between the pair of ohmic electrodes. The control unit 120 applies a low voltage to the gate electrode corresponding to the high-potential side ohmic electrode and applies a high voltage to the gate electrode corresponding to the low-potential side ohmic electrode when the semiconductor element 100 is in a conductive state. Apply. That is, in the semiconductor device 10 according to the first embodiment of the present invention, the potential difference between the low-potential side ohmic electrode and the low-potential side gate electrode is maintained, while the high-potential side ohmic electrode and the high-potential side gate electrode are interposed. Reduce the potential difference.
　電源１３０から流れる電流ＩＳｂａの飽和電流の大きさは、低電位側のオーミック電極と低電位側ゲート電極との間の電位差に依存する。また、高電位側ゲート電極に流れるゲート電流の大きさは、高電位側のオーミック電極と高電位側ゲート電極との間の電位差に依存する。このため、本発明の実施の形態１に係る半導体装置１０によれば、ＩＳｂａの飽和電流の大きさを保ちつつ、ゲート電流の大きさを小さくすることができる。 The magnitude of the saturation current of the current ISba flowing from the power supply 130 depends on the potential difference between the low potential side ohmic electrode and the low potential side gate electrode. Further, the magnitude of the gate current flowing through the high potential side gate electrode depends on the potential difference between the high potential side ohmic electrode and the high potential side gate electrode. For this reason, according to the semiconductor device 10 concerning Embodiment 1 of this invention, the magnitude | size of a gate current can be made small, maintaining the magnitude | size of the saturation current of ISba.
　これにより、ＩＳｂａ－ＶＳｂａの特性を維持したまま、ゲート電流の増大を抑制することが可能となる。具体的には、電源から流れる電流ＩＳｂａの飽和電流の減少を抑制するとともに、ゲート電流の増大を抑制することで、消費電力を削減することができる。 This makes it possible to suppress an increase in gate current while maintaining the ISba-VSba characteristics. Specifically, power consumption can be reduced by suppressing a decrease in the saturation current of the current ISba flowing from the power source and suppressing an increase in the gate current.
　また、本発明の実施の形態１に係る半導体装置１０では、第１ゲート電極１０５ａ及び第２ゲート電極１０５ｂの閾値電圧はともに、正である。これにより、第１オーミック電極１０４ａを基準とした場合に第１ゲート電極１０５ａに印加される電圧、及び、第２オーミック電極１０４ｂを基準とした場合に第２ゲート電極１０５ｂに印加される電圧がともに０のときに、半導体素子１００を遮断状態とすることができる。 In the semiconductor device 10 according to the first embodiment of the present invention, the threshold voltages of the first gate electrode 105a and the second gate electrode 105b are both positive. Accordingly, the voltage applied to the first gate electrode 105a when the first ohmic electrode 104a is used as a reference and the voltage applied to the second gate electrode 105b when the second ohmic electrode 104b is used as a reference are both. When 0, the semiconductor element 100 can be cut off.
　（実施の形態１の変型例１）
　実施の形態１の変型例１について、図面を参照しながら説明する。図４は、本発明の実施の形態１の変型例１に係る半導体装置１０ａの構成の一例を示す図である。実施の形態１と同様の構成要素については、同一の符号を付し、その説明を省略する。 (Variation 1 of Embodiment 1)
A first modification of the first embodiment will be described with reference to the drawings. FIG. 4 is a diagram showing an example of the configuration of the semiconductor device 10a according to the first modification of the first embodiment of the present invention. Constituent elements similar to those of the first embodiment are denoted by the same reference numerals, and the description thereof is omitted.
　実施の形態１の変型例１に係る半導体装置１０ａは、半導体素子１００の代わりに半導体素子１００ａを備える。半導体素子１００ａは、半導体素子１００と比較して、第１コントロール層１０８ａ及び第２コントロール層１０８ｂを備えない点が異なっている。すなわち、第１ゲート電極１０５ａ及び第２ゲート電極１０５ｂと、半導体層積層体１０２とがショットキー接合している。このような構成でも、ＩＳｂａ－ＶＳｂａの特性を維持したまま、ＶＳｂａ＞０のときは高電位側のゲート電流であるＩＧｂの増加を、ＶＳｂａ＜０のときは高電位側のゲート電流であるＩＧａの増加を抑制することができる。 The semiconductor device 10 a according to the first modification of the first embodiment includes a semiconductor element 100 a instead of the semiconductor element 100. The semiconductor element 100a is different from the semiconductor element 100 in that the first control layer 108a and the second control layer 108b are not provided. That is, the first gate electrode 105a and the second gate electrode 105b and the semiconductor layer stack 102 are in Schottky junction. Even with such a configuration, while maintaining the characteristics of ISba-VSba, when VSba> 0, the increase in IGb, which is the gate current on the high potential side, is increased, and when VSba <0, the gate current on the high potential side, IGA, is increased. Can be suppressed.
　このように、本発明の実施の形態１の変型例１に係る半導体装置１０ａによれば、実施の形態１と同様に、電源から流れる電流ＩＳｂａの飽和電流の減少を抑制するとともに、ゲート電流の増大を抑制することで、消費電力を削減することができる。 As described above, according to the semiconductor device 10a according to the first modification of the first embodiment of the present invention, similarly to the first embodiment, the decrease of the saturation current of the current ISba flowing from the power source is suppressed, and the gate current is reduced. By suppressing the increase, power consumption can be reduced.
　（実施の形態１の変型例２）
　実施の形態１の変型例２について、図面を参照しながら説明する。図５は、本発明の実施の形態１の変型例２に係る半導体装置１０ｂの構成の一例を示す図である。実施の形態１と同様の構成要素については、同一の符号を付し、その説明を省略する。 (Modification Example 2 of Embodiment 1)
Modification 2 of Embodiment 1 will be described with reference to the drawings. FIG. 5 is a diagram showing an example of the configuration of the semiconductor device 10b according to the second modification of the first embodiment of the present invention. Constituent elements similar to those of the first embodiment are denoted by the same reference numerals, and the description thereof is omitted.
　実施の形態１の変型例２に係る半導体装置１０ｂは、半導体素子１００の代わりに半導体素子１００ｂを備える。半導体素子１００ｂは、半導体素子１００と比較して、第１コントロール層１０８ａの代わりに第１絶縁膜１１０ａを備える点と、第２コントロール層１０８ｂの代わりに第２絶縁膜１１０ｂを備える点とが異なっている。 The semiconductor device 10 b according to the second modification of the first embodiment includes a semiconductor element 100 b instead of the semiconductor element 100. The semiconductor element 100b is different from the semiconductor element 100 in that the first insulating film 110a is provided instead of the first control layer 108a and the second insulating film 110b is provided instead of the second control layer 108b. ing.
　第１絶縁膜１１０ａは、第１ゲート電極１０５ａと半導体層積層体１０２との間に形成された絶縁膜である。また、第２絶縁膜１１０ｂは、第２ゲート電極１０５ｂと半導体層積層体１０２との間に形成された絶縁膜である。例えば、第１絶縁膜１１０ａ及び第２絶縁膜１１０ｂは、シリコン酸化膜（ＳｉＯ２）又はシリコン窒化膜（ＳｉＮ）などである。 The first insulating film 110 a is an insulating film formed between the first gate electrode 105 a and the semiconductor layer stack 102. The second insulating film 110 b is an insulating film formed between the second gate electrode 105 b and the semiconductor layer stack 102. For example, the first insulating film 110a and the second insulating film 110b are a silicon oxide film (SiO 2 ) or a silicon nitride film (SiN).
　本変型例においては、半導体素子１００ｂが導通状態であり、かつ、定常状態においては、ＩＧａ及びＩＧｂともに０である。しかし、半導体素子１００ｂが導通状態となるときには、第１ゲート電極１０５ａの容量及び第２ゲート電極１０５ｂの容量を蓄積するために、過渡的にＩＧａ及びＩＧｂが流れる。 In this modified example, the semiconductor element 100b is in a conductive state, and both IGa and IGb are 0 in a steady state. However, when the semiconductor element 100b becomes conductive, IGa and IGb flow transiently in order to accumulate the capacitance of the first gate electrode 105a and the capacitance of the second gate electrode 105b.
　ＶＳｂａ＞０のとき、第２ゲート端子１０７ｂと第２オーミック端子１０６ｂとの間にＶＧｂ１が印加されることにより、ＶＧｂ２が印加されるときよりも過渡的なＩＧｂを抑制することができる。 When VSba> 0, by applying VGb1 between the second gate terminal 107b and the second ohmic terminal 106b, transient IGb can be suppressed more than when VGb2 is applied.
　このように、本発明の実施の形態１の変型例２に係る半導体装置１０ｂによれば、実施の形態１と同様に、電源から流れる電流ＩＳｂａの飽和電流の減少を抑制するとともに、ゲート電流の増大を抑制することで、消費電力を削減することができる。さらに、導通状態に切り替わるときに流れる過渡的なゲート電流の増大も抑制することができる。 Thus, according to the semiconductor device 10b according to the second modification of the first embodiment of the present invention, similarly to the first embodiment, the decrease of the saturation current of the current ISba flowing from the power source is suppressed, and the gate current is reduced. By suppressing the increase, power consumption can be reduced. Further, it is possible to suppress an increase in the transient gate current that flows when switching to the conductive state.
　（実施の形態２）
　本発明の実施の形態２に係る半導体装置は、一対のゲート電極と一対のオーミック電極とを有する半導体素子と、一対のゲート電極に閾値電圧以上の電圧となるような電流を供給することで、半導体素子を一対のオーミック電極間で導通状態にする制御部とを備える。そして、制御部は、半導体素子が導通状態である場合に、高電位側のオーミック電極に対応するゲート電極に低電流を供給し、低電位側のオーミック電極に対応するゲート電極に高電流を供給することを特徴とする。 (Embodiment 2)
The semiconductor device according to Embodiment 2 of the present invention supplies a semiconductor element having a pair of gate electrodes and a pair of ohmic electrodes, and a current that becomes a voltage equal to or higher than a threshold voltage to the pair of gate electrodes. And a control unit for bringing the semiconductor element into a conductive state between the pair of ohmic electrodes. The control unit supplies a low current to the gate electrode corresponding to the high-potential side ohmic electrode and supplies a high current to the gate electrode corresponding to the low-potential side ohmic electrode when the semiconductor element is conductive. It is characterized by doing.
　図６は、本発明の実施の形態２に係る半導体装置２０の構成の一例を示す断面図である。図６に示すように、半導体装置２０は、半導体素子１００と、制御部１４０とを備える。実施の形態１と同一の構成要素については、同一の符号を付し、その説明を省略する。 FIG. 6 is a cross-sectional view showing an example of the configuration of the semiconductor device 20 according to the second embodiment of the present invention. As shown in FIG. 6, the semiconductor device 20 includes a semiconductor element 100 and a control unit 140. The same components as those in the first embodiment are denoted by the same reference numerals, and the description thereof is omitted.
　制御部１４０は、半導体素子１００を導通状態にするための回路である。図６に示すように、制御部１４０は、電流源１４１ａ、１４１ｂ、１４２ａ及び１４２ｂと、スイッチ１４３ａ及び１４３ｂとを備える。 The control unit 140 is a circuit for bringing the semiconductor element 100 into a conductive state. As shown in FIG. 6, the control unit 140 includes current sources 141a, 141b, 142a, and 142b, and switches 143a and 143b.
　電流源１４１ａは、一対のゲート電極の閾値電圧以上の電圧を印加するための第１電流を生成する第１電流源の一例である。電流源１４１ａは、第１オーミック端子１０６ａと第１ゲート端子１０７ａとの間に、スイッチ１４３ａを介して接続されている。 The current source 141a is an example of a first current source that generates a first current for applying a voltage equal to or higher than a threshold voltage of a pair of gate electrodes. The current source 141a is connected between the first ohmic terminal 106a and the first gate terminal 107a via the switch 143a.
　具体的には、電流源１４１ａは、第１オーミック電極１０４ａを基準とした場合の第１ゲート電極１０５ａの電位である第１電位が、第１ゲート電極１０５ａの閾値電圧以上となるように、第１ゲート電極１０５ａにゲート電流ＩＧａ１を供給する。なお、ゲート電流ＩＧａ１は、第１電流の一例である。 Specifically, the current source 141a is configured so that the first potential, which is the potential of the first gate electrode 105a with respect to the first ohmic electrode 104a, is equal to or higher than the threshold voltage of the first gate electrode 105a. A gate current IGa1 is supplied to one gate electrode 105a. The gate current IGa1 is an example of the first current.
　電流源１４２ａは、第１電流より大きい第２電流を生成する第２電流源の一例である。電流源１４２ａは、第１オーミック端子１０６ａと第１ゲート端子１０７ａとの間に、スイッチ１４３ａを介して接続されている。 The current source 142a is an example of a second current source that generates a second current larger than the first current. The current source 142a is connected between the first ohmic terminal 106a and the first gate terminal 107a via the switch 143a.
　具体的には、電流源１４２ａは、第１電位が第１ゲート電極１０５ａの閾値電圧以上となるように、第１ゲート電極１０５ａにゲート電流ＩＧａ２を供給する。なお、ゲート電流ＩＧａ２は、第２電流の一例であり、ゲート電流ＩＧａ１より大きい電流である。 Specifically, the current source 142a supplies the gate current IGa2 to the first gate electrode 105a so that the first potential is equal to or higher than the threshold voltage of the first gate electrode 105a. The gate current IGa2 is an example of the second current and is larger than the gate current IGa1.
　スイッチ１４３ａは、電源１３０の電源電圧ＶＳｂａの極性に応じて、電流源１４１ａ及び電流源１４２ａのいずれかを選択する。具体的には、スイッチ１４３ａは、電源１３０の電源電圧ＶＳｂａが正の場合、すなわち、第２オーミック電極１０４ｂの電位が第１オーミック電極１０４ａの電位より高い場合（図６）、高電流の電流源１４２ａを選択する。また、スイッチ１４３ａは、電源１３０の電源電圧ＶＳｂａが負の場合、すなわち、第２オーミック電極１０４ｂの電位が第１オーミック電極１０４ａの電位より低い場合、低電流の電流源１４１ａを選択する。 The switch 143a selects either the current source 141a or the current source 142a according to the polarity of the power supply voltage VSba of the power supply 130. Specifically, the switch 143a is a high-current current source when the power supply voltage VSba of the power supply 130 is positive, that is, when the potential of the second ohmic electrode 104b is higher than the potential of the first ohmic electrode 104a (FIG. 6). 142a is selected. The switch 143a selects the low-current current source 141a when the power supply voltage VSba of the power supply 130 is negative, that is, when the potential of the second ohmic electrode 104b is lower than the potential of the first ohmic electrode 104a.
　電流源１４１ｂは、一対のゲート電極の閾値電圧以上の電圧を印加するための第１電流を生成する第１電流源の一例である。電流源１４１ｂは、第２オーミック端子１０６ｂと第２ゲート端子１０７ｂとの間に、スイッチ１４３ｂを介して接続されている。 The current source 141b is an example of a first current source that generates a first current for applying a voltage equal to or higher than a threshold voltage of a pair of gate electrodes. The current source 141b is connected between the second ohmic terminal 106b and the second gate terminal 107b via a switch 143b.
　具体的には、電流源１４１ｂは、第２オーミック電極１０４ｂを基準とした場合の第２ゲート電極１０５ｂの電位である第２電位が、第２ゲート電極１０５ｂの閾値電圧以上となるように、第２ゲート電極１０５ｂにゲート電流ＩＧｂ１を供給する。なお、ゲート電流ＩＧｂ１は、第１電流の一例である。また、ゲート電流ＩＧｂ１は、ゲート電流ＩＧａ１と等しくてもよい。 Specifically, the current source 141b is configured so that the second potential, which is the potential of the second gate electrode 105b with respect to the second ohmic electrode 104b, is equal to or higher than the threshold voltage of the second gate electrode 105b. A gate current IGb1 is supplied to the two-gate electrode 105b. The gate current IGb1 is an example of the first current. Further, the gate current IGb1 may be equal to the gate current IGa1.
　電流源１４２ｂは、第１電流より大きい第２電流を生成する第２電流源の一例である。電流源１４２ｂは、第２オーミック端子１０６ｂと第２ゲート端子１０７ｂとの間に、スイッチ１４３ｂを介して接続されている。 The current source 142b is an example of a second current source that generates a second current larger than the first current. The current source 142b is connected between the second ohmic terminal 106b and the second gate terminal 107b via the switch 143b.
　具体的には、電流源１４２ｂは、第２電位が第２ゲート電極１０５ｂの閾値電圧以上となるように、第２ゲート電極１０５ｂにゲート電流ＩＧｂ２を供給する。なお、ゲート電流ＩＧｂ２は、第２電流の一例であり、ゲート電流ＩＧｂ１より大きい電流である。また、ゲート電流ＩＧｂ２は、ゲート電流ＩＧａ２と等しくてもよい。 Specifically, the current source 142b supplies the gate current IGb2 to the second gate electrode 105b so that the second potential is equal to or higher than the threshold voltage of the second gate electrode 105b. The gate current IGb2 is an example of the second current and is larger than the gate current IGb1. Further, the gate current IGb2 may be equal to the gate current IGa2.
　スイッチ１４３ｂは、電源１３０の電源電圧ＶＳｂａの極性に応じて、電流源１４１ｂ及び電流源１４２ｂのいずれかを選択する。具体的には、スイッチ１４３ｂは、電源１３０の電源電圧ＶＳｂａが正の場合、すなわち、第２オーミック電極１０４ｂの電位が第１オーミック電極１０４ａの電位より高い場合（図６）、低電流の電流源１４１ｂを選択する。また、スイッチ１４３ｂは、電源１３０の電源電圧ＶＳｂａが負の場合、すなわち、第２オーミック電極１０４ｂの電位が第１オーミック電極１０４ａの電位より低い場合、高電流の電流源１４２ｂを選択する。 The switch 143b selects either the current source 141b or the current source 142b according to the polarity of the power supply voltage VSba of the power supply 130. Specifically, the switch 143b is a low-current current source when the power supply voltage VSba of the power supply 130 is positive, that is, when the potential of the second ohmic electrode 104b is higher than the potential of the first ohmic electrode 104a (FIG. 6). 141b is selected. The switch 143b selects the high-current current source 142b when the power supply voltage VSba of the power supply 130 is negative, that is, when the potential of the second ohmic electrode 104b is lower than the potential of the first ohmic electrode 104a.
　このように、制御部１４０は、半導体素子１００を導通状態にする場合に、一対のオーミック電極のうち高電位側のオーミック電極を基準とした場合の電位であって、高電位側のオーミック電極に対応するゲート電極である高電位側ゲート電極の電位が、低電位側のオーミック電極を基準とした場合の電位であって、低電位側のオーミック電極に対応するゲート電極である低電位側ゲート電極の電位より低くなるように、高電位側ゲート電極に第１電気信号を供給し、かつ、低電位側ゲート電極に第２電気信号を供給する。 As described above, when the semiconductor element 100 is brought into a conductive state, the control unit 140 has a potential when the high-potential-side ohmic electrode is used as a reference and is applied to the high-potential-side ohmic electrode. The potential of the high-potential side gate electrode corresponding to the low-potential side ohmic electrode is the potential when the potential of the high-potential side gate electrode is based on the low-potential side ohmic electrode, The first electric signal is supplied to the high potential side gate electrode and the second electric signal is supplied to the low potential side gate electrode so as to be lower than the first potential.
　例えば、図６の例では、高電位側のオーミック電極及び高電位側ゲート電極は、第２オーミック電極１０４ｂ及び第２ゲート電極１０５ｂである。そして、低電位側のオーミック電極及び低電位側ゲート電極は、第１オーミック電極１０４ａ及び第１ゲート電極１０５ａである。 For example, in the example of FIG. 6, the high-potential-side ohmic electrode and the high-potential-side gate electrode are the second ohmic electrode 104b and the second gate electrode 105b. The low potential side ohmic electrode and the low potential side gate electrode are the first ohmic electrode 104a and the first gate electrode 105a.
　高電位側ゲート電極である第２ゲート電極１０５ｂには、低電流の電流源１４１ｂからゲート電流ＩＧｂ１が第１電気信号として供給される。そして、低電位側ゲート電極である第１ゲート電極１０５ａには、高電流の電流源１４２ａからゲート電流ＩＧａ２が第２電気信号として供給される。このとき、ＩＧａ２＞ＩＧｂ１である。 A gate current IGb1 is supplied as a first electric signal from the low current source 141b to the second gate electrode 105b which is the high potential side gate electrode. Then, the gate current IGa2 is supplied as the second electric signal from the high current source 142a to the first gate electrode 105a which is the low potential side gate electrode. At this time, IGa2> IGb1.
　また、例えば、高電位側のオーミック電極及び高電位側ゲート電極が、第１オーミック電極１０４ａ及び第１ゲート電極１０５ａであり、低電位側のオーミック電極及び低電位側ゲート電極が、第２オーミック電極１０４ｂ及び第２ゲート電極１０５ｂである場合を想定する。 Further, for example, the high potential side ohmic electrode and the high potential side gate electrode are the first ohmic electrode 104a and the first gate electrode 105a, and the low potential side ohmic electrode and the low potential side gate electrode are the second ohmic electrode. Assume that the gate electrode 104b and the second gate electrode 105b are used.
　この場合、高電位側ゲート電極である第１ゲート電極１０５ａには、低電流の電流源１４１ａからゲート電流ＩＧａ１が第１電気信号として供給される。そして、低電位側ゲート電極である第２ゲート電極１０５ｂには、高電流の電流源１４２ｂからゲート電流ＩＧｂ２が第２電気信号として供給される。このとき、ＩＧｂ２＞ＩＧａ１である。 In this case, the gate current IGa1 is supplied as the first electric signal from the low current source 141a to the first gate electrode 105a which is the high potential side gate electrode. Then, the gate current IGb2 is supplied as the second electric signal from the high current source 142b to the second gate electrode 105b which is the low potential side gate electrode. At this time, IGb2> IGa1.
　以下では、本発明の実施の形態２に係る半導体装置２０の動作について説明する。 Hereinafter, the operation of the semiconductor device 20 according to the second embodiment of the present invention will be described.
　本発明の実施の形態２における半導体装置２０の制御部１４０は、第１オーミック端子１０６ａと第１ゲート端子１０７ａとの間に、２つの電流源１４１ａ及び１４２ａを備えている。２つの電流源１４１ａ及び１４２ａはそれぞれ、第１ゲート電極１０５ａの閾値電圧以上の電位を印加することができるようなゲート電流ＩＧａ１（第１電流）及びＩＧａ２（第２電流）を生成する。 The control unit 140 of the semiconductor device 20 according to the second embodiment of the present invention includes two current sources 141a and 142a between the first ohmic terminal 106a and the first gate terminal 107a. The two current sources 141a and 142a respectively generate gate currents IGa1 (first current) and IGa2 (second current) that can apply a potential equal to or higher than the threshold voltage of the first gate electrode 105a.
　そして、スイッチ１４３ａは、電流源１４１ａ及び１４２ａのいずれかを選択する。すなわち、スイッチ１４３ａは、第１ゲート端子１０７ａに供給する電流を切り替える。 The switch 143a selects one of the current sources 141a and 142a. That is, the switch 143a switches the current supplied to the first gate terminal 107a.
　このとき、ＩＧａ１は、第１ゲート電極１０５ａの閾値電圧以上の電圧を印加するための電流であり、ＩＧａ２より小さい電流である。また、ＩＧａ２の大きさは、ＶＳｂａ＞０において、ＩＳｂａの飽和電流を流すことができるゲート電圧ＶＧａになるように設定される。 At this time, IGa1 is a current for applying a voltage equal to or higher than the threshold voltage of the first gate electrode 105a, and is a current smaller than IGa2. The magnitude of IGa2 is set so as to be a gate voltage VGa that allows a saturation current of ISba to flow when VSba> 0.
　このように、制御部１４０は、低電流用の電流源１４１ａと、高電流用の電流源１４２ａとを備え、第１ゲート電極１０５ａに供給する電流を選択する。すなわち、制御部１４０は、スイッチ１４３ａにより、低電流であるＩＧａ１、又は、高電流であるＩＧａ２を第１ゲート電極１０５ａに供給することができる。 As described above, the control unit 140 includes the current source 141a for low current and the current source 142a for high current, and selects the current to be supplied to the first gate electrode 105a. That is, the control unit 140 can supply IGa1 having a low current or IGa2 having a high current to the first gate electrode 105a by the switch 143a.
　また、制御部１４０は、第２オーミック端子１０６ｂと第２ゲート端子１０７ｂとの間に、２つの電流源１４１ｂ及び１４２ｂを備えている。２つの電流源１４１ｂ及び１４２ｂはそれぞれ、第２ゲート電極１０５ｂの閾値電圧以上の電位を印加することができるようなゲート電流がＩＧｂ１（第１電流）及びＩＧｂ２（第２電流）を生成する。 In addition, the control unit 140 includes two current sources 141b and 142b between the second ohmic terminal 106b and the second gate terminal 107b. The two current sources 141b and 142b generate gate currents IGb1 (first current) and IGb2 (second current) that can apply a potential higher than the threshold voltage of the second gate electrode 105b, respectively.
　そして、スイッチ１４３ｂは、電流源１４１ｂ及び１４２ｂのいずれかを選択する。すなわち、スイッチ１４３ｂは、第２ゲート端子１０７ｂに供給する電流を切り替える。 The switch 143b selects one of the current sources 141b and 142b. That is, the switch 143b switches the current supplied to the second gate terminal 107b.
　このとき、ＩＧｂ１は、第２ゲート電極１０５ｂの閾値電圧以上の電圧を印加するための電流であり、ＩＧｂ２より小さい電流である。また、ＩＧｂ２の大きさは、ＶＳｂａ＜０において、ＩＳｂａの飽和電流を流すことができるゲート電圧ＶＧｂになるように設定される。 At this time, IGb1 is a current for applying a voltage equal to or higher than the threshold voltage of the second gate electrode 105b, and is a current smaller than IGb2. Further, the magnitude of IGb2 is set to be a gate voltage VGb that allows a saturation current of ISba to flow when VSba <0.
　このように、制御部１４０は、低電流用の電流源１４１ｂと、高電流用の電流源１４２ｂとを備え、第２ゲート電極１０５ｂに供給する電流を選択する。すなわち、制御部１４０は、スイッチ１４３ｂにより、低電流であるＩＧｂ１、又は、高電流であるＩＧｂ２を第２ゲート電極１０５ｂに供給することができる。 As described above, the control unit 140 includes the current source 141b for low current and the current source 142b for high current, and selects the current to be supplied to the second gate electrode 105b. That is, the control unit 140 can supply IGb1 having a low current or IGb2 having a high current to the second gate electrode 105b by the switch 143b.
　具体的には、ＶＳｂａ＞０のときには、高電位側の第２ゲート端子１０７ｂには、ＩＧｂ２よりも小さいＩＧｂ１が供給される。そして、低電位側の第１ゲート端子１０７ａには、高電流であるＩＧａ２が供給される。この状態であっても第２ゲート端子１０７ｂ直下のチャネル領域１０３にはチャネルが生成される。したがって、第２ゲート端子１０７ｂの駆動電力が低減される。 Specifically, when VSba> 0, IGb1 smaller than IGb2 is supplied to the second gate terminal 107b on the high potential side. Then, the high current IGa2 is supplied to the first gate terminal 107a on the low potential side. Even in this state, a channel is generated in the channel region 103 immediately below the second gate terminal 107b. Accordingly, the driving power of the second gate terminal 107b is reduced.
　また、ＶＳｂａ＜０のときには、高電位側の第１ゲート端子１０７ａには、ＩＧａ２よりも小さいＩＧａ１が供給される。そして、低電位側の第２ゲート端子１０７ｂには、高電流であるＩＧｂ２が供給される。この状態であっても第２ゲート端子１０７ｂ直下のチャネル領域１０３にはチャネルが生成される。したがって、第１ゲート端子１０７ａの駆動電力を抑制することができる。 Also, when VSba <0, IGa1 smaller than IGa2 is supplied to the first gate terminal 107a on the high potential side. Then, IGb2, which is a high current, is supplied to the second gate terminal 107b on the low potential side. Even in this state, a channel is generated in the channel region 103 immediately below the second gate terminal 107b. Accordingly, the driving power of the first gate terminal 107a can be suppressed.
　以上のように、本発明の実施の形態２に係る半導体装置２０は、一対のゲート電極と一対のオーミック電極とを有する半導体素子１００と、一対のゲート電極に閾値電圧以上の電圧となるような電流を供給することで、半導体素子１００を一対のオーミック電極間で導通状態にする制御部１４０とを備える。そして、制御部１４０は、半導体素子１００が導通状態である場合に、高電位側のオーミック電極に対応するゲート電極に低電流を供給し、低電位側のオーミック電極に対応するゲート電極に高電流を供給する。 As described above, in the semiconductor device 20 according to the second embodiment of the present invention, the semiconductor element 100 having the pair of gate electrodes and the pair of ohmic electrodes and the pair of gate electrodes have a voltage equal to or higher than the threshold voltage. A control unit 140 is provided that brings the semiconductor element 100 into a conductive state between the pair of ohmic electrodes by supplying a current. The control unit 140 supplies a low current to the gate electrode corresponding to the high-potential side ohmic electrode and supplies a high current to the gate electrode corresponding to the low-potential side ohmic electrode when the semiconductor element 100 is conductive. Supply.
　これにより、実施の形態１と同様に、電源から流れる電流ＩＳｂａの飽和電流の減少を抑制するとともに、ゲート電流の増大を抑制することで、消費電力を削減することができる。 Thus, as in the first embodiment, it is possible to reduce power consumption by suppressing a decrease in the saturation current of the current ISba flowing from the power supply and suppressing an increase in the gate current.
　（実施の形態２の変型例）
　実施の形態２の変型例について、図面を参照しながら説明する。図７は、本発明の実施の形態２の変型例に係る半導体装置２０ａの構成の一例を示す図である。実施の形態２と同様の構成要素については、同一の符号を付し、その説明を省略する。 (Modification of Embodiment 2)
A modification of the second embodiment will be described with reference to the drawings. FIG. 7 is a diagram showing an example of the configuration of the semiconductor device 20a according to the variation of the second embodiment of the present invention. Constituent elements similar to those of the second embodiment are denoted by the same reference numerals, and the description thereof is omitted.
　図７に示すように、実施の形態２の変型例に係る半導体装置２０ａは、制御部１４０の代わりに制御部１５０を備える。制御部１５０は、電流源１５１ａ及び１５１ｂを備える。 As shown in FIG. 7, the semiconductor device 20 a according to the modified example of the second embodiment includes a control unit 150 instead of the control unit 140. The control unit 150 includes current sources 151a and 151b.
　電流源１５１ａは、一対のゲート電極の閾値電圧以上の電圧を印加するための電流を生成する電流源の一例である。電流源１５１ａは、第１オーミック端子１０６ａと第１ゲート端子１０７ａとの間に接続されている。電流源１５１ａは、第１ゲート端子１０７ａにゲート電流ＩＧａを第１電気信号として供給する。 The current source 151a is an example of a current source that generates a current for applying a voltage higher than the threshold voltage of the pair of gate electrodes. The current source 151a is connected between the first ohmic terminal 106a and the first gate terminal 107a. The current source 151a supplies the gate current IGa as the first electric signal to the first gate terminal 107a.
　電流源１５１ｂは、一対のゲート電極の閾値電圧以上の電圧を印加するための電流を生成する電流源の一例である。電流源１５１ｂは、第２オーミック端子１０６ｂと第２ゲート端子１０７ｂとの間に接続されている。電流源１５１ｂは、第２ゲート端子１０７ｂにゲート電流ＩＧｂを第２電気信号として供給する。 The current source 151b is an example of a current source that generates a current for applying a voltage higher than the threshold voltage of the pair of gate electrodes. The current source 151b is connected between the second ohmic terminal 106b and the second gate terminal 107b. The current source 151b supplies the gate current IGb as the second electric signal to the second gate terminal 107b.
　ここで、ＩＧａ及びＩＧｂはともに、ゲート電極の閾値電圧以上の電圧を印加するための電流である。例えば、ＩＧａ及びＩＧｂはそれぞれ、同一の電流値を持つ。 Here, both IGa and IGb are currents for applying a voltage higher than the threshold voltage of the gate electrode. For example, IGa and IGb each have the same current value.
　実施の形態１では、ＶＳｂａ＞０のとき、同一の定電圧ＶＧａ及びＶＧｂが印加されているときには、ＶＳｂａが上昇するほどＩＳｂａが上昇してＩＧａは減少し、ＩＧｂは増加すると述べた。つまり、ＶＳｂａ＞０のとき、同一の定電流ＩＧａ及びＩＧｂが印加されているときには、ＶＳｂａが上昇するほどＩＳｂａが上昇してＶＧａは増加し、ＶＧｂは減少することになる。 In the first embodiment, when VSba> 0 and the same constant voltages VGa and VGb are applied, ISba is increased and IGa is decreased and IGb is increased as VSba is increased. That is, when VSba> 0 and the same constant currents IGa and IGb are applied, ISba rises and VGa increases and VGb decreases as VSba increases.
　したがって、図７に示すように、第１ゲート端子１０７ａ及び第２ゲート端子１０７ｂに対してそれぞれ同一の電流値を持つＩＧａ及びＩＧｂを印加したときには、ＶＳｂａが上昇するほどＶＧａが増加し、かつ、ＶＧｂが減少する。 Accordingly, as shown in FIG. 7, when IGa and IGb having the same current value are applied to the first gate terminal 107a and the second gate terminal 107b, VGa increases as VSba increases, and VGb decreases.
　このように、本発明の実施の形態２の変型例に係る半導体装置２０ａによれば、実施の形態１と同様に、電源から流れる電流ＩＳｂａの飽和電流の減少を抑制するとともに、ゲート電流の増大を抑制することで、消費電力を削減することができる。 As described above, according to the semiconductor device 20a according to the modification of the second embodiment of the present invention, as in the first embodiment, the decrease of the saturation current of the current ISba flowing from the power source is suppressed and the increase of the gate current is increased. By suppressing the power consumption, power consumption can be reduced.
　（まとめ）
　以上、図面を用いて説明したように、本発明の実施の形態に係る半導体装置は、双方向に電流を流すことができる半導体素子を備える半導体装置であって、前記半導体素子は、基板と、前記基板上に形成され、チャネル領域を有する半導体層と、前記半導体層の上又は上方に、互いに離隔して形成された一対のオーミック電極と、前記半導体層の上又は上方に、前記一対のオーミック電極の間に形成された、前記一対のオーミック電極のそれぞれに対応する一対のゲート電極とを備え、前記半導体装置は、さらに、前記半導体素子を、前記一対のオーミック電極の間で前記チャネル領域を介して双方向に電流を流すことが可能な導通状態にする制御部を備え、前記制御部は、前記半導体素子が前記導通状態である場合、前記一対のオーミック電極のうち高電位側のオーミック電極を基準とした場合の電位であって、前記高電位側のオーミック電極に対応するゲート電極である高電位側ゲート電極の電位が、低電位側のオーミック電極を基準とした場合の電位であって、前記低電位側のオーミック電極に対応するゲート電極である低電位側ゲート電極の電位より低くなるように、前記高電位側ゲート電極に第１電気信号を供給し、かつ、前記低電位側ゲート電極に第２電気信号を供給する。 (Summary)
As described above with reference to the drawings, the semiconductor device according to the embodiment of the present invention is a semiconductor device including a semiconductor element capable of flowing a current bidirectionally, and the semiconductor element includes a substrate, A semiconductor layer having a channel region formed on the substrate, a pair of ohmic electrodes formed on or above the semiconductor layer and spaced apart from each other, and the pair of ohmics on or above the semiconductor layer And a pair of gate electrodes corresponding to each of the pair of ohmic electrodes formed between the electrodes, and the semiconductor device further includes the semiconductor element and the channel region between the pair of ohmic electrodes. A control unit configured to make a conductive state in which a current can flow in both directions through the pair of ohmics when the semiconductor element is in the conductive state. The potential when the high potential side ohmic electrode is used as a reference, and the potential of the high potential side gate electrode corresponding to the high potential side ohmic electrode is the same as that of the low potential side ohmic electrode. The first electric signal is supplied to the high potential side gate electrode so as to be lower than the potential of the low potential side gate electrode, which is the potential of the reference and is the gate electrode corresponding to the low potential side ohmic electrode In addition, a second electric signal is supplied to the low potential side gate electrode.
　これにより、高電位側ゲート電極に流れるゲート電流の大きさは、高電位側のオーミック電極と高電位側ゲート電極との間の電位差に依存するので、当該電位差を低くすることで、ゲート電流の増大が抑制され、消費電力を削減することができる。また、一対のオーミック電極間を流れる電流の飽和電流の大きさは、低電位側のオーミック電極と低電位側のゲート電極との間の電位差に依存するので、当該電位差を高くすることで、飽和電流の大きさを保つことができる。したがって、電源電流と電源電圧との特性を維持したまま、消費電力を削減することができる。 As a result, the magnitude of the gate current flowing through the high potential side gate electrode depends on the potential difference between the high potential side ohmic electrode and the high potential side gate electrode. Increase is suppressed and power consumption can be reduced. In addition, the magnitude of the saturation current of the current flowing between the pair of ohmic electrodes depends on the potential difference between the low-potential side ohmic electrode and the low-potential side gate electrode. The magnitude of the current can be maintained. Therefore, power consumption can be reduced while maintaining the characteristics of the power supply current and the power supply voltage.
　また、前記制御部は、前記一対のゲート電極の閾値電圧以上の電圧である第１電圧を生成する第１電圧源と、前記第１電圧より高い第２電圧を生成する第２電圧源とを有し、前記制御部は、前記高電位側ゲート電極に前記第１電圧を前記第１電気信号として供給し、前記低電位側ゲート電極に前記第２電圧を前記第２電気信号として供給してもよい。 Further, the control unit includes a first voltage source that generates a first voltage that is equal to or higher than a threshold voltage of the pair of gate electrodes, and a second voltage source that generates a second voltage higher than the first voltage. And the control unit supplies the first voltage as the first electric signal to the high potential side gate electrode, and supplies the second voltage as the second electric signal to the low potential side gate electrode. Also good.
　これにより、異なる電圧を発生する２つの電圧源を備えることで、各ゲート電極と、対応するオーミック電極との間に高電圧又は低電圧を容易に供給することができる。したがって、電源電流と電源電圧との特性を維持したまま、高電位側ゲート電極からチャネル領域に流れる電流を低減することができるため、高電位側ゲート電極の駆動電力を抑制することができる。 Thus, by providing two voltage sources that generate different voltages, a high voltage or a low voltage can be easily supplied between each gate electrode and the corresponding ohmic electrode. Accordingly, since the current flowing from the high potential side gate electrode to the channel region can be reduced while maintaining the characteristics of the power supply current and the power supply voltage, the driving power of the high potential side gate electrode can be suppressed.
　また、前記制御部は、前記一対のゲート電極の閾値電圧以上の電圧を印加するための第１電流を生成する第１電流源と、前記第１電流より大きい第２電流を生成する第２電流源とを備え、前記制御部は、前記高電位側ゲート電極に前記第１電流を前記第１電気信号として供給し、前記低電位側ゲート電極に前記第２電流を前記第２電気信号として供給してもよい。 The control unit may include a first current source that generates a first current for applying a voltage that is equal to or higher than a threshold voltage of the pair of gate electrodes, and a second current that generates a second current larger than the first current. And the controller supplies the first current to the high potential side gate electrode as the first electrical signal and supplies the second current to the low potential side gate electrode as the second electrical signal. May be.
　これにより、異なる電流を発生する２つの電流源を備えることで、各ゲート電極に高電流又は低電流を容易に供給することができる。したがって、電源電流と電源電圧との特性を維持したまま、高電位側のゲート電流を低減し、高電位側ゲート電極の駆動電力を抑制することができる。 Thereby, by providing two current sources that generate different currents, a high current or a low current can be easily supplied to each gate electrode. Therefore, it is possible to reduce the high-potential-side gate current and suppress the driving power of the high-potential-side gate electrode while maintaining the characteristics of the power supply current and the power supply voltage.
　また、前記制御部は、前記一対のゲート電極の閾値電圧以上の電圧を印加するための電流を、前記第１電気信号及び前記第２電気信号として前記一対のゲート電極に供給してもよい。 The control unit may supply a current for applying a voltage equal to or higher than a threshold voltage of the pair of gate electrodes to the pair of gate electrodes as the first electric signal and the second electric signal.
　これにより、第１ゲート電極又は第２ゲート電極に供給するゲート電流源の数を減らすことができ、回路構成を簡素化することができる。 Thereby, the number of gate current sources supplied to the first gate electrode or the second gate electrode can be reduced, and the circuit configuration can be simplified.
　また、前記一対のゲート電極の閾値電圧は、正であってもよい。 Further, the threshold voltage of the pair of gate electrodes may be positive.
　これにより、第１オーミック電極を基準とした場合に第１ゲート電極に印加される電圧、及び、第２オーミック電極を基準とした場合に第２ゲート電極に印加される電圧がともに０のときに、半導体素子を遮断状態とすることができる。 Thus, when the voltage applied to the first gate electrode when the first ohmic electrode is used as a reference and the voltage applied to the second gate electrode when the second ohmic electrode is used as a reference are both zero. The semiconductor element can be in a cut-off state.
　また、前記半導体素子は、さらに、前記一対のゲート電極と前記半導体層との間に形成された、Ｐ型の導電性を有する一対のコントロール層を備えてもよい。 The semiconductor element may further include a pair of control layers having P-type conductivity formed between the pair of gate electrodes and the semiconductor layer.
　これにより、第１ゲート電極の閾値電圧及び第２ゲート電極の閾値電圧を正にすることができる。 Thereby, the threshold voltage of the first gate electrode and the threshold voltage of the second gate electrode can be made positive.
　また、前記一対のゲート電極は、前記半導体層とショットキー接合していてもよい。 The pair of gate electrodes may be in Schottky junction with the semiconductor layer.
　これにより、第１ゲート電極の閾値電圧及び第２ゲート電極の閾値電圧を正にすることができる。 Thereby, the threshold voltage of the first gate electrode and the threshold voltage of the second gate electrode can be made positive.
　また、前記半導体素子は、さらに、前記一対のゲート電極と前記半導体層との間に形成された絶縁膜を備えてもよい。 The semiconductor element may further include an insulating film formed between the pair of gate electrodes and the semiconductor layer.
　これにより、第１ゲート電極の閾値電圧及び第２ゲート電極の閾値電圧を正にすることができる。 Thereby, the threshold voltage of the first gate electrode and the threshold voltage of the second gate electrode can be made positive.
　また、前記基板は、シリコン基板、サファイア基板、又は、炭化珪素基板であってもよい。 The substrate may be a silicon substrate, a sapphire substrate, or a silicon carbide substrate.
　また、本発明の実施の形態に係る半導体装置の制御方法は、双方向に電流を流すことができる半導体装置の制御方法であって、前記半導体装置は、基板と、前記基板上に形成され、チャネル領域を有する半導体層と、前記半導体層の上又は上方に、互いに離隔して形成された一対のオーミック電極と、前記半導体層の上又は上方に、前記一対のオーミック電極の間に形成された、前記一対のオーミック電極のそれぞれに対応する一対のゲート電極とを備え、前記半導体装置の制御方法は、前記一対のオーミック電極のうち高電位側のオーミック電極に対応するゲート電極である高電位側ゲート電極に第１電気信号を供給し、前記一対のオーミック電極のうち低電位側のオーミック電極に対応するゲート電極である低電位側ゲート電極に第２電気信号を供給し、前記第１電気信号及び前記第２電気信号の供給では、前記高電位側のオーミック電極を基準とした場合の前記高電位側ゲート電極の電位が、前記低電位側のオーミック電極を基準とした場合の前記低電位側ゲート電極の電位より低くなるように、前記第１電気信号及び前記第２電気信号を供給する。 Further, a method for controlling a semiconductor device according to an embodiment of the present invention is a method for controlling a semiconductor device capable of flowing a current in both directions. The semiconductor device is formed on a substrate and the substrate, A semiconductor layer having a channel region, a pair of ohmic electrodes formed on or above the semiconductor layer and spaced apart from each other, and formed between the pair of ohmic electrodes on or above the semiconductor layer A pair of gate electrodes corresponding to each of the pair of ohmic electrodes, and the method of controlling the semiconductor device is a high potential side which is a gate electrode corresponding to a high potential side ohmic electrode of the pair of ohmic electrodes A first electrical signal is supplied to the gate electrode, and a second potential is applied to the low potential side gate electrode that is a gate electrode corresponding to the low potential side ohmic electrode of the pair of ohmic electrodes. In the supply of the first electric signal and the second electric signal, the potential of the high-potential-side gate electrode when the high-potential-side ohmic electrode is used as a reference is the low-potential-side ohmic The first electric signal and the second electric signal are supplied so as to be lower than the potential of the low potential side gate electrode when the electrode is used as a reference.
　これにより、高電位側ゲート電極に流れるゲート電流の大きさは、高電位側のオーミック電極と高電位側ゲート電極との間の電位差に依存するので、当該電位差を低くすることで、ゲート電流の増大が抑制され、消費電力を削減することができる。また、一対のオーミック電極間を流れる電流の飽和電流の大きさは、低電位側のオーミック電極と低電位側のゲート電極との間の電位差に依存するので、当該電位差を高くすることで、飽和電流の大きさを保つことができる。したがって、電源電流と電源電圧との特性を維持したまま、消費電力を削減することができる。 As a result, the magnitude of the gate current flowing through the high potential side gate electrode depends on the potential difference between the high potential side ohmic electrode and the high potential side gate electrode. Increase is suppressed and power consumption can be reduced. In addition, the magnitude of the saturation current of the current flowing between the pair of ohmic electrodes depends on the potential difference between the low-potential side ohmic electrode and the low-potential side gate electrode. The magnitude of the current can be maintained. Therefore, power consumption can be reduced while maintaining the characteristics of the power supply current and the power supply voltage.
　以上、本発明に係る半導体装置及びその制御方法について、実施の形態に基づいて説明したが、本発明は、これらの実施の形態に限定されるものではない。本発明の趣旨を逸脱しない限り、当業者が思いつく各種変形を当該実施の形態に施したものや、異なる実施の形態における構成要素を組み合わせて構築される形態も、本発明の範囲内に含まれる。 As described above, the semiconductor device and the control method thereof according to the present invention have been described based on the embodiments, but the present invention is not limited to these embodiments. Unless it deviates from the meaning of this invention, the form which carried out the various deformation | transformation which those skilled in the art can think to the said embodiment, and the form constructed | assembled combining the component in a different embodiment is also contained in the scope of the present invention. .
　例えば、図１Ａ及び図１Ｂにおいて、制御部１２０は、４つの電圧源１２１ａ、１２１ｂ、１２２ａ及び１２２ｂを備えているが、制御部１２０は、２つの電圧源を備えるだけでもよい。ＶＧａ１とＶＧｂ１とは等しくてもよく、また、ＶＧａ２とＶＧｂ２とは等しくてもよいので、例えば、制御部１２０は、低電圧のＶＧａ１（＝ＶＧｂ１）を生成する電圧源１２１ａと、高電圧のＶＧａ２（＝ＶＧｂ２）を生成する電圧源１２２ａとを備えていればよい。 For example, in FIGS. 1A and 1B, the control unit 120 includes four voltage sources 121a, 121b, 122a, and 122b, but the control unit 120 may include only two voltage sources. Since VGa1 and VGb1 may be equal, and VGa2 and VGb2 may be equal, for example, the control unit 120 includes a voltage source 121a that generates a low voltage VGa1 (= VGb1), and a high voltage VGa2 And a voltage source 122a that generates (= VGb2).
　そして、制御部１２０は、高電位側のオーミック電極が第２オーミック電極１０４ｂである場合に、電圧源１２２ａが生成する高電圧ＶＧａ２を第１ゲート電極１０５ａと第１オーミック電極１０４ａとの間に印加し、電圧源１２１ａが生成する低電圧ＶＧａ１を第２ゲート電極１０５ｂと第２オーミック電極１０４ｂとの間に印加すればよい。また、制御部１２０は、高電位側のオーミック電極が第１オーミック電極１０４ａである場合に、電圧源１２１ａが生成する低電圧ＶＧａ１を第１ゲート電極１０５ａと第１オーミック電極１０４ａとの間に印加し、電圧源１２２ａが生成する高電圧ＶＧａ２を第２ゲート電極１０５ｂと第２オーミック電極１０４ｂとの間に印加すればよい。 The control unit 120 applies the high voltage VGa2 generated by the voltage source 122a between the first gate electrode 105a and the first ohmic electrode 104a when the high-potential-side ohmic electrode is the second ohmic electrode 104b. The low voltage VGa1 generated by the voltage source 121a may be applied between the second gate electrode 105b and the second ohmic electrode 104b. In addition, when the high-potential-side ohmic electrode is the first ohmic electrode 104a, the control unit 120 applies the low voltage VGa1 generated by the voltage source 121a between the first gate electrode 105a and the first ohmic electrode 104a. The high voltage VGa2 generated by the voltage source 122a may be applied between the second gate electrode 105b and the second ohmic electrode 104b.
　また、図６において、制御部１４０は、４つの電流源１４１ａ、１４１ｂ、１４２ａ及び１４２ｂを備えているが、制御部１４０は、２つの電流源を備えるだけでもよい。ＩＧａ１とＩＧｂ１とは等しくてもよく、また、ＩＧａ２とＩＧｂ２とは等しくてもよいので、例えば、制御部１４０は、低電流のＩＧａ１（＝ＩＧｂ１）を生成する電流源１４１ａと、高電流のＩＧａ２（＝ＩＧｂ２）を生成する電流源１４２ａとを備えていればよい。 In FIG. 6, the control unit 140 includes four current sources 141a, 141b, 142a, and 142b. However, the control unit 140 may include only two current sources. Since IGa1 and IGb1 may be equal, and IGa2 and IGb2 may be equal, for example, the control unit 140 includes a current source 141a that generates a low current IGa1 (= IGb1), and a high current IGa2 And a current source 142a for generating (= IGb2).
　そして、制御部１４０は、高電位側のオーミック電極が第２オーミック電極１０４ｂである場合に、電流源１４２ａが生成する高電流ＩＧａ２を第１ゲート電極１０５ａに供給し、電流源１４１ａが生成する低電流ＩＧａ１を第２ゲート電極１０５ｂに供給すればよい。また、制御部１４０は、高電位側のオーミック電極が第１オーミック電極１０４ａである場合に、電流源１４１ａが生成する低電流ＩＧａ２を第１ゲート電極１０５ａに供給し、電流源１４２ａが生成する高電流ＩＧａ１を第２ゲート電極１０５ｂに供給すればよい。 Then, when the high-potential-side ohmic electrode is the second ohmic electrode 104b, the control unit 140 supplies the high current IGa2 generated by the current source 142a to the first gate electrode 105a, and generates the low current generated by the current source 141a. The current IGa1 may be supplied to the second gate electrode 105b. In addition, when the high-potential-side ohmic electrode is the first ohmic electrode 104a, the control unit 140 supplies the low current IGa2 generated by the current source 141a to the first gate electrode 105a, and generates a high current generated by the current source 142a. The current IGa1 may be supplied to the second gate electrode 105b.
　また、上記半導体装置の構成は、本発明を具体的に説明するために例示するためのものであり、本発明に係る半導体装置は、上記構成の全てを必ずしも備える必要はない。言い換えると、本発明に係る半導体装置は、本発明の効果を実現できる最小限の構成のみを備えればよい。 Further, the configuration of the semiconductor device is for illustration in order to specifically describe the present invention, and the semiconductor device according to the present invention is not necessarily provided with all of the above configurations. In other words, the semiconductor device according to the present invention need only have a minimum configuration capable of realizing the effects of the present invention.
　例えば、図１Ａ、図１Ｂ、図６などにおいて、第１オーミック端子１０６ａ、第２オーミック端子１０６ｂ、第１ゲート端子１０７ａ及び第２ゲート端子１０７ｂを備えていなくてもよい。 For example, in FIG. 1A, FIG. 1B, FIG. 6, etc., the first ohmic terminal 106a, the second ohmic terminal 106b, the first gate terminal 107a, and the second gate terminal 107b may not be provided.
　また、上記実施の形態の説明に用いた図において、各構成要素の角部及び辺を直線的に記載しているが、製造上の理由により、角部及び辺が丸みをおびたものも本発明に含まれる。 Moreover, in the figure used for description of the above embodiment, the corners and sides of each component are linearly described. However, the corners and sides are rounded for manufacturing reasons. Included in the invention.
　また、上記で用いた数字は、全て本発明を具体的に説明するために例示するものであり、本発明は例示された数字に制限されない。また、上記で示した各構成要素の材料は、全て本発明を具体的に説明するために例示するものであり、本発明は例示された材料に制限されない。また、構成要素間の接続関係は、本発明を具体的に説明するために例示するものであり、本発明の機能を実現する接続関係はこれに限定されない。 Further, all the numbers used above are illustrated for specifically explaining the present invention, and the present invention is not limited to the illustrated numbers. Further, the materials of the constituent elements shown above are all exemplified for specifically explaining the present invention, and the present invention is not limited to the exemplified materials. In addition, the connection relationship between the components is exemplified for specifically explaining the present invention, and the connection relationship for realizing the function of the present invention is not limited to this.
　本発明に係る半導体装置及びその制御方法は、消費電力の増加を抑制することができるという効果を奏する。 The semiconductor device and the control method thereof according to the present invention have an effect that an increase in power consumption can be suppressed.
１０、１０ａ、１０ｂ、２０、２０ａ　半導体装置
１００、１００ａ、１００ｂ、３００　半導体素子
１０１、３０１　基板
１０２、３０２　半導体層積層体
１０３　チャネル領域
１０４ａ　第１オーミック電極
１０４ｂ　第２オーミック電極
１０５ａ、３０４ａ　第１ゲート電極
１０５ｂ、３０４ｂ　第２ゲート電極
１０６ａ　第１オーミック端子
１０６ｂ　第２オーミック端子
１０７ａ　第１ゲート端子
１０７ｂ　第２ゲート端子
１０８ａ　第１コントロール層
１０８ｂ　第２コントロール層
１０９ａ、１０９ｂ、１０９ｃ　抵抗
１１０ａ　第１絶縁膜
１１０ｂ　第２絶縁膜
１２０、１４０、１５０　制御部
１２１ａ、１２１ｂ、１２２ａ、１２２ｂ　電圧源
１２３ａ、１２３ｂ、１４３ａ、１４３ｂ　スイッチ
１３０　電源
１４１ａ、１４１ｂ、１４２ａ、１４２ｂ、１５１ａ、１５１ｂ　電流源
３０３ａ　第１電極
３０３ｂ　第２電極 10, 10a, 10b, 20, 20a Semiconductor device 100, 100a, 100b, 300 Semiconductor element 101, 301 Substrate 102, 302 Semiconductor layer stack 103 Channel region 104a First ohmic electrode 104b Second ohmic electrode 105a, 304a First gate Electrodes 105b, 304b Second gate electrode 106a First ohmic terminal 106b Second ohmic terminal 107a First gate terminal 107b Second gate terminal 108a First control layer 108b Second control layers 109a, 109b, 109c Resistor 110a First insulating film 110b Second insulating film 120, 140, 150 Controller 121a, 121b, 122a, 122b Voltage source 123a, 123b, 143a, 143b Switch 130 Power supply 141a, 141b, 142a, 142b, 151a, 151b Current source 303a First electrode 303b Second electrode

Claims (10)

  1. 　双方向に電流を流すことができる半導体素子を備える半導体装置であって、
    　前記半導体素子は、
    　基板と、
    　前記基板上に形成され、チャネル領域を有する半導体層と、
    　前記半導体層の上又は上方に、互いに離隔して形成された一対のオーミック電極と、
    　前記半導体層の上又は上方に、前記一対のオーミック電極の間に形成された、前記一対のオーミック電極のそれぞれに対応する一対のゲート電極とを備え、
    　前記半導体装置は、さらに、
    　前記半導体素子を、前記一対のオーミック電極の間で前記チャネル領域を介して双方向に電流を流すことが可能な導通状態にする制御部を備え、
    　前記制御部は、
    　前記半導体素子が前記導通状態である場合、前記一対のオーミック電極のうち高電位側のオーミック電極を基準とした場合の電位であって、前記高電位側のオーミック電極に対応するゲート電極である高電位側ゲート電極の電位が、低電位側のオーミック電極を基準とした場合の電位であって、前記低電位側のオーミック電極に対応するゲート電極である低電位側ゲート電極の電位より低くなるように、前記高電位側ゲート電極に第１電気信号を供給し、かつ、前記低電位側ゲート電極に第２電気信号を供給する
    　半導体装置。     A semiconductor device comprising a semiconductor element capable of flowing a current in both directions,
    The semiconductor element is
    A substrate,
    A semiconductor layer formed on the substrate and having a channel region;
    A pair of ohmic electrodes formed on or above the semiconductor layer and spaced apart from each other;
    On or above the semiconductor layer, a pair of gate electrodes formed between the pair of ohmic electrodes and corresponding to each of the pair of ohmic electrodes,
    The semiconductor device further includes:
    A control unit for bringing the semiconductor element into a conductive state capable of flowing a current bidirectionally between the pair of ohmic electrodes via the channel region;
    The controller is
    When the semiconductor element is in the conductive state, the potential is based on a high-potential-side ohmic electrode of the pair of ohmic electrodes, and is a gate electrode corresponding to the high-potential-side ohmic electrode. The potential of the potential-side gate electrode is a potential based on the low-potential-side ohmic electrode, and is lower than the potential of the low-potential-side gate electrode that is a gate electrode corresponding to the low-potential-side ohmic electrode. A first electrical signal is supplied to the high potential side gate electrode, and a second electrical signal is supplied to the low potential side gate electrode.
  2. 　前記制御部は、
    　前記一対のゲート電極の閾値電圧以上の電圧である第１電圧を生成する第１電圧源と、
    　前記第１電圧より高い第２電圧を生成する第２電圧源とを有し、
    　前記制御部は、
    　前記高電位側ゲート電極に前記第１電圧を前記第１電気信号として供給し、前記低電位側ゲート電極に前記第２電圧を前記第２電気信号として供給する
    　請求項１記載の半導体装置。     The controller is
    A first voltage source that generates a first voltage that is equal to or higher than a threshold voltage of the pair of gate electrodes;
    A second voltage source for generating a second voltage higher than the first voltage,
    The controller is
    The semiconductor device according to claim 1, wherein the first voltage is supplied to the high potential side gate electrode as the first electric signal, and the second voltage is supplied to the low potential side gate electrode as the second electric signal.
  3. 　前記制御部は、
    　前記一対のゲート電極の閾値電圧以上の電圧を印加するための第１電流を生成する第１電流源と、
    　前記第１電流より大きい第２電流を生成する第２電流源とを備え、
    　前記制御部は、
    　前記高電位側ゲート電極に前記第１電流を前記第１電気信号として供給し、前記低電位側ゲート電極に前記第２電流を前記第２電気信号として供給する
    　請求項１記載の半導体装置。     The controller is
    A first current source for generating a first current for applying a voltage equal to or higher than a threshold voltage of the pair of gate electrodes;
    A second current source for generating a second current larger than the first current,
    The controller is
    The semiconductor device according to claim 1, wherein the first current is supplied to the high potential side gate electrode as the first electric signal, and the second current is supplied to the low potential side gate electrode as the second electric signal.
  4. 　前記制御部は、前記一対のゲート電極の閾値電圧以上の電圧を印加するための電流を、前記第１電気信号及び前記第２電気信号として前記一対のゲート電極に供給する
    　請求項１記載の半導体装置。     2. The semiconductor according to claim 1, wherein the control unit supplies a current for applying a voltage equal to or higher than a threshold voltage of the pair of gate electrodes to the pair of gate electrodes as the first electric signal and the second electric signal. apparatus.
  5. 　前記一対のゲート電極の閾値電圧は、正である
    　請求項１～４のいずれか１項に記載の半導体装置。     The semiconductor device according to any one of claims 1 to 4, wherein a threshold voltage of the pair of gate electrodes is positive.
  6. 　前記半導体素子は、さらに、前記一対のゲート電極と前記半導体層との間に形成された、Ｐ型の導電性を有する一対のコントロール層を備える
    　請求項１～５のいずれか１項に記載の半導体装置。     6. The semiconductor device according to claim 1, further comprising a pair of control layers having P-type conductivity, formed between the pair of gate electrodes and the semiconductor layer. Semiconductor device.
  7. 　前記一対のゲート電極は、前記半導体層とショットキー接合している
    　請求項１～５のいずれか１項に記載の半導体装置。     The semiconductor device according to claim 1, wherein the pair of gate electrodes are in Schottky junction with the semiconductor layer.
  8. 　前記半導体素子は、さらに、前記一対のゲート電極と前記半導体層との間に形成された絶縁膜を備える
    　請求項１～５のいずれか１項に記載の半導体装置。     The semiconductor device according to any one of claims 1 to 5, wherein the semiconductor element further includes an insulating film formed between the pair of gate electrodes and the semiconductor layer.
  9. 　前記基板は、シリコン基板、サファイア基板、又は、炭化珪素基板である
    　請求項１～８のいずれか１項に記載の半導体装置。     The semiconductor device according to any one of claims 1 to 8, wherein the substrate is a silicon substrate, a sapphire substrate, or a silicon carbide substrate.
  10. 　双方向に電流を流すことができる半導体装置の制御方法であって、
    　前記半導体装置は、
    　基板と、
    　前記基板上に形成され、チャネル領域を有する半導体層と、
    　前記半導体層の上又は上方に、互いに離隔して形成された一対のオーミック電極と、
    　前記半導体層の上又は上方に、前記一対のオーミック電極の間に形成された、前記一対のオーミック電極のそれぞれに対応する一対のゲート電極とを備え、
    　前記半導体装置の制御方法は、
    　前記一対のオーミック電極のうち高電位側のオーミック電極に対応するゲート電極である高電位側ゲート電極に第１電気信号を供給し、
    　前記一対のオーミック電極のうち低電位側のオーミック電極に対応するゲート電極である低電位側ゲート電極に第２電気信号を供給し、
    　前記第１電気信号及び前記第２電気信号の供給では、
    　前記高電位側のオーミック電極を基準とした場合の前記高電位側ゲート電極の電位が、前記低電位側のオーミック電極を基準とした場合の前記低電位側ゲート電極の電位より低くなるように、前記第１電気信号及び前記第２電気信号を供給する
    　半導体装置の制御方法。     A method for controlling a semiconductor device capable of flowing a current in both directions,
    The semiconductor device includes:
    A substrate,
    A semiconductor layer formed on the substrate and having a channel region;
    A pair of ohmic electrodes formed on or above the semiconductor layer and spaced apart from each other;
    On or above the semiconductor layer, a pair of gate electrodes formed between the pair of ohmic electrodes and corresponding to each of the pair of ohmic electrodes,
    The method for controlling the semiconductor device includes:
    Supplying a first electric signal to a high potential side gate electrode which is a gate electrode corresponding to a high potential side ohmic electrode of the pair of ohmic electrodes;
    Supplying a second electric signal to the low potential side gate electrode which is a gate electrode corresponding to the low potential side ohmic electrode of the pair of ohmic electrodes;
    In supplying the first electric signal and the second electric signal,
    The potential of the high potential side gate electrode when the high potential side ohmic electrode is used as a reference is lower than the potential of the low potential side gate electrode when the low potential side ohmic electrode is used as a reference. A method of controlling a semiconductor device that supplies the first electric signal and the second electric signal.
PCT/JP2011/006961 2010-12-14 2011-12-13 Semiconductor device and method for controlling same WO2012081237A1 (en)

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CN110890881A (en) * 2018-09-10 2020-03-17 三菱电机株式会社 Semiconductor device with a plurality of semiconductor chips
US10903353B2 (en) 2016-02-29 2021-01-26 Infineon Technologies Austria Ag Double gate transistor device and method of operating

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JP2017163136A (en) * 2016-02-29 2017-09-14 インフィネオン テクノロジーズ オーストリア アクチエンゲゼルシャフト Double gate transistor device and operating method
US10530360B2 (en) 2016-02-29 2020-01-07 Infineon Technologies Austria Ag Double gate transistor device and method of operating
US10903353B2 (en) 2016-02-29 2021-01-26 Infineon Technologies Austria Ag Double gate transistor device and method of operating
CN110890881A (en) * 2018-09-10 2020-03-17 三菱电机株式会社 Semiconductor device with a plurality of semiconductor chips
CN110890881B (en) * 2018-09-10 2023-09-19 三菱电机株式会社 Semiconductor device with a semiconductor device having a plurality of semiconductor chips

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