WO2012068985A1 - 伪差分音频输入电路及其设置方法 - Google Patents

伪差分音频输入电路及其设置方法 Download PDF

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Publication number
WO2012068985A1
WO2012068985A1 PCT/CN2011/082624 CN2011082624W WO2012068985A1 WO 2012068985 A1 WO2012068985 A1 WO 2012068985A1 CN 2011082624 W CN2011082624 W CN 2011082624W WO 2012068985 A1 WO2012068985 A1 WO 2012068985A1
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Prior art keywords
path
high frequency
voltage
audio input
bias voltage
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PCT/CN2011/082624
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English (en)
French (fr)
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李现华
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中兴通讯股份有限公司
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Publication of WO2012068985A1 publication Critical patent/WO2012068985A1/zh

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04RLOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R5/00Stereophonic arrangements
    • H04R5/04Circuit arrangements, e.g. for selective connection of amplifier inputs/outputs to loudspeakers, for loudspeaker detection, or for adaptation of settings to personal preferences or hearing impairments

Definitions

  • the present invention relates to the field of communications, and in particular to a pseudo differential audio input circuit and a method for setting the same.
  • BACKGROUND OF THE INVENTION In the existing mobile communication terminal, there are two kinds of audio interfaces, one is a single microphone interface, and the other is a headphone microphone interface. In circuit processing, it can be a single-ended audio signal input, one end of which is connected to the ground. Single-ended audio signals are difficult to avoid interference during signal transmission. This kind of circuit can't remove the common-mode interference in the analog path, and the noise is relatively large. The other is pseudo-differential input. In the existing design, as shown in Figure 1.
  • the circuit includes a headphone jack, two bias resistors R1 and R2, filter capacitors C3, C4 and C5, DC blocking capacitors C1 and C2, and an audio input port, where the audio channels are pulled up to the bias via R1 and R2.
  • the voltage is the basis for implementing the pseudo-differential circuit.
  • C3 and C4 are respectively connected to the ground to filter out high-frequency differential mode interference.
  • C3 cross-connects two audio channels to filter high-frequency common mode interference.
  • the three capacitors are all pairs.
  • the filtering design for a particular frequency, C1 and C2 is used to isolate the current at the audio input port.
  • the bias resistors R1, R2 make the biases on the audio path not at the same level, respectively assumed to be vl and v2, respectively.
  • the two audio input signals are interfered by the common mode noise signal s
  • the two channels of audio The signal of the interference on the signal path becomes vl*s and v2*s.
  • V l*s-v2* S (vl-v2) s, because vl is not equal to v2, Therefore, the effect of the differential circuit to eliminate common mode interference cannot be achieved, and a large amount of noise still exists in the audio signal, which affects the transmission and storage quality of the audio to some extent.
  • a pseudo differential audio input circuit comprising: a first path and a second path connected to an audio input port; and a height disposed on the first path and the second path a frequency interference filtering component configured to filter out high frequency differential mode interference and high frequency common mode interference; a voltage regulating component connected to the first path and the second path, configured to be on the first path A bias voltage is equal to a bias voltage on the second path; an audio output port coupled to the first path.
  • the voltage regulating component includes: a first biasing resistor R1 connected between the first path and a bias voltage, wherein a connection point of the R1 and the first path is a first connecting node a second bias resistor R2 connected between the second path and the bias voltage, wherein the R2 is connected to the second path
  • the junction is a second connection node
  • the adjustment resistor R3 is connected between the second path and the ground, wherein the connection point of the R3 and the second path is the second connection node; wherein, the R1
  • the resistance relationship between R2 and R3 is: the voltage at the first connection node is equal to the voltage at the second connection node by the resistance relationship of the R1, R2, and R3.
  • the R3 is an adjustable resistor.
  • the pseudo differential audio input circuit further includes: an isolation component connected between the first path and the audio output port, configured to isolate external DC interference and noise.
  • the isolation component is an inductor L1 connected between the first connection node and the audio output port.
  • the high frequency interference filtering component comprises: a first capacitor C1 connected to the first path and configured to isolate DC; a second capacitor C2 connected to the second path and configured to isolate DC a third capacitor C3 having one end connected to the C1 and the other end connected to the ground, configured to filter out high frequency differential mode interference; and a fourth capacitor C4 connected across the first path and the second path Between the two ends connected to the C1 and C3, the other end connected to the C2, set to filter out high frequency common mode interference; the fifth capacitor C5, one end connected to the C2 and the C4, the other end and the ground Connected, set to filter out high frequency differential mode interference.
  • a method for setting a pseudo differential audio input circuit wherein the circuit includes: a first path and a second path connected to an audio input port; a high frequency interference filtering component on the second path, configured to filter out high frequency differential mode interference and high frequency common mode interference; a voltage regulating component connected to the first path and the second path; An audio output port connected to the first path; the method comprising: adjusting the voltage regulating component such that a bias voltage on the first path is equal to a bias voltage on the second path.
  • the voltage regulating component includes: a first biasing resistor R1 connected between the first path and a bias voltage, wherein a connection point of the R1 and the first path is a first connecting node a second bias resistor R2 connected between the second path and the bias voltage, wherein a connection point of the R2 and the second path is a second connection node; adjusting a resistor R3, connected Between the second path and the ground; wherein adjusting the voltage regulating component such that a bias voltage on the first path is equal to a bias voltage on the second path comprises: adjusting the R3 The value is taken until the voltage at the first connection node is equal to the voltage at the second connection node.
  • the method further includes: providing an isolation component between the first path and the audio output port, configured to isolate external DC interference and noise.
  • the step of providing an isolation component between the first path and the audio output port comprises: providing an inductance L1 between the first connection node and the audio output port.
  • the voltage regulating component provided in the differential circuit is set to make the bias voltages on the two paths equal, thereby solving the problem that the common mode interference cannot be eliminated in the prior art, thereby improving the audio transmission and The effect of storage quality.
  • FIG. 1 is a schematic diagram of a connection of an audio interface circuit according to the related art
  • FIG. 2 is a schematic diagram of a preferred connection of a pseudo differential audio input circuit according to an embodiment of the present invention
  • Another preferred connection schematic for a pseudo differential audio input circuit BEST MODE FOR CARRYING OUT THE INVENTION Embodiment 1
  • FIG. 2 shows a pseudo differential audio input circuit according to an embodiment of the present invention by taking a headphone microphone as an example.
  • a pseudo differential audio input circuit according to an embodiment of the present invention includes:
  • a first path and a second path connected to the audio input port preferably, the first path is connected to the positive pole of the audio input port, and the second path is connected to the negative pole of the audio input port, wherein the positive pole of the audio input port And the negative pole is used to transmit differential signals.
  • a high frequency interference filtering component disposed on the first path and the second path, configured to filter out high frequency differential mode interference and high frequency common mode interference; preferably, the high frequency interference filtering component includes : Filter capacitors C3, C4, C5, DC blocking capacitors C1, C2;
  • a voltage regulating component connected to said first via and said second via, said bias voltage on said first via being equal to a bias voltage on said second via; preferably, voltage regulation
  • the components include: two pull-up resistors R1, R2, a resistor R3 that simulates the impedance of the negative end of the headphone microphone;
  • An audio output port connected to the first path preferably, the audio output port is a headphone interface.
  • the voltage regulating component disposed in the differential circuit is used to equalize the bias voltages on the two paths, thereby solving the problem that the common mode interference cannot be eliminated in the prior art, thereby achieving an improvement.
  • the effect of audio transmission and storage quality may further include: an inductance L1 of the audio path access end (the earphone microphone positive end).
  • the invention is not limited to this, and the inductor L1 is optional. The role of the various components in the circuit shown in Figure 2 is described below:
  • Inductor Ll set to isolate the external DC interference and the initial isolation of noise
  • Resistors R1 and R2 are the bias resistors of the pseudo differential two audio channels respectively. The two resistors are connected to the same bias voltage.
  • the internal resistance of the earphone microphone is generally 2.2k ohms, in order to maximize the audio signal generated by the microphone. The distortion effect, the level of the audio input path is clamped to one-half of the bias voltage, and R1 and R2 are both 2.2k ohms;
  • C4 C3, C5 filter capacitors, C3, C5, mainly filter high frequency differential mode interference in a certain frequency band, C4 mainly filters out high frequency common mode interference in a certain frequency band, mainly 900MHz common mode interference;
  • Capacitors C1, C2 are mainly set to isolate the DC level on the audio signal path.
  • the present invention is mainly concerned with low frequency common mode interference, because the human ear can hear mainly low frequency signals; 5) resistance R3, regulation
  • the bias voltage on the audio signal path makes the two-channel bias voltage equal; preferably, the R3 is an adjustable resistor.
  • the implementation method of the circuit as shown in FIG.
  • step S1 connecting the two paths of the audio signal to the same bias power supply through two bias resistors R1, R2; Step S2, in the working state, measuring the test point 1 (testl) level, get the voltage vl; step S3, in the working state, measure the level at test point 2 (test2), get the voltage v2; step S4, adjust the resistance of the resistor R3, change the position of v2
  • the voltage is divided until the level at test2 is equal to the level at testl; thus, when the two audio channels are interfered by the common mode noise signal s, the noise becomes ⁇ * 3 and ⁇ * 3, and the two signals are differential.
  • V l*s-v2* S (vl-v2) s
  • the result is 0, which eliminates common mode interference and improves the audio signal quality.
  • two audio signals are pulled up to the same bias voltage by two resistors R1, R2, 2, and an external resistor is connected to the audio path (second path) without audio signal input.
  • R3 the purpose is to make the level of testl on the audio path (first path) with audio signal input equal to the level of test2 on the second path, and use the difference principle to eliminate common mode interference.
  • the circuit in the preferred embodiment can remove the low frequency common mode interference at the audio input end of the differential signal, a common mode filter large capacitance can be saved.
  • the present invention is also applicable to a case of a single microphone input.
  • the pseudo differential audio input circuit includes: a first path and a second path connected to the audio input port; And a high frequency interference filtering component on the second path, configured to filter out high frequency differential mode interference and high frequency common mode interference; and voltage regulating components connected to the first path and the second path, A bias voltage on the first path is equal to a bias voltage on the second path; an audio output port coupled to the first path.
  • the voltage regulating component includes: a first biasing resistor R1 connected between the first path and a bias voltage, wherein a connection point of the R1 and the first path is a first connecting node a second bias resistor R2 connected between the second path and the bias voltage, wherein a connection point of the R2 and the second path is a second connection node; adjusting a resistor R3, connected Between the second path and the ground, wherein the connection point of the R3 and the second path is the second connection node; wherein, the resistance relationship between the R1, R2, and R3 is: The resistance relationship of R1, R2, and R3 is such that the voltage at the first connection node is equal to the voltage at the second connection node.
  • the R3 is an adjustable resistor.
  • the pseudo differential audio input circuit further comprises: an isolation component connected between the first path and the audio output port, configured to isolate external DC interference and noise.
  • the isolation component is an inductor L1 connected between the first connection node and the audio output port.
  • the high frequency interference filtering component comprises: a first capacitor C1 connected to the first path and configured to isolate DC; a second capacitor C2 connected to the second path and configured to isolate DC a third capacitor C3 having one end connected to the C1 and the other end connected to the ground, configured to filter out high frequency differential mode interference; and a fourth capacitor C4 connected across the first path and the second path Between the two ends connected to the C1 and C3, the other end connected to the C2, set to filter out high frequency common mode interference; the fifth capacitor C5, one end connected to the C2 and the C4, the other end and the ground Connected, set to filter out high frequency differential mode interference.
  • Embodiment 3 are basically the same as those of the earphone microphone input described in Embodiment 1, and details are not described herein again. Since the present invention can be applied to a circuit of a single microphone input of a mobile phone, it is also possible to exert a differential effect on the mobile terminal, and at the same time, the cost can be reduced.
  • Embodiment 3 also protects a method for setting a pseudo differential audio input circuit, wherein the circuit includes: a first path and a second path connected to an audio input port; and the first path and the first a high frequency interference filtering component on the two paths, configured to filter out high frequency differential mode interference and high frequency common mode interference; a voltage regulating component connected to the first path and the second path; and the first An audio output port connected to the path; the method comprising: adjusting the voltage regulating component such that a bias voltage on the first path is equal to a bias voltage on the second path.
  • the voltage regulating component disposed in the differential circuit is used to equalize the bias voltages on the two paths, thereby solving the problem that the common mode interference cannot be eliminated in the prior art, thereby achieving an improvement.
  • the voltage regulating component includes: a first biasing resistor R1 connected between the first path and a bias voltage, wherein a connection point of the R1 and the first path is a first connecting node a second bias resistor R2 connected between the second path and the bias voltage, wherein a connection point of the R2 and the second path is a second connection node; adjusting a resistor R3, connected Between the second path and the ground; wherein adjusting the voltage regulating component such that a bias voltage on the first path is equal to a bias voltage on the second path comprises: adjusting the R3 The value is taken until the voltage at the first connection node is equal to the voltage at the second connection node.
  • the above R3 is an adjustable resistor.
  • the method further includes: providing an isolation component between the first path and the audio output port, and is configured to isolate external DC interference and noise.
  • the step of disposing the isolation component between the first path and the audio output port comprises: providing an inductance L1 between the first connection node and the audio output port.
  • the high frequency interference filtering component comprises: a first capacitor C1 connected to the first path and configured to isolate DC; a second capacitor C2 connected to the second path and configured to isolate DC a third capacitor C3 having one end connected to the C1 and the other end connected to the ground, configured to filter out high frequency differential mode interference; and a fourth capacitor C4 connected across the first path and the second path Between, one end is connected to the C1 and C3, the other end Connected to the C2, set to filter out high frequency common mode interference; a fifth capacitor C5, one end connected to the C2 and the C4, and the other end connected to the ground, configured to filter out high frequency differential mode interference.
  • modules or steps of the present invention can be implemented by a general-purpose computing device, which can be concentrated on a single computing device or distributed over a network composed of multiple computing devices. Alternatively, they may be implemented by program code executable by the computing device, such that they may be stored in the storage device by the computing device and, in some cases, may be different from the order herein.
  • the steps shown or described are performed, or they are separately fabricated into individual integrated circuit modules, or a plurality of modules or steps are fabricated as a single integrated circuit module.
  • the invention is not limited to any specific combination of hardware and software.
  • the above is only the preferred embodiment of the present invention, and is not intended to limit the present invention, and various modifications and changes can be made to the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and scope of the present invention are intended to be included within the scope of the present invention.

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Abstract

本发明公开了一种伪差分音频输入电路及其设置方法,其中,该电路包括:与音频输入端口相连的第一通路和第二通路;设置在所述第一通路和所述第二通路上的高频干扰滤除部件,设置为滤除高频差模干扰和高频共模干扰;连接到所述第一通路和所述第二通路的电压调节部件,设置为使所述第一通路上的偏置电压等于所述第二通路上的偏置电压;与所述第一通路相连的音频输出端口。本发明解决了现有技术中无法消除共模干扰的问题,进而达到了提高音频传输及储存质量的效果。

Description

伪差分音频输入电路及其设置方法 技术领域 本发明涉及通信领域, 具体而言, 涉及一种伪差分音频输入电路及其设置方法。 背景技术 现有的移动通信终端里面, 音频接口有两种, 一种是单体麦克风接口, 一种是耳 机麦克风接口, 在电路处理方面, 可以是单端音频信号输入, 其中一端接到地, 单端 音频信号在信号传输过程中难以避免会受到干扰, 这种电路, 无法去掉模拟通路中的 共模干扰, 噪声比较大; 另一种是伪差分输入, 在现有设计中, 如图 1所示, 电路包 括耳机接口, 两个偏置电阻 R1和 R2, 滤波电容 C3、 C4和 C5, 隔直电容 C1和 C2, 以及音频输入端口, 其中通过 R1和 R2将音频两通路上拉到偏置电压, 是实现伪差分 电路的基础, C3和 C4分别连接到地, 用来滤除高频差模干扰, C3跨接两路音频通路 滤除高频共模干扰, 3个电容均为对某一特定频率的滤除设计, C1和 C2, 在音频输入 端口起隔直电流目的。 由图可以看出偏置电阻 R1,R2使得音频通路上的偏置并不在同 一电平上, 分别假设为 vl和 v2, 当两路音频输入信号受到共模噪音信号 s干扰后, 两路音频信号通路上的干扰的信号变为 vl*s和 v2*s,在音频输入端口作差分相减的时 候, Vl*s-v2*S= (vl-v2) s, 因为 vl不等于 v2, 所以无法达到差分电路消除共模干扰 的效果, 音频信号中仍然有大量噪音存在,在一定程度上影响音频的传输及储存质量。 发明内容 本发明提供了一种伪差分音频输入电路及其设置方法, 以至少解决现有技术中无 法消除共模干扰的问题。 根据本发明的一个方面, 提供了一种伪差分音频输入电路, 其包括: 与音频输入 端口相连的第一通路和第二通路; 设置在所述第一通路和所述第二通路上的高频干扰 滤除部件, 设置为滤除高频差模干扰和高频共模干扰; 连接到所述第一通路和所述第 二通路的电压调节部件, 设置为使所述第一通路上的偏置电压等于所述第二通路上的 偏置电压; 与所述第一通路相连的音频输出端口。 优选地, 所述电压调节部件包括: 第一偏置电阻 Rl, 连接在所述第一通路和偏置 电压之间, 其中, 所述 R1 与所述第一通路的连接点为第一连接节点; 第二偏置电阻 R2, 连接在所述第二通路和所述偏置电压之间, 其中, 所述 R2与所述第二通路的连 接点为第二连接节点; 调整电阻 R3, 连接在所述第二通路与地之间, 其中, 所述 R3 与所述第二通路的连接点为所述第二连接节点; 其中, 所述 Rl、 R2和 R3之间的阻值 关系为: 通过所述 Rl、 R2和 R3的阻值关系使得所述第一连接节点处的电压与所述第 二连接节点处的电压相等。 优选地, 所述 R3为可调电阻。 优选地, 上述伪差分音频输入电路还包括: 隔离部件, 连接在所述第一通路与所 述音频输出端口之间, 设置为隔离外界的直流干扰和噪音。 优选地, 所述隔离部件为电感 Ll, 连接在所述第一连接节点与所述音频输出端口 之间。 优选地, 所述高频干扰滤除部件包括: 第一电容 Cl, 连接在所述第一通路上, 设 置为隔离直流; 第二电容 C2, 连接在所述第二通路上, 设置为隔离直流; 第三电容 C3 , 一端与所述 C1相连, 另一端与所述地相连, 设置为滤除高频差模干扰; 第四电 容 C4, 跨接在所述第一通路和所述第二通路之间, 一端连接至所述 C1和 C3, 另一端 连接至所述 C2, 设置为滤除高频共模干扰; 第五电容 C5, 一端连接至所述 C2和所述 C4, 另一端与地相连, 设置为滤除高频差模干扰。 根据本发明的另一方面, 提供了一种伪差分音频输入电路的设置方法, 其中, 所 述电路包括: 与音频输入端口相连的第一通路和第二通路; 设置在所述第一通路和所 述第二通路上的高频干扰滤除部件, 设置为滤除高频差模干扰和高频共模干扰; 连接 到所述第一通路和所述第二通路的电压调节部件; 与所述第一通路相连的音频输出端 口; 所述方法包括: 调节所述电压调节部件以使所述第一通路上的偏置电压等于所述 第二通路上的偏置电压。 优选地, 所述电压调节部件包括: 第一偏置电阻 Rl, 连接在所述第一通路和偏置 电压之间, 其中, 所述 R1 与所述第一通路的连接点为第一连接节点; 第二偏置电阻 R2, 连接在所述第二通路和所述偏置电压之间, 其中, 所述 R2与所述第二通路的连 接点为第二连接节点; 调整电阻 R3, 连接在所述第二通路与地之间; 其中, 调节所述 电压调节部件以使所述第一通路上的偏置电压等于所述第二通路上的偏置电压的步骤 包括: 调节所述 R3 的取值直到所述第一连接节点处的电压与所述第二连接节点处的 电压相等。 优选地, 上述方法还包括: 在所述第一通路与所述音频输出端口之间设置隔离部 件, 设置为隔离外界的直流干扰和噪音。 优选地, 在所述第一通路与所述音频输出端口之间设置隔离部件的步骤包括: 在 所述第一连接节点与所述音频输出端口之间设置电感 L1。 在本发明中, 通过在差分电路中设置的电压调节部件, 设置为使两个通路上的偏 置电压相等, 解决了现有技术中无法消除共模干扰的问题, 进而达到了提高音频传输 及储存质量的效果。 附图说明 此处所说明的附图用来提供对本发明的进一步理解, 构成本申请的一部分, 本发 明的示意性实施例及其说明用于解释本发明, 并不构成对本发明的不当限定。 在附图 中: 图 1是根据相关技术的音频接口电路的连接示意图; 图 2是根据本发明实施例的伪差分音频输入电路的一种优选的连接示意图; 图 3是根据本发明实施例的伪差分音频输入电路的另一种优选的连接示意图。 具体实施方式 实施例 1 图 2以耳机麦克风为例示出了根据本发明实施例的伪差分音频输入电路。 如图 2 所示, 根据本发明实施例的伪差分音频输入电路包括:
1 )与音频输入端口相连的第一通路和第二通路, 优选的, 第一通路和音频输入端 口的正极相连, 第二通路和音频输入端口的负极相连, 其中, 所述音频输入端口的正 极和负极用于传输差分信号。 2)设置在所述第一通路和所述第二通路上的高频干扰滤除部件, 设置为滤除高频 差模干扰和高频共模干扰; 优选的, 高频干扰滤除部件包括: 滤波电容 C3,C4,C5, 隔 直电容 C1,C2;
3 )连接到所述第一通路和所述第二通路的电压调节部件, 设置为使所述第一通路 上的偏置电压等于所述第二通路上的偏置电压; 优选的, 电压调节部件包括: 两个上 拉电阻 R1,R2,模拟耳机麦克风负端阻抗的电阻 R3 ;
4) 与所述第一通路相连的音频输出端口, 优选的, 音频输出端口为耳机接口。 在本优选的实施例中, 通过在差分电路中设置的电压调节部件, 用于使两个通路 上的偏置电压相等, 解决了现有技术中无法消除共模干扰的问题, 进而达到了提高音 频传输及储存质量的效果。 优选的, 在图 2所示的实施例中还可以包括: 音频通路接入端(耳机麦克风正端) 的电感 Ll。 当然, 本发明不仅限于此, 电感 L1为可选的。 以下描述图 2所示的电路中的各部件的作用:
1 ) 电感 Ll, 设置为隔离外界的直流干扰及噪音的初步隔离;
2)电阻 R1,R2分别为伪差分两音频通路的偏置电阻,两个电阻接到同一个偏置电 压, 耳机麦克风的内阻一般为 2.2k欧姆, 为了使麦克风产生的音频信号得到最大不失 真的效果,将音频输入通路的电平钳位在二分之一偏置电压,取 R1,R2均为 2.2k欧姆;
3 ) C4,C3,C5滤波电容, C3,C5, 主要起滤除某一频段的高频差模干扰, C4主要 滤除某一频段的高频共模干扰, 主要为 900MHz的共模干扰;
4)电容 C1,C2主要是设置为隔离音频信号通路上的直流电平,本发明主要关注的 是低频的共模干扰, 因为人耳所能听到的主要是低频信号; 5 ) 电阻 R3, 调节音频信号通路上的偏置电压,使两通路偏置电压相等; 优选的, 所述 R3为可调电阻。 电路的实施方法: 如图 2所示, 步骤 Sl, 通过两个偏置电阻 R1,R2, 将音频信号两通路分别连接到同一个偏置电 源; 步骤 S2, 在工作状态下, 测量测试点 1 (testl ) 处的电平, 得到电压 vl ; 步骤 S3, 在工作状态下, 测量测试点 2 (test2) 处的电平, 得到电压 v2; 步骤 S4,调整电阻 R3的阻值,改变 v2处的分压值,直到 test2处的电平等于 testl 处的电平; 这样, 当两路音频通路上受到共模噪音信号 s干扰后, 噪音变为 ^ * 3和^* 3, 两 路信号作差分相减的时候 Vl*s-v2*S= (vl-v2) s, 由于 vl和 v2电平相同, 所以结果 为 0, 即消除了共模干扰, 提高了音频的信号质量。 在本优选的实施例中, 通过两个电阻 R1,R2把两路音频信号都上拉到同一个偏置 电压, 2,在没有音频信号输入的音频通路上 (第二通路), 外接一个电阻 R3, 目的在 于使有音频信号输入的音频通路 (第一通路) 上的 testl 处电平与第二通路上的 test2 处电平相等, 利用差分原理消除共模干扰。 此外, 由于本优选实施例中的电路可以将 差分信号在音频输入端去除低频共模干扰, 所以可以节省一颗共模滤波大电容。 实施例 2 本发明还可以适用于单体麦克风输入的情况, 如图 3所示, 伪差分音频输入电路 包括: 与音频输入端口相连的第一通路和第二通路; 设置在所述第一通路和所述第二 通路上的高频干扰滤除部件, 设置为滤除高频差模干扰和高频共模干扰; 连接到所述 第一通路和所述第二通路的电压调节部件, 设置为使所述第一通路上的偏置电压等于 所述第二通路上的偏置电压; 与所述第一通路相连的音频输出端口。 优选的, 所述电压调节部件包括: 第一偏置电阻 Rl, 连接在所述第一通路和偏置 电压之间, 其中, 所述 R1 与所述第一通路的连接点为第一连接节点; 第二偏置电阻 R2, 连接在所述第二通路和所述偏置电压之间, 其中, 所述 R2与所述第二通路的连 接点为第二连接节点; 调整电阻 R3, 连接在所述第二通路与地之间, 其中, 所述 R3 与所述第二通路的连接点为所述第二连接节点; 其中, 所述 Rl、 R2和 R3之间的阻值 关系为: 通过所述 Rl、 R2和 R3的阻值关系使得所述第一连接节点处的电压与所述第 二连接节点处的电压相等。 优选的, 所述 R3为可调电阻。 优选的, 伪差分音频输入电路还包括: 隔离部件, 连接在所述第一通路与所述音 频输出端口之间, 设置为隔离外界的直流干扰和噪音。 优选的, 所述隔离部件为电感 Ll, 连接在所述第一连接节点与所述音频输出端口 之间。 优选的, 所述高频干扰滤除部件包括: 第一电容 Cl, 连接在所述第一通路上, 设 置为隔离直流; 第二电容 C2, 连接在所述第二通路上, 设置为隔离直流; 第三电容 C3 , 一端与所述 C1相连, 另一端与所述地相连, 设置为滤除高频差模干扰; 第四电 容 C4, 跨接在所述第一通路和所述第二通路之间, 一端连接至所述 C1和 C3, 另一端 连接至所述 C2, 设置为滤除高频共模干扰; 第五电容 C5, 一端连接至所述 C2和所述 C4, 另一端与地相连, 设置为滤除高频差模干扰。 图 3所示的电路结构及工作原理与实施例 1所描述的耳机麦克风输入的基本相同, 在此不再赘述。 由于本发明可以运用到手机单体麦克风输入的电路中, 因此, 同样可 以在手机终端上起到差分的效果, 同时还可以降低成本。 实施例 3 本发明还保护一种伪差分音频输入电路的设置方法, 其中, 所述电路包括: 与音 频输入端口相连的第一通路和第二通路; 设置在所述第一通路和所述第二通路上的高 频干扰滤除部件, 设置为滤除高频差模干扰和高频共模干扰; 连接到所述第一通路和 所述第二通路的电压调节部件; 与所述第一通路相连的音频输出端口; 所述方法包括: 调节所述电压调节部件以使所述第一通路上的偏置电压等于所述第二通路上的偏置电 压。 在本优选的实施例中, 通过在差分电路中设置的电压调节部件, 用于使两个通路 上的偏置电压相等, 解决了现有技术中无法消除共模干扰的问题, 进而达到了提高音 频传输及储存质量的效果。 优选的, 所述电压调节部件包括: 第一偏置电阻 Rl, 连接在所述第一通路和偏置 电压之间, 其中, 所述 R1 与所述第一通路的连接点为第一连接节点; 第二偏置电阻 R2, 连接在所述第二通路和所述偏置电压之间, 其中, 所述 R2与所述第二通路的连 接点为第二连接节点; 调整电阻 R3, 连接在所述第二通路与地之间; 其中, 调节所述 电压调节部件以使所述第一通路上的偏置电压等于所述第二通路上的偏置电压的步骤 包括: 调节所述 R3 的取值直到所述第一连接节点处的电压与所述第二连接节点处的 电压相等。 优选地, 上述 R3为可调电阻。 优选的, 上述方法还包括: 在所述第一通路与所述音频输出端口之间设置隔离部 件, 设置为隔离外界的直流干扰和噪音。 优选的, 在所述第一通路与所述音频输出端口之间设置隔离部件的步骤包括: 在 所述第一连接节点与所述音频输出端口之间设置电感 Ll。 优选的, 所述高频干扰滤除部件包括: 第一电容 Cl, 连接在所述第一通路上, 设 置为隔离直流; 第二电容 C2, 连接在所述第二通路上, 设置为隔离直流; 第三电容 C3 , 一端与所述 C1相连, 另一端与所述地相连, 设置为滤除高频差模干扰; 第四电 容 C4, 跨接在所述第一通路和所述第二通路之间, 一端连接至所述 C1和 C3, 另一端 连接至所述 C2, 设置为滤除高频共模干扰; 第五电容 C5, 一端连接至所述 C2和所述 C4, 另一端与地相连, 设置为滤除高频差模干扰。 显然, 本领域的技术人员应该明白, 上述的本发明的各模块或各步骤可以用通用 的计算装置来实现, 它们可以集中在单个的计算装置上, 或者分布在多个计算装置所 组成的网络上, 可选地, 它们可以用计算装置可执行的程序代码来实现, 从而, 可以 将它们存储在存储装置中由计算装置来执行, 并且在某些情况下, 可以以不同于此处 的顺序执行所示出或描述的步骤, 或者将它们分别制作成各个集成电路模块, 或者将 它们中的多个模块或步骤制作成单个集成电路模块来实现。 这样, 本发明不限制于任 何特定的硬件和软件结合。 以上所述仅为本发明的优选实施例而已, 并不用于限制本发明, 对于本领域的技 术人员来说, 本发明可以有各种更改和变化。 凡在本发明的精神和原则之内, 所作的 任何修改、 等同替换、 改进等, 均应包含在本发明的保护范围之内。

Claims

权 利 要 求 书
1. 一种伪差分音频输入电路, 包括:
与音频输入端口相连的第一通路和第二通路;
设置在所述第一通路和所述第二通路上的高频干扰滤除部件, 设置为滤除 高频差模干扰和高频共模干扰;
连接到所述第一通路和所述第二通路的电压调节部件, 设置为使所述第一 通路上的偏置电压等于所述第二通路上的偏置电压;
与所述第一通路相连的音频输出端口。
2. 根据权利要求 1所述的伪差分音频输入电路, 其中, 所述电压调节部件包括: 第一偏置电阻 Rl, 连接在所述第一通路和偏置电压之间, 其中, 所述 R1 与所述第一通路的连接点为第一连接节点;
第二偏置电阻 R2, 连接在所述第二通路和所述偏置电压之间, 其中, 所述 R2与所述第二通路的连接点为第二连接节点;
调整电阻 R3, 连接在所述第二通路与地之间, 其中, 所述 R3与所述第二 通路的连接点为所述第二连接节点;
其中, 所述 Rl、 R2和 R3之间的阻值关系为: 通过所述 Rl、 R2和 R3的 阻值关系使得所述第一连接节点处的电压与所述第二连接节点处的电压相等。
3. 根据权利要求 2所述的伪差分音频输入电路, 其中, 所述 R3为可调电阻。
4. 根据权利要求 1或 2所述的伪差分音频输入电路, 其中, 还包括: 隔离部件, 连接在所述第一通路与所述音频输出端口之间, 设置为隔离外 界的直流干扰和噪音。
5. 根据权利要求 4所述的伪差分音频输入电路, 其中, 所述隔离部件为电感 Ll, 连接在所述第一连接节点与所述音频输出端口之间。
6. 根据权利要求 1所述的伪差分音频输入电路, 其中, 所述高频干扰滤除部件包 括:
第一电容 Cl, 连接在所述第一通路上, 设置为隔离直流; 第二电容 C2, 连接在所述第二通路上, 设置为隔离直流;
第三电容 C3, 一端与所述 C1相连, 另一端与所述地相连, 设置为滤除高 频差模干扰;
第四电容 C4,跨接在所述第一通路和所述第二通路之间,一端连接至所述 C1和 C3, 另一端连接至所述 C2, 设置为滤除高频共模干扰;
第五电容 C5, 一端连接至所述 C2和所述 C4, 另一端与地相连, 设置为滤 除高频差模干扰。 一种伪差分音频输入电路的设置方法, 所述电路包括: 与音频输入端口相连的 第一通路和第二通路; 设置在所述第一通路和所述第二通路上的高频干扰滤除 部件, 设置为滤除高频差模干扰和高频共模干扰; 连接到所述第一通路和所述 第二通路的电压调节部件; 与所述第一通路相连的音频输出端口;
所述方法包括:
调节所述电压调节部件以使所述第一通路上的偏置电压等于所述第二通路 上的偏置电压。 根据权利要求 7所述的方法,其中,所述电压调节部件包括:第一偏置电阻 Rl, 连接在所述第一通路和偏置电压之间, 其中, 所述 R1 与所述第一通路的连接 点为第一连接节点; 第二偏置电阻 R2, 连接在所述第二通路和所述偏置电压之 间, 其中, 所述 R2与所述第二通路的连接点为第二连接节点; 调整电阻 R3, 连接在所述第二通路与地之间;
其中, 调节所述电压调节部件以使所述第一通路上的偏置电压等于所述第 二通路上的偏置电压的步骤包括:
调节所述 R3 的取值直到所述第一连接节点处的电压与所述第二连接节点 处的电压相等。 根据权利要求 7或 8所述的方法, 其中, 还包括: 在所述第一通路与所述音频 输出端口之间设置隔离部件, 设置为隔离外界的直流干扰和噪音。 根据权利要求 9所述的方法, 其中, 在所述第一通路与所述音频输出端口之间 设置隔离部件的步骤包括:
在所述第一连接节点与所述音频输出端口之间设置电感 L1。
PCT/CN2011/082624 2010-11-26 2011-11-22 伪差分音频输入电路及其设置方法 WO2012068985A1 (zh)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105365600A (zh) * 2015-10-30 2016-03-02 北京理工大学 电动汽车电机驱动系统差模干扰传播路径

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102026063B (zh) * 2010-11-26 2014-12-10 中兴通讯股份有限公司 伪差分音频输入电路及其设置方法
CN103095240A (zh) * 2011-10-31 2013-05-08 成都高新区尼玛电子产品外观设计工作室 音频pa输出匹配电路
CN104703091A (zh) * 2013-12-06 2015-06-10 上海果壳电子有限公司 一种具有噪声消除装置的可穿戴设备
CN105992098B (zh) * 2015-01-30 2020-03-10 中兴通讯股份有限公司 一种音频输入电路及电子终端
CN107172540A (zh) * 2017-06-26 2017-09-15 上海与德科技有限公司 一种耳机麦克信号的降噪电路、滤波电路及设备
CN107820160B (zh) * 2017-09-30 2020-11-06 深圳市艾特智能科技有限公司 信号输入电路
CN108563279A (zh) * 2018-07-11 2018-09-21 重庆线易电子科技有限责任公司 稳压滤波电路及信号检测电路
CN109275071B (zh) * 2018-11-06 2022-03-04 珠海市杰理科技股份有限公司 音频处理装置、芯片、系统和方法
CN113473315B (zh) * 2021-07-31 2022-06-28 展讯通信(上海)有限公司 可提升耳机输出性能的电子装置

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN201307878Y (zh) * 2008-11-05 2009-09-09 宇龙计算机通信科技(深圳)有限公司 一种模拟音频输入电路、移动通信终端和耳机
CN102026063A (zh) * 2010-11-26 2011-04-20 中兴通讯股份有限公司 伪差分音频输入电路及其设置方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN200990687Y (zh) * 2006-12-21 2007-12-12 康佳集团股份有限公司 一种耳机接口电路
CN201141908Y (zh) * 2008-01-25 2008-10-29 北京芯慧同用微电子技术有限责任公司 一种偏置电压产生装置
CN201479352U (zh) * 2009-07-29 2010-05-19 比亚迪股份有限公司 耳机发送端音频调整电路

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN201307878Y (zh) * 2008-11-05 2009-09-09 宇龙计算机通信科技(深圳)有限公司 一种模拟音频输入电路、移动通信终端和耳机
CN102026063A (zh) * 2010-11-26 2011-04-20 中兴通讯股份有限公司 伪差分音频输入电路及其设置方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105365600A (zh) * 2015-10-30 2016-03-02 北京理工大学 电动汽车电机驱动系统差模干扰传播路径

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