WO2012050006A1 - Array substrate and method for manufacturing same - Google Patents

Array substrate and method for manufacturing same Download PDF

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Publication number
WO2012050006A1
WO2012050006A1 PCT/JP2011/072836 JP2011072836W WO2012050006A1 WO 2012050006 A1 WO2012050006 A1 WO 2012050006A1 JP 2011072836 W JP2011072836 W JP 2011072836W WO 2012050006 A1 WO2012050006 A1 WO 2012050006A1
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WO
WIPO (PCT)
Prior art keywords
light shielding
array substrate
film
shielding film
photoresist
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Application number
PCT/JP2011/072836
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French (fr)
Japanese (ja)
Inventor
真琴 山田
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シャープ株式会社
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Publication date
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Publication of WO2012050006A1 publication Critical patent/WO2012050006A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78633—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a light shield
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136209—Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • H01L29/78621—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile

Definitions

  • the present invention relates to an array substrate and a manufacturing method thereof. More specifically, the present invention relates to an array substrate suitable for a liquid crystal panel and a method for manufacturing the same.
  • Liquid crystal panels are widely used as light modulation means (light valves) for direct-view displays, liquid crystal projectors, and the like.
  • a general liquid crystal panel includes an array substrate, and thin film transistors (hereinafter also referred to as TFTs) are provided in a matrix form as switching elements on the array substrate.
  • TFTs thin film transistors
  • FIG. 40 the cross-sectional schematic diagram of the array substrate of the comparative form 1 is shown.
  • one TFT and its peripheral members are shown for simplification of the drawing.
  • the array substrate 4 of the comparative form 1 includes an insulating substrate 410, a base coat film 417 formed on the substrate 410, and a plurality of TFTs 430 formed on the base coat film 417.
  • Each TFT 430 includes a semiconductor layer 431, a gate insulating film 432 formed on the semiconductor layer 431, and a gate electrode 433 formed on the gate insulating film 432.
  • the semiconductor layer 431 includes a channel region 434, LDD (Lightly Doped Drain) regions 435 and 436, and source / drain regions 437 and 438.
  • the backlight includes a light source such as a cold cathode tube or an LED (Light Emitting Diode).
  • the formation process of the TFT 430 includes a high-temperature heating process. Accordingly, the light shielding film is required to have high heat resistance. Further, from the viewpoint of reducing unnecessary capacitance formed between the light shielding film and the wiring, the resistance of the light shielding film is preferably high.
  • Patent Document 1 If the technique disclosed in Patent Document 1 is used, a light-shielding film having high resistance and high heat resistance can be provided, so that the occurrence of the above problems can be suppressed.
  • it is necessary to form a highly heat-resistant coating film, and to perform a photolithography process and an etching process, and the number of processes is large.
  • the present invention has been made in view of the above-described situation, and an array substrate manufacturing method capable of simplifying the manufacturing process of an array substrate having a high heat-resistant light-shielding film, a simple manufacturing method, and a high heat resistance It is an object of the present invention to provide an array substrate having a light shielding film.
  • the present inventor has studied various methods for manufacturing an array substrate that can simplify the manufacturing process of an array substrate having a high heat-resistant light-shielding film, and has focused on the method for forming the light-shielding film.
  • a light shielding material and a photoresist film containing a resin material are formed, then the photoresist film is exposed, and then the exposed photoresist film is developed to form a photoresist pattern, Then, by removing the resin material from the photoresist pattern by heat treatment, it was found that the light shielding film can be formed with a small number of steps, and that the resin material, that is, the material generally inferior in heat resistance, can be removed from the light shielding film,
  • the inventors have arrived at the present invention by conceiving that the above problems can be solved brilliantly.
  • one aspect of the present invention is a method for manufacturing an array substrate, comprising: (1) a step of forming a light shielding film; and (2) a step of forming a semiconductor element so as to overlap the light shielding film.
  • Step (1) includes forming a photoresist film containing a light shielding material and a resin material on a substrate, exposing the photoresist film, developing the exposed photoresist film, and
  • An array substrate manufacturing method including a step of forming a resist pattern and a step of removing the resin material from the photoresist pattern by heat treatment (hereinafter also referred to as a first manufacturing method according to the present invention).
  • the first production method according to the present invention is not particularly limited by other steps as long as such steps are included as essential.
  • the inventor has also paid attention to another method for forming a light shielding film.
  • a light shielding material and a pattern containing a resin material are directly drawn on the substrate, and the light shielding film can be formed with a small number of steps by removing the resin material from the pattern by heat treatment.
  • the present inventors have found that the resin material can be removed from the light-shielding film, and have come up with the idea that the above problems can be solved brilliantly.
  • another aspect of the present invention is an array substrate manufacturing method including (1) a step of forming a light shielding film and (2) a step of forming a semiconductor element so as to overlap the light shielding film.
  • the step (1) includes a step of drawing a pattern including a light shielding material and a resin material directly on the substrate, and a step of removing the resin material from the pattern by heat treatment ( Hereinafter, it is also referred to as a second production method according to the present invention).
  • the second production method according to the present invention is not particularly limited by other steps as long as such steps are included as essential.
  • the light shielding film can be formed with a small number of steps and the resin material can be removed from the light shielding film by the following method.
  • a first photoresist pattern including a light shielding material and a resin material is directly drawn on a substrate, then the first photoresist pattern is exposed, and then exposed.
  • the first photoresist pattern is developed to form a second photoresist pattern, and the resin material is removed from the second photoresist pattern by heat treatment.
  • an array substrate manufacturing method including (1) a step of forming a light shielding film and (2) a step of forming a semiconductor element so as to overlap the light shielding film.
  • the step (1) includes a step of drawing a first photoresist pattern including a light shielding material and a resin material directly on the substrate, a step of exposing the first photoresist pattern, and an exposure step. Development of the first photoresist pattern formed to form a second photoresist pattern, and manufacturing the array substrate including a step of removing the resin material from the second photoresist pattern by heat treatment And a method (hereinafter also referred to as a third production method according to the present invention).
  • the third production method according to the present invention is not particularly limited by other steps as long as such steps are included as essential.
  • the substrate is usually an insulating substrate such as a glass substrate.
  • the light shielding material is preferably a non-conductive material. This eliminates the need to fix the potential of the light shielding film. In addition, it is not necessary to form a base coat film having a non-uniform film thickness in order to prevent a malfunction from occurring due to the potential fluctuation of the light shielding film. That is, when the base coat film is formed, it is not necessary to perform special processing on the base coat film. As described above, in the first, second, and third manufacturing methods according to the present invention, the step of forming the base coat film is not an essential step.
  • Still another aspect of the present invention is an array substrate including a light-shielding film and a semiconductor element formed so as to overlap the light-shielding film, the light-shielding film including a particulate coloring component, and the coloring
  • An array substrate (hereinafter also referred to as an array substrate according to the present invention) that does not include a component for holding the component (hereinafter also referred to as a matrix component).
  • the first, second, or third production method of the present invention is used. It can be easily produced.
  • the array substrate according to the present invention can be manufactured using the first, second, or third manufacturing method of the present invention, a material having poor heat resistance (for example, a resin material) is removed from the light shielding film. be able to. Therefore, the heat resistance of the light shielding film can be improved.
  • the configuration of the array substrate according to the present invention is not particularly limited by other components as long as such components are essential.
  • the coloring component is preferably a non-conductive component. This eliminates the need to fix the potential of the light shielding film. In addition, it is not necessary to form a base coat film having a non-uniform film thickness in order to prevent a malfunction from occurring due to the potential fluctuation of the light shielding film. That is, when the base coat film is formed, it is not necessary to perform special processing on the base coat film. As described above, the base coat film is not an essential component in the array substrate according to the present invention.
  • the manufacturing method of the array substrate which can simplify the manufacturing process of the array substrate which has a high heat-resistant light shielding film is realizable.
  • FIG. 2 is a circuit diagram of the array substrate of Embodiment 1.
  • FIG. 2 is a schematic cross-sectional view of an array substrate according to Embodiment 1.
  • FIG. It is a cross-sectional schematic diagram of the array substrate of Embodiment 1 in the formation process of a photoresist film.
  • It is a cross-sectional schematic diagram of the array substrate of Embodiment 1 in an exposure process.
  • It is a plane schematic diagram of the array substrate of Embodiment 1 in an exposure process.
  • It is a cross-sectional schematic diagram of the array substrate of Embodiment 1 in the formation process of a photoresist pattern.
  • FIG. 1 It is a cross-sectional schematic diagram of the array substrate of Embodiment 1 in a baking process. It is a plane schematic diagram of the array substrate of Embodiment 1 in a baking process. It is a cross-sectional schematic diagram of the array substrate of Embodiment 1 after formation of a light shielding film. It is a plane schematic diagram of the array substrate of Embodiment 1 after formation of a light shielding film. It is a cross-sectional schematic diagram of the array substrate of Embodiment 1 after TFT formation. It is a plane schematic diagram of the array substrate of Embodiment 1 after formation of TFT. 6 is a schematic cross-sectional view of an array substrate according to Embodiment 2. FIG.
  • FIG. 6 is a schematic cross-sectional view of an array substrate of Embodiment 3.
  • FIG. It is a cross-sectional schematic diagram of the array substrate of Embodiment 3 in the application
  • the photoresist may be any substance that has photosensitivity and can be patterned by exposure and development, and does not necessarily function as a protective layer.
  • the resist may be any substance that can be patterned and does not necessarily function as a protective layer.
  • the array substrate (TFT array substrate) 1 of Embodiment 1 includes a source bus line 11 parallel to each other, a gate bus line 12 that intersects with the source bus line 11, and a storage capacitor wiring 13 , A TFT 30 provided in the vicinity of a region where the source bus line 11 and the gate bus line 12 intersect, and a pixel electrode 14 connected to the TFT 30.
  • a storage capacitor 15 is formed between the TFT 30 and the storage capacitor line 13.
  • the TFT 30 functions as a switching element and includes a gate, a source, and a drain.
  • the gate is connected to the gate bus line 12, one of the source and the drain is connected to the source bus line 11, and the other is connected to the pixel electrode 14.
  • the array substrate 1 includes an insulating substrate 10, a light shielding film 16 formed on the substrate 10, a substrate 10, and a base coat film 17 formed on the light shielding film 16. , Formed on the base coat film 17.
  • the light shielding film 16 is disposed in the lowermost layer. Each light shielding film 16 faces the TFT 30.
  • Each TFT 30 includes a semiconductor layer 31, a gate insulating film 32 formed on the semiconductor layer 31, and a gate electrode 33 formed on the gate insulating film 32. That is, the substrate 10, the light shielding film 16, the base coat layer 17, the semiconductor layer 31, the gate insulating film 32, and the gate electrode 33 are stacked in this order.
  • the semiconductor layer 31 includes a channel region 34 facing the gate electrode 33, LDD (Lightly Doped Drain) regions 35 and 36 disposed so as to sandwich the channel region 34, and source / drain adjacent to the LDD regions 35 and 36, respectively. Regions 37 and 38.
  • the semiconductor layer 31 includes a crystalline semiconductor such as polysilicon.
  • An interlayer insulating film 20 is formed on the gate electrode 33 and the gate insulating film 32, and wirings 18 and 19 are formed on the interlayer insulating film 20.
  • the wirings 18 and 19 are connected to the source / drain regions 37 and 38 through contact holes that penetrate the gate insulating film 32 and the interlayer insulating film 20, respectively.
  • the wiring 18 is connected to the source bus line 11.
  • An interlayer insulating film 21 is formed on the wirings 18 and 19, and the pixel electrode 14 is formed on the interlayer insulating film 21.
  • the pixel electrode 14 is connected to the wiring 19 through a contact hole that penetrates the interlayer insulating film 21.
  • the manufacturing process of the array substrate 1 will be described.
  • the light shielding film 16 is formed on the substrate 10. More specifically, the following steps are performed.
  • a light-shielding material, a resin material, a photosensitizer, and a photoresist material including a solvent are applied onto the substrate 10 using a spin coater or a slit coater. Thereafter, a temporary baking step (pre-baking) is performed to form a light-shielding photoresist film 40 as shown in FIG.
  • the photoresist material is a positive photosensitive material, and the film thickness of the photoresist film 40 is 0.5 to 1.5 ⁇ m.
  • the photoresist film 40 may be formed using a dry film.
  • the light shielding material is a black material and greatly absorbs light in the visible light region (wavelength 400 to 800 nm).
  • the light shielding material mainly contains fine particles.
  • the average particle diameter of the fine particles contained in the light shielding material is 0.5 ⁇ m or less.
  • the shape of the fine particles is not particularly limited and can be appropriately selected.
  • the light shielding material has high heat resistance but does not have conductivity. That is, the light shielding material is a highly heat-resistant and non-conductive (high resistance) material.
  • the heat-resistant temperature of the light shielding material is determined in consideration of conditions such as the highest processing temperature in the manufacturing process of the array substrate 1 and the characteristics of the resin material. Specifically, the heat resistant temperature of the light shielding material is preferably 600 ° C. or higher. This is because the maximum processing temperature of general low-temperature polysilicon (LTPS) is 600 ° C. or lower.
  • the resistance of the light shielding material is not particularly limited, but is preferably 10 9 ⁇ ⁇ cm or more. This is because the boundary between the semiconductor and the insulator is 10 6 ⁇ ⁇ cm, and a resistance that is three orders of magnitude higher than that is considered sufficient.
  • the light shielding material include pigments and dyes. More specific examples of the light shielding material include carbon black.
  • the resin material is not particularly limited as long as it can maintain the shape of the photoresist pattern described later.
  • Specific examples of the resin material include an acrylic resin.
  • the resin material is a thermally decomposable material and is intentionally removed in a baking step described later. Therefore, the resin material is not required to have high heat resistance.
  • materials other than the light shielding material in the photoresist material materials contained in a general photosensitive black resist can be used as appropriate.
  • the photoresist film 40 is exposed through a photomask 41.
  • the photomask 41 is formed with a light transmitting portion 42 and a light shielding portion 43.
  • the photoresist film 40 is irradiated with electromagnetic waves (for example, ultraviolet rays).
  • the exposure amount at this time is, for example, 40 to 200 mJ / cm 2 (however, it can be changed according to user specifications).
  • the type of exposure apparatus that can be used in the present embodiment is not particularly limited, and examples include a stepper, a mirror projection exposure apparatus, and a proximity exposure apparatus.
  • the photoresist film 40 can be exposed without using a photomask.
  • the exposed photoresist film 40 is developed using a developer such as an aqueous potassium hydroxide solution to form a photoresist pattern 44 as shown in FIGS.
  • An alignment mark (not shown) is formed using the photoresist film 40 together with the photoresist pattern 44. Thereby, the position of the light shielding film 16 and the TFT 30 can be easily aligned.
  • a baking process is performed at about 400 to 600 ° C. for 0.5 to 1.5 hours. Thereby, the resin material is thermally decomposed, and the resin material is removed from the photoresist pattern 44.
  • the firing temperature is determined in consideration of conditions such as the highest processing temperature during the manufacturing process of the array substrate 1 and the characteristics of the resin material.
  • the firing temperature is set higher than the heat resistance temperature of the resin material and lower than the heat resistance temperature of the light shielding material.
  • the light-shielding material has heat resistance that can withstand the heat treatment of this baking step.
  • the baking process is performed until the resin material is removed and the light shielding material is in close contact with the substrate 10.
  • the light shielding material is a material that can be in close contact with the substrate 10.
  • the material to be removed in the firing step is not limited to the resin material, and may be any material excluding the light shielding material.
  • the photosensitizer may be decomposed and removed.
  • the light shielding film 16 As a result of the baking, a light shielding film 16 is formed on the substrate 10 as shown in FIGS. That is, the remaining component of the photoresist pattern 44 becomes the light shielding film 16. Therefore, the light shielding film 16 mainly contains particulate colored components derived from the light shielding material. On the other hand, the light shielding film 16 does not include a component (matrix component, for example, a resin component) for holding a coloring component. However, since the coloring component has adhesion to the substrate 10, the light shielding film 16 is effectively held on the substrate 10. However, the light shielding film 16 may include a residue of a resin material (for example, a substance remaining without being completely decomposed).
  • a resin material for example, a substance remaining without being completely decomposed
  • a base coat film 17 is formed on the substrate 10 having the light shielding film 16 by using the CVD method.
  • the material of the base coat film 17 include SiN, SiO 2 and SiNO.
  • the base coat film 17 has a uniform film thickness.
  • the formation process of the TFT 30 includes a high temperature heat treatment process.
  • the light shielding film 16 is larger than the semiconductor layer 31, and the LDD regions 35 and 36 are effectively shielded by the light shielding film 16.
  • the conventional process is performed to form the remaining members such as the pixel electrodes 14 and the array substrate 1 is completed.
  • the light shielding material has high heat resistance. Further, since the resin material is sufficiently decomposed in the baking process, the resin component is sufficiently removed from the light shielding film 16. That is, only a component (for example, a coloring component) that can withstand high-temperature heat treatment remains in the light shielding film 16. Therefore, the light shielding film 16 can withstand heat treatment for forming the TFT 30.
  • a general photosensitive black resist is used for a color filter substrate, it does not include a highly heat-resistant light-shielding material.
  • the light shielding film 16 does not substantially contain a component having low heat resistance. Therefore, it is possible to effectively prevent the TFT 30 from being contaminated due to a component having low heat resistance (for example, a resin component) in the formation process of the TFT 30.
  • a component having low heat resistance for example, a resin component
  • a photosensitive photoresist material is used, and the light shielding film 16 is formed only through a photolithography process. Therefore, it is not necessary to form another photoresist pattern on the photoresist film 40 to be the light shielding film 16 and to etch the photoresist film 40 using this another photoresist pattern as a mask. That is, according to the present embodiment, the number of steps can be reduced as compared with the technique described in Patent Document 1.
  • the light shielding film 16 is formed using a non-conductive light shielding material and exhibits non-conductivity. Therefore, it is not necessary to fix the potential of the light shielding film 16. Further, the base coat film 17 can be formed with a uniform thickness.
  • the TFT 30 may malfunction. This is because the LDD regions 35 and 36 may become active due to the potential change of the light shielding film 16. Therefore, in this case, it is necessary to partially thicken the LDD facing portion of the base coat film 17 (portion facing the LDD regions 35 and 36). That is, the base coat film 17 needs to be specially processed, and the number of steps increases.
  • the photoresist material may be a negative type.
  • the patterns of the light transmitting portion 42 and the light shielding portion 43 may be replaced.
  • the array substrate 2 of this embodiment is the same as the array substrate 1 of Embodiment 1 except that a light shielding film 216 is provided instead of the light shielding film 16.
  • a light shielding film 216 is provided instead of the light shielding film 16.
  • the light shielding film 216 is formed on the substrate 10. More specifically, the following steps are performed.
  • a resist material including a light shielding material, a resin material, and a solvent is applied onto the substrate 10 by an inkjet method.
  • the ink 245 is ejected from the inkjet head 246 as shown in FIGS.
  • the ink 245 is applied only to the region where the light shielding film 216 is formed.
  • the resist pattern 247 including the light shielding material and the resin material is drawn directly on the substrate 10.
  • an alignment mark (not shown) is formed using a resist material.
  • the resist material is a non-photosensitive material, and the film thickness of the resist pattern 247 is 0.5 to 1.5 ⁇ m.
  • the light shielding material As the light shielding material, the light shielding material described in Embodiment 1 can be used.
  • the resin material demonstrated in Embodiment 1 can also be used for the resin material.
  • a baking process is performed at about 400 to 600 ° C. for 0.5 to 1.5 hours. This is because the resin material is removed from the resist pattern 247 as in the first embodiment.
  • the firing temperature is determined in consideration of conditions such as the highest processing temperature during the manufacturing process of the array substrate 2 and the characteristics of the resin material.
  • the firing temperature is set higher than the heat resistance temperature of the resin material and lower than the heat resistance temperature of the light shielding material.
  • the light-shielding material has heat resistance that can withstand the heat treatment of this baking step.
  • the baking process is performed until the resin material is removed and the light shielding material is in close contact with the substrate 10.
  • the light shielding material is a material that can be in close contact with the substrate 10.
  • the material to be removed in the firing step is not limited to the resin material, and may be any material excluding the light shielding material.
  • the resin material is decomposed and removed without being exposed. Therefore, it is conceivable that no resin material is used. However, from the viewpoint of effectively maintaining the shape of the resist pattern 247 on the substrate 10, the resist material contains a resin material.
  • the solid resist pattern 247 is fixed on the substrate 10 by performing a temporary baking step. Thereby, it can suppress that an abnormal pattern is formed in a baking process.
  • the light shielding film 216 As a result of the baking, a light shielding film 216 is formed on the substrate 10 as shown in FIGS. That is, the remaining component of the resist pattern 247 becomes the light shielding film 216. Therefore, the light shielding film 216 mainly contains a particulate colored component derived from the light shielding material. On the other hand, the light shielding film 216 does not include a component (matrix component, for example, a resin component) for holding the coloring component. However, since the coloring component has adhesion to the substrate 10, the light shielding film 216 is effectively held on the substrate 10. However, the light shielding film 216 may include a residue of a resin material (for example, a substance remaining without being completely decomposed).
  • the base coat film 17 is formed on the substrate 10 having the light shielding film 216 by using the CVD method.
  • the TFT 30 is formed.
  • the remaining members such as the pixel electrode 14 are formed, and the array substrate 2 is completed.
  • the resist pattern 247 is directly drawn on the substrate 10 using an inkjet method. Therefore, the resist pattern 247 can be efficiently formed regardless of whether the resist material has photosensitivity. Further, since it is not necessary to impart photosensitivity to the resist material, the cost can be reduced. Furthermore, the amount of resist material used can be reduced.
  • a method for forming the resist pattern 247 is not particularly limited, and the ink 245 may be applied by screen printing instead of the inkjet method.
  • the array substrate 3 of the present embodiment is the same as the array substrate 1 of Embodiment 1 except that a light shielding film 316 is provided instead of the light shielding film 16.
  • a light shielding film 316 is provided instead of the light shielding film 16.
  • a light shielding film 316 is formed on the substrate 10. More specifically, the following steps are performed.
  • the same photoresist material (ink 348) as that of the first embodiment is applied onto the substrate 10 by an inkjet method.
  • the ink 348 is ejected from the inkjet head 346 as shown in FIGS.
  • the ink 348 is applied to the region where the light shielding film 316 is formed and the peripheral region.
  • the present embodiment and the first embodiment are different in the application method of the photoresist material. Therefore, physical properties such as viscosity and surface tension of the photoresist material may be different between the present embodiment and the first embodiment.
  • the photoresist pattern 349 does not need to be formed with high definition and may be a rough pattern.
  • the photoresist pattern 349 including the light shielding material, the resin material, and the photosensitive agent is drawn directly on the substrate 10.
  • the film thickness of the photoresist pattern 349 is 0.5 to 1.5 ⁇ m.
  • the photoresist pattern 349 is exposed through a photomask 341.
  • a light-transmitting portion 342 and a light-shielding portion 343 are formed.
  • the photoresist pattern 349 is irradiated with electromagnetic waves (for example, ultraviolet rays).
  • the exposure amount at this time is, for example, 40 to 200 mJ / cm 2 (however, it can be changed according to user specifications).
  • the type of exposure apparatus that can be used in the present embodiment is not particularly limited, and examples include a stepper, a mirror projection exposure apparatus, and a proximity exposure apparatus.
  • the photoresist pattern 349 can be exposed without using a photomask.
  • the exposed photoresist pattern 349 is developed using a developer such as an aqueous potassium hydroxide solution to form a fine photoresist pattern 350 as shown in FIGS.
  • an alignment mark (not shown) is formed using a photoresist material together with the photoresist pattern 350.
  • a baking process is performed at about 400 to 600 ° C. for 0.5 to 1.5 hours. This is because the resin material is removed from the photoresist pattern 350 as in the first embodiment.
  • the firing temperature is determined in consideration of conditions such as the highest processing temperature during the manufacturing process of the array substrate 3 and the characteristics of the resin material.
  • the firing temperature is set higher than the heat resistance temperature of the resin material and lower than the heat resistance temperature of the light shielding material.
  • the light-shielding material has heat resistance that can withstand the heat treatment of this baking step.
  • the baking process is performed until the resin material is removed and the light shielding material is in close contact with the substrate 10.
  • the light shielding material is a material that can be in close contact with the substrate 10.
  • the material to be removed in the firing step is not limited to the resin material, and may be any material excluding the light shielding material.
  • the photosensitizer may be decomposed and removed.
  • the light shielding film 316 As a result of the baking, a light shielding film 316 is formed on the substrate 10 as shown in FIGS. That is, the remaining component of the resist pattern 350 becomes the light shielding film 316. Therefore, the light shielding film 316 mainly contains particulate colored components derived from the light shielding material. On the other hand, the light shielding film 316 does not include a component (matrix component, for example, a resin component) for holding a coloring component. However, since the coloring component has adhesion to the substrate 10, the light shielding film 316 is effectively held on the substrate 10. However, the light shielding film 316 may include a residue of a resin material (for example, a substance remaining without being completely decomposed).
  • the base coat film 17 is formed on the substrate 10 having the light shielding film 316 by using the CVD method.
  • the TFT 30 is formed.
  • a photoresist material that is a photosensitive material is used. Therefore, even when it is difficult to form a fine pattern by the inkjet method, an additional process (exposure and development) is performed on the rough photoresist pattern 349, and the fine photoresist pattern 350 is finally formed. Can be formed.
  • the amount of the photoresist material used can be reduced.
  • a method for forming the photoresist pattern 349 is not particularly limited, and the ink 348 may be applied by screen printing instead of the inkjet method.
  • the photoresist material may be a negative type.
  • the patterns of the light transmitting portion 342 and the light shielding portion 343 may be replaced.
  • the structure of the TFT 30 is not particularly limited, and may be, for example, a staggered type.
  • the material of the semiconductor layer 31 is not particularly limited, and the semiconductor layer 31 may include an amorphous semiconductor such as amorphous silicon.
  • Array substrate 10 Insulating substrate 11: Source bus line 12: Gate bus line 13: Retention capacitance wiring 14: Pixel electrode 15: Storage capacitor 16, 216, 316: Light shielding film 17: Base coat films 18, 19 : Wiring 20, 21: interlayer insulating film 30: TFT 31: Semiconductor layer 32: Gate insulating film 33: Gate electrode 34: Channel region 35, 36: LDD region 37, 38: Source / drain region 40: Photoresist film 41, 341: Photomask 42, 342: Translucent portion 43 343: light shielding portions 44, 349, 350: photoresist pattern 245: resist material (ink) 246, 346: inkjet head 247: resist pattern 348: photoresist material (ink)

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Abstract

The present invention provides an array substrate and a method for manufacturing an array substrate, with which it is possible to simplify the steps involved in manufacturing an array substrate having a highly heat-resistant optical screening film. The present invention provides a method for manufacturing an array substrate comprising a step (1) for forming an optical screening film, and a step (2) for forming a semiconductor element over the optical screening film, wherein step (1) includes: a step for forming, on a substrate, a photoresist film including an optical screening material and a resin material; a step for exposing the photoresist film; a step for forming a photoresist pattern by developing the exposed photoresist film; and a step for removing the resin material from the photoresist pattern by heat processing.

Description

アレイ基板、及び、その製造方法Array substrate and manufacturing method thereof
本発明は、アレイ基板、及び、その製造方法に関する。より詳しくは、液晶パネルに好適なアレイ基板、及び、その製造方法に関するものである。 The present invention relates to an array substrate and a manufacturing method thereof. More specifically, the present invention relates to an array substrate suitable for a liquid crystal panel and a method for manufacturing the same.
液晶パネルは、直視型ディスプレイ、液晶プロジェクタ等の光変調手段（ライトバルブ）として、広く利用されている。一般的な液晶パネルは、アレイ基板を含み、アレイ基板には、スイッチング素子として、薄膜トランジスタ（Ｔｈｉｎ　Ｆｉｌｍ　Ｔｒａｎｓｉｓｔｏｒ：以下、ＴＦＴとも言う。）がマトリクス状に設けられている。 Liquid crystal panels are widely used as light modulation means (light valves) for direct-view displays, liquid crystal projectors, and the like. A general liquid crystal panel includes an array substrate, and thin film transistors (hereinafter also referred to as TFTs) are provided in a matrix form as switching elements on the array substrate.
また、高抵抗かつ高耐熱の遮光膜を有するアレイ基板を安価に製造する方法が開示されている（例えば、特許文献１参照。）。 In addition, a method for manufacturing an array substrate having a light-shielding film having high resistance and high heat resistance at low cost is disclosed (for example, see Patent Document 1).
特開２００５－１６７２６５号公報JP 2005-167265 A
図４０に、比較形態１のアレイ基板の断面模式図を示す。なお、図４０では、図面の簡略化のため、１つのＴＦＴと、その周辺の部材とを図示している。 In FIG. 40, the cross-sectional schematic diagram of the array substrate of the comparative form 1 is shown. In FIG. 40, one TFT and its peripheral members are shown for simplification of the drawing.
比較形態１のアレイ基板４は、図４０に示すよう、絶縁基板４１０と、基板４１０上に形成されたベースコート膜４１７と、ベースコート膜４１７上に形成された複数のＴＦＴ４３０とを備える。 As shown in FIG. 40, the array substrate 4 of the comparative form 1 includes an insulating substrate 410, a base coat film 417 formed on the substrate 410, and a plurality of TFTs 430 formed on the base coat film 417.
各ＴＦＴ４３０は、半導体層４３１と、半導体層４３１上に形成されたゲート絶縁膜４３２と、ゲート絶縁膜４３２上に形成されたゲート電極４３３とを備える。半導体層４３１は、チャネル領域４３４と、ＬＤＤ（Ｌｉｇｈｔｌｙ　Ｄｏｐｅｄ　Ｄｒａｉｎ）領域４３５、４３６と、ソース・ドレイン領域４３７、４３８とを含む。 Each TFT 430 includes a semiconductor layer 431, a gate insulating film 432 formed on the semiconductor layer 431, and a gate electrode 433 formed on the gate insulating film 432. The semiconductor layer 431 includes a channel region 434, LDD (Lightly Doped Drain) regions 435 and 436, and source / drain regions 437 and 438.
そして、アレイ基板４には、バックライト、又は、プロジェクタ専用光源から強い光（図４０中の白抜き矢印）が入射される。そのため、ＴＦＴ４３０において、光に起因するリーク電流（光リーク電流）が発生することがあり、その結果、画質の低下、誤作動等の不具合が発生することがある。ＬＤＤ領域４３５、４３６に光が入射した場合、このような不具合が特に発生しやすい。なお、バックライトは、冷陰極管、ＬＥＤ（Ｌｉｇｈｔ　Ｅｍｉｔｔｉｎｇ　Ｄｉｏｄｅ）等の光源を有する。 Then, strong light (a white arrow in FIG. 40) is incident on the array substrate 4 from a backlight or a projector-specific light source. Therefore, a leakage current (light leakage current) due to light may occur in the TFT 430, and as a result, problems such as degradation of image quality and malfunction may occur. Such a problem is particularly likely to occur when light enters the LDD regions 435 and 436. Note that the backlight includes a light source such as a cold cathode tube or an LED (Light Emitting Diode).
光リーク電流の発生を抑制するためには、ＴＦＴ４３０に対して遮光膜を設けることが有効である。ただし、ＴＦＴ４３０の形成工程は、高温の加熱工程を含む。したがって、遮光膜には、高耐熱性が要求される。また、遮光膜と配線との間に形成される不要な容量を低減する観点からは、遮光膜の抵抗は高いことが好ましい。 In order to suppress the occurrence of light leakage current, it is effective to provide a light shielding film for the TFT 430. However, the formation process of the TFT 430 includes a high-temperature heating process. Accordingly, the light shielding film is required to have high heat resistance. Further, from the viewpoint of reducing unnecessary capacitance formed between the light shielding film and the wiring, the resistance of the light shielding film is preferably high.
特許文献１に記載の技術を利用すれば、高抵抗かつ高耐熱の遮光膜を設けることができることから、上記不具合が発生するのを抑制することができる。しかしながら、特許文献１に記載の技術においては、高耐熱性の塗膜を形成し、更に、フォトリソグラフィ工程、及び、エッチング工程を行う必要があり、工程数が多い。 If the technique disclosed in Patent Document 1 is used, a light-shielding film having high resistance and high heat resistance can be provided, so that the occurrence of the above problems can be suppressed. However, in the technique described in Patent Document 1, it is necessary to form a highly heat-resistant coating film, and to perform a photolithography process and an etching process, and the number of processes is large.
本発明は、上記現状に鑑みてなされたものであり、高耐熱の遮光膜を有するアレイ基板の製造工程の簡略化が可能であるアレイ基板の製造方法と、簡便に作製でき、かつ、高耐熱の遮光膜を有するアレイ基板とを提供することを目的とするものである。 The present invention has been made in view of the above-described situation, and an array substrate manufacturing method capable of simplifying the manufacturing process of an array substrate having a high heat-resistant light-shielding film, a simple manufacturing method, and a high heat resistance It is an object of the present invention to provide an array substrate having a light shielding film.
本発明者は、高耐熱の遮光膜を有するアレイ基板の製造工程の簡略化が可能であるアレイ基板の製造方法について種々検討したところ、遮光膜の形成方法に着目した。そして、まず、遮光材料、及び、樹脂材料を含むフォトレジスト膜を形成し、次に、フォトレジスト膜を露光し、次に、露光されたフォトレジスト膜を現像してフォトレジストパターンを形成し、そして、加熱処理によって樹脂材料をフォトレジストパターンから除去することにより、少ない工程数で遮光膜を形成でき、また、樹脂材料、すなわち一般的に耐熱性に劣る材料を遮光膜から除去できることを見いだし、上記課題をみごとに解決することができることに想到し、本発明に到達したものである。 The present inventor has studied various methods for manufacturing an array substrate that can simplify the manufacturing process of an array substrate having a high heat-resistant light-shielding film, and has focused on the method for forming the light-shielding film. First, a light shielding material and a photoresist film containing a resin material are formed, then the photoresist film is exposed, and then the exposed photoresist film is developed to form a photoresist pattern, Then, by removing the resin material from the photoresist pattern by heat treatment, it was found that the light shielding film can be formed with a small number of steps, and that the resin material, that is, the material generally inferior in heat resistance, can be removed from the light shielding film, The inventors have arrived at the present invention by conceiving that the above problems can be solved brilliantly.
すなわち、本発明の一側面は、（１）遮光膜を形成する工程と、（２）前記遮光膜に重畳するように半導体素子を形成する工程とを含むアレイ基板の製造方法であって、前記工程（１）は、基板上に、遮光材料、及び、樹脂材料を含むフォトレジスト膜を形成する工程と、前記フォトレジスト膜を露光する工程と、露光された前記フォトレジスト膜を現像してフォトレジストパターンを形成する工程と、加熱処理によって前記樹脂材料を前記フォトレジストパターンから除去する工程とを含むアレイ基板の製造方法（以下、本発明に係る第一の製造方法とも言う。）である。 That is, one aspect of the present invention is a method for manufacturing an array substrate, comprising: (1) a step of forming a light shielding film; and (2) a step of forming a semiconductor element so as to overlap the light shielding film. Step (1) includes forming a photoresist film containing a light shielding material and a resin material on a substrate, exposing the photoresist film, developing the exposed photoresist film, and An array substrate manufacturing method including a step of forming a resist pattern and a step of removing the resin material from the photoresist pattern by heat treatment (hereinafter also referred to as a first manufacturing method according to the present invention).
本発明に係る第一の製造方法は、このような工程を必須として含むものである限り、その他の工程により特に限定されるものではない。 The first production method according to the present invention is not particularly limited by other steps as long as such steps are included as essential.
本発明者はまた、遮光膜の別の形成方法に着目した。そして、まず、基板上に直接、遮光材料、及び、樹脂材料を含むパターンを描画し、そして、加熱処理によって樹脂材料をパターンから除去することによっても、少ない工程数で遮光膜を形成でき、また、樹脂材料を遮光膜から除去できることを見いだし、上記課題をみごとに解決することができることに想到した。 The inventor has also paid attention to another method for forming a light shielding film. First, a light shielding material and a pattern containing a resin material are directly drawn on the substrate, and the light shielding film can be formed with a small number of steps by removing the resin material from the pattern by heat treatment. The present inventors have found that the resin material can be removed from the light-shielding film, and have come up with the idea that the above problems can be solved brilliantly.
すなわち、本発明の他の側面は、（１）遮光膜を形成する工程と、（２）前記遮光膜に重畳するように半導体素子を形成する工程とを含むアレイ基板の製造方法であって、前記工程（１）は、基板上に直接、遮光材料、及び、樹脂材料を含むパターンを描画する工程と、加熱処理によって前記樹脂材料を前記パターンから除去する工程とを含むアレイ基板の製造方法（以下、本発明に係る第二の製造方法とも言う。）である。 That is, another aspect of the present invention is an array substrate manufacturing method including (1) a step of forming a light shielding film and (2) a step of forming a semiconductor element so as to overlap the light shielding film. The step (1) includes a step of drawing a pattern including a light shielding material and a resin material directly on the substrate, and a step of removing the resin material from the pattern by heat treatment ( Hereinafter, it is also referred to as a second production method according to the present invention).
本発明に係る第二の製造方法は、このような工程を必須として含むものである限り、その他の工程により特に限定されるものではない。 The second production method according to the present invention is not particularly limited by other steps as long as such steps are included as essential.
本発明者は更に、以下の方法によっても、少ない工程数で遮光膜を形成でき、また、樹脂材料を遮光膜から除去できることを見いだした。その方法とは、まず、基板上に直接、遮光材料、及び、樹脂材料を含む第一のフォトレジストパターンを描画し、次に、第一のフォトレジストパターンを露光し、次に、露光された第一のフォトレジストパターンを現像して第二のフォトレジストパターンを形成し、そして、加熱処理によって樹脂材料を第二のフォトレジストパターンから除去する方法である。 The present inventor has further found that the light shielding film can be formed with a small number of steps and the resin material can be removed from the light shielding film by the following method. In the method, first, a first photoresist pattern including a light shielding material and a resin material is directly drawn on a substrate, then the first photoresist pattern is exposed, and then exposed. The first photoresist pattern is developed to form a second photoresist pattern, and the resin material is removed from the second photoresist pattern by heat treatment.
このように、本発明の他の側面としては、（１）遮光膜を形成する工程と、（２）前記遮光膜に重畳するように半導体素子を形成する工程とを含むアレイ基板の製造方法であって、前記工程（１）は、基板上に直接、遮光材料、及び、樹脂材料を含む第一のフォトレジストパターンを描画する工程と、前記第一のフォトレジストパターンを露光する工程と、露光された前記第一のフォトレジストパターンを現像して第二のフォトレジストパターンを形成する工程と、加熱処理によって前記樹脂材料を前記第二のフォトレジストパターンから除去する工程とを含むアレイ基板の製造方法（以下、本発明に係る第三の製造方法とも言う。）も挙げられる。 As described above, according to another aspect of the present invention, there is provided an array substrate manufacturing method including (1) a step of forming a light shielding film and (2) a step of forming a semiconductor element so as to overlap the light shielding film. The step (1) includes a step of drawing a first photoresist pattern including a light shielding material and a resin material directly on the substrate, a step of exposing the first photoresist pattern, and an exposure step. Development of the first photoresist pattern formed to form a second photoresist pattern, and manufacturing the array substrate including a step of removing the resin material from the second photoresist pattern by heat treatment And a method (hereinafter also referred to as a third production method according to the present invention).
本発明に係る第三の製造方法は、このような工程を必須として含むものである限り、その他の工程により特に限定されるものではない。 The third production method according to the present invention is not particularly limited by other steps as long as such steps are included as essential.
本発明に係る第一、第二、及び、第三の製造方法において、前記基板は、通常、ガラス基板等の絶縁基板である。 In the first, second, and third manufacturing methods according to the present invention, the substrate is usually an insulating substrate such as a glass substrate.
本発明に係る第一、第二、及び、第三の製造方法において、前記遮光材料は、非導電性の材料であることが好ましい。これにより、遮光膜の電位を固定する必要がなくなる。また、遮光膜の電位変動に起因して誤動作が発生するのを防止するために、不均一な膜厚を有するベースコート膜を形成する必要がなくなる。すなわち、ベースコート膜を形成する場合、ベースコート膜に特別な加工を施す必要がなくなる。なお、上述の通り、本発明に係る第一、第二、及び、第三の製造方法において、ベースコート膜を形成する工程は必須の工程ではない。 In the first, second, and third manufacturing methods according to the present invention, the light shielding material is preferably a non-conductive material. This eliminates the need to fix the potential of the light shielding film. In addition, it is not necessary to form a base coat film having a non-uniform film thickness in order to prevent a malfunction from occurring due to the potential fluctuation of the light shielding film. That is, when the base coat film is formed, it is not necessary to perform special processing on the base coat film. As described above, in the first, second, and third manufacturing methods according to the present invention, the step of forming the base coat film is not an essential step.
本発明の更に他の側面は、遮光膜と、前記遮光膜に重畳するように形成された半導体素子とを備えるアレイ基板であって、前記遮光膜は、粒子状の着色成分を含み、前記着色成分を保持するための成分（以下、マトリクス成分とも言う。）を含まないアレイ基板（以下、本発明に係るアレイ基板とも言う。）である。 Still another aspect of the present invention is an array substrate including a light-shielding film and a semiconductor element formed so as to overlap the light-shielding film, the light-shielding film including a particulate coloring component, and the coloring An array substrate (hereinafter also referred to as an array substrate according to the present invention) that does not include a component for holding the component (hereinafter also referred to as a matrix component).
本発明に係るアレイ基板は、粒子状の着色成分を含むが、マトリクス成分（例えば、樹脂成分）を含まないことから、本発明の第一、第二、又は、第三の製造方法を用いて簡便に作製することができる。また、本発明に係るアレイ基板は、本発明の第一、第二、又は、第三の製造方法を用いて作製できることから、耐熱性に劣る材料（例えば、樹脂材料）を遮光膜から除去することができる。そのため、遮光膜の耐熱性を向上することができる。 Since the array substrate according to the present invention contains a particulate colored component but does not contain a matrix component (for example, a resin component), the first, second, or third production method of the present invention is used. It can be easily produced. In addition, since the array substrate according to the present invention can be manufactured using the first, second, or third manufacturing method of the present invention, a material having poor heat resistance (for example, a resin material) is removed from the light shielding film. be able to. Therefore, the heat resistance of the light shielding film can be improved.
本発明に係るアレイ基板の構成としては、このような構成要素を必須として形成されるものである限り、その他の構成要素により特に限定されるものではない。 The configuration of the array substrate according to the present invention is not particularly limited by other components as long as such components are essential.
本発明に係るアレイ基板において、前記着色成分は、非導電性の成分であることが好ましい。これにより、遮光膜の電位を固定する必要がなくなる。また、遮光膜の電位変動に起因して誤動作が発生するのを防止するために、不均一な膜厚を有するベースコート膜を形成する必要がなくなる。すなわち、ベースコート膜を形成する場合、ベースコート膜に特別な加工を施す必要がなくなる。なお、上述の通り、本発明に係るアレイ基板において、ベースコート膜は必須の構成要素ではない。 In the array substrate according to the present invention, the coloring component is preferably a non-conductive component. This eliminates the need to fix the potential of the light shielding film. In addition, it is not necessary to form a base coat film having a non-uniform film thickness in order to prevent a malfunction from occurring due to the potential fluctuation of the light shielding film. That is, when the base coat film is formed, it is not necessary to perform special processing on the base coat film. As described above, the base coat film is not an essential component in the array substrate according to the present invention.
本発明によれば、高耐熱の遮光膜を有するアレイ基板の製造工程の簡略化が可能であるアレイ基板の製造方法を実現することができる。 ADVANTAGE OF THE INVENTION According to this invention, the manufacturing method of the array substrate which can simplify the manufacturing process of the array substrate which has a high heat-resistant light shielding film is realizable.
また、本発明によれば、簡便に作製でき、また、高耐熱の遮光膜を備えるアレイ基板を実現することができる。 In addition, according to the present invention, it is possible to realize an array substrate that can be easily manufactured and includes a highly heat-resistant light-shielding film.
実施形態１のアレイ基板の回路図である。2 is a circuit diagram of the array substrate of Embodiment 1. FIG. 実施形態１のアレイ基板の断面模式図である。2 is a schematic cross-sectional view of an array substrate according to Embodiment 1. FIG. フォトレジスト膜の形成工程における実施形態１のアレイ基板の断面模式図である。It is a cross-sectional schematic diagram of the array substrate of Embodiment 1 in the formation process of a photoresist film. 露光工程における実施形態１のアレイ基板の断面模式図である。It is a cross-sectional schematic diagram of the array substrate of Embodiment 1 in an exposure process. 露光工程における実施形態１のアレイ基板の平面模式図である。It is a plane schematic diagram of the array substrate of Embodiment 1 in an exposure process. フォトレジストパターンの形成工程における実施形態１のアレイ基板の断面模式図である。It is a cross-sectional schematic diagram of the array substrate of Embodiment 1 in the formation process of a photoresist pattern. フォトレジストパターンの形成工程における実施形態１のアレイ基板の平面模式図である。It is a plane schematic diagram of the array substrate of Embodiment 1 in the formation process of a photoresist pattern. 焼成工程における実施形態１のアレイ基板の断面模式図である。It is a cross-sectional schematic diagram of the array substrate of Embodiment 1 in a baking process. 焼成工程における実施形態１のアレイ基板の平面模式図である。It is a plane schematic diagram of the array substrate of Embodiment 1 in a baking process. 遮光膜の形成後における実施形態１のアレイ基板の断面模式図である。It is a cross-sectional schematic diagram of the array substrate of Embodiment 1 after formation of a light shielding film. 遮光膜の形成後における実施形態１のアレイ基板の平面模式図である。It is a plane schematic diagram of the array substrate of Embodiment 1 after formation of a light shielding film. ＴＦＴの形成後における実施形態１のアレイ基板の断面模式図である。It is a cross-sectional schematic diagram of the array substrate of Embodiment 1 after TFT formation. ＴＦＴの形成後における実施形態１のアレイ基板の平面模式図である。It is a plane schematic diagram of the array substrate of Embodiment 1 after formation of TFT. 実施形態２のアレイ基板の断面模式図である。6 is a schematic cross-sectional view of an array substrate according to Embodiment 2. FIG. インクジェット方式を用いた塗布工程における実施形態２のアレイ基板の断面模式図である。It is a cross-sectional schematic diagram of the array substrate of Embodiment 2 in the application | coating process using an inkjet system. インクジェット方式を用いた塗布工程における実施形態２のアレイ基板の平面模式図である。It is a plane schematic diagram of the array board | substrate of Embodiment 2 in the application | coating process using an inkjet system. レジストパターンの形成工程における実施形態２のアレイ基板の断面模式図である。It is a cross-sectional schematic diagram of the array substrate of Embodiment 2 in the formation process of a resist pattern. レジストパターンの形成工程における実施形態２のアレイ基板の平面模式図である。It is a plane schematic diagram of the array substrate of Embodiment 2 in the formation process of a resist pattern. 焼成工程における実施形態２のアレイ基板の断面模式図である。It is a cross-sectional schematic diagram of the array substrate of Embodiment 2 in a baking process. 焼成工程における実施形態２のアレイ基板の平面模式図である。It is a plane schematic diagram of the array substrate of Embodiment 2 in a baking process. 遮光膜の形成後における実施形態２のアレイ基板の断面模式図である。It is a cross-sectional schematic diagram of the array substrate of Embodiment 2 after formation of a light shielding film. 遮光膜の形成後における実施形態２のアレイ基板の平面模式図である。It is a plane schematic diagram of the array substrate of Embodiment 2 after formation of a light shielding film. ＴＦＴの形成後における実施形態２のアレイ基板の断面模式図である。It is a cross-sectional schematic diagram of the array substrate of Embodiment 2 after formation of TFT. ＴＦＴの形成後における実施形態２のアレイ基板の平面模式図である。It is a plane schematic diagram of the array substrate of Embodiment 2 after TFT formation. 実施形態３のアレイ基板の断面模式図である。6 is a schematic cross-sectional view of an array substrate of Embodiment 3. FIG. インクジェット方式を用いた塗布工程における実施形態３のアレイ基板の断面模式図である。It is a cross-sectional schematic diagram of the array substrate of Embodiment 3 in the application | coating process using an inkjet system. インクジェット方式を用いた塗布工程における実施形態３のアレイ基板の平面模式図である。It is a plane schematic diagram of the array substrate of Embodiment 3 in the application | coating process using an inkjet system. 第一のフォトレジストパターンの形成工程における実施形態３のアレイ基板の断面模式図である。It is a cross-sectional schematic diagram of the array substrate of Embodiment 3 in the formation process of the first photoresist pattern. 第一のフォトレジストパターンの形成工程における実施形態３のアレイ基板の平面模式図である。It is a plane schematic diagram of the array substrate of Embodiment 3 in the formation process of the first photoresist pattern. 露光工程における実施形態３のアレイ基板の断面模式図である。It is a cross-sectional schematic diagram of the array substrate of Embodiment 3 in the exposure step. 露光工程における実施形態３のアレイ基板の平面模式図である。It is a plane schematic diagram of the array substrate of Embodiment 3 in an exposure process. 第二のフォトレジストパターンの形成工程における実施形態３のアレイ基板の断面模式図である。It is a cross-sectional schematic diagram of the array substrate of Embodiment 3 in the formation process of the second photoresist pattern. 第二のフォトレジストパターンの形成工程における実施形態３のアレイ基板の平面模式図である。It is a plane schematic diagram of the array substrate of Embodiment 3 in the formation process of the second photoresist pattern. 焼成工程における実施形態３のアレイ基板の断面模式図である。It is a cross-sectional schematic diagram of the array substrate of Embodiment 3 in a baking process. 焼成工程における実施形態３のアレイ基板の平面模式図である。It is a plane schematic diagram of the array substrate of Embodiment 3 in a baking process. 遮光膜の形成後における実施形態３のアレイ基板の断面模式図である。It is a cross-sectional schematic diagram of the array substrate of Embodiment 3 after formation of a light shielding film. 遮光膜の形成後における実施形態３のアレイ基板の平面模式図である。It is a plane schematic diagram of the array substrate of Embodiment 3 after formation of a light shielding film. ＴＦＴの形成後における実施形態３のアレイ基板の断面模式図である。It is a cross-sectional schematic diagram of the array substrate of Embodiment 3 after formation of TFT. ＴＦＴの形成後における実施形態３のアレイ基板の平面模式図である。It is a plane schematic diagram of the array substrate of Embodiment 3 after formation of TFT. 比較形態１のアレイ基板の断面模式図である。It is a cross-sectional schematic diagram of the array substrate of the comparative form 1.
本明細書において、フォトレジストとは、感光性を有し、また、露光、及び、現像によりパターニングすることができる物質であればよく、保護層として必ずしも機能する必要はない。 In this specification, the photoresist may be any substance that has photosensitivity and can be patterned by exposure and development, and does not necessarily function as a protective layer.
また、レジストとは、パターニングすることができる物質であればよく、保護層として必ずしも機能する必要はない。 The resist may be any substance that can be patterned and does not necessarily function as a protective layer.
以下に実施形態を掲げ、本発明を図面を参照して更に詳細に説明するが、本発明はこれらの実施形態のみに限定されるものではない。 Embodiments will be described below, and the present invention will be described in more detail with reference to the drawings. However, the present invention is not limited only to these embodiments.
（実施形態１）
実施形態１のアレイ基板（ＴＦＴアレイ基板）１は、図１に示すように、互いに平行なソースバスライン１１と、ソースバスライン１１にそれぞれ交差するゲートバスライン１２、及び、保持容量配線１３と、ソースバスライン１１、及び、ゲートバスライン１２が交差する領域付近に設けられたＴＦＴ３０と、ＴＦＴ３０に接続された画素電極１４とを備える。また、ＴＦＴ３０、及び、保持容量配線１３の間には、蓄積キャパシタ１５が形成されている。 (Embodiment 1)
As shown in FIG. 1, the array substrate (TFT array substrate) 1 of Embodiment 1 includes a source bus line 11 parallel to each other, a gate bus line 12 that intersects with the source bus line 11, and a storage capacitor wiring 13 , A TFT 30 provided in the vicinity of a region where the source bus line 11 and the gate bus line 12 intersect, and a pixel electrode 14 connected to the TFT 30. A storage capacitor 15 is formed between the TFT 30 and the storage capacitor line 13.
ＴＦＴ３０は、スイッチング素子として機能し、ゲート、ソース、及び、ドレインを含む。ゲートは、ゲートバスライン１２に接続され、ソース、及び、ドレインの一方は、ソースバスライン１１に接続され、他方は、画素電極１４に接続されている。 The TFT 30 functions as a switching element and includes a gate, a source, and a drain. The gate is connected to the gate bus line 12, one of the source and the drain is connected to the source bus line 11, and the other is connected to the pixel electrode 14.
図２を参照して、各ＴＦＴ３０、及び、その周辺の断面構造について説明する。 With reference to FIG. 2, each TFT30 and the cross-sectional structure around it will be described.
アレイ基板１は、図２に示すよう、絶縁基板１０と、基板１０上に形成された遮光膜１６と、基板１０、及び、遮光膜１６上に形成されたベースコート膜１７とを備え、ＴＦＴ３０は、ベースコート膜１７上に形成されている。遮光膜１６は、最下層に配置されている。各遮光膜１６は、ＴＦＴ３０に対向している。 As shown in FIG. 2, the array substrate 1 includes an insulating substrate 10, a light shielding film 16 formed on the substrate 10, a substrate 10, and a base coat film 17 formed on the light shielding film 16. , Formed on the base coat film 17. The light shielding film 16 is disposed in the lowermost layer. Each light shielding film 16 faces the TFT 30.
各ＴＦＴ３０は、半導体層３１と、半導体層３１上に形成されたゲート絶縁膜３２と、ゲート絶縁膜３２上に形成されたゲート電極３３とを備える。すなわち、基板１０、遮光膜１６、ベースコート層１７、半導体層３１、ゲート絶縁膜３２、及び、ゲート電極３３は、この順に積層されている。半導体層３１は、ゲート電極３３に対向するチャネル領域３４と、チャネル領域３４を挟むように配置されたＬＤＤ（Ｌｉｇｈｔｌｙ　Ｄｏｐｅｄ　Ｄｒａｉｎ）領域３５、３６と、ＬＤＤ領域３５、３６にそれぞれ隣接するソース・ドレイン領域３７、３８とを含む。半導体層３１は、ポリシリコン等の結晶性半導体を含む。 Each TFT 30 includes a semiconductor layer 31, a gate insulating film 32 formed on the semiconductor layer 31, and a gate electrode 33 formed on the gate insulating film 32. That is, the substrate 10, the light shielding film 16, the base coat layer 17, the semiconductor layer 31, the gate insulating film 32, and the gate electrode 33 are stacked in this order. The semiconductor layer 31 includes a channel region 34 facing the gate electrode 33, LDD (Lightly Doped Drain) regions 35 and 36 disposed so as to sandwich the channel region 34, and source / drain adjacent to the LDD regions 35 and 36, respectively. Regions 37 and 38. The semiconductor layer 31 includes a crystalline semiconductor such as polysilicon.
ゲート電極３３、及び、ゲート絶縁膜３２上には、層間絶縁膜２０が形成され、層間絶縁膜２０上には、配線１８、１９が形成されている。配線１８、１９はそれぞれ、ゲート絶縁膜３２、及び、層間絶縁膜２０を貫通するコンタクトホールを通して、ソース・ドレイン領域３７、３８に接続されている。配線１８は、ソースバスライン１１に接続されている。配線１８、１９上には、層間絶縁膜２１が形成され、画素電極１４は、層間絶縁膜２１上に形成されている。画素電極１４は、層間絶縁膜２１を貫通するコンタクトホールを通して、配線１９に接続されている。 An interlayer insulating film 20 is formed on the gate electrode 33 and the gate insulating film 32, and wirings 18 and 19 are formed on the interlayer insulating film 20. The wirings 18 and 19 are connected to the source / drain regions 37 and 38 through contact holes that penetrate the gate insulating film 32 and the interlayer insulating film 20, respectively. The wiring 18 is connected to the source bus line 11. An interlayer insulating film 21 is formed on the wirings 18 and 19, and the pixel electrode 14 is formed on the interlayer insulating film 21. The pixel electrode 14 is connected to the wiring 19 through a contact hole that penetrates the interlayer insulating film 21.
次に、アレイ基板１の製造工程について説明する。
まず、基板１０上に遮光膜１６を形成する。より詳細には、以下の工程を行う。 Next, the manufacturing process of the array substrate 1 will be described.
First, the light shielding film 16 is formed on the substrate 10. More specifically, the following steps are performed.
始めに、遮光材料、樹脂材料、感光剤、及び、溶媒を含むフォトレジスト材料をスピンコータ又はスリットコータを用いて基板１０上に塗布する。その後、仮焼成工程（プリベーク）を行い、図３に示すように、遮光性のフォトレジスト膜４０を形成する。 First, a light-shielding material, a resin material, a photosensitizer, and a photoresist material including a solvent are applied onto the substrate 10 using a spin coater or a slit coater. Thereafter, a temporary baking step (pre-baking) is performed to form a light-shielding photoresist film 40 as shown in FIG.
フォトレジスト材料は、ポジ型の感光性材料であり、フォトレジスト膜４０の膜厚は、０．５～１．５μｍである。なお、フォトレジスト膜４０は、ドライフィルムを用いて形成されてもよい。 The photoresist material is a positive photosensitive material, and the film thickness of the photoresist film 40 is 0.5 to 1.5 μm. The photoresist film 40 may be formed using a dry film.
遮光材料は、黒色材料であり、可視光領域（波長４００～８００ｎｍ）の光を大きく吸収する。 The light shielding material is a black material and greatly absorbs light in the visible light region (wavelength 400 to 800 nm).
また、遮光材料は、主に微粒子を含む。遮光材料に含まれる微粒子の平均粒子径は、０．５μｍ以下である。微粒子の形状は特に限定されず、適宜選択することができる。 The light shielding material mainly contains fine particles. The average particle diameter of the fine particles contained in the light shielding material is 0.5 μm or less. The shape of the fine particles is not particularly limited and can be appropriately selected.
また、遮光材料は、高耐熱性を有するが、導電性は有さない。すなわち、遮光材料は、高耐熱かつ非導電性（高抵抗）の材料である。遮光材料の耐熱温度は、アレイ基板１の製造工程中の最も高い処理温度、樹脂材料の特性等の条件を考慮して決定される。具体的には、遮光材料の耐熱温度は、６００℃以上であることが好ましい。これは、一般的な低温ポリシリコン（ＬＴＰＳ）の最高処理温度が６００℃以下であるためである。また、遮光材料の抵抗は特に限定されないが、１０９Ω・ｃｍ以上であることが好ましい。これは、半導体と絶縁体の境目が１０６Ω・ｃｍであり、それより３桁高い抵抗であれば充分であると考えられるためである。 In addition, the light shielding material has high heat resistance but does not have conductivity. That is, the light shielding material is a highly heat-resistant and non-conductive (high resistance) material. The heat-resistant temperature of the light shielding material is determined in consideration of conditions such as the highest processing temperature in the manufacturing process of the array substrate 1 and the characteristics of the resin material. Specifically, the heat resistant temperature of the light shielding material is preferably 600 ° C. or higher. This is because the maximum processing temperature of general low-temperature polysilicon (LTPS) is 600 ° C. or lower. Moreover, the resistance of the light shielding material is not particularly limited, but is preferably 10 9 Ω · cm or more. This is because the boundary between the semiconductor and the insulator is 10 6 Ω · cm, and a resistance that is three orders of magnitude higher than that is considered sufficient.
遮光材料の具体例としては、顔料、染料等が挙げられる。遮光材料のより具体的な例としては、カーボンブラック等が挙げられる。 Specific examples of the light shielding material include pigments and dyes. More specific examples of the light shielding material include carbon black.
樹脂材料は、後述するフォトレジストパターンの形状を維持できる材料であれば特に限定されない。樹脂材料の具体例としては、例えば、アクリル樹脂等が挙げられる。 The resin material is not particularly limited as long as it can maintain the shape of the photoresist pattern described later. Specific examples of the resin material include an acrylic resin.
また、樹脂材料は、熱分解性の材料であり、後述する焼成工程において意図的に除去される。したがって、樹脂材料は、高耐熱性を要求されない。このように、フォトレジスト材料中の遮光材料を除く材料については、一般的な感光性黒色レジストに含まれる材料を適宜使用することができる。 In addition, the resin material is a thermally decomposable material and is intentionally removed in a baking step described later. Therefore, the resin material is not required to have high heat resistance. As described above, as materials other than the light shielding material in the photoresist material, materials contained in a general photosensitive black resist can be used as appropriate.
次に、図４、５に示すように、フォトマスク４１を介して、フォトレジスト膜４０を露光する。フォトマスク４１には、透光部４２、及び、遮光部４３が形成されている。フォトレジスト膜４０には、電磁波（例えば、紫外線）が照射される。このときの露光量は、例えば、４０～２００ｍＪ／ｃｍ２（ただし、ユーザー仕様により変更可能）である。 Next, as shown in FIGS. 4 and 5, the photoresist film 40 is exposed through a photomask 41. The photomask 41 is formed with a light transmitting portion 42 and a light shielding portion 43. The photoresist film 40 is irradiated with electromagnetic waves (for example, ultraviolet rays). The exposure amount at this time is, for example, 40 to 200 mJ / cm 2 (however, it can be changed according to user specifications).
本実施形態において使用可能な露光装置の種類は特に限定されず、例えば、ステッパ、ミラープロジェクション露光装置、プロキシミティ露光装置等が挙げられる。 The type of exposure apparatus that can be used in the present embodiment is not particularly limited, and examples include a stepper, a mirror projection exposure apparatus, and a proximity exposure apparatus.
また、電磁波の代わりに、電子線、又は、レーザーを照射してもよい。これにより、フォトマスクを利用することなく、フォトレジスト膜４０を露光することができる。 Moreover, you may irradiate an electron beam or a laser instead of electromagnetic waves. Thereby, the photoresist film 40 can be exposed without using a photomask.
次に、水酸化カリウム水溶液等の現像液を用いて、露光されたフォトレジスト膜４０を現像し、図６、７に示すように、フォトレジストパターン４４を形成する。 Next, the exposed photoresist film 40 is developed using a developer such as an aqueous potassium hydroxide solution to form a photoresist pattern 44 as shown in FIGS.
また、フォトレジストパターン４４とともに、フォトレジスト膜４０を用いてアライメントマーク（図示せず）を形成しておく。これにより、遮光膜１６とＴＦＴ３０の位置を容易に合わせることができる。 An alignment mark (not shown) is formed using the photoresist film 40 together with the photoresist pattern 44. Thereby, the position of the light shielding film 16 and the TFT 30 can be easily aligned.
次に、図８、９に示すように、４００～６００℃程度で０．５～１．５時間、焼成工程を行う。これにより、樹脂材料が熱分解され、樹脂材料は、フォトレジストパターン４４から除去される。 Next, as shown in FIGS. 8 and 9, a baking process is performed at about 400 to 600 ° C. for 0.5 to 1.5 hours. Thereby, the resin material is thermally decomposed, and the resin material is removed from the photoresist pattern 44.
焼成温度は、アレイ基板１の製造工程中の最も高い処理温度、樹脂材料の特性等の条件を考慮して決定される。また、焼成温度は、樹脂材料の耐熱温度よりも高く、かつ、遮光材料の耐熱温度よりも低く設定される。言い換えると、遮光材料は、この焼成工程の熱処理に耐え得る耐熱性を有する。 The firing temperature is determined in consideration of conditions such as the highest processing temperature during the manufacturing process of the array substrate 1 and the characteristics of the resin material. The firing temperature is set higher than the heat resistance temperature of the resin material and lower than the heat resistance temperature of the light shielding material. In other words, the light-shielding material has heat resistance that can withstand the heat treatment of this baking step.
また、焼成工程は、樹脂材料が除去されて、遮光材料が基板１０に密着するまで行われる。このように、遮光材料は、基板１０と密着可能な材料である。 Further, the baking process is performed until the resin material is removed and the light shielding material is in close contact with the substrate 10. Thus, the light shielding material is a material that can be in close contact with the substrate 10.
なお、焼成工程において除去される材料は、樹脂材料だけに限定されず、遮光材料を除く材料であればよい。したがって、例えば、感光剤が分解、及び、除去されてもよい。 Note that the material to be removed in the firing step is not limited to the resin material, and may be any material excluding the light shielding material. Thus, for example, the photosensitizer may be decomposed and removed.
焼成の結果、図１０、１１に示すように、基板１０上に遮光膜１６が形成される。すなわち、フォトレジストパターン４４の残存成分が遮光膜１６になる。したがって、遮光膜１６は、遮光材料に由来する、粒子状の着色成分を主に含んでいる。他方、遮光膜１６は、着色成分を保持するための成分（マトリクス成分、例えば樹脂成分）を含んでいない。しかしながら、着色成分は、基板１０に対する密着性を有するため、遮光膜１６は、基板１０上に効果的に保持されている。ただし、遮光膜１６は、樹脂材料の残渣（例えば、分解し切らずに残った物質）を含んでいてもよい。 As a result of the baking, a light shielding film 16 is formed on the substrate 10 as shown in FIGS. That is, the remaining component of the photoresist pattern 44 becomes the light shielding film 16. Therefore, the light shielding film 16 mainly contains particulate colored components derived from the light shielding material. On the other hand, the light shielding film 16 does not include a component (matrix component, for example, a resin component) for holding a coloring component. However, since the coloring component has adhesion to the substrate 10, the light shielding film 16 is effectively held on the substrate 10. However, the light shielding film 16 may include a residue of a resin material (for example, a substance remaining without being completely decomposed).
続いて、図１２に示すように、ＣＶＤ法を用いて、遮光膜１６を有する基板１０上にベースコート膜１７を形成する。ベースコート膜１７の材料としては、ＳｉＮ、ＳｉＯ２、ＳｉＮＯ等が挙げられる。ベースコート膜１７は、均一な膜厚を有する。 Subsequently, as shown in FIG. 12, a base coat film 17 is formed on the substrate 10 having the light shielding film 16 by using the CVD method. Examples of the material of the base coat film 17 include SiN, SiO 2 and SiNO. The base coat film 17 has a uniform film thickness.
次に、従来通りの工程を行い、図１２、１３に示すように、ＴＦＴ３０を形成する。なお、ＴＦＴ３０の形成工程は、高温の熱処理工程を含む。 Next, a conventional process is performed to form a TFT 30 as shown in FIGS. The formation process of the TFT 30 includes a high temperature heat treatment process.
図１２、１３に示すように、遮光膜１６は、半導体層３１よりも大きく、ＬＤＤ領域３５、３６が遮光膜１６によって効果的に遮光されている。 As shown in FIGS. 12 and 13, the light shielding film 16 is larger than the semiconductor layer 31, and the LDD regions 35 and 36 are effectively shielded by the light shielding film 16.
その後は、従来通りの工程を行い、画素電極１４等の残りの部材を形成し、アレイ基板１が完成する。 Thereafter, the conventional process is performed to form the remaining members such as the pixel electrodes 14 and the array substrate 1 is completed.
以上、説明したように、遮光材料は、高耐熱性を有する。また、樹脂材料は、焼成工程において充分に分解しているので、遮光膜１６からは樹脂成分が充分に除去されている。すなわち、遮光膜１６中には、高温の熱処理に耐え得る成分（例えば、着色成分）のみが残存している。したがって、遮光膜１６は、ＴＦＴ３０を形成するための熱処理にも耐え得る。 As described above, the light shielding material has high heat resistance. Further, since the resin material is sufficiently decomposed in the baking process, the resin component is sufficiently removed from the light shielding film 16. That is, only a component (for example, a coloring component) that can withstand high-temperature heat treatment remains in the light shielding film 16. Therefore, the light shielding film 16 can withstand heat treatment for forming the TFT 30.
なお、一般的な感光性黒色レジストは、カラーフィルタ基板に使用されるため、高耐熱性の遮光材料を含んでいない。 In addition, since a general photosensitive black resist is used for a color filter substrate, it does not include a highly heat-resistant light-shielding material.
また、遮光膜１６は、耐熱性の低い成分を実質的に含まない。したがって、ＴＦＴ３０の形成工程において、耐熱性の低い成分（例えば、樹脂成分）に起因してＴＦＴ３０が汚染するのを効果的に抑制することができる。 The light shielding film 16 does not substantially contain a component having low heat resistance. Therefore, it is possible to effectively prevent the TFT 30 from being contaminated due to a component having low heat resistance (for example, a resin component) in the formation process of the TFT 30.
また、本実施形態においては、感光性を有するフォトレジスト材料が用いられ、遮光膜１６は、フォトリソグラフィ工程のみを経て形成されている。したがって、遮光膜１６となるフォトレジスト膜４０上に、別のフォトレジストパターンを形成し、この別のフォトレジストパターンをマスクとしてフォトレジスト膜４０をエッチングする必要がない。すなわち、本実施形態によれば、特許文献１に記載の技術に比べて、工程数を少なくすることができる。 In this embodiment, a photosensitive photoresist material is used, and the light shielding film 16 is formed only through a photolithography process. Therefore, it is not necessary to form another photoresist pattern on the photoresist film 40 to be the light shielding film 16 and to etch the photoresist film 40 using this another photoresist pattern as a mask. That is, according to the present embodiment, the number of steps can be reduced as compared with the technique described in Patent Document 1.
更に、遮光膜１６は、非導電性の遮光材料を用いて形成され、非導電性を示す。したがって、遮光膜１６の電位を固定する必要がない。また、ベースコート膜１７を均一な厚みで形成することができる。 Further, the light shielding film 16 is formed using a non-conductive light shielding material and exhibits non-conductivity. Therefore, it is not necessary to fix the potential of the light shielding film 16. Further, the base coat film 17 can be formed with a uniform thickness.
遮光膜１６が導電性を有する場合は、ＴＦＴ３０が誤作動を起こしてしまう可能性がある。これは、遮光膜１６の電位変化に起因してＬＤＤ領域３５、３６がアクティブな状態になることがあるからである。したがって、この場合は、ベースコート膜１７のＬＤＤ対向部分（ＬＤＤ領域３５、３６に対向する部分）を部分的に厚く形成する必要がある。すなわち、ベースコート膜１７に特別な加工を施す必要があり、工程数が増加してしまう。 If the light shielding film 16 has conductivity, the TFT 30 may malfunction. This is because the LDD regions 35 and 36 may become active due to the potential change of the light shielding film 16. Therefore, in this case, it is necessary to partially thicken the LDD facing portion of the base coat film 17 (portion facing the LDD regions 35 and 36). That is, the base coat film 17 needs to be specially processed, and the number of steps increases.
なお、本実施形態において、フォトレジスト材料は、ネガ型であってもよい。この場合は、フォトマスク４１において、透光部４２、及び、遮光部４３のパターンを入れ替えればよい。 In the present embodiment, the photoresist material may be a negative type. In this case, in the photomask 41, the patterns of the light transmitting portion 42 and the light shielding portion 43 may be replaced.
（実施形態２）
図１４に示すように、本実施形態のアレイ基板２は、遮光膜１６の代わりに遮光膜２１６を備えることを除いて、実施形態１のアレイ基板１と同じである。
以下、アレイ基板２の製造工程について説明する。 (Embodiment 2)
As shown in FIG. 14, the array substrate 2 of this embodiment is the same as the array substrate 1 of Embodiment 1 except that a light shielding film 216 is provided instead of the light shielding film 16.
Hereinafter, the manufacturing process of the array substrate 2 will be described.
まず、基板１０上に、遮光膜２１６を形成する。より詳細には、以下の工程を行う。 First, the light shielding film 216 is formed on the substrate 10. More specifically, the following steps are performed.
始めに、インクジェット方式により、遮光材料、樹脂材料、及び、溶媒を含むレジスト材料（インク２４５）を基板１０上に塗布する。このとき、インク２４５は、図１５、１６に示すように、インクジェットヘッド２４６から吐出される。また、インク２４５は、遮光膜２１６が形成される領域のみに塗布される。 First, a resist material (ink 245) including a light shielding material, a resin material, and a solvent is applied onto the substrate 10 by an inkjet method. At this time, the ink 245 is ejected from the inkjet head 246 as shown in FIGS. The ink 245 is applied only to the region where the light shielding film 216 is formed.
その後、仮焼成工程を行い、図１７、１８に示すように、遮光性のレジストパターン２４７を形成する。 Thereafter, a temporary baking step is performed to form a light-shielding resist pattern 247 as shown in FIGS.
このように、本実施形態では、基板１０上に直接、遮光材料、及び、樹脂材料を含むレジストパターン２４７を描画する。 As described above, in this embodiment, the resist pattern 247 including the light shielding material and the resin material is drawn directly on the substrate 10.
また、レジストパターン２４７とともに、レジスト材料を用いてアライメントマーク（図示せず）を形成しておく。 In addition to the resist pattern 247, an alignment mark (not shown) is formed using a resist material.
レジスト材料は、非感光性の材料であり、レジストパターン２４７の膜厚は、０．５～１．５μｍである。 The resist material is a non-photosensitive material, and the film thickness of the resist pattern 247 is 0.5 to 1.5 μm.
遮光材料としては、実施形態１で説明した遮光材料を用いることができる。 As the light shielding material, the light shielding material described in Embodiment 1 can be used.
また、樹脂材料も、実施形態１で説明した樹脂材料を用いることができる。 Moreover, the resin material demonstrated in Embodiment 1 can also be used for the resin material.
次に、図１９、２０に示すように、４００～６００℃程度で０．５～１．５時間、焼成工程を行う。これは、実施形態１と同様に、レジストパターン２４７から樹脂材料を除去するためである。 Next, as shown in FIGS. 19 and 20, a baking process is performed at about 400 to 600 ° C. for 0.5 to 1.5 hours. This is because the resin material is removed from the resist pattern 247 as in the first embodiment.
焼成温度は、アレイ基板２の製造工程中の最も高い処理温度、樹脂材料の特性等の条件を考慮して決定される。また、焼成温度は、樹脂材料の耐熱温度よりも高く、かつ、遮光材料の耐熱温度よりも低く設定される。言い換えると、遮光材料は、この焼成工程の熱処理に耐え得る耐熱性を有する。 The firing temperature is determined in consideration of conditions such as the highest processing temperature during the manufacturing process of the array substrate 2 and the characteristics of the resin material. The firing temperature is set higher than the heat resistance temperature of the resin material and lower than the heat resistance temperature of the light shielding material. In other words, the light-shielding material has heat resistance that can withstand the heat treatment of this baking step.
また、焼成工程は、樹脂材料が除去されて、遮光材料が基板１０に密着するまで行われる。このように、遮光材料は、基板１０と密着可能な材料である。 Further, the baking process is performed until the resin material is removed and the light shielding material is in close contact with the substrate 10. Thus, the light shielding material is a material that can be in close contact with the substrate 10.
なお、焼成工程において除去される材料は、樹脂材料だけに限定されず、遮光材料を除く材料であればよい。 Note that the material to be removed in the firing step is not limited to the resin material, and may be any material excluding the light shielding material.
また、本実施形態では、樹脂材料は、露光されることなく分解、及び、除去される。したがって、樹脂材料を使用しないことも考えられる。しかしながら、レジストパターン２４７の形状を基板１０上で効果的に維持する観点から、レジスト材料は、樹脂材料を含んでいる。 In the present embodiment, the resin material is decomposed and removed without being exposed. Therefore, it is conceivable that no resin material is used. However, from the viewpoint of effectively maintaining the shape of the resist pattern 247 on the substrate 10, the resist material contains a resin material.
また、本実施形態では、仮焼成工程を省略し、焼成工程のみを行うことも考えられる。しかしながら、液体のインク２４５に急激に高温をかけると、塗布後のパターンが変形し、異常なパターンが形成されることが懸念される。したがって、本実施形態では、仮焼成工程を行うことによって、固体状のレジストパターン２４７を基板１０上に固定している。これにより、焼成工程において、異常なパターンが形成されるのを抑制することができる。 In the present embodiment, it is also conceivable to omit the temporary baking step and perform only the baking step. However, if the liquid ink 245 is rapidly heated, there is a concern that the pattern after application is deformed and an abnormal pattern is formed. Therefore, in the present embodiment, the solid resist pattern 247 is fixed on the substrate 10 by performing a temporary baking step. Thereby, it can suppress that an abnormal pattern is formed in a baking process.
焼成の結果、図２１、２２に示すように、基板１０上に遮光膜２１６が形成される。すなわち、レジストパターン２４７の残存成分が遮光膜２１６になる。したがって、遮光膜２１６は、遮光材料に由来する、粒子状の着色成分を主に含んでいる。他方、遮光膜２１６は、着色成分を保持するための成分（マトリクス成分、例えば樹脂成分）を含んでいない。しかしながら、着色成分は、基板１０に対する密着性を有するため、遮光膜２１６は、基板１０上に効果的に保持されている。ただし、遮光膜２１６は、樹脂材料の残渣（例えば、分解し切らずに残った物質）を含んでいてもよい。 As a result of the baking, a light shielding film 216 is formed on the substrate 10 as shown in FIGS. That is, the remaining component of the resist pattern 247 becomes the light shielding film 216. Therefore, the light shielding film 216 mainly contains a particulate colored component derived from the light shielding material. On the other hand, the light shielding film 216 does not include a component (matrix component, for example, a resin component) for holding the coloring component. However, since the coloring component has adhesion to the substrate 10, the light shielding film 216 is effectively held on the substrate 10. However, the light shielding film 216 may include a residue of a resin material (for example, a substance remaining without being completely decomposed).
これ以降、実施形態１と同じ工程を行う。すなわち、図２３に示すように、ＣＶＤ法を用いて、遮光膜２１６を有する基板１０上にベースコート膜１７を形成する。 Thereafter, the same steps as those in the first embodiment are performed. That is, as shown in FIG. 23, the base coat film 17 is formed on the substrate 10 having the light shielding film 216 by using the CVD method.
次に、図２３、２４に示すように、ＴＦＴ３０を形成する。 Next, as shown in FIGS. 23 and 24, the TFT 30 is formed.
その後、画素電極１４等の残りの部材を形成し、アレイ基板２が完成する。 Thereafter, the remaining members such as the pixel electrode 14 are formed, and the array substrate 2 is completed.
本実施形態においては、インクジェット方式を用いて、レジストパターン２４７が基板１０上に直接描画される。したがって、レジスト材料の感光性の有無にかかわらずレジストパターン２４７を効率的に形成することができる。また、レジスト材料に感光性を付与する必要がないのでコストを削減することができる。更に、レジスト材料の使用量を削減することができる。 In the present embodiment, the resist pattern 247 is directly drawn on the substrate 10 using an inkjet method. Therefore, the resist pattern 247 can be efficiently formed regardless of whether the resist material has photosensitivity. Further, since it is not necessary to impart photosensitivity to the resist material, the cost can be reduced. Furthermore, the amount of resist material used can be reduced.
なお、レジストパターン２４７の形成方法は特に限定されず、インクジェット方式の代わりに、インク２４５は、スクリーン印刷によって塗布されてもよい。 Note that a method for forming the resist pattern 247 is not particularly limited, and the ink 245 may be applied by screen printing instead of the inkjet method.
また、本実施形態においては、現像工程を行う必要がないので、工程数を削減することができる。 Further, in the present embodiment, since it is not necessary to perform a development process, the number of processes can be reduced.
これら以外は、本実施形態は、実施形態１と同じ効果を奏することができる。 Except for these, this embodiment can achieve the same effects as the first embodiment.
（実施形態３）
図２５に示すように、本実施形態のアレイ基板３は、遮光膜１６の代わりに遮光膜３１６を備えることを除いて、実施形態１のアレイ基板１と同じである。
以下、アレイ基板３の製造工程について説明する。 (Embodiment 3)
As shown in FIG. 25, the array substrate 3 of the present embodiment is the same as the array substrate 1 of Embodiment 1 except that a light shielding film 316 is provided instead of the light shielding film 16.
Hereinafter, the manufacturing process of the array substrate 3 will be described.
まず、基板１０上に、遮光膜３１６を形成する。より詳細には、以下の工程を行う。 First, a light shielding film 316 is formed on the substrate 10. More specifically, the following steps are performed.
始めに、インクジェット方式により、実施形態１と同じフォトレジスト材料（インク３４８）を基板１０上に塗布する。このとき、インク３４８は、図２６、２７に示すように、インクジェットヘッド３４６から吐出される。また、インク３４８は、遮光膜３１６が形成される領域と、その周辺領域とに塗布される。 First, the same photoresist material (ink 348) as that of the first embodiment is applied onto the substrate 10 by an inkjet method. At this time, the ink 348 is ejected from the inkjet head 346 as shown in FIGS. The ink 348 is applied to the region where the light shielding film 316 is formed and the peripheral region.
本実施形態と実施形態１では、フォトレジスト材料の塗布方法が異なる。したがって、フォトレジスト材料の粘度、表面張力等の物性は、本実施形態と実施形態１で異なっていてもよい。 The present embodiment and the first embodiment are different in the application method of the photoresist material. Therefore, physical properties such as viscosity and surface tension of the photoresist material may be different between the present embodiment and the first embodiment.
その後、仮焼成工程を行い、図２８、２９に示すように、遮光性のフォトレジストパターン３４９を形成する。フォトレジストパターン３４９は、高精細に形成される必要はなく、ラフなパターンでよい。 Thereafter, a preliminary baking step is performed to form a light-shielding photoresist pattern 349 as shown in FIGS. The photoresist pattern 349 does not need to be formed with high definition and may be a rough pattern.
このように、本実施形態では、基板１０上に直接、遮光材料、樹脂材料、及び、感光剤を含むフォトレジストパターン３４９を描画する。 As described above, in this embodiment, the photoresist pattern 349 including the light shielding material, the resin material, and the photosensitive agent is drawn directly on the substrate 10.
フォトレジストパターン３４９の膜厚は、０．５～１．５μｍである。 The film thickness of the photoresist pattern 349 is 0.5 to 1.5 μm.
次に、図３０、３１に示すように、フォトマスク３４１を介して、フォトレジストパターン３４９を露光する。フォトマスク３４１には、透光部３４２、及び、遮光部３４３が形成されている。フォトレジストパターン３４９には、電磁波（例えば、紫外線）が照射される。このときの露光量は、例えば、４０～２００ｍＪ／ｃｍ２（ただし、ユーザー仕様により変更可能）である。 Next, as shown in FIGS. 30 and 31, the photoresist pattern 349 is exposed through a photomask 341. In the photomask 341, a light-transmitting portion 342 and a light-shielding portion 343 are formed. The photoresist pattern 349 is irradiated with electromagnetic waves (for example, ultraviolet rays). The exposure amount at this time is, for example, 40 to 200 mJ / cm 2 (however, it can be changed according to user specifications).
本実施形態において使用可能な露光装置の種類は特に限定されず、例えば、ステッパ、ミラープロジェクション露光装置、プロキシミティ露光装置等が挙げられる。 The type of exposure apparatus that can be used in the present embodiment is not particularly limited, and examples include a stepper, a mirror projection exposure apparatus, and a proximity exposure apparatus.
また、電磁波の代わりに、電子線、又は、レーザーを照射してもよい。これにより、フォトマスクを利用することなく、フォトレジストパターン３４９を露光することができる。 Moreover, you may irradiate an electron beam or a laser instead of electromagnetic waves. Thereby, the photoresist pattern 349 can be exposed without using a photomask.
次に、水酸化カリウム水溶液等の現像液を用いて、露光されたフォトレジストパターン３４９を現像し、図３２、３３に示すように、微細なフォトレジストパターン３５０を形成する。 Next, the exposed photoresist pattern 349 is developed using a developer such as an aqueous potassium hydroxide solution to form a fine photoresist pattern 350 as shown in FIGS.
また、フォトレジストパターン３５０とともに、フォトフォトレジスト材料を用いてアライメントマーク（図示せず）を形成しておく。 Further, an alignment mark (not shown) is formed using a photoresist material together with the photoresist pattern 350.
次に、図３４、３５に示すように、４００～６００℃程度で０．５～１．５時間、焼成工程を行う。これは、実施形態１と同様に、フォトレジストパターン３５０から樹脂材料を除去するためである。 Next, as shown in FIGS. 34 and 35, a baking process is performed at about 400 to 600 ° C. for 0.5 to 1.5 hours. This is because the resin material is removed from the photoresist pattern 350 as in the first embodiment.
焼成温度は、アレイ基板３の製造工程中の最も高い処理温度、樹脂材料の特性等の条件を考慮して決定される。また、焼成温度は、樹脂材料の耐熱温度よりも高く、かつ、遮光材料の耐熱温度よりも低く設定される。言い換えると、遮光材料は、この焼成工程の熱処理に耐え得る耐熱性を有する。 The firing temperature is determined in consideration of conditions such as the highest processing temperature during the manufacturing process of the array substrate 3 and the characteristics of the resin material. The firing temperature is set higher than the heat resistance temperature of the resin material and lower than the heat resistance temperature of the light shielding material. In other words, the light-shielding material has heat resistance that can withstand the heat treatment of this baking step.
また、焼成工程は、樹脂材料が除去されて、遮光材料が基板１０に密着するまで行われる。このように、遮光材料は、基板１０と密着可能な材料である。 Further, the baking process is performed until the resin material is removed and the light shielding material is in close contact with the substrate 10. Thus, the light shielding material is a material that can be in close contact with the substrate 10.
なお、焼成工程において除去される材料は、樹脂材料だけに限定されず、遮光材料を除く材料であればよい。したがって、例えば、感光剤が分解、及び、除去されてもよい。 Note that the material to be removed in the firing step is not limited to the resin material, and may be any material excluding the light shielding material. Thus, for example, the photosensitizer may be decomposed and removed.
焼成の結果、図３６、３７に示すように、基板１０上に遮光膜３１６が形成される。すなわち、レジストパターン３５０の残存成分が遮光膜３１６になる。したがって、遮光膜３１６は、遮光材料に由来する、粒子状の着色成分を主に含んでいる。他方、遮光膜３１６は、着色成分を保持するための成分（マトリクス成分、例えば樹脂成分）を含んでいない。しかしながら、着色成分は、基板１０に対する密着性を有するため、遮光膜３１６は、基板１０上に効果的に保持されている。ただし、遮光膜３１６は、樹脂材料の残渣（例えば、分解し切らずに残った物質）を含んでいてもよい。 As a result of the baking, a light shielding film 316 is formed on the substrate 10 as shown in FIGS. That is, the remaining component of the resist pattern 350 becomes the light shielding film 316. Therefore, the light shielding film 316 mainly contains particulate colored components derived from the light shielding material. On the other hand, the light shielding film 316 does not include a component (matrix component, for example, a resin component) for holding a coloring component. However, since the coloring component has adhesion to the substrate 10, the light shielding film 316 is effectively held on the substrate 10. However, the light shielding film 316 may include a residue of a resin material (for example, a substance remaining without being completely decomposed).
これ以降、実施形態１と同じ工程を行う。すなわち、図３８に示すように、ＣＶＤ法を用いて、遮光膜３１６を有する基板１０上にベースコート膜１７を形成する。 Thereafter, the same steps as those in the first embodiment are performed. That is, as shown in FIG. 38, the base coat film 17 is formed on the substrate 10 having the light shielding film 316 by using the CVD method.
次に、図３８、３９に示すように、ＴＦＴ３０を形成する。 Next, as shown in FIGS. 38 and 39, the TFT 30 is formed.
その後、画素電極１４等の残りの部材を形成し、アレイ基板３が完成する。 Thereafter, the remaining members such as the pixel electrode 14 are formed, and the array substrate 3 is completed.
本実施形態においては、感光性材料であるフォトレジスト材料が用いられている。したがって、インクジェット方式によって微細なパターンを形成することが困難である場合も、ラフなフォトレジストパターン３４９に対して追加の工程（露光、及び、現像）を行い、微細なフォトレジストパターン３５０を最終的に形成することができる。 In the present embodiment, a photoresist material that is a photosensitive material is used. Therefore, even when it is difficult to form a fine pattern by the inkjet method, an additional process (exposure and development) is performed on the rough photoresist pattern 349, and the fine photoresist pattern 350 is finally formed. Can be formed.
また、インクジェット方式を用いることから、フォトレジスト材料の使用量を削減することができる。 In addition, since the ink jet method is used, the amount of the photoresist material used can be reduced.
なお、フォトレジストパターン３４９の形成方法は特に限定されず、インクジェット方式の代わりに、インク３４８は、スクリーン印刷によって塗布されてもよい。 Note that a method for forming the photoresist pattern 349 is not particularly limited, and the ink 348 may be applied by screen printing instead of the inkjet method.
これら以外は、本実施形態は、実施形態１と同じ効果を奏することができる。 Except for these, this embodiment can achieve the same effects as the first embodiment.
なお、本実施形態では、露光、及び、現像の工程が必要である。そのため、実施形態２と比較して、工程数は増加するが、より微細なパターンを形成することができる。 In the present embodiment, exposure and development processes are required. Therefore, although the number of processes is increased as compared with the second embodiment, a finer pattern can be formed.
また、本実施形態において、フォトレジスト材料は、ネガ型であってもよい。この場合は、フォトマスク３４１において、透光部３４２、及び、遮光部３４３のパターンを入れ替えればよい。 In the present embodiment, the photoresist material may be a negative type. In this case, in the photomask 341, the patterns of the light transmitting portion 342 and the light shielding portion 343 may be replaced.
また、実施形態１～３において、ＴＦＴ３０の構造は特に限定されず、例えば、スタガ型であってもよい。 In Embodiments 1 to 3, the structure of the TFT 30 is not particularly limited, and may be, for example, a staggered type.
更に、実施形態１～３において、半導体層３１の材料は特に限定されず、半導体層３１は、アモルファスシリコン等の非晶質半導体を含んでもよい。 Furthermore, in Embodiments 1 to 3, the material of the semiconductor layer 31 is not particularly limited, and the semiconductor layer 31 may include an amorphous semiconductor such as amorphous silicon.
本願は、２０１０年１０月１２日に出願された日本国特許出願２０１０－２２９４９４号を基礎として、パリ条約ないし移行する国における法規に基づく優先権を主張するものである。該出願の内容は、その全体が本願中に参照として組み込まれている。 This application claims priority based on the Paris Convention or the laws and regulations in the country of transition based on Japanese Patent Application No. 2010-229494 filed on October 12, 2010. The contents of the application are hereby incorporated by reference in their entirety.
１、２、３：アレイ基板
１０：絶縁基板
１１：ソースバスライン
１２：ゲートバスライン
１３：保持容量配線
１４：画素電極
１５：蓄積キャパシタ
１６、２１６、３１６：遮光膜
１７：ベースコート膜
１８、１９：配線
２０、２１：層間絶縁膜
３０：ＴＦＴ
３１：半導体層
３２：ゲート絶縁膜
３３：ゲート電極
３４：チャネル領域
３５、３６：ＬＤＤ領域
３７、３８：ソース・ドレイン領域
４０：フォトレジスト膜
４１、３４１：フォトマスク
４２、３４２：透光部
４３、３４３：遮光部
４４、３４９、３５０：フォトレジストパターン
２４５：レジスト材料（インク）
２４６、３４６：インクジェットヘッド
２４７：レジストパターン
３４８：フォトレジスト材料（インク） 1, 2, 3: Array substrate 10: Insulating substrate 11: Source bus line 12: Gate bus line 13: Retention capacitance wiring 14: Pixel electrode 15: Storage capacitor 16, 216, 316: Light shielding film 17: Base coat films 18, 19 : Wiring 20, 21: interlayer insulating film 30: TFT
31: Semiconductor layer 32: Gate insulating film 33: Gate electrode 34: Channel region 35, 36: LDD region 37, 38: Source / drain region 40: Photoresist film 41, 341: Photomask 42, 342: Translucent portion 43 343: light shielding portions 44, 349, 350: photoresist pattern 245: resist material (ink)
246, 346: inkjet head 247: resist pattern 348: photoresist material (ink)

Claims (8)

  1. （１）遮光膜を形成する工程と、
    （２）前記遮光膜に重畳するように半導体素子を形成する工程とを含むアレイ基板の製造方法であって、
    前記工程（１）は、基板上に、遮光材料、及び、樹脂材料を含むフォトレジスト膜を形成する工程と、
    前記フォトレジスト膜を露光する工程と、
    露光された前記フォトレジスト膜を現像してフォトレジストパターンを形成する工程と、
    加熱処理によって前記樹脂材料を前記フォトレジストパターンから除去する工程とを含むことを特徴とするアレイ基板の製造方法。     (1) forming a light shielding film;
    (2) A method of manufacturing an array substrate including a step of forming a semiconductor element so as to overlap the light shielding film,
    The step (1) includes forming a photoresist film containing a light shielding material and a resin material on a substrate;
    Exposing the photoresist film;
    Developing the exposed photoresist film to form a photoresist pattern; and
    And a step of removing the resin material from the photoresist pattern by heat treatment.
  2. 前記遮光材料は、非導電性の材料であることを特徴とする請求項１記載のアレイ基板の製造方法。 2. The method of manufacturing an array substrate according to claim 1, wherein the light shielding material is a non-conductive material.
  3. （１）遮光膜を形成する工程と、
    （２）前記遮光膜に重畳するように半導体素子を形成する工程とを含むアレイ基板の製造方法であって、
    前記工程（１）は、基板上に直接、遮光材料、及び、樹脂材料を含むパターンを描画する工程と、
    加熱処理によって前記樹脂材料を前記パターンから除去する工程とを含むことを特徴とするアレイ基板の製造方法。     (1) forming a light shielding film;
    (2) A method of manufacturing an array substrate including a step of forming a semiconductor element so as to overlap the light shielding film,
    The step (1) includes a step of drawing a pattern including a light shielding material and a resin material directly on the substrate;
    And a step of removing the resin material from the pattern by heat treatment.
  4. 前記遮光材料は、非導電性の材料であることを特徴とする請求項３記載のアレイ基板の製造方法。 4. The method of manufacturing an array substrate according to claim 3, wherein the light shielding material is a non-conductive material.
  5. （１）遮光膜を形成する工程と、
    （２）前記遮光膜に重畳するように半導体素子を形成する工程とを含むアレイ基板の製造方法であって、
    前記工程（１）は、基板上に直接、遮光材料、及び、樹脂材料を含む第一のフォトレジストパターンを描画する工程と、
    前記第一のフォトレジストパターンを露光する工程と、
    露光された前記第一のフォトレジストパターンを現像して第二のフォトレジストパターンを形成する工程と、
    加熱処理によって前記樹脂材料を前記第二のフォトレジストパターンから除去する工程とを含むことを特徴とするアレイ基板の製造方法。     (1) forming a light shielding film;
    (2) A method of manufacturing an array substrate including a step of forming a semiconductor element so as to overlap the light shielding film,
    The step (1) includes drawing a first photoresist pattern containing a light shielding material and a resin material directly on the substrate;
    Exposing the first photoresist pattern;
    Developing the exposed first photoresist pattern to form a second photoresist pattern; and
    And a step of removing the resin material from the second photoresist pattern by heat treatment.
  6. 前記遮光材料は、非導電性の材料であることを特徴とする請求項５記載のアレイ基板の製造方法。 6. The method of manufacturing an array substrate according to claim 5, wherein the light shielding material is a non-conductive material.
  7. 遮光膜と、前記遮光膜に重畳するように形成された半導体素子とを備えるアレイ基板であって、
    前記遮光膜は、粒子状の着色成分を含み、前記着色成分を保持するための成分を含まないことを特徴とするアレイ基板。     An array substrate comprising a light shielding film and a semiconductor element formed to overlap the light shielding film,
    The array substrate according to claim 1, wherein the light shielding film includes a particulate colored component and does not include a component for holding the colored component.
  8. 前記着色成分は、非導電性の成分であることを特徴とする請求項７記載のアレイ基板。 The array substrate according to claim 7, wherein the coloring component is a non-conductive component.
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WO2016101402A1 (en) * 2014-12-26 2016-06-30 深圳市华星光电技术有限公司 Low-temperature polysilicon thin film transistor and manufacturing method therefor
CN107634070A (en) * 2017-09-15 2018-01-26 京东方科技集团股份有限公司 Manufacture method, array base palte and the display device of array base palte
CN105206564B (en) * 2015-08-25 2019-01-15 武汉华星光电技术有限公司 A kind of production method and array substrate of light shield layer

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