WO2012026157A1 - Filter and duplexer - Google Patents

Filter and duplexer Download PDF

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Publication number
WO2012026157A1
WO2012026157A1 PCT/JP2011/058925 JP2011058925W WO2012026157A1 WO 2012026157 A1 WO2012026157 A1 WO 2012026157A1 JP 2011058925 W JP2011058925 W JP 2011058925W WO 2012026157 A1 WO2012026157 A1 WO 2012026157A1
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Prior art keywords
parallel
resonator
filter
inductor
capacitor
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PCT/JP2011/058925
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French (fr)
Japanese (ja)
Inventor
原基揚
井上将吾
岩城匡郁
堤潤
中村浩
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太陽誘電株式会社
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Publication of WO2012026157A1 publication Critical patent/WO2012026157A1/en

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/46Filters
    • H03H9/54Filters comprising resonators of piezo-electric or electrostrictive material
    • H03H9/542Filters comprising resonators of piezo-electric or electrostrictive material including passive elements
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02Details
    • H03H9/05Holders; Supports
    • H03H9/0538Constructional combinations of supports or holders with electromechanical or other electronic elements
    • H03H9/0566Constructional combinations of supports or holders with electromechanical or other electronic elements for duplexers
    • H03H9/0571Constructional combinations of supports or holders with electromechanical or other electronic elements for duplexers including bulk acoustic wave [BAW] devices
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02Details
    • H03H9/05Holders; Supports
    • H03H9/0538Constructional combinations of supports or holders with electromechanical or other electronic elements
    • H03H9/0566Constructional combinations of supports or holders with electromechanical or other electronic elements for duplexers
    • H03H9/0576Constructional combinations of supports or holders with electromechanical or other electronic elements for duplexers including surface acoustic wave [SAW] devices
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02Details
    • H03H9/05Holders; Supports
    • H03H9/10Mounting in enclosures
    • H03H9/1064Mounting in enclosures for surface acoustic wave [SAW] devices
    • H03H9/1085Mounting in enclosures for surface acoustic wave [SAW] devices the enclosure being defined by a non-uniform sealing mass covering the non-active sides of the BAW device
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/02Details
    • H03H9/125Driving means, e.g. electrodes, coils
    • H03H9/13Driving means, e.g. electrodes, coils for networks consisting of piezoelectric or electrostrictive materials
    • H03H9/132Driving means, e.g. electrodes, coils for networks consisting of piezoelectric or electrostrictive materials characterized by a particular shape
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/46Filters
    • H03H9/54Filters comprising resonators of piezo-electric or electrostrictive material
    • H03H9/58Multiple crystal filters
    • H03H9/60Electric coupling means therefor
    • H03H9/605Electric coupling means therefor consisting of a ladder configuration
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/46Filters
    • H03H9/64Filters using surface acoustic waves
    • H03H9/6423Means for obtaining a particular transfer characteristic
    • H03H9/6433Coupled resonator filters
    • H03H9/6483Ladder SAW filters
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/70Multiple-port networks for connecting several sources or loads, working on different frequencies or frequency bands, to a common load or source
    • H03H9/703Networks using bulk acoustic wave devices
    • H03H9/706Duplexers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/70Multiple-port networks for connecting several sources or loads, working on different frequencies or frequency bands, to a common load or source
    • H03H9/72Networks using surface acoustic waves
    • H03H9/725Duplexers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/15Constructional features of resonators consisting of piezoelectric or electrostrictive material
    • H03H9/17Constructional features of resonators consisting of piezoelectric or electrostrictive material having a single resonator
    • H03H9/171Constructional features of resonators consisting of piezoelectric or electrostrictive material having a single resonator implemented with thin-film techniques, i.e. of the film bulk acoustic resonator [FBAR] type
    • H03H9/172Means for mounting on a substrate, i.e. means constituting the material interface confining the waves to a volume
    • H03H9/173Air-gaps
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/15Constructional features of resonators consisting of piezoelectric or electrostrictive material
    • H03H9/17Constructional features of resonators consisting of piezoelectric or electrostrictive material having a single resonator
    • H03H9/171Constructional features of resonators consisting of piezoelectric or electrostrictive material having a single resonator implemented with thin-film techniques, i.e. of the film bulk acoustic resonator [FBAR] type
    • H03H9/172Means for mounting on a substrate, i.e. means constituting the material interface confining the waves to a volume
    • H03H9/174Membranes
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03HIMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H9/00Networks comprising electromechanical or electro-acoustic devices; Electromechanical resonators
    • H03H9/15Constructional features of resonators consisting of piezoelectric or electrostrictive material
    • H03H9/17Constructional features of resonators consisting of piezoelectric or electrostrictive material having a single resonator
    • H03H9/171Constructional features of resonators consisting of piezoelectric or electrostrictive material having a single resonator implemented with thin-film techniques, i.e. of the film bulk acoustic resonator [FBAR] type
    • H03H9/172Means for mounting on a substrate, i.e. means constituting the material interface confining the waves to a volume
    • H03H9/175Acoustic mirrors

Definitions

  • the present invention relates to a filter and a duplexer.
  • the filter includes harmonics (second harmonic, third harmonic, etc.), wireless LAN (Local Area Network), and a local area network, which are located on the higher frequency side than the passband in order to suppress cross modulation and interference. High suppression is required in the frequency band used by Bluetooth (registered trademark).
  • Patent Document 1 and Patent Document 2 disclose an invention in which an inductor and a capacitor are connected to a parallel arm of a ladder type filter to increase attenuation on the high frequency side from the pass band.
  • an object of the present invention is to provide a filter and a duplexer that can form an attenuation pole at a high frequency and can be miniaturized.
  • the present invention includes a series resonator, a parallel resonator formed on the substrate and connected in parallel to the series resonator, an inductor connected in series to the parallel resonator, and the inductor formed on the substrate. And a capacitor formed on the substrate and connected to the parallel resonator and the capacitor.
  • the inductor is connected in series to a plurality of the parallel resonators, and the capacitor is connected in parallel to a first inductor among the plurality of inductors.
  • the capacitor, the first inductor, and the first inductor The attenuation pole formed by the parallel resonator connected in series with the inductor is lower in frequency than the attenuation pole formed by the inductor other than the first inductor and the parallel resonator connected in series with the inductor other than the first inductor. It can be set as the structure located in the side. According to this configuration, the filter can be more effectively downsized.
  • the attenuation pole formed by the first parallel arm may be positioned on the lower frequency side than the attenuation pole formed by each of the plurality of second parallel arms. According to this configuration, the filter can be downsized and the pass characteristic of the filter can be improved.
  • the attenuation pole formed by the first parallel arm may be positioned on a higher frequency side than the pass band of the filter. According to this configuration, the filter can be downsized and the pass characteristic of the filter can be improved.
  • the attenuation pole formed by the second parallel arm is located in a frequency band corresponding to a second harmonic of the pass band of the filter, and the attenuation pole formed by the first parallel arm is passed through the filter. It can be set as the structure located in the frequency band between a band and the frequency band equivalent to the 2nd harmonic of the said pass band. According to this configuration, the filter can be downsized and the pass characteristic of the filter can be improved.
  • the pass band of the filter is a transmission frequency band of a mobile phone
  • the attenuation pole formed by the first parallel arm is located in a use frequency band of Bluetooth or a use frequency band of a wireless LAN.
  • the chip includes the series resonator, the parallel resonator, the capacitor, and the wiring on the substrate, and a package substrate on which the chip is mounted, and the inductor is provided on the package substrate. It can be set as the structure currently provided. According to this configuration, the filter can be reduced in size.
  • the series resonator and the parallel resonator are acoustic wave resonators having opposing comb-shaped electrodes
  • the capacitor is made of the same metal layer as the comb-shaped electrodes included in the acoustic wave resonator, and has electrode fingers. It can be set as the structure provided with the comb-shaped electrode from which pitch differs. According to this configuration, the process can be simplified. In addition, the capacitor can be formed with high accuracy. Furthermore, the capacitance value of the capacitance can be easily adjusted.
  • the series resonator and the parallel resonator are acoustic wave resonators having opposing comb-shaped electrodes
  • the capacitor is made of the same metal layer as the comb-shaped electrode included in the acoustic wave resonator, and has an acoustic wave It can be set as the structure provided with the comb-shaped electrode from which the propagation direction of this differs. According to this configuration, the process can be simplified. In addition, the capacitor can be formed with high accuracy. Furthermore, the capacitance value of the capacitance can be easily adjusted.
  • the wiring may include a region having the same width as that of the comb electrode included in the capacitor or a region having a width larger than the width of the comb electrode. According to this configuration, the inductance component of the wiring can be reduced.
  • the series resonator and the parallel resonator are piezoelectric thin film resonators, and the capacitor includes a lower electrode provided in the piezoelectric thin film resonator and an electrode made of the same metal layer as each of the upper electrode; can do.
  • the process can be simplified.
  • the capacitor can be formed with high accuracy. Furthermore, the capacitance value of the capacitance can be easily adjusted.
  • the present invention includes a series resonator formed on a substrate, a parallel resonator formed on the substrate and connected in parallel to the series resonator, an inductor connected in series to the parallel resonator, and the substrate
  • the filter may be a transmission filter. According to this configuration, the characteristics of the duplexer can be improved. Further, interference between the reception signal and the transmission signal can be suppressed.
  • the present invention it is possible to provide a filter and duplexer that can form an attenuation pole at a high frequency and can be miniaturized.
  • FIG. 1A is a configuration diagram of a series resonator
  • FIG. 1B is a configuration diagram of a parallel resonator
  • FIG. 1C is a diagram illustrating pass characteristics of the series resonator and the series resonator. is there.
  • FIG. 2A is a configuration diagram of a one-stage ladder filter
  • FIG. 2B is a diagram illustrating pass characteristics of the one-stage ladder filter.
  • 3A and 3B are configuration diagrams of a multistage ladder filter.
  • FIG. 4A is a configuration diagram of a ladder type filter that forms an attenuation pole on the high frequency side
  • FIG. 4B is a diagram showing attenuation characteristics of the ladder type filter that forms an attenuation pole on the high frequency side.
  • FIG. 4A is a configuration diagram of a ladder type filter that forms an attenuation pole on the high frequency side
  • FIG. 4B is a diagram showing attenuation characteristics of the ladder type filter that forms an attenuation pole on the
  • FIG. 5A is a configuration diagram of a ladder type filter that forms an attenuation pole in a harmonic
  • FIG. 5B is a diagram showing attenuation characteristics of the ladder type filter that forms an attenuation pole in a harmonic
  • FIG. 6A is a configuration diagram of a ladder type filter to which a capacitor is added
  • FIG. 6B is a diagram illustrating attenuation characteristics of the ladder type filter to which a capacitor is added
  • FIG. 7A is a diagram showing the relationship between the capacitance value and the inductance value
  • FIG. 7B is a diagram showing the attenuation characteristic of the ladder filter with the inductance value changed.
  • Fig.8 (a) and FIG.8 (b) are block diagrams of the parallel arm of a ladder type filter.
  • FIGS. 9A and 9B are configuration diagrams of parallel arms of a ladder type filter, and FIG. 9C is a diagram illustrating impedance of the parallel arms.
  • FIG. 10 is a diagram illustrating the impedance of the parallel arms.
  • FIG. 11A is a block diagram illustrating a duplexer, and FIG. 11B is a block diagram illustrating a radio frequency (RF) module of a mobile phone.
  • FIG. 12A is a plan view illustrating the duplexer according to the first embodiment, and FIG. 12B is a cross-sectional view illustrating the duplexer according to the first embodiment.
  • FIG. 13 is a plan view illustrating a transmission filter chip included in the duplexer according to the first embodiment.
  • FIG. 14C are plan views illustrating the package substrate included in the duplexer according to the third embodiment.
  • FIG. 15 is a plan view illustrating a transmission filter chip provided in a duplexer according to a modification of the first embodiment.
  • FIG. 16A is a plan view illustrating a piezoelectric thin film resonator
  • FIG. 16B is a cross-sectional view illustrating a piezoelectric thin film resonator.
  • FIG. 17A to FIG. 17C are cross-sectional views illustrating a piezoelectric thin film resonator.
  • FIG. 18 is a plan view illustrating a transmission filter chip included in the duplexer according to the second embodiment.
  • FIG. 19 is a plan view illustrating a transmission filter chip included in a duplexer according to a modification of the second embodiment.
  • FIG. 1A is a configuration diagram of a series resonator
  • FIG. 1B is a configuration diagram of a parallel resonator
  • FIG. 1C is a diagram illustrating pass characteristics of the series resonator and the series resonator. is there.
  • the series resonator has one of its two signal terminals as an input terminal In and the other as an output terminal Out. It is.
  • the parallel resonator has one of the two signal terminals connected to the ground terminal and the other connected to the input terminal In. This is connected to the short-circuit line of the output terminal Out.
  • the horizontal axis represents frequency
  • the vertical axis represents passage amount.
  • the pass characteristic of the series resonator is indicated by a solid line
  • the pass characteristic of the parallel resonator is indicated by a broken line.
  • pass characteristics of the series resonator comprises a single resonance point (resonance frequency) f rs and one antiresonance point and (antiresonance frequency) f the as. Amount passing at the resonance point f rs is maximized, the amount passed in the antiresonance point f as is minimized.
  • the pass characteristic of the parallel resonator has one resonance point f rp and one anti-resonance point f ap . The passing amount is minimized at the resonance point f rp , and the passing amount is maximized at the anti-resonance point f ap .
  • FIG. 2 (a) is a configuration diagram of a one-stage ladder type filter
  • FIG. 2 (b) is a diagram showing pass characteristics of the one-stage ladder type filter.
  • the series resonator S22 is connected as a series resonator in series with the input terminal In and the output terminal Out, and the parallel resonator P22 is connected as a parallel resonator between the output terminal Out and the ground.
  • the resonance point f rs of the series resonator and the anti-resonance point f ap of the parallel resonator are designed so as to substantially coincide.
  • the horizontal axis indicates the frequency
  • the vertical axis indicates the passing amount.
  • the frequency band from the resonance point f rp of the parallel resonator to the anti-resonance point f as of the series resonator is a pass band, and the frequency is equal to or lower than the resonance point f rp of the parallel resonator and the anti-resonance point f as of the series resonator.
  • the band becomes the attenuation range.
  • the ladder type filter functions as a bandpass filter.
  • 3A and 3B are configuration diagrams of a multistage ladder filter.
  • the horizontal axis represents frequency and the vertical axis represents attenuation.
  • the ladder filter F10 includes series resonators S1, S2a, S2b and S3, and parallel resonators P1a, P1b, P2a and P2b.
  • Series resonators S1, S2a, S2b, and S3 are connected in series between the input terminal In and the output terminal Out.
  • the series resonator S1 is connected to the input terminal In.
  • the series resonator S4 is connected to the output terminal Out.
  • a parallel resonator P1a and a parallel resonator P1b are connected in parallel between the series resonator S1 and the series resonator S2a.
  • a parallel resonator P2a and a parallel resonator P2b are connected in parallel between the series resonator 2b and the series resonator 3, respectively.
  • the parallel resonators P1a, P1b, P2a and P2b are connected to the ground terminal.
  • the multi-stage ladder filter F10 is configured by connecting a plurality of single-stage ladder filters.
  • the 1-stage ladder is connected in the form of inverting the filter.
  • the series resonators S2a and S2b may be used as one series resonator S2 in order to reduce the size of the filter.
  • the parallel resonators P1a and P1b may be one parallel resonator P1
  • the parallel resonators P2a and P2b may be one parallel resonator P2. That is, the configuration surrounded by the dotted line in FIG. As will be described later, the series resonator and the parallel resonator function as a capacitor.
  • the capacitance value of the series resonator S2 is equal to the combined capacitance value of the series resonators S2a and S2b when the series resonator S2a and the series resonator S2b are connected in series.
  • the capacitance value of the parallel resonator P2 is equal to the combined capacitance value of the parallel resonators P2a and P2b when the parallel resonator P2a and the parallel resonator P2b are connected in parallel.
  • FIG. 4A is a configuration diagram of a ladder type filter that forms an attenuation pole on the high frequency side
  • FIG. 4B is a diagram showing attenuation characteristics of the ladder type filter that forms an attenuation pole on the high frequency side.
  • an inductor L1 is connected in series to the parallel resonator P1, and an inductor L2 is connected in series to the parallel resonator P2.
  • One end of the inductor L1 is connected to the parallel resonator P1, and the other end is connected to the ground terminal.
  • One end of the inductor L2 is connected to the parallel resonator P2, and the other end is connected to the ground terminal.
  • the resonator functions as a capacitor outside the passband. For this reason, the parallel resonator P1 and the inductor L1, and the parallel resonator P2 and the inductor L2 each function as an LC resonance circuit.
  • Equation 1 the resonance frequency of the LC resonance circuit in parallel with the resonator P1 and the inductor L1 is formed is represented by Equation 1.
  • the resonance frequency of the LC resonance circuit formed by the parallel resonator P2 and the inductor L2 is also expressed by the same expression as Expression 1.
  • Attenuation poles are formed at the frequencies f 1 and f 2 .
  • the ladder type filter F11 two parallel arms are used.
  • an attenuation pole can be added by adding parallel arms and connecting an inductor.
  • the frequency at which the attenuation pole appears can be adjusted by adjusting the capacitance value of the parallel resonator and the inductance value of the inductor.
  • the frequencies f 1 and f 2 are included in each of a frequency band (Tx second harmonic) corresponding to the second harmonic of the pass band of the filter and a frequency band (Tx third harmonic) corresponding to the third harmonic. Also good.
  • attenuation poles can be formed in harmonics such as Tx second harmonic and Tx third harmonic.
  • FIG. 5A is a configuration diagram of a ladder type filter that forms an attenuation pole in the harmonic
  • FIG. 5B is a diagram showing attenuation characteristics of the ladder type filter that forms an attenuation pole in the harmonic.
  • FIG. 5B shows the result of calculating the attenuation characteristics of the ladder filter F12.
  • the ladder filter F12 is obtained by adding a series resonator S4, parallel resonators P3 and P4, and an inductor L3 to the ladder filter F11.
  • the parallel resonators P2 and P3 are respectively connected in series to the inductor L2.
  • the parallel resonator P4 is connected in series with the inductor L3. That is, the ladder type filter F12 has three parallel arms, and each parallel arm functions as an LC resonance circuit.
  • the conditions used for calculating the attenuation characteristics will be described.
  • the ladder type filter F12 is used as a transmission filter of a duplexer.
  • the ladder filter F12 is a W-CDMA (Wideband Code Division Multiple Access) Band 2 transmission filter having the following specifications.
  • the ladder type filter F12 has attenuation poles formed in frequency bands corresponding to the Tx second harmonic and the Tx third harmonic.
  • attenuation poles were formed in 2400 to 2500 MHz, which is a use band of wireless LAN and Bluetooth (hereinafter “BT / LAN”).
  • Table 1 summarizes the inductance values L 1 to L 3 of the inductors L1 to L3 and the frequency band in which the attenuation pole is formed in the ladder filter F12.
  • the inductance value L 1 of the inductor L1 corresponding to the attenuation pole of Tx3 harmonic is 0.355NH.
  • the inductance value L2 of the inductor L2 corresponding to the attenuation pole of the Tx second harmonic is 0.182 nH.
  • Inductance value L 3 of the inductor L3 which corresponds to the attenuation pole of the BT / LAN is 4.15NH.
  • the resonance frequency of the LC resonance circuit decreases as the inductance value increases.
  • the inductance L3 contributes to the formation of the attenuation pole in the BT / LAN.
  • Tx2 is a frequency band lower than Tx3
  • the inductor L2 has an inductance value smaller than the inductance L1. This is because the parallel resonators P2 and P3 to which the inductor L2 is connected are connected in parallel.
  • the inductor L3 has a very large inductance value of 4.15 nH. For this reason, an external chip inductor may be used as the inductor L3, and it may be difficult to form the inductor L3 in the same chip or in the same package as other inductors and resonators. As a result, it is difficult to reduce the size and height of the filter. In addition, it is difficult to reduce the size and height of a duplexer that uses a filter as a component.
  • FIG. 6A is a configuration diagram of a ladder type filter to which a capacitor is added
  • FIG. 6B is a diagram illustrating attenuation characteristics of the ladder type filter to which a capacitor is added.
  • the ladder filter F13 includes a capacitor C1.
  • the capacitor C1 is connected in parallel to the inductor L3 (first inductor).
  • a parallel arm including the parallel resonator P1 and the inductor L1 is defined as a parallel arm Pa.
  • a parallel arm including the parallel resonator P2 and the inductor L2 and a parallel arm including the parallel resonator P3 and the inductor L2 are combined to form a parallel arm Pb.
  • a parallel arm including the parallel resonator P4, the inductor L3, and the capacitor C1 is defined as a parallel arm Pc (first parallel arm).
  • the ladder filter F13 is a filter that forms an attenuation pole in the same band as the ladder filter F12. As described later in FIG. 6 (b), by parallel connection of a capacitor C1, an inductance value L 3 of the inductor L3 can be greatly reduced.
  • the attenuation characteristic of the ladder type filter F12 and the attenuation characteristic of the ladder type filter F13 are overlapped.
  • the attenuation characteristic of the ladder type filter F12 is illustrated by a dotted line, and the attenuation characteristic of the ladder type filter F13 is illustrated by a solid line.
  • the calculation parameters of the ladder filter F12 are the same as those used in the calculation of FIG.
  • the calculation parameters of the ladder type filter F13 are the same as the calculation parameters of the ladder type filter F12 except those relating to the next inductor L3 and capacitor C1.
  • Capacitance value C 1 of capacitor C 1 1.07 pF This connects the capacitors C1, as FIG. 5 (b) and the attenuation pole in the same frequency band are formed, to adjust the inductance value L 3 of the inductor L3.
  • the attenuation characteristics of the ladder type filter F12 and the ladder type filter F13 include attenuation poles in frequency bands corresponding to BT / LAN, Tx second harmonic, and Tx third harmonic, respectively. Been formed. That is, the attenuation pole formed by the parallel arm Pc (first parallel arm) having the capacitor C1, the inductor L3, and the parallel resonator P4 is formed by each of the other parallel arms Pa and Pb (second parallel arm). It is located on the lower frequency side than the attenuation pole. The attenuation pole formed by the parallel arm Pc is located on the higher frequency side than the pass band of the filter.
  • the attenuation pole formed by the parallel arm Pa is located at the Tx third harmonic, and the attenuation pole formed by the parallel arm Pb is located at the Tx second harmonic, as in the case of the ladder filter F12. That is, the attenuation pole formed by the parallel arm Pc is located between the passband of the filter and the Tx second harmonic.
  • Table 2 summarizes the inductance values L 1 to L 3 and the capacitance value C 1 in the ladder filter F13.
  • Table 2 summarizes the inductance values L 1 to L 3 and the capacitance value C 1 in the ladder filter F13.
  • the ladder type filter F13 has a larger attenuation amount on the higher frequency side than the frequency band of the Tx second harmonic compared with the ladder type filter F12. Further, the increase in attenuation was more remarkable in the high frequency band.
  • FIG. 7A is a diagram showing the relationship between the capacitance value and the inductance value
  • FIG. 7B is a diagram showing the attenuation characteristic of the ladder filter with the inductance value changed.
  • the horizontal axis represents the capacitance value C 1 of the capacitor C1
  • the vertical axis represents the inductance value L 3 of the inductor L3.
  • the ladder-type filter F13 is the same frequency band as the ladder-type filter F12 (BT / LAN, Tx2 Attenuation poles could be formed at the harmonic and Tx triple).
  • the inductance value L 3 of the inductor L3 is reduced, due to the capacitance value C 1 of capacitor C1 is increased in other words, the attenuation of a high frequency band is larger than Tx2 harmonic, characteristics were improved .
  • FIG. 8 (a) and FIG.8 (b) are block diagrams of the parallel arm of a ladder type filter.
  • FIG. 8A shows the right side parallel arm of the ladder filter F12
  • FIG. 8B shows the right side parallel arm Pc of the ladder filter F13.
  • the inductor value of the inductor L3 is L 3 in the case of FIG. 8A and L 3a in the case of FIG.
  • the parallel arm as shown in FIG. 8A functions as an LC resonance circuit as described above.
  • the resonance frequency f 3 is expressed by Equation 2.
  • the parallel arm Pc shown in FIG. 8B also functions as an LC resonance circuit.
  • the resonance frequency f 4 is expressed by the following equation 3.
  • Formula 2 Formula 3
  • the inductance value L 3a is expressed by the following mathematical formula 4. From Equation 4, by the addition of the capacitor C1, an inductance value L 3a is can be seen that less than L 3.
  • FIGS. 9A and 9B are configuration diagrams of parallel arms of a ladder type filter
  • FIG. 9C is a diagram illustrating impedance of the parallel arms.
  • the parallel arm shown in each of FIGS. 9A and 9B is described.
  • the parallel arm shown in FIG. 9 (a) and the parallel arm shown in FIG. 9 (b) are obtained by connecting an inductor L4 in series to the parallel arm Pc shown in FIG. 8 (b).
  • the inductor L4 is connected in series between the parallel resonator P4 and the inductor L3.
  • the inductor L4 and the capacitor C1 are connected in parallel with the inductor L3.
  • the inductor L4 is connected in series with the capacitor C1.
  • the horizontal axis represents the frequency
  • the vertical axis represents the impedance of the parallel arm.
  • the impedance becomes zero at the frequencies f z1 and f z2 .
  • the impedance represents the ultimate in frequency f p.
  • An attenuation pole is formed at each of the frequencies f z1 and f z2 at which the impedance becomes zero. That is, a plurality of attenuation poles can be formed by the configurations of FIGS. 9A and 9B.
  • the impedance increases and has a positive value.
  • the impedance of the parallel arms increases, it becomes difficult for signals to flow through the parallel arms. In other words, the attenuation characteristics of the filter deteriorate due to an increase in impedance of the parallel arms.
  • FIG. 10 is a diagram illustrating the impedance of the parallel arms.
  • the impedance gradually approaches zero. As the impedance approaches zero, signals easily flow through the parallel arms. That is, the suppression of the filter is improved at a high frequency.
  • the change in impedance also appears in the attenuation characteristic shown in FIG. 6B described above, where the improvement in the characteristic becomes more remarkable as the frequency becomes higher.
  • Example 1 is an example using an acoustic wave resonator.
  • Example 1 is an example using an acoustic wave resonator.
  • FIG. 11A is a block diagram illustrating a duplexer
  • FIG. 11B is a block diagram illustrating a radio frequency (RF) module of a mobile phone.
  • RF radio frequency
  • the duplexer 100 includes a reception filter 100a and a transmission filter 100b.
  • the reception filter 100a and the transmission filter 100b are connected to a common terminal (antenna terminal) 102 in common.
  • the common terminal 102 is connected to the antenna 104.
  • the reception filter 100a receives a signal from the antenna 104 and outputs the received signal to, for example, an amplifier.
  • the transmission filter 100b outputs a signal input from an amplifier or the like to the antenna 104.
  • the antenna 104 transmits a signal. The configuration of the filter will be described later.
  • the RF module 110 includes an antenna 104, an antenna switch 112, a duplexer bank 114, and an amplifier module 116.
  • the RF module 110 supports a plurality of communication systems such as a GSM (Global System for Mobile Communication) communication system and a W-CDMA communication system.
  • the GSM system corresponds to the 850 MHz band (GSM850), 900 MHz band (GSM900), 1800 MHz band (GSM1800), and 1900 MHz band (GSM1900).
  • the antenna 104 can transmit and receive both GSM and W-CDMA transmission / reception signals.
  • the duplexer bank 114 includes a plurality of duplexers 114a, 114b, and 114c.
  • Each of the plurality of duplexers is a duplexer corresponding to each of a plurality of communication methods.
  • the duplexer bank 114 may include two duplexers or four or more duplexers.
  • the antenna switch 112 selects a duplexer corresponding to the communication method from a plurality of duplexers provided in the duplexer bank 114 according to the communication method of signals to be transmitted and received, and connects the selected duplexer and the antenna 104.
  • Each duplexer is connected to an amplifier module 116.
  • the amplifier module 116 amplifies the signal received by the reception filter of the duplexer and outputs the amplified signal to the processing unit.
  • the amplifier module 116 amplifies the signal generated by the processing unit and outputs the amplified signal to the duplexer transmission filter.
  • FIG. 12A is a plan view illustrating the duplexer according to the first embodiment
  • FIG. 12B is a cross-sectional view illustrating the duplexer according to the first embodiment.
  • FIG. 12B is a cross-sectional view along AA1 in FIG.
  • the duplexer 100 includes a reception filter chip 100c, a transmission filter chip 100d, a package substrate 120, and a sealing unit 122.
  • the sealing portion 122 is seen through.
  • the reception filter chip 100 c and the transmission filter chip 100 d are flip-chip mounted on the package substrate 120 with bumps 124.
  • the package substrate 120 is made of an insulator such as ceramic.
  • the package substrate 120 is a substrate having a two-layer structure including a first layer 120-1 and a second layer 120-2 below the first layer 120-1.
  • wiring layers 120 a, 120 b, and 120 c are formed on the upper surface, intermediate layer, and lower surface of the package substrate 120, respectively, and the wiring layers are connected by via wirings 26.
  • the wiring layer 120b is located between the first layer 120-1 and the second layer 120-2.
  • Part of the wiring provided on the package substrate 120 functions as the inductors L1 to L3. That is, the reception filter chip 100c and the transmission filter chip 100d are mounted on the package substrate 120, thereby realizing a reception filter and a transmission filter.
  • the sealing unit 122 is made of, for example, an insulator such as epoxy resin, or solder, and seals the reception filter chip 100c and the transmission filter chip 100d.
  • the bumps 124 are made of a metal such as gold (Au).
  • FIG. 13 is a plan view illustrating a transmission filter chip included in the duplexer according to the first embodiment.
  • An example filter chip is described as a transmission filter chip 100d.
  • the transmission filter chip 100d includes series resonators S1 to S4, parallel resonators P1 to P4, and a capacitor C1 each including a surface acoustic wave resonator including a comb-shaped electrode.
  • the configuration of the surface acoustic wave resonator will be described taking the series resonator S1 as an example.
  • the series resonator S ⁇ b> 1 is configured by disposing a pair of opposing comb electrodes 12 on the piezoelectric substrate 10, and disposing reflectors 14 on both sides of the comb electrode 12.
  • the comb electrode 12 excites an elastic wave having a frequency corresponding to the pitch of the electrode fingers.
  • the reflector 14 reflects the elastic wave propagating from the comb electrode 12.
  • the series resonators S2 to S4 and the parallel resonators P1 to P4 have the same configuration.
  • the surface acoustic wave propagation directions of the surface acoustic wave resonators are the same.
  • Capacitor C1 includes comb electrodes made of the same metal layer as the comb electrodes included in each of series resonators S1 to S4 and parallel resonators P1 to P4.
  • the electrode finger pitch of the comb-shaped electrodes forming the capacitor C1 is different from the electrode finger pitch of the comb-shaped electrodes included in each of the series resonators S1 to S4 and the parallel resonators P1 to P4. That is, the capacitor C1 is designed so that the resonance frequency of the capacitor C1 is outside the pass band of the transmission filter. For this reason, the surface acoustic wave is hardly excited in the capacitor C1, and the influence on the filter characteristics is suppressed.
  • the capacitor C1 does not need to include a reflector, but preferably includes a reflector in order to improve the Q value.
  • the capacitance value of the capacitor C1 can be adjusted by changing the electrode finger pitch or the electrode finger crossing width.
  • the comb electrodes constituting the series resonator S1 are connected to the antenna terminal Ant1.
  • the antenna terminal Ant1 is connected to the antenna 104 shown in FIG.
  • the comb electrode included in the series resonator S4 is connected to the transmission terminal Tx1.
  • the transmission terminal Tx1 is connected to the amplifier module 116 shown in FIG. 10B, for example, and receives a transmission signal.
  • the comb electrode provided in the parallel resonator P1 is connected to the terminal 16a.
  • the terminal 16a is connected to the inductor L1.
  • the comb electrode included in the parallel resonator P2 and the comb electrode constituting the parallel resonator P3 are connected to the terminal 16b.
  • the terminal 16b is connected to the inductor L2.
  • the comb electrode provided in the parallel resonator P4 and the comb electrode provided in the capacitor C1 are connected by a wiring 18.
  • the wiring 18 is connected to the terminal 16c.
  • the terminal 16c is connected to the inductor L3.
  • Another wiring 19 connected to the comb electrode included in the capacitor C1 is connected to the terminal 16d.
  • the terminal 16d is connected to a ground terminal provided in the package substrate 120. Bumps 124 for connecting to the package substrate 120 are formed on the white circles in the drawing.
  • the piezoelectric substrate 10 is made of a piezoelectric material such as lithium tantalate (LiTaO 3 ) or lithium niobate (LiNbO 3 ).
  • the comb-shaped electrode 12, the reflector 14, and the wiring connecting the comb-shaped electrode 12 are made of a metal such as aluminum (Al), and are formed of the same metal layer.
  • the series resonators S1 to S4, the parallel resonators P1 to P4, the capacitor C1, the wiring 18, the terminals 16a to 16d, the antenna terminal Ant, and the transmission terminal Tx are formed on the same piezoelectric substrate and are formed from the same metal layer. Become.
  • the transmission filter chip 100d has been described with reference to FIG. 13, the reception filter chip 100c may have the same configuration.
  • the reception filter chip 100c includes a reception terminal Rx1 instead of the transmission terminal Tx1.
  • FIG. 14A to FIG. 14C are plan views illustrating the package substrate included in the duplexer according to the third embodiment.
  • FIG. 14A shows the top surface of the package substrate 120.
  • FIG. 14B shows the top surface of the second layer 120-2 through the first layer 120-1.
  • FIG. 14C shows a perspective view of the first layer 120-1 and the second layer 120-2.
  • the wiring layer 120a provided on the upper surface of the package substrate 120 includes an antenna terminal Ant2, a transmission terminal Tx2, a reception terminal Rx2, a ground terminal GND1, and wirings 20a, 22a, and 24a.
  • White circles in the figure represent locations where the bumps 124 in FIG. 13 are connected. Note that the positions of bumps for connection to the reception filter chip 100c are not shown.
  • the antenna terminal Ant2 is connected to the antenna terminal Ant1 provided in the transmission filter chip 100d.
  • the transmission terminal Tx2 is connected to the transmission terminal Tx1 included in the transmission filter chip 100d.
  • the reception terminal Rx2 is connected to the reception terminal Rx1 included in the reception filter chip 100c.
  • the wiring 20a is connected to a terminal 16a included in the transmission filter chip 100d.
  • the wiring 22a is connected to the terminal 16b.
  • the wiring 24a is connected to the terminal 16c.
  • the ground terminal GND1 is connected to the terminal 16d.
  • Each connection is made via a bump 124.
  • the wiring 20a contributes to the formation of the inductor L1.
  • the wiring 22a contributes to the formation of the inductor L2.
  • the wiring 24a contributes to the formation of the inductor L3.
  • Each configuration of the wiring layer 120 a is connected to each corresponding configuration of the wiring layer 120 b by the via wiring 26.
  • a wiring layer 120b is formed between the first layer 120-1 and the second layer 120-2 of the package substrate 120.
  • the wiring layer 120b includes an antenna pattern Ant3, an output pattern Tx3, an input pattern Rx3, a ground pattern GND2, and wirings 20b, 22b, and 24b. White circles in the drawing indicate via wirings 26 for connection to the wiring layer 120a.
  • the antenna pattern Ant3 is connected to the antenna terminal Ant2 provided in the wiring layer 120a.
  • the output pattern Tx3 is connected to the transmission terminal Tx2.
  • the input pattern Rx3 is connected to the receiving terminal Rx2.
  • the ground pattern GND2 is connected to the ground terminal GND1.
  • the wiring 20b is connected to the wiring 20a.
  • the wiring 22b is connected to the wiring 22a.
  • the wiring 24b is connected to the wiring 24c. Each connection is made via the via wiring 26.
  • the wiring 20b contributes to the formation of the inductor L1.
  • the wiring 22b contributes to the formation of the inductor L2.
  • the wiring 24b contributes to the formation of the inductor L3.
  • the wiring layer 120c provided on the lower surface of the package substrate 120 includes an antenna terminal Ant4, a transmission terminal Tx4, a reception terminal Rx4, and a ground terminal GND3.
  • a white circle in FIG. 14C indicates the via wiring 26 for connecting to the wiring layer 120c.
  • the antenna terminal Ant4 is connected to the antenna pattern Ant3 provided in the wiring layer 120b.
  • the transmission terminal Tx4 is connected to the output pattern Tx3.
  • the reception terminal Rx4 is connected to the input pattern Rx3.
  • the ground terminal GND3 is connected to the wiring 20b, the wiring 22b, the wiring 24b, and the ground pattern GND2 included in the wiring layer 120b.
  • the wiring layer 120c functions as a foot pattern.
  • the inductor L1 is formed by wirings 20a and 20b.
  • the inductor L2 is formed by the wirings 22a and 22b.
  • the inductor L3 is formed by wirings 24a and 24b. That is, the inductors L1 to L3 are provided on the package substrate 120.
  • the transmission filter provided with the wiring 18 which connects the parallel resonator P4 and the capacitor C1 was formed.
  • an attenuation pole can be formed at a high frequency, and the inductor value of the inductor L3 can be reduced.
  • the inductor L3 can be downsized. That is, the inductor L3 can be formed on the package substrate 120 as shown in FIGS. 14A to 14C, for example, instead of an external component.
  • the filter can be miniaturized. That is, a filter that can be miniaturized can be realized.
  • the duplexer 100 can be downsized by using a downsized filter.
  • the transmission filter chip 100d can be downsized.
  • the inductor is formed as a wiring in the filter chip or formed as a wire used for wire bonding
  • the wiring may be routed.
  • the capacitor does not have to be routed, it can occupy less area than the inductor. That is, by forming the capacitor C1 in the transmission filter chip 100d, it is possible to reduce the size of the filter and the duplexer.
  • Inductors L1 to L3 are formed in the package substrate 120. In other words, the inductors L1 to L3 are formed as wirings that run around the package substrate 120. For this reason, the size of the filter and the duplexer can be reduced.
  • the parallel arm Pc (see FIG. 6A) including the capacitor C1, the inductor L1, and the parallel resonator P4 is the same as FIG. 9A or FIG.
  • the configuration corresponds to the parallel arm as shown in (b).
  • the impedance of the parallel arm increases on the high frequency side, and the attenuation characteristic deteriorates.
  • the wiring 18 in the first embodiment is a wiring that does not easily function as an inductor, such as a solid pattern.
  • the wiring 18 includes a region wider than the comb-shaped electrode constituting the capacitor C1. That is, as shown in FIG. 13, the width W1 of the region included in the wiring 18 is larger than the width W2 of the comb electrode provided in the capacitor C1.
  • the width direction is the arrangement direction of the electrode fingers of the capacitor C1 in FIG. Since the width W1 of the region included in the wiring 18 is larger than the width of the comb electrode included in the capacitor C1, the inductance component of the wiring 18 can be significantly reduced.
  • the inductance component can be reduced. As shown in FIG. 13, the entire wiring 18 may be wider than the comb-shaped electrode included in the capacitor C1. In this case, the inductance component of the wiring 18 becomes smaller. Further, a part of the wiring 18 may be wider than the comb electrode included in the capacitor C1, and the other area may be narrower than the comb electrode included in the capacitor C1. That is, the wiring 18 includes a region having the same width as that of the comb electrode included in the capacitor C1 or a region having a width larger than the width of the comb electrode.
  • the inductor value of the wiring 18 is significantly smaller than the inductance value of the inductance L3.
  • the circuit configuration of the transmission filter formed by mounting the transmission filter chip of FIG. 13 on the package substrate 120 corresponds to the circuit configuration of the ladder filter F13 shown in FIG. That is, the parallel arm Pc in the first embodiment has a configuration in which L4 is reduced in the parallel arm shown in FIGS. 9A and 9B, and the configuration in FIG. 8B. Therefore, the impedance of the parallel arm Pc approaches zero on the high frequency side as shown in FIG. As a result, the attenuation characteristics of the filter are improved on the high frequency side.
  • Each resonator is formed of a surface acoustic wave resonator, and the capacitor C1 includes a comb electrode made of the same metal layer as the comb electrode included in each resonator.
  • the capacitor C1 can be formed with high accuracy by patterning.
  • the capacitance value of the capacitor C1 can be easily adjusted by changing the number of electrode fingers or the electrode finger pitch.
  • the capacitor C1 may be connected in parallel with, for example, one of the inductors L1 and L2.
  • the inductance value of the inductor L1 that contributes to the attenuation pole of the Tx third harmonic can be reduced.
  • the inductance value of the inductor L3 that contributes to the attenuation pole of the BT / LAN located on the lowest frequency side in the attenuation station is large.
  • the inductor L3 is likely to increase in size among the inductors L1 to L3. Therefore, the filter can be more effectively downsized by connecting the inductor L3 and the capacitor C1 in parallel. Further, as shown in FIG.
  • the parallel arm Pc includes the capacitor C1, so that the attenuation characteristic on the high frequency side is improved. Therefore, in order to reduce the size of the filter and improve the attenuation characteristics, it is preferable that the attenuation pole formed by the parallel arm Pc is located on the lower frequency side than the attenuation pole formed by each of the parallel arm Pa and the parallel arm Pb.
  • the attenuation pole formed by the parallel arm Pa is preferably located at the Tx third harmonic
  • the attenuation pole formed by the parallel arm Pb is preferably located at the Tx second harmonic.
  • the attenuation pole formed by the parallel arm Pc is preferably located on the lower frequency side, particularly BT / LAN, than the attenuation pole formed by each of the parallel arm Pa and the parallel arm Pb.
  • the attenuation characteristics of the transmission filter may deteriorate at higher frequencies than the passband. Therefore, the characteristics of the duplexer can be improved by improving the characteristics on the high frequency side of the transmission filter.
  • the frequency band for reception is located on the higher frequency side than the frequency band for transmission. For this reason, as shown in FIG. 6B, by improving the characteristics on the high frequency side of the transmission filter, it is possible to suppress interference between the reception signal and the transmission signal. That is, it is preferable that the attenuation pole formed by the parallel arm Pc is located on the higher frequency side than the pass band of the transmission filter. Note that a filter as shown in FIG.
  • the filter 6B may be employed for both the transmission filter and the reception filter, or only for the reception filter, but it is particularly preferable to employ the filter for the transmission filter as described above. Furthermore, the filter shown in FIG. 13 can be used as a single filter in addition to the duplexer.
  • the attenuation poles are formed in bands corresponding to BT / LAN, Tx second harmonic, and Tx third harmonic, respectively, but attenuation poles may be formed in at least one of the three bands.
  • An attenuation pole may be formed in a band other than the above three bands.
  • the band in which the attenuation pole is formed can be changed by adjusting the capacitance value and the inductance value.
  • the capacitance value C 1 of the capacitor C1 is too large, the attenuation pole becomes a sharply pointed shape in the downward direction of FIG. 6 (b), insufficient suppression in the desired band (BT / LAN etc.), the damping characteristics Can get worse.
  • the capacitance value C 1 of the capacitor C1 the desired band, it is preferable to adjust so that the attenuation amount increases.
  • Each resonator is composed of a surface acoustic wave resonator, but may be composed of another acoustic wave resonator such as a boundary acoustic wave resonator.
  • the package substrate 120 has a two-layer structure, it may have a single-layer structure or a multilayer structure of three or more layers.
  • the inductors L1 to L3 may be composed of a plurality of wiring layers, or may be provided in a single wiring layer.
  • FIG. 15 is a plan view illustrating a transmission filter chip provided in a duplexer according to a modification of the first embodiment. The description of the same configuration as that already described is omitted.
  • the propagation direction of the surface acoustic wave of the comb-shaped electrode included in the capacitor C1 differs from the series resonators S1 to S4 and the parallel resonators P1 to P4 by, for example, 90 °. This makes it difficult for the surface acoustic wave to be excited in the capacitor C1. If the propagation direction of the surface acoustic wave is different between the capacitor C1, the series resonators S1 to S4 and the parallel resonators P1 to P4, the excitation of the surface acoustic wave is suppressed. However, in order to effectively suppress the excitation of the surface acoustic wave, the difference in the propagation direction is preferably 90 °.
  • Example 2 is an example using a piezoelectric thin film resonator. Since the configuration of the duplexer is the same as that already described, description thereof is omitted. Next, the piezoelectric thin film resonator will be described.
  • FIG. 16A is a plan view illustrating a piezoelectric thin film resonator
  • FIG. 16B is a cross-sectional view illustrating a piezoelectric thin film resonator.
  • FIG. 16B is a cross-sectional view taken along the line BB1 of FIG.
  • the piezoelectric thin film resonator 130 includes a substrate 132, a lower electrode 134, an upper electrode 136, and a piezoelectric thin film 138.
  • the lower electrode 134 and the upper electrode 136 sandwich the piezoelectric thin film 138.
  • Elastic waves are excited in a region 140 where the lower electrode 134, the piezoelectric thin film 138, and the upper electrode 136 overlap.
  • a through hole 142 that penetrates the substrate 132 is formed under the region 140. For this reason, excitation of elastic waves is not hindered.
  • the substrate 132 is made of, for example, silicon or glass.
  • the lower electrode 134 and the upper electrode 136 include, for example, aluminum (Al), copper (Cu), molybdenum (Mo), tungsten (W), tantalum (Ta), platinum (Pt), ruthenium (Ru), rhodium (Rh), A film made of iridium (Ir), chromium (Cr), titanium (Ti), or the like or a combination thereof can be used.
  • the piezoelectric thin film 138 is made of, for example, aluminum nitride (AlN), zinc oxide (ZnO), lead zirconate titanate (PZT), lead titanate (PbTiO 3 ), or the like. In the piezoelectric thin film resonator, the resonance frequency can be adjusted by adjusting the electrode film thickness of each of the lower electrode 134 and the upper electrode 136.
  • FIG. 17A to FIG. 17C are cross-sectional views illustrating a piezoelectric thin film resonator.
  • FIGS. 17A to 17C are cross-sectional views taken along the line BB1 of FIG.
  • a cavity 144 may be provided in the substrate 132.
  • the lower electrode 134, the upper electrode 136, and the piezoelectric thin film 138 may be raised, and a gap 146 may be formed between the lower electrode 134 and the substrate 132.
  • an acoustic reflection film 148 may be provided between the substrate 132, the lower electrode 134, and the piezoelectric thin film 138.
  • the acoustic reflection film 148 has a structure in which a film having a high acoustic impedance and a film having a low acoustic impedance are alternately stacked with a film thickness of ⁇ / 4 ( ⁇ : wavelength of elastic wave).
  • a vessel may be used.
  • FIG. 18 is a plan view illustrating a transmission filter chip included in the duplexer according to the second embodiment. The description of the same configuration as that already described is omitted.
  • the series resonators S1 to S4 and the parallel resonators P1 to P4 are formed of piezoelectric thin film resonators. In the drawing, the piezoelectric thin film resonator is shown by shading.
  • the substrate 132 is a non-piezoelectric substrate made of, for example, silicon or glass.
  • the capacitor C1 includes a lower electrode made of the same metal layer as the lower electrode included in each resonator.
  • the capacitor C1 includes an upper electrode made of the same metal layer as the upper electrode included in each resonator.
  • the capacitor C1 has a configuration in which the piezoelectric thin film is sandwiched between the lower electrode and the upper electrode, like each resonator.
  • the capacitor C1 is designed so that the resonance frequency of the capacitor C1 is outside the passband of the filter.
  • Other configurations are the same as those shown in FIG.
  • the attenuation pole is formed at a high frequency, and the filter can be downsized.
  • Each resonator and the capacitor C1 can form the lower electrode tailband upper electrode from the same metal layer, and can form a piezoelectric thin film from the same piezoelectric film. That is, by patterning the same layer, each resonator and the capacitor C1 can be formed at a time, so that the process can be simplified.
  • a dielectric film made of, for example, silicon oxide (SiO 2 ) or silicon nitride (Si 3 N 4 ) may be used for the capacitor C1.
  • capacitance of the capacitor C1 can be adjusted and the excitation of the elastic wave in the capacitor C1 can be suppressed. Further, the capacitance value of the capacitor C1 can be easily adjusted by changing the size of the lower electrode 134 and the upper electrode 136 or the distance between the electrodes.
  • FIG. 19 is a plan view illustrating a transmission filter chip included in a duplexer according to a modification of the second embodiment.
  • the capacitor C1 is composed of opposing comb electrodes. Since the substrate 132 is a non-piezoelectric substrate, the comb electrode does not excite an elastic wave and functions as the capacitor C1. That is, you may use combining an elastic wave resonator and a piezoelectric thin film resonator.

Abstract

The present invention is a filter and duplexer that are equipped with: series oscillators (S1-S4); parallel oscillators (P1-P4) that are formed on a piezoelectric substrate (10) and that are connected in parallel to the series oscillators (S1-S4); a inductor (L3) that is connected in series to a parallel oscillator (P4); a capacitor (C1) that is formed on the piezoelectric substrate (10) and connected in parallel to the inductor (L3), and wiring (18) that is formed on the piezoelectric substrate (10) and that connects the parallel oscillator (P4) and the capacitor (C1).

Description

フィルタ及びデュープレクサFilters and duplexers
 本発明はフィルタ及びデュープレクサに関する。 The present invention relates to a filter and a duplexer.
 近年、移動体通信システムの発展に伴い、携帯電話、携帯情報端末等が急速に普及している。このため高周波用フィルタへの需要が拡大しており、特に小型で特性が急峻であるフィルタが要求されている。またフィルタには、混変調及び干渉を抑制するため、通過帯域よりも高周波側に位置する、高調波(2倍波、3倍波等)、並びにワイヤレスLAN(Local Area Network:ローカルエリアネットワーク)及びBluetooth(ブルートゥース 登録商標)の使用周波数帯での抑圧が高いことが求められる。 In recent years, with the development of mobile communication systems, mobile phones, portable information terminals, etc. are rapidly spreading. For this reason, the demand for high-frequency filters is expanding, and there is a demand for filters that are particularly small and have sharp characteristics. The filter includes harmonics (second harmonic, third harmonic, etc.), wireless LAN (Local Area Network), and a local area network, which are located on the higher frequency side than the passband in order to suppress cross modulation and interference. High suppression is required in the frequency band used by Bluetooth (registered trademark).
 高周波フィルタとして、共振器を直列腕及び並列腕に接続したラダー型フィルタが用いられることがある。特許文献1及び特許文献2には、ラダー型フィルタの並列腕にインダクタ及びキャパシタを接続し、通過帯域より高周波側の減衰を大きくする発明が開示されている。 As a high frequency filter, a ladder type filter in which a resonator is connected to a series arm and a parallel arm may be used. Patent Document 1 and Patent Document 2 disclose an invention in which an inductor and a capacitor are connected to a parallel arm of a ladder type filter to increase attenuation on the high frequency side from the pass band.
特開2008-205947号公報JP 2008-205947 A 特開2006-333012号公報JP 2006-333012 A
 しかしながら、従来の技術では、通過帯域より高周波側に減衰極を形成したフィルタにおいて、フィルタの小型化が困難になる可能性があった。本発明は上記課題に鑑み、高周波数において減衰極を形成しかつ小型化可能なフィルタ及びデュープレクサを提供することを目的とする。 However, in the conventional technique, there is a possibility that it is difficult to reduce the size of the filter in the filter in which the attenuation pole is formed on the high frequency side from the pass band. In view of the above problems, an object of the present invention is to provide a filter and a duplexer that can form an attenuation pole at a high frequency and can be miniaturized.
 本発明は、直列共振器と、基板上に形成され、前記直列共振器と並列接続された並列共振器と、前記並列共振器に直列接続されたインダクタと、前記基板上に形成され、前記インダクタに並列接続されたキャパシタと、前記基板上に形成され、前記並列共振器と前記キャパシタとを接続する配線と、を具備するフィルタである。本発明によれば、高周波数において減衰極を形成しかつ小型化可能なフィルタを提供することができる。 The present invention includes a series resonator, a parallel resonator formed on the substrate and connected in parallel to the series resonator, an inductor connected in series to the parallel resonator, and the inductor formed on the substrate. And a capacitor formed on the substrate and connected to the parallel resonator and the capacitor. ADVANTAGE OF THE INVENTION According to this invention, the filter which can form an attenuation pole in high frequency and can be reduced in size can be provided.
 上記構成において、複数の前記並列共振器に、前記インダクタが直列接続され、複数の前記インダクタのうち第1インダクタに前記キャパシタが並列接続され、前記キャパシタと、前記第1インダクタと、前記第1インダクタと直列接続された並列共振器とが形成する減衰極は、前記第1インダクタ以外のインダクタと、前記第1インダクタ以外のインダクタと直列接続された並列共振器とが形成する減衰極よりも低周波側に位置する構成とすることができる。この構成によれば、フィルタをより効果的に小型化することが可能となる。 In the above configuration, the inductor is connected in series to a plurality of the parallel resonators, and the capacitor is connected in parallel to a first inductor among the plurality of inductors. The capacitor, the first inductor, and the first inductor The attenuation pole formed by the parallel resonator connected in series with the inductor is lower in frequency than the attenuation pole formed by the inductor other than the first inductor and the parallel resonator connected in series with the inductor other than the first inductor. It can be set as the structure located in the side. According to this configuration, the filter can be more effectively downsized.
 上記構成において、前記第1並列腕が形成する減衰極は、複数の前記第2並列腕の各々が形成する減衰極より低周波側に位置する構成とすることができる。この構成によれば、フィルタを小型化し、またフィルタの通過特性を改善することができる。 In the above-described configuration, the attenuation pole formed by the first parallel arm may be positioned on the lower frequency side than the attenuation pole formed by each of the plurality of second parallel arms. According to this configuration, the filter can be downsized and the pass characteristic of the filter can be improved.
 上記構成において、前記第1並列腕が形成する減衰極は、前記フィルタの通過帯域より高周波側に位置する構成とすることができる。この構成によれば、フィルタを小型化し、またフィルタの通過特性を改善することができる。 In the above configuration, the attenuation pole formed by the first parallel arm may be positioned on a higher frequency side than the pass band of the filter. According to this configuration, the filter can be downsized and the pass characteristic of the filter can be improved.
 上記構成において、前記第2並列腕が形成する減衰極は、前記フィルタの通過帯域の2倍波に相当する周波数帯域に位置し、前記第1並列腕が形成する減衰極は、前記フィルタの通過帯域と、前記通過帯域の2倍波に相当する周波数帯域との間の周波数帯域に位置する構成とすることができる。この構成によれば、フィルタを小型化し、またフィルタの通過特性を改善することができる。 In the above-described configuration, the attenuation pole formed by the second parallel arm is located in a frequency band corresponding to a second harmonic of the pass band of the filter, and the attenuation pole formed by the first parallel arm is passed through the filter. It can be set as the structure located in the frequency band between a band and the frequency band equivalent to the 2nd harmonic of the said pass band. According to this configuration, the filter can be downsized and the pass characteristic of the filter can be improved.
 上記構成において、前記フィルタの通過帯域は、携帯電話の送信周波数帯域であり、前記第1並列腕が形成する減衰極は、ブルートゥースの使用周波数帯域、又は無線LANの使用周波数帯域に位置する構成とすることができる。この構成によれば、混変調及び干渉を抑制することができる。 In the above configuration, the pass band of the filter is a transmission frequency band of a mobile phone, and the attenuation pole formed by the first parallel arm is located in a use frequency band of Bluetooth or a use frequency band of a wireless LAN. can do. According to this configuration, cross modulation and interference can be suppressed.
 上記構成において、前記基板上に前記直列共振器、前記並列共振器、前記キャパシタ及び前記配線を備えるチップと、前記チップが実装されたパッケージ基板と、を具備し、前記インダクタは前記パッケージ基板に設けられている構成とすることができる。この構成によれば、フィルタの小型化が可能となる。 In the above configuration, the chip includes the series resonator, the parallel resonator, the capacitor, and the wiring on the substrate, and a package substrate on which the chip is mounted, and the inductor is provided on the package substrate. It can be set as the structure currently provided. According to this configuration, the filter can be reduced in size.
 上記構成において、前記直列共振器及び前記並列共振器は対向する櫛形電極を備える弾性波共振器であり、前記キャパシタは、前記弾性波共振器が備える櫛形電極と同じ金属層からなり、かつ電極指ピッチが異なる櫛形電極を備える構成とすることができる。この構成によれば、工程を簡略化することができる。また、キャパシタを精度高く形成することが可能となる。さらにキャパシタンスの容量値を容易に調整することができる。 In the above configuration, the series resonator and the parallel resonator are acoustic wave resonators having opposing comb-shaped electrodes, and the capacitor is made of the same metal layer as the comb-shaped electrodes included in the acoustic wave resonator, and has electrode fingers. It can be set as the structure provided with the comb-shaped electrode from which pitch differs. According to this configuration, the process can be simplified. In addition, the capacitor can be formed with high accuracy. Furthermore, the capacitance value of the capacitance can be easily adjusted.
 上記構成において、前記直列共振器及び前記並列共振器は対向する櫛形電極を備える弾性波共振器であり、前記キャパシタは、前記弾性波共振器が備える櫛形電極と同じ金属層からなり、かつ弾性波の伝搬方向が異なる櫛形電極を備える構成とすることができる。この構成によれば、工程を簡略化することができる。また、キャパシタを精度高く形成することが可能となる。さらにキャパシタンスの容量値を容易に調整することができる。 In the above configuration, the series resonator and the parallel resonator are acoustic wave resonators having opposing comb-shaped electrodes, and the capacitor is made of the same metal layer as the comb-shaped electrode included in the acoustic wave resonator, and has an acoustic wave It can be set as the structure provided with the comb-shaped electrode from which the propagation direction of this differs. According to this configuration, the process can be simplified. In addition, the capacitor can be formed with high accuracy. Furthermore, the capacitance value of the capacitance can be easily adjusted.
 上記構成において、前記配線は、前記キャパシタが備える櫛形電極の幅と同一の幅を有する領域、又は前記櫛形電極の幅よりも大きい幅を有する領域、を含む構成とすることができる。この構成によれば、配線のインダクタンス成分を小さくすることができる。 In the above configuration, the wiring may include a region having the same width as that of the comb electrode included in the capacitor or a region having a width larger than the width of the comb electrode. According to this configuration, the inductance component of the wiring can be reduced.
 上記構成において、前記直列共振器及び前記並列共振器は圧電薄膜共振器であり、前記キャパシタは、前記圧電薄膜共振器が備える下部電極及び上部電極の各々と同じ金属層からなる電極を備える構成とすることができる。この構成によれば、工程を簡略化することができる。また、キャパシタを精度高く形成することが可能となる。さらにキャパシタンスの容量値を容易に調整することができる。 In the above configuration, the series resonator and the parallel resonator are piezoelectric thin film resonators, and the capacitor includes a lower electrode provided in the piezoelectric thin film resonator and an electrode made of the same metal layer as each of the upper electrode; can do. According to this configuration, the process can be simplified. In addition, the capacitor can be formed with high accuracy. Furthermore, the capacitance value of the capacitance can be easily adjusted.
 本発明は、基板上に形成された直列共振器と、前記基板上に形成され、前記直列共振器と並列接続された並列共振器と、前記並列共振器に直列接続されたインダクタと、前記基板上に形成され、前記インダクタに並列接続されたキャパシタと、前記基板上に形成され、前記並列共振器と前記キャパシタとを接続する配線と、を有するフィルタを具備するデュープレクサである。本発明によれば、高周波数において減衰極を形成しかつ小型化可能なデュープレクサを提供することができる。 The present invention includes a series resonator formed on a substrate, a parallel resonator formed on the substrate and connected in parallel to the series resonator, an inductor connected in series to the parallel resonator, and the substrate A duplexer including a filter formed on the capacitor and connected in parallel to the inductor, and a wiring formed on the substrate and connecting the parallel resonator and the capacitor. ADVANTAGE OF THE INVENTION According to this invention, the duplexer which can form an attenuation pole in high frequency and can be reduced in size can be provided.
 上記構成において、前記フィルタは送信フィルタである構成とすることができる。この構成によれば、デュープレクサの特性を改善することができる。また受信信号と送信信号との混信等を抑制することができる。 In the above configuration, the filter may be a transmission filter. According to this configuration, the characteristics of the duplexer can be improved. Further, interference between the reception signal and the transmission signal can be suppressed.
 本発明によれば、高周波数において減衰極を形成しかつ小型化可能なフィルタ及びデュープレクサを提供することができる。 According to the present invention, it is possible to provide a filter and duplexer that can form an attenuation pole at a high frequency and can be miniaturized.
図1(a)は直列共振器の構成図であり、図1(b)は並列共振器の構成図であり、図1(c)は直列共振器及び直列共振器の通過特性を示す図である。1A is a configuration diagram of a series resonator, FIG. 1B is a configuration diagram of a parallel resonator, and FIG. 1C is a diagram illustrating pass characteristics of the series resonator and the series resonator. is there. 図2(a)は1段ラダー型フィルタの構成図であり、図2(b)は1段ラダー型フィルタの通過特性を示す図である。FIG. 2A is a configuration diagram of a one-stage ladder filter, and FIG. 2B is a diagram illustrating pass characteristics of the one-stage ladder filter. 図3(a)及び図3(b)は、多段ラダー型フィルタの構成図である。3A and 3B are configuration diagrams of a multistage ladder filter. 図4(a)は高周波側に減衰極を形成するラダー型フィルタの構成図であり、図4(b)は高周波側に減衰極を形成するラダー型フィルタの減衰特性を示す図である。FIG. 4A is a configuration diagram of a ladder type filter that forms an attenuation pole on the high frequency side, and FIG. 4B is a diagram showing attenuation characteristics of the ladder type filter that forms an attenuation pole on the high frequency side. 図5(a)は高調波に減衰極を形成するラダー型フィルタの構成図であり、図5(b)は高調波に減衰極を形成するラダー型フィルタの減衰特性を示す図である。FIG. 5A is a configuration diagram of a ladder type filter that forms an attenuation pole in a harmonic, and FIG. 5B is a diagram showing attenuation characteristics of the ladder type filter that forms an attenuation pole in a harmonic. 図6(a)はキャパシタを追加したラダー型フィルタの構成図であり、図6(b)はキャパシタを追加したラダー型フィルタの減衰特性を示す図である。FIG. 6A is a configuration diagram of a ladder type filter to which a capacitor is added, and FIG. 6B is a diagram illustrating attenuation characteristics of the ladder type filter to which a capacitor is added. 図7(a)は容量値とインダクタンス値との関係を示す図であり、図7(b)はインダクタンス値を変化させたラダー型フィルタの減衰特性を示す図である。FIG. 7A is a diagram showing the relationship between the capacitance value and the inductance value, and FIG. 7B is a diagram showing the attenuation characteristic of the ladder filter with the inductance value changed. 図8(a)及び図8(b)は、ラダー型フィルタの並列腕の構成図である。Fig.8 (a) and FIG.8 (b) are block diagrams of the parallel arm of a ladder type filter. 図9(a)及び図9(b)はラダー型フィルタの並列腕の構成図であり、図9(c)は並列腕のインピーダンスを示す図である。FIGS. 9A and 9B are configuration diagrams of parallel arms of a ladder type filter, and FIG. 9C is a diagram illustrating impedance of the parallel arms. 図10は並列腕のインピーダンスを示す図である。FIG. 10 is a diagram illustrating the impedance of the parallel arms. 図11(a)はデュープレクサを例示するブロック図であり、図11(b)は携帯電話のRF(Radio Frequency)モジュールを例示するブロック図である。FIG. 11A is a block diagram illustrating a duplexer, and FIG. 11B is a block diagram illustrating a radio frequency (RF) module of a mobile phone. 図12(a)は実施例1に係るデュープレクサを例示する平面図であり、図12(b)は実施例1に係るデュープレクサを例示する断面図である。FIG. 12A is a plan view illustrating the duplexer according to the first embodiment, and FIG. 12B is a cross-sectional view illustrating the duplexer according to the first embodiment. 図13は実施例1に係るデュープレクサが備える送信フィルタチップを例示する平面図である。FIG. 13 is a plan view illustrating a transmission filter chip included in the duplexer according to the first embodiment. 図14(a)から図14(c)は、実施例3に係るデュープレクサが備えるパッケージ基板を例示する平面図である。FIG. 14A to FIG. 14C are plan views illustrating the package substrate included in the duplexer according to the third embodiment. 図15は実施例1の変形例に係るデュープレクサが備える送信フィルタチップを例示する平面図である。FIG. 15 is a plan view illustrating a transmission filter chip provided in a duplexer according to a modification of the first embodiment. 図16(a)は圧電薄膜共振器を例示する平面図であり、図16(b)は圧電薄膜共振器を例示する断面図である。FIG. 16A is a plan view illustrating a piezoelectric thin film resonator, and FIG. 16B is a cross-sectional view illustrating a piezoelectric thin film resonator. 図17(a)から図17(c)は圧電薄膜共振器を例示する断面図である。FIG. 17A to FIG. 17C are cross-sectional views illustrating a piezoelectric thin film resonator. 図18は実施例2に係るデュープレクサが備える送信フィルタチップを例示する平面図である。FIG. 18 is a plan view illustrating a transmission filter chip included in the duplexer according to the second embodiment. 図19は実施例2の変形例に係るデュープレクサが備える送信フィルタチップを例示する平面図である。FIG. 19 is a plan view illustrating a transmission filter chip included in a duplexer according to a modification of the second embodiment.
 まず、ラダー型フィルタについて説明する。図1(a)は直列共振器の構成図であり、図1(b)は並列共振器の構成図であり、図1(c)は直列共振器及び直列共振器の通過特性を示す図である。 First, the ladder filter will be described. 1A is a configuration diagram of a series resonator, FIG. 1B is a configuration diagram of a parallel resonator, and FIG. 1C is a diagram illustrating pass characteristics of the series resonator and the series resonator. is there.
 図1(a)に示すように、直列共振器は、共振器S21を一端子対共振器としたとき、その2つの信号端子のうち、一方を入力端子In、他方を出力端子Outとしたものである。図1(b)に示すように、並列共振器は、共振器P21を一端子対共振器としたとき、その2つの信号端子のうち、一方をグランド端子に接続し、他方を入力端子Inと出力端子Outの短絡線路に接続したものである。 As shown in FIG. 1 (a), when the resonator S21 is a one-terminal-pair resonator, the series resonator has one of its two signal terminals as an input terminal In and the other as an output terminal Out. It is. As shown in FIG. 1B, when the resonator P21 is a one-terminal-pair resonator, the parallel resonator has one of the two signal terminals connected to the ground terminal and the other connected to the input terminal In. This is connected to the short-circuit line of the output terminal Out.
 図1(c)の横軸は周波数、縦軸は通過量である。直列共振器の通過特性は実線、並列共振器の通過特性は破線で示す。図1(c)に示すように、直列共振器の通過特性は、1つの共振点(共振周波数)frsと1つの反共振点(反共振周波数)fasとを有する。共振点frsで通過量は最大となり、反共振点fasで通過量は最小となる。一方、並列共振器の通過特性は、1つの共振点frpと1つの反共振点fapとを有する。共振点frpで通過量は最小となり、反共振点fapで通過量は最大となる。 In FIG. 1C, the horizontal axis represents frequency, and the vertical axis represents passage amount. The pass characteristic of the series resonator is indicated by a solid line, and the pass characteristic of the parallel resonator is indicated by a broken line. As shown in FIG. 1 (c), pass characteristics of the series resonator comprises a single resonance point (resonance frequency) f rs and one antiresonance point and (antiresonance frequency) f the as. Amount passing at the resonance point f rs is maximized, the amount passed in the antiresonance point f as is minimized. On the other hand, the pass characteristic of the parallel resonator has one resonance point f rp and one anti-resonance point f ap . The passing amount is minimized at the resonance point f rp , and the passing amount is maximized at the anti-resonance point f ap .
 図2(a)は1段ラダー型フィルタの構成図であり、図2(b)は1段ラダー型フィルタの通過特性を示す図である。 FIG. 2 (a) is a configuration diagram of a one-stage ladder type filter, and FIG. 2 (b) is a diagram showing pass characteristics of the one-stage ladder type filter.
図2(a)に示すように、直列共振器S22が直列共振器として入力端子Inと出力端子Outに直列に接続され、並列共振器P22が並列共振器として出力端子Outとグランド間に接続される。このとき、直列共振器の共振点frsと並列共振器の反共振点fapは概一致するように設計する。 As shown in FIG. 2A, the series resonator S22 is connected as a series resonator in series with the input terminal In and the output terminal Out, and the parallel resonator P22 is connected as a parallel resonator between the output terminal Out and the ground. The At this time, the resonance point f rs of the series resonator and the anti-resonance point f ap of the parallel resonator are designed so as to substantially coincide.
 図2(b)の横軸は周波数、縦軸は通過量を示す。図2(a)の構成により、直列共振器と並列共振器の通過特性が合成され,図2(b)の通過特性が得られる。通過量は、直列共振器の共振点frsと並列共振器の反共振点fap付近が最大となり、直列共振器の反共振点fas及び並列共振器の共振点frpが極小となる。そして、並列共振器の共振点frpから直列共振器の反共振点fasの周波数帯域が通過帯域となり、並列共振器の共振点frp以下及び直列共振器の反共振点fas以上の周波数帯域が減衰域となる。このように、ラダー型フィルタはバンドパスフィルタとして機能する。 In FIG. 2B, the horizontal axis indicates the frequency, and the vertical axis indicates the passing amount. With the configuration of FIG. 2A, the pass characteristics of the series resonator and the parallel resonator are combined, and the pass characteristic of FIG. 2B is obtained. Amount passing, near the anti-resonance point f ap with the resonance point f rs of the series resonators parallel resonator is maximized, the resonance point f rp of the anti-resonance point f as and parallel resonators of the series resonator is minimized. The frequency band from the resonance point f rp of the parallel resonator to the anti-resonance point f as of the series resonator is a pass band, and the frequency is equal to or lower than the resonance point f rp of the parallel resonator and the anti-resonance point f as of the series resonator. The band becomes the attenuation range. Thus, the ladder type filter functions as a bandpass filter.
 次に多段ラダー型フィルタについて説明する。図3(a)及び図3(b)は、多段ラダー型フィルタの構成図である。図3(b)の横軸は周波数、縦軸は減衰量を表す。 Next, the multistage ladder type filter will be described. 3A and 3B are configuration diagrams of a multistage ladder filter. In FIG. 3B, the horizontal axis represents frequency and the vertical axis represents attenuation.
 図3(a)に示すように、ラダー型フィルタF10は直列共振器S1,S2a,S2b及びS3、並びに並列共振器P1a,P1b,P2a及びP2bを備える。入力端子Inと出力端子Outとの間に、直列共振器S1,S2a,S2b及びS3が直列に接続されている。直列共振器S1は入力端子Inに接続されている。直列共振器S4は出力端子Outに接続されている。 As shown in FIG. 3A, the ladder filter F10 includes series resonators S1, S2a, S2b and S3, and parallel resonators P1a, P1b, P2a and P2b. Series resonators S1, S2a, S2b, and S3 are connected in series between the input terminal In and the output terminal Out. The series resonator S1 is connected to the input terminal In. The series resonator S4 is connected to the output terminal Out.
 直列共振器S1と直列共振器S2aとの間には、並列共振器P1a及び並列共振器P1bがそれぞれ並列に接続されている。直列共振器2bと直列共振器3との間には、並列共振器P2a及び並列共振器P2bがそれぞれ並列に接続されている。また並列共振器P1a,P1b,P2a及びP2bはグランド端子に接続されている。多段ラダー型フィルタF10は、1段ラダー型フィルタを複数接続して構成される。なお、各段間での信号の反射を抑制するため、1段ラダーがフィルタを反転させた形で接続される。 A parallel resonator P1a and a parallel resonator P1b are connected in parallel between the series resonator S1 and the series resonator S2a. A parallel resonator P2a and a parallel resonator P2b are connected in parallel between the series resonator 2b and the series resonator 3, respectively. The parallel resonators P1a, P1b, P2a and P2b are connected to the ground terminal. The multi-stage ladder filter F10 is configured by connecting a plurality of single-stage ladder filters. In addition, in order to suppress the reflection of the signal between each stage, the 1-stage ladder is connected in the form of inverting the filter.
 図3(b)に示すように、フィルタの小型化のために、直列共振器S2a及びS2bを1つの直列共振器S2としてもよい。また並列共振器P1a及びP1bを1つの並列共振器P1とし、さらに並列共振器P2a及びP2bを1つの並列共振器P2としてもよい。つまり図3(a)中の点線で囲んだ構成を1つにまとめてもよい。後述するように、直列共振器及び並列共振器はキャパシタとして機能する。直列共振器S2の容量値は、直列共振器S2aと直列共振器S2bとを直列に接続した場合の直列共振器S2aとS2bとの合成容量値に等しくなる。並列共振器P2の容量値は、並列共振器P2aと並列共振器P2bとを並列に接続した場合の並列共振器P2aとP2bとの合成容量値に等しくなる。 As shown in FIG. 3B, the series resonators S2a and S2b may be used as one series resonator S2 in order to reduce the size of the filter. The parallel resonators P1a and P1b may be one parallel resonator P1, and the parallel resonators P2a and P2b may be one parallel resonator P2. That is, the configuration surrounded by the dotted line in FIG. As will be described later, the series resonator and the parallel resonator function as a capacitor. The capacitance value of the series resonator S2 is equal to the combined capacitance value of the series resonators S2a and S2b when the series resonator S2a and the series resonator S2b are connected in series. The capacitance value of the parallel resonator P2 is equal to the combined capacitance value of the parallel resonators P2a and P2b when the parallel resonator P2a and the parallel resonator P2b are connected in parallel.
 次に高調波に減衰極を形成したラダー型フィルタについて説明する。図4(a)は高周波側に減衰極を形成するラダー型フィルタの構成図であり、図4(b)は高周波側に減衰極を形成するラダー型フィルタの減衰特性を示す図である。 Next, a ladder type filter in which an attenuation pole is formed in the harmonic will be described. FIG. 4A is a configuration diagram of a ladder type filter that forms an attenuation pole on the high frequency side, and FIG. 4B is a diagram showing attenuation characteristics of the ladder type filter that forms an attenuation pole on the high frequency side.
 図4(a)に示すように、ラダー型フィルタF11においては、並列共振器P1にインダクタL1、並列共振器P2にインダクタL2が、それぞれ直列接続されている。インダクタL1の一端は並列共振器P1に接続され、他端はグランド端子に接続されている。インダクタL2の一端は並列共振器P2に接続され、他端はグランド端子に接続されている。共振器は、通過帯域外ではキャパシタとして機能する。このため、並列共振器P1とインダクタL1、及び並列共振器P2とインダクタL2とは、それぞれLC共振回路として機能する。並列共振器P1及びP2それぞれの容量値をC、インダクタL1のインダクタンス値をLとする。この場合、並列共振器P1とインダクタL1とが形成するLC共振回路の共振周波数fは、数式1で表される。
Figure JPOXMLDOC01-appb-M000001
並列共振器P2とインダクタL2とが形成するLC共振回路の共振周波数も式1と同様の式で表される。
As shown in FIG. 4A, in the ladder filter F11, an inductor L1 is connected in series to the parallel resonator P1, and an inductor L2 is connected in series to the parallel resonator P2. One end of the inductor L1 is connected to the parallel resonator P1, and the other end is connected to the ground terminal. One end of the inductor L2 is connected to the parallel resonator P2, and the other end is connected to the ground terminal. The resonator functions as a capacitor outside the passband. For this reason, the parallel resonator P1 and the inductor L1, and the parallel resonator P2 and the inductor L2 each function as an LC resonance circuit. Let C p be the capacitance value of each of the parallel resonators P1 and P2, and L 1 be the inductance value of the inductor L1. In this case, the resonance frequency f 1 of the LC resonance circuit in parallel with the resonator P1 and the inductor L1 is formed is represented by Equation 1.
Figure JPOXMLDOC01-appb-M000001
The resonance frequency of the LC resonance circuit formed by the parallel resonator P2 and the inductor L2 is also expressed by the same expression as Expression 1.
 図4(b)に示すように、周波数f及びfにおいて減衰極が形成される。ラダー型フィルタF11では並列腕を2つとしたが、並列腕を増設し、かつインダクタを接続することで、減衰極を追加することができる。また並列共振器の容量値及びインダクタのインダクタンス値を調節することで、減衰極が現れる周波数を調節することもできる。例えば周波数f及びfを、フィルタの通過帯域の2倍波に相当する周波数帯域(Tx2倍波)、及び3倍波に相当する周波数帯域(Tx3倍波)の各々に含まれるようにしてもよい。これにより、Tx2倍波及びTx3倍波等の高調波に減衰極を形成することができる。次に比較例について説明する。 As shown in FIG. 4B, attenuation poles are formed at the frequencies f 1 and f 2 . In the ladder type filter F11, two parallel arms are used. However, an attenuation pole can be added by adding parallel arms and connecting an inductor. Also, the frequency at which the attenuation pole appears can be adjusted by adjusting the capacitance value of the parallel resonator and the inductance value of the inductor. For example, the frequencies f 1 and f 2 are included in each of a frequency band (Tx second harmonic) corresponding to the second harmonic of the pass band of the filter and a frequency band (Tx third harmonic) corresponding to the third harmonic. Also good. Thereby, attenuation poles can be formed in harmonics such as Tx second harmonic and Tx third harmonic. Next, a comparative example will be described.
 図5(a)は高調波に減衰極を形成するラダー型フィルタの構成図であり、図5(b)は高調波に減衰極を形成するラダー型フィルタの減衰特性を示す図である。なお、図5(b)はラダー型フィルタF12の減衰特性を計算した結果である。 FIG. 5A is a configuration diagram of a ladder type filter that forms an attenuation pole in the harmonic, and FIG. 5B is a diagram showing attenuation characteristics of the ladder type filter that forms an attenuation pole in the harmonic. FIG. 5B shows the result of calculating the attenuation characteristics of the ladder filter F12.
 図5(a)に示すように、ラダー型フィルタF12は、ラダー型フィルタF11に、直列共振器S4、並列共振器P3及びP4、並びにインダクタL3を増設したものである。並列共振器P2及びP3は、それぞれインダクタL2に直列接続されている。並列共振器P4はインダクタL3に直列接続されている。つまりラダー型フィルタF12は3つの並列腕を有し、それぞれの並列腕がLC共振回路として機能する。次にラダー型フィルタF12の減衰特性のシミュレーションについて説明する。 As shown in FIG. 5A, the ladder filter F12 is obtained by adding a series resonator S4, parallel resonators P3 and P4, and an inductor L3 to the ladder filter F11. The parallel resonators P2 and P3 are respectively connected in series to the inductor L2. The parallel resonator P4 is connected in series with the inductor L3. That is, the ladder type filter F12 has three parallel arms, and each parallel arm functions as an LC resonance circuit. Next, simulation of the attenuation characteristics of the ladder filter F12 will be described.
 減衰特性の計算に用いた条件を説明する。ラダー型フィルタF12をデュープレクサの送信フィルタとして用いる場合を考える。ラダー型フィルタF12は、以下の仕様のW-CDMA(Wideband Code Division Multiple Access) Band2方式の送信フィルタとした。
送信フィルタの通過帯域:1850~1910MHz
受信フィルタの通過帯域:1930~1990MHz
Tx2倍波の周波数帯域:3700~3820MHz
Tx3倍波の周波数帯域:5550~5730MHz
使用した共振器:弾性表面波共振器
直列共振器S1の容量値:1.87pF
直列共振器S2~S4各々の容量値:0.935pF
並列共振器P1~P3各々の容量値:2.24pF
並列共振器P4の容量値:1.12pF
インダクタL1のインダクタンス値L:0.355nH
インダクタL2のインダクタンス値L:0.182nH
インダクタL3のインダクタンス値L:4.15nH
直列共振器S1~S4の共振周波数は同一とし、並列共振器P1~P4の共振周波数も同一とした。また直列共振器S1~S4及び並列共振器P1~P4の電気機械結合定数は同一とした。
The conditions used for calculating the attenuation characteristics will be described. Consider a case where the ladder type filter F12 is used as a transmission filter of a duplexer. The ladder filter F12 is a W-CDMA (Wideband Code Division Multiple Access) Band 2 transmission filter having the following specifications.
Transmission filter passband: 1850-1910 MHz
Receive filter passband: 1930-1990 MHz
Tx second harmonic frequency band: 3700-3820 MHz
Tx third harmonic frequency band: 5550-5730 MHz
Resonator used: Surface acoustic wave resonator Series resonator S1 capacitance value: 1.87 pF
Capacitance value of each of series resonators S2 to S4: 0.935 pF
Capacitance value of each of parallel resonators P1 to P3: 2.24 pF
Capacitance value of the parallel resonator P4: 1.12 pF
Inductance value L 1 of inductor L 1 : 0.355 nH
Inductance value L 2 of the inductor L2: 0.182 nH
Inductance value L 3 of the inductor L3: 4.15 nH
The resonance frequencies of the series resonators S1 to S4 are the same, and the resonance frequencies of the parallel resonators P1 to P4 are also the same. The electromechanical coupling constants of the series resonators S1 to S4 and the parallel resonators P1 to P4 are the same.
 図5(b)に示すように、ラダー型フィルタF12ではTx2倍波及びTx3倍波に対応する周波数帯域に減衰極が形成された。また無線LAN及びBluetoothの使用帯域(以下「BT/LAN」)である2400~2500MHzにおいても減衰極が形成された。 As shown in FIG. 5B, the ladder type filter F12 has attenuation poles formed in frequency bands corresponding to the Tx second harmonic and the Tx third harmonic. In addition, attenuation poles were formed in 2400 to 2500 MHz, which is a use band of wireless LAN and Bluetooth (hereinafter “BT / LAN”).
 ここでインダクタンス値とフィルタサイズとの関係について説明する。表1はラダー型フィルタF12におけるインダクタL1~L3のインダクタンス値L~L、及び減衰極が形成される周波数帯域をまとめたものである。
Figure JPOXMLDOC01-appb-T000002
Here, the relationship between the inductance value and the filter size will be described. Table 1 summarizes the inductance values L 1 to L 3 of the inductors L1 to L3 and the frequency band in which the attenuation pole is formed in the ladder filter F12.
Figure JPOXMLDOC01-appb-T000002
 表1に示すように、Tx3倍波の減衰極に対応するインダクタL1のインダクタンス値Lは0.355nHである。Tx2倍波の減衰極に対応するインダクタL2のインダクタンス値Lは0.182nHである。BT/LANの減衰極に対応するインダクタL3のインダクタンス値Lは4.15nHである。上述の式に示したように、LC共振回路の共振周波数は、インダクタンス値が大きくなるほど低くなる。インダクタンスL3はBT/LANにおける減衰極の形成に寄与する。なお、Tx2がTx3より低い周波数帯であるにも関わらず、インダクタL2がインダクタンスL1より小さいインダクタンス値を有する。これは、インダクタL2が接続される並列共振器P2及びP3が、並列接続されているためである。 As shown in Table 1, the inductance value L 1 of the inductor L1 corresponding to the attenuation pole of Tx3 harmonic is 0.355NH. The inductance value L2 of the inductor L2 corresponding to the attenuation pole of the Tx second harmonic is 0.182 nH. Inductance value L 3 of the inductor L3 which corresponds to the attenuation pole of the BT / LAN is 4.15NH. As shown in the above formula, the resonance frequency of the LC resonance circuit decreases as the inductance value increases. The inductance L3 contributes to the formation of the attenuation pole in the BT / LAN. Note that, although Tx2 is a frequency band lower than Tx3, the inductor L2 has an inductance value smaller than the inductance L1. This is because the parallel resonators P2 and P3 to which the inductor L2 is connected are connected in parallel.
 インダクタL3は4.15nHと非常に大きなインダクタンス値を有する。このためインダクタL3として外付けのチップインダクタを用いることがあり、他のインダクタ及び共振器と同一のチップ内、又は同一のパッケージ内に形成することが困難となる場合がある。この結果、フィルタの小型化・低背化が困難となる。さらにフィルタを構成部品とするデュープレクサに小型化・低背化も難しくなる。 The inductor L3 has a very large inductance value of 4.15 nH. For this reason, an external chip inductor may be used as the inductor L3, and it may be difficult to form the inductor L3 in the same chip or in the same package as other inductors and resonators. As a result, it is difficult to reduce the size and height of the filter. In addition, it is difficult to reduce the size and height of a duplexer that uses a filter as a component.
 次にインダクタンス値を抑制したラダー型フィルタについて説明する。図6(a)はキャパシタを追加したラダー型フィルタの構成図であり、図6(b)はキャパシタを追加したラダー型フィルタの減衰特性を示す図である。 Next, a ladder filter with a suppressed inductance value will be described. FIG. 6A is a configuration diagram of a ladder type filter to which a capacitor is added, and FIG. 6B is a diagram illustrating attenuation characteristics of the ladder type filter to which a capacitor is added.
 図6(a)に示すように、ラダー型フィルタF13はキャパシタC1を備える。キャパシタC1はインダクタL3(第1インダクタ)に並列接続されている。図中に破線で囲んだように、並列共振器P1とインダクタL1とを備える並列腕を並列腕Paとする。並列共振器P2とインダクタL2とを備える並列腕と、並列共振器P3とインダクタL2とを備える並列腕とを合わせて並列腕Pbとする。並列共振器P4とインダクタL3とキャパシタC1とを備える並列腕を並列腕Pc(第1並列腕)とする。 As shown in FIG. 6A, the ladder filter F13 includes a capacitor C1. The capacitor C1 is connected in parallel to the inductor L3 (first inductor). As surrounded by a broken line in the figure, a parallel arm including the parallel resonator P1 and the inductor L1 is defined as a parallel arm Pa. A parallel arm including the parallel resonator P2 and the inductor L2 and a parallel arm including the parallel resonator P3 and the inductor L2 are combined to form a parallel arm Pb. A parallel arm including the parallel resonator P4, the inductor L3, and the capacitor C1 is defined as a parallel arm Pc (first parallel arm).
 ラダー型フィルタF13は、ラダー型フィルタF12と同じ帯域に減衰極を形成するフィルタである。図6(b)で後述するように、キャパシタC1を並列接続することで、インダクタL3のインダクタンス値Lを大幅に小さくすることができた。 The ladder filter F13 is a filter that forms an attenuation pole in the same band as the ladder filter F12. As described later in FIG. 6 (b), by parallel connection of a capacitor C1, an inductance value L 3 of the inductor L3 can be greatly reduced.
 図6(b)ではラダー型フィルタF12の減衰特性とラダー型フィルタF13の減衰特性とを重ねて示している。ラダー型フィルタF12の減衰特性を点線、ラダー型フィルタF13の減衰特性を実線で図示している。ラダー型フィルタF12の計算のパラメータは、図5(b)の計算に用いたものと同じである。ラダー型フィルタF13の計算のパラメータは、次のインダクタL3及びキャパシタC1に関するもの以外は、ラダー型フィルタF12の計算のパラメータと同じである。
インダクタL3のインダクタンス値L:2.00nH
キャパシタC1の容量値C:1.07pF
ここではキャパシタC1を接続し、図5(b)と同じ周波数帯域に減衰極が形成されるように、インダクタL3のインダクタンス値Lを調整した。
In FIG. 6B, the attenuation characteristic of the ladder type filter F12 and the attenuation characteristic of the ladder type filter F13 are overlapped. The attenuation characteristic of the ladder type filter F12 is illustrated by a dotted line, and the attenuation characteristic of the ladder type filter F13 is illustrated by a solid line. The calculation parameters of the ladder filter F12 are the same as those used in the calculation of FIG. The calculation parameters of the ladder type filter F13 are the same as the calculation parameters of the ladder type filter F12 except those relating to the next inductor L3 and capacitor C1.
Inductance value L 3 of inductor L3: 2.00 nH
Capacitance value C 1 of capacitor C 1 : 1.07 pF
This connects the capacitors C1, as FIG. 5 (b) and the attenuation pole in the same frequency band are formed, to adjust the inductance value L 3 of the inductor L3.
 図6(b)に示すように、ラダー型フィルタF12及びラダー型フィルタF13の各々の減衰特性には、BT/LAN、Tx2倍波、及びTx3倍波の各々に対応する周波数帯域に減衰極が形成された。つまり、キャパシタC1と、インダクタL3と、並列共振器P4とを有する並列腕Pc(第1並列腕)が形成する減衰極は、他の並列腕Pa及びPb(第2並列腕)の各々が形成する減衰極よりも低周波側に位置する。また並列腕Pcが形成する減衰極は、フィルタの通過帯域よりも高周波側に位置する。並列腕Paが形成する減衰極はTx3倍波に位置し、並列腕Pbが形成する減衰極はTx2倍波に位置することは、ラダー型フィルタF12の場合と同様である。つまり並列腕Pcが形成する減衰極は、フィルタの通過帯域とTx2倍波との間に位置する。 As shown in FIG. 6B, the attenuation characteristics of the ladder type filter F12 and the ladder type filter F13 include attenuation poles in frequency bands corresponding to BT / LAN, Tx second harmonic, and Tx third harmonic, respectively. Been formed. That is, the attenuation pole formed by the parallel arm Pc (first parallel arm) having the capacitor C1, the inductor L3, and the parallel resonator P4 is formed by each of the other parallel arms Pa and Pb (second parallel arm). It is located on the lower frequency side than the attenuation pole. The attenuation pole formed by the parallel arm Pc is located on the higher frequency side than the pass band of the filter. The attenuation pole formed by the parallel arm Pa is located at the Tx third harmonic, and the attenuation pole formed by the parallel arm Pb is located at the Tx second harmonic, as in the case of the ladder filter F12. That is, the attenuation pole formed by the parallel arm Pc is located between the passband of the filter and the Tx second harmonic.
 表2は、ラダー型フィルタF13におけるインダクタンス値L~L及び容量値Cをまとめたものである。
Figure JPOXMLDOC01-appb-T000003
表2に点線で示すように、キャパシタC1を並列接続することにより、高調波及びBT/LANに減衰極を形成し、かつインダクタL3のインダクタンス値Lを大幅に小さくすることができた。またラダー型フィルタF13の方が、ラダー型フィルタF12と比較して、Tx2倍波の周波数帯域より高周波数側での減衰量が大きくなった。また減衰量の増大は、高周波数帯域の方が顕著であった。
Table 2 summarizes the inductance values L 1 to L 3 and the capacitance value C 1 in the ladder filter F13.
Figure JPOXMLDOC01-appb-T000003
As shown by the dotted line in Table 2, by parallel connection of a capacitor C1, to form an attenuation pole at harmonics and BT / LAN, and the inductance value L 3 of the inductor L3 can be greatly reduced. Further, the ladder type filter F13 has a larger attenuation amount on the higher frequency side than the frequency band of the Tx second harmonic compared with the ladder type filter F12. Further, the increase in attenuation was more remarkable in the high frequency band.
 さらに容量値及びインダクタンス値を変化させた場合について説明する。ラダー型フィルタF13において、同じ周波数帯域に減衰極が形成されるようにキャパシタC1の容量値C及びインダクタL3のインダクタンス値Lを変化させて、減衰特性の計算を行った。図7(a)は容量値とインダクタンス値との関係を示す図であり、図7(b)はインダクタンス値を変化させたラダー型フィルタの減衰特性を示す図である。 Further, a case where the capacitance value and the inductance value are changed will be described. In the ladder type filter F13, by changing the inductance value L 3 of the capacitance value C 1 and the inductor L3 of the capacitor C1 as the attenuation pole in the same frequency band are formed, was calculated attenuation characteristics. FIG. 7A is a diagram showing the relationship between the capacitance value and the inductance value, and FIG. 7B is a diagram showing the attenuation characteristic of the ladder filter with the inductance value changed.
 図7(a)の横軸はキャパシタC1の容量値C、縦軸はインダクタL3のインダクタンス値Lを表す。図7(a)に示すように、キャパシタC1の容量値Cが大きくなるに伴い、インダクタL3のインダクタンス値Lは小さくなった。 In FIG. 7A, the horizontal axis represents the capacitance value C 1 of the capacitor C1, and the vertical axis represents the inductance value L 3 of the inductor L3. As shown in FIG. 7 (a), with the capacitance value C 1 of the capacitor C1 increases, the inductance value L 3 of the inductor L3 is reduced.
 図7(b)において、太い実線はL=4.0nHの場合を示す。太い点線はL=3.5nHの場合を示す。太い破線はL=3.0nHの場合を示す。太い一点鎖線はL=2.5nHの場合を示す。細い実線はL=2.0nHの場合を示す。細い点線はL=1.5nHの場合を示す。細い破線はL=1.0nHの場合を示す。細い一点鎖線はL=0.5nHの場合を示す。 In FIG. 7 (b), a thick solid line shows the case of L 3 = 4.0nH. A thick dotted line indicates a case where L 3 = 3.5 nH. A thick broken line indicates a case where L 3 = 3.0 nH. A thick alternate long and short dash line indicates a case where L 3 = 2.5 nH. A thin solid line indicates a case where L 3 = 2.0 nH. A thin dotted line indicates a case where L 3 = 1.5 nH. A thin broken line indicates a case where L 3 = 1.0 nH. A thin alternate long and short dash line indicates a case where L 3 = 0.5 nH.
 図7(b)に示すように、キャパシタC1の容量値C及びインダクタL3のインダクタンス値Lを調整することで、ラダー型フィルタF13はラダー型フィルタF12と同じ周波数帯域(BT/LAN、Tx2倍波、及びTx3倍波)に減衰極を形成することができた。また、インダクタL3のインダクタンス値Lが小さくなることに伴い、言い換えればキャパシタC1の容量値Cが大きくなることに伴い、Tx2倍波より高周波帯域での減衰量が大きくなり、特性が改善した。 As shown in FIG. 7 (b), by adjusting the inductance value L 3 of the capacitance value C 1 and the inductor L3 of the capacitor C1, the ladder-type filter F13 is the same frequency band as the ladder-type filter F12 (BT / LAN, Tx2 Attenuation poles could be formed at the harmonic and Tx triple). Along with the inductance value L 3 of the inductor L3 is reduced, due to the capacitance value C 1 of capacitor C1 is increased in other words, the attenuation of a high frequency band is larger than Tx2 harmonic, characteristics were improved .
 次にインダクタンス値を抑制できる原理について説明する。図8(a)及び図8(b)は、ラダー型フィルタの並列腕の構成図である。図8(a)はラダー型フィルタF12の右端の並列腕を、図8(b)はラダー型フィルタF13の右端の並列腕Pcを、それぞれ抜き出したものである。なお式中では、インダクタL3のインダクタ値は、図8(a)の場合はL、図8(b)の場合はL3aとして、両者を区別する。 Next, the principle that the inductance value can be suppressed will be described. Fig.8 (a) and FIG.8 (b) are block diagrams of the parallel arm of a ladder type filter. FIG. 8A shows the right side parallel arm of the ladder filter F12, and FIG. 8B shows the right side parallel arm Pc of the ladder filter F13. In the equation, the inductor value of the inductor L3 is L 3 in the case of FIG. 8A and L 3a in the case of FIG.
 図8(a)に示すような並列腕は、既述したようにLC共振回路として機能する。共振周波数fは数式2で表される。
Figure JPOXMLDOC01-appb-M000004
図8(b)に示す並列腕PcもLC共振回路として機能する。共振周波数fは次の数式3で表される。
Figure JPOXMLDOC01-appb-M000005
ここで、図8(a)の共振回路と図8(b)の共振回路とで、同じ周波数帯域に減衰極が形成されるため、共振周波数とは等しくなる。つまり数式2=数式3となる。インダクタンス値L3aは次の数式4で表される。
Figure JPOXMLDOC01-appb-M000006
数式4より、キャパシタC1の付加によって、インダクタンス値L3aがLよりも小さくなることが分かる。
The parallel arm as shown in FIG. 8A functions as an LC resonance circuit as described above. The resonance frequency f 3 is expressed by Equation 2.
Figure JPOXMLDOC01-appb-M000004
The parallel arm Pc shown in FIG. 8B also functions as an LC resonance circuit. The resonance frequency f 4 is expressed by the following equation 3.
Figure JPOXMLDOC01-appb-M000005
Here, since the attenuation circuit is formed in the same frequency band in the resonance circuit of FIG. 8A and the resonance circuit of FIG. 8B, the resonance frequency becomes equal. That is, Formula 2 = Formula 3. The inductance value L 3a is expressed by the following mathematical formula 4.
Figure JPOXMLDOC01-appb-M000006
From Equation 4, by the addition of the capacitor C1, an inductance value L 3a is can be seen that less than L 3.
 次に並列腕のインピーダンスについて説明する。まず特許文献1及び2に記載された並列腕について説明する。図9(a)及び図9(b)はラダー型フィルタの並列腕の構成図であり、図9(c)は並列腕のインピーダンスを示す図である。特許文献1及び2の各々には、図9(a)及び図9(b)の各々に示した並列腕が記載されている。 Next, the impedance of the parallel arm will be explained. First, the parallel arms described in Patent Documents 1 and 2 will be described. FIGS. 9A and 9B are configuration diagrams of parallel arms of a ladder type filter, and FIG. 9C is a diagram illustrating impedance of the parallel arms. In each of Patent Documents 1 and 2, the parallel arm shown in each of FIGS. 9A and 9B is described.
 図9(a)に示す並列腕及び図9(b)に示す並列腕は、図8(b)に示す並列腕PcにインダクタL4を直列接続したものである。図9(a)においては、インダクタL4が並列共振器P4とインダクタL3との間に直列接続されている。図9(b)においては、インダクタL4及びキャパシタC1がインダクタL3と並列接続されている。インダクタL4はキャパシタC1と直列接続されている。 The parallel arm shown in FIG. 9 (a) and the parallel arm shown in FIG. 9 (b) are obtained by connecting an inductor L4 in series to the parallel arm Pc shown in FIG. 8 (b). In FIG. 9A, the inductor L4 is connected in series between the parallel resonator P4 and the inductor L3. In FIG. 9B, the inductor L4 and the capacitor C1 are connected in parallel with the inductor L3. The inductor L4 is connected in series with the capacitor C1.
 図9(c)の横軸は周波数、縦軸は並列腕のインピーダンスである。周波数fz1及びfz2においてインピーダンスがゼロになる。また周波数fにおいてインピーダンスは極限を示す。インピーダンスがゼロになる周波数fz1及びfz2の各々において、減衰極が形成される。つまり、図9(a)及び図9(b)の構成によって、複数の減衰極を形成することができる。しかしながら、周波数がfz2より高くなるにつれ、インピーダンスは増加し、正の値を有する。並列腕のインピーダンスが増加することにより、並列腕には信号が流れにくくなる。つまり並列腕のインピーダンスの増加により、フィルタの減衰特性が劣化する。 In FIG. 9C, the horizontal axis represents the frequency, and the vertical axis represents the impedance of the parallel arm. The impedance becomes zero at the frequencies f z1 and f z2 . The impedance represents the ultimate in frequency f p. An attenuation pole is formed at each of the frequencies f z1 and f z2 at which the impedance becomes zero. That is, a plurality of attenuation poles can be formed by the configurations of FIGS. 9A and 9B. However, as the frequency becomes higher than fz2 , the impedance increases and has a positive value. As the impedance of the parallel arms increases, it becomes difficult for signals to flow through the parallel arms. In other words, the attenuation characteristics of the filter deteriorate due to an increase in impedance of the parallel arms.
 次に図8(b)に示した並列腕Pcのインピーダンスについて説明する。図10は並列腕のインピーダンスを示す図である。 Next, the impedance of the parallel arm Pc shown in FIG. FIG. 10 is a diagram illustrating the impedance of the parallel arms.
 図10に示すように、周波数fよりも高い周波数において、インピーダンスはゼロに漸近する。インピーダンスがゼロに近づくことで、並列腕に信号が流れやすくなる。つまり高周波においてフィルタの抑圧が改善する。インピーダンスの変化は、前述の図6(b)に示した減衰特性において、周波数が高くなるほど、特性の改善が顕著であることにも表われている。 As shown in FIG. 10, at a frequency higher than the frequency f p, the impedance gradually approaches zero. As the impedance approaches zero, signals easily flow through the parallel arms. That is, the suppression of the filter is improved at a high frequency. The change in impedance also appears in the attenuation characteristic shown in FIG. 6B described above, where the improvement in the characteristic becomes more remarkable as the frequency becomes higher.
 以上の考察に基づいた本発明の実施例について説明する。実施例1は弾性波共振器を用いる例である。まずデュープレクサの構成について説明する。図11(a)はデュープレクサを例示するブロック図であり、図11(b)は携帯電話のRF(Radio Frequency)モジュールを例示するブロック図である。 An embodiment of the present invention based on the above consideration will be described. Example 1 is an example using an acoustic wave resonator. First, the configuration of the duplexer will be described. FIG. 11A is a block diagram illustrating a duplexer, and FIG. 11B is a block diagram illustrating a radio frequency (RF) module of a mobile phone.
 図11(a)に示すように、デュープレクサ100は受信フィルタ100a及び送信フィルタ100bを備えている。受信フィルタ100a及び送信フィルタ100bは共通に共通端子(アンテナ端子)102に接続されている。共通端子102はアンテナ104に接続されている。受信フィルタ100aは、アンテナ104から信号を受信し、受信した信号を例えばアンプ等に出力する。送信フィルタ100bは、アンプ等から入力された信号をアンテナ104に出力する。アンテナ104は信号を送信する。なおフィルタの構成については後述する。 As shown in FIG. 11A, the duplexer 100 includes a reception filter 100a and a transmission filter 100b. The reception filter 100a and the transmission filter 100b are connected to a common terminal (antenna terminal) 102 in common. The common terminal 102 is connected to the antenna 104. The reception filter 100a receives a signal from the antenna 104 and outputs the received signal to, for example, an amplifier. The transmission filter 100b outputs a signal input from an amplifier or the like to the antenna 104. The antenna 104 transmits a signal. The configuration of the filter will be described later.
 図11(b)に示すように、RFモジュール110は、アンテナ104、アンテナスイッチ112、デュープレクサバンク114、並びにアンプモジュール116を備える。RFモジュール110は、GSM(Global System for Mobile Communication)通信方式及びW-CDMA通信方式等、複数の通信方式に対応している。GSM方式については、850MHz帯(GSM850)、900MHz帯(GSM900)、1800MHz帯(GSM1800)、1900MHz帯(GSM1900)に対応している。アンテナ104は、GSM方式及びW-CDMA方式いずれの送受信信号をも送受信できる。デュープレクサバンク114は、複数のデュープレクサ114a,114b及び114cを含む。複数のデュープレクサの各々は、複数の通信方式の各々に対応したデュープレクサである。なお、デュープレクサバンク114が備えるデュープレクサは2つでもよいし、4つ以上でもよい。アンテナスイッチ112は、送受信する信号の通信方式に応じて、デュープレクサバンク114が備える複数のデュープレクサから、通信方式に対応するデュープレクサを選択し、選択されたデュープレクサとアンテナ104とを接続する。各デュープレクサはアンプモジュール116に接続されている。アンプモジュール116はデュープレクサの受信フィルタが受信した信号を増幅し、処理部に出力する。またアンプモジュール116は、処理部により生成された信号を増幅しデュープレクサの送信フィルタに出力する As shown in FIG. 11B, the RF module 110 includes an antenna 104, an antenna switch 112, a duplexer bank 114, and an amplifier module 116. The RF module 110 supports a plurality of communication systems such as a GSM (Global System for Mobile Communication) communication system and a W-CDMA communication system. The GSM system corresponds to the 850 MHz band (GSM850), 900 MHz band (GSM900), 1800 MHz band (GSM1800), and 1900 MHz band (GSM1900). The antenna 104 can transmit and receive both GSM and W-CDMA transmission / reception signals. The duplexer bank 114 includes a plurality of duplexers 114a, 114b, and 114c. Each of the plurality of duplexers is a duplexer corresponding to each of a plurality of communication methods. Note that the duplexer bank 114 may include two duplexers or four or more duplexers. The antenna switch 112 selects a duplexer corresponding to the communication method from a plurality of duplexers provided in the duplexer bank 114 according to the communication method of signals to be transmitted and received, and connects the selected duplexer and the antenna 104. Each duplexer is connected to an amplifier module 116. The amplifier module 116 amplifies the signal received by the reception filter of the duplexer and outputs the amplified signal to the processing unit. The amplifier module 116 amplifies the signal generated by the processing unit and outputs the amplified signal to the duplexer transmission filter.
 次に実施例1に係るデュープレクサの構成について説明する。図12(a)は実施例1に係るデュープレクサを例示する平面図であり、図12(b)は実施例1に係るデュープレクサを例示する断面図である。図12(b)は図12(a)のA-A1に沿った断面図である。 Next, the configuration of the duplexer according to the first embodiment will be described. FIG. 12A is a plan view illustrating the duplexer according to the first embodiment, and FIG. 12B is a cross-sectional view illustrating the duplexer according to the first embodiment. FIG. 12B is a cross-sectional view along AA1 in FIG.
 図12(a)及び図12(b)に示すように、実施例1に係るデュープレクサ100は、受信フィルタチップ100c、送信フィルタチップ100d、パッケージ基板120、及び封止部122を備える。図12(a)では封止部122を透視している。受信フィルタチップ100c及び送信フィルタチップ100dは、バンプ124によりパッケージ基板120上にフリップチップ実装されている。パッケージ基板120は例えばセラミック等の絶縁体からなる。パッケージ基板120は、第1層120-1、及び第1層120-1下の第2層120-2からなる二層構造の基板である。後述するように、パッケージ基板120の上面、中間層及び下面の各々には配線層120a,120b及び120cの各々が形成され、各配線層間はビア配線26により接続されている。配線層120bは、第1層120-1と第2層120-2との間に位置する。パッケージ基板120に設けられた配線の一部は、インダクタL1~L3として機能する。つまり受信フィルタチップ100c及び送信フィルタチップ100dがパッケージ基板120に実装されることで、受信フィルタ及び送信フィルタが実現される。封止部122は、例えばエポキシ樹脂等の絶縁体、又は半田等からなり、受信フィルタチップ100c及び送信フィルタチップ100dを封止する。バンプ124は例えば金(Au)等の金属からなる。 12A and 12B, the duplexer 100 according to the first embodiment includes a reception filter chip 100c, a transmission filter chip 100d, a package substrate 120, and a sealing unit 122. In FIG. 12A, the sealing portion 122 is seen through. The reception filter chip 100 c and the transmission filter chip 100 d are flip-chip mounted on the package substrate 120 with bumps 124. The package substrate 120 is made of an insulator such as ceramic. The package substrate 120 is a substrate having a two-layer structure including a first layer 120-1 and a second layer 120-2 below the first layer 120-1. As will be described later, wiring layers 120 a, 120 b, and 120 c are formed on the upper surface, intermediate layer, and lower surface of the package substrate 120, respectively, and the wiring layers are connected by via wirings 26. The wiring layer 120b is located between the first layer 120-1 and the second layer 120-2. Part of the wiring provided on the package substrate 120 functions as the inductors L1 to L3. That is, the reception filter chip 100c and the transmission filter chip 100d are mounted on the package substrate 120, thereby realizing a reception filter and a transmission filter. The sealing unit 122 is made of, for example, an insulator such as epoxy resin, or solder, and seals the reception filter chip 100c and the transmission filter chip 100d. The bumps 124 are made of a metal such as gold (Au).
 次にデュープレクサが備えるフィルタの構成について説明する。図13は実施例1に係るデュープレクサが備える送信フィルタチップを例示する平面図である。例とするフィルタチップは送信フィルタチップ100dとして説明する。 Next, the configuration of the filter provided in the duplexer will be described. FIG. 13 is a plan view illustrating a transmission filter chip included in the duplexer according to the first embodiment. An example filter chip is described as a transmission filter chip 100d.
 図13に示すように、送信フィルタチップ100dは、直列共振器S1~S4,並列共振器P1~P4,及びキャパシタC1は、櫛形電極を備える弾性表面波共振器により構成されている。 As shown in FIG. 13, the transmission filter chip 100d includes series resonators S1 to S4, parallel resonators P1 to P4, and a capacitor C1 each including a surface acoustic wave resonator including a comb-shaped electrode.
 直列共振器S1を例に、弾性表面波共振器の構成について説明する。直列共振器S1は、圧電基板10の上に、対向する一対の櫛形電極12を配置し、さらに櫛形電極12の両側に反射器14を配置することで構成される。櫛形電極12が電極指のピッチに応じた周波数の弾性波を励振する。反射器14は櫛形電極12から伝搬する弾性波を反射する。直列共振器S2~S4,及び並列共振器P1~P4についても同様の構成である。各弾性表面波共振器の弾性表面波の伝搬方向は同一である。またキャパシタC1は、直列共振器S1~S4及び並列共振器P1~P4の各々が備える櫛形電極と同じ金属層からなる櫛形電極を備える。キャパシタC1を形成する櫛形電極の電極指ピッチは、直列共振器S1~S4及び並列共振器P1~P4の各々が備える櫛形電極の電極指ピッチとは異なる。つまり、キャパシタC1は、キャパシタC1の共振周波数が送信フィルタの通過帯域外となるように設計されている。このためキャパシタC1において弾性表面波は励振されにくく、フィルタの特性への影響が抑制される。なお、キャパシタC1は反射器を備えなくてもよいが、Q値を改善するためには反射器を備えていることが好ましい。キャパシタC1の容量値は、電極指ピッチ又は電極指の交差幅を変更することで、調整することができる。 The configuration of the surface acoustic wave resonator will be described taking the series resonator S1 as an example. The series resonator S <b> 1 is configured by disposing a pair of opposing comb electrodes 12 on the piezoelectric substrate 10, and disposing reflectors 14 on both sides of the comb electrode 12. The comb electrode 12 excites an elastic wave having a frequency corresponding to the pitch of the electrode fingers. The reflector 14 reflects the elastic wave propagating from the comb electrode 12. The series resonators S2 to S4 and the parallel resonators P1 to P4 have the same configuration. The surface acoustic wave propagation directions of the surface acoustic wave resonators are the same. Capacitor C1 includes comb electrodes made of the same metal layer as the comb electrodes included in each of series resonators S1 to S4 and parallel resonators P1 to P4. The electrode finger pitch of the comb-shaped electrodes forming the capacitor C1 is different from the electrode finger pitch of the comb-shaped electrodes included in each of the series resonators S1 to S4 and the parallel resonators P1 to P4. That is, the capacitor C1 is designed so that the resonance frequency of the capacitor C1 is outside the pass band of the transmission filter. For this reason, the surface acoustic wave is hardly excited in the capacitor C1, and the influence on the filter characteristics is suppressed. The capacitor C1 does not need to include a reflector, but preferably includes a reflector in order to improve the Q value. The capacitance value of the capacitor C1 can be adjusted by changing the electrode finger pitch or the electrode finger crossing width.
 直列共振器S1を構成する櫛形電極はアンテナ端子Ant1に接続されている。アンテナ端子Ant1は、図10(b)に示したアンテナ104と接続される。直列共振器S4が備える櫛形電極は送信端子Tx1に接続されている。送信端子Tx1は、例えば図10(b)に示したアンプモジュール116に接続され、送信信号が入力する。並列共振器P1が備える櫛形電極は端子16aに接続されている。端子16aはインダクタL1に接続されている。並列共振器P2が備える櫛形電極及び並列共振器P3を構成する櫛形電極は、端子16bに接続されている。端子16bは、インダクタL2に接続されている。並列共振器P4が備える櫛形電極と、キャパシタC1が備える櫛形電極とは、配線18により接続されている。また配線18は端子16cに接続されている。端子16cはインダクタL3に接続されている。キャパシタC1が備える櫛形電極に接続された別の配線19は、端子16dに接続されている。端子16dは、パッケージ基板120が備えるグランド端子に接続されている。図中に白丸には、パッケージ基板120と接続するためのバンプ124が形成される。 The comb electrodes constituting the series resonator S1 are connected to the antenna terminal Ant1. The antenna terminal Ant1 is connected to the antenna 104 shown in FIG. The comb electrode included in the series resonator S4 is connected to the transmission terminal Tx1. The transmission terminal Tx1 is connected to the amplifier module 116 shown in FIG. 10B, for example, and receives a transmission signal. The comb electrode provided in the parallel resonator P1 is connected to the terminal 16a. The terminal 16a is connected to the inductor L1. The comb electrode included in the parallel resonator P2 and the comb electrode constituting the parallel resonator P3 are connected to the terminal 16b. The terminal 16b is connected to the inductor L2. The comb electrode provided in the parallel resonator P4 and the comb electrode provided in the capacitor C1 are connected by a wiring 18. The wiring 18 is connected to the terminal 16c. The terminal 16c is connected to the inductor L3. Another wiring 19 connected to the comb electrode included in the capacitor C1 is connected to the terminal 16d. The terminal 16d is connected to a ground terminal provided in the package substrate 120. Bumps 124 for connecting to the package substrate 120 are formed on the white circles in the drawing.
 圧電基板10は例えばリチウムタンタル酸(LiTaO)又はリチウムニオブ酸(LiNbO)等の圧電体からなる。櫛形電極12、反射器14、及び櫛形電極12を接続する配線は例えばアルミニウム(Al)等の金属からなり、同一の金属層から形成される。直列共振器S1~S4,並列共振器P1~P4,キャパシタC1、配線18、端子16a~16d、アンテナ端子Ant、及び送信端子Txは、同一の圧電基板上に形成され、かつ同一の金属層からなる。なお、図13では送信フィルタチップ100dについて説明したが、受信フィルタチップ100cが同様の構成からなるとしてもよい。受信フィルタチップ100cは、送信端子Tx1の代わりに受信端子Rx1を備える。 The piezoelectric substrate 10 is made of a piezoelectric material such as lithium tantalate (LiTaO 3 ) or lithium niobate (LiNbO 3 ). The comb-shaped electrode 12, the reflector 14, and the wiring connecting the comb-shaped electrode 12 are made of a metal such as aluminum (Al), and are formed of the same metal layer. The series resonators S1 to S4, the parallel resonators P1 to P4, the capacitor C1, the wiring 18, the terminals 16a to 16d, the antenna terminal Ant, and the transmission terminal Tx are formed on the same piezoelectric substrate and are formed from the same metal layer. Become. Although the transmission filter chip 100d has been described with reference to FIG. 13, the reception filter chip 100c may have the same configuration. The reception filter chip 100c includes a reception terminal Rx1 instead of the transmission terminal Tx1.
 次にパッケージ基板120について説明する。図14(a)から図14(c)は、実施例3に係るデュープレクサが備えるパッケージ基板を例示する平面図である。図14(a)はパッケージ基板120の上面を示す。図14(b)は第1層120-1を透視し、第2層120-2の上面を示す。図14(c)は第1層120-1及び第2層120-2を透視した図を示す。 Next, the package substrate 120 will be described. FIG. 14A to FIG. 14C are plan views illustrating the package substrate included in the duplexer according to the third embodiment. FIG. 14A shows the top surface of the package substrate 120. FIG. 14B shows the top surface of the second layer 120-2 through the first layer 120-1. FIG. 14C shows a perspective view of the first layer 120-1 and the second layer 120-2.
 図14(a)に示すように、パッケージ基板120の上面に設けられた配線層120aは、アンテナ端子Ant2、送信端子Tx2、受信端子Rx2、グランド端子GND1、並びに配線20a,22a及び24aを備える。図中の白丸は、図13のバンプ124が接続される箇所を表す。なお受信フィルタチップ100cと接続するためのバンプの位置は図示を省略している。 As shown in FIG. 14A, the wiring layer 120a provided on the upper surface of the package substrate 120 includes an antenna terminal Ant2, a transmission terminal Tx2, a reception terminal Rx2, a ground terminal GND1, and wirings 20a, 22a, and 24a. White circles in the figure represent locations where the bumps 124 in FIG. 13 are connected. Note that the positions of bumps for connection to the reception filter chip 100c are not shown.
 アンテナ端子Ant2は、送信フィルタチップ100dが備えるアンテナ端子Ant1と接続される。送信端子Tx2は、送信フィルタチップ100dが備える送信端子Tx1と接続される。受信端子Rx2は、受信フィルタチップ100cが備える受信端子Rx1と接続される。配線20aは、送信フィルタチップ100dが備える端子16aと接続される。配線22aは端子16bと接続される。配線24aは端子16cと接続される。グランド端子GND1は端子16dと接続される。それぞれの接続は、バンプ124を介して行われる。配線20aはインダクタL1の形成に寄与する。配線22aはインダクタL2の形成に寄与する。配線24aはインダクタL3の形成に寄与する。配線層120aの各構成は、ビア配線26により配線層120bの対応する各構成に接続されている。 The antenna terminal Ant2 is connected to the antenna terminal Ant1 provided in the transmission filter chip 100d. The transmission terminal Tx2 is connected to the transmission terminal Tx1 included in the transmission filter chip 100d. The reception terminal Rx2 is connected to the reception terminal Rx1 included in the reception filter chip 100c. The wiring 20a is connected to a terminal 16a included in the transmission filter chip 100d. The wiring 22a is connected to the terminal 16b. The wiring 24a is connected to the terminal 16c. The ground terminal GND1 is connected to the terminal 16d. Each connection is made via a bump 124. The wiring 20a contributes to the formation of the inductor L1. The wiring 22a contributes to the formation of the inductor L2. The wiring 24a contributes to the formation of the inductor L3. Each configuration of the wiring layer 120 a is connected to each corresponding configuration of the wiring layer 120 b by the via wiring 26.
 図14(b)に示すように、パッケージ基板120の第1層120-1と第2層120-2との間には、配線層120bが形成されている。配線層120bは、アンテナパターンAnt3、出力パターンTx3、入力パターンRx3、グランドパターンGND2、並びに配線20b,22b及び24bを備える。図中の白丸は、配線層120aと接続するためのビア配線26を示す。アンテナパターンAnt3は、配線層120aが備えるアンテナ端子Ant2と接続される。出力パターンTx3は送信端子Tx2と接続される。入力パターンRx3は受信端子Rx2と接続される。グランドパターンGND2はグランド端子GND1と接続される。配線20bは配線20aと接続される。配線22bは配線22aと接続される。配線24bは配線24cと接続される。それぞれの接続は、ビア配線26を介して行われる。配線20bはインダクタL1の形成に寄与する。配線22bはインダクタL2の形成に寄与する。配線24bはインダクタL3の形成に寄与する。 As shown in FIG. 14B, a wiring layer 120b is formed between the first layer 120-1 and the second layer 120-2 of the package substrate 120. The wiring layer 120b includes an antenna pattern Ant3, an output pattern Tx3, an input pattern Rx3, a ground pattern GND2, and wirings 20b, 22b, and 24b. White circles in the drawing indicate via wirings 26 for connection to the wiring layer 120a. The antenna pattern Ant3 is connected to the antenna terminal Ant2 provided in the wiring layer 120a. The output pattern Tx3 is connected to the transmission terminal Tx2. The input pattern Rx3 is connected to the receiving terminal Rx2. The ground pattern GND2 is connected to the ground terminal GND1. The wiring 20b is connected to the wiring 20a. The wiring 22b is connected to the wiring 22a. The wiring 24b is connected to the wiring 24c. Each connection is made via the via wiring 26. The wiring 20b contributes to the formation of the inductor L1. The wiring 22b contributes to the formation of the inductor L2. The wiring 24b contributes to the formation of the inductor L3.
 図14(c)に示すように、パッケージ基板120の下面に設けられた配線層120cは、アンテナ端子Ant4、送信端子Tx4、受信端子Rx4、及びグランド端子GND3を備える。図14(c)における白丸は、配線層120cと接続するためのビア配線26を示す。アンテナ端子Ant4は、配線層120bが備えるアンテナパターンAnt3と接続される。送信端子Tx4は出力パターンTx3と接続される。受信端子Rx4は入力パターンRx3と接続される。グランド端子GND3は、配線層120bが備える配線20b、配線22b、配線24b、及びグランドパターンGND2と接続される。配線層120cは、フットパターンとして機能する。 As shown in FIG. 14C, the wiring layer 120c provided on the lower surface of the package substrate 120 includes an antenna terminal Ant4, a transmission terminal Tx4, a reception terminal Rx4, and a ground terminal GND3. A white circle in FIG. 14C indicates the via wiring 26 for connecting to the wiring layer 120c. The antenna terminal Ant4 is connected to the antenna pattern Ant3 provided in the wiring layer 120b. The transmission terminal Tx4 is connected to the output pattern Tx3. The reception terminal Rx4 is connected to the input pattern Rx3. The ground terminal GND3 is connected to the wiring 20b, the wiring 22b, the wiring 24b, and the ground pattern GND2 included in the wiring layer 120b. The wiring layer 120c functions as a foot pattern.
 図14(a)から図14(c)に示すように、インダクタL1は配線20a及び20bにより形成される。インダクタL2は配線22a及び22bにより形成される。インダクタL3は配線24a及び24bにより形成される。つまりインダクタL1~L3は、パッケージ基板120に設けられる。送信フィルタチップ100dがパッケージ基板120に実装されることで、図6(a)に示したラダー型フィルタF13の構成を有する送信フィルタが形成される。 As shown in FIGS. 14A to 14C, the inductor L1 is formed by wirings 20a and 20b. The inductor L2 is formed by the wirings 22a and 22b. The inductor L3 is formed by wirings 24a and 24b. That is, the inductors L1 to L3 are provided on the package substrate 120. By mounting the transmission filter chip 100d on the package substrate 120, a transmission filter having the configuration of the ladder filter F13 illustrated in FIG. 6A is formed.
 実施例1において、圧電基板10上に形成された並列共振器P1~P4と、並列共振器P4に直列接続されたインダクタL3と、圧電基板10上に形成されインダクタL3と並列接続されたキャパシタC1と、並列共振器P4とキャパシタC1とを接続する配線18を備える送信フィルタを形成した。これにより、図6(b)に示すように、高周波数において減衰極を形成し、かつインダクタL3のインダクタ値を小さくすることができた。インダクタ値が小さくなるため、インダクタL3が小型化可能となった。つまりインダクタL3を、外付けの部品ではなく、例えば図14(a)から図14(c)に示したようにパッケージ基板120に形成することが可能となる。これにより、フィルタの小型化が可能となる。つまり小型化可能なフィルタが実現できる。さらに小型化されたフィルタを用いることで、デュープレクサ100の小型化も可能となる。 In the first embodiment, parallel resonators P1 to P4 formed on the piezoelectric substrate 10, an inductor L3 connected in series to the parallel resonator P4, and a capacitor C1 formed on the piezoelectric substrate 10 and connected in parallel to the inductor L3. And the transmission filter provided with the wiring 18 which connects the parallel resonator P4 and the capacitor C1 was formed. As a result, as shown in FIG. 6B, an attenuation pole can be formed at a high frequency, and the inductor value of the inductor L3 can be reduced. Since the inductor value is small, the inductor L3 can be downsized. That is, the inductor L3 can be formed on the package substrate 120 as shown in FIGS. 14A to 14C, for example, instead of an external component. Thereby, the filter can be miniaturized. That is, a filter that can be miniaturized can be realized. Further, the duplexer 100 can be downsized by using a downsized filter.
 また実施例1によれば、並列共振器P4とキャパシタC1と配線18とを同一の圧電基板10上に形成するため、送信フィルタチップ100dの小型化が可能となる。インダクタを、例えばフィルタチップ内の配線として形成する場合、又はワイヤボンディングに用いるワイヤとして形成する場合、配線を引き回すことがある。このためインダクタはフィルタの小型化の妨げとなる可能性がある。これに対し、キャパシタは、配線を引き回さなくてもよいため、インダクタよりも占有する面積を少なくすることができる。つまりキャパシタC1を送信フィルタチップ100d内に形成することで、フィルタ及びデュープレクサの小型化が可能となる。またインダクタL1~L3をパッケージ基板120内に形成する。言い換えればインダクタL1~L3を、パッケージ基板120内を引き回す配線として形成する。このため、フィルタおよびデュープレクサの小型化が可能となる。 Further, according to the first embodiment, since the parallel resonator P4, the capacitor C1, and the wiring 18 are formed on the same piezoelectric substrate 10, the transmission filter chip 100d can be downsized. For example, when the inductor is formed as a wiring in the filter chip or formed as a wire used for wire bonding, the wiring may be routed. For this reason, the inductor may hinder downsizing of the filter. On the other hand, since the capacitor does not have to be routed, it can occupy less area than the inductor. That is, by forming the capacitor C1 in the transmission filter chip 100d, it is possible to reduce the size of the filter and the duplexer. Inductors L1 to L3 are formed in the package substrate 120. In other words, the inductors L1 to L3 are formed as wirings that run around the package substrate 120. For this reason, the size of the filter and the duplexer can be reduced.
 例えば配線18がワイヤのように、大きなインダクタンス値を有する場合、キャパシタC1、インダクタL1、及び並列共振器P4を備える並列腕Pc(図6(a)参照)は、図9(a)又は図9(b)のような並列腕に相当する構成となる。この場合、図9(b)で説明したように、並列腕のインピーダンスが高周波側において大きくなり、減衰特性が悪化する。 For example, when the wiring 18 has a large inductance value such as a wire, the parallel arm Pc (see FIG. 6A) including the capacitor C1, the inductor L1, and the parallel resonator P4 is the same as FIG. 9A or FIG. The configuration corresponds to the parallel arm as shown in (b). In this case, as described with reference to FIG. 9B, the impedance of the parallel arm increases on the high frequency side, and the attenuation characteristic deteriorates.
 これに対し、実施例1における配線18は、例えばベタパターン等のように、インダクタとして機能しにくい配線である。また、配線18は、キャパシタC1を構成する櫛形電極よりも幅広の領域を含む。つまり、図13に示すように、配線18が含む領域の幅W1は、キャパシタC1が備える櫛形電極の幅W2よりも大きい。なお幅方向は、図13におけるキャパシタC1の電極指の配列方向である。配線18が含む領域の幅W1が、キャパシタC1が備える櫛形電極の幅よりも大きいことにより、配線18のインダクタンス成分を大幅に小さくすることができる。また配線18が含む領域の幅W1が、キャパシタC1が備える櫛形電極の幅W2と同一であっても、インダクタンス成分の低減は可能である。なお、図13に示すように、配線18の全体が、キャパシタC1が備える櫛形電極より幅が広くてもよい。この場合、配線18のインダクタンス成分がより小さくなる。また配線18のうち一部の領域が、キャパシタC1が備える櫛形電極よりも幅広で、他の領域はキャパシタC1が備える櫛形電極より幅が狭くてもよい。つまり、配線18は、キャパシタC1が備える櫛形電極の幅と同一の幅を有する領域、又は櫛形電極の幅よりも大きい幅を有する領域を含む。 On the other hand, the wiring 18 in the first embodiment is a wiring that does not easily function as an inductor, such as a solid pattern. Further, the wiring 18 includes a region wider than the comb-shaped electrode constituting the capacitor C1. That is, as shown in FIG. 13, the width W1 of the region included in the wiring 18 is larger than the width W2 of the comb electrode provided in the capacitor C1. The width direction is the arrangement direction of the electrode fingers of the capacitor C1 in FIG. Since the width W1 of the region included in the wiring 18 is larger than the width of the comb electrode included in the capacitor C1, the inductance component of the wiring 18 can be significantly reduced. Further, even if the width W1 of the region included in the wiring 18 is the same as the width W2 of the comb electrode included in the capacitor C1, the inductance component can be reduced. As shown in FIG. 13, the entire wiring 18 may be wider than the comb-shaped electrode included in the capacitor C1. In this case, the inductance component of the wiring 18 becomes smaller. Further, a part of the wiring 18 may be wider than the comb electrode included in the capacitor C1, and the other area may be narrower than the comb electrode included in the capacitor C1. That is, the wiring 18 includes a region having the same width as that of the comb electrode included in the capacitor C1 or a region having a width larger than the width of the comb electrode.
 つまり、配線18のインダクタ値は、インダクタンスL3のインダクタンス値よりも大幅に小さい。このため、図13の送信フィルタチップをパッケージ基板120に実装して形成される送信フィルタの回路構成は、図6(a)に示したラダー型フィルタF13の回路構成に相当する。すなわち、実施例1における並列腕Pcは、図9(a)及び図9(b)に示した並列腕において、L4を小さくした構成となり、図8(b)の構成となる。従って、並列腕Pcのインピーダンスは図10に示すように、高周波側でゼロに近づく。この結果、高周波側においてフィルタの減衰特性が改善する。 That is, the inductor value of the wiring 18 is significantly smaller than the inductance value of the inductance L3. For this reason, the circuit configuration of the transmission filter formed by mounting the transmission filter chip of FIG. 13 on the package substrate 120 corresponds to the circuit configuration of the ladder filter F13 shown in FIG. That is, the parallel arm Pc in the first embodiment has a configuration in which L4 is reduced in the parallel arm shown in FIGS. 9A and 9B, and the configuration in FIG. 8B. Therefore, the impedance of the parallel arm Pc approaches zero on the high frequency side as shown in FIG. As a result, the attenuation characteristics of the filter are improved on the high frequency side.
 各共振器が弾性表面波共振器からなり、かつキャパシタC1は各共振器が備える櫛形電極と同じ金属層からなる櫛形電極を備える。同一の金属層をパターニングすることで、各共振器及びキャパシタC1を形成することができるため、工程を簡略化し、フィルタ及びデュープレクサを低コスト化することができる。また、パターニングにより、キャパシタC1を精度高く形成することが可能となる。さらに、電極指の本数又は電極指ピッチを変更することで、キャパシタC1の容量値を容易に調整することができる。圧電基板10上の配線及び端子を、櫛形電極及び反射器と同一の金属層から形成することで、工程をより簡略化することができる。 Each resonator is formed of a surface acoustic wave resonator, and the capacitor C1 includes a comb electrode made of the same metal layer as the comb electrode included in each resonator. By patterning the same metal layer, each resonator and capacitor C1 can be formed. Therefore, the process can be simplified, and the cost of the filter and the duplexer can be reduced. Further, the capacitor C1 can be formed with high accuracy by patterning. Furthermore, the capacitance value of the capacitor C1 can be easily adjusted by changing the number of electrode fingers or the electrode finger pitch. By forming the wiring and terminals on the piezoelectric substrate 10 from the same metal layer as the comb electrodes and the reflector, the process can be further simplified.
 キャパシタC1は例えばインダクタL1及びL2のいずれかと並列接続してもよい。例えばインダクタL1とキャパシタC1が並列接続されることで、Tx3倍波の減衰極に寄与するインダクタL1のインダクタンス値を小さくすることができる。ただし、表1に示すように、減衰局の中で最も低周波側に位置するBT/LANの減衰極に寄与するインダクタL3のインダクタンス値が大きい。このため、インダクタL1~L3のうち、インダクタL3が大型化する可能性が高い。従って、インダクタL3とキャパシタC1とを並列接続することで、フィルタをより効果的に小型化することが可能となる。また、図6(b)に示すように、並列腕PcがキャパシタC1を備えることで、高周波側の減衰特性が改善する。従って、フィルタの小型化及び減衰特性改善のために、並列腕Pcが形成する減衰極は、並列腕Pa及び並列腕Pbの各々が形成する減衰極より低周波側に位置することが好ましい。 The capacitor C1 may be connected in parallel with, for example, one of the inductors L1 and L2. For example, when the inductor L1 and the capacitor C1 are connected in parallel, the inductance value of the inductor L1 that contributes to the attenuation pole of the Tx third harmonic can be reduced. However, as shown in Table 1, the inductance value of the inductor L3 that contributes to the attenuation pole of the BT / LAN located on the lowest frequency side in the attenuation station is large. For this reason, the inductor L3 is likely to increase in size among the inductors L1 to L3. Therefore, the filter can be more effectively downsized by connecting the inductor L3 and the capacitor C1 in parallel. Further, as shown in FIG. 6B, the parallel arm Pc includes the capacitor C1, so that the attenuation characteristic on the high frequency side is improved. Therefore, in order to reduce the size of the filter and improve the attenuation characteristics, it is preferable that the attenuation pole formed by the parallel arm Pc is located on the lower frequency side than the attenuation pole formed by each of the parallel arm Pa and the parallel arm Pb.
 また既述したように、混変調及び干渉を抑制するためには、減衰極をTx2倍波、Tx3倍波、及びBT/LANに形成することが好ましい。言い換えれば、並列腕Paが形成する減衰極はTx3倍波に位置し、並列腕Pbが形成する減衰極はTx2倍波に位置することが好ましい。上述のように、並列腕Pcが形成する減衰極は、並列腕Pa及び並列腕Pbの各々が形成する減衰極より低周波側、特にBT/LANに位置することが好ましい。 As described above, in order to suppress cross modulation and interference, it is preferable to form attenuation poles at Tx second harmonic, Tx third harmonic, and BT / LAN. In other words, the attenuation pole formed by the parallel arm Pa is preferably located at the Tx third harmonic, and the attenuation pole formed by the parallel arm Pb is preferably located at the Tx second harmonic. As described above, the attenuation pole formed by the parallel arm Pc is preferably located on the lower frequency side, particularly BT / LAN, than the attenuation pole formed by each of the parallel arm Pa and the parallel arm Pb.
 送信フィルタの減衰特性は、通過帯域より高周波側で悪化する可能性がある。従って、送信フィルタの高周波側の特性を改善することで、デュープレクサの特性を改善することができる。また一般に、受信用の周波数帯域は、送信用の周波数帯域より高周波側に位置する。このため、図6(b)のように、送信フィルタの高周波側の特性を改善することで、受信信号と送信信号との混信等を抑制することができる。つまり、並列腕Pcが形成する減衰極は、送信フィルタの通過帯域より高周波側に位置することが好ましい。なお、送信フィルタ及び受信フィルタの両方、又は受信フィルタのみに図6(b)のようなフィルタを採用してもよいが、上記のように送信フィルタに採用することが特に好ましい。さらに、図13に示したフィルタは、デュープレクサ以外にも、フィルタ単体として用いることもできる。 The attenuation characteristics of the transmission filter may deteriorate at higher frequencies than the passband. Therefore, the characteristics of the duplexer can be improved by improving the characteristics on the high frequency side of the transmission filter. In general, the frequency band for reception is located on the higher frequency side than the frequency band for transmission. For this reason, as shown in FIG. 6B, by improving the characteristics on the high frequency side of the transmission filter, it is possible to suppress interference between the reception signal and the transmission signal. That is, it is preferable that the attenuation pole formed by the parallel arm Pc is located on the higher frequency side than the pass band of the transmission filter. Note that a filter as shown in FIG. 6B may be employed for both the transmission filter and the reception filter, or only for the reception filter, but it is particularly preferable to employ the filter for the transmission filter as described above. Furthermore, the filter shown in FIG. 13 can be used as a single filter in addition to the duplexer.
 減衰極はBT/LAN、Tx2倍波、及びTx3倍波のそれぞれに対応する帯域に形成したが、上記3つの少なくとも1つの帯域に減衰極を形成してもよい。また上記3つ以外の帯域に減衰極を形成してもよい。減衰極が形成される帯域は、容量値およびインダクタンス値を調節することで、変更することができる。なお、キャパシタC1の容量値Cが大きすぎると、減衰極が図6(b)の下方向に鋭く尖った形状となり、所望の帯域(BT/LAN等)において抑圧が不十分となり、減衰特性が悪化する可能性がある。減衰特性を効果的に改善するために、キャパシタC1の容量値Cは、所望の帯域において、減衰量が大きくなるように調節することが好ましい。 The attenuation poles are formed in bands corresponding to BT / LAN, Tx second harmonic, and Tx third harmonic, respectively, but attenuation poles may be formed in at least one of the three bands. An attenuation pole may be formed in a band other than the above three bands. The band in which the attenuation pole is formed can be changed by adjusting the capacitance value and the inductance value. Incidentally, the capacitance value C 1 of the capacitor C1 is too large, the attenuation pole becomes a sharply pointed shape in the downward direction of FIG. 6 (b), insufficient suppression in the desired band (BT / LAN etc.), the damping characteristics Can get worse. To improve the attenuation characteristic effectively, the capacitance value C 1 of the capacitor C1, the desired band, it is preferable to adjust so that the attenuation amount increases.
 各共振器は弾性表面波共振器からなるとしたが、例えば弾性境界波共振器のような、他の弾性波共振器からなるとしてもよい。パッケージ基板120は二層構造としたが、単層構造でもよいし、三層以上の多層構造としてもよい。インダクタL1~L3は複数の配線層からなるとしてもよいし、単一の配線層に設けてもよい。 Each resonator is composed of a surface acoustic wave resonator, but may be composed of another acoustic wave resonator such as a boundary acoustic wave resonator. Although the package substrate 120 has a two-layer structure, it may have a single-layer structure or a multilayer structure of three or more layers. The inductors L1 to L3 may be composed of a plurality of wiring layers, or may be provided in a single wiring layer.
 次に実施例1の変形例について説明する。図15は実施例1の変形例に係るデュープレクサが備える送信フィルタチップを例示する平面図である。既述した構成と同じ構成については説明を省略する。 Next, a modification of the first embodiment will be described. FIG. 15 is a plan view illustrating a transmission filter chip provided in a duplexer according to a modification of the first embodiment. The description of the same configuration as that already described is omitted.
 図15に示すように、キャパシタC1が備える櫛形電極の弾性表面波の伝搬方向が、直列共振器S1~S4及び並列共振器P1~P4と、例えば90°異なっている。これによりキャパシタC1において弾性表面波が励振されにくくなる。なお、キャパシタC1と、直列共振器S1~S4及び並列共振器P1~P4とでは、弾性表面波の伝搬方向が異なっていれば弾性表面波の励振は抑制される。ただし弾性表面波の励振を効果的に抑制するためには、伝搬方向の違いは90°であることが好ましい。 As shown in FIG. 15, the propagation direction of the surface acoustic wave of the comb-shaped electrode included in the capacitor C1 differs from the series resonators S1 to S4 and the parallel resonators P1 to P4 by, for example, 90 °. This makes it difficult for the surface acoustic wave to be excited in the capacitor C1. If the propagation direction of the surface acoustic wave is different between the capacitor C1, the series resonators S1 to S4 and the parallel resonators P1 to P4, the excitation of the surface acoustic wave is suppressed. However, in order to effectively suppress the excitation of the surface acoustic wave, the difference in the propagation direction is preferably 90 °.
 実施例2は圧電薄膜共振器を用いる例である。デュープレクサの構成は既述したものと同じであるため、説明を省略する。次に圧電薄膜共振器について説明する。図16(a)は圧電薄膜共振器を例示する平面図であり、図16(b)は圧電薄膜共振器を例示する断面図である。図16(b)は、図16(a)のB-B1に沿った断面図である。 Example 2 is an example using a piezoelectric thin film resonator. Since the configuration of the duplexer is the same as that already described, description thereof is omitted. Next, the piezoelectric thin film resonator will be described. FIG. 16A is a plan view illustrating a piezoelectric thin film resonator, and FIG. 16B is a cross-sectional view illustrating a piezoelectric thin film resonator. FIG. 16B is a cross-sectional view taken along the line BB1 of FIG.
 図16(a)に示すように、圧電薄膜共振器130は、基板132、下部電極134、上部電極136、及び圧電薄膜138を備える。図16(b)に示すように、下部電極134と上部電極136とが、圧電薄膜138を挟んでいる。下部電極134、圧電薄膜138及び上部電極136が重なる領域140において弾性波が励振される。領域140下には、基板132を貫通する貫通孔142が形成されている。このため、弾性波の励振は妨げられない。基板132は例えばシリコン、ガラス等からなる。下部電極134及び上部電極136は、例えばアルミニウム(Al)、銅(Cu)、モリブデン(Mo)、タングステン(W)、タンタル(Ta)、白金(Pt)、ルテニウム(Ru)、ロジウム(Rh)、イリジウム(Ir)、クロム(Cr)、チタン(Ti)等またはこれらを組み合わせた膜を用いることができる。圧電薄膜138は、例えば窒化アルミニウム(AlN)、酸化亜鉛(ZnO)、チタン酸ジルコン酸鉛(PZT)、チタン酸鉛(PbTiO3)等からなる。圧電薄膜共振器では、下部電極134及び上部電極136それぞれの電極膜厚を調整することで、共振周波数を調整することができる。 As shown in FIG. 16A, the piezoelectric thin film resonator 130 includes a substrate 132, a lower electrode 134, an upper electrode 136, and a piezoelectric thin film 138. As shown in FIG. 16B, the lower electrode 134 and the upper electrode 136 sandwich the piezoelectric thin film 138. Elastic waves are excited in a region 140 where the lower electrode 134, the piezoelectric thin film 138, and the upper electrode 136 overlap. A through hole 142 that penetrates the substrate 132 is formed under the region 140. For this reason, excitation of elastic waves is not hindered. The substrate 132 is made of, for example, silicon or glass. The lower electrode 134 and the upper electrode 136 include, for example, aluminum (Al), copper (Cu), molybdenum (Mo), tungsten (W), tantalum (Ta), platinum (Pt), ruthenium (Ru), rhodium (Rh), A film made of iridium (Ir), chromium (Cr), titanium (Ti), or the like or a combination thereof can be used. The piezoelectric thin film 138 is made of, for example, aluminum nitride (AlN), zinc oxide (ZnO), lead zirconate titanate (PZT), lead titanate (PbTiO 3 ), or the like. In the piezoelectric thin film resonator, the resonance frequency can be adjusted by adjusting the electrode film thickness of each of the lower electrode 134 and the upper electrode 136.
 さらに圧電薄膜共振器の他の構成例について説明する。図17(a)から図17(c)は圧電薄膜共振器を例示する断面図である。図17(a)から図17(c)は、図16(a)のB-B1に沿った断面図である。 Further, another configuration example of the piezoelectric thin film resonator will be described. FIG. 17A to FIG. 17C are cross-sectional views illustrating a piezoelectric thin film resonator. FIGS. 17A to 17C are cross-sectional views taken along the line BB1 of FIG.
 図17(a)に示すように、基板132にキャビティ144が設けられていてもよい。図17(b)に示すように、下部電極134、上部電極136及び圧電薄膜138が隆起し、下部電極134と基板132との間に空隙146が形成されていてもよい。図17(c)に示すように、基板132と下部電極134及び圧電薄膜138との間に音響反射膜148が設けられていてもよい。音響反射膜148は、音響インピーダンスが高い膜と低い膜を交互にλ/4(λ:弾性波の波長)の膜厚で積層された構造である。フィルタには、図16(b)、図17(a)及び図17(b)FBAR(Film Bulk Acoustic Resonator)タイプ、又は図17(c)のSMR(Solidly Mounted Resonator)タイプのいずれの圧電薄膜共振器を用いてもよい。 As shown in FIG. 17A, a cavity 144 may be provided in the substrate 132. As shown in FIG. 17B, the lower electrode 134, the upper electrode 136, and the piezoelectric thin film 138 may be raised, and a gap 146 may be formed between the lower electrode 134 and the substrate 132. As shown in FIG. 17C, an acoustic reflection film 148 may be provided between the substrate 132, the lower electrode 134, and the piezoelectric thin film 138. The acoustic reflection film 148 has a structure in which a film having a high acoustic impedance and a film having a low acoustic impedance are alternately stacked with a film thickness of λ / 4 (λ: wavelength of elastic wave). 16 (b), 17 (a) and 17 (b) FBAR (Film Bulk Acoustic Resonator) type or SMR (Solidly Mounted Resonator) type in FIG. 17 (c). A vessel may be used.
 図18は実施例2に係るデュープレクサが備える送信フィルタチップを例示する平面図である。既述した構成と同じ構成については説明を省略する。図18に示すように、直列共振器S1~S4、及び並列共振器P1~P4、は圧電薄膜共振器からなる。図中では、圧電薄膜共振器を網掛けで図示した。基板132は、上述のように例えばシリコン又はガラス等からなる非圧電基板である。キャパシタC1は、各共振器が備える下部電極と同じ金属層からなる下部電極を備える。またキャパシタC1は、各共振器が備える上部電極と同じ金属層からなる上部電極を備える。つまりキャパシタC1は、各共振器と同様、下部電極と上部電極とで圧電薄膜を挟んだ構成を有する。キャパシタC1は、キャパシタC1の共振周波数がフィルタの通過帯域外となるように設計されている。その他の構成は、図13に示したものと同じである。 FIG. 18 is a plan view illustrating a transmission filter chip included in the duplexer according to the second embodiment. The description of the same configuration as that already described is omitted. As shown in FIG. 18, the series resonators S1 to S4 and the parallel resonators P1 to P4 are formed of piezoelectric thin film resonators. In the drawing, the piezoelectric thin film resonator is shown by shading. As described above, the substrate 132 is a non-piezoelectric substrate made of, for example, silicon or glass. The capacitor C1 includes a lower electrode made of the same metal layer as the lower electrode included in each resonator. The capacitor C1 includes an upper electrode made of the same metal layer as the upper electrode included in each resonator. That is, the capacitor C1 has a configuration in which the piezoelectric thin film is sandwiched between the lower electrode and the upper electrode, like each resonator. The capacitor C1 is designed so that the resonance frequency of the capacitor C1 is outside the passband of the filter. Other configurations are the same as those shown in FIG.
 実施例2によれば、実施例1と同様に、高周波数において減衰極を形成し、フィルタを小型化することが可能となった。また各共振器とキャパシタC1とは、同一の金属層から下部電極尾帯上部電極の各々を形成し、かつ同一の圧電膜から圧電薄膜を形成することができる。つまり同一の層をパターニングすることで、一括して各共振器とキャパシタC1とを形成できるため、工程を簡略化することができる。また、キャパシタC1には、圧電薄膜138に代えて、例えば酸化シリコン(SiO)又は窒化シリコン(Si)等からなる誘電膜を用いてもよい。これにより、キャパシタC1の容量を調整でき、かつキャパシタC1における弾性波の励振を抑制することができる。また下部電極134及び上部電極136の大きさ、又は電極間の距離を変更することで、キャパシタC1の容量値を容易に調整することが可能となる。 According to the second embodiment, similarly to the first embodiment, the attenuation pole is formed at a high frequency, and the filter can be downsized. Each resonator and the capacitor C1 can form the lower electrode tailband upper electrode from the same metal layer, and can form a piezoelectric thin film from the same piezoelectric film. That is, by patterning the same layer, each resonator and the capacitor C1 can be formed at a time, so that the process can be simplified. In addition, instead of the piezoelectric thin film 138, a dielectric film made of, for example, silicon oxide (SiO 2 ) or silicon nitride (Si 3 N 4 ) may be used for the capacitor C1. Thereby, the capacity | capacitance of the capacitor C1 can be adjusted and the excitation of the elastic wave in the capacitor C1 can be suppressed. Further, the capacitance value of the capacitor C1 can be easily adjusted by changing the size of the lower electrode 134 and the upper electrode 136 or the distance between the electrodes.
 次に実施例2の変形例について説明する。図19は実施例2の変形例に係るデュープレクサが備える送信フィルタチップを例示する平面図である。図19に示すように、キャパシタC1は対向する櫛形電極からなる。基板132は非圧電基板であるため、櫛形電極は弾性波を励振するものではなく、キャパシタC1として機能する。つまり弾性波共振器と圧電薄膜共振器とを組み合わせて用いてもよい。 Next, a modification of the second embodiment will be described. FIG. 19 is a plan view illustrating a transmission filter chip included in a duplexer according to a modification of the second embodiment. As shown in FIG. 19, the capacitor C1 is composed of opposing comb electrodes. Since the substrate 132 is a non-piezoelectric substrate, the comb electrode does not excite an elastic wave and functions as the capacitor C1. That is, you may use combining an elastic wave resonator and a piezoelectric thin film resonator.
 以上、本発明の実施例について詳述したが、本発明はかかる特定の実施例に限定されるものではなく、特許請求の範囲に記載された本発明の要旨の範囲内において、種々の変形・変更が可能である。 Although the embodiments of the present invention have been described in detail above, the present invention is not limited to such specific embodiments, and various modifications and changes can be made within the scope of the gist of the present invention described in the claims. It can be changed.

Claims (13)

  1.  直列共振器と、
     基板上に形成され、前記直列共振器と並列接続された並列共振器と、
     前記並列共振器に直列接続されたインダクタと、
     前記基板上に形成され、前記インダクタに並列接続されたキャパシタと、
     前記基板上に形成され、前記並列共振器と前記キャパシタとを接続する配線と、を具備することを特徴とするフィルタ。
    A series resonator;
    A parallel resonator formed on a substrate and connected in parallel with the series resonator;
    An inductor connected in series to the parallel resonator;
    A capacitor formed on the substrate and connected in parallel to the inductor;
    A filter comprising: a wiring formed on the substrate and connecting the parallel resonator and the capacitor.
  2.  複数の前記並列共振器の各々に前記インダクタが直列接続され、
     複数の前記インダクタのうち第1インダクタに前記キャパシタが並列接続され、
     前記キャパシタと、前記第1インダクタと、前記第1インダクタと直列接続された並列共振器とを有する第1並列腕が形成する減衰極は、
     前記第1インダクタ以外のインダクタと、前記第1インダクタ以外のインダクタと直列接続された並列共振器とを有する第2並列腕が形成する減衰極よりも低周波側に位置することを特徴とする請求項1記載のフィルタ。
    The inductor is connected in series to each of the plurality of parallel resonators,
    The capacitor is connected in parallel to a first inductor among the plurality of inductors,
    An attenuation pole formed by a first parallel arm having the capacitor, the first inductor, and a parallel resonator connected in series with the first inductor is:
    It is located in the low frequency side rather than the attenuation pole which a 2nd parallel arm which has an inductor other than the said 1st inductor and a parallel resonator connected in series with an inductor other than the said 1st inductor forms. Item 10. The filter according to item 1.
  3.  前記第1並列腕が形成する減衰極は、複数の前記第2並列腕の各々が形成する減衰極より低周波側に位置することを特徴とする請求項2記載のフィルタ。 3. The filter according to claim 2, wherein the attenuation pole formed by the first parallel arm is located on a lower frequency side than the attenuation pole formed by each of the plurality of second parallel arms.
  4.  前記第1並列腕が形成する減衰極は、前記フィルタの通過帯域より高周波側に位置することを特徴とする請求項2又は3記載のフィルタ。 The filter according to claim 2 or 3, wherein the attenuation pole formed by the first parallel arm is located on a higher frequency side than a pass band of the filter.
  5.  前記第2並列腕が形成する減衰極は、前記フィルタの通過帯域の2倍波に相当する周波数帯域に位置し、
     前記第1並列腕が形成する減衰極は、前記フィルタの通過帯域と、前記通過帯域の2倍波に相当する周波数帯域との間の周波数帯域に位置することを特徴とする請求項2から4いずれか一項記載のフィルタ。
    The attenuation pole formed by the second parallel arm is located in a frequency band corresponding to a second harmonic of the pass band of the filter,
    5. The attenuation pole formed by the first parallel arm is located in a frequency band between a pass band of the filter and a frequency band corresponding to a second harmonic of the pass band. The filter according to any one of the above.
  6.  前記フィルタの通過帯域は、携帯電話の送信周波数帯域であり、
     前記第1並列腕が形成する減衰極は、ブルートゥースの使用周波数帯域、又は無線LANの使用周波数帯域に位置することを特徴とする請求項2から5いずれか一項記載のフィルタ。
    The pass band of the filter is a transmission frequency band of a mobile phone,
    The filter according to any one of claims 2 to 5, wherein the attenuation pole formed by the first parallel arm is located in a use frequency band of Bluetooth or a use frequency band of a wireless LAN.
  7.  前記基板上に前記直列共振器、前記並列共振器、前記キャパシタ及び前記配線を備えるチップと、
     前記チップが実装されたパッケージ基板と、を具備し、
     前記インダクタは前記パッケージ基板に設けられていることを特徴とする請求項1から6いずれか一項記載のフィルタ。
    A chip comprising the series resonator, the parallel resonator, the capacitor and the wiring on the substrate;
    A package substrate on which the chip is mounted,
    The filter according to claim 1, wherein the inductor is provided on the package substrate.
  8.  前記直列共振器及び前記並列共振器は対向する櫛形電極を備える弾性波共振器であり、
     前記キャパシタは、前記弾性波共振器が備える櫛形電極と同じ金属層からなり、かつ電極指ピッチが異なる櫛形電極を備えることを特徴とする請求項1から7いずれか一項記載のフィルタ。
    The series resonator and the parallel resonator are acoustic wave resonators provided with opposing comb electrodes,
    8. The filter according to claim 1, wherein the capacitor includes a comb electrode made of the same metal layer as the comb electrode included in the acoustic wave resonator and having a different electrode finger pitch.
  9.  前記直列共振器及び前記並列共振器は対向する櫛形電極を備える弾性波共振器であり、
     前記キャパシタは、前記弾性波共振器が備える櫛形電極と同じ金属層からなり、かつ弾性波の伝搬方向が異なる櫛形電極を備えることを特徴とする請求項1から7いずれか一項記載のフィルタ。
    The series resonator and the parallel resonator are acoustic wave resonators provided with opposing comb electrodes,
    8. The filter according to claim 1, wherein the capacitor includes a comb-shaped electrode made of the same metal layer as that of the comb-shaped electrode included in the acoustic wave resonator and having a different propagation direction of the acoustic wave.
  10.  前記配線は、前記キャパシタが備える櫛形電極の幅と同一の幅を有する領域、又は前記櫛形電極の幅よりも大きい幅を有する領域、を含むことを特徴とする請求項8又は9記載のフィルタ。 10. The filter according to claim 8, wherein the wiring includes a region having the same width as that of the comb electrode included in the capacitor or a region having a width larger than the width of the comb electrode.
  11.  前記直列共振器及び前記並列共振器は圧電薄膜共振器であり、
     前記キャパシタは、前記圧電薄膜共振器が備える下部電極及び上部電極の各々と同じ金属層からなる電極を備えることを特徴とする請求項1から7いずれか一項記載のフィルタ。
    The series resonator and the parallel resonator are piezoelectric thin film resonators,
    The filter according to any one of claims 1 to 7, wherein the capacitor includes an electrode made of the same metal layer as each of a lower electrode and an upper electrode included in the piezoelectric thin film resonator.
  12.  基板上に形成された直列共振器と、前記基板上に形成され、前記直列共振器と並列接続された並列共振器と、前記並列共振器に直列接続されたインダクタと、前記基板上に形成され、前記インダクタに並列接続されたキャパシタと、前記基板上に形成され、前記並列共振器と前記キャパシタとを接続する配線と、を有するフィルタを具備することを特徴とするデュープレクサ。 A series resonator formed on a substrate, a parallel resonator formed on the substrate and connected in parallel to the series resonator, an inductor connected in series to the parallel resonator, and formed on the substrate A duplexer comprising: a capacitor connected in parallel to the inductor; and a wiring formed on the substrate and connected to the parallel resonator and the capacitor.
  13.  前記フィルタは送信フィルタであることを特徴とする請求項12記載のデュープレクサ。 13. The duplexer according to claim 12, wherein the filter is a transmission filter.
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